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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh -verify-machineinstrs < %s | FileCheck %s -check-prefixes=CHECK,RV323; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh -verify-machineinstrs < %s | FileCheck %s -check-prefixes=CHECK,RV644; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh,+zvkb -verify-machineinstrs < %s | FileCheck %s -check-prefixes=ZVKB-V5; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh,+zvkb -verify-machineinstrs < %s | FileCheck %s -check-prefixes=ZVKB-V6; RUN: llc -mtriple=riscv32 -mattr=+zve32x,+zvfh,+zvkb,+zvl64b -verify-machineinstrs < %s | FileCheck %s -check-prefixes=ZVKB-ZVE32X,RV32ZVKB-ZVE32X7; RUN: llc -mtriple=riscv64 -mattr=+zve32x,+zvfh,+zvkb,+zvl64b -verify-machineinstrs < %s | FileCheck %s -check-prefixes=ZVKB-ZVE32X,RV64ZVKB-ZVE32X8 9define <8 x i1> @shuffle_v8i1_as_i8_1(<8 x i1> %v) {10; CHECK-LABEL: shuffle_v8i1_as_i8_1:11; CHECK: # %bb.0:12; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma13; CHECK-NEXT: vsrl.vi v8, v0, 114; CHECK-NEXT: vsll.vi v9, v0, 715; CHECK-NEXT: vor.vv v0, v9, v816; CHECK-NEXT: ret17;18; ZVKB-V-LABEL: shuffle_v8i1_as_i8_1:19; ZVKB-V: # %bb.0:20; ZVKB-V-NEXT: vsetivli zero, 1, e8, mf8, ta, ma21; ZVKB-V-NEXT: vror.vi v0, v0, 122; ZVKB-V-NEXT: ret23;24; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_1:25; ZVKB-ZVE32X: # %bb.0:26; ZVKB-ZVE32X-NEXT: vsetivli zero, 1, e8, mf4, ta, ma27; ZVKB-ZVE32X-NEXT: vror.vi v0, v0, 128; ZVKB-ZVE32X-NEXT: ret29 %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0>30 ret <8 x i1> %shuffle31}32 33define <8 x i1> @shuffle_v8i1_as_i8_2(<8 x i1> %v) {34; CHECK-LABEL: shuffle_v8i1_as_i8_2:35; CHECK: # %bb.0:36; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma37; CHECK-NEXT: vsrl.vi v8, v0, 238; CHECK-NEXT: vsll.vi v9, v0, 639; CHECK-NEXT: vor.vv v0, v9, v840; CHECK-NEXT: ret41;42; ZVKB-V-LABEL: shuffle_v8i1_as_i8_2:43; ZVKB-V: # %bb.0:44; ZVKB-V-NEXT: vsetivli zero, 1, e8, mf8, ta, ma45; ZVKB-V-NEXT: vror.vi v0, v0, 246; ZVKB-V-NEXT: ret47;48; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_2:49; ZVKB-ZVE32X: # %bb.0:50; ZVKB-ZVE32X-NEXT: vsetivli zero, 1, e8, mf4, ta, ma51; ZVKB-ZVE32X-NEXT: vror.vi v0, v0, 252; ZVKB-ZVE32X-NEXT: ret53 %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1>54 ret <8 x i1> %shuffle55}56 57define <8 x i1> @shuffle_v8i1_as_i8_3(<8 x i1> %v) {58; CHECK-LABEL: shuffle_v8i1_as_i8_3:59; CHECK: # %bb.0:60; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma61; CHECK-NEXT: vsrl.vi v8, v0, 362; CHECK-NEXT: vsll.vi v9, v0, 563; CHECK-NEXT: vor.vv v0, v9, v864; CHECK-NEXT: ret65;66; ZVKB-V-LABEL: shuffle_v8i1_as_i8_3:67; ZVKB-V: # %bb.0:68; ZVKB-V-NEXT: vsetivli zero, 1, e8, mf8, ta, ma69; ZVKB-V-NEXT: vror.vi v0, v0, 370; ZVKB-V-NEXT: ret71;72; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_3:73; ZVKB-ZVE32X: # %bb.0:74; ZVKB-ZVE32X-NEXT: vsetivli zero, 1, e8, mf4, ta, ma75; ZVKB-ZVE32X-NEXT: vror.vi v0, v0, 376; ZVKB-ZVE32X-NEXT: ret77 %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2>78 ret <8 x i1> %shuffle79}80 81define <8 x i1> @shuffle_v8i1_as_i8_4(<8 x i1> %v) {82; CHECK-LABEL: shuffle_v8i1_as_i8_4:83; CHECK: # %bb.0:84; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma85; CHECK-NEXT: vsrl.vi v8, v0, 486; CHECK-NEXT: vsll.vi v9, v0, 487; CHECK-NEXT: vor.vv v0, v9, v888; CHECK-NEXT: ret89;90; ZVKB-V-LABEL: shuffle_v8i1_as_i8_4:91; ZVKB-V: # %bb.0:92; ZVKB-V-NEXT: vsetivli zero, 1, e8, mf8, ta, ma93; ZVKB-V-NEXT: vror.vi v0, v0, 494; ZVKB-V-NEXT: ret95;96; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_4:97; ZVKB-ZVE32X: # %bb.0:98; ZVKB-ZVE32X-NEXT: vsetivli zero, 1, e8, mf4, ta, ma99; ZVKB-ZVE32X-NEXT: vror.vi v0, v0, 4100; ZVKB-ZVE32X-NEXT: ret101 %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>102 ret <8 x i1> %shuffle103}104 105define <8 x i1> @shuffle_v8i1_as_i8_5(<8 x i1> %v) {106; CHECK-LABEL: shuffle_v8i1_as_i8_5:107; CHECK: # %bb.0:108; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma109; CHECK-NEXT: vsrl.vi v8, v0, 5110; CHECK-NEXT: vsll.vi v9, v0, 3111; CHECK-NEXT: vor.vv v0, v9, v8112; CHECK-NEXT: ret113;114; ZVKB-V-LABEL: shuffle_v8i1_as_i8_5:115; ZVKB-V: # %bb.0:116; ZVKB-V-NEXT: vsetivli zero, 1, e8, mf8, ta, ma117; ZVKB-V-NEXT: vror.vi v0, v0, 5118; ZVKB-V-NEXT: ret119;120; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_5:121; ZVKB-ZVE32X: # %bb.0:122; ZVKB-ZVE32X-NEXT: vsetivli zero, 1, e8, mf4, ta, ma123; ZVKB-ZVE32X-NEXT: vror.vi v0, v0, 5124; ZVKB-ZVE32X-NEXT: ret125 %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4>126 ret <8 x i1> %shuffle127}128 129define <8 x i1> @shuffle_v8i1_as_i8_6(<8 x i1> %v) {130; CHECK-LABEL: shuffle_v8i1_as_i8_6:131; CHECK: # %bb.0:132; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma133; CHECK-NEXT: vsrl.vi v8, v0, 6134; CHECK-NEXT: vsll.vi v9, v0, 2135; CHECK-NEXT: vor.vv v0, v9, v8136; CHECK-NEXT: ret137;138; ZVKB-V-LABEL: shuffle_v8i1_as_i8_6:139; ZVKB-V: # %bb.0:140; ZVKB-V-NEXT: vsetivli zero, 1, e8, mf8, ta, ma141; ZVKB-V-NEXT: vror.vi v0, v0, 6142; ZVKB-V-NEXT: ret143;144; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_6:145; ZVKB-ZVE32X: # %bb.0:146; ZVKB-ZVE32X-NEXT: vsetivli zero, 1, e8, mf4, ta, ma147; ZVKB-ZVE32X-NEXT: vror.vi v0, v0, 6148; ZVKB-ZVE32X-NEXT: ret149 %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>150 ret <8 x i1> %shuffle151}152 153define <8 x i1> @shuffle_v8i1_as_i8_7(<8 x i1> %v) {154; CHECK-LABEL: shuffle_v8i1_as_i8_7:155; CHECK: # %bb.0:156; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, ma157; CHECK-NEXT: vsrl.vi v8, v0, 7158; CHECK-NEXT: vadd.vv v9, v0, v0159; CHECK-NEXT: vor.vv v0, v9, v8160; CHECK-NEXT: ret161;162; ZVKB-V-LABEL: shuffle_v8i1_as_i8_7:163; ZVKB-V: # %bb.0:164; ZVKB-V-NEXT: vsetivli zero, 1, e8, mf8, ta, ma165; ZVKB-V-NEXT: vror.vi v0, v0, 7166; ZVKB-V-NEXT: ret167;168; ZVKB-ZVE32X-LABEL: shuffle_v8i1_as_i8_7:169; ZVKB-ZVE32X: # %bb.0:170; ZVKB-ZVE32X-NEXT: vsetivli zero, 1, e8, mf4, ta, ma171; ZVKB-ZVE32X-NEXT: vror.vi v0, v0, 7172; ZVKB-ZVE32X-NEXT: ret173 %shuffle = shufflevector <8 x i1> %v, <8 x i1> poison, <8 x i32> <i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6>174 ret <8 x i1> %shuffle175}176 177define <8 x i8> @shuffle_v8i8_as_i16(<8 x i8> %v) {178; CHECK-LABEL: shuffle_v8i8_as_i16:179; CHECK: # %bb.0:180; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma181; CHECK-NEXT: vsrl.vi v9, v8, 8182; CHECK-NEXT: vsll.vi v8, v8, 8183; CHECK-NEXT: vor.vv v8, v8, v9184; CHECK-NEXT: ret185;186; ZVKB-V-LABEL: shuffle_v8i8_as_i16:187; ZVKB-V: # %bb.0:188; ZVKB-V-NEXT: vsetivli zero, 4, e16, mf2, ta, ma189; ZVKB-V-NEXT: vrev8.v v8, v8190; ZVKB-V-NEXT: ret191;192; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i16:193; ZVKB-ZVE32X: # %bb.0:194; ZVKB-ZVE32X-NEXT: vsetivli zero, 4, e16, m1, ta, ma195; ZVKB-ZVE32X-NEXT: vrev8.v v8, v8196; ZVKB-ZVE32X-NEXT: ret197 %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>198 ret <8 x i8> %shuffle199}200 201define <8 x i8> @shuffle_v8i8_as_i32_8(<8 x i8> %v) {202; CHECK-LABEL: shuffle_v8i8_as_i32_8:203; CHECK: # %bb.0:204; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma205; CHECK-NEXT: vsrl.vi v9, v8, 8206; CHECK-NEXT: vsll.vi v8, v8, 24207; CHECK-NEXT: vor.vv v8, v8, v9208; CHECK-NEXT: ret209;210; ZVKB-V-LABEL: shuffle_v8i8_as_i32_8:211; ZVKB-V: # %bb.0:212; ZVKB-V-NEXT: vsetivli zero, 2, e32, mf2, ta, ma213; ZVKB-V-NEXT: vror.vi v8, v8, 8214; ZVKB-V-NEXT: ret215;216; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i32_8:217; ZVKB-ZVE32X: # %bb.0:218; ZVKB-ZVE32X-NEXT: vsetivli zero, 2, e32, m1, ta, ma219; ZVKB-ZVE32X-NEXT: vror.vi v8, v8, 8220; ZVKB-ZVE32X-NEXT: ret221 %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 5, i32 6, i32 7, i32 4>222 ret <8 x i8> %shuffle223}224 225define <8 x i8> @shuffle_v8i8_as_i32_16(<8 x i8> %v) {226; CHECK-LABEL: shuffle_v8i8_as_i32_16:227; CHECK: # %bb.0:228; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma229; CHECK-NEXT: vsrl.vi v9, v8, 16230; CHECK-NEXT: vsll.vi v8, v8, 16231; CHECK-NEXT: vor.vv v8, v8, v9232; CHECK-NEXT: ret233;234; ZVKB-V-LABEL: shuffle_v8i8_as_i32_16:235; ZVKB-V: # %bb.0:236; ZVKB-V-NEXT: vsetivli zero, 2, e32, mf2, ta, ma237; ZVKB-V-NEXT: vror.vi v8, v8, 16238; ZVKB-V-NEXT: ret239;240; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i32_16:241; ZVKB-ZVE32X: # %bb.0:242; ZVKB-ZVE32X-NEXT: vsetivli zero, 2, e32, m1, ta, ma243; ZVKB-ZVE32X-NEXT: vror.vi v8, v8, 16244; ZVKB-ZVE32X-NEXT: ret245 %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>246 ret <8 x i8> %shuffle247}248 249define <8 x i8> @shuffle_v8i8_as_i32_24(<8 x i8> %v) {250; CHECK-LABEL: shuffle_v8i8_as_i32_24:251; CHECK: # %bb.0:252; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma253; CHECK-NEXT: vsrl.vi v9, v8, 24254; CHECK-NEXT: vsll.vi v8, v8, 8255; CHECK-NEXT: vor.vv v8, v8, v9256; CHECK-NEXT: ret257;258; ZVKB-V-LABEL: shuffle_v8i8_as_i32_24:259; ZVKB-V: # %bb.0:260; ZVKB-V-NEXT: vsetivli zero, 2, e32, mf2, ta, ma261; ZVKB-V-NEXT: vror.vi v8, v8, 24262; ZVKB-V-NEXT: ret263;264; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i32_24:265; ZVKB-ZVE32X: # %bb.0:266; ZVKB-ZVE32X-NEXT: vsetivli zero, 2, e32, m1, ta, ma267; ZVKB-ZVE32X-NEXT: vror.vi v8, v8, 24268; ZVKB-ZVE32X-NEXT: ret269 %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 3, i32 0, i32 1, i32 2, i32 7, i32 4, i32 5, i32 6>270 ret <8 x i8> %shuffle271}272 273define <8 x i8> @shuffle_v8i8_as_i64_8(<8 x i8> %v) {274; CHECK-LABEL: shuffle_v8i8_as_i64_8:275; CHECK: # %bb.0:276; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma277; CHECK-NEXT: vslidedown.vi v9, v8, 1278; CHECK-NEXT: vslideup.vi v9, v8, 7279; CHECK-NEXT: vmv1r.v v8, v9280; CHECK-NEXT: ret281;282; ZVKB-V-LABEL: shuffle_v8i8_as_i64_8:283; ZVKB-V: # %bb.0:284; ZVKB-V-NEXT: vsetivli zero, 1, e64, m1, ta, ma285; ZVKB-V-NEXT: vror.vi v8, v8, 8286; ZVKB-V-NEXT: ret287;288; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_8:289; ZVKB-ZVE32X: # %bb.0:290; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e8, m1, ta, ma291; ZVKB-ZVE32X-NEXT: vslidedown.vi v9, v8, 1292; ZVKB-ZVE32X-NEXT: vslideup.vi v9, v8, 7293; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v9294; ZVKB-ZVE32X-NEXT: ret295 %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0>296 ret <8 x i8> %shuffle297}298 299define <8 x i8> @shuffle_v8i8_as_i64_16(<8 x i8> %v) {300; CHECK-LABEL: shuffle_v8i8_as_i64_16:301; CHECK: # %bb.0:302; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma303; CHECK-NEXT: vslidedown.vi v9, v8, 2304; CHECK-NEXT: vslideup.vi v9, v8, 6305; CHECK-NEXT: vmv1r.v v8, v9306; CHECK-NEXT: ret307;308; ZVKB-V-LABEL: shuffle_v8i8_as_i64_16:309; ZVKB-V: # %bb.0:310; ZVKB-V-NEXT: vsetivli zero, 1, e64, m1, ta, ma311; ZVKB-V-NEXT: vror.vi v8, v8, 16312; ZVKB-V-NEXT: ret313;314; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_16:315; ZVKB-ZVE32X: # %bb.0:316; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e8, m1, ta, ma317; ZVKB-ZVE32X-NEXT: vslidedown.vi v9, v8, 2318; ZVKB-ZVE32X-NEXT: vslideup.vi v9, v8, 6319; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v9320; ZVKB-ZVE32X-NEXT: ret321 %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1>322 ret <8 x i8> %shuffle323}324 325define <8 x i8> @shuffle_v8i8_as_i64_24(<8 x i8> %v) {326; CHECK-LABEL: shuffle_v8i8_as_i64_24:327; CHECK: # %bb.0:328; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma329; CHECK-NEXT: vslidedown.vi v9, v8, 3330; CHECK-NEXT: vslideup.vi v9, v8, 5331; CHECK-NEXT: vmv1r.v v8, v9332; CHECK-NEXT: ret333;334; ZVKB-V-LABEL: shuffle_v8i8_as_i64_24:335; ZVKB-V: # %bb.0:336; ZVKB-V-NEXT: vsetivli zero, 1, e64, m1, ta, ma337; ZVKB-V-NEXT: vror.vi v8, v8, 24338; ZVKB-V-NEXT: ret339;340; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_24:341; ZVKB-ZVE32X: # %bb.0:342; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e8, m1, ta, ma343; ZVKB-ZVE32X-NEXT: vslidedown.vi v9, v8, 3344; ZVKB-ZVE32X-NEXT: vslideup.vi v9, v8, 5345; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v9346; ZVKB-ZVE32X-NEXT: ret347 %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2>348 ret <8 x i8> %shuffle349}350 351define <8 x i8> @shuffle_v8i8_as_i64_32(<8 x i8> %v) {352; CHECK-LABEL: shuffle_v8i8_as_i64_32:353; CHECK: # %bb.0:354; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma355; CHECK-NEXT: vslidedown.vi v9, v8, 4356; CHECK-NEXT: vslideup.vi v9, v8, 4357; CHECK-NEXT: vmv1r.v v8, v9358; CHECK-NEXT: ret359;360; ZVKB-V-LABEL: shuffle_v8i8_as_i64_32:361; ZVKB-V: # %bb.0:362; ZVKB-V-NEXT: vsetivli zero, 1, e64, m1, ta, ma363; ZVKB-V-NEXT: vror.vi v8, v8, 32364; ZVKB-V-NEXT: ret365;366; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_32:367; ZVKB-ZVE32X: # %bb.0:368; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e8, m1, ta, ma369; ZVKB-ZVE32X-NEXT: vslidedown.vi v9, v8, 4370; ZVKB-ZVE32X-NEXT: vslideup.vi v9, v8, 4371; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v9372; ZVKB-ZVE32X-NEXT: ret373 %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>374 ret <8 x i8> %shuffle375}376 377define <8 x i8> @shuffle_v8i8_as_i64_40(<8 x i8> %v) {378; CHECK-LABEL: shuffle_v8i8_as_i64_40:379; CHECK: # %bb.0:380; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma381; CHECK-NEXT: vslidedown.vi v9, v8, 5382; CHECK-NEXT: vslideup.vi v9, v8, 3383; CHECK-NEXT: vmv1r.v v8, v9384; CHECK-NEXT: ret385;386; ZVKB-V-LABEL: shuffle_v8i8_as_i64_40:387; ZVKB-V: # %bb.0:388; ZVKB-V-NEXT: vsetivli zero, 1, e64, m1, ta, ma389; ZVKB-V-NEXT: vror.vi v8, v8, 40390; ZVKB-V-NEXT: ret391;392; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_40:393; ZVKB-ZVE32X: # %bb.0:394; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e8, m1, ta, ma395; ZVKB-ZVE32X-NEXT: vslidedown.vi v9, v8, 5396; ZVKB-ZVE32X-NEXT: vslideup.vi v9, v8, 3397; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v9398; ZVKB-ZVE32X-NEXT: ret399 %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4>400 ret <8 x i8> %shuffle401}402 403define <8 x i8> @shuffle_v8i8_as_i64_48(<8 x i8> %v) {404; CHECK-LABEL: shuffle_v8i8_as_i64_48:405; CHECK: # %bb.0:406; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma407; CHECK-NEXT: vslidedown.vi v9, v8, 6408; CHECK-NEXT: vslideup.vi v9, v8, 2409; CHECK-NEXT: vmv1r.v v8, v9410; CHECK-NEXT: ret411;412; ZVKB-V-LABEL: shuffle_v8i8_as_i64_48:413; ZVKB-V: # %bb.0:414; ZVKB-V-NEXT: vsetivli zero, 1, e64, m1, ta, ma415; ZVKB-V-NEXT: vror.vi v8, v8, 48416; ZVKB-V-NEXT: ret417;418; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_48:419; ZVKB-ZVE32X: # %bb.0:420; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e8, m1, ta, ma421; ZVKB-ZVE32X-NEXT: vslidedown.vi v9, v8, 6422; ZVKB-ZVE32X-NEXT: vslideup.vi v9, v8, 2423; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v9424; ZVKB-ZVE32X-NEXT: ret425 %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>426 ret <8 x i8> %shuffle427}428 429define <8 x i8> @shuffle_v8i8_as_i64_56(<8 x i8> %v) {430; CHECK-LABEL: shuffle_v8i8_as_i64_56:431; CHECK: # %bb.0:432; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma433; CHECK-NEXT: vslidedown.vi v9, v8, 7434; CHECK-NEXT: vslideup.vi v9, v8, 1435; CHECK-NEXT: vmv1r.v v8, v9436; CHECK-NEXT: ret437;438; ZVKB-V-LABEL: shuffle_v8i8_as_i64_56:439; ZVKB-V: # %bb.0:440; ZVKB-V-NEXT: vsetivli zero, 1, e64, m1, ta, ma441; ZVKB-V-NEXT: vror.vi v8, v8, 56442; ZVKB-V-NEXT: ret443;444; ZVKB-ZVE32X-LABEL: shuffle_v8i8_as_i64_56:445; ZVKB-ZVE32X: # %bb.0:446; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e8, m1, ta, ma447; ZVKB-ZVE32X-NEXT: vslidedown.vi v9, v8, 7448; ZVKB-ZVE32X-NEXT: vslideup.vi v9, v8, 1449; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v9450; ZVKB-ZVE32X-NEXT: ret451 %shuffle = shufflevector <8 x i8> %v, <8 x i8> poison, <8 x i32> <i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6>452 ret <8 x i8> %shuffle453}454 455define <8 x i16> @shuffle_v8i16_as_i32(<8 x i16> %v) {456; CHECK-LABEL: shuffle_v8i16_as_i32:457; CHECK: # %bb.0:458; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma459; CHECK-NEXT: vsrl.vi v9, v8, 16460; CHECK-NEXT: vsll.vi v8, v8, 16461; CHECK-NEXT: vor.vv v8, v8, v9462; CHECK-NEXT: ret463;464; ZVKB-V-LABEL: shuffle_v8i16_as_i32:465; ZVKB-V: # %bb.0:466; ZVKB-V-NEXT: vsetivli zero, 4, e32, m1, ta, ma467; ZVKB-V-NEXT: vror.vi v8, v8, 16468; ZVKB-V-NEXT: ret469;470; ZVKB-ZVE32X-LABEL: shuffle_v8i16_as_i32:471; ZVKB-ZVE32X: # %bb.0:472; ZVKB-ZVE32X-NEXT: vsetivli zero, 4, e32, m2, ta, ma473; ZVKB-ZVE32X-NEXT: vror.vi v8, v8, 16474; ZVKB-ZVE32X-NEXT: ret475 %shuffle = shufflevector <8 x i16> %v, <8 x i16> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>476 ret <8 x i16> %shuffle477}478 479define <8 x i16> @shuffle_v8i16_as_i64_16(<8 x i16> %v) {480; RV32-LABEL: shuffle_v8i16_as_i64_16:481; RV32: # %bb.0:482; RV32-NEXT: vsetivli zero, 2, e32, mf2, ta, ma483; RV32-NEXT: vmv.v.i v9, 0484; RV32-NEXT: li a0, 48485; RV32-NEXT: li a1, 63486; RV32-NEXT: vwsubu.vx v10, v9, a0487; RV32-NEXT: vsetvli zero, zero, e64, m1, ta, ma488; RV32-NEXT: vmv.v.x v9, a0489; RV32-NEXT: vand.vx v10, v10, a1490; RV32-NEXT: vand.vx v9, v9, a1491; RV32-NEXT: vsrl.vv v10, v8, v10492; RV32-NEXT: vsll.vv v8, v8, v9493; RV32-NEXT: vor.vv v8, v8, v10494; RV32-NEXT: ret495;496; RV64-LABEL: shuffle_v8i16_as_i64_16:497; RV64: # %bb.0:498; RV64-NEXT: li a0, 48499; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma500; RV64-NEXT: vsll.vx v9, v8, a0501; RV64-NEXT: vsrl.vi v8, v8, 16502; RV64-NEXT: vor.vv v8, v9, v8503; RV64-NEXT: ret504;505; ZVKB-V-LABEL: shuffle_v8i16_as_i64_16:506; ZVKB-V: # %bb.0:507; ZVKB-V-NEXT: vsetivli zero, 2, e64, m1, ta, ma508; ZVKB-V-NEXT: vror.vi v8, v8, 16509; ZVKB-V-NEXT: ret510;511; ZVKB-ZVE32X-LABEL: shuffle_v8i16_as_i64_16:512; ZVKB-ZVE32X: # %bb.0:513; ZVKB-ZVE32X-NEXT: li a0, 136514; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e16, m2, ta, mu515; ZVKB-ZVE32X-NEXT: vmv.s.x v0, a0516; ZVKB-ZVE32X-NEXT: vslidedown.vi v10, v8, 1517; ZVKB-ZVE32X-NEXT: vslideup.vi v10, v8, 3, v0.t518; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v10519; ZVKB-ZVE32X-NEXT: ret520 %shuffle = shufflevector <8 x i16> %v, <8 x i16> poison, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 5, i32 6, i32 7, i32 4>521 ret <8 x i16> %shuffle522}523 524define <8 x i16> @shuffle_v8i16_as_i64_32(<8 x i16> %v) {525; RV32-LABEL: shuffle_v8i16_as_i64_32:526; RV32: # %bb.0:527; RV32-NEXT: vsetivli zero, 2, e32, mf2, ta, ma528; RV32-NEXT: vmv.v.i v9, 0529; RV32-NEXT: li a0, 32530; RV32-NEXT: li a1, 63531; RV32-NEXT: vwsubu.vx v10, v9, a0532; RV32-NEXT: vsetvli zero, zero, e64, m1, ta, ma533; RV32-NEXT: vmv.v.x v9, a0534; RV32-NEXT: vand.vx v10, v10, a1535; RV32-NEXT: vand.vx v9, v9, a1536; RV32-NEXT: vsrl.vv v10, v8, v10537; RV32-NEXT: vsll.vv v8, v8, v9538; RV32-NEXT: vor.vv v8, v8, v10539; RV32-NEXT: ret540;541; RV64-LABEL: shuffle_v8i16_as_i64_32:542; RV64: # %bb.0:543; RV64-NEXT: li a0, 32544; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma545; RV64-NEXT: vsrl.vx v9, v8, a0546; RV64-NEXT: vsll.vx v8, v8, a0547; RV64-NEXT: vor.vv v8, v8, v9548; RV64-NEXT: ret549;550; ZVKB-V-LABEL: shuffle_v8i16_as_i64_32:551; ZVKB-V: # %bb.0:552; ZVKB-V-NEXT: vsetivli zero, 2, e64, m1, ta, ma553; ZVKB-V-NEXT: vror.vi v8, v8, 32554; ZVKB-V-NEXT: ret555;556; ZVKB-ZVE32X-LABEL: shuffle_v8i16_as_i64_32:557; ZVKB-ZVE32X: # %bb.0:558; ZVKB-ZVE32X-NEXT: li a0, 204559; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e16, m2, ta, mu560; ZVKB-ZVE32X-NEXT: vmv.s.x v0, a0561; ZVKB-ZVE32X-NEXT: vslidedown.vi v10, v8, 2562; ZVKB-ZVE32X-NEXT: vslideup.vi v10, v8, 2, v0.t563; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v10564; ZVKB-ZVE32X-NEXT: ret565 %shuffle = shufflevector <8 x i16> %v, <8 x i16> poison, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>566 ret <8 x i16> %shuffle567}568 569define <8 x i16> @shuffle_v8i16_as_i64_48(<8 x i16> %v) {570; RV32-LABEL: shuffle_v8i16_as_i64_48:571; RV32: # %bb.0:572; RV32-NEXT: vsetivli zero, 2, e32, mf2, ta, ma573; RV32-NEXT: vmv.v.i v9, 0574; RV32-NEXT: li a0, 16575; RV32-NEXT: li a1, 63576; RV32-NEXT: vwsubu.vx v10, v9, a0577; RV32-NEXT: vsetvli zero, zero, e64, m1, ta, ma578; RV32-NEXT: vmv.v.x v9, a0579; RV32-NEXT: vand.vx v10, v10, a1580; RV32-NEXT: vand.vx v9, v9, a1581; RV32-NEXT: vsrl.vv v10, v8, v10582; RV32-NEXT: vsll.vv v8, v8, v9583; RV32-NEXT: vor.vv v8, v8, v10584; RV32-NEXT: ret585;586; RV64-LABEL: shuffle_v8i16_as_i64_48:587; RV64: # %bb.0:588; RV64-NEXT: li a0, 48589; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma590; RV64-NEXT: vsrl.vx v9, v8, a0591; RV64-NEXT: vsll.vi v8, v8, 16592; RV64-NEXT: vor.vv v8, v8, v9593; RV64-NEXT: ret594;595; ZVKB-V-LABEL: shuffle_v8i16_as_i64_48:596; ZVKB-V: # %bb.0:597; ZVKB-V-NEXT: vsetivli zero, 2, e64, m1, ta, ma598; ZVKB-V-NEXT: vror.vi v8, v8, 48599; ZVKB-V-NEXT: ret600;601; ZVKB-ZVE32X-LABEL: shuffle_v8i16_as_i64_48:602; ZVKB-ZVE32X: # %bb.0:603; ZVKB-ZVE32X-NEXT: li a0, -18604; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e16, m2, ta, mu605; ZVKB-ZVE32X-NEXT: vmv.s.x v0, a0606; ZVKB-ZVE32X-NEXT: vslidedown.vi v10, v8, 3607; ZVKB-ZVE32X-NEXT: vslideup.vi v10, v8, 1, v0.t608; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v10609; ZVKB-ZVE32X-NEXT: ret610 %shuffle = shufflevector <8 x i16> %v, <8 x i16> poison, <8 x i32> <i32 3, i32 0, i32 1, i32 2, i32 7, i32 4, i32 5, i32 6>611 ret <8 x i16> %shuffle612}613 614define <8 x i32> @shuffle_v8i32_as_i64(<8 x i32> %v) {615; RV32-LABEL: shuffle_v8i32_as_i64:616; RV32: # %bb.0:617; RV32-NEXT: vsetivli zero, 4, e32, m1, ta, ma618; RV32-NEXT: vmv.v.i v12, 0619; RV32-NEXT: li a0, 32620; RV32-NEXT: li a1, 63621; RV32-NEXT: vwsubu.vx v10, v12, a0622; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, ma623; RV32-NEXT: vmv.v.x v12, a0624; RV32-NEXT: vand.vx v10, v10, a1625; RV32-NEXT: vand.vx v12, v12, a1626; RV32-NEXT: vsrl.vv v10, v8, v10627; RV32-NEXT: vsll.vv v8, v8, v12628; RV32-NEXT: vor.vv v8, v8, v10629; RV32-NEXT: ret630;631; RV64-LABEL: shuffle_v8i32_as_i64:632; RV64: # %bb.0:633; RV64-NEXT: li a0, 32634; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma635; RV64-NEXT: vsrl.vx v10, v8, a0636; RV64-NEXT: vsll.vx v8, v8, a0637; RV64-NEXT: vor.vv v8, v8, v10638; RV64-NEXT: ret639;640; ZVKB-V-LABEL: shuffle_v8i32_as_i64:641; ZVKB-V: # %bb.0:642; ZVKB-V-NEXT: vsetivli zero, 4, e64, m2, ta, ma643; ZVKB-V-NEXT: vror.vi v8, v8, 32644; ZVKB-V-NEXT: ret645;646; ZVKB-ZVE32X-LABEL: shuffle_v8i32_as_i64:647; ZVKB-ZVE32X: # %bb.0:648; ZVKB-ZVE32X-NEXT: li a0, 170649; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e32, m4, ta, mu650; ZVKB-ZVE32X-NEXT: vmv.s.x v0, a0651; ZVKB-ZVE32X-NEXT: vslidedown.vi v12, v8, 1652; ZVKB-ZVE32X-NEXT: vslideup.vi v12, v8, 1, v0.t653; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v12654; ZVKB-ZVE32X-NEXT: ret655 %shuffle = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>656 ret <8 x i32> %shuffle657}658 659define <8 x half> @shuffle_v8f16_as_i32(<8 x half> %v) {660; CHECK-LABEL: shuffle_v8f16_as_i32:661; CHECK: # %bb.0:662; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma663; CHECK-NEXT: vsrl.vi v9, v8, 16664; CHECK-NEXT: vsll.vi v8, v8, 16665; CHECK-NEXT: vor.vv v8, v8, v9666; CHECK-NEXT: ret667;668; ZVKB-V-LABEL: shuffle_v8f16_as_i32:669; ZVKB-V: # %bb.0:670; ZVKB-V-NEXT: vsetivli zero, 4, e32, m1, ta, ma671; ZVKB-V-NEXT: vror.vi v8, v8, 16672; ZVKB-V-NEXT: ret673;674; ZVKB-ZVE32X-LABEL: shuffle_v8f16_as_i32:675; ZVKB-ZVE32X: # %bb.0:676; ZVKB-ZVE32X-NEXT: vsetivli zero, 4, e32, m2, ta, ma677; ZVKB-ZVE32X-NEXT: vror.vi v8, v8, 16678; ZVKB-ZVE32X-NEXT: ret679 %shuffle = shufflevector <8 x half> %v, <8 x half> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>680 ret <8 x half> %shuffle681}682 683define <8 x half> @shuffle_v8f16_as_i64_16(<8 x half> %v) {684; RV32-LABEL: shuffle_v8f16_as_i64_16:685; RV32: # %bb.0:686; RV32-NEXT: vsetivli zero, 2, e32, mf2, ta, ma687; RV32-NEXT: vmv.v.i v9, 0688; RV32-NEXT: li a0, 48689; RV32-NEXT: li a1, 63690; RV32-NEXT: vwsubu.vx v10, v9, a0691; RV32-NEXT: vsetvli zero, zero, e64, m1, ta, ma692; RV32-NEXT: vmv.v.x v9, a0693; RV32-NEXT: vand.vx v10, v10, a1694; RV32-NEXT: vand.vx v9, v9, a1695; RV32-NEXT: vsrl.vv v10, v8, v10696; RV32-NEXT: vsll.vv v8, v8, v9697; RV32-NEXT: vor.vv v8, v8, v10698; RV32-NEXT: ret699;700; RV64-LABEL: shuffle_v8f16_as_i64_16:701; RV64: # %bb.0:702; RV64-NEXT: li a0, 48703; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma704; RV64-NEXT: vsll.vx v9, v8, a0705; RV64-NEXT: vsrl.vi v8, v8, 16706; RV64-NEXT: vor.vv v8, v9, v8707; RV64-NEXT: ret708;709; ZVKB-V-LABEL: shuffle_v8f16_as_i64_16:710; ZVKB-V: # %bb.0:711; ZVKB-V-NEXT: vsetivli zero, 2, e64, m1, ta, ma712; ZVKB-V-NEXT: vror.vi v8, v8, 16713; ZVKB-V-NEXT: ret714;715; ZVKB-ZVE32X-LABEL: shuffle_v8f16_as_i64_16:716; ZVKB-ZVE32X: # %bb.0:717; ZVKB-ZVE32X-NEXT: li a0, 136718; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e16, m2, ta, mu719; ZVKB-ZVE32X-NEXT: vmv.s.x v0, a0720; ZVKB-ZVE32X-NEXT: vslidedown.vi v10, v8, 1721; ZVKB-ZVE32X-NEXT: vslideup.vi v10, v8, 3, v0.t722; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v10723; ZVKB-ZVE32X-NEXT: ret724 %shuffle = shufflevector <8 x half> %v, <8 x half> poison, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 5, i32 6, i32 7, i32 4>725 ret <8 x half> %shuffle726}727 728define <8 x half> @shuffle_v8f16_as_i64_32(<8 x half> %v) {729; RV32-LABEL: shuffle_v8f16_as_i64_32:730; RV32: # %bb.0:731; RV32-NEXT: vsetivli zero, 2, e32, mf2, ta, ma732; RV32-NEXT: vmv.v.i v9, 0733; RV32-NEXT: li a0, 32734; RV32-NEXT: li a1, 63735; RV32-NEXT: vwsubu.vx v10, v9, a0736; RV32-NEXT: vsetvli zero, zero, e64, m1, ta, ma737; RV32-NEXT: vmv.v.x v9, a0738; RV32-NEXT: vand.vx v10, v10, a1739; RV32-NEXT: vand.vx v9, v9, a1740; RV32-NEXT: vsrl.vv v10, v8, v10741; RV32-NEXT: vsll.vv v8, v8, v9742; RV32-NEXT: vor.vv v8, v8, v10743; RV32-NEXT: ret744;745; RV64-LABEL: shuffle_v8f16_as_i64_32:746; RV64: # %bb.0:747; RV64-NEXT: li a0, 32748; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma749; RV64-NEXT: vsrl.vx v9, v8, a0750; RV64-NEXT: vsll.vx v8, v8, a0751; RV64-NEXT: vor.vv v8, v8, v9752; RV64-NEXT: ret753;754; ZVKB-V-LABEL: shuffle_v8f16_as_i64_32:755; ZVKB-V: # %bb.0:756; ZVKB-V-NEXT: vsetivli zero, 2, e64, m1, ta, ma757; ZVKB-V-NEXT: vror.vi v8, v8, 32758; ZVKB-V-NEXT: ret759;760; ZVKB-ZVE32X-LABEL: shuffle_v8f16_as_i64_32:761; ZVKB-ZVE32X: # %bb.0:762; ZVKB-ZVE32X-NEXT: li a0, 204763; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e16, m2, ta, mu764; ZVKB-ZVE32X-NEXT: vmv.s.x v0, a0765; ZVKB-ZVE32X-NEXT: vslidedown.vi v10, v8, 2766; ZVKB-ZVE32X-NEXT: vslideup.vi v10, v8, 2, v0.t767; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v10768; ZVKB-ZVE32X-NEXT: ret769 %shuffle = shufflevector <8 x half> %v, <8 x half> poison, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>770 ret <8 x half> %shuffle771}772 773define <8 x half> @shuffle_v8f16_as_i64_48(<8 x half> %v) {774; RV32-LABEL: shuffle_v8f16_as_i64_48:775; RV32: # %bb.0:776; RV32-NEXT: vsetivli zero, 2, e32, mf2, ta, ma777; RV32-NEXT: vmv.v.i v9, 0778; RV32-NEXT: li a0, 16779; RV32-NEXT: li a1, 63780; RV32-NEXT: vwsubu.vx v10, v9, a0781; RV32-NEXT: vsetvli zero, zero, e64, m1, ta, ma782; RV32-NEXT: vmv.v.x v9, a0783; RV32-NEXT: vand.vx v10, v10, a1784; RV32-NEXT: vand.vx v9, v9, a1785; RV32-NEXT: vsrl.vv v10, v8, v10786; RV32-NEXT: vsll.vv v8, v8, v9787; RV32-NEXT: vor.vv v8, v8, v10788; RV32-NEXT: ret789;790; RV64-LABEL: shuffle_v8f16_as_i64_48:791; RV64: # %bb.0:792; RV64-NEXT: li a0, 48793; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma794; RV64-NEXT: vsrl.vx v9, v8, a0795; RV64-NEXT: vsll.vi v8, v8, 16796; RV64-NEXT: vor.vv v8, v8, v9797; RV64-NEXT: ret798;799; ZVKB-V-LABEL: shuffle_v8f16_as_i64_48:800; ZVKB-V: # %bb.0:801; ZVKB-V-NEXT: vsetivli zero, 2, e64, m1, ta, ma802; ZVKB-V-NEXT: vror.vi v8, v8, 48803; ZVKB-V-NEXT: ret804;805; ZVKB-ZVE32X-LABEL: shuffle_v8f16_as_i64_48:806; ZVKB-ZVE32X: # %bb.0:807; ZVKB-ZVE32X-NEXT: li a0, -18808; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e16, m2, ta, mu809; ZVKB-ZVE32X-NEXT: vmv.s.x v0, a0810; ZVKB-ZVE32X-NEXT: vslidedown.vi v10, v8, 3811; ZVKB-ZVE32X-NEXT: vslideup.vi v10, v8, 1, v0.t812; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v10813; ZVKB-ZVE32X-NEXT: ret814 %shuffle = shufflevector <8 x half> %v, <8 x half> poison, <8 x i32> <i32 3, i32 0, i32 1, i32 2, i32 7, i32 4, i32 5, i32 6>815 ret <8 x half> %shuffle816}817 818define <8 x float> @shuffle_v8f32_as_i64(<8 x float> %v) {819; RV32-LABEL: shuffle_v8f32_as_i64:820; RV32: # %bb.0:821; RV32-NEXT: vsetivli zero, 4, e32, m1, ta, ma822; RV32-NEXT: vmv.v.i v12, 0823; RV32-NEXT: li a0, 32824; RV32-NEXT: li a1, 63825; RV32-NEXT: vwsubu.vx v10, v12, a0826; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, ma827; RV32-NEXT: vmv.v.x v12, a0828; RV32-NEXT: vand.vx v10, v10, a1829; RV32-NEXT: vand.vx v12, v12, a1830; RV32-NEXT: vsrl.vv v10, v8, v10831; RV32-NEXT: vsll.vv v8, v8, v12832; RV32-NEXT: vor.vv v8, v8, v10833; RV32-NEXT: ret834;835; RV64-LABEL: shuffle_v8f32_as_i64:836; RV64: # %bb.0:837; RV64-NEXT: li a0, 32838; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma839; RV64-NEXT: vsrl.vx v10, v8, a0840; RV64-NEXT: vsll.vx v8, v8, a0841; RV64-NEXT: vor.vv v8, v8, v10842; RV64-NEXT: ret843;844; ZVKB-V-LABEL: shuffle_v8f32_as_i64:845; ZVKB-V: # %bb.0:846; ZVKB-V-NEXT: vsetivli zero, 4, e64, m2, ta, ma847; ZVKB-V-NEXT: vror.vi v8, v8, 32848; ZVKB-V-NEXT: ret849;850; ZVKB-ZVE32X-LABEL: shuffle_v8f32_as_i64:851; ZVKB-ZVE32X: # %bb.0:852; ZVKB-ZVE32X-NEXT: li a0, 170853; ZVKB-ZVE32X-NEXT: vsetivli zero, 8, e32, m4, ta, mu854; ZVKB-ZVE32X-NEXT: vmv.s.x v0, a0855; ZVKB-ZVE32X-NEXT: vslidedown.vi v12, v8, 1856; ZVKB-ZVE32X-NEXT: vslideup.vi v12, v8, 1, v0.t857; ZVKB-ZVE32X-NEXT: vmv.v.v v8, v12858; ZVKB-ZVE32X-NEXT: ret859 %shuffle = shufflevector <8 x float> %v, <8 x float> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>860 ret <8 x float> %shuffle861}862 863define <8 x float> @shuffle_v8f32_as_i64_exact(<8 x float> %v) vscale_range(2,2) {864; RV32-LABEL: shuffle_v8f32_as_i64_exact:865; RV32: # %bb.0:866; RV32-NEXT: vsetivli zero, 4, e32, m1, ta, ma867; RV32-NEXT: vmv.v.i v12, 0868; RV32-NEXT: li a0, 32869; RV32-NEXT: li a1, 63870; RV32-NEXT: vwsubu.vx v10, v12, a0871; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, ma872; RV32-NEXT: vmv.v.x v12, a0873; RV32-NEXT: vand.vx v10, v10, a1874; RV32-NEXT: vand.vx v12, v12, a1875; RV32-NEXT: vsrl.vv v10, v8, v10876; RV32-NEXT: vsll.vv v8, v8, v12877; RV32-NEXT: vor.vv v8, v8, v10878; RV32-NEXT: ret879;880; RV64-LABEL: shuffle_v8f32_as_i64_exact:881; RV64: # %bb.0:882; RV64-NEXT: li a0, 32883; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma884; RV64-NEXT: vsrl.vx v10, v8, a0885; RV64-NEXT: vsll.vx v8, v8, a0886; RV64-NEXT: vor.vv v8, v8, v10887; RV64-NEXT: ret888;889; ZVKB-V-LABEL: shuffle_v8f32_as_i64_exact:890; ZVKB-V: # %bb.0:891; ZVKB-V-NEXT: vsetivli zero, 4, e64, m2, ta, ma892; ZVKB-V-NEXT: vror.vi v8, v8, 32893; ZVKB-V-NEXT: ret894;895; ZVKB-ZVE32X-LABEL: shuffle_v8f32_as_i64_exact:896; ZVKB-ZVE32X: # %bb.0:897; ZVKB-ZVE32X-NEXT: vsetivli zero, 4, e32, m1, ta, mu898; ZVKB-ZVE32X-NEXT: vmv.v.i v0, 10899; ZVKB-ZVE32X-NEXT: vslidedown.vi v11, v9, 1900; ZVKB-ZVE32X-NEXT: vslideup.vi v11, v9, 1, v0.t901; ZVKB-ZVE32X-NEXT: vslidedown.vi v10, v8, 1902; ZVKB-ZVE32X-NEXT: vslideup.vi v10, v8, 1, v0.t903; ZVKB-ZVE32X-NEXT: vmv2r.v v8, v10904; ZVKB-ZVE32X-NEXT: ret905 %shuffle = shufflevector <8 x float> %v, <8 x float> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>906 ret <8 x float> %shuffle907}908 909define <8 x i64> @shuffle_v8i64_as_i128(<8 x i64> %v) {910; CHECK-LABEL: shuffle_v8i64_as_i128:911; CHECK: # %bb.0:912; CHECK-NEXT: li a0, 170913; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, mu914; CHECK-NEXT: vmv.s.x v0, a0915; CHECK-NEXT: vslidedown.vi v12, v8, 1916; CHECK-NEXT: vslideup.vi v12, v8, 1, v0.t917; CHECK-NEXT: vmv.v.v v8, v12918; CHECK-NEXT: ret919;920; ZVKB-V-LABEL: shuffle_v8i64_as_i128:921; ZVKB-V: # %bb.0:922; ZVKB-V-NEXT: li a0, 170923; ZVKB-V-NEXT: vsetivli zero, 8, e64, m4, ta, mu924; ZVKB-V-NEXT: vmv.s.x v0, a0925; ZVKB-V-NEXT: vslidedown.vi v12, v8, 1926; ZVKB-V-NEXT: vslideup.vi v12, v8, 1, v0.t927; ZVKB-V-NEXT: vmv.v.v v8, v12928; ZVKB-V-NEXT: ret929;930; RV32ZVKB-ZVE32X-LABEL: shuffle_v8i64_as_i128:931; RV32ZVKB-ZVE32X: # %bb.0:932; RV32ZVKB-ZVE32X-NEXT: addi sp, sp, -128933; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 128934; RV32ZVKB-ZVE32X-NEXT: sw ra, 124(sp) # 4-byte Folded Spill935; RV32ZVKB-ZVE32X-NEXT: sw s0, 120(sp) # 4-byte Folded Spill936; RV32ZVKB-ZVE32X-NEXT: sw s2, 116(sp) # 4-byte Folded Spill937; RV32ZVKB-ZVE32X-NEXT: sw s3, 112(sp) # 4-byte Folded Spill938; RV32ZVKB-ZVE32X-NEXT: .cfi_offset ra, -4939; RV32ZVKB-ZVE32X-NEXT: .cfi_offset s0, -8940; RV32ZVKB-ZVE32X-NEXT: .cfi_offset s2, -12941; RV32ZVKB-ZVE32X-NEXT: .cfi_offset s3, -16942; RV32ZVKB-ZVE32X-NEXT: addi s0, sp, 128943; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa s0, 0944; RV32ZVKB-ZVE32X-NEXT: andi sp, sp, -64945; RV32ZVKB-ZVE32X-NEXT: lw a2, 0(a1)946; RV32ZVKB-ZVE32X-NEXT: lw a3, 4(a1)947; RV32ZVKB-ZVE32X-NEXT: lw a4, 8(a1)948; RV32ZVKB-ZVE32X-NEXT: lw a5, 12(a1)949; RV32ZVKB-ZVE32X-NEXT: lw a6, 16(a1)950; RV32ZVKB-ZVE32X-NEXT: lw a7, 20(a1)951; RV32ZVKB-ZVE32X-NEXT: lw t0, 24(a1)952; RV32ZVKB-ZVE32X-NEXT: lw t1, 28(a1)953; RV32ZVKB-ZVE32X-NEXT: lw t2, 48(a1)954; RV32ZVKB-ZVE32X-NEXT: lw t3, 52(a1)955; RV32ZVKB-ZVE32X-NEXT: lw t4, 56(a1)956; RV32ZVKB-ZVE32X-NEXT: lw t5, 60(a1)957; RV32ZVKB-ZVE32X-NEXT: lw t6, 32(a1)958; RV32ZVKB-ZVE32X-NEXT: lw s2, 36(a1)959; RV32ZVKB-ZVE32X-NEXT: lw s3, 40(a1)960; RV32ZVKB-ZVE32X-NEXT: lw a1, 44(a1)961; RV32ZVKB-ZVE32X-NEXT: sw t4, 48(sp)962; RV32ZVKB-ZVE32X-NEXT: sw t5, 52(sp)963; RV32ZVKB-ZVE32X-NEXT: sw t2, 56(sp)964; RV32ZVKB-ZVE32X-NEXT: sw t3, 60(sp)965; RV32ZVKB-ZVE32X-NEXT: sw s3, 32(sp)966; RV32ZVKB-ZVE32X-NEXT: sw a1, 36(sp)967; RV32ZVKB-ZVE32X-NEXT: sw t6, 40(sp)968; RV32ZVKB-ZVE32X-NEXT: sw s2, 44(sp)969; RV32ZVKB-ZVE32X-NEXT: sw t0, 16(sp)970; RV32ZVKB-ZVE32X-NEXT: sw t1, 20(sp)971; RV32ZVKB-ZVE32X-NEXT: sw a6, 24(sp)972; RV32ZVKB-ZVE32X-NEXT: sw a7, 28(sp)973; RV32ZVKB-ZVE32X-NEXT: sw a4, 0(sp)974; RV32ZVKB-ZVE32X-NEXT: sw a5, 4(sp)975; RV32ZVKB-ZVE32X-NEXT: sw a2, 8(sp)976; RV32ZVKB-ZVE32X-NEXT: sw a3, 12(sp)977; RV32ZVKB-ZVE32X-NEXT: mv a1, sp978; RV32ZVKB-ZVE32X-NEXT: vsetivli zero, 16, e32, m8, ta, ma979; RV32ZVKB-ZVE32X-NEXT: vle32.v v8, (a1)980; RV32ZVKB-ZVE32X-NEXT: vse32.v v8, (a0)981; RV32ZVKB-ZVE32X-NEXT: addi sp, s0, -128982; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa sp, 128983; RV32ZVKB-ZVE32X-NEXT: lw ra, 124(sp) # 4-byte Folded Reload984; RV32ZVKB-ZVE32X-NEXT: lw s0, 120(sp) # 4-byte Folded Reload985; RV32ZVKB-ZVE32X-NEXT: lw s2, 116(sp) # 4-byte Folded Reload986; RV32ZVKB-ZVE32X-NEXT: lw s3, 112(sp) # 4-byte Folded Reload987; RV32ZVKB-ZVE32X-NEXT: .cfi_restore ra988; RV32ZVKB-ZVE32X-NEXT: .cfi_restore s0989; RV32ZVKB-ZVE32X-NEXT: .cfi_restore s2990; RV32ZVKB-ZVE32X-NEXT: .cfi_restore s3991; RV32ZVKB-ZVE32X-NEXT: addi sp, sp, 128992; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 0993; RV32ZVKB-ZVE32X-NEXT: ret994;995; RV64ZVKB-ZVE32X-LABEL: shuffle_v8i64_as_i128:996; RV64ZVKB-ZVE32X: # %bb.0:997; RV64ZVKB-ZVE32X-NEXT: addi sp, sp, -128998; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 128999; RV64ZVKB-ZVE32X-NEXT: sd ra, 120(sp) # 8-byte Folded Spill1000; RV64ZVKB-ZVE32X-NEXT: sd s0, 112(sp) # 8-byte Folded Spill1001; RV64ZVKB-ZVE32X-NEXT: sd s2, 104(sp) # 8-byte Folded Spill1002; RV64ZVKB-ZVE32X-NEXT: sd s3, 96(sp) # 8-byte Folded Spill1003; RV64ZVKB-ZVE32X-NEXT: .cfi_offset ra, -81004; RV64ZVKB-ZVE32X-NEXT: .cfi_offset s0, -161005; RV64ZVKB-ZVE32X-NEXT: .cfi_offset s2, -241006; RV64ZVKB-ZVE32X-NEXT: .cfi_offset s3, -321007; RV64ZVKB-ZVE32X-NEXT: addi s0, sp, 1281008; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa s0, 01009; RV64ZVKB-ZVE32X-NEXT: andi sp, sp, -641010; RV64ZVKB-ZVE32X-NEXT: ld a2, 0(a1)1011; RV64ZVKB-ZVE32X-NEXT: ld a3, 8(a1)1012; RV64ZVKB-ZVE32X-NEXT: ld a4, 16(a1)1013; RV64ZVKB-ZVE32X-NEXT: ld a5, 24(a1)1014; RV64ZVKB-ZVE32X-NEXT: ld a6, 32(a1)1015; RV64ZVKB-ZVE32X-NEXT: ld a7, 40(a1)1016; RV64ZVKB-ZVE32X-NEXT: ld t0, 48(a1)1017; RV64ZVKB-ZVE32X-NEXT: ld a1, 56(a1)1018; RV64ZVKB-ZVE32X-NEXT: srli t1, a3, 321019; RV64ZVKB-ZVE32X-NEXT: srli t2, a2, 321020; RV64ZVKB-ZVE32X-NEXT: srli t3, a5, 321021; RV64ZVKB-ZVE32X-NEXT: srli t4, a4, 321022; RV64ZVKB-ZVE32X-NEXT: srli t5, a7, 321023; RV64ZVKB-ZVE32X-NEXT: srli t6, a6, 321024; RV64ZVKB-ZVE32X-NEXT: srli s2, a1, 321025; RV64ZVKB-ZVE32X-NEXT: srli s3, t0, 321026; RV64ZVKB-ZVE32X-NEXT: sw a1, 48(sp)1027; RV64ZVKB-ZVE32X-NEXT: sw s2, 52(sp)1028; RV64ZVKB-ZVE32X-NEXT: sw t0, 56(sp)1029; RV64ZVKB-ZVE32X-NEXT: sw s3, 60(sp)1030; RV64ZVKB-ZVE32X-NEXT: sw a7, 32(sp)1031; RV64ZVKB-ZVE32X-NEXT: sw t5, 36(sp)1032; RV64ZVKB-ZVE32X-NEXT: sw a6, 40(sp)1033; RV64ZVKB-ZVE32X-NEXT: sw t6, 44(sp)1034; RV64ZVKB-ZVE32X-NEXT: sw a5, 16(sp)1035; RV64ZVKB-ZVE32X-NEXT: sw t3, 20(sp)1036; RV64ZVKB-ZVE32X-NEXT: sw a4, 24(sp)1037; RV64ZVKB-ZVE32X-NEXT: sw t4, 28(sp)1038; RV64ZVKB-ZVE32X-NEXT: sw a3, 0(sp)1039; RV64ZVKB-ZVE32X-NEXT: sw t1, 4(sp)1040; RV64ZVKB-ZVE32X-NEXT: sw a2, 8(sp)1041; RV64ZVKB-ZVE32X-NEXT: sw t2, 12(sp)1042; RV64ZVKB-ZVE32X-NEXT: mv a1, sp1043; RV64ZVKB-ZVE32X-NEXT: vsetivli zero, 16, e32, m8, ta, ma1044; RV64ZVKB-ZVE32X-NEXT: vle32.v v8, (a1)1045; RV64ZVKB-ZVE32X-NEXT: vse32.v v8, (a0)1046; RV64ZVKB-ZVE32X-NEXT: addi sp, s0, -1281047; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa sp, 1281048; RV64ZVKB-ZVE32X-NEXT: ld ra, 120(sp) # 8-byte Folded Reload1049; RV64ZVKB-ZVE32X-NEXT: ld s0, 112(sp) # 8-byte Folded Reload1050; RV64ZVKB-ZVE32X-NEXT: ld s2, 104(sp) # 8-byte Folded Reload1051; RV64ZVKB-ZVE32X-NEXT: ld s3, 96(sp) # 8-byte Folded Reload1052; RV64ZVKB-ZVE32X-NEXT: .cfi_restore ra1053; RV64ZVKB-ZVE32X-NEXT: .cfi_restore s01054; RV64ZVKB-ZVE32X-NEXT: .cfi_restore s21055; RV64ZVKB-ZVE32X-NEXT: .cfi_restore s31056; RV64ZVKB-ZVE32X-NEXT: addi sp, sp, 1281057; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 01058; RV64ZVKB-ZVE32X-NEXT: ret1059 %shuffle = shufflevector <8 x i64> %v, <8 x i64> poison, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>1060 ret <8 x i64> %shuffle1061}1062 1063; Test case where first span has undefs1064define <8 x i64> @shuffle_v8i64_as_i128_2(<8 x i64> %v) {1065; CHECK-LABEL: shuffle_v8i64_as_i128_2:1066; CHECK: # %bb.0:1067; CHECK-NEXT: li a0, 1681068; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, mu1069; CHECK-NEXT: vmv.s.x v0, a01070; CHECK-NEXT: vslidedown.vi v12, v8, 11071; CHECK-NEXT: vslideup.vi v12, v8, 1, v0.t1072; CHECK-NEXT: vmv.v.v v8, v121073; CHECK-NEXT: ret1074;1075; ZVKB-V-LABEL: shuffle_v8i64_as_i128_2:1076; ZVKB-V: # %bb.0:1077; ZVKB-V-NEXT: li a0, 1681078; ZVKB-V-NEXT: vsetivli zero, 8, e64, m4, ta, mu1079; ZVKB-V-NEXT: vmv.s.x v0, a01080; ZVKB-V-NEXT: vslidedown.vi v12, v8, 11081; ZVKB-V-NEXT: vslideup.vi v12, v8, 1, v0.t1082; ZVKB-V-NEXT: vmv.v.v v8, v121083; ZVKB-V-NEXT: ret1084;1085; RV32ZVKB-ZVE32X-LABEL: shuffle_v8i64_as_i128_2:1086; RV32ZVKB-ZVE32X: # %bb.0:1087; RV32ZVKB-ZVE32X-NEXT: addi sp, sp, -1281088; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 1281089; RV32ZVKB-ZVE32X-NEXT: sw ra, 124(sp) # 4-byte Folded Spill1090; RV32ZVKB-ZVE32X-NEXT: sw s0, 120(sp) # 4-byte Folded Spill1091; RV32ZVKB-ZVE32X-NEXT: .cfi_offset ra, -41092; RV32ZVKB-ZVE32X-NEXT: .cfi_offset s0, -81093; RV32ZVKB-ZVE32X-NEXT: addi s0, sp, 1281094; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa s0, 01095; RV32ZVKB-ZVE32X-NEXT: andi sp, sp, -641096; RV32ZVKB-ZVE32X-NEXT: lw a2, 16(a1)1097; RV32ZVKB-ZVE32X-NEXT: lw a3, 20(a1)1098; RV32ZVKB-ZVE32X-NEXT: lw a4, 24(a1)1099; RV32ZVKB-ZVE32X-NEXT: lw a5, 28(a1)1100; RV32ZVKB-ZVE32X-NEXT: lw a6, 48(a1)1101; RV32ZVKB-ZVE32X-NEXT: lw a7, 52(a1)1102; RV32ZVKB-ZVE32X-NEXT: lw t0, 56(a1)1103; RV32ZVKB-ZVE32X-NEXT: lw t1, 60(a1)1104; RV32ZVKB-ZVE32X-NEXT: lw t2, 32(a1)1105; RV32ZVKB-ZVE32X-NEXT: lw t3, 36(a1)1106; RV32ZVKB-ZVE32X-NEXT: lw t4, 40(a1)1107; RV32ZVKB-ZVE32X-NEXT: lw a1, 44(a1)1108; RV32ZVKB-ZVE32X-NEXT: sw t0, 48(sp)1109; RV32ZVKB-ZVE32X-NEXT: sw t1, 52(sp)1110; RV32ZVKB-ZVE32X-NEXT: sw a6, 56(sp)1111; RV32ZVKB-ZVE32X-NEXT: sw a7, 60(sp)1112; RV32ZVKB-ZVE32X-NEXT: sw t4, 32(sp)1113; RV32ZVKB-ZVE32X-NEXT: sw a1, 36(sp)1114; RV32ZVKB-ZVE32X-NEXT: sw t2, 40(sp)1115; RV32ZVKB-ZVE32X-NEXT: sw t3, 44(sp)1116; RV32ZVKB-ZVE32X-NEXT: sw a4, 16(sp)1117; RV32ZVKB-ZVE32X-NEXT: sw a5, 20(sp)1118; RV32ZVKB-ZVE32X-NEXT: sw a2, 24(sp)1119; RV32ZVKB-ZVE32X-NEXT: sw a3, 28(sp)1120; RV32ZVKB-ZVE32X-NEXT: mv a1, sp1121; RV32ZVKB-ZVE32X-NEXT: vsetivli zero, 16, e32, m8, ta, ma1122; RV32ZVKB-ZVE32X-NEXT: vle32.v v8, (a1)1123; RV32ZVKB-ZVE32X-NEXT: vse32.v v8, (a0)1124; RV32ZVKB-ZVE32X-NEXT: addi sp, s0, -1281125; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa sp, 1281126; RV32ZVKB-ZVE32X-NEXT: lw ra, 124(sp) # 4-byte Folded Reload1127; RV32ZVKB-ZVE32X-NEXT: lw s0, 120(sp) # 4-byte Folded Reload1128; RV32ZVKB-ZVE32X-NEXT: .cfi_restore ra1129; RV32ZVKB-ZVE32X-NEXT: .cfi_restore s01130; RV32ZVKB-ZVE32X-NEXT: addi sp, sp, 1281131; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 01132; RV32ZVKB-ZVE32X-NEXT: ret1133;1134; RV64ZVKB-ZVE32X-LABEL: shuffle_v8i64_as_i128_2:1135; RV64ZVKB-ZVE32X: # %bb.0:1136; RV64ZVKB-ZVE32X-NEXT: addi sp, sp, -1281137; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 1281138; RV64ZVKB-ZVE32X-NEXT: sd ra, 120(sp) # 8-byte Folded Spill1139; RV64ZVKB-ZVE32X-NEXT: sd s0, 112(sp) # 8-byte Folded Spill1140; RV64ZVKB-ZVE32X-NEXT: .cfi_offset ra, -81141; RV64ZVKB-ZVE32X-NEXT: .cfi_offset s0, -161142; RV64ZVKB-ZVE32X-NEXT: addi s0, sp, 1281143; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa s0, 01144; RV64ZVKB-ZVE32X-NEXT: andi sp, sp, -641145; RV64ZVKB-ZVE32X-NEXT: ld a2, 16(a1)1146; RV64ZVKB-ZVE32X-NEXT: ld a3, 24(a1)1147; RV64ZVKB-ZVE32X-NEXT: ld a4, 32(a1)1148; RV64ZVKB-ZVE32X-NEXT: ld a5, 40(a1)1149; RV64ZVKB-ZVE32X-NEXT: ld a6, 48(a1)1150; RV64ZVKB-ZVE32X-NEXT: ld a1, 56(a1)1151; RV64ZVKB-ZVE32X-NEXT: srli a7, a3, 321152; RV64ZVKB-ZVE32X-NEXT: srli t0, a2, 321153; RV64ZVKB-ZVE32X-NEXT: srli t1, a5, 321154; RV64ZVKB-ZVE32X-NEXT: srli t2, a4, 321155; RV64ZVKB-ZVE32X-NEXT: srli t3, a1, 321156; RV64ZVKB-ZVE32X-NEXT: srli t4, a6, 321157; RV64ZVKB-ZVE32X-NEXT: sw a1, 48(sp)1158; RV64ZVKB-ZVE32X-NEXT: sw t3, 52(sp)1159; RV64ZVKB-ZVE32X-NEXT: sw a6, 56(sp)1160; RV64ZVKB-ZVE32X-NEXT: sw t4, 60(sp)1161; RV64ZVKB-ZVE32X-NEXT: sw a5, 32(sp)1162; RV64ZVKB-ZVE32X-NEXT: sw t1, 36(sp)1163; RV64ZVKB-ZVE32X-NEXT: sw a4, 40(sp)1164; RV64ZVKB-ZVE32X-NEXT: sw t2, 44(sp)1165; RV64ZVKB-ZVE32X-NEXT: sw a3, 16(sp)1166; RV64ZVKB-ZVE32X-NEXT: sw a7, 20(sp)1167; RV64ZVKB-ZVE32X-NEXT: sw a2, 24(sp)1168; RV64ZVKB-ZVE32X-NEXT: sw t0, 28(sp)1169; RV64ZVKB-ZVE32X-NEXT: mv a1, sp1170; RV64ZVKB-ZVE32X-NEXT: vsetivli zero, 16, e32, m8, ta, ma1171; RV64ZVKB-ZVE32X-NEXT: vle32.v v8, (a1)1172; RV64ZVKB-ZVE32X-NEXT: vse32.v v8, (a0)1173; RV64ZVKB-ZVE32X-NEXT: addi sp, s0, -1281174; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa sp, 1281175; RV64ZVKB-ZVE32X-NEXT: ld ra, 120(sp) # 8-byte Folded Reload1176; RV64ZVKB-ZVE32X-NEXT: ld s0, 112(sp) # 8-byte Folded Reload1177; RV64ZVKB-ZVE32X-NEXT: .cfi_restore ra1178; RV64ZVKB-ZVE32X-NEXT: .cfi_restore s01179; RV64ZVKB-ZVE32X-NEXT: addi sp, sp, 1281180; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 01181; RV64ZVKB-ZVE32X-NEXT: ret1182 %shuffle = shufflevector <8 x i64> %v, <8 x i64> poison, <8 x i32> <i32 poison, i32 poison, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>1183 ret <8 x i64> %shuffle1184}1185 1186define <8 x i64> @shuffle_v8i64_as_i256(<8 x i64> %v) {1187; CHECK-LABEL: shuffle_v8i64_as_i256:1188; CHECK: # %bb.0:1189; CHECK-NEXT: lui a0, %hi(.LCPI31_0)1190; CHECK-NEXT: addi a0, a0, %lo(.LCPI31_0)1191; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma1192; CHECK-NEXT: vle16.v v16, (a0)1193; CHECK-NEXT: vrgatherei16.vv v12, v8, v161194; CHECK-NEXT: vmv.v.v v8, v121195; CHECK-NEXT: ret1196;1197; ZVKB-V-LABEL: shuffle_v8i64_as_i256:1198; ZVKB-V: # %bb.0:1199; ZVKB-V-NEXT: lui a0, %hi(.LCPI31_0)1200; ZVKB-V-NEXT: addi a0, a0, %lo(.LCPI31_0)1201; ZVKB-V-NEXT: vsetivli zero, 8, e64, m4, ta, ma1202; ZVKB-V-NEXT: vle16.v v16, (a0)1203; ZVKB-V-NEXT: vrgatherei16.vv v12, v8, v161204; ZVKB-V-NEXT: vmv.v.v v8, v121205; ZVKB-V-NEXT: ret1206;1207; RV32ZVKB-ZVE32X-LABEL: shuffle_v8i64_as_i256:1208; RV32ZVKB-ZVE32X: # %bb.0:1209; RV32ZVKB-ZVE32X-NEXT: addi sp, sp, -1281210; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 1281211; RV32ZVKB-ZVE32X-NEXT: sw ra, 124(sp) # 4-byte Folded Spill1212; RV32ZVKB-ZVE32X-NEXT: sw s0, 120(sp) # 4-byte Folded Spill1213; RV32ZVKB-ZVE32X-NEXT: sw s2, 116(sp) # 4-byte Folded Spill1214; RV32ZVKB-ZVE32X-NEXT: sw s3, 112(sp) # 4-byte Folded Spill1215; RV32ZVKB-ZVE32X-NEXT: .cfi_offset ra, -41216; RV32ZVKB-ZVE32X-NEXT: .cfi_offset s0, -81217; RV32ZVKB-ZVE32X-NEXT: .cfi_offset s2, -121218; RV32ZVKB-ZVE32X-NEXT: .cfi_offset s3, -161219; RV32ZVKB-ZVE32X-NEXT: addi s0, sp, 1281220; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa s0, 01221; RV32ZVKB-ZVE32X-NEXT: andi sp, sp, -641222; RV32ZVKB-ZVE32X-NEXT: lw a2, 0(a1)1223; RV32ZVKB-ZVE32X-NEXT: lw a3, 4(a1)1224; RV32ZVKB-ZVE32X-NEXT: lw a4, 8(a1)1225; RV32ZVKB-ZVE32X-NEXT: lw a5, 12(a1)1226; RV32ZVKB-ZVE32X-NEXT: lw a6, 16(a1)1227; RV32ZVKB-ZVE32X-NEXT: lw a7, 20(a1)1228; RV32ZVKB-ZVE32X-NEXT: lw t0, 24(a1)1229; RV32ZVKB-ZVE32X-NEXT: lw t1, 28(a1)1230; RV32ZVKB-ZVE32X-NEXT: lw t2, 32(a1)1231; RV32ZVKB-ZVE32X-NEXT: lw t3, 36(a1)1232; RV32ZVKB-ZVE32X-NEXT: lw t4, 40(a1)1233; RV32ZVKB-ZVE32X-NEXT: lw t5, 44(a1)1234; RV32ZVKB-ZVE32X-NEXT: lw t6, 48(a1)1235; RV32ZVKB-ZVE32X-NEXT: lw s2, 52(a1)1236; RV32ZVKB-ZVE32X-NEXT: lw s3, 56(a1)1237; RV32ZVKB-ZVE32X-NEXT: lw a1, 60(a1)1238; RV32ZVKB-ZVE32X-NEXT: sw t2, 48(sp)1239; RV32ZVKB-ZVE32X-NEXT: sw t3, 52(sp)1240; RV32ZVKB-ZVE32X-NEXT: sw s3, 56(sp)1241; RV32ZVKB-ZVE32X-NEXT: sw a1, 60(sp)1242; RV32ZVKB-ZVE32X-NEXT: sw t6, 32(sp)1243; RV32ZVKB-ZVE32X-NEXT: sw s2, 36(sp)1244; RV32ZVKB-ZVE32X-NEXT: sw t4, 40(sp)1245; RV32ZVKB-ZVE32X-NEXT: sw t5, 44(sp)1246; RV32ZVKB-ZVE32X-NEXT: sw a2, 16(sp)1247; RV32ZVKB-ZVE32X-NEXT: sw a3, 20(sp)1248; RV32ZVKB-ZVE32X-NEXT: sw t0, 24(sp)1249; RV32ZVKB-ZVE32X-NEXT: sw t1, 28(sp)1250; RV32ZVKB-ZVE32X-NEXT: sw a6, 0(sp)1251; RV32ZVKB-ZVE32X-NEXT: sw a7, 4(sp)1252; RV32ZVKB-ZVE32X-NEXT: sw a4, 8(sp)1253; RV32ZVKB-ZVE32X-NEXT: sw a5, 12(sp)1254; RV32ZVKB-ZVE32X-NEXT: mv a1, sp1255; RV32ZVKB-ZVE32X-NEXT: vsetivli zero, 16, e32, m8, ta, ma1256; RV32ZVKB-ZVE32X-NEXT: vle32.v v8, (a1)1257; RV32ZVKB-ZVE32X-NEXT: vse32.v v8, (a0)1258; RV32ZVKB-ZVE32X-NEXT: addi sp, s0, -1281259; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa sp, 1281260; RV32ZVKB-ZVE32X-NEXT: lw ra, 124(sp) # 4-byte Folded Reload1261; RV32ZVKB-ZVE32X-NEXT: lw s0, 120(sp) # 4-byte Folded Reload1262; RV32ZVKB-ZVE32X-NEXT: lw s2, 116(sp) # 4-byte Folded Reload1263; RV32ZVKB-ZVE32X-NEXT: lw s3, 112(sp) # 4-byte Folded Reload1264; RV32ZVKB-ZVE32X-NEXT: .cfi_restore ra1265; RV32ZVKB-ZVE32X-NEXT: .cfi_restore s01266; RV32ZVKB-ZVE32X-NEXT: .cfi_restore s21267; RV32ZVKB-ZVE32X-NEXT: .cfi_restore s31268; RV32ZVKB-ZVE32X-NEXT: addi sp, sp, 1281269; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 01270; RV32ZVKB-ZVE32X-NEXT: ret1271;1272; RV64ZVKB-ZVE32X-LABEL: shuffle_v8i64_as_i256:1273; RV64ZVKB-ZVE32X: # %bb.0:1274; RV64ZVKB-ZVE32X-NEXT: addi sp, sp, -1281275; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 1281276; RV64ZVKB-ZVE32X-NEXT: sd ra, 120(sp) # 8-byte Folded Spill1277; RV64ZVKB-ZVE32X-NEXT: sd s0, 112(sp) # 8-byte Folded Spill1278; RV64ZVKB-ZVE32X-NEXT: sd s2, 104(sp) # 8-byte Folded Spill1279; RV64ZVKB-ZVE32X-NEXT: sd s3, 96(sp) # 8-byte Folded Spill1280; RV64ZVKB-ZVE32X-NEXT: .cfi_offset ra, -81281; RV64ZVKB-ZVE32X-NEXT: .cfi_offset s0, -161282; RV64ZVKB-ZVE32X-NEXT: .cfi_offset s2, -241283; RV64ZVKB-ZVE32X-NEXT: .cfi_offset s3, -321284; RV64ZVKB-ZVE32X-NEXT: addi s0, sp, 1281285; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa s0, 01286; RV64ZVKB-ZVE32X-NEXT: andi sp, sp, -641287; RV64ZVKB-ZVE32X-NEXT: ld a2, 0(a1)1288; RV64ZVKB-ZVE32X-NEXT: ld a3, 8(a1)1289; RV64ZVKB-ZVE32X-NEXT: ld a4, 16(a1)1290; RV64ZVKB-ZVE32X-NEXT: ld a5, 24(a1)1291; RV64ZVKB-ZVE32X-NEXT: ld a6, 32(a1)1292; RV64ZVKB-ZVE32X-NEXT: ld a7, 40(a1)1293; RV64ZVKB-ZVE32X-NEXT: ld t0, 48(a1)1294; RV64ZVKB-ZVE32X-NEXT: ld a1, 56(a1)1295; RV64ZVKB-ZVE32X-NEXT: srli t1, a4, 321296; RV64ZVKB-ZVE32X-NEXT: srli t2, a3, 321297; RV64ZVKB-ZVE32X-NEXT: srli t3, a2, 321298; RV64ZVKB-ZVE32X-NEXT: srli t4, a5, 321299; RV64ZVKB-ZVE32X-NEXT: srli t5, t0, 321300; RV64ZVKB-ZVE32X-NEXT: srli t6, a7, 321301; RV64ZVKB-ZVE32X-NEXT: srli s2, a6, 321302; RV64ZVKB-ZVE32X-NEXT: srli s3, a1, 321303; RV64ZVKB-ZVE32X-NEXT: sw a6, 48(sp)1304; RV64ZVKB-ZVE32X-NEXT: sw s2, 52(sp)1305; RV64ZVKB-ZVE32X-NEXT: sw a1, 56(sp)1306; RV64ZVKB-ZVE32X-NEXT: sw s3, 60(sp)1307; RV64ZVKB-ZVE32X-NEXT: sw t0, 32(sp)1308; RV64ZVKB-ZVE32X-NEXT: sw t5, 36(sp)1309; RV64ZVKB-ZVE32X-NEXT: sw a7, 40(sp)1310; RV64ZVKB-ZVE32X-NEXT: sw t6, 44(sp)1311; RV64ZVKB-ZVE32X-NEXT: sw a2, 16(sp)1312; RV64ZVKB-ZVE32X-NEXT: sw t3, 20(sp)1313; RV64ZVKB-ZVE32X-NEXT: sw a5, 24(sp)1314; RV64ZVKB-ZVE32X-NEXT: sw t4, 28(sp)1315; RV64ZVKB-ZVE32X-NEXT: sw a4, 0(sp)1316; RV64ZVKB-ZVE32X-NEXT: sw t1, 4(sp)1317; RV64ZVKB-ZVE32X-NEXT: sw a3, 8(sp)1318; RV64ZVKB-ZVE32X-NEXT: sw t2, 12(sp)1319; RV64ZVKB-ZVE32X-NEXT: mv a1, sp1320; RV64ZVKB-ZVE32X-NEXT: vsetivli zero, 16, e32, m8, ta, ma1321; RV64ZVKB-ZVE32X-NEXT: vle32.v v8, (a1)1322; RV64ZVKB-ZVE32X-NEXT: vse32.v v8, (a0)1323; RV64ZVKB-ZVE32X-NEXT: addi sp, s0, -1281324; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa sp, 1281325; RV64ZVKB-ZVE32X-NEXT: ld ra, 120(sp) # 8-byte Folded Reload1326; RV64ZVKB-ZVE32X-NEXT: ld s0, 112(sp) # 8-byte Folded Reload1327; RV64ZVKB-ZVE32X-NEXT: ld s2, 104(sp) # 8-byte Folded Reload1328; RV64ZVKB-ZVE32X-NEXT: ld s3, 96(sp) # 8-byte Folded Reload1329; RV64ZVKB-ZVE32X-NEXT: .cfi_restore ra1330; RV64ZVKB-ZVE32X-NEXT: .cfi_restore s01331; RV64ZVKB-ZVE32X-NEXT: .cfi_restore s21332; RV64ZVKB-ZVE32X-NEXT: .cfi_restore s31333; RV64ZVKB-ZVE32X-NEXT: addi sp, sp, 1281334; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 01335; RV64ZVKB-ZVE32X-NEXT: ret1336 %shuffle = shufflevector <8 x i64> %v, <8 x i64> poison, <8 x i32> <i32 2, i32 1, i32 0, i32 3, i32 6, i32 5, i32 4, i32 7>1337 ret <8 x i64> %shuffle1338}1339 1340define <8 x i64> @shuffle_v8i64_as_i256_zvl256b(<8 x i64> %v) vscale_range(4,0) {1341; CHECK-LABEL: shuffle_v8i64_as_i256_zvl256b:1342; CHECK: # %bb.0:1343; CHECK-NEXT: lui a0, %hi(.LCPI32_0)1344; CHECK-NEXT: addi a0, a0, %lo(.LCPI32_0)1345; CHECK-NEXT: vsetivli zero, 8, e16, mf2, ta, ma1346; CHECK-NEXT: vle16.v v12, (a0)1347; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma1348; CHECK-NEXT: vrgatherei16.vv v11, v9, v121349; CHECK-NEXT: vrgatherei16.vv v10, v8, v121350; CHECK-NEXT: vmv2r.v v8, v101351; CHECK-NEXT: ret1352;1353; ZVKB-V-LABEL: shuffle_v8i64_as_i256_zvl256b:1354; ZVKB-V: # %bb.0:1355; ZVKB-V-NEXT: lui a0, %hi(.LCPI32_0)1356; ZVKB-V-NEXT: addi a0, a0, %lo(.LCPI32_0)1357; ZVKB-V-NEXT: vsetivli zero, 8, e16, mf2, ta, ma1358; ZVKB-V-NEXT: vle16.v v12, (a0)1359; ZVKB-V-NEXT: vsetvli a0, zero, e64, m1, ta, ma1360; ZVKB-V-NEXT: vrgatherei16.vv v11, v9, v121361; ZVKB-V-NEXT: vrgatherei16.vv v10, v8, v121362; ZVKB-V-NEXT: vmv2r.v v8, v101363; ZVKB-V-NEXT: ret1364;1365; RV32ZVKB-ZVE32X-LABEL: shuffle_v8i64_as_i256_zvl256b:1366; RV32ZVKB-ZVE32X: # %bb.0:1367; RV32ZVKB-ZVE32X-NEXT: addi sp, sp, -161368; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 161369; RV32ZVKB-ZVE32X-NEXT: sw s0, 12(sp) # 4-byte Folded Spill1370; RV32ZVKB-ZVE32X-NEXT: sw s1, 8(sp) # 4-byte Folded Spill1371; RV32ZVKB-ZVE32X-NEXT: .cfi_offset s0, -41372; RV32ZVKB-ZVE32X-NEXT: .cfi_offset s1, -81373; RV32ZVKB-ZVE32X-NEXT: lw a2, 48(a1)1374; RV32ZVKB-ZVE32X-NEXT: lw a3, 52(a1)1375; RV32ZVKB-ZVE32X-NEXT: lw a4, 56(a1)1376; RV32ZVKB-ZVE32X-NEXT: lw a5, 60(a1)1377; RV32ZVKB-ZVE32X-NEXT: lw a6, 32(a1)1378; RV32ZVKB-ZVE32X-NEXT: lw a7, 36(a1)1379; RV32ZVKB-ZVE32X-NEXT: lw t0, 40(a1)1380; RV32ZVKB-ZVE32X-NEXT: lw t1, 44(a1)1381; RV32ZVKB-ZVE32X-NEXT: lw t2, 16(a1)1382; RV32ZVKB-ZVE32X-NEXT: lw t3, 20(a1)1383; RV32ZVKB-ZVE32X-NEXT: lw t4, 24(a1)1384; RV32ZVKB-ZVE32X-NEXT: lw t5, 28(a1)1385; RV32ZVKB-ZVE32X-NEXT: lw t6, 0(a1)1386; RV32ZVKB-ZVE32X-NEXT: lw s0, 4(a1)1387; RV32ZVKB-ZVE32X-NEXT: lw s1, 8(a1)1388; RV32ZVKB-ZVE32X-NEXT: lw a1, 12(a1)1389; RV32ZVKB-ZVE32X-NEXT: vsetivli zero, 16, e32, m2, ta, ma1390; RV32ZVKB-ZVE32X-NEXT: vmv.v.x v8, t21391; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, t31392; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, s11393; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a11394; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, t61395; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, s01396; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, t41397; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, t51398; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a21399; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a31400; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, t01401; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, t11402; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a61403; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a71404; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a41405; RV32ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a51406; RV32ZVKB-ZVE32X-NEXT: vse32.v v8, (a0)1407; RV32ZVKB-ZVE32X-NEXT: lw s0, 12(sp) # 4-byte Folded Reload1408; RV32ZVKB-ZVE32X-NEXT: lw s1, 8(sp) # 4-byte Folded Reload1409; RV32ZVKB-ZVE32X-NEXT: .cfi_restore s01410; RV32ZVKB-ZVE32X-NEXT: .cfi_restore s11411; RV32ZVKB-ZVE32X-NEXT: addi sp, sp, 161412; RV32ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 01413; RV32ZVKB-ZVE32X-NEXT: ret1414;1415; RV64ZVKB-ZVE32X-LABEL: shuffle_v8i64_as_i256_zvl256b:1416; RV64ZVKB-ZVE32X: # %bb.0:1417; RV64ZVKB-ZVE32X-NEXT: addi sp, sp, -161418; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 161419; RV64ZVKB-ZVE32X-NEXT: sd s0, 8(sp) # 8-byte Folded Spill1420; RV64ZVKB-ZVE32X-NEXT: sd s1, 0(sp) # 8-byte Folded Spill1421; RV64ZVKB-ZVE32X-NEXT: .cfi_offset s0, -81422; RV64ZVKB-ZVE32X-NEXT: .cfi_offset s1, -161423; RV64ZVKB-ZVE32X-NEXT: ld a2, 32(a1)1424; RV64ZVKB-ZVE32X-NEXT: ld a3, 40(a1)1425; RV64ZVKB-ZVE32X-NEXT: ld a4, 48(a1)1426; RV64ZVKB-ZVE32X-NEXT: ld a5, 56(a1)1427; RV64ZVKB-ZVE32X-NEXT: ld a6, 0(a1)1428; RV64ZVKB-ZVE32X-NEXT: ld a7, 8(a1)1429; RV64ZVKB-ZVE32X-NEXT: ld t0, 16(a1)1430; RV64ZVKB-ZVE32X-NEXT: ld a1, 24(a1)1431; RV64ZVKB-ZVE32X-NEXT: srli t1, a5, 321432; RV64ZVKB-ZVE32X-NEXT: srli t2, a2, 321433; RV64ZVKB-ZVE32X-NEXT: srli t3, a3, 321434; RV64ZVKB-ZVE32X-NEXT: srli t4, a4, 321435; RV64ZVKB-ZVE32X-NEXT: srli t5, a1, 321436; RV64ZVKB-ZVE32X-NEXT: srli t6, a6, 321437; RV64ZVKB-ZVE32X-NEXT: srli s0, a7, 321438; RV64ZVKB-ZVE32X-NEXT: srli s1, t0, 321439; RV64ZVKB-ZVE32X-NEXT: vsetivli zero, 16, e32, m2, ta, ma1440; RV64ZVKB-ZVE32X-NEXT: vmv.v.x v8, t01441; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, s11442; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a71443; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, s01444; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a61445; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, t61446; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a11447; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, t51448; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a41449; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, t41450; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a31451; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, t31452; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a21453; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, t21454; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, a51455; RV64ZVKB-ZVE32X-NEXT: vslide1down.vx v8, v8, t11456; RV64ZVKB-ZVE32X-NEXT: vse32.v v8, (a0)1457; RV64ZVKB-ZVE32X-NEXT: ld s0, 8(sp) # 8-byte Folded Reload1458; RV64ZVKB-ZVE32X-NEXT: ld s1, 0(sp) # 8-byte Folded Reload1459; RV64ZVKB-ZVE32X-NEXT: .cfi_restore s01460; RV64ZVKB-ZVE32X-NEXT: .cfi_restore s11461; RV64ZVKB-ZVE32X-NEXT: addi sp, sp, 161462; RV64ZVKB-ZVE32X-NEXT: .cfi_def_cfa_offset 01463; RV64ZVKB-ZVE32X-NEXT: ret1464 %shuffle = shufflevector <8 x i64> %v, <8 x i64> poison, <8 x i32> <i32 2, i32 1, i32 0, i32 3, i32 6, i32 5, i32 4, i32 7>1465 ret <8 x i64> %shuffle1466}1467