293 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+f,+d,+zvfh -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV323; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+f,+d,+zvfh -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV644 5target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"6 7define <8 x i8> @trn1.v8i8(<8 x i8> %v0, <8 x i8> %v1) {8; CHECK-LABEL: trn1.v8i8:9; CHECK: # %bb.0:10; CHECK-NEXT: li a0, 17011; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu12; CHECK-NEXT: vmv.s.x v0, a013; CHECK-NEXT: vslideup.vi v8, v9, 1, v0.t14; CHECK-NEXT: ret15 %tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>16 ret <8 x i8> %tmp017}18 19define <8 x i8> @trn2.v8i8(<8 x i8> %v0, <8 x i8> %v1) {20; CHECK-LABEL: trn2.v8i8:21; CHECK: # %bb.0:22; CHECK-NEXT: li a0, 8523; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu24; CHECK-NEXT: vmv.s.x v0, a025; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t26; CHECK-NEXT: vmv1r.v v8, v927; CHECK-NEXT: ret28 %tmp0 = shufflevector <8 x i8> %v0, <8 x i8> %v1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>29 ret <8 x i8> %tmp030}31 32define <16 x i8> @trn1.v16i8(<16 x i8> %v0, <16 x i8> %v1) {33; CHECK-LABEL: trn1.v16i8:34; CHECK: # %bb.0:35; CHECK-NEXT: lui a0, 1136; CHECK-NEXT: addi a0, a0, -136637; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, ma38; CHECK-NEXT: vmv.s.x v0, a039; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, mu40; CHECK-NEXT: vslideup.vi v8, v9, 1, v0.t41; CHECK-NEXT: ret42 %tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>43 ret <16 x i8> %tmp044}45 46define <16 x i8> @trn2.v16i8(<16 x i8> %v0, <16 x i8> %v1) {47; CHECK-LABEL: trn2.v16i8:48; CHECK: # %bb.0:49; CHECK-NEXT: lui a0, 550; CHECK-NEXT: addi a0, a0, 136551; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, ma52; CHECK-NEXT: vmv.s.x v0, a053; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, mu54; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t55; CHECK-NEXT: vmv.v.v v8, v956; CHECK-NEXT: ret57 %tmp0 = shufflevector <16 x i8> %v0, <16 x i8> %v1, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>58 ret <16 x i8> %tmp059}60 61define <4 x i16> @trn1.v4i16(<4 x i16> %v0, <4 x i16> %v1) {62; CHECK-LABEL: trn1.v4i16:63; CHECK: # %bb.0:64; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu65; CHECK-NEXT: vmv.v.i v0, 1066; CHECK-NEXT: vslideup.vi v8, v9, 1, v0.t67; CHECK-NEXT: ret68 %tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>69 ret <4 x i16> %tmp070}71 72define <4 x i16> @trn2.v4i16(<4 x i16> %v0, <4 x i16> %v1) {73; CHECK-LABEL: trn2.v4i16:74; CHECK: # %bb.0:75; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu76; CHECK-NEXT: vmv.v.i v0, 577; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t78; CHECK-NEXT: vmv1r.v v8, v979; CHECK-NEXT: ret80 %tmp0 = shufflevector <4 x i16> %v0, <4 x i16> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>81 ret <4 x i16> %tmp082}83 84define <8 x i16> @trn1.v8i16(<8 x i16> %v0, <8 x i16> %v1) {85; CHECK-LABEL: trn1.v8i16:86; CHECK: # %bb.0:87; CHECK-NEXT: li a0, 17088; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu89; CHECK-NEXT: vmv.s.x v0, a090; CHECK-NEXT: vslideup.vi v8, v9, 1, v0.t91; CHECK-NEXT: ret92 %tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>93 ret <8 x i16> %tmp094}95 96define <8 x i16> @trn2.v8i16(<8 x i16> %v0, <8 x i16> %v1) {97; CHECK-LABEL: trn2.v8i16:98; CHECK: # %bb.0:99; CHECK-NEXT: li a0, 85100; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu101; CHECK-NEXT: vmv.s.x v0, a0102; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t103; CHECK-NEXT: vmv.v.v v8, v9104; CHECK-NEXT: ret105 %tmp0 = shufflevector <8 x i16> %v0, <8 x i16> %v1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>106 ret <8 x i16> %tmp0107}108 109define <2 x i32> @trn1.v2i32(<2 x i32> %v0, <2 x i32> %v1) {110; CHECK-LABEL: trn1.v2i32:111; CHECK: # %bb.0:112; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma113; CHECK-NEXT: vslideup.vi v8, v9, 1114; CHECK-NEXT: ret115 %tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> <i32 0, i32 2>116 ret <2 x i32> %tmp0117}118 119define <2 x i32> @trn2.v2i32(<2 x i32> %v0, <2 x i32> %v1) {120; CHECK-LABEL: trn2.v2i32:121; CHECK: # %bb.0:122; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu123; CHECK-NEXT: vmv.v.i v0, 1124; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t125; CHECK-NEXT: vmv1r.v v8, v9126; CHECK-NEXT: ret127 %tmp0 = shufflevector <2 x i32> %v0, <2 x i32> %v1, <2 x i32> <i32 1, i32 3>128 ret <2 x i32> %tmp0129}130 131define <4 x i32> @trn1.v4i32(<4 x i32> %v0, <4 x i32> %v1) {132; CHECK-LABEL: trn1.v4i32:133; CHECK: # %bb.0:134; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu135; CHECK-NEXT: vmv.v.i v0, 10136; CHECK-NEXT: vslideup.vi v8, v9, 1, v0.t137; CHECK-NEXT: ret138 %tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>139 ret <4 x i32> %tmp0140}141 142define <4 x i32> @trn2.v4i32(<4 x i32> %v0, <4 x i32> %v1) {143; CHECK-LABEL: trn2.v4i32:144; CHECK: # %bb.0:145; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu146; CHECK-NEXT: vmv.v.i v0, 5147; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t148; CHECK-NEXT: vmv.v.v v8, v9149; CHECK-NEXT: ret150 %tmp0 = shufflevector <4 x i32> %v0, <4 x i32> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>151 ret <4 x i32> %tmp0152}153 154define <2 x i64> @trn1.v2i64(<2 x i64> %v0, <2 x i64> %v1) {155; CHECK-LABEL: trn1.v2i64:156; CHECK: # %bb.0:157; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma158; CHECK-NEXT: vslideup.vi v8, v9, 1159; CHECK-NEXT: ret160 %tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> <i32 0, i32 2>161 ret <2 x i64> %tmp0162}163 164define <2 x i64> @trn2.v2i64(<2 x i64> %v0, <2 x i64> %v1) {165; CHECK-LABEL: trn2.v2i64:166; CHECK: # %bb.0:167; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, mu168; CHECK-NEXT: vmv.v.i v0, 1169; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t170; CHECK-NEXT: vmv.v.v v8, v9171; CHECK-NEXT: ret172 %tmp0 = shufflevector <2 x i64> %v0, <2 x i64> %v1, <2 x i32> <i32 1, i32 3>173 ret <2 x i64> %tmp0174}175 176define <2 x float> @trn1.v2f32(<2 x float> %v0, <2 x float> %v1) {177; CHECK-LABEL: trn1.v2f32:178; CHECK: # %bb.0:179; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma180; CHECK-NEXT: vslideup.vi v8, v9, 1181; CHECK-NEXT: ret182 %tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> <i32 0, i32 2>183 ret <2 x float> %tmp0184}185 186define <2 x float> @trn2.v2f32(<2 x float> %v0, <2 x float> %v1) {187; CHECK-LABEL: trn2.v2f32:188; CHECK: # %bb.0:189; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu190; CHECK-NEXT: vmv.v.i v0, 1191; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t192; CHECK-NEXT: vmv1r.v v8, v9193; CHECK-NEXT: ret194 %tmp0 = shufflevector <2 x float> %v0, <2 x float> %v1, <2 x i32> <i32 1, i32 3>195 ret <2 x float> %tmp0196}197 198define <4 x float> @trn1.v4f32(<4 x float> %v0, <4 x float> %v1) {199; CHECK-LABEL: trn1.v4f32:200; CHECK: # %bb.0:201; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu202; CHECK-NEXT: vmv.v.i v0, 10203; CHECK-NEXT: vslideup.vi v8, v9, 1, v0.t204; CHECK-NEXT: ret205 %tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>206 ret <4 x float> %tmp0207}208 209define <4 x float> @trn2.v4f32(<4 x float> %v0, <4 x float> %v1) {210; CHECK-LABEL: trn2.v4f32:211; CHECK: # %bb.0:212; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu213; CHECK-NEXT: vmv.v.i v0, 5214; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t215; CHECK-NEXT: vmv.v.v v8, v9216; CHECK-NEXT: ret217 %tmp0 = shufflevector <4 x float> %v0, <4 x float> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>218 ret <4 x float> %tmp0219}220 221define <2 x double> @trn1.v2f64(<2 x double> %v0, <2 x double> %v1) {222; CHECK-LABEL: trn1.v2f64:223; CHECK: # %bb.0:224; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma225; CHECK-NEXT: vslideup.vi v8, v9, 1226; CHECK-NEXT: ret227 %tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> <i32 0, i32 2>228 ret <2 x double> %tmp0229}230 231define <2 x double> @trn2.v2f64(<2 x double> %v0, <2 x double> %v1) {232; CHECK-LABEL: trn2.v2f64:233; CHECK: # %bb.0:234; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, mu235; CHECK-NEXT: vmv.v.i v0, 1236; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t237; CHECK-NEXT: vmv.v.v v8, v9238; CHECK-NEXT: ret239 %tmp0 = shufflevector <2 x double> %v0, <2 x double> %v1, <2 x i32> <i32 1, i32 3>240 ret <2 x double> %tmp0241}242 243define <4 x half> @trn1.v4f16(<4 x half> %v0, <4 x half> %v1) {244; CHECK-LABEL: trn1.v4f16:245; CHECK: # %bb.0:246; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu247; CHECK-NEXT: vmv.v.i v0, 10248; CHECK-NEXT: vslideup.vi v8, v9, 1, v0.t249; CHECK-NEXT: ret250 %tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> <i32 0, i32 4, i32 2, i32 6>251 ret <4 x half> %tmp0252}253 254define <4 x half> @trn2.v4f16(<4 x half> %v0, <4 x half> %v1) {255; CHECK-LABEL: trn2.v4f16:256; CHECK: # %bb.0:257; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu258; CHECK-NEXT: vmv.v.i v0, 5259; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t260; CHECK-NEXT: vmv1r.v v8, v9261; CHECK-NEXT: ret262 %tmp0 = shufflevector <4 x half> %v0, <4 x half> %v1, <4 x i32> <i32 1, i32 5, i32 3, i32 7>263 ret <4 x half> %tmp0264}265 266define <8 x half> @trn1.v8f16(<8 x half> %v0, <8 x half> %v1) {267; CHECK-LABEL: trn1.v8f16:268; CHECK: # %bb.0:269; CHECK-NEXT: li a0, 170270; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu271; CHECK-NEXT: vmv.s.x v0, a0272; CHECK-NEXT: vslideup.vi v8, v9, 1, v0.t273; CHECK-NEXT: ret274 %tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>275 ret <8 x half> %tmp0276}277 278define <8 x half> @trn2.v8f16(<8 x half> %v0, <8 x half> %v1) {279; CHECK-LABEL: trn2.v8f16:280; CHECK: # %bb.0:281; CHECK-NEXT: li a0, 85282; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu283; CHECK-NEXT: vmv.s.x v0, a0284; CHECK-NEXT: vslidedown.vi v9, v8, 1, v0.t285; CHECK-NEXT: vmv.v.v v8, v9286; CHECK-NEXT: ret287 %tmp0 = shufflevector <8 x half> %v0, <8 x half> %v1, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>288 ret <8 x half> %tmp0289}290;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:291; RV32: {{.*}}292; RV64: {{.*}}293