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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+m,+d,+v,+zvfh,+zvfbfmin \3; RUN: -verify-machineinstrs < %s \4; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV325; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+v,+zvfh,+zvfbfmin \6; RUN: -verify-machineinstrs < %s \7; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV648; RUN: llc -mtriple=riscv32 -mattr=+m,+d,+v,+zvfhmin,+zvfbfmin \9; RUN: -verify-machineinstrs < %s \10; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV3211; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+v,+zvfhmin,+zvfbfmin \12; RUN: -verify-machineinstrs < %s \13; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV6414 15define void @strided_vpstore_v2i8_i8(<2 x i8> %val, ptr %ptr, i8 signext %stride, <2 x i1> %m, i32 zeroext %evl) {16; CHECK-LABEL: strided_vpstore_v2i8_i8:17; CHECK: # %bb.0:18; CHECK-NEXT: vsetvli zero, a2, e8, mf8, ta, ma19; CHECK-NEXT: vsse8.v v8, (a0), a1, v0.t20; CHECK-NEXT: ret21 call void @llvm.experimental.vp.strided.store.v2i8.p0.i8(<2 x i8> %val, ptr %ptr, i8 %stride, <2 x i1> %m, i32 %evl)22 ret void23}24 25define void @strided_vpstore_v2i8_i16(<2 x i8> %val, ptr %ptr, i16 signext %stride, <2 x i1> %m, i32 zeroext %evl) {26; CHECK-LABEL: strided_vpstore_v2i8_i16:27; CHECK: # %bb.0:28; CHECK-NEXT: vsetvli zero, a2, e8, mf8, ta, ma29; CHECK-NEXT: vsse8.v v8, (a0), a1, v0.t30; CHECK-NEXT: ret31 call void @llvm.experimental.vp.strided.store.v2i8.p0.i16(<2 x i8> %val, ptr %ptr, i16 %stride, <2 x i1> %m, i32 %evl)32 ret void33}34 35define void @strided_vpstore_v2i8_i64(<2 x i8> %val, ptr %ptr, i64 signext %stride, <2 x i1> %m, i32 zeroext %evl) {36; CHECK-RV32-LABEL: strided_vpstore_v2i8_i64:37; CHECK-RV32: # %bb.0:38; CHECK-RV32-NEXT: vsetvli zero, a3, e8, mf8, ta, ma39; CHECK-RV32-NEXT: vsse8.v v8, (a0), a1, v0.t40; CHECK-RV32-NEXT: ret41;42; CHECK-RV64-LABEL: strided_vpstore_v2i8_i64:43; CHECK-RV64: # %bb.0:44; CHECK-RV64-NEXT: vsetvli zero, a2, e8, mf8, ta, ma45; CHECK-RV64-NEXT: vsse8.v v8, (a0), a1, v0.t46; CHECK-RV64-NEXT: ret47 call void @llvm.experimental.vp.strided.store.v2i8.p0.i64(<2 x i8> %val, ptr %ptr, i64 %stride, <2 x i1> %m, i32 %evl)48 ret void49}50 51define void @strided_vpstore_v2i8(<2 x i8> %val, ptr %ptr, i32 signext %stride, <2 x i1> %m, i32 zeroext %evl) {52; CHECK-LABEL: strided_vpstore_v2i8:53; CHECK: # %bb.0:54; CHECK-NEXT: vsetvli zero, a2, e8, mf8, ta, ma55; CHECK-NEXT: vsse8.v v8, (a0), a1, v0.t56; CHECK-NEXT: ret57 call void @llvm.experimental.vp.strided.store.v2i8.p0.i32(<2 x i8> %val, ptr %ptr, i32 %stride, <2 x i1> %m, i32 %evl)58 ret void59}60 61define void @strided_vpstore_v4i8(<4 x i8> %val, ptr %ptr, i32 signext %stride, <4 x i1> %m, i32 zeroext %evl) {62; CHECK-LABEL: strided_vpstore_v4i8:63; CHECK: # %bb.0:64; CHECK-NEXT: vsetvli zero, a2, e8, mf4, ta, ma65; CHECK-NEXT: vsse8.v v8, (a0), a1, v0.t66; CHECK-NEXT: ret67 call void @llvm.experimental.vp.strided.store.v4i8.p0.i32(<4 x i8> %val, ptr %ptr, i32 %stride, <4 x i1> %m, i32 %evl)68 ret void69}70 71define void @strided_vpstore_v8i8(<8 x i8> %val, ptr %ptr, i32 signext %stride, <8 x i1> %m, i32 zeroext %evl) {72; CHECK-LABEL: strided_vpstore_v8i8:73; CHECK: # %bb.0:74; CHECK-NEXT: vsetvli zero, a2, e8, mf2, ta, ma75; CHECK-NEXT: vsse8.v v8, (a0), a1, v0.t76; CHECK-NEXT: ret77 call void @llvm.experimental.vp.strided.store.v8i8.p0.i32(<8 x i8> %val, ptr %ptr, i32 %stride, <8 x i1> %m, i32 %evl)78 ret void79}80 81define void @strided_vpstore_v8i8_unit_stride(<8 x i8> %val, ptr %ptr, <8 x i1> %m, i32 zeroext %evl) {82; CHECK-LABEL: strided_vpstore_v8i8_unit_stride:83; CHECK: # %bb.0:84; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma85; CHECK-NEXT: vse8.v v8, (a0), v0.t86; CHECK-NEXT: ret87 call void @llvm.experimental.vp.strided.store.v8i8.p0.i32(<8 x i8> %val, ptr %ptr, i32 1, <8 x i1> %m, i32 %evl)88 ret void89}90 91define void @strided_vpstore_v2i16(<2 x i16> %val, ptr %ptr, i32 signext %stride, <2 x i1> %m, i32 zeroext %evl) {92; CHECK-LABEL: strided_vpstore_v2i16:93; CHECK: # %bb.0:94; CHECK-NEXT: vsetvli zero, a2, e16, mf4, ta, ma95; CHECK-NEXT: vsse16.v v8, (a0), a1, v0.t96; CHECK-NEXT: ret97 call void @llvm.experimental.vp.strided.store.v2i16.p0.i32(<2 x i16> %val, ptr %ptr, i32 %stride, <2 x i1> %m, i32 %evl)98 ret void99}100 101define void @strided_vpstore_v4i16(<4 x i16> %val, ptr %ptr, i32 signext %stride, <4 x i1> %m, i32 zeroext %evl) {102; CHECK-LABEL: strided_vpstore_v4i16:103; CHECK: # %bb.0:104; CHECK-NEXT: vsetvli zero, a2, e16, mf2, ta, ma105; CHECK-NEXT: vsse16.v v8, (a0), a1, v0.t106; CHECK-NEXT: ret107 call void @llvm.experimental.vp.strided.store.v4i16.p0.i32(<4 x i16> %val, ptr %ptr, i32 %stride, <4 x i1> %m, i32 %evl)108 ret void109}110 111define void @strided_vpstore_v8i16(<8 x i16> %val, ptr %ptr, i32 signext %stride, <8 x i1> %m, i32 zeroext %evl) {112; CHECK-LABEL: strided_vpstore_v8i16:113; CHECK: # %bb.0:114; CHECK-NEXT: vsetvli zero, a2, e16, m1, ta, ma115; CHECK-NEXT: vsse16.v v8, (a0), a1, v0.t116; CHECK-NEXT: ret117 call void @llvm.experimental.vp.strided.store.v8i16.p0.i32(<8 x i16> %val, ptr %ptr, i32 %stride, <8 x i1> %m, i32 %evl)118 ret void119}120 121define void @strided_vpstore_v8i16_unit_stride(<8 x i16> %val, ptr %ptr, <8 x i1> %m, i32 zeroext %evl) {122; CHECK-LABEL: strided_vpstore_v8i16_unit_stride:123; CHECK: # %bb.0:124; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma125; CHECK-NEXT: vse16.v v8, (a0), v0.t126; CHECK-NEXT: ret127 call void @llvm.experimental.vp.strided.store.v8i16.p0.i32(<8 x i16> %val, ptr %ptr, i32 2, <8 x i1> %m, i32 %evl)128 ret void129}130 131define void @strided_vpstore_v2i32(<2 x i32> %val, ptr %ptr, i32 signext %stride, <2 x i1> %m, i32 zeroext %evl) {132; CHECK-LABEL: strided_vpstore_v2i32:133; CHECK: # %bb.0:134; CHECK-NEXT: vsetvli zero, a2, e32, mf2, ta, ma135; CHECK-NEXT: vsse32.v v8, (a0), a1, v0.t136; CHECK-NEXT: ret137 call void @llvm.experimental.vp.strided.store.v2i32.p0.i32(<2 x i32> %val, ptr %ptr, i32 %stride, <2 x i1> %m, i32 %evl)138 ret void139}140 141define void @strided_vpstore_v4i32(<4 x i32> %val, ptr %ptr, i32 signext %stride, <4 x i1> %m, i32 zeroext %evl) {142; CHECK-LABEL: strided_vpstore_v4i32:143; CHECK: # %bb.0:144; CHECK-NEXT: vsetvli zero, a2, e32, m1, ta, ma145; CHECK-NEXT: vsse32.v v8, (a0), a1, v0.t146; CHECK-NEXT: ret147 call void @llvm.experimental.vp.strided.store.v4i32.p0.i32(<4 x i32> %val, ptr %ptr, i32 %stride, <4 x i1> %m, i32 %evl)148 ret void149}150 151define void @strided_vpstore_v4i32_unit_stride(<4 x i32> %val, ptr %ptr, <4 x i1> %m, i32 zeroext %evl) {152; CHECK-LABEL: strided_vpstore_v4i32_unit_stride:153; CHECK: # %bb.0:154; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma155; CHECK-NEXT: vse32.v v8, (a0), v0.t156; CHECK-NEXT: ret157 call void @llvm.experimental.vp.strided.store.v4i32.p0.i32(<4 x i32> %val, ptr %ptr, i32 4, <4 x i1> %m, i32 %evl)158 ret void159}160 161define void @strided_vpstore_v8i32(<8 x i32> %val, ptr %ptr, i32 signext %stride, <8 x i1> %m, i32 zeroext %evl) {162; CHECK-LABEL: strided_vpstore_v8i32:163; CHECK: # %bb.0:164; CHECK-NEXT: vsetvli zero, a2, e32, m2, ta, ma165; CHECK-NEXT: vsse32.v v8, (a0), a1, v0.t166; CHECK-NEXT: ret167 call void @llvm.experimental.vp.strided.store.v8i32.p0.i32(<8 x i32> %val, ptr %ptr, i32 %stride, <8 x i1> %m, i32 %evl)168 ret void169}170 171define void @strided_vpstore_v2i64(<2 x i64> %val, ptr %ptr, i32 signext %stride, <2 x i1> %m, i32 zeroext %evl) {172; CHECK-LABEL: strided_vpstore_v2i64:173; CHECK: # %bb.0:174; CHECK-NEXT: vsetvli zero, a2, e64, m1, ta, ma175; CHECK-NEXT: vsse64.v v8, (a0), a1, v0.t176; CHECK-NEXT: ret177 call void @llvm.experimental.vp.strided.store.v2i64.p0.i32(<2 x i64> %val, ptr %ptr, i32 %stride, <2 x i1> %m, i32 %evl)178 ret void179}180 181define void @strided_vpstore_v2i64_unit_stride(<2 x i64> %val, ptr %ptr, <2 x i1> %m, i32 zeroext %evl) {182; CHECK-LABEL: strided_vpstore_v2i64_unit_stride:183; CHECK: # %bb.0:184; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma185; CHECK-NEXT: vse64.v v8, (a0), v0.t186; CHECK-NEXT: ret187 call void @llvm.experimental.vp.strided.store.v2i64.p0.i32(<2 x i64> %val, ptr %ptr, i32 8, <2 x i1> %m, i32 %evl)188 ret void189}190 191define void @strided_vpstore_v4i64(<4 x i64> %val, ptr %ptr, i32 signext %stride, <4 x i1> %m, i32 zeroext %evl) {192; CHECK-LABEL: strided_vpstore_v4i64:193; CHECK: # %bb.0:194; CHECK-NEXT: vsetvli zero, a2, e64, m2, ta, ma195; CHECK-NEXT: vsse64.v v8, (a0), a1, v0.t196; CHECK-NEXT: ret197 call void @llvm.experimental.vp.strided.store.v4i64.p0.i32(<4 x i64> %val, ptr %ptr, i32 %stride, <4 x i1> %m, i32 %evl)198 ret void199}200 201define void @strided_vpstore_v8i64(<8 x i64> %val, ptr %ptr, i32 signext %stride, <8 x i1> %m, i32 zeroext %evl) {202; CHECK-LABEL: strided_vpstore_v8i64:203; CHECK: # %bb.0:204; CHECK-NEXT: vsetvli zero, a2, e64, m4, ta, ma205; CHECK-NEXT: vsse64.v v8, (a0), a1, v0.t206; CHECK-NEXT: ret207 call void @llvm.experimental.vp.strided.store.v8i64.p0.i32(<8 x i64> %val, ptr %ptr, i32 %stride, <8 x i1> %m, i32 %evl)208 ret void209}210 211define void @strided_vpstore_v2bf16(<2 x bfloat> %val, ptr %ptr, i32 signext %stride, <2 x i1> %m, i32 zeroext %evl) {212; CHECK-LABEL: strided_vpstore_v2bf16:213; CHECK: # %bb.0:214; CHECK-NEXT: vsetvli zero, a2, e16, mf4, ta, ma215; CHECK-NEXT: vsse16.v v8, (a0), a1, v0.t216; CHECK-NEXT: ret217 call void @llvm.experimental.vp.strided.store.v2bf16.p0.i32(<2 x bfloat> %val, ptr %ptr, i32 %stride, <2 x i1> %m, i32 %evl)218 ret void219}220 221define void @strided_vpstore_v4bf16(<4 x bfloat> %val, ptr %ptr, i32 signext %stride, <4 x i1> %m, i32 zeroext %evl) {222; CHECK-LABEL: strided_vpstore_v4bf16:223; CHECK: # %bb.0:224; CHECK-NEXT: vsetvli zero, a2, e16, mf2, ta, ma225; CHECK-NEXT: vsse16.v v8, (a0), a1, v0.t226; CHECK-NEXT: ret227 call void @llvm.experimental.vp.strided.store.v4bf16.p0.i32(<4 x bfloat> %val, ptr %ptr, i32 %stride, <4 x i1> %m, i32 %evl)228 ret void229}230 231define void @strided_vpstore_v8bf16(<8 x bfloat> %val, ptr %ptr, i32 signext %stride, <8 x i1> %m, i32 zeroext %evl) {232; CHECK-LABEL: strided_vpstore_v8bf16:233; CHECK: # %bb.0:234; CHECK-NEXT: vsetvli zero, a2, e16, m1, ta, ma235; CHECK-NEXT: vsse16.v v8, (a0), a1, v0.t236; CHECK-NEXT: ret237 call void @llvm.experimental.vp.strided.store.v8bf16.p0.i32(<8 x bfloat> %val, ptr %ptr, i32 %stride, <8 x i1> %m, i32 %evl)238 ret void239}240 241define void @strided_vpstore_v8bf16_unit_stride(<8 x bfloat> %val, ptr %ptr, <8 x i1> %m, i32 zeroext %evl) {242; CHECK-LABEL: strided_vpstore_v8bf16_unit_stride:243; CHECK: # %bb.0:244; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma245; CHECK-NEXT: vse16.v v8, (a0), v0.t246; CHECK-NEXT: ret247 call void @llvm.experimental.vp.strided.store.v8bf16.p0.i32(<8 x bfloat> %val, ptr %ptr, i32 2, <8 x i1> %m, i32 %evl)248 ret void249}250 251define void @strided_vpstore_v2f16(<2 x half> %val, ptr %ptr, i32 signext %stride, <2 x i1> %m, i32 zeroext %evl) {252; CHECK-LABEL: strided_vpstore_v2f16:253; CHECK: # %bb.0:254; CHECK-NEXT: vsetvli zero, a2, e16, mf4, ta, ma255; CHECK-NEXT: vsse16.v v8, (a0), a1, v0.t256; CHECK-NEXT: ret257 call void @llvm.experimental.vp.strided.store.v2f16.p0.i32(<2 x half> %val, ptr %ptr, i32 %stride, <2 x i1> %m, i32 %evl)258 ret void259}260 261define void @strided_vpstore_v4f16(<4 x half> %val, ptr %ptr, i32 signext %stride, <4 x i1> %m, i32 zeroext %evl) {262; CHECK-LABEL: strided_vpstore_v4f16:263; CHECK: # %bb.0:264; CHECK-NEXT: vsetvli zero, a2, e16, mf2, ta, ma265; CHECK-NEXT: vsse16.v v8, (a0), a1, v0.t266; CHECK-NEXT: ret267 call void @llvm.experimental.vp.strided.store.v4f16.p0.i32(<4 x half> %val, ptr %ptr, i32 %stride, <4 x i1> %m, i32 %evl)268 ret void269}270 271define void @strided_vpstore_v8f16(<8 x half> %val, ptr %ptr, i32 signext %stride, <8 x i1> %m, i32 zeroext %evl) {272; CHECK-LABEL: strided_vpstore_v8f16:273; CHECK: # %bb.0:274; CHECK-NEXT: vsetvli zero, a2, e16, m1, ta, ma275; CHECK-NEXT: vsse16.v v8, (a0), a1, v0.t276; CHECK-NEXT: ret277 call void @llvm.experimental.vp.strided.store.v8f16.p0.i32(<8 x half> %val, ptr %ptr, i32 %stride, <8 x i1> %m, i32 %evl)278 ret void279}280 281define void @strided_vpstore_v8f16_unit_stride(<8 x half> %val, ptr %ptr, <8 x i1> %m, i32 zeroext %evl) {282; CHECK-LABEL: strided_vpstore_v8f16_unit_stride:283; CHECK: # %bb.0:284; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma285; CHECK-NEXT: vse16.v v8, (a0), v0.t286; CHECK-NEXT: ret287 call void @llvm.experimental.vp.strided.store.v8f16.p0.i32(<8 x half> %val, ptr %ptr, i32 2, <8 x i1> %m, i32 %evl)288 ret void289}290 291define void @strided_vpstore_v2f32(<2 x float> %val, ptr %ptr, i32 signext %stride, <2 x i1> %m, i32 zeroext %evl) {292; CHECK-LABEL: strided_vpstore_v2f32:293; CHECK: # %bb.0:294; CHECK-NEXT: vsetvli zero, a2, e32, mf2, ta, ma295; CHECK-NEXT: vsse32.v v8, (a0), a1, v0.t296; CHECK-NEXT: ret297 call void @llvm.experimental.vp.strided.store.v2f32.p0.i32(<2 x float> %val, ptr %ptr, i32 %stride, <2 x i1> %m, i32 %evl)298 ret void299}300 301define void @strided_vpstore_v4f32(<4 x float> %val, ptr %ptr, i32 signext %stride, <4 x i1> %m, i32 zeroext %evl) {302; CHECK-LABEL: strided_vpstore_v4f32:303; CHECK: # %bb.0:304; CHECK-NEXT: vsetvli zero, a2, e32, m1, ta, ma305; CHECK-NEXT: vsse32.v v8, (a0), a1, v0.t306; CHECK-NEXT: ret307 call void @llvm.experimental.vp.strided.store.v4f32.p0.i32(<4 x float> %val, ptr %ptr, i32 %stride, <4 x i1> %m, i32 %evl)308 ret void309}310 311define void @strided_vpstore_v4f32_unit_stride(<4 x float> %val, ptr %ptr, <4 x i1> %m, i32 zeroext %evl) {312; CHECK-LABEL: strided_vpstore_v4f32_unit_stride:313; CHECK: # %bb.0:314; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma315; CHECK-NEXT: vse32.v v8, (a0), v0.t316; CHECK-NEXT: ret317 call void @llvm.experimental.vp.strided.store.v4f32.p0.i32(<4 x float> %val, ptr %ptr, i32 4, <4 x i1> %m, i32 %evl)318 ret void319}320 321define void @strided_vpstore_v8f32(<8 x float> %val, ptr %ptr, i32 signext %stride, <8 x i1> %m, i32 zeroext %evl) {322; CHECK-LABEL: strided_vpstore_v8f32:323; CHECK: # %bb.0:324; CHECK-NEXT: vsetvli zero, a2, e32, m2, ta, ma325; CHECK-NEXT: vsse32.v v8, (a0), a1, v0.t326; CHECK-NEXT: ret327 call void @llvm.experimental.vp.strided.store.v8f32.p0.i32(<8 x float> %val, ptr %ptr, i32 %stride, <8 x i1> %m, i32 %evl)328 ret void329}330 331define void @strided_vpstore_v2f64(<2 x double> %val, ptr %ptr, i32 signext %stride, <2 x i1> %m, i32 zeroext %evl) {332; CHECK-LABEL: strided_vpstore_v2f64:333; CHECK: # %bb.0:334; CHECK-NEXT: vsetvli zero, a2, e64, m1, ta, ma335; CHECK-NEXT: vsse64.v v8, (a0), a1, v0.t336; CHECK-NEXT: ret337 call void @llvm.experimental.vp.strided.store.v2f64.p0.i32(<2 x double> %val, ptr %ptr, i32 %stride, <2 x i1> %m, i32 %evl)338 ret void339}340 341define void @strided_vpstore_v2f64_unit_stride(<2 x double> %val, ptr %ptr, <2 x i1> %m, i32 zeroext %evl) {342; CHECK-LABEL: strided_vpstore_v2f64_unit_stride:343; CHECK: # %bb.0:344; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma345; CHECK-NEXT: vse64.v v8, (a0), v0.t346; CHECK-NEXT: ret347 call void @llvm.experimental.vp.strided.store.v2f64.p0.i32(<2 x double> %val, ptr %ptr, i32 8, <2 x i1> %m, i32 %evl)348 ret void349}350 351define void @strided_vpstore_v4f64(<4 x double> %val, ptr %ptr, i32 signext %stride, <4 x i1> %m, i32 zeroext %evl) {352; CHECK-LABEL: strided_vpstore_v4f64:353; CHECK: # %bb.0:354; CHECK-NEXT: vsetvli zero, a2, e64, m2, ta, ma355; CHECK-NEXT: vsse64.v v8, (a0), a1, v0.t356; CHECK-NEXT: ret357 call void @llvm.experimental.vp.strided.store.v4f64.p0.i32(<4 x double> %val, ptr %ptr, i32 %stride, <4 x i1> %m, i32 %evl)358 ret void359}360 361define void @strided_vpstore_v8f64(<8 x double> %val, ptr %ptr, i32 signext %stride, <8 x i1> %m, i32 zeroext %evl) {362; CHECK-LABEL: strided_vpstore_v8f64:363; CHECK: # %bb.0:364; CHECK-NEXT: vsetvli zero, a2, e64, m4, ta, ma365; CHECK-NEXT: vsse64.v v8, (a0), a1, v0.t366; CHECK-NEXT: ret367 call void @llvm.experimental.vp.strided.store.v8f64.p0.i32(<8 x double> %val, ptr %ptr, i32 %stride, <8 x i1> %m, i32 %evl)368 ret void369}370 371define void @strided_vpstore_v2i8_allones_mask(<2 x i8> %val, ptr %ptr, i32 signext %stride, i32 zeroext %evl) {372; CHECK-LABEL: strided_vpstore_v2i8_allones_mask:373; CHECK: # %bb.0:374; CHECK-NEXT: vsetvli zero, a2, e8, mf8, ta, ma375; CHECK-NEXT: vsse8.v v8, (a0), a1376; CHECK-NEXT: ret377 call void @llvm.experimental.vp.strided.store.v2i8.p0.i32(<2 x i8> %val, ptr %ptr, i32 %stride, <2 x i1> splat (i1 true), i32 %evl)378 ret void379}380 381; Widening382define void @strided_vpstore_v3f32(<3 x float> %v, ptr %ptr, i32 signext %stride, <3 x i1> %mask, i32 zeroext %evl) {383; CHECK-LABEL: strided_vpstore_v3f32:384; CHECK: # %bb.0:385; CHECK-NEXT: vsetvli zero, a2, e32, m1, ta, ma386; CHECK-NEXT: vsse32.v v8, (a0), a1, v0.t387; CHECK-NEXT: ret388 call void @llvm.experimental.vp.strided.store.v3f32.p0.i32(<3 x float> %v, ptr %ptr, i32 %stride, <3 x i1> %mask, i32 %evl)389 ret void390}391 392define void @strided_vpstore_v3f32_allones_mask(<3 x float> %v, ptr %ptr, i32 signext %stride, i32 zeroext %evl) {393; CHECK-LABEL: strided_vpstore_v3f32_allones_mask:394; CHECK: # %bb.0:395; CHECK-NEXT: vsetvli zero, a2, e32, m1, ta, ma396; CHECK-NEXT: vsse32.v v8, (a0), a1397; CHECK-NEXT: ret398 call void @llvm.experimental.vp.strided.store.v3f32.p0.i32(<3 x float> %v, ptr %ptr, i32 %stride, <3 x i1> splat (i1 true), i32 %evl)399 ret void400}401 402; Splitting403define void @strided_store_v32f64(<32 x double> %v, ptr %ptr, i32 signext %stride, <32 x i1> %mask, i32 zeroext %evl) {404; CHECK-LABEL: strided_store_v32f64:405; CHECK: # %bb.0:406; CHECK-NEXT: li a4, 16407; CHECK-NEXT: mv a3, a2408; CHECK-NEXT: bltu a2, a4, .LBB38_2409; CHECK-NEXT: # %bb.1:410; CHECK-NEXT: li a3, 16411; CHECK-NEXT: .LBB38_2:412; CHECK-NEXT: vsetvli zero, a3, e64, m8, ta, ma413; CHECK-NEXT: vsse64.v v8, (a0), a1, v0.t414; CHECK-NEXT: mul a3, a3, a1415; CHECK-NEXT: add a0, a0, a3416; CHECK-NEXT: addi a3, a2, -16417; CHECK-NEXT: sltu a2, a2, a3418; CHECK-NEXT: addi a2, a2, -1419; CHECK-NEXT: vsetivli zero, 2, e8, mf4, ta, ma420; CHECK-NEXT: vslidedown.vi v0, v0, 2421; CHECK-NEXT: and a2, a2, a3422; CHECK-NEXT: vsetvli zero, a2, e64, m8, ta, ma423; CHECK-NEXT: vsse64.v v16, (a0), a1, v0.t424; CHECK-NEXT: ret425 call void @llvm.experimental.vp.strided.store.v32f64.p0.i32(<32 x double> %v, ptr %ptr, i32 %stride, <32 x i1> %mask, i32 %evl)426 ret void427}428 429define void @strided_store_v32f64_allones_mask(<32 x double> %v, ptr %ptr, i32 signext %stride, i32 zeroext %evl) {430; CHECK-LABEL: strided_store_v32f64_allones_mask:431; CHECK: # %bb.0:432; CHECK-NEXT: li a4, 16433; CHECK-NEXT: mv a3, a2434; CHECK-NEXT: bltu a2, a4, .LBB39_2435; CHECK-NEXT: # %bb.1:436; CHECK-NEXT: li a3, 16437; CHECK-NEXT: .LBB39_2:438; CHECK-NEXT: vsetvli zero, a3, e64, m8, ta, ma439; CHECK-NEXT: vsse64.v v8, (a0), a1440; CHECK-NEXT: mul a3, a3, a1441; CHECK-NEXT: add a0, a0, a3442; CHECK-NEXT: addi a3, a2, -16443; CHECK-NEXT: sltu a2, a2, a3444; CHECK-NEXT: addi a2, a2, -1445; CHECK-NEXT: and a2, a2, a3446; CHECK-NEXT: vsetvli zero, a2, e64, m8, ta, ma447; CHECK-NEXT: vsse64.v v16, (a0), a1448; CHECK-NEXT: ret449 call void @llvm.experimental.vp.strided.store.v32f64.p0.i32(<32 x double> %v, ptr %ptr, i32 %stride, <32 x i1> splat (i1 true), i32 %evl)450 ret void451}452 453