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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s3 4define void @trunc_sat_i8i16_maxmin(ptr %x, ptr %y) {5; CHECK-LABEL: trunc_sat_i8i16_maxmin:6; CHECK: # %bb.0:7; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma8; CHECK-NEXT: vle16.v v8, (a0)9; CHECK-NEXT: vnclip.wi v8, v8, 010; CHECK-NEXT: vse8.v v8, (a1)11; CHECK-NEXT: ret12 %1 = load <4 x i16>, ptr %x, align 1613 %2 = tail call <4 x i16> @llvm.smax.v4i16(<4 x i16> %1, <4 x i16> <i16 -128, i16 -128, i16 -128, i16 -128>)14 %3 = tail call <4 x i16> @llvm.smin.v4i16(<4 x i16> %2, <4 x i16> <i16 127, i16 127, i16 127, i16 127>)15 %4 = trunc <4 x i16> %3 to <4 x i8>16 store <4 x i8> %4, ptr %y, align 817 ret void18}19 20define void @trunc_sat_i8i16_minmax(ptr %x, ptr %y) {21; CHECK-LABEL: trunc_sat_i8i16_minmax:22; CHECK: # %bb.0:23; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma24; CHECK-NEXT: vle16.v v8, (a0)25; CHECK-NEXT: vnclip.wi v8, v8, 026; CHECK-NEXT: vse8.v v8, (a1)27; CHECK-NEXT: ret28 %1 = load <4 x i16>, ptr %x, align 1629 %2 = tail call <4 x i16> @llvm.smin.v4i16(<4 x i16> %1, <4 x i16> <i16 127, i16 127, i16 127, i16 127>)30 %3 = tail call <4 x i16> @llvm.smax.v4i16(<4 x i16> %2, <4 x i16> <i16 -128, i16 -128, i16 -128, i16 -128>)31 %4 = trunc <4 x i16> %3 to <4 x i8>32 store <4 x i8> %4, ptr %y, align 833 ret void34}35 36define void @trunc_sat_i8i16_notopt(ptr %x, ptr %y) {37; CHECK-LABEL: trunc_sat_i8i16_notopt:38; CHECK: # %bb.0:39; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma40; CHECK-NEXT: vle16.v v8, (a0)41; CHECK-NEXT: li a0, -12742; CHECK-NEXT: vmax.vx v8, v8, a043; CHECK-NEXT: li a0, 12844; CHECK-NEXT: vmin.vx v8, v8, a045; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma46; CHECK-NEXT: vnsrl.wi v8, v8, 047; CHECK-NEXT: vse8.v v8, (a1)48; CHECK-NEXT: ret49 %1 = load <4 x i16>, ptr %x, align 1650 %2 = tail call <4 x i16> @llvm.smax.v4i16(<4 x i16> %1, <4 x i16> <i16 -127, i16 -127, i16 -127, i16 -127>)51 %3 = tail call <4 x i16> @llvm.smin.v4i16(<4 x i16> %2, <4 x i16> <i16 128, i16 128, i16 128, i16 128>)52 %4 = trunc <4 x i16> %3 to <4 x i8>53 store <4 x i8> %4, ptr %y, align 854 ret void55}56 57define void @trunc_sat_u8u16_min(ptr %x, ptr %y) {58; CHECK-LABEL: trunc_sat_u8u16_min:59; CHECK: # %bb.0:60; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma61; CHECK-NEXT: vle16.v v8, (a0)62; CHECK-NEXT: vnclipu.wi v8, v8, 063; CHECK-NEXT: vse8.v v8, (a1)64; CHECK-NEXT: ret65 %1 = load <4 x i16>, ptr %x, align 1666 %2 = tail call <4 x i16> @llvm.umin.v4i16(<4 x i16> %1, <4 x i16> <i16 255, i16 255, i16 255, i16 255>)67 %3 = trunc <4 x i16> %2 to <4 x i8>68 store <4 x i8> %3, ptr %y, align 869 ret void70}71 72define void @trunc_sat_u8u16_notopt(ptr %x, ptr %y) {73; CHECK-LABEL: trunc_sat_u8u16_notopt:74; CHECK: # %bb.0:75; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma76; CHECK-NEXT: vle16.v v8, (a0)77; CHECK-NEXT: li a0, 12778; CHECK-NEXT: vminu.vx v8, v8, a079; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma80; CHECK-NEXT: vnsrl.wi v8, v8, 081; CHECK-NEXT: vse8.v v8, (a1)82; CHECK-NEXT: ret83 %1 = load <4 x i16>, ptr %x, align 1684 %2 = tail call <4 x i16> @llvm.umin.v4i16(<4 x i16> %1, <4 x i16> <i16 127, i16 127, i16 127, i16 127>)85 %3 = trunc <4 x i16> %2 to <4 x i8>86 store <4 x i8> %3, ptr %y, align 887 ret void88}89 90define void @trunc_sat_u8u16_maxmin(ptr %x, ptr %y) {91; CHECK-LABEL: trunc_sat_u8u16_maxmin:92; CHECK: # %bb.0:93; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma94; CHECK-NEXT: vle16.v v8, (a0)95; CHECK-NEXT: vmax.vx v8, v8, zero96; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma97; CHECK-NEXT: vnclipu.wi v8, v8, 098; CHECK-NEXT: vse8.v v8, (a1)99; CHECK-NEXT: ret100 %1 = load <4 x i16>, ptr %x, align 16101 %2 = tail call <4 x i16> @llvm.smax.v4i16(<4 x i16> %1, <4 x i16> zeroinitializer)102 %3 = tail call <4 x i16> @llvm.smin.v4i16(<4 x i16> %2, <4 x i16> <i16 255, i16 255, i16 255, i16 255>)103 %4 = trunc <4 x i16> %3 to <4 x i8>104 store <4 x i8> %4, ptr %y, align 8105 ret void106}107 108define void @trunc_sat_u8u16_minmax(ptr %x, ptr %y) {109; CHECK-LABEL: trunc_sat_u8u16_minmax:110; CHECK: # %bb.0:111; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma112; CHECK-NEXT: vle16.v v8, (a0)113; CHECK-NEXT: vmax.vx v8, v8, zero114; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma115; CHECK-NEXT: vnclipu.wi v8, v8, 0116; CHECK-NEXT: vse8.v v8, (a1)117; CHECK-NEXT: ret118 %1 = load <4 x i16>, ptr %x, align 16119 %2 = tail call <4 x i16> @llvm.smin.v4i16(<4 x i16> %1, <4 x i16> <i16 255, i16 255, i16 255, i16 255>)120 %3 = tail call <4 x i16> @llvm.smax.v4i16(<4 x i16> %2, <4 x i16> zeroinitializer)121 %4 = trunc <4 x i16> %3 to <4 x i8>122 store <4 x i8> %4, ptr %y, align 8123 ret void124}125 126define void @trunc_sat_i16i32_notopt(ptr %x, ptr %y) {127; CHECK-LABEL: trunc_sat_i16i32_notopt:128; CHECK: # %bb.0:129; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma130; CHECK-NEXT: vle32.v v8, (a0)131; CHECK-NEXT: lui a0, 1048568132; CHECK-NEXT: addi a0, a0, 1133; CHECK-NEXT: vmax.vx v8, v8, a0134; CHECK-NEXT: lui a0, 8135; CHECK-NEXT: vmin.vx v8, v8, a0136; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma137; CHECK-NEXT: vnsrl.wi v8, v8, 0138; CHECK-NEXT: vse16.v v8, (a1)139; CHECK-NEXT: ret140 %1 = load <4 x i32>, ptr %x, align 32141 %2 = tail call <4 x i32> @llvm.smax.v4i32(<4 x i32> %1, <4 x i32> <i32 -32767, i32 -32767, i32 -32767, i32 -32767>)142 %3 = tail call <4 x i32> @llvm.smin.v4i32(<4 x i32> %2, <4 x i32> <i32 32768, i32 32768, i32 32768, i32 32768>)143 %4 = trunc <4 x i32> %3 to <4 x i16>144 store <4 x i16> %4, ptr %y, align 16145 ret void146}147 148define void @trunc_sat_i16i32_maxmin(ptr %x, ptr %y) {149; CHECK-LABEL: trunc_sat_i16i32_maxmin:150; CHECK: # %bb.0:151; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma152; CHECK-NEXT: vle32.v v8, (a0)153; CHECK-NEXT: vnclip.wi v8, v8, 0154; CHECK-NEXT: vse16.v v8, (a1)155; CHECK-NEXT: ret156 %1 = load <4 x i32>, ptr %x, align 32157 %2 = tail call <4 x i32> @llvm.smax.v4i32(<4 x i32> %1, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>)158 %3 = tail call <4 x i32> @llvm.smin.v4i32(<4 x i32> %2, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>)159 %4 = trunc <4 x i32> %3 to <4 x i16>160 store <4 x i16> %4, ptr %y, align 16161 ret void162}163 164define void @trunc_sat_i16i32_minmax(ptr %x, ptr %y) {165; CHECK-LABEL: trunc_sat_i16i32_minmax:166; CHECK: # %bb.0:167; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma168; CHECK-NEXT: vle32.v v8, (a0)169; CHECK-NEXT: vnclip.wi v8, v8, 0170; CHECK-NEXT: vse16.v v8, (a1)171; CHECK-NEXT: ret172 %1 = load <4 x i32>, ptr %x, align 32173 %2 = tail call <4 x i32> @llvm.smin.v4i32(<4 x i32> %1, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>)174 %3 = tail call <4 x i32> @llvm.smax.v4i32(<4 x i32> %2, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>)175 %4 = trunc <4 x i32> %3 to <4 x i16>176 store <4 x i16> %4, ptr %y, align 16177 ret void178}179 180define void @trunc_sat_u16u32_notopt(ptr %x, ptr %y) {181; CHECK-LABEL: trunc_sat_u16u32_notopt:182; CHECK: # %bb.0:183; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma184; CHECK-NEXT: vle32.v v8, (a0)185; CHECK-NEXT: lui a0, 8186; CHECK-NEXT: addi a0, a0, -1187; CHECK-NEXT: vminu.vx v8, v8, a0188; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma189; CHECK-NEXT: vnsrl.wi v8, v8, 0190; CHECK-NEXT: vse16.v v8, (a1)191; CHECK-NEXT: ret192 %1 = load <4 x i32>, ptr %x, align 32193 %2 = tail call <4 x i32> @llvm.umin.v4i32(<4 x i32> %1, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>)194 %3 = trunc <4 x i32> %2 to <4 x i16>195 store <4 x i16> %3, ptr %y, align 16196 ret void197}198 199define void @trunc_sat_u16u32_min(ptr %x, ptr %y) {200; CHECK-LABEL: trunc_sat_u16u32_min:201; CHECK: # %bb.0:202; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma203; CHECK-NEXT: vle32.v v8, (a0)204; CHECK-NEXT: vnclipu.wi v8, v8, 0205; CHECK-NEXT: vse16.v v8, (a1)206; CHECK-NEXT: ret207 %1 = load <4 x i32>, ptr %x, align 32208 %2 = tail call <4 x i32> @llvm.umin.v4i32(<4 x i32> %1, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>)209 %3 = trunc <4 x i32> %2 to <4 x i16>210 store <4 x i16> %3, ptr %y, align 16211 ret void212}213 214define void @trunc_sat_u16u32_maxmin(ptr %x, ptr %y) {215; CHECK-LABEL: trunc_sat_u16u32_maxmin:216; CHECK: # %bb.0:217; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma218; CHECK-NEXT: vle32.v v8, (a0)219; CHECK-NEXT: li a0, 1220; CHECK-NEXT: vmax.vx v8, v8, a0221; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma222; CHECK-NEXT: vnclipu.wi v8, v8, 0223; CHECK-NEXT: vse16.v v8, (a1)224; CHECK-NEXT: ret225 %1 = load <4 x i32>, ptr %x, align 16226 %2 = tail call <4 x i32> @llvm.smax.v4i32(<4 x i32> %1, <4 x i32> <i32 1, i32 1, i32 1, i32 1>)227 %3 = tail call <4 x i32> @llvm.smin.v4i32(<4 x i32> %2, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>)228 %4 = trunc <4 x i32> %3 to <4 x i16>229 store <4 x i16> %4, ptr %y, align 8230 ret void231}232 233define void @trunc_sat_u16u32_minmax(ptr %x, ptr %y) {234; CHECK-LABEL: trunc_sat_u16u32_minmax:235; CHECK: # %bb.0:236; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma237; CHECK-NEXT: vle32.v v8, (a0)238; CHECK-NEXT: li a0, 50239; CHECK-NEXT: vmax.vx v8, v8, a0240; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma241; CHECK-NEXT: vnclipu.wi v8, v8, 0242; CHECK-NEXT: vse16.v v8, (a1)243; CHECK-NEXT: ret244 %1 = load <4 x i32>, ptr %x, align 16245 %2 = tail call <4 x i32> @llvm.smin.v4i32(<4 x i32> %1, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>)246 %3 = tail call <4 x i32> @llvm.smax.v4i32(<4 x i32> %2, <4 x i32> <i32 50, i32 50, i32 50, i32 50>)247 %4 = trunc <4 x i32> %3 to <4 x i16>248 store <4 x i16> %4, ptr %y, align 8249 ret void250}251 252define void @trunc_sat_i32i64_notopt(ptr %x, ptr %y) {253; CHECK-LABEL: trunc_sat_i32i64_notopt:254; CHECK: # %bb.0:255; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma256; CHECK-NEXT: vle64.v v8, (a0)257; CHECK-NEXT: lui a0, 524288258; CHECK-NEXT: addi a0, a0, 1259; CHECK-NEXT: vmax.vx v8, v8, a0260; CHECK-NEXT: li a0, 1261; CHECK-NEXT: slli a0, a0, 31262; CHECK-NEXT: vmin.vx v8, v8, a0263; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma264; CHECK-NEXT: vnsrl.wi v10, v8, 0265; CHECK-NEXT: vse32.v v10, (a1)266; CHECK-NEXT: ret267 %1 = load <4 x i64>, ptr %x, align 64268 %2 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %1, <4 x i64> <i64 -2147483647, i64 -2147483647, i64 -2147483647, i64 -2147483647>)269 %3 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %2, <4 x i64> <i64 2147483648, i64 2147483648, i64 2147483648, i64 2147483648>)270 %4 = trunc <4 x i64> %3 to <4 x i32>271 store <4 x i32> %4, ptr %y, align 32272 ret void273}274 275define void @trunc_sat_i32i64_maxmin(ptr %x, ptr %y) {276; CHECK-LABEL: trunc_sat_i32i64_maxmin:277; CHECK: # %bb.0:278; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma279; CHECK-NEXT: vle64.v v8, (a0)280; CHECK-NEXT: vnclip.wi v10, v8, 0281; CHECK-NEXT: vse32.v v10, (a1)282; CHECK-NEXT: ret283 %1 = load <4 x i64>, ptr %x, align 64284 %2 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %1, <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>)285 %3 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %2, <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>)286 %4 = trunc <4 x i64> %3 to <4 x i32>287 store <4 x i32> %4, ptr %y, align 32288 ret void289}290 291define void @trunc_sat_i32i64_minmax(ptr %x, ptr %y) {292; CHECK-LABEL: trunc_sat_i32i64_minmax:293; CHECK: # %bb.0:294; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma295; CHECK-NEXT: vle64.v v8, (a0)296; CHECK-NEXT: vnclip.wi v10, v8, 0297; CHECK-NEXT: vse32.v v10, (a1)298; CHECK-NEXT: ret299 %1 = load <4 x i64>, ptr %x, align 64300 %2 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %1, <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>)301 %3 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %2, <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>)302 %4 = trunc <4 x i64> %3 to <4 x i32>303 store <4 x i32> %4, ptr %y, align 32304 ret void305}306 307define void @trunc_sat_u32u64_notopt(ptr %x, ptr %y) {308; CHECK-LABEL: trunc_sat_u32u64_notopt:309; CHECK: # %bb.0:310; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma311; CHECK-NEXT: vle64.v v8, (a0)312; CHECK-NEXT: lui a0, 524288313; CHECK-NEXT: addiw a0, a0, -1314; CHECK-NEXT: vminu.vx v8, v8, a0315; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma316; CHECK-NEXT: vnsrl.wi v10, v8, 0317; CHECK-NEXT: vse32.v v10, (a1)318; CHECK-NEXT: ret319 %1 = load <4 x i64>, ptr %x, align 64320 %2 = tail call <4 x i64> @llvm.umin.v4i64(<4 x i64> %1, <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>)321 %3 = trunc <4 x i64> %2 to <4 x i32>322 store <4 x i32> %3, ptr %y, align 32323 ret void324}325 326define void @trunc_sat_u32u64_min(ptr %x, ptr %y) {327; CHECK-LABEL: trunc_sat_u32u64_min:328; CHECK: # %bb.0:329; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma330; CHECK-NEXT: vle64.v v8, (a0)331; CHECK-NEXT: vnclipu.wi v10, v8, 0332; CHECK-NEXT: vse32.v v10, (a1)333; CHECK-NEXT: ret334 %1 = load <4 x i64>, ptr %x, align 64335 %2 = tail call <4 x i64> @llvm.umin.v4i64(<4 x i64> %1, <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>)336 %3 = trunc <4 x i64> %2 to <4 x i32>337 store <4 x i32> %3, ptr %y, align 32338 ret void339}340 341define void @trunc_sat_u32u64_maxmin(ptr %x, ptr %y) {342; CHECK-LABEL: trunc_sat_u32u64_maxmin:343; CHECK: # %bb.0:344; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma345; CHECK-NEXT: vle64.v v8, (a0)346; CHECK-NEXT: vmax.vx v8, v8, zero347; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma348; CHECK-NEXT: vnclipu.wi v10, v8, 0349; CHECK-NEXT: vse32.v v10, (a1)350; CHECK-NEXT: ret351 %1 = load <4 x i64>, ptr %x, align 16352 %2 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %1, <4 x i64> zeroinitializer)353 %3 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %2, <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>)354 %4 = trunc <4 x i64> %3 to <4 x i32>355 store <4 x i32> %4, ptr %y, align 8356 ret void357}358 359define void @trunc_sat_u32u64_minmax(ptr %x, ptr %y) {360; CHECK-LABEL: trunc_sat_u32u64_minmax:361; CHECK: # %bb.0:362; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma363; CHECK-NEXT: vle64.v v8, (a0)364; CHECK-NEXT: vmax.vx v8, v8, zero365; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma366; CHECK-NEXT: vnclipu.wi v10, v8, 0367; CHECK-NEXT: vse32.v v10, (a1)368; CHECK-NEXT: ret369 %1 = load <4 x i64>, ptr %x, align 16370 %2 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %1, <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>)371 %3 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %2, <4 x i64> zeroinitializer)372 %4 = trunc <4 x i64> %3 to <4 x i32>373 store <4 x i32> %4, ptr %y, align 8374 ret void375}376 377define void @trunc_sat_i8i32_maxmin(ptr %x, ptr %y) {378; CHECK-LABEL: trunc_sat_i8i32_maxmin:379; CHECK: # %bb.0:380; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma381; CHECK-NEXT: vle32.v v8, (a0)382; CHECK-NEXT: vnclip.wi v8, v8, 0383; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma384; CHECK-NEXT: vnclip.wi v8, v8, 0385; CHECK-NEXT: vse8.v v8, (a1)386; CHECK-NEXT: ret387 %1 = load <4 x i32>, ptr %x, align 16388 %2 = tail call <4 x i32> @llvm.smax.v4i32(<4 x i32> %1, <4 x i32> <i32 -128, i32 -128, i32 -128, i32 -128>)389 %3 = tail call <4 x i32> @llvm.smin.v4i32(<4 x i32> %2, <4 x i32> <i32 127, i32 127, i32 127, i32 127>)390 %4 = trunc <4 x i32> %3 to <4 x i8>391 store <4 x i8> %4, ptr %y, align 8392 ret void393}394 395define void @trunc_sat_i8i32_minmax(ptr %x, ptr %y) {396; CHECK-LABEL: trunc_sat_i8i32_minmax:397; CHECK: # %bb.0:398; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma399; CHECK-NEXT: vle32.v v8, (a0)400; CHECK-NEXT: vnclip.wi v8, v8, 0401; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma402; CHECK-NEXT: vnclip.wi v8, v8, 0403; CHECK-NEXT: vse8.v v8, (a1)404; CHECK-NEXT: ret405 %1 = load <4 x i32>, ptr %x, align 16406 %2 = tail call <4 x i32> @llvm.smin.v4i32(<4 x i32> %1, <4 x i32> <i32 127, i32 127, i32 127, i32 127>)407 %3 = tail call <4 x i32> @llvm.smax.v4i32(<4 x i32> %2, <4 x i32> <i32 -128, i32 -128, i32 -128, i32 -128>)408 %4 = trunc <4 x i32> %3 to <4 x i8>409 store <4 x i8> %4, ptr %y, align 8410 ret void411}412 413define void @trunc_sat_u8u32_min(ptr %x, ptr %y) {414; CHECK-LABEL: trunc_sat_u8u32_min:415; CHECK: # %bb.0:416; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma417; CHECK-NEXT: vle32.v v8, (a0)418; CHECK-NEXT: vnclipu.wi v8, v8, 0419; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma420; CHECK-NEXT: vnclipu.wi v8, v8, 0421; CHECK-NEXT: vse8.v v8, (a1)422; CHECK-NEXT: ret423 %1 = load <4 x i32>, ptr %x, align 16424 %2 = tail call <4 x i32> @llvm.umin.v4i32(<4 x i32> %1, <4 x i32> <i32 255, i32 255, i32 255, i32 255>)425 %3 = trunc <4 x i32> %2 to <4 x i8>426 store <4 x i8> %3, ptr %y, align 8427 ret void428}429 430define void @trunc_sat_u8u32_maxmin(ptr %x, ptr %y) {431; CHECK-LABEL: trunc_sat_u8u32_maxmin:432; CHECK: # %bb.0:433; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma434; CHECK-NEXT: vle32.v v8, (a0)435; CHECK-NEXT: vmax.vx v8, v8, zero436; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma437; CHECK-NEXT: vnclipu.wi v8, v8, 0438; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma439; CHECK-NEXT: vnclipu.wi v8, v8, 0440; CHECK-NEXT: vse8.v v8, (a1)441; CHECK-NEXT: ret442 %1 = load <4 x i32>, ptr %x, align 16443 %2 = tail call <4 x i32> @llvm.smax.v4i32(<4 x i32> %1, <4 x i32> zeroinitializer)444 %3 = tail call <4 x i32> @llvm.smin.v4i32(<4 x i32> %2, <4 x i32> <i32 255, i32 255, i32 255, i32 255>)445 %4 = trunc <4 x i32> %3 to <4 x i8>446 store <4 x i8> %4, ptr %y, align 8447 ret void448}449 450define void @trunc_sat_u8u32_minmax(ptr %x, ptr %y) {451; CHECK-LABEL: trunc_sat_u8u32_minmax:452; CHECK: # %bb.0:453; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma454; CHECK-NEXT: vle32.v v8, (a0)455; CHECK-NEXT: vmax.vx v8, v8, zero456; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma457; CHECK-NEXT: vnclipu.wi v8, v8, 0458; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma459; CHECK-NEXT: vnclipu.wi v8, v8, 0460; CHECK-NEXT: vse8.v v8, (a1)461; CHECK-NEXT: ret462 %1 = load <4 x i32>, ptr %x, align 16463 %2 = tail call <4 x i32> @llvm.smin.v4i32(<4 x i32> %1, <4 x i32> <i32 255, i32 255, i32 255, i32 255>)464 %3 = tail call <4 x i32> @llvm.smax.v4i32(<4 x i32> %2, <4 x i32> zeroinitializer)465 %4 = trunc <4 x i32> %3 to <4 x i8>466 store <4 x i8> %4, ptr %y, align 8467 ret void468}469 470define void @trunc_sat_i8i64_maxmin(ptr %x, ptr %y) {471; CHECK-LABEL: trunc_sat_i8i64_maxmin:472; CHECK: # %bb.0:473; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma474; CHECK-NEXT: vle64.v v8, (a0)475; CHECK-NEXT: vnclip.wi v10, v8, 0476; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma477; CHECK-NEXT: vnclip.wi v8, v10, 0478; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma479; CHECK-NEXT: vnclip.wi v8, v8, 0480; CHECK-NEXT: vse8.v v8, (a1)481; CHECK-NEXT: ret482 %1 = load <4 x i64>, ptr %x, align 16483 %2 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %1, <4 x i64> <i64 -128, i64 -128, i64 -128, i64 -128>)484 %3 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %2, <4 x i64> <i64 127, i64 127, i64 127, i64 127>)485 %4 = trunc <4 x i64> %3 to <4 x i8>486 store <4 x i8> %4, ptr %y, align 8487 ret void488}489 490define void @trunc_sat_i8i64_minmax(ptr %x, ptr %y) {491; CHECK-LABEL: trunc_sat_i8i64_minmax:492; CHECK: # %bb.0:493; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma494; CHECK-NEXT: vle64.v v8, (a0)495; CHECK-NEXT: vnclip.wi v10, v8, 0496; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma497; CHECK-NEXT: vnclip.wi v8, v10, 0498; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma499; CHECK-NEXT: vnclip.wi v8, v8, 0500; CHECK-NEXT: vse8.v v8, (a1)501; CHECK-NEXT: ret502 %1 = load <4 x i64>, ptr %x, align 16503 %2 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %1, <4 x i64> <i64 127, i64 127, i64 127, i64 127>)504 %3 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %2, <4 x i64> <i64 -128, i64 -128, i64 -128, i64 -128>)505 %4 = trunc <4 x i64> %3 to <4 x i8>506 store <4 x i8> %4, ptr %y, align 8507 ret void508}509 510define void @trunc_sat_u8u64_min(ptr %x, ptr %y) {511; CHECK-LABEL: trunc_sat_u8u64_min:512; CHECK: # %bb.0:513; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma514; CHECK-NEXT: vle64.v v8, (a0)515; CHECK-NEXT: vnclipu.wi v10, v8, 0516; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma517; CHECK-NEXT: vnclipu.wi v8, v10, 0518; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma519; CHECK-NEXT: vnclipu.wi v8, v8, 0520; CHECK-NEXT: vse8.v v8, (a1)521; CHECK-NEXT: ret522 %1 = load <4 x i64>, ptr %x, align 16523 %2 = tail call <4 x i64> @llvm.umin.v4i64(<4 x i64> %1, <4 x i64> <i64 255, i64 255, i64 255, i64 255>)524 %3 = trunc <4 x i64> %2 to <4 x i8>525 store <4 x i8> %3, ptr %y, align 8526 ret void527}528 529define void @trunc_sat_u8u64_maxmin(ptr %x, ptr %y) {530; CHECK-LABEL: trunc_sat_u8u64_maxmin:531; CHECK: # %bb.0:532; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma533; CHECK-NEXT: vle64.v v8, (a0)534; CHECK-NEXT: vmax.vx v8, v8, zero535; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma536; CHECK-NEXT: vnclipu.wi v10, v8, 0537; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma538; CHECK-NEXT: vnclipu.wi v8, v10, 0539; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma540; CHECK-NEXT: vnclipu.wi v8, v8, 0541; CHECK-NEXT: vse8.v v8, (a1)542; CHECK-NEXT: ret543 %1 = load <4 x i64>, ptr %x, align 16544 %2 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %1, <4 x i64> zeroinitializer)545 %3 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %2, <4 x i64> <i64 255, i64 255, i64 255, i64 255>)546 %4 = trunc <4 x i64> %3 to <4 x i8>547 store <4 x i8> %4, ptr %y, align 8548 ret void549}550 551define void @trunc_sat_u8u64_minmax(ptr %x, ptr %y) {552; CHECK-LABEL: trunc_sat_u8u64_minmax:553; CHECK: # %bb.0:554; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma555; CHECK-NEXT: vle64.v v8, (a0)556; CHECK-NEXT: vmax.vx v8, v8, zero557; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma558; CHECK-NEXT: vnclipu.wi v10, v8, 0559; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma560; CHECK-NEXT: vnclipu.wi v8, v10, 0561; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma562; CHECK-NEXT: vnclipu.wi v8, v8, 0563; CHECK-NEXT: vse8.v v8, (a1)564; CHECK-NEXT: ret565 %1 = load <4 x i64>, ptr %x, align 16566 %2 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %1, <4 x i64> <i64 255, i64 255, i64 255, i64 255>)567 %3 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %2, <4 x i64> zeroinitializer)568 %4 = trunc <4 x i64> %3 to <4 x i8>569 store <4 x i8> %4, ptr %y, align 8570 ret void571}572 573define void @trunc_sat_i16i64_maxmin(ptr %x, ptr %y) {574; CHECK-LABEL: trunc_sat_i16i64_maxmin:575; CHECK: # %bb.0:576; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma577; CHECK-NEXT: vle64.v v8, (a0)578; CHECK-NEXT: vnclip.wi v10, v8, 0579; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma580; CHECK-NEXT: vnclip.wi v8, v10, 0581; CHECK-NEXT: vse16.v v8, (a1)582; CHECK-NEXT: ret583 %1 = load <4 x i64>, ptr %x, align 32584 %2 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %1, <4 x i64> <i64 -32768, i64 -32768, i64 -32768, i64 -32768>)585 %3 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %2, <4 x i64> <i64 32767, i64 32767, i64 32767, i64 32767>)586 %4 = trunc <4 x i64> %3 to <4 x i16>587 store <4 x i16> %4, ptr %y, align 16588 ret void589}590 591define void @trunc_sat_i16i64_minmax(ptr %x, ptr %y) {592; CHECK-LABEL: trunc_sat_i16i64_minmax:593; CHECK: # %bb.0:594; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma595; CHECK-NEXT: vle64.v v8, (a0)596; CHECK-NEXT: vnclip.wi v10, v8, 0597; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma598; CHECK-NEXT: vnclip.wi v8, v10, 0599; CHECK-NEXT: vse16.v v8, (a1)600; CHECK-NEXT: ret601 %1 = load <4 x i64>, ptr %x, align 32602 %2 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %1, <4 x i64> <i64 32767, i64 32767, i64 32767, i64 32767>)603 %3 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %2, <4 x i64> <i64 -32768, i64 -32768, i64 -32768, i64 -32768>)604 %4 = trunc <4 x i64> %3 to <4 x i16>605 store <4 x i16> %4, ptr %y, align 16606 ret void607}608 609define void @trunc_sat_u16u64_notopt(ptr %x, ptr %y) {610; CHECK-LABEL: trunc_sat_u16u64_notopt:611; CHECK: # %bb.0:612; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma613; CHECK-NEXT: vle64.v v8, (a0)614; CHECK-NEXT: lui a0, 8615; CHECK-NEXT: addi a0, a0, -1616; CHECK-NEXT: vminu.vx v8, v8, a0617; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma618; CHECK-NEXT: vnsrl.wi v10, v8, 0619; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma620; CHECK-NEXT: vnsrl.wi v8, v10, 0621; CHECK-NEXT: vse16.v v8, (a1)622; CHECK-NEXT: ret623 %1 = load <4 x i64>, ptr %x, align 32624 %2 = tail call <4 x i64> @llvm.umin.v4i64(<4 x i64> %1, <4 x i64> <i64 32767, i64 32767, i64 32767, i64 32767>)625 %3 = trunc <4 x i64> %2 to <4 x i16>626 store <4 x i16> %3, ptr %y, align 16627 ret void628}629 630define void @trunc_sat_u16u64_min(ptr %x, ptr %y) {631; CHECK-LABEL: trunc_sat_u16u64_min:632; CHECK: # %bb.0:633; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma634; CHECK-NEXT: vle64.v v8, (a0)635; CHECK-NEXT: vnclipu.wi v10, v8, 0636; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma637; CHECK-NEXT: vnclipu.wi v8, v10, 0638; CHECK-NEXT: vse16.v v8, (a1)639; CHECK-NEXT: ret640 %1 = load <4 x i64>, ptr %x, align 32641 %2 = tail call <4 x i64> @llvm.umin.v4i64(<4 x i64> %1, <4 x i64> <i64 65535, i64 65535, i64 65535, i64 65535>)642 %3 = trunc <4 x i64> %2 to <4 x i16>643 store <4 x i16> %3, ptr %y, align 16644 ret void645}646 647define void @trunc_sat_u16u64_maxmin(ptr %x, ptr %y) {648; CHECK-LABEL: trunc_sat_u16u64_maxmin:649; CHECK: # %bb.0:650; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma651; CHECK-NEXT: vle64.v v8, (a0)652; CHECK-NEXT: li a0, 1653; CHECK-NEXT: vmax.vx v8, v8, a0654; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma655; CHECK-NEXT: vnclipu.wi v10, v8, 0656; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma657; CHECK-NEXT: vnclipu.wi v8, v10, 0658; CHECK-NEXT: vse16.v v8, (a1)659; CHECK-NEXT: ret660 %1 = load <4 x i64>, ptr %x, align 16661 %2 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %1, <4 x i64> <i64 1, i64 1, i64 1, i64 1>)662 %3 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %2, <4 x i64> <i64 65535, i64 65535, i64 65535, i64 65535>)663 %4 = trunc <4 x i64> %3 to <4 x i16>664 store <4 x i16> %4, ptr %y, align 8665 ret void666}667 668define void @trunc_sat_u16u64_minmax(ptr %x, ptr %y) {669; CHECK-LABEL: trunc_sat_u16u64_minmax:670; CHECK: # %bb.0:671; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma672; CHECK-NEXT: vle64.v v8, (a0)673; CHECK-NEXT: li a0, 50674; CHECK-NEXT: vmax.vx v8, v8, a0675; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma676; CHECK-NEXT: vnclipu.wi v10, v8, 0677; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma678; CHECK-NEXT: vnclipu.wi v8, v10, 0679; CHECK-NEXT: vse16.v v8, (a1)680; CHECK-NEXT: ret681 %1 = load <4 x i64>, ptr %x, align 16682 %2 = tail call <4 x i64> @llvm.smin.v4i64(<4 x i64> %1, <4 x i64> <i64 65535, i64 65535, i64 65535, i64 65535>)683 %3 = tail call <4 x i64> @llvm.smax.v4i64(<4 x i64> %2, <4 x i64> <i64 50, i64 50, i64 50, i64 50>)684 %4 = trunc <4 x i64> %3 to <4 x i16>685 store <4 x i16> %4, ptr %y, align 8686 ret void687}688