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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <8 x i7> @vand_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vand_vv_v8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma11; CHECK-NEXT: vand.vv v8, v8, v9, v0.t12; CHECK-NEXT: ret13 %v = call <8 x i7> @llvm.vp.and.v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 %evl)14 ret <8 x i7> %v15}16 17define <2 x i8> @vand_vv_v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 zeroext %evl) {18; CHECK-LABEL: vand_vv_v2i8:19; CHECK: # %bb.0:20; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma21; CHECK-NEXT: vand.vv v8, v8, v9, v0.t22; CHECK-NEXT: ret23 %v = call <2 x i8> @llvm.vp.and.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 %evl)24 ret <2 x i8> %v25}26 27define <2 x i8> @vand_vv_v2i8_unmasked(<2 x i8> %va, <2 x i8> %b, i32 zeroext %evl) {28; CHECK-LABEL: vand_vv_v2i8_unmasked:29; CHECK: # %bb.0:30; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma31; CHECK-NEXT: vand.vv v8, v8, v932; CHECK-NEXT: ret33 %v = call <2 x i8> @llvm.vp.and.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> splat (i1 true), i32 %evl)34 ret <2 x i8> %v35}36 37define <2 x i8> @vand_vx_v2i8(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {38; CHECK-LABEL: vand_vx_v2i8:39; CHECK: # %bb.0:40; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma41; CHECK-NEXT: vand.vx v8, v8, a0, v0.t42; CHECK-NEXT: ret43 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 044 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer45 %v = call <2 x i8> @llvm.vp.and.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> %m, i32 %evl)46 ret <2 x i8> %v47}48 49define <2 x i8> @vand_vx_v2i8_commute(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {50; CHECK-LABEL: vand_vx_v2i8_commute:51; CHECK: # %bb.0:52; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma53; CHECK-NEXT: vand.vx v8, v8, a0, v0.t54; CHECK-NEXT: ret55 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 056 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer57 %v = call <2 x i8> @llvm.vp.and.v2i8(<2 x i8> %vb, <2 x i8> %va, <2 x i1> %m, i32 %evl)58 ret <2 x i8> %v59}60 61define <2 x i8> @vand_vx_v2i8_unmasked(<2 x i8> %va, i8 %b, i32 zeroext %evl) {62; CHECK-LABEL: vand_vx_v2i8_unmasked:63; CHECK: # %bb.0:64; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma65; CHECK-NEXT: vand.vx v8, v8, a066; CHECK-NEXT: ret67 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 068 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer69 %v = call <2 x i8> @llvm.vp.and.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> splat (i1 true), i32 %evl)70 ret <2 x i8> %v71}72 73define <2 x i8> @vand_vx_v2i8_unmasked_commute(<2 x i8> %va, i8 %b, i32 zeroext %evl) {74; CHECK-LABEL: vand_vx_v2i8_unmasked_commute:75; CHECK: # %bb.0:76; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma77; CHECK-NEXT: vand.vx v8, v8, a078; CHECK-NEXT: ret79 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 080 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer81 %v = call <2 x i8> @llvm.vp.and.v2i8(<2 x i8> %vb, <2 x i8> %va, <2 x i1> splat (i1 true), i32 %evl)82 ret <2 x i8> %v83}84 85define <2 x i8> @vand_vi_v2i8(<2 x i8> %va, <2 x i1> %m, i32 zeroext %evl) {86; CHECK-LABEL: vand_vi_v2i8:87; CHECK: # %bb.0:88; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma89; CHECK-NEXT: vand.vi v8, v8, 4, v0.t90; CHECK-NEXT: ret91 %v = call <2 x i8> @llvm.vp.and.v2i8(<2 x i8> %va, <2 x i8> splat (i8 4), <2 x i1> %m, i32 %evl)92 ret <2 x i8> %v93}94 95define <2 x i8> @vand_vi_v2i8_unmasked(<2 x i8> %va, i32 zeroext %evl) {96; CHECK-LABEL: vand_vi_v2i8_unmasked:97; CHECK: # %bb.0:98; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma99; CHECK-NEXT: vand.vi v8, v8, 4100; CHECK-NEXT: ret101 %v = call <2 x i8> @llvm.vp.and.v2i8(<2 x i8> %va, <2 x i8> splat (i8 4), <2 x i1> splat (i1 true), i32 %evl)102 ret <2 x i8> %v103}104 105define <4 x i8> @vand_vv_v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 zeroext %evl) {106; CHECK-LABEL: vand_vv_v4i8:107; CHECK: # %bb.0:108; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma109; CHECK-NEXT: vand.vv v8, v8, v9, v0.t110; CHECK-NEXT: ret111 %v = call <4 x i8> @llvm.vp.and.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 %evl)112 ret <4 x i8> %v113}114 115define <4 x i8> @vand_vv_v4i8_unmasked(<4 x i8> %va, <4 x i8> %b, i32 zeroext %evl) {116; CHECK-LABEL: vand_vv_v4i8_unmasked:117; CHECK: # %bb.0:118; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma119; CHECK-NEXT: vand.vv v8, v8, v9120; CHECK-NEXT: ret121 %v = call <4 x i8> @llvm.vp.and.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> splat (i1 true), i32 %evl)122 ret <4 x i8> %v123}124 125define <4 x i8> @vand_vx_v4i8(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {126; CHECK-LABEL: vand_vx_v4i8:127; CHECK: # %bb.0:128; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma129; CHECK-NEXT: vand.vx v8, v8, a0, v0.t130; CHECK-NEXT: ret131 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0132 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer133 %v = call <4 x i8> @llvm.vp.and.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> %m, i32 %evl)134 ret <4 x i8> %v135}136 137define <4 x i8> @vand_vx_v4i8_unmasked(<4 x i8> %va, i8 %b, i32 zeroext %evl) {138; CHECK-LABEL: vand_vx_v4i8_unmasked:139; CHECK: # %bb.0:140; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma141; CHECK-NEXT: vand.vx v8, v8, a0142; CHECK-NEXT: ret143 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0144 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer145 %v = call <4 x i8> @llvm.vp.and.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> splat (i1 true), i32 %evl)146 ret <4 x i8> %v147}148 149define <4 x i8> @vand_vi_v4i8(<4 x i8> %va, <4 x i1> %m, i32 zeroext %evl) {150; CHECK-LABEL: vand_vi_v4i8:151; CHECK: # %bb.0:152; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma153; CHECK-NEXT: vand.vi v8, v8, 4, v0.t154; CHECK-NEXT: ret155 %v = call <4 x i8> @llvm.vp.and.v4i8(<4 x i8> %va, <4 x i8> splat (i8 4), <4 x i1> %m, i32 %evl)156 ret <4 x i8> %v157}158 159define <4 x i8> @vand_vi_v4i8_unmasked(<4 x i8> %va, i32 zeroext %evl) {160; CHECK-LABEL: vand_vi_v4i8_unmasked:161; CHECK: # %bb.0:162; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma163; CHECK-NEXT: vand.vi v8, v8, 4164; CHECK-NEXT: ret165 %v = call <4 x i8> @llvm.vp.and.v4i8(<4 x i8> %va, <4 x i8> splat (i8 4), <4 x i1> splat (i1 true), i32 %evl)166 ret <4 x i8> %v167}168 169define <8 x i8> @vand_vv_v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 zeroext %evl) {170; CHECK-LABEL: vand_vv_v8i8:171; CHECK: # %bb.0:172; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma173; CHECK-NEXT: vand.vv v8, v8, v9, v0.t174; CHECK-NEXT: ret175 %v = call <8 x i8> @llvm.vp.and.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 %evl)176 ret <8 x i8> %v177}178 179define <8 x i8> @vand_vv_v8i8_unmasked(<8 x i8> %va, <8 x i8> %b, i32 zeroext %evl) {180; CHECK-LABEL: vand_vv_v8i8_unmasked:181; CHECK: # %bb.0:182; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma183; CHECK-NEXT: vand.vv v8, v8, v9184; CHECK-NEXT: ret185 %v = call <8 x i8> @llvm.vp.and.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> splat (i1 true), i32 %evl)186 ret <8 x i8> %v187}188 189define <8 x i8> @vand_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {190; CHECK-LABEL: vand_vx_v8i8:191; CHECK: # %bb.0:192; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma193; CHECK-NEXT: vand.vx v8, v8, a0, v0.t194; CHECK-NEXT: ret195 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0196 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer197 %v = call <8 x i8> @llvm.vp.and.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 %evl)198 ret <8 x i8> %v199}200 201define <8 x i8> @vand_vx_v8i8_unmasked(<8 x i8> %va, i8 %b, i32 zeroext %evl) {202; CHECK-LABEL: vand_vx_v8i8_unmasked:203; CHECK: # %bb.0:204; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma205; CHECK-NEXT: vand.vx v8, v8, a0206; CHECK-NEXT: ret207 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0208 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer209 %v = call <8 x i8> @llvm.vp.and.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> splat (i1 true), i32 %evl)210 ret <8 x i8> %v211}212 213define <8 x i8> @vand_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {214; CHECK-LABEL: vand_vi_v8i8:215; CHECK: # %bb.0:216; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma217; CHECK-NEXT: vand.vi v8, v8, 4, v0.t218; CHECK-NEXT: ret219 %v = call <8 x i8> @llvm.vp.and.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), <8 x i1> %m, i32 %evl)220 ret <8 x i8> %v221}222 223define <8 x i8> @vand_vi_v8i8_unmasked(<8 x i8> %va, i32 zeroext %evl) {224; CHECK-LABEL: vand_vi_v8i8_unmasked:225; CHECK: # %bb.0:226; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma227; CHECK-NEXT: vand.vi v8, v8, 4228; CHECK-NEXT: ret229 %v = call <8 x i8> @llvm.vp.and.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), <8 x i1> splat (i1 true), i32 %evl)230 ret <8 x i8> %v231}232 233define <16 x i8> @vand_vv_v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 zeroext %evl) {234; CHECK-LABEL: vand_vv_v16i8:235; CHECK: # %bb.0:236; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma237; CHECK-NEXT: vand.vv v8, v8, v9, v0.t238; CHECK-NEXT: ret239 %v = call <16 x i8> @llvm.vp.and.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 %evl)240 ret <16 x i8> %v241}242 243define <16 x i8> @vand_vv_v16i8_unmasked(<16 x i8> %va, <16 x i8> %b, i32 zeroext %evl) {244; CHECK-LABEL: vand_vv_v16i8_unmasked:245; CHECK: # %bb.0:246; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma247; CHECK-NEXT: vand.vv v8, v8, v9248; CHECK-NEXT: ret249 %v = call <16 x i8> @llvm.vp.and.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> splat (i1 true), i32 %evl)250 ret <16 x i8> %v251}252 253define <16 x i8> @vand_vx_v16i8(<16 x i8> %va, i8 %b, <16 x i1> %m, i32 zeroext %evl) {254; CHECK-LABEL: vand_vx_v16i8:255; CHECK: # %bb.0:256; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma257; CHECK-NEXT: vand.vx v8, v8, a0, v0.t258; CHECK-NEXT: ret259 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0260 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer261 %v = call <16 x i8> @llvm.vp.and.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> %m, i32 %evl)262 ret <16 x i8> %v263}264 265define <16 x i8> @vand_vx_v16i8_unmasked(<16 x i8> %va, i8 %b, i32 zeroext %evl) {266; CHECK-LABEL: vand_vx_v16i8_unmasked:267; CHECK: # %bb.0:268; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma269; CHECK-NEXT: vand.vx v8, v8, a0270; CHECK-NEXT: ret271 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0272 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer273 %v = call <16 x i8> @llvm.vp.and.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> splat (i1 true), i32 %evl)274 ret <16 x i8> %v275}276 277define <16 x i8> @vand_vi_v16i8(<16 x i8> %va, <16 x i1> %m, i32 zeroext %evl) {278; CHECK-LABEL: vand_vi_v16i8:279; CHECK: # %bb.0:280; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma281; CHECK-NEXT: vand.vi v8, v8, 4, v0.t282; CHECK-NEXT: ret283 %v = call <16 x i8> @llvm.vp.and.v16i8(<16 x i8> %va, <16 x i8> splat (i8 4), <16 x i1> %m, i32 %evl)284 ret <16 x i8> %v285}286 287define <16 x i8> @vand_vi_v16i8_unmasked(<16 x i8> %va, i32 zeroext %evl) {288; CHECK-LABEL: vand_vi_v16i8_unmasked:289; CHECK: # %bb.0:290; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma291; CHECK-NEXT: vand.vi v8, v8, 4292; CHECK-NEXT: ret293 %v = call <16 x i8> @llvm.vp.and.v16i8(<16 x i8> %va, <16 x i8> splat (i8 4), <16 x i1> splat (i1 true), i32 %evl)294 ret <16 x i8> %v295}296 297define <2 x i16> @vand_vv_v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 zeroext %evl) {298; CHECK-LABEL: vand_vv_v2i16:299; CHECK: # %bb.0:300; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma301; CHECK-NEXT: vand.vv v8, v8, v9, v0.t302; CHECK-NEXT: ret303 %v = call <2 x i16> @llvm.vp.and.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 %evl)304 ret <2 x i16> %v305}306 307define <2 x i16> @vand_vv_v2i16_unmasked(<2 x i16> %va, <2 x i16> %b, i32 zeroext %evl) {308; CHECK-LABEL: vand_vv_v2i16_unmasked:309; CHECK: # %bb.0:310; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma311; CHECK-NEXT: vand.vv v8, v8, v9312; CHECK-NEXT: ret313 %v = call <2 x i16> @llvm.vp.and.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> splat (i1 true), i32 %evl)314 ret <2 x i16> %v315}316 317define <2 x i16> @vand_vx_v2i16(<2 x i16> %va, i16 %b, <2 x i1> %m, i32 zeroext %evl) {318; CHECK-LABEL: vand_vx_v2i16:319; CHECK: # %bb.0:320; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma321; CHECK-NEXT: vand.vx v8, v8, a0, v0.t322; CHECK-NEXT: ret323 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0324 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer325 %v = call <2 x i16> @llvm.vp.and.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> %m, i32 %evl)326 ret <2 x i16> %v327}328 329define <2 x i16> @vand_vx_v2i16_unmasked(<2 x i16> %va, i16 %b, i32 zeroext %evl) {330; CHECK-LABEL: vand_vx_v2i16_unmasked:331; CHECK: # %bb.0:332; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma333; CHECK-NEXT: vand.vx v8, v8, a0334; CHECK-NEXT: ret335 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0336 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer337 %v = call <2 x i16> @llvm.vp.and.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> splat (i1 true), i32 %evl)338 ret <2 x i16> %v339}340 341define <2 x i16> @vand_vi_v2i16(<2 x i16> %va, <2 x i1> %m, i32 zeroext %evl) {342; CHECK-LABEL: vand_vi_v2i16:343; CHECK: # %bb.0:344; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma345; CHECK-NEXT: vand.vi v8, v8, 4, v0.t346; CHECK-NEXT: ret347 %v = call <2 x i16> @llvm.vp.and.v2i16(<2 x i16> %va, <2 x i16> splat (i16 4), <2 x i1> %m, i32 %evl)348 ret <2 x i16> %v349}350 351define <2 x i16> @vand_vi_v2i16_unmasked(<2 x i16> %va, i32 zeroext %evl) {352; CHECK-LABEL: vand_vi_v2i16_unmasked:353; CHECK: # %bb.0:354; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma355; CHECK-NEXT: vand.vi v8, v8, 4356; CHECK-NEXT: ret357 %v = call <2 x i16> @llvm.vp.and.v2i16(<2 x i16> %va, <2 x i16> splat (i16 4), <2 x i1> splat (i1 true), i32 %evl)358 ret <2 x i16> %v359}360 361define <4 x i16> @vand_vv_v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 zeroext %evl) {362; CHECK-LABEL: vand_vv_v4i16:363; CHECK: # %bb.0:364; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma365; CHECK-NEXT: vand.vv v8, v8, v9, v0.t366; CHECK-NEXT: ret367 %v = call <4 x i16> @llvm.vp.and.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 %evl)368 ret <4 x i16> %v369}370 371define <4 x i16> @vand_vv_v4i16_unmasked(<4 x i16> %va, <4 x i16> %b, i32 zeroext %evl) {372; CHECK-LABEL: vand_vv_v4i16_unmasked:373; CHECK: # %bb.0:374; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma375; CHECK-NEXT: vand.vv v8, v8, v9376; CHECK-NEXT: ret377 %v = call <4 x i16> @llvm.vp.and.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> splat (i1 true), i32 %evl)378 ret <4 x i16> %v379}380 381define <4 x i16> @vand_vx_v4i16(<4 x i16> %va, i16 %b, <4 x i1> %m, i32 zeroext %evl) {382; CHECK-LABEL: vand_vx_v4i16:383; CHECK: # %bb.0:384; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma385; CHECK-NEXT: vand.vx v8, v8, a0, v0.t386; CHECK-NEXT: ret387 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0388 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer389 %v = call <4 x i16> @llvm.vp.and.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> %m, i32 %evl)390 ret <4 x i16> %v391}392 393define <4 x i16> @vand_vx_v4i16_unmasked(<4 x i16> %va, i16 %b, i32 zeroext %evl) {394; CHECK-LABEL: vand_vx_v4i16_unmasked:395; CHECK: # %bb.0:396; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma397; CHECK-NEXT: vand.vx v8, v8, a0398; CHECK-NEXT: ret399 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0400 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer401 %v = call <4 x i16> @llvm.vp.and.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> splat (i1 true), i32 %evl)402 ret <4 x i16> %v403}404 405define <4 x i16> @vand_vi_v4i16(<4 x i16> %va, <4 x i1> %m, i32 zeroext %evl) {406; CHECK-LABEL: vand_vi_v4i16:407; CHECK: # %bb.0:408; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma409; CHECK-NEXT: vand.vi v8, v8, 4, v0.t410; CHECK-NEXT: ret411 %v = call <4 x i16> @llvm.vp.and.v4i16(<4 x i16> %va, <4 x i16> splat (i16 4), <4 x i1> %m, i32 %evl)412 ret <4 x i16> %v413}414 415define <4 x i16> @vand_vi_v4i16_unmasked(<4 x i16> %va, i32 zeroext %evl) {416; CHECK-LABEL: vand_vi_v4i16_unmasked:417; CHECK: # %bb.0:418; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma419; CHECK-NEXT: vand.vi v8, v8, 4420; CHECK-NEXT: ret421 %v = call <4 x i16> @llvm.vp.and.v4i16(<4 x i16> %va, <4 x i16> splat (i16 4), <4 x i1> splat (i1 true), i32 %evl)422 ret <4 x i16> %v423}424 425define <8 x i16> @vand_vv_v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 zeroext %evl) {426; CHECK-LABEL: vand_vv_v8i16:427; CHECK: # %bb.0:428; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma429; CHECK-NEXT: vand.vv v8, v8, v9, v0.t430; CHECK-NEXT: ret431 %v = call <8 x i16> @llvm.vp.and.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 %evl)432 ret <8 x i16> %v433}434 435define <8 x i16> @vand_vv_v8i16_unmasked(<8 x i16> %va, <8 x i16> %b, i32 zeroext %evl) {436; CHECK-LABEL: vand_vv_v8i16_unmasked:437; CHECK: # %bb.0:438; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma439; CHECK-NEXT: vand.vv v8, v8, v9440; CHECK-NEXT: ret441 %v = call <8 x i16> @llvm.vp.and.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> splat (i1 true), i32 %evl)442 ret <8 x i16> %v443}444 445define <8 x i16> @vand_vx_v8i16(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {446; CHECK-LABEL: vand_vx_v8i16:447; CHECK: # %bb.0:448; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma449; CHECK-NEXT: vand.vx v8, v8, a0, v0.t450; CHECK-NEXT: ret451 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0452 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer453 %v = call <8 x i16> @llvm.vp.and.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> %m, i32 %evl)454 ret <8 x i16> %v455}456 457define <8 x i16> @vand_vx_v8i16_unmasked(<8 x i16> %va, i16 %b, i32 zeroext %evl) {458; CHECK-LABEL: vand_vx_v8i16_unmasked:459; CHECK: # %bb.0:460; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma461; CHECK-NEXT: vand.vx v8, v8, a0462; CHECK-NEXT: ret463 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0464 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer465 %v = call <8 x i16> @llvm.vp.and.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> splat (i1 true), i32 %evl)466 ret <8 x i16> %v467}468 469define <8 x i16> @vand_vi_v8i16(<8 x i16> %va, <8 x i1> %m, i32 zeroext %evl) {470; CHECK-LABEL: vand_vi_v8i16:471; CHECK: # %bb.0:472; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma473; CHECK-NEXT: vand.vi v8, v8, 4, v0.t474; CHECK-NEXT: ret475 %v = call <8 x i16> @llvm.vp.and.v8i16(<8 x i16> %va, <8 x i16> splat (i16 4), <8 x i1> %m, i32 %evl)476 ret <8 x i16> %v477}478 479define <8 x i16> @vand_vi_v8i16_unmasked(<8 x i16> %va, i32 zeroext %evl) {480; CHECK-LABEL: vand_vi_v8i16_unmasked:481; CHECK: # %bb.0:482; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma483; CHECK-NEXT: vand.vi v8, v8, 4484; CHECK-NEXT: ret485 %v = call <8 x i16> @llvm.vp.and.v8i16(<8 x i16> %va, <8 x i16> splat (i16 4), <8 x i1> splat (i1 true), i32 %evl)486 ret <8 x i16> %v487}488 489define <16 x i16> @vand_vv_v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 zeroext %evl) {490; CHECK-LABEL: vand_vv_v16i16:491; CHECK: # %bb.0:492; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma493; CHECK-NEXT: vand.vv v8, v8, v10, v0.t494; CHECK-NEXT: ret495 %v = call <16 x i16> @llvm.vp.and.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 %evl)496 ret <16 x i16> %v497}498 499define <16 x i16> @vand_vv_v16i16_unmasked(<16 x i16> %va, <16 x i16> %b, i32 zeroext %evl) {500; CHECK-LABEL: vand_vv_v16i16_unmasked:501; CHECK: # %bb.0:502; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma503; CHECK-NEXT: vand.vv v8, v8, v10504; CHECK-NEXT: ret505 %v = call <16 x i16> @llvm.vp.and.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> splat (i1 true), i32 %evl)506 ret <16 x i16> %v507}508 509define <16 x i16> @vand_vx_v16i16(<16 x i16> %va, i16 %b, <16 x i1> %m, i32 zeroext %evl) {510; CHECK-LABEL: vand_vx_v16i16:511; CHECK: # %bb.0:512; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma513; CHECK-NEXT: vand.vx v8, v8, a0, v0.t514; CHECK-NEXT: ret515 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0516 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer517 %v = call <16 x i16> @llvm.vp.and.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> %m, i32 %evl)518 ret <16 x i16> %v519}520 521define <16 x i16> @vand_vx_v16i16_unmasked(<16 x i16> %va, i16 %b, i32 zeroext %evl) {522; CHECK-LABEL: vand_vx_v16i16_unmasked:523; CHECK: # %bb.0:524; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma525; CHECK-NEXT: vand.vx v8, v8, a0526; CHECK-NEXT: ret527 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0528 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer529 %v = call <16 x i16> @llvm.vp.and.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> splat (i1 true), i32 %evl)530 ret <16 x i16> %v531}532 533define <16 x i16> @vand_vi_v16i16(<16 x i16> %va, <16 x i1> %m, i32 zeroext %evl) {534; CHECK-LABEL: vand_vi_v16i16:535; CHECK: # %bb.0:536; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma537; CHECK-NEXT: vand.vi v8, v8, 4, v0.t538; CHECK-NEXT: ret539 %v = call <16 x i16> @llvm.vp.and.v16i16(<16 x i16> %va, <16 x i16> splat (i16 4), <16 x i1> %m, i32 %evl)540 ret <16 x i16> %v541}542 543define <16 x i16> @vand_vi_v16i16_unmasked(<16 x i16> %va, i32 zeroext %evl) {544; CHECK-LABEL: vand_vi_v16i16_unmasked:545; CHECK: # %bb.0:546; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma547; CHECK-NEXT: vand.vi v8, v8, 4548; CHECK-NEXT: ret549 %v = call <16 x i16> @llvm.vp.and.v16i16(<16 x i16> %va, <16 x i16> splat (i16 4), <16 x i1> splat (i1 true), i32 %evl)550 ret <16 x i16> %v551}552 553define <2 x i32> @vand_vv_v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 zeroext %evl) {554; CHECK-LABEL: vand_vv_v2i32:555; CHECK: # %bb.0:556; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma557; CHECK-NEXT: vand.vv v8, v8, v9, v0.t558; CHECK-NEXT: ret559 %v = call <2 x i32> @llvm.vp.and.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 %evl)560 ret <2 x i32> %v561}562 563define <2 x i32> @vand_vv_v2i32_unmasked(<2 x i32> %va, <2 x i32> %b, i32 zeroext %evl) {564; CHECK-LABEL: vand_vv_v2i32_unmasked:565; CHECK: # %bb.0:566; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma567; CHECK-NEXT: vand.vv v8, v8, v9568; CHECK-NEXT: ret569 %v = call <2 x i32> @llvm.vp.and.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> splat (i1 true), i32 %evl)570 ret <2 x i32> %v571}572 573define <2 x i32> @vand_vx_v2i32(<2 x i32> %va, i32 %b, <2 x i1> %m, i32 zeroext %evl) {574; CHECK-LABEL: vand_vx_v2i32:575; CHECK: # %bb.0:576; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma577; CHECK-NEXT: vand.vx v8, v8, a0, v0.t578; CHECK-NEXT: ret579 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0580 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer581 %v = call <2 x i32> @llvm.vp.and.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> %m, i32 %evl)582 ret <2 x i32> %v583}584 585define <2 x i32> @vand_vx_v2i32_unmasked(<2 x i32> %va, i32 %b, i32 zeroext %evl) {586; CHECK-LABEL: vand_vx_v2i32_unmasked:587; CHECK: # %bb.0:588; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma589; CHECK-NEXT: vand.vx v8, v8, a0590; CHECK-NEXT: ret591 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0592 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer593 %v = call <2 x i32> @llvm.vp.and.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> splat (i1 true), i32 %evl)594 ret <2 x i32> %v595}596 597define <2 x i32> @vand_vi_v2i32(<2 x i32> %va, <2 x i1> %m, i32 zeroext %evl) {598; CHECK-LABEL: vand_vi_v2i32:599; CHECK: # %bb.0:600; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma601; CHECK-NEXT: vand.vi v8, v8, 4, v0.t602; CHECK-NEXT: ret603 %v = call <2 x i32> @llvm.vp.and.v2i32(<2 x i32> %va, <2 x i32> splat (i32 4), <2 x i1> %m, i32 %evl)604 ret <2 x i32> %v605}606 607define <2 x i32> @vand_vi_v2i32_unmasked(<2 x i32> %va, i32 zeroext %evl) {608; CHECK-LABEL: vand_vi_v2i32_unmasked:609; CHECK: # %bb.0:610; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma611; CHECK-NEXT: vand.vi v8, v8, 4612; CHECK-NEXT: ret613 %v = call <2 x i32> @llvm.vp.and.v2i32(<2 x i32> %va, <2 x i32> splat (i32 4), <2 x i1> splat (i1 true), i32 %evl)614 ret <2 x i32> %v615}616 617define <4 x i32> @vand_vv_v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 zeroext %evl) {618; CHECK-LABEL: vand_vv_v4i32:619; CHECK: # %bb.0:620; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma621; CHECK-NEXT: vand.vv v8, v8, v9, v0.t622; CHECK-NEXT: ret623 %v = call <4 x i32> @llvm.vp.and.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 %evl)624 ret <4 x i32> %v625}626 627define <4 x i32> @vand_vv_v4i32_unmasked(<4 x i32> %va, <4 x i32> %b, i32 zeroext %evl) {628; CHECK-LABEL: vand_vv_v4i32_unmasked:629; CHECK: # %bb.0:630; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma631; CHECK-NEXT: vand.vv v8, v8, v9632; CHECK-NEXT: ret633 %v = call <4 x i32> @llvm.vp.and.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> splat (i1 true), i32 %evl)634 ret <4 x i32> %v635}636 637define <4 x i32> @vand_vx_v4i32(<4 x i32> %va, i32 %b, <4 x i1> %m, i32 zeroext %evl) {638; CHECK-LABEL: vand_vx_v4i32:639; CHECK: # %bb.0:640; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma641; CHECK-NEXT: vand.vx v8, v8, a0, v0.t642; CHECK-NEXT: ret643 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0644 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer645 %v = call <4 x i32> @llvm.vp.and.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> %m, i32 %evl)646 ret <4 x i32> %v647}648 649define <4 x i32> @vand_vx_v4i32_unmasked(<4 x i32> %va, i32 %b, i32 zeroext %evl) {650; CHECK-LABEL: vand_vx_v4i32_unmasked:651; CHECK: # %bb.0:652; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma653; CHECK-NEXT: vand.vx v8, v8, a0654; CHECK-NEXT: ret655 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0656 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer657 %v = call <4 x i32> @llvm.vp.and.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> splat (i1 true), i32 %evl)658 ret <4 x i32> %v659}660 661define <4 x i32> @vand_vi_v4i32(<4 x i32> %va, <4 x i1> %m, i32 zeroext %evl) {662; CHECK-LABEL: vand_vi_v4i32:663; CHECK: # %bb.0:664; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma665; CHECK-NEXT: vand.vi v8, v8, 4, v0.t666; CHECK-NEXT: ret667 %v = call <4 x i32> @llvm.vp.and.v4i32(<4 x i32> %va, <4 x i32> splat (i32 4), <4 x i1> %m, i32 %evl)668 ret <4 x i32> %v669}670 671define <4 x i32> @vand_vi_v4i32_unmasked(<4 x i32> %va, i32 zeroext %evl) {672; CHECK-LABEL: vand_vi_v4i32_unmasked:673; CHECK: # %bb.0:674; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma675; CHECK-NEXT: vand.vi v8, v8, 4676; CHECK-NEXT: ret677 %v = call <4 x i32> @llvm.vp.and.v4i32(<4 x i32> %va, <4 x i32> splat (i32 4), <4 x i1> splat (i1 true), i32 %evl)678 ret <4 x i32> %v679}680 681define <8 x i32> @vand_vv_v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 zeroext %evl) {682; CHECK-LABEL: vand_vv_v8i32:683; CHECK: # %bb.0:684; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma685; CHECK-NEXT: vand.vv v8, v8, v10, v0.t686; CHECK-NEXT: ret687 %v = call <8 x i32> @llvm.vp.and.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 %evl)688 ret <8 x i32> %v689}690 691define <8 x i32> @vand_vv_v8i32_unmasked(<8 x i32> %va, <8 x i32> %b, i32 zeroext %evl) {692; CHECK-LABEL: vand_vv_v8i32_unmasked:693; CHECK: # %bb.0:694; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma695; CHECK-NEXT: vand.vv v8, v8, v10696; CHECK-NEXT: ret697 %v = call <8 x i32> @llvm.vp.and.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> splat (i1 true), i32 %evl)698 ret <8 x i32> %v699}700 701define <8 x i32> @vand_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {702; CHECK-LABEL: vand_vx_v8i32:703; CHECK: # %bb.0:704; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma705; CHECK-NEXT: vand.vx v8, v8, a0, v0.t706; CHECK-NEXT: ret707 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0708 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer709 %v = call <8 x i32> @llvm.vp.and.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 %evl)710 ret <8 x i32> %v711}712 713define <8 x i32> @vand_vx_v8i32_unmasked(<8 x i32> %va, i32 %b, i32 zeroext %evl) {714; CHECK-LABEL: vand_vx_v8i32_unmasked:715; CHECK: # %bb.0:716; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma717; CHECK-NEXT: vand.vx v8, v8, a0718; CHECK-NEXT: ret719 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0720 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer721 %v = call <8 x i32> @llvm.vp.and.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> splat (i1 true), i32 %evl)722 ret <8 x i32> %v723}724 725define <8 x i32> @vand_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {726; CHECK-LABEL: vand_vi_v8i32:727; CHECK: # %bb.0:728; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma729; CHECK-NEXT: vand.vi v8, v8, 4, v0.t730; CHECK-NEXT: ret731 %v = call <8 x i32> @llvm.vp.and.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), <8 x i1> %m, i32 %evl)732 ret <8 x i32> %v733}734 735define <8 x i32> @vand_vi_v8i32_unmasked(<8 x i32> %va, i32 zeroext %evl) {736; CHECK-LABEL: vand_vi_v8i32_unmasked:737; CHECK: # %bb.0:738; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma739; CHECK-NEXT: vand.vi v8, v8, 4740; CHECK-NEXT: ret741 %v = call <8 x i32> @llvm.vp.and.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), <8 x i1> splat (i1 true), i32 %evl)742 ret <8 x i32> %v743}744 745define <16 x i32> @vand_vv_v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 zeroext %evl) {746; CHECK-LABEL: vand_vv_v16i32:747; CHECK: # %bb.0:748; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma749; CHECK-NEXT: vand.vv v8, v8, v12, v0.t750; CHECK-NEXT: ret751 %v = call <16 x i32> @llvm.vp.and.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 %evl)752 ret <16 x i32> %v753}754 755define <16 x i32> @vand_vv_v16i32_unmasked(<16 x i32> %va, <16 x i32> %b, i32 zeroext %evl) {756; CHECK-LABEL: vand_vv_v16i32_unmasked:757; CHECK: # %bb.0:758; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma759; CHECK-NEXT: vand.vv v8, v8, v12760; CHECK-NEXT: ret761 %v = call <16 x i32> @llvm.vp.and.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> splat (i1 true), i32 %evl)762 ret <16 x i32> %v763}764 765define <16 x i32> @vand_vx_v16i32(<16 x i32> %va, i32 %b, <16 x i1> %m, i32 zeroext %evl) {766; CHECK-LABEL: vand_vx_v16i32:767; CHECK: # %bb.0:768; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma769; CHECK-NEXT: vand.vx v8, v8, a0, v0.t770; CHECK-NEXT: ret771 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0772 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer773 %v = call <16 x i32> @llvm.vp.and.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> %m, i32 %evl)774 ret <16 x i32> %v775}776 777define <16 x i32> @vand_vx_v16i32_unmasked(<16 x i32> %va, i32 %b, i32 zeroext %evl) {778; CHECK-LABEL: vand_vx_v16i32_unmasked:779; CHECK: # %bb.0:780; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma781; CHECK-NEXT: vand.vx v8, v8, a0782; CHECK-NEXT: ret783 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0784 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer785 %v = call <16 x i32> @llvm.vp.and.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> splat (i1 true), i32 %evl)786 ret <16 x i32> %v787}788 789define <16 x i32> @vand_vi_v16i32(<16 x i32> %va, <16 x i1> %m, i32 zeroext %evl) {790; CHECK-LABEL: vand_vi_v16i32:791; CHECK: # %bb.0:792; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma793; CHECK-NEXT: vand.vi v8, v8, 4, v0.t794; CHECK-NEXT: ret795 %v = call <16 x i32> @llvm.vp.and.v16i32(<16 x i32> %va, <16 x i32> splat (i32 4), <16 x i1> %m, i32 %evl)796 ret <16 x i32> %v797}798 799define <16 x i32> @vand_vi_v16i32_unmasked(<16 x i32> %va, i32 zeroext %evl) {800; CHECK-LABEL: vand_vi_v16i32_unmasked:801; CHECK: # %bb.0:802; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma803; CHECK-NEXT: vand.vi v8, v8, 4804; CHECK-NEXT: ret805 %v = call <16 x i32> @llvm.vp.and.v16i32(<16 x i32> %va, <16 x i32> splat (i32 4), <16 x i1> splat (i1 true), i32 %evl)806 ret <16 x i32> %v807}808 809define <2 x i64> @vand_vv_v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 zeroext %evl) {810; CHECK-LABEL: vand_vv_v2i64:811; CHECK: # %bb.0:812; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma813; CHECK-NEXT: vand.vv v8, v8, v9, v0.t814; CHECK-NEXT: ret815 %v = call <2 x i64> @llvm.vp.and.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 %evl)816 ret <2 x i64> %v817}818 819define <2 x i64> @vand_vv_v2i64_unmasked(<2 x i64> %va, <2 x i64> %b, i32 zeroext %evl) {820; CHECK-LABEL: vand_vv_v2i64_unmasked:821; CHECK: # %bb.0:822; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma823; CHECK-NEXT: vand.vv v8, v8, v9824; CHECK-NEXT: ret825 %v = call <2 x i64> @llvm.vp.and.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> splat (i1 true), i32 %evl)826 ret <2 x i64> %v827}828 829define <2 x i64> @vand_vx_v2i64(<2 x i64> %va, i64 %b, <2 x i1> %m, i32 zeroext %evl) {830; RV32-LABEL: vand_vx_v2i64:831; RV32: # %bb.0:832; RV32-NEXT: addi sp, sp, -16833; RV32-NEXT: .cfi_def_cfa_offset 16834; RV32-NEXT: sw a0, 8(sp)835; RV32-NEXT: sw a1, 12(sp)836; RV32-NEXT: addi a0, sp, 8837; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma838; RV32-NEXT: vlse64.v v9, (a0), zero839; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma840; RV32-NEXT: vand.vv v8, v8, v9, v0.t841; RV32-NEXT: addi sp, sp, 16842; RV32-NEXT: .cfi_def_cfa_offset 0843; RV32-NEXT: ret844;845; RV64-LABEL: vand_vx_v2i64:846; RV64: # %bb.0:847; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma848; RV64-NEXT: vand.vx v8, v8, a0, v0.t849; RV64-NEXT: ret850 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0851 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer852 %v = call <2 x i64> @llvm.vp.and.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> %m, i32 %evl)853 ret <2 x i64> %v854}855 856define <2 x i64> @vand_vx_v2i64_unmasked(<2 x i64> %va, i64 %b, i32 zeroext %evl) {857; RV32-LABEL: vand_vx_v2i64_unmasked:858; RV32: # %bb.0:859; RV32-NEXT: addi sp, sp, -16860; RV32-NEXT: .cfi_def_cfa_offset 16861; RV32-NEXT: sw a0, 8(sp)862; RV32-NEXT: sw a1, 12(sp)863; RV32-NEXT: addi a0, sp, 8864; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma865; RV32-NEXT: vlse64.v v9, (a0), zero866; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma867; RV32-NEXT: vand.vv v8, v8, v9868; RV32-NEXT: addi sp, sp, 16869; RV32-NEXT: .cfi_def_cfa_offset 0870; RV32-NEXT: ret871;872; RV64-LABEL: vand_vx_v2i64_unmasked:873; RV64: # %bb.0:874; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma875; RV64-NEXT: vand.vx v8, v8, a0876; RV64-NEXT: ret877 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0878 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer879 %v = call <2 x i64> @llvm.vp.and.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> splat (i1 true), i32 %evl)880 ret <2 x i64> %v881}882 883define <2 x i64> @vand_vi_v2i64(<2 x i64> %va, <2 x i1> %m, i32 zeroext %evl) {884; CHECK-LABEL: vand_vi_v2i64:885; CHECK: # %bb.0:886; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma887; CHECK-NEXT: vand.vi v8, v8, 4, v0.t888; CHECK-NEXT: ret889 %v = call <2 x i64> @llvm.vp.and.v2i64(<2 x i64> %va, <2 x i64> splat (i64 4), <2 x i1> %m, i32 %evl)890 ret <2 x i64> %v891}892 893define <2 x i64> @vand_vi_v2i64_unmasked(<2 x i64> %va, i32 zeroext %evl) {894; CHECK-LABEL: vand_vi_v2i64_unmasked:895; CHECK: # %bb.0:896; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma897; CHECK-NEXT: vand.vi v8, v8, 4898; CHECK-NEXT: ret899 %v = call <2 x i64> @llvm.vp.and.v2i64(<2 x i64> %va, <2 x i64> splat (i64 4), <2 x i1> splat (i1 true), i32 %evl)900 ret <2 x i64> %v901}902 903define <4 x i64> @vand_vv_v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 zeroext %evl) {904; CHECK-LABEL: vand_vv_v4i64:905; CHECK: # %bb.0:906; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma907; CHECK-NEXT: vand.vv v8, v8, v10, v0.t908; CHECK-NEXT: ret909 %v = call <4 x i64> @llvm.vp.and.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 %evl)910 ret <4 x i64> %v911}912 913define <4 x i64> @vand_vv_v4i64_unmasked(<4 x i64> %va, <4 x i64> %b, i32 zeroext %evl) {914; CHECK-LABEL: vand_vv_v4i64_unmasked:915; CHECK: # %bb.0:916; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma917; CHECK-NEXT: vand.vv v8, v8, v10918; CHECK-NEXT: ret919 %v = call <4 x i64> @llvm.vp.and.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> splat (i1 true), i32 %evl)920 ret <4 x i64> %v921}922 923define <4 x i64> @vand_vx_v4i64(<4 x i64> %va, i64 %b, <4 x i1> %m, i32 zeroext %evl) {924; RV32-LABEL: vand_vx_v4i64:925; RV32: # %bb.0:926; RV32-NEXT: addi sp, sp, -16927; RV32-NEXT: .cfi_def_cfa_offset 16928; RV32-NEXT: sw a0, 8(sp)929; RV32-NEXT: sw a1, 12(sp)930; RV32-NEXT: addi a0, sp, 8931; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma932; RV32-NEXT: vlse64.v v10, (a0), zero933; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma934; RV32-NEXT: vand.vv v8, v8, v10, v0.t935; RV32-NEXT: addi sp, sp, 16936; RV32-NEXT: .cfi_def_cfa_offset 0937; RV32-NEXT: ret938;939; RV64-LABEL: vand_vx_v4i64:940; RV64: # %bb.0:941; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma942; RV64-NEXT: vand.vx v8, v8, a0, v0.t943; RV64-NEXT: ret944 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0945 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer946 %v = call <4 x i64> @llvm.vp.and.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> %m, i32 %evl)947 ret <4 x i64> %v948}949 950define <4 x i64> @vand_vx_v4i64_unmasked(<4 x i64> %va, i64 %b, i32 zeroext %evl) {951; RV32-LABEL: vand_vx_v4i64_unmasked:952; RV32: # %bb.0:953; RV32-NEXT: addi sp, sp, -16954; RV32-NEXT: .cfi_def_cfa_offset 16955; RV32-NEXT: sw a0, 8(sp)956; RV32-NEXT: sw a1, 12(sp)957; RV32-NEXT: addi a0, sp, 8958; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma959; RV32-NEXT: vlse64.v v10, (a0), zero960; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma961; RV32-NEXT: vand.vv v8, v8, v10962; RV32-NEXT: addi sp, sp, 16963; RV32-NEXT: .cfi_def_cfa_offset 0964; RV32-NEXT: ret965;966; RV64-LABEL: vand_vx_v4i64_unmasked:967; RV64: # %bb.0:968; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma969; RV64-NEXT: vand.vx v8, v8, a0970; RV64-NEXT: ret971 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0972 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer973 %v = call <4 x i64> @llvm.vp.and.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> splat (i1 true), i32 %evl)974 ret <4 x i64> %v975}976 977define <4 x i64> @vand_vi_v4i64(<4 x i64> %va, <4 x i1> %m, i32 zeroext %evl) {978; CHECK-LABEL: vand_vi_v4i64:979; CHECK: # %bb.0:980; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma981; CHECK-NEXT: vand.vi v8, v8, 4, v0.t982; CHECK-NEXT: ret983 %v = call <4 x i64> @llvm.vp.and.v4i64(<4 x i64> %va, <4 x i64> splat (i64 4), <4 x i1> %m, i32 %evl)984 ret <4 x i64> %v985}986 987define <4 x i64> @vand_vi_v4i64_unmasked(<4 x i64> %va, i32 zeroext %evl) {988; CHECK-LABEL: vand_vi_v4i64_unmasked:989; CHECK: # %bb.0:990; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma991; CHECK-NEXT: vand.vi v8, v8, 4992; CHECK-NEXT: ret993 %v = call <4 x i64> @llvm.vp.and.v4i64(<4 x i64> %va, <4 x i64> splat (i64 4), <4 x i1> splat (i1 true), i32 %evl)994 ret <4 x i64> %v995}996 997define <8 x i64> @vand_vv_v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 zeroext %evl) {998; CHECK-LABEL: vand_vv_v8i64:999; CHECK: # %bb.0:1000; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1001; CHECK-NEXT: vand.vv v8, v8, v12, v0.t1002; CHECK-NEXT: ret1003 %v = call <8 x i64> @llvm.vp.and.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 %evl)1004 ret <8 x i64> %v1005}1006 1007define <8 x i64> @vand_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %b, i32 zeroext %evl) {1008; CHECK-LABEL: vand_vv_v8i64_unmasked:1009; CHECK: # %bb.0:1010; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1011; CHECK-NEXT: vand.vv v8, v8, v121012; CHECK-NEXT: ret1013 %v = call <8 x i64> @llvm.vp.and.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> splat (i1 true), i32 %evl)1014 ret <8 x i64> %v1015}1016 1017define <8 x i64> @vand_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {1018; RV32-LABEL: vand_vx_v8i64:1019; RV32: # %bb.0:1020; RV32-NEXT: addi sp, sp, -161021; RV32-NEXT: .cfi_def_cfa_offset 161022; RV32-NEXT: sw a0, 8(sp)1023; RV32-NEXT: sw a1, 12(sp)1024; RV32-NEXT: addi a0, sp, 81025; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma1026; RV32-NEXT: vlse64.v v12, (a0), zero1027; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1028; RV32-NEXT: vand.vv v8, v8, v12, v0.t1029; RV32-NEXT: addi sp, sp, 161030; RV32-NEXT: .cfi_def_cfa_offset 01031; RV32-NEXT: ret1032;1033; RV64-LABEL: vand_vx_v8i64:1034; RV64: # %bb.0:1035; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1036; RV64-NEXT: vand.vx v8, v8, a0, v0.t1037; RV64-NEXT: ret1038 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 01039 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1040 %v = call <8 x i64> @llvm.vp.and.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1041 ret <8 x i64> %v1042}1043 1044define <8 x i64> @vand_vx_v8i64_unmasked(<8 x i64> %va, i64 %b, i32 zeroext %evl) {1045; RV32-LABEL: vand_vx_v8i64_unmasked:1046; RV32: # %bb.0:1047; RV32-NEXT: addi sp, sp, -161048; RV32-NEXT: .cfi_def_cfa_offset 161049; RV32-NEXT: sw a0, 8(sp)1050; RV32-NEXT: sw a1, 12(sp)1051; RV32-NEXT: addi a0, sp, 81052; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma1053; RV32-NEXT: vlse64.v v12, (a0), zero1054; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1055; RV32-NEXT: vand.vv v8, v8, v121056; RV32-NEXT: addi sp, sp, 161057; RV32-NEXT: .cfi_def_cfa_offset 01058; RV32-NEXT: ret1059;1060; RV64-LABEL: vand_vx_v8i64_unmasked:1061; RV64: # %bb.0:1062; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1063; RV64-NEXT: vand.vx v8, v8, a01064; RV64-NEXT: ret1065 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 01066 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1067 %v = call <8 x i64> @llvm.vp.and.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> splat (i1 true), i32 %evl)1068 ret <8 x i64> %v1069}1070 1071define <8 x i64> @vand_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {1072; CHECK-LABEL: vand_vi_v8i64:1073; CHECK: # %bb.0:1074; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1075; CHECK-NEXT: vand.vi v8, v8, 4, v0.t1076; CHECK-NEXT: ret1077 %v = call <8 x i64> @llvm.vp.and.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), <8 x i1> %m, i32 %evl)1078 ret <8 x i64> %v1079}1080 1081define <8 x i64> @vand_vi_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {1082; CHECK-LABEL: vand_vi_v8i64_unmasked:1083; CHECK: # %bb.0:1084; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1085; CHECK-NEXT: vand.vi v8, v8, 41086; CHECK-NEXT: ret1087 %v = call <8 x i64> @llvm.vp.and.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), <8 x i1> splat (i1 true), i32 %evl)1088 ret <8 x i64> %v1089}1090 1091define <11 x i64> @vand_vv_v11i64(<11 x i64> %va, <11 x i64> %b, <11 x i1> %m, i32 zeroext %evl) {1092; CHECK-LABEL: vand_vv_v11i64:1093; CHECK: # %bb.0:1094; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1095; CHECK-NEXT: vand.vv v8, v8, v16, v0.t1096; CHECK-NEXT: ret1097 %v = call <11 x i64> @llvm.vp.and.v11i64(<11 x i64> %va, <11 x i64> %b, <11 x i1> %m, i32 %evl)1098 ret <11 x i64> %v1099}1100 1101define <11 x i64> @vand_vv_v11i64_unmasked(<11 x i64> %va, <11 x i64> %b, i32 zeroext %evl) {1102; CHECK-LABEL: vand_vv_v11i64_unmasked:1103; CHECK: # %bb.0:1104; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1105; CHECK-NEXT: vand.vv v8, v8, v161106; CHECK-NEXT: ret1107 %v = call <11 x i64> @llvm.vp.and.v11i64(<11 x i64> %va, <11 x i64> %b, <11 x i1> splat (i1 true), i32 %evl)1108 ret <11 x i64> %v1109}1110 1111define <11 x i64> @vand_vx_v11i64(<11 x i64> %va, i64 %b, <11 x i1> %m, i32 zeroext %evl) {1112; RV32-LABEL: vand_vx_v11i64:1113; RV32: # %bb.0:1114; RV32-NEXT: addi sp, sp, -161115; RV32-NEXT: .cfi_def_cfa_offset 161116; RV32-NEXT: sw a0, 8(sp)1117; RV32-NEXT: sw a1, 12(sp)1118; RV32-NEXT: addi a0, sp, 81119; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma1120; RV32-NEXT: vlse64.v v16, (a0), zero1121; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1122; RV32-NEXT: vand.vv v8, v8, v16, v0.t1123; RV32-NEXT: addi sp, sp, 161124; RV32-NEXT: .cfi_def_cfa_offset 01125; RV32-NEXT: ret1126;1127; RV64-LABEL: vand_vx_v11i64:1128; RV64: # %bb.0:1129; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1130; RV64-NEXT: vand.vx v8, v8, a0, v0.t1131; RV64-NEXT: ret1132 %elt.head = insertelement <11 x i64> poison, i64 %b, i32 01133 %vb = shufflevector <11 x i64> %elt.head, <11 x i64> poison, <11 x i32> zeroinitializer1134 %v = call <11 x i64> @llvm.vp.and.v11i64(<11 x i64> %va, <11 x i64> %vb, <11 x i1> %m, i32 %evl)1135 ret <11 x i64> %v1136}1137 1138define <11 x i64> @vand_vx_v11i64_unmasked(<11 x i64> %va, i64 %b, i32 zeroext %evl) {1139; RV32-LABEL: vand_vx_v11i64_unmasked:1140; RV32: # %bb.0:1141; RV32-NEXT: addi sp, sp, -161142; RV32-NEXT: .cfi_def_cfa_offset 161143; RV32-NEXT: sw a0, 8(sp)1144; RV32-NEXT: sw a1, 12(sp)1145; RV32-NEXT: addi a0, sp, 81146; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma1147; RV32-NEXT: vlse64.v v16, (a0), zero1148; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1149; RV32-NEXT: vand.vv v8, v8, v161150; RV32-NEXT: addi sp, sp, 161151; RV32-NEXT: .cfi_def_cfa_offset 01152; RV32-NEXT: ret1153;1154; RV64-LABEL: vand_vx_v11i64_unmasked:1155; RV64: # %bb.0:1156; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1157; RV64-NEXT: vand.vx v8, v8, a01158; RV64-NEXT: ret1159 %elt.head = insertelement <11 x i64> poison, i64 %b, i32 01160 %vb = shufflevector <11 x i64> %elt.head, <11 x i64> poison, <11 x i32> zeroinitializer1161 %v = call <11 x i64> @llvm.vp.and.v11i64(<11 x i64> %va, <11 x i64> %vb, <11 x i1> splat (i1 true), i32 %evl)1162 ret <11 x i64> %v1163}1164 1165define <11 x i64> @vand_vi_v11i64(<11 x i64> %va, <11 x i1> %m, i32 zeroext %evl) {1166; CHECK-LABEL: vand_vi_v11i64:1167; CHECK: # %bb.0:1168; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1169; CHECK-NEXT: vand.vi v8, v8, 4, v0.t1170; CHECK-NEXT: ret1171 %v = call <11 x i64> @llvm.vp.and.v11i64(<11 x i64> %va, <11 x i64> splat (i64 4), <11 x i1> %m, i32 %evl)1172 ret <11 x i64> %v1173}1174 1175define <11 x i64> @vand_vi_v11i64_unmasked(<11 x i64> %va, i32 zeroext %evl) {1176; CHECK-LABEL: vand_vi_v11i64_unmasked:1177; CHECK: # %bb.0:1178; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1179; CHECK-NEXT: vand.vi v8, v8, 41180; CHECK-NEXT: ret1181 %v = call <11 x i64> @llvm.vp.and.v11i64(<11 x i64> %va, <11 x i64> splat (i64 4), <11 x i1> splat (i1 true), i32 %evl)1182 ret <11 x i64> %v1183}1184 1185define <16 x i64> @vand_vv_v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 zeroext %evl) {1186; CHECK-LABEL: vand_vv_v16i64:1187; CHECK: # %bb.0:1188; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1189; CHECK-NEXT: vand.vv v8, v8, v16, v0.t1190; CHECK-NEXT: ret1191 %v = call <16 x i64> @llvm.vp.and.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 %evl)1192 ret <16 x i64> %v1193}1194 1195define <16 x i64> @vand_vv_v16i64_unmasked(<16 x i64> %va, <16 x i64> %b, i32 zeroext %evl) {1196; CHECK-LABEL: vand_vv_v16i64_unmasked:1197; CHECK: # %bb.0:1198; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1199; CHECK-NEXT: vand.vv v8, v8, v161200; CHECK-NEXT: ret1201 %v = call <16 x i64> @llvm.vp.and.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> splat (i1 true), i32 %evl)1202 ret <16 x i64> %v1203}1204 1205define <16 x i64> @vand_vx_v16i64(<16 x i64> %va, i64 %b, <16 x i1> %m, i32 zeroext %evl) {1206; RV32-LABEL: vand_vx_v16i64:1207; RV32: # %bb.0:1208; RV32-NEXT: addi sp, sp, -161209; RV32-NEXT: .cfi_def_cfa_offset 161210; RV32-NEXT: sw a0, 8(sp)1211; RV32-NEXT: sw a1, 12(sp)1212; RV32-NEXT: addi a0, sp, 81213; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma1214; RV32-NEXT: vlse64.v v16, (a0), zero1215; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1216; RV32-NEXT: vand.vv v8, v8, v16, v0.t1217; RV32-NEXT: addi sp, sp, 161218; RV32-NEXT: .cfi_def_cfa_offset 01219; RV32-NEXT: ret1220;1221; RV64-LABEL: vand_vx_v16i64:1222; RV64: # %bb.0:1223; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1224; RV64-NEXT: vand.vx v8, v8, a0, v0.t1225; RV64-NEXT: ret1226 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 01227 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer1228 %v = call <16 x i64> @llvm.vp.and.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> %m, i32 %evl)1229 ret <16 x i64> %v1230}1231 1232define <16 x i64> @vand_vx_v16i64_unmasked(<16 x i64> %va, i64 %b, i32 zeroext %evl) {1233; RV32-LABEL: vand_vx_v16i64_unmasked:1234; RV32: # %bb.0:1235; RV32-NEXT: addi sp, sp, -161236; RV32-NEXT: .cfi_def_cfa_offset 161237; RV32-NEXT: sw a0, 8(sp)1238; RV32-NEXT: sw a1, 12(sp)1239; RV32-NEXT: addi a0, sp, 81240; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma1241; RV32-NEXT: vlse64.v v16, (a0), zero1242; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1243; RV32-NEXT: vand.vv v8, v8, v161244; RV32-NEXT: addi sp, sp, 161245; RV32-NEXT: .cfi_def_cfa_offset 01246; RV32-NEXT: ret1247;1248; RV64-LABEL: vand_vx_v16i64_unmasked:1249; RV64: # %bb.0:1250; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1251; RV64-NEXT: vand.vx v8, v8, a01252; RV64-NEXT: ret1253 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 01254 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer1255 %v = call <16 x i64> @llvm.vp.and.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> splat (i1 true), i32 %evl)1256 ret <16 x i64> %v1257}1258 1259define <16 x i64> @vand_vi_v16i64(<16 x i64> %va, <16 x i1> %m, i32 zeroext %evl) {1260; CHECK-LABEL: vand_vi_v16i64:1261; CHECK: # %bb.0:1262; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1263; CHECK-NEXT: vand.vi v8, v8, 4, v0.t1264; CHECK-NEXT: ret1265 %v = call <16 x i64> @llvm.vp.and.v16i64(<16 x i64> %va, <16 x i64> splat (i64 4), <16 x i1> %m, i32 %evl)1266 ret <16 x i64> %v1267}1268 1269define <16 x i64> @vand_vi_v16i64_unmasked(<16 x i64> %va, i32 zeroext %evl) {1270; CHECK-LABEL: vand_vi_v16i64_unmasked:1271; CHECK: # %bb.0:1272; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1273; CHECK-NEXT: vand.vi v8, v8, 41274; CHECK-NEXT: ret1275 %v = call <16 x i64> @llvm.vp.and.v16i64(<16 x i64> %va, <16 x i64> splat (i64 4), <16 x i1> splat (i1 true), i32 %evl)1276 ret <16 x i64> %v1277}1278