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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v -target-abi=ilp32d \3; RUN: -verify-machineinstrs < %s | FileCheck %s4; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v -target-abi=lp64d \5; RUN: -verify-machineinstrs < %s | FileCheck %s6 7define <2 x i1> @isnan_v2f16(<2 x half> %x) {8; CHECK-LABEL: isnan_v2f16:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma11; CHECK-NEXT: vfclass.v v8, v812; CHECK-NEXT: li a0, 76813; CHECK-NEXT: vand.vx v8, v8, a014; CHECK-NEXT: vmsne.vi v0, v8, 015; CHECK-NEXT: ret16 %1 = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> %x, i32 3) ; nan17 ret <2 x i1> %118}19 20define <2 x i1> @isnan_v2f32(<2 x float> %x) {21; CHECK-LABEL: isnan_v2f32:22; CHECK: # %bb.0:23; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma24; CHECK-NEXT: vfclass.v v8, v825; CHECK-NEXT: li a0, 92726; CHECK-NEXT: vand.vx v8, v8, a027; CHECK-NEXT: vmsne.vi v0, v8, 028; CHECK-NEXT: ret29 %1 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 639)30 ret <2 x i1> %131}32 33define <4 x i1> @isnan_v4f32(<4 x float> %x) {34; CHECK-LABEL: isnan_v4f32:35; CHECK: # %bb.0:36; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma37; CHECK-NEXT: vfclass.v v8, v838; CHECK-NEXT: li a0, 76839; CHECK-NEXT: vand.vx v8, v8, a040; CHECK-NEXT: vmsne.vi v0, v8, 041; CHECK-NEXT: ret42 %1 = call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> %x, i32 3) ; nan43 ret <4 x i1> %144}45 46define <8 x i1> @isnan_v8f32(<8 x float> %x) {47; CHECK-LABEL: isnan_v8f32:48; CHECK: # %bb.0:49; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma50; CHECK-NEXT: vfclass.v v8, v851; CHECK-NEXT: li a0, 51252; CHECK-NEXT: vmseq.vx v0, v8, a053; CHECK-NEXT: ret54 %1 = call <8 x i1> @llvm.is.fpclass.v8f32(<8 x float> %x, i32 2)55 ret <8 x i1> %156}57 58define <16 x i1> @isnan_v16f32(<16 x float> %x) {59; CHECK-LABEL: isnan_v16f32:60; CHECK: # %bb.0:61; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma62; CHECK-NEXT: vfclass.v v8, v863; CHECK-NEXT: li a0, 25664; CHECK-NEXT: vmseq.vx v0, v8, a065; CHECK-NEXT: ret66 %1 = call <16 x i1> @llvm.is.fpclass.v16f32(<16 x float> %x, i32 1)67 ret <16 x i1> %168}69 70define <2 x i1> @isnormal_v2f64(<2 x double> %x) {71; CHECK-LABEL: isnormal_v2f64:72; CHECK: # %bb.0:73; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma74; CHECK-NEXT: vfclass.v v8, v875; CHECK-NEXT: li a0, 12976; CHECK-NEXT: vand.vx v8, v8, a077; CHECK-NEXT: vmsne.vi v0, v8, 078; CHECK-NEXT: ret79 %1 = call <2 x i1> @llvm.is.fpclass.v2f64(<2 x double> %x, i32 516) ; 0x204 = "inf"80 ret <2 x i1> %181}82 83define <4 x i1> @isposinf_v4f64(<4 x double> %x) {84; CHECK-LABEL: isposinf_v4f64:85; CHECK: # %bb.0:86; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma87; CHECK-NEXT: vfclass.v v8, v888; CHECK-NEXT: li a0, 12889; CHECK-NEXT: vmseq.vx v0, v8, a090; CHECK-NEXT: ret91 %1 = call <4 x i1> @llvm.is.fpclass.v4f64(<4 x double> %x, i32 512) ; 0x200 = "+inf"92 ret <4 x i1> %193}94 95define <8 x i1> @isneginf_v8f64(<8 x double> %x) {96; CHECK-LABEL: isneginf_v8f64:97; CHECK: # %bb.0:98; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma99; CHECK-NEXT: vfclass.v v8, v8100; CHECK-NEXT: vmseq.vi v0, v8, 1101; CHECK-NEXT: ret102 %1 = call <8 x i1> @llvm.is.fpclass.v8f64(<8 x double> %x, i32 4) ; "-inf"103 ret <8 x i1> %1104}105 106define <16 x i1> @isfinite_v16f64(<16 x double> %x) {107; CHECK-LABEL: isfinite_v16f64:108; CHECK: # %bb.0:109; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma110; CHECK-NEXT: vfclass.v v8, v8111; CHECK-NEXT: li a0, 126112; CHECK-NEXT: vand.vx v8, v8, a0113; CHECK-NEXT: vmsne.vi v0, v8, 0114; CHECK-NEXT: ret115 %1 = call <16 x i1> @llvm.is.fpclass.v16f64(<16 x double> %x, i32 504) ; 0x1f8 = "finite"116 ret <16 x i1> %1117}118 119define <16 x i1> @isposfinite_v16f64(<16 x double> %x) {120; CHECK-LABEL: isposfinite_v16f64:121; CHECK: # %bb.0:122; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma123; CHECK-NEXT: vfclass.v v8, v8124; CHECK-NEXT: li a0, 112125; CHECK-NEXT: vand.vx v8, v8, a0126; CHECK-NEXT: vmsne.vi v0, v8, 0127; CHECK-NEXT: ret128 %1 = call <16 x i1> @llvm.is.fpclass.v16f64(<16 x double> %x, i32 448) ; 0x1c0 = "+finite"129 ret <16 x i1> %1130}131 132define <16 x i1> @isnegfinite_v16f64(<16 x double> %x) {133; CHECK-LABEL: isnegfinite_v16f64:134; CHECK: # %bb.0:135; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma136; CHECK-NEXT: vfclass.v v8, v8137; CHECK-NEXT: vand.vi v8, v8, 14138; CHECK-NEXT: vmsne.vi v0, v8, 0139; CHECK-NEXT: ret140 %1 = call <16 x i1> @llvm.is.fpclass.v16f64(<16 x double> %x, i32 56) ; 0x38 = "-finite"141 ret <16 x i1> %1142}143 144define <16 x i1> @isnotfinite_v16f64(<16 x double> %x) {145; CHECK-LABEL: isnotfinite_v16f64:146; CHECK: # %bb.0:147; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma148; CHECK-NEXT: vfclass.v v8, v8149; CHECK-NEXT: li a0, 897150; CHECK-NEXT: vand.vx v8, v8, a0151; CHECK-NEXT: vmsne.vi v0, v8, 0152; CHECK-NEXT: ret153 %1 = call <16 x i1> @llvm.is.fpclass.v16f64(<16 x double> %x, i32 519) ; 0x207 = "inf|nan"154 ret <16 x i1> %1155}156 157