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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh,+f,+d -target-abi=ilp32d \3; RUN: -verify-machineinstrs < %s | FileCheck %s4; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh,+f,+d -target-abi=lp64d \5; RUN: -verify-machineinstrs < %s | FileCheck %s6 7define <2 x float> @vfwmul_v2f16(ptr %x, ptr %y) {8; CHECK-LABEL: vfwmul_v2f16:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma11; CHECK-NEXT: vle16.v v9, (a0)12; CHECK-NEXT: vle16.v v10, (a1)13; CHECK-NEXT: vfwmul.vv v8, v9, v1014; CHECK-NEXT: ret15 %a = load <2 x half>, ptr %x16 %b = load <2 x half>, ptr %y17 %c = fpext <2 x half> %a to <2 x float>18 %d = fpext <2 x half> %b to <2 x float>19 %e = fmul <2 x float> %c, %d20 ret <2 x float> %e21}22 23define <4 x float> @vfwmul_v4f16(ptr %x, ptr %y) {24; CHECK-LABEL: vfwmul_v4f16:25; CHECK: # %bb.0:26; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma27; CHECK-NEXT: vle16.v v9, (a0)28; CHECK-NEXT: vle16.v v10, (a1)29; CHECK-NEXT: vfwmul.vv v8, v9, v1030; CHECK-NEXT: ret31 %a = load <4 x half>, ptr %x32 %b = load <4 x half>, ptr %y33 %c = fpext <4 x half> %a to <4 x float>34 %d = fpext <4 x half> %b to <4 x float>35 %e = fmul <4 x float> %c, %d36 ret <4 x float> %e37}38 39define <8 x float> @vfwmul_v8f16(ptr %x, ptr %y) {40; CHECK-LABEL: vfwmul_v8f16:41; CHECK: # %bb.0:42; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma43; CHECK-NEXT: vle16.v v10, (a0)44; CHECK-NEXT: vle16.v v11, (a1)45; CHECK-NEXT: vfwmul.vv v8, v10, v1146; CHECK-NEXT: ret47 %a = load <8 x half>, ptr %x48 %b = load <8 x half>, ptr %y49 %c = fpext <8 x half> %a to <8 x float>50 %d = fpext <8 x half> %b to <8 x float>51 %e = fmul <8 x float> %c, %d52 ret <8 x float> %e53}54 55define <16 x float> @vfwmul_v16f16(ptr %x, ptr %y) {56; CHECK-LABEL: vfwmul_v16f16:57; CHECK: # %bb.0:58; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma59; CHECK-NEXT: vle16.v v12, (a0)60; CHECK-NEXT: vle16.v v14, (a1)61; CHECK-NEXT: vfwmul.vv v8, v12, v1462; CHECK-NEXT: ret63 %a = load <16 x half>, ptr %x64 %b = load <16 x half>, ptr %y65 %c = fpext <16 x half> %a to <16 x float>66 %d = fpext <16 x half> %b to <16 x float>67 %e = fmul <16 x float> %c, %d68 ret <16 x float> %e69}70 71define <32 x float> @vfwmul_v32f16(ptr %x, ptr %y) {72; CHECK-LABEL: vfwmul_v32f16:73; CHECK: # %bb.0:74; CHECK-NEXT: li a2, 3275; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma76; CHECK-NEXT: vle16.v v16, (a0)77; CHECK-NEXT: vle16.v v20, (a1)78; CHECK-NEXT: vfwmul.vv v8, v16, v2079; CHECK-NEXT: ret80 %a = load <32 x half>, ptr %x81 %b = load <32 x half>, ptr %y82 %c = fpext <32 x half> %a to <32 x float>83 %d = fpext <32 x half> %b to <32 x float>84 %e = fmul <32 x float> %c, %d85 ret <32 x float> %e86}87 88define <64 x float> @vfwmul_v64f16(ptr %x, ptr %y) {89; CHECK-LABEL: vfwmul_v64f16:90; CHECK: # %bb.0:91; CHECK-NEXT: addi sp, sp, -1692; CHECK-NEXT: .cfi_def_cfa_offset 1693; CHECK-NEXT: csrr a2, vlenb94; CHECK-NEXT: slli a2, a2, 395; CHECK-NEXT: sub sp, sp, a296; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb97; CHECK-NEXT: li a2, 6498; CHECK-NEXT: vsetvli zero, a2, e16, m8, ta, ma99; CHECK-NEXT: vle16.v v16, (a0)100; CHECK-NEXT: vle16.v v24, (a1)101; CHECK-NEXT: li a0, 32102; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma103; CHECK-NEXT: vslidedown.vx v8, v16, a0104; CHECK-NEXT: addi a1, sp, 16105; CHECK-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill106; CHECK-NEXT: vslidedown.vx v0, v24, a0107; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma108; CHECK-NEXT: vfwmul.vv v8, v16, v24109; CHECK-NEXT: addi a0, sp, 16110; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload111; CHECK-NEXT: vfwmul.vv v16, v24, v0112; CHECK-NEXT: csrr a0, vlenb113; CHECK-NEXT: slli a0, a0, 3114; CHECK-NEXT: add sp, sp, a0115; CHECK-NEXT: .cfi_def_cfa sp, 16116; CHECK-NEXT: addi sp, sp, 16117; CHECK-NEXT: .cfi_def_cfa_offset 0118; CHECK-NEXT: ret119 %a = load <64 x half>, ptr %x120 %b = load <64 x half>, ptr %y121 %c = fpext <64 x half> %a to <64 x float>122 %d = fpext <64 x half> %b to <64 x float>123 %e = fmul <64 x float> %c, %d124 ret <64 x float> %e125}126 127define <2 x double> @vfwmul_v2f32(ptr %x, ptr %y) {128; CHECK-LABEL: vfwmul_v2f32:129; CHECK: # %bb.0:130; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma131; CHECK-NEXT: vle32.v v9, (a0)132; CHECK-NEXT: vle32.v v10, (a1)133; CHECK-NEXT: vfwmul.vv v8, v9, v10134; CHECK-NEXT: ret135 %a = load <2 x float>, ptr %x136 %b = load <2 x float>, ptr %y137 %c = fpext <2 x float> %a to <2 x double>138 %d = fpext <2 x float> %b to <2 x double>139 %e = fmul <2 x double> %c, %d140 ret <2 x double> %e141}142 143define <4 x double> @vfwmul_v4f32(ptr %x, ptr %y) {144; CHECK-LABEL: vfwmul_v4f32:145; CHECK: # %bb.0:146; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma147; CHECK-NEXT: vle32.v v10, (a0)148; CHECK-NEXT: vle32.v v11, (a1)149; CHECK-NEXT: vfwmul.vv v8, v10, v11150; CHECK-NEXT: ret151 %a = load <4 x float>, ptr %x152 %b = load <4 x float>, ptr %y153 %c = fpext <4 x float> %a to <4 x double>154 %d = fpext <4 x float> %b to <4 x double>155 %e = fmul <4 x double> %c, %d156 ret <4 x double> %e157}158 159define <8 x double> @vfwmul_v8f32(ptr %x, ptr %y) {160; CHECK-LABEL: vfwmul_v8f32:161; CHECK: # %bb.0:162; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma163; CHECK-NEXT: vle32.v v12, (a0)164; CHECK-NEXT: vle32.v v14, (a1)165; CHECK-NEXT: vfwmul.vv v8, v12, v14166; CHECK-NEXT: ret167 %a = load <8 x float>, ptr %x168 %b = load <8 x float>, ptr %y169 %c = fpext <8 x float> %a to <8 x double>170 %d = fpext <8 x float> %b to <8 x double>171 %e = fmul <8 x double> %c, %d172 ret <8 x double> %e173}174 175define <16 x double> @vfwmul_v16f32(ptr %x, ptr %y) {176; CHECK-LABEL: vfwmul_v16f32:177; CHECK: # %bb.0:178; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma179; CHECK-NEXT: vle32.v v16, (a0)180; CHECK-NEXT: vle32.v v20, (a1)181; CHECK-NEXT: vfwmul.vv v8, v16, v20182; CHECK-NEXT: ret183 %a = load <16 x float>, ptr %x184 %b = load <16 x float>, ptr %y185 %c = fpext <16 x float> %a to <16 x double>186 %d = fpext <16 x float> %b to <16 x double>187 %e = fmul <16 x double> %c, %d188 ret <16 x double> %e189}190 191define <32 x double> @vfwmul_v32f32(ptr %x, ptr %y) {192; CHECK-LABEL: vfwmul_v32f32:193; CHECK: # %bb.0:194; CHECK-NEXT: addi sp, sp, -16195; CHECK-NEXT: .cfi_def_cfa_offset 16196; CHECK-NEXT: csrr a2, vlenb197; CHECK-NEXT: slli a2, a2, 3198; CHECK-NEXT: sub sp, sp, a2199; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb200; CHECK-NEXT: li a2, 32201; CHECK-NEXT: vsetvli zero, a2, e32, m8, ta, ma202; CHECK-NEXT: vle32.v v16, (a0)203; CHECK-NEXT: vle32.v v24, (a1)204; CHECK-NEXT: vsetivli zero, 16, e32, m8, ta, ma205; CHECK-NEXT: vslidedown.vi v8, v16, 16206; CHECK-NEXT: addi a0, sp, 16207; CHECK-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill208; CHECK-NEXT: vslidedown.vi v0, v24, 16209; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma210; CHECK-NEXT: vfwmul.vv v8, v16, v24211; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload212; CHECK-NEXT: vfwmul.vv v16, v24, v0213; CHECK-NEXT: csrr a0, vlenb214; CHECK-NEXT: slli a0, a0, 3215; CHECK-NEXT: add sp, sp, a0216; CHECK-NEXT: .cfi_def_cfa sp, 16217; CHECK-NEXT: addi sp, sp, 16218; CHECK-NEXT: .cfi_def_cfa_offset 0219; CHECK-NEXT: ret220 %a = load <32 x float>, ptr %x221 %b = load <32 x float>, ptr %y222 %c = fpext <32 x float> %a to <32 x double>223 %d = fpext <32 x float> %b to <32 x double>224 %e = fmul <32 x double> %c, %d225 ret <32 x double> %e226}227 228define <2 x float> @vfwmul_vf_v2f16(ptr %x, half %y) {229; CHECK-LABEL: vfwmul_vf_v2f16:230; CHECK: # %bb.0:231; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma232; CHECK-NEXT: vle16.v v9, (a0)233; CHECK-NEXT: vfwmul.vf v8, v9, fa0234; CHECK-NEXT: ret235 %a = load <2 x half>, ptr %x236 %b = insertelement <2 x half> poison, half %y, i32 0237 %c = shufflevector <2 x half> %b, <2 x half> poison, <2 x i32> zeroinitializer238 %d = fpext <2 x half> %a to <2 x float>239 %e = fpext <2 x half> %c to <2 x float>240 %f = fmul <2 x float> %d, %e241 ret <2 x float> %f242}243 244define <4 x float> @vfwmul_vf_v4f16(ptr %x, half %y) {245; CHECK-LABEL: vfwmul_vf_v4f16:246; CHECK: # %bb.0:247; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma248; CHECK-NEXT: vle16.v v9, (a0)249; CHECK-NEXT: vfwmul.vf v8, v9, fa0250; CHECK-NEXT: ret251 %a = load <4 x half>, ptr %x252 %b = insertelement <4 x half> poison, half %y, i32 0253 %c = shufflevector <4 x half> %b, <4 x half> poison, <4 x i32> zeroinitializer254 %d = fpext <4 x half> %a to <4 x float>255 %e = fpext <4 x half> %c to <4 x float>256 %f = fmul <4 x float> %d, %e257 ret <4 x float> %f258}259 260define <8 x float> @vfwmul_vf_v8f16(ptr %x, half %y) {261; CHECK-LABEL: vfwmul_vf_v8f16:262; CHECK: # %bb.0:263; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma264; CHECK-NEXT: vle16.v v10, (a0)265; CHECK-NEXT: vfwmul.vf v8, v10, fa0266; CHECK-NEXT: ret267 %a = load <8 x half>, ptr %x268 %b = insertelement <8 x half> poison, half %y, i32 0269 %c = shufflevector <8 x half> %b, <8 x half> poison, <8 x i32> zeroinitializer270 %d = fpext <8 x half> %a to <8 x float>271 %e = fpext <8 x half> %c to <8 x float>272 %f = fmul <8 x float> %d, %e273 ret <8 x float> %f274}275 276define <16 x float> @vfwmul_vf_v16f16(ptr %x, half %y) {277; CHECK-LABEL: vfwmul_vf_v16f16:278; CHECK: # %bb.0:279; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma280; CHECK-NEXT: vle16.v v12, (a0)281; CHECK-NEXT: vfwmul.vf v8, v12, fa0282; CHECK-NEXT: ret283 %a = load <16 x half>, ptr %x284 %b = insertelement <16 x half> poison, half %y, i32 0285 %c = shufflevector <16 x half> %b, <16 x half> poison, <16 x i32> zeroinitializer286 %d = fpext <16 x half> %a to <16 x float>287 %e = fpext <16 x half> %c to <16 x float>288 %f = fmul <16 x float> %d, %e289 ret <16 x float> %f290}291 292define <32 x float> @vfwmul_vf_v32f16(ptr %x, half %y) {293; CHECK-LABEL: vfwmul_vf_v32f16:294; CHECK: # %bb.0:295; CHECK-NEXT: li a1, 32296; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma297; CHECK-NEXT: vle16.v v16, (a0)298; CHECK-NEXT: vfwmul.vf v8, v16, fa0299; CHECK-NEXT: ret300 %a = load <32 x half>, ptr %x301 %b = insertelement <32 x half> poison, half %y, i32 0302 %c = shufflevector <32 x half> %b, <32 x half> poison, <32 x i32> zeroinitializer303 %d = fpext <32 x half> %a to <32 x float>304 %e = fpext <32 x half> %c to <32 x float>305 %f = fmul <32 x float> %d, %e306 ret <32 x float> %f307}308 309define <2 x double> @vfwmul_vf_v2f32(ptr %x, float %y) {310; CHECK-LABEL: vfwmul_vf_v2f32:311; CHECK: # %bb.0:312; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma313; CHECK-NEXT: vle32.v v9, (a0)314; CHECK-NEXT: vfwmul.vf v8, v9, fa0315; CHECK-NEXT: ret316 %a = load <2 x float>, ptr %x317 %b = insertelement <2 x float> poison, float %y, i32 0318 %c = shufflevector <2 x float> %b, <2 x float> poison, <2 x i32> zeroinitializer319 %d = fpext <2 x float> %a to <2 x double>320 %e = fpext <2 x float> %c to <2 x double>321 %f = fmul <2 x double> %d, %e322 ret <2 x double> %f323}324 325define <4 x double> @vfwmul_vf_v4f32(ptr %x, float %y) {326; CHECK-LABEL: vfwmul_vf_v4f32:327; CHECK: # %bb.0:328; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma329; CHECK-NEXT: vle32.v v10, (a0)330; CHECK-NEXT: vfwmul.vf v8, v10, fa0331; CHECK-NEXT: ret332 %a = load <4 x float>, ptr %x333 %b = insertelement <4 x float> poison, float %y, i32 0334 %c = shufflevector <4 x float> %b, <4 x float> poison, <4 x i32> zeroinitializer335 %d = fpext <4 x float> %a to <4 x double>336 %e = fpext <4 x float> %c to <4 x double>337 %f = fmul <4 x double> %d, %e338 ret <4 x double> %f339}340 341define <8 x double> @vfwmul_vf_v8f32(ptr %x, float %y) {342; CHECK-LABEL: vfwmul_vf_v8f32:343; CHECK: # %bb.0:344; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma345; CHECK-NEXT: vle32.v v12, (a0)346; CHECK-NEXT: vfwmul.vf v8, v12, fa0347; CHECK-NEXT: ret348 %a = load <8 x float>, ptr %x349 %b = insertelement <8 x float> poison, float %y, i32 0350 %c = shufflevector <8 x float> %b, <8 x float> poison, <8 x i32> zeroinitializer351 %d = fpext <8 x float> %a to <8 x double>352 %e = fpext <8 x float> %c to <8 x double>353 %f = fmul <8 x double> %d, %e354 ret <8 x double> %f355}356 357define <16 x double> @vfwmul_vf_v16f32(ptr %x, float %y) {358; CHECK-LABEL: vfwmul_vf_v16f32:359; CHECK: # %bb.0:360; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma361; CHECK-NEXT: vle32.v v16, (a0)362; CHECK-NEXT: vfwmul.vf v8, v16, fa0363; CHECK-NEXT: ret364 %a = load <16 x float>, ptr %x365 %b = insertelement <16 x float> poison, float %y, i32 0366 %c = shufflevector <16 x float> %b, <16 x float> poison, <16 x i32> zeroinitializer367 %d = fpext <16 x float> %a to <16 x double>368 %e = fpext <16 x float> %c to <16 x double>369 %f = fmul <16 x double> %d, %e370 ret <16 x double> %f371}372 373define <32 x double> @vfwmul_vf_v32f32(ptr %x, float %y) {374; CHECK-LABEL: vfwmul_vf_v32f32:375; CHECK: # %bb.0:376; CHECK-NEXT: li a1, 32377; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma378; CHECK-NEXT: vle32.v v16, (a0)379; CHECK-NEXT: vsetivli zero, 16, e32, m8, ta, ma380; CHECK-NEXT: vslidedown.vi v24, v16, 16381; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma382; CHECK-NEXT: vfwmul.vf v8, v16, fa0383; CHECK-NEXT: vfwmul.vf v16, v24, fa0384; CHECK-NEXT: ret385 %a = load <32 x float>, ptr %x386 %b = insertelement <32 x float> poison, float %y, i32 0387 %c = shufflevector <32 x float> %b, <32 x float> poison, <32 x i32> zeroinitializer388 %d = fpext <32 x float> %a to <32 x double>389 %e = fpext <32 x float> %c to <32 x double>390 %f = fmul <32 x double> %d, %e391 ret <32 x double> %f392}393 394define <2 x float> @vfwmul_squared_v2f16_v2f32(ptr %x) {395; CHECK-LABEL: vfwmul_squared_v2f16_v2f32:396; CHECK: # %bb.0:397; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma398; CHECK-NEXT: vle16.v v9, (a0)399; CHECK-NEXT: vfwmul.vv v8, v9, v9400; CHECK-NEXT: ret401 %a = load <2 x half>, ptr %x402 %b = fpext <2 x half> %a to <2 x float>403 %c = fmul <2 x float> %b, %b404 ret <2 x float> %c405}406 407define <2 x double> @vfwmul_squared_v2f32_v2f64(ptr %x) {408; CHECK-LABEL: vfwmul_squared_v2f32_v2f64:409; CHECK: # %bb.0:410; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma411; CHECK-NEXT: vle32.v v9, (a0)412; CHECK-NEXT: vfwmul.vv v8, v9, v9413; CHECK-NEXT: ret414 %a = load <2 x float>, ptr %x415 %b = fpext <2 x float> %a to <2 x double>416 %c = fmul <2 x double> %b, %b417 ret <2 x double> %c418}419 420define <2 x double> @vfwmul_squared_v2f16_v2f64(ptr %x) {421; CHECK-LABEL: vfwmul_squared_v2f16_v2f64:422; CHECK: # %bb.0:423; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma424; CHECK-NEXT: vle16.v v8, (a0)425; CHECK-NEXT: vfwcvt.f.f.v v9, v8426; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma427; CHECK-NEXT: vfwmul.vv v8, v9, v9428; CHECK-NEXT: ret429 %a = load <2 x half>, ptr %x430 %b = fpext <2 x half> %a to <2 x double>431 %c = fmul <2 x double> %b, %b432 ret <2 x double> %c433}434 435define <2 x float> @vfwmul_vf2_v2f32(<2 x half> %x, half %y) {436; CHECK-LABEL: vfwmul_vf2_v2f32:437; CHECK: # %bb.0:438; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma439; CHECK-NEXT: vfwmul.vf v9, v8, fa0440; CHECK-NEXT: vmv1r.v v8, v9441; CHECK-NEXT: ret442 %a = fpext <2 x half> %x to <2 x float>443 %b = fpext half %y to float444 %c = insertelement <2 x float> poison, float %b, i32 0445 %d = shufflevector <2 x float> %c, <2 x float> poison, <2 x i32> zeroinitializer446 %e = fmul <2 x float> %a, %d447 ret <2 x float> %e448}449