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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh,+f,+d -target-abi=ilp32d \3; RUN: -verify-machineinstrs < %s | FileCheck %s4; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh,+f,+d -target-abi=lp64d \5; RUN: -verify-machineinstrs < %s | FileCheck %s6 7define <2 x float> @vfwsub_v2f16(ptr %x, ptr %y) {8; CHECK-LABEL: vfwsub_v2f16:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma11; CHECK-NEXT: vle16.v v9, (a0)12; CHECK-NEXT: vle16.v v10, (a1)13; CHECK-NEXT: vfwsub.vv v8, v9, v1014; CHECK-NEXT: ret15 %a = load <2 x half>, ptr %x16 %b = load <2 x half>, ptr %y17 %c = fpext <2 x half> %a to <2 x float>18 %d = fpext <2 x half> %b to <2 x float>19 %e = fsub <2 x float> %c, %d20 ret <2 x float> %e21}22 23define <4 x float> @vfwsub_v4f16(ptr %x, ptr %y) {24; CHECK-LABEL: vfwsub_v4f16:25; CHECK: # %bb.0:26; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma27; CHECK-NEXT: vle16.v v9, (a0)28; CHECK-NEXT: vle16.v v10, (a1)29; CHECK-NEXT: vfwsub.vv v8, v9, v1030; CHECK-NEXT: ret31 %a = load <4 x half>, ptr %x32 %b = load <4 x half>, ptr %y33 %c = fpext <4 x half> %a to <4 x float>34 %d = fpext <4 x half> %b to <4 x float>35 %e = fsub <4 x float> %c, %d36 ret <4 x float> %e37}38 39define <8 x float> @vfwsub_v8f16(ptr %x, ptr %y) {40; CHECK-LABEL: vfwsub_v8f16:41; CHECK: # %bb.0:42; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma43; CHECK-NEXT: vle16.v v10, (a0)44; CHECK-NEXT: vle16.v v11, (a1)45; CHECK-NEXT: vfwsub.vv v8, v10, v1146; CHECK-NEXT: ret47 %a = load <8 x half>, ptr %x48 %b = load <8 x half>, ptr %y49 %c = fpext <8 x half> %a to <8 x float>50 %d = fpext <8 x half> %b to <8 x float>51 %e = fsub <8 x float> %c, %d52 ret <8 x float> %e53}54 55define <16 x float> @vfwsub_v16f16(ptr %x, ptr %y) {56; CHECK-LABEL: vfwsub_v16f16:57; CHECK: # %bb.0:58; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma59; CHECK-NEXT: vle16.v v12, (a0)60; CHECK-NEXT: vle16.v v14, (a1)61; CHECK-NEXT: vfwsub.vv v8, v12, v1462; CHECK-NEXT: ret63 %a = load <16 x half>, ptr %x64 %b = load <16 x half>, ptr %y65 %c = fpext <16 x half> %a to <16 x float>66 %d = fpext <16 x half> %b to <16 x float>67 %e = fsub <16 x float> %c, %d68 ret <16 x float> %e69}70 71define <32 x float> @vfwsub_v32f16(ptr %x, ptr %y) {72; CHECK-LABEL: vfwsub_v32f16:73; CHECK: # %bb.0:74; CHECK-NEXT: li a2, 3275; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma76; CHECK-NEXT: vle16.v v16, (a0)77; CHECK-NEXT: vle16.v v20, (a1)78; CHECK-NEXT: vfwsub.vv v8, v16, v2079; CHECK-NEXT: ret80 %a = load <32 x half>, ptr %x81 %b = load <32 x half>, ptr %y82 %c = fpext <32 x half> %a to <32 x float>83 %d = fpext <32 x half> %b to <32 x float>84 %e = fsub <32 x float> %c, %d85 ret <32 x float> %e86}87 88define <64 x float> @vfwsub_v64f16(ptr %x, ptr %y) {89; CHECK-LABEL: vfwsub_v64f16:90; CHECK: # %bb.0:91; CHECK-NEXT: addi sp, sp, -1692; CHECK-NEXT: .cfi_def_cfa_offset 1693; CHECK-NEXT: csrr a2, vlenb94; CHECK-NEXT: slli a2, a2, 395; CHECK-NEXT: sub sp, sp, a296; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb97; CHECK-NEXT: li a2, 6498; CHECK-NEXT: vsetvli zero, a2, e16, m8, ta, ma99; CHECK-NEXT: vle16.v v16, (a0)100; CHECK-NEXT: vle16.v v24, (a1)101; CHECK-NEXT: li a0, 32102; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma103; CHECK-NEXT: vslidedown.vx v8, v16, a0104; CHECK-NEXT: addi a1, sp, 16105; CHECK-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill106; CHECK-NEXT: vslidedown.vx v0, v24, a0107; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma108; CHECK-NEXT: vfwsub.vv v8, v16, v24109; CHECK-NEXT: addi a0, sp, 16110; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload111; CHECK-NEXT: vfwsub.vv v16, v24, v0112; CHECK-NEXT: csrr a0, vlenb113; CHECK-NEXT: slli a0, a0, 3114; CHECK-NEXT: add sp, sp, a0115; CHECK-NEXT: .cfi_def_cfa sp, 16116; CHECK-NEXT: addi sp, sp, 16117; CHECK-NEXT: .cfi_def_cfa_offset 0118; CHECK-NEXT: ret119 %a = load <64 x half>, ptr %x120 %b = load <64 x half>, ptr %y121 %c = fpext <64 x half> %a to <64 x float>122 %d = fpext <64 x half> %b to <64 x float>123 %e = fsub <64 x float> %c, %d124 ret <64 x float> %e125}126 127define <2 x double> @vfwsub_v2f32(ptr %x, ptr %y) {128; CHECK-LABEL: vfwsub_v2f32:129; CHECK: # %bb.0:130; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma131; CHECK-NEXT: vle32.v v9, (a0)132; CHECK-NEXT: vle32.v v10, (a1)133; CHECK-NEXT: vfwsub.vv v8, v9, v10134; CHECK-NEXT: ret135 %a = load <2 x float>, ptr %x136 %b = load <2 x float>, ptr %y137 %c = fpext <2 x float> %a to <2 x double>138 %d = fpext <2 x float> %b to <2 x double>139 %e = fsub <2 x double> %c, %d140 ret <2 x double> %e141}142 143define <4 x double> @vfwsub_v4f32(ptr %x, ptr %y) {144; CHECK-LABEL: vfwsub_v4f32:145; CHECK: # %bb.0:146; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma147; CHECK-NEXT: vle32.v v10, (a0)148; CHECK-NEXT: vle32.v v11, (a1)149; CHECK-NEXT: vfwsub.vv v8, v10, v11150; CHECK-NEXT: ret151 %a = load <4 x float>, ptr %x152 %b = load <4 x float>, ptr %y153 %c = fpext <4 x float> %a to <4 x double>154 %d = fpext <4 x float> %b to <4 x double>155 %e = fsub <4 x double> %c, %d156 ret <4 x double> %e157}158 159define <8 x double> @vfwsub_v8f32(ptr %x, ptr %y) {160; CHECK-LABEL: vfwsub_v8f32:161; CHECK: # %bb.0:162; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma163; CHECK-NEXT: vle32.v v12, (a0)164; CHECK-NEXT: vle32.v v14, (a1)165; CHECK-NEXT: vfwsub.vv v8, v12, v14166; CHECK-NEXT: ret167 %a = load <8 x float>, ptr %x168 %b = load <8 x float>, ptr %y169 %c = fpext <8 x float> %a to <8 x double>170 %d = fpext <8 x float> %b to <8 x double>171 %e = fsub <8 x double> %c, %d172 ret <8 x double> %e173}174 175define <16 x double> @vfwsub_v16f32(ptr %x, ptr %y) {176; CHECK-LABEL: vfwsub_v16f32:177; CHECK: # %bb.0:178; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma179; CHECK-NEXT: vle32.v v16, (a0)180; CHECK-NEXT: vle32.v v20, (a1)181; CHECK-NEXT: vfwsub.vv v8, v16, v20182; CHECK-NEXT: ret183 %a = load <16 x float>, ptr %x184 %b = load <16 x float>, ptr %y185 %c = fpext <16 x float> %a to <16 x double>186 %d = fpext <16 x float> %b to <16 x double>187 %e = fsub <16 x double> %c, %d188 ret <16 x double> %e189}190 191define <32 x double> @vfwsub_v32f32(ptr %x, ptr %y) {192; CHECK-LABEL: vfwsub_v32f32:193; CHECK: # %bb.0:194; CHECK-NEXT: addi sp, sp, -16195; CHECK-NEXT: .cfi_def_cfa_offset 16196; CHECK-NEXT: csrr a2, vlenb197; CHECK-NEXT: slli a2, a2, 3198; CHECK-NEXT: sub sp, sp, a2199; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb200; CHECK-NEXT: li a2, 32201; CHECK-NEXT: vsetvli zero, a2, e32, m8, ta, ma202; CHECK-NEXT: vle32.v v16, (a0)203; CHECK-NEXT: vle32.v v24, (a1)204; CHECK-NEXT: vsetivli zero, 16, e32, m8, ta, ma205; CHECK-NEXT: vslidedown.vi v8, v16, 16206; CHECK-NEXT: addi a0, sp, 16207; CHECK-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill208; CHECK-NEXT: vslidedown.vi v0, v24, 16209; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma210; CHECK-NEXT: vfwsub.vv v8, v16, v24211; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload212; CHECK-NEXT: vfwsub.vv v16, v24, v0213; CHECK-NEXT: csrr a0, vlenb214; CHECK-NEXT: slli a0, a0, 3215; CHECK-NEXT: add sp, sp, a0216; CHECK-NEXT: .cfi_def_cfa sp, 16217; CHECK-NEXT: addi sp, sp, 16218; CHECK-NEXT: .cfi_def_cfa_offset 0219; CHECK-NEXT: ret220 %a = load <32 x float>, ptr %x221 %b = load <32 x float>, ptr %y222 %c = fpext <32 x float> %a to <32 x double>223 %d = fpext <32 x float> %b to <32 x double>224 %e = fsub <32 x double> %c, %d225 ret <32 x double> %e226}227 228define <2 x float> @vfwsub_vf_v2f16(ptr %x, half %y) {229; CHECK-LABEL: vfwsub_vf_v2f16:230; CHECK: # %bb.0:231; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma232; CHECK-NEXT: vle16.v v9, (a0)233; CHECK-NEXT: vfwsub.vf v8, v9, fa0234; CHECK-NEXT: ret235 %a = load <2 x half>, ptr %x236 %b = insertelement <2 x half> poison, half %y, i32 0237 %c = shufflevector <2 x half> %b, <2 x half> poison, <2 x i32> zeroinitializer238 %d = fpext <2 x half> %a to <2 x float>239 %e = fpext <2 x half> %c to <2 x float>240 %f = fsub <2 x float> %d, %e241 ret <2 x float> %f242}243 244define <4 x float> @vfwsub_vf_v4f16(ptr %x, half %y) {245; CHECK-LABEL: vfwsub_vf_v4f16:246; CHECK: # %bb.0:247; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma248; CHECK-NEXT: vle16.v v9, (a0)249; CHECK-NEXT: vfwsub.vf v8, v9, fa0250; CHECK-NEXT: ret251 %a = load <4 x half>, ptr %x252 %b = insertelement <4 x half> poison, half %y, i32 0253 %c = shufflevector <4 x half> %b, <4 x half> poison, <4 x i32> zeroinitializer254 %d = fpext <4 x half> %a to <4 x float>255 %e = fpext <4 x half> %c to <4 x float>256 %f = fsub <4 x float> %d, %e257 ret <4 x float> %f258}259 260define <8 x float> @vfwsub_vf_v8f16(ptr %x, half %y) {261; CHECK-LABEL: vfwsub_vf_v8f16:262; CHECK: # %bb.0:263; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma264; CHECK-NEXT: vle16.v v10, (a0)265; CHECK-NEXT: vfwsub.vf v8, v10, fa0266; CHECK-NEXT: ret267 %a = load <8 x half>, ptr %x268 %b = insertelement <8 x half> poison, half %y, i32 0269 %c = shufflevector <8 x half> %b, <8 x half> poison, <8 x i32> zeroinitializer270 %d = fpext <8 x half> %a to <8 x float>271 %e = fpext <8 x half> %c to <8 x float>272 %f = fsub <8 x float> %d, %e273 ret <8 x float> %f274}275 276define <16 x float> @vfwsub_vf_v16f16(ptr %x, half %y) {277; CHECK-LABEL: vfwsub_vf_v16f16:278; CHECK: # %bb.0:279; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma280; CHECK-NEXT: vle16.v v12, (a0)281; CHECK-NEXT: vfwsub.vf v8, v12, fa0282; CHECK-NEXT: ret283 %a = load <16 x half>, ptr %x284 %b = insertelement <16 x half> poison, half %y, i32 0285 %c = shufflevector <16 x half> %b, <16 x half> poison, <16 x i32> zeroinitializer286 %d = fpext <16 x half> %a to <16 x float>287 %e = fpext <16 x half> %c to <16 x float>288 %f = fsub <16 x float> %d, %e289 ret <16 x float> %f290}291 292define <32 x float> @vfwsub_vf_v32f16(ptr %x, half %y) {293; CHECK-LABEL: vfwsub_vf_v32f16:294; CHECK: # %bb.0:295; CHECK-NEXT: li a1, 32296; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma297; CHECK-NEXT: vle16.v v16, (a0)298; CHECK-NEXT: vfwsub.vf v8, v16, fa0299; CHECK-NEXT: ret300 %a = load <32 x half>, ptr %x301 %b = insertelement <32 x half> poison, half %y, i32 0302 %c = shufflevector <32 x half> %b, <32 x half> poison, <32 x i32> zeroinitializer303 %d = fpext <32 x half> %a to <32 x float>304 %e = fpext <32 x half> %c to <32 x float>305 %f = fsub <32 x float> %d, %e306 ret <32 x float> %f307}308 309define <2 x double> @vfwsub_vf_v2f32(ptr %x, float %y) {310; CHECK-LABEL: vfwsub_vf_v2f32:311; CHECK: # %bb.0:312; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma313; CHECK-NEXT: vle32.v v9, (a0)314; CHECK-NEXT: vfwsub.vf v8, v9, fa0315; CHECK-NEXT: ret316 %a = load <2 x float>, ptr %x317 %b = insertelement <2 x float> poison, float %y, i32 0318 %c = shufflevector <2 x float> %b, <2 x float> poison, <2 x i32> zeroinitializer319 %d = fpext <2 x float> %a to <2 x double>320 %e = fpext <2 x float> %c to <2 x double>321 %f = fsub <2 x double> %d, %e322 ret <2 x double> %f323}324 325define <4 x double> @vfwsub_vf_v4f32(ptr %x, float %y) {326; CHECK-LABEL: vfwsub_vf_v4f32:327; CHECK: # %bb.0:328; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma329; CHECK-NEXT: vle32.v v10, (a0)330; CHECK-NEXT: vfwsub.vf v8, v10, fa0331; CHECK-NEXT: ret332 %a = load <4 x float>, ptr %x333 %b = insertelement <4 x float> poison, float %y, i32 0334 %c = shufflevector <4 x float> %b, <4 x float> poison, <4 x i32> zeroinitializer335 %d = fpext <4 x float> %a to <4 x double>336 %e = fpext <4 x float> %c to <4 x double>337 %f = fsub <4 x double> %d, %e338 ret <4 x double> %f339}340 341define <8 x double> @vfwsub_vf_v8f32(ptr %x, float %y) {342; CHECK-LABEL: vfwsub_vf_v8f32:343; CHECK: # %bb.0:344; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma345; CHECK-NEXT: vle32.v v12, (a0)346; CHECK-NEXT: vfwsub.vf v8, v12, fa0347; CHECK-NEXT: ret348 %a = load <8 x float>, ptr %x349 %b = insertelement <8 x float> poison, float %y, i32 0350 %c = shufflevector <8 x float> %b, <8 x float> poison, <8 x i32> zeroinitializer351 %d = fpext <8 x float> %a to <8 x double>352 %e = fpext <8 x float> %c to <8 x double>353 %f = fsub <8 x double> %d, %e354 ret <8 x double> %f355}356 357define <16 x double> @vfwsub_vf_v16f32(ptr %x, float %y) {358; CHECK-LABEL: vfwsub_vf_v16f32:359; CHECK: # %bb.0:360; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma361; CHECK-NEXT: vle32.v v16, (a0)362; CHECK-NEXT: vfwsub.vf v8, v16, fa0363; CHECK-NEXT: ret364 %a = load <16 x float>, ptr %x365 %b = insertelement <16 x float> poison, float %y, i32 0366 %c = shufflevector <16 x float> %b, <16 x float> poison, <16 x i32> zeroinitializer367 %d = fpext <16 x float> %a to <16 x double>368 %e = fpext <16 x float> %c to <16 x double>369 %f = fsub <16 x double> %d, %e370 ret <16 x double> %f371}372 373define <32 x double> @vfwsub_vf_v32f32(ptr %x, float %y) {374; CHECK-LABEL: vfwsub_vf_v32f32:375; CHECK: # %bb.0:376; CHECK-NEXT: li a1, 32377; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma378; CHECK-NEXT: vle32.v v16, (a0)379; CHECK-NEXT: vsetivli zero, 16, e32, m8, ta, ma380; CHECK-NEXT: vslidedown.vi v24, v16, 16381; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma382; CHECK-NEXT: vfwsub.vf v8, v16, fa0383; CHECK-NEXT: vfwsub.vf v16, v24, fa0384; CHECK-NEXT: ret385 %a = load <32 x float>, ptr %x386 %b = insertelement <32 x float> poison, float %y, i32 0387 %c = shufflevector <32 x float> %b, <32 x float> poison, <32 x i32> zeroinitializer388 %d = fpext <32 x float> %a to <32 x double>389 %e = fpext <32 x float> %c to <32 x double>390 %f = fsub <32 x double> %d, %e391 ret <32 x double> %f392}393 394define <2 x float> @vfwsub_wv_v2f16(ptr %x, ptr %y) {395; CHECK-LABEL: vfwsub_wv_v2f16:396; CHECK: # %bb.0:397; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma398; CHECK-NEXT: vle32.v v8, (a0)399; CHECK-NEXT: vle16.v v9, (a1)400; CHECK-NEXT: vfwsub.wv v8, v8, v9401; CHECK-NEXT: ret402 %a = load <2 x float>, ptr %x403 %b = load <2 x half>, ptr %y404 %c = fpext <2 x half> %b to <2 x float>405 %d = fsub <2 x float> %a, %c406 ret <2 x float> %d407}408 409define <4 x float> @vfwsub_wv_v4f16(ptr %x, ptr %y) {410; CHECK-LABEL: vfwsub_wv_v4f16:411; CHECK: # %bb.0:412; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma413; CHECK-NEXT: vle32.v v8, (a0)414; CHECK-NEXT: vle16.v v9, (a1)415; CHECK-NEXT: vfwsub.wv v8, v8, v9416; CHECK-NEXT: ret417 %a = load <4 x float>, ptr %x418 %b = load <4 x half>, ptr %y419 %c = fpext <4 x half> %b to <4 x float>420 %d = fsub <4 x float> %a, %c421 ret <4 x float> %d422}423 424define <8 x float> @vfwsub_wv_v8f16(ptr %x, ptr %y) {425; CHECK-LABEL: vfwsub_wv_v8f16:426; CHECK: # %bb.0:427; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma428; CHECK-NEXT: vle32.v v8, (a0)429; CHECK-NEXT: vle16.v v10, (a1)430; CHECK-NEXT: vfwsub.wv v8, v8, v10431; CHECK-NEXT: ret432 %a = load <8 x float>, ptr %x433 %b = load <8 x half>, ptr %y434 %c = fpext <8 x half> %b to <8 x float>435 %d = fsub <8 x float> %a, %c436 ret <8 x float> %d437}438 439define <16 x float> @vfwsub_wv_v16f16(ptr %x, ptr %y) {440; CHECK-LABEL: vfwsub_wv_v16f16:441; CHECK: # %bb.0:442; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma443; CHECK-NEXT: vle32.v v8, (a0)444; CHECK-NEXT: vle16.v v12, (a1)445; CHECK-NEXT: vfwsub.wv v8, v8, v12446; CHECK-NEXT: ret447 %a = load <16 x float>, ptr %x448 %b = load <16 x half>, ptr %y449 %c = fpext <16 x half> %b to <16 x float>450 %d = fsub <16 x float> %a, %c451 ret <16 x float> %d452}453 454define <32 x float> @vfwsub_wv_v32f16(ptr %x, ptr %y) {455; CHECK-LABEL: vfwsub_wv_v32f16:456; CHECK: # %bb.0:457; CHECK-NEXT: li a2, 32458; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma459; CHECK-NEXT: vle32.v v8, (a0)460; CHECK-NEXT: vle16.v v16, (a1)461; CHECK-NEXT: vfwsub.wv v8, v8, v16462; CHECK-NEXT: ret463 %a = load <32 x float>, ptr %x464 %b = load <32 x half>, ptr %y465 %c = fpext <32 x half> %b to <32 x float>466 %d = fsub <32 x float> %a, %c467 ret <32 x float> %d468}469 470define <2 x double> @vfwsub_wv_v2f32(ptr %x, ptr %y) {471; CHECK-LABEL: vfwsub_wv_v2f32:472; CHECK: # %bb.0:473; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma474; CHECK-NEXT: vle64.v v8, (a0)475; CHECK-NEXT: vle32.v v9, (a1)476; CHECK-NEXT: vfwsub.wv v8, v8, v9477; CHECK-NEXT: ret478 %a = load <2 x double>, ptr %x479 %b = load <2 x float>, ptr %y480 %c = fpext <2 x float> %b to <2 x double>481 %d = fsub <2 x double> %a, %c482 ret <2 x double> %d483}484 485define <4 x double> @vfwsub_wv_v4f32(ptr %x, ptr %y) {486; CHECK-LABEL: vfwsub_wv_v4f32:487; CHECK: # %bb.0:488; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma489; CHECK-NEXT: vle64.v v8, (a0)490; CHECK-NEXT: vle32.v v10, (a1)491; CHECK-NEXT: vfwsub.wv v8, v8, v10492; CHECK-NEXT: ret493 %a = load <4 x double>, ptr %x494 %b = load <4 x float>, ptr %y495 %c = fpext <4 x float> %b to <4 x double>496 %d = fsub <4 x double> %a, %c497 ret <4 x double> %d498}499 500define <8 x double> @vfwsub_wv_v8f32(ptr %x, ptr %y) {501; CHECK-LABEL: vfwsub_wv_v8f32:502; CHECK: # %bb.0:503; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma504; CHECK-NEXT: vle64.v v8, (a0)505; CHECK-NEXT: vle32.v v12, (a1)506; CHECK-NEXT: vfwsub.wv v8, v8, v12507; CHECK-NEXT: ret508 %a = load <8 x double>, ptr %x509 %b = load <8 x float>, ptr %y510 %c = fpext <8 x float> %b to <8 x double>511 %d = fsub <8 x double> %a, %c512 ret <8 x double> %d513}514 515define <16 x double> @vfwsub_wv_v16f32(ptr %x, ptr %y) {516; CHECK-LABEL: vfwsub_wv_v16f32:517; CHECK: # %bb.0:518; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma519; CHECK-NEXT: vle64.v v8, (a0)520; CHECK-NEXT: vle32.v v16, (a1)521; CHECK-NEXT: vfwsub.wv v8, v8, v16522; CHECK-NEXT: ret523 %a = load <16 x double>, ptr %x524 %b = load <16 x float>, ptr %y525 %c = fpext <16 x float> %b to <16 x double>526 %d = fsub <16 x double> %a, %c527 ret <16 x double> %d528}529 530define <2 x float> @vfwsub_wf_v2f16(ptr %x, half %y) {531; CHECK-LABEL: vfwsub_wf_v2f16:532; CHECK: # %bb.0:533; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma534; CHECK-NEXT: vle32.v v8, (a0)535; CHECK-NEXT: vfwsub.wf v8, v8, fa0536; CHECK-NEXT: ret537 %a = load <2 x float>, ptr %x538 %b = insertelement <2 x half> poison, half %y, i32 0539 %c = shufflevector <2 x half> %b, <2 x half> poison, <2 x i32> zeroinitializer540 %d = fpext <2 x half> %c to <2 x float>541 %e = fsub <2 x float> %a, %d542 ret <2 x float> %e543}544 545define <4 x float> @vfwsub_wf_v4f16(ptr %x, half %y) {546; CHECK-LABEL: vfwsub_wf_v4f16:547; CHECK: # %bb.0:548; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma549; CHECK-NEXT: vle32.v v8, (a0)550; CHECK-NEXT: vfwsub.wf v8, v8, fa0551; CHECK-NEXT: ret552 %a = load <4 x float>, ptr %x553 %b = insertelement <4 x half> poison, half %y, i32 0554 %c = shufflevector <4 x half> %b, <4 x half> poison, <4 x i32> zeroinitializer555 %d = fpext <4 x half> %c to <4 x float>556 %e = fsub <4 x float> %a, %d557 ret <4 x float> %e558}559 560define <8 x float> @vfwsub_wf_v8f16(ptr %x, half %y) {561; CHECK-LABEL: vfwsub_wf_v8f16:562; CHECK: # %bb.0:563; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma564; CHECK-NEXT: vle32.v v8, (a0)565; CHECK-NEXT: vfwsub.wf v8, v8, fa0566; CHECK-NEXT: ret567 %a = load <8 x float>, ptr %x568 %b = insertelement <8 x half> poison, half %y, i32 0569 %c = shufflevector <8 x half> %b, <8 x half> poison, <8 x i32> zeroinitializer570 %d = fpext <8 x half> %c to <8 x float>571 %e = fsub <8 x float> %a, %d572 ret <8 x float> %e573}574 575define <16 x float> @vfwsub_wf_v16f16(ptr %x, half %y) {576; CHECK-LABEL: vfwsub_wf_v16f16:577; CHECK: # %bb.0:578; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma579; CHECK-NEXT: vle32.v v8, (a0)580; CHECK-NEXT: vfwsub.wf v8, v8, fa0581; CHECK-NEXT: ret582 %a = load <16 x float>, ptr %x583 %b = insertelement <16 x half> poison, half %y, i32 0584 %c = shufflevector <16 x half> %b, <16 x half> poison, <16 x i32> zeroinitializer585 %d = fpext <16 x half> %c to <16 x float>586 %e = fsub <16 x float> %a, %d587 ret <16 x float> %e588}589 590define <2 x double> @vfwsub_wf_v2f32(ptr %x, float %y) {591; CHECK-LABEL: vfwsub_wf_v2f32:592; CHECK: # %bb.0:593; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma594; CHECK-NEXT: vle64.v v8, (a0)595; CHECK-NEXT: vfwsub.wf v8, v8, fa0596; CHECK-NEXT: ret597 %a = load <2 x double>, ptr %x598 %b = insertelement <2 x float> poison, float %y, i32 0599 %c = shufflevector <2 x float> %b, <2 x float> poison, <2 x i32> zeroinitializer600 %d = fpext <2 x float> %c to <2 x double>601 %e = fsub <2 x double> %a, %d602 ret <2 x double> %e603}604 605define <4 x double> @vfwsub_wf_v4f32(ptr %x, float %y) {606; CHECK-LABEL: vfwsub_wf_v4f32:607; CHECK: # %bb.0:608; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma609; CHECK-NEXT: vle64.v v8, (a0)610; CHECK-NEXT: vfwsub.wf v8, v8, fa0611; CHECK-NEXT: ret612 %a = load <4 x double>, ptr %x613 %b = insertelement <4 x float> poison, float %y, i32 0614 %c = shufflevector <4 x float> %b, <4 x float> poison, <4 x i32> zeroinitializer615 %d = fpext <4 x float> %c to <4 x double>616 %e = fsub <4 x double> %a, %d617 ret <4 x double> %e618}619 620define <8 x double> @vfwsub_wf_v8f32(ptr %x, float %y) {621; CHECK-LABEL: vfwsub_wf_v8f32:622; CHECK: # %bb.0:623; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma624; CHECK-NEXT: vle64.v v8, (a0)625; CHECK-NEXT: vfwsub.wf v8, v8, fa0626; CHECK-NEXT: ret627 %a = load <8 x double>, ptr %x628 %b = insertelement <8 x float> poison, float %y, i32 0629 %c = shufflevector <8 x float> %b, <8 x float> poison, <8 x i32> zeroinitializer630 %d = fpext <8 x float> %c to <8 x double>631 %e = fsub <8 x double> %a, %d632 ret <8 x double> %e633}634 635define <16 x double> @vfwsub_wf_v16f32(ptr %x, float %y) {636; CHECK-LABEL: vfwsub_wf_v16f32:637; CHECK: # %bb.0:638; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma639; CHECK-NEXT: vle64.v v8, (a0)640; CHECK-NEXT: vfwsub.wf v8, v8, fa0641; CHECK-NEXT: ret642 %a = load <16 x double>, ptr %x643 %b = insertelement <16 x float> poison, float %y, i32 0644 %c = shufflevector <16 x float> %b, <16 x float> poison, <16 x i32> zeroinitializer645 %d = fpext <16 x float> %c to <16 x double>646 %e = fsub <16 x double> %a, %d647 ret <16 x double> %e648}649