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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <8 x i7> @vmin_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vmin_vv_v8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma11; CHECK-NEXT: vsll.vi v9, v9, 1, v0.t12; CHECK-NEXT: vsra.vi v9, v9, 1, v0.t13; CHECK-NEXT: vsll.vi v8, v8, 1, v0.t14; CHECK-NEXT: vsra.vi v8, v8, 1, v0.t15; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t16; CHECK-NEXT: ret17 %v = call <8 x i7> @llvm.vp.smin.v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 %evl)18 ret <8 x i7> %v19}20 21define <2 x i8> @vmin_vv_v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 zeroext %evl) {22; CHECK-LABEL: vmin_vv_v2i8:23; CHECK: # %bb.0:24; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma25; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t26; CHECK-NEXT: ret27 %v = call <2 x i8> @llvm.vp.smin.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 %evl)28 ret <2 x i8> %v29}30 31define <2 x i8> @vmin_vv_v2i8_unmasked(<2 x i8> %va, <2 x i8> %b, i32 zeroext %evl) {32; CHECK-LABEL: vmin_vv_v2i8_unmasked:33; CHECK: # %bb.0:34; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma35; CHECK-NEXT: vmin.vv v8, v8, v936; CHECK-NEXT: ret37 %v = call <2 x i8> @llvm.vp.smin.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> splat (i1 true), i32 %evl)38 ret <2 x i8> %v39}40 41define <2 x i8> @vmin_vx_v2i8(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {42; CHECK-LABEL: vmin_vx_v2i8:43; CHECK: # %bb.0:44; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma45; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t46; CHECK-NEXT: ret47 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 048 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer49 %v = call <2 x i8> @llvm.vp.smin.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> %m, i32 %evl)50 ret <2 x i8> %v51}52 53define <2 x i8> @vmin_vx_v2i8_unmasked(<2 x i8> %va, i8 %b, i32 zeroext %evl) {54; CHECK-LABEL: vmin_vx_v2i8_unmasked:55; CHECK: # %bb.0:56; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma57; CHECK-NEXT: vmin.vx v8, v8, a058; CHECK-NEXT: ret59 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 060 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer61 %v = call <2 x i8> @llvm.vp.smin.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> splat (i1 true), i32 %evl)62 ret <2 x i8> %v63}64 65define <4 x i8> @vmin_vv_v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 zeroext %evl) {66; CHECK-LABEL: vmin_vv_v4i8:67; CHECK: # %bb.0:68; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma69; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t70; CHECK-NEXT: ret71 %v = call <4 x i8> @llvm.vp.smin.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 %evl)72 ret <4 x i8> %v73}74 75define <4 x i8> @vmin_vv_v4i8_unmasked(<4 x i8> %va, <4 x i8> %b, i32 zeroext %evl) {76; CHECK-LABEL: vmin_vv_v4i8_unmasked:77; CHECK: # %bb.0:78; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma79; CHECK-NEXT: vmin.vv v8, v8, v980; CHECK-NEXT: ret81 %v = call <4 x i8> @llvm.vp.smin.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> splat (i1 true), i32 %evl)82 ret <4 x i8> %v83}84 85define <4 x i8> @vmin_vx_v4i8(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {86; CHECK-LABEL: vmin_vx_v4i8:87; CHECK: # %bb.0:88; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma89; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t90; CHECK-NEXT: ret91 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 092 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer93 %v = call <4 x i8> @llvm.vp.smin.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> %m, i32 %evl)94 ret <4 x i8> %v95}96 97define <4 x i8> @vmin_vx_v4i8_commute(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {98; CHECK-LABEL: vmin_vx_v4i8_commute:99; CHECK: # %bb.0:100; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma101; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t102; CHECK-NEXT: ret103 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0104 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer105 %v = call <4 x i8> @llvm.vp.smin.v4i8(<4 x i8> %vb, <4 x i8> %va, <4 x i1> %m, i32 %evl)106 ret <4 x i8> %v107}108 109define <4 x i8> @vmin_vx_v4i8_unmasked(<4 x i8> %va, i8 %b, i32 zeroext %evl) {110; CHECK-LABEL: vmin_vx_v4i8_unmasked:111; CHECK: # %bb.0:112; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma113; CHECK-NEXT: vmin.vx v8, v8, a0114; CHECK-NEXT: ret115 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0116 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer117 %v = call <4 x i8> @llvm.vp.smin.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> splat (i1 true), i32 %evl)118 ret <4 x i8> %v119}120 121define <5 x i8> @vmin_vv_v5i8(<5 x i8> %va, <5 x i8> %b, <5 x i1> %m, i32 zeroext %evl) {122; CHECK-LABEL: vmin_vv_v5i8:123; CHECK: # %bb.0:124; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma125; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t126; CHECK-NEXT: ret127 %v = call <5 x i8> @llvm.vp.smin.v5i8(<5 x i8> %va, <5 x i8> %b, <5 x i1> %m, i32 %evl)128 ret <5 x i8> %v129}130 131define <5 x i8> @vmin_vv_v5i8_unmasked(<5 x i8> %va, <5 x i8> %b, i32 zeroext %evl) {132; CHECK-LABEL: vmin_vv_v5i8_unmasked:133; CHECK: # %bb.0:134; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma135; CHECK-NEXT: vmin.vv v8, v8, v9136; CHECK-NEXT: ret137 %v = call <5 x i8> @llvm.vp.smin.v5i8(<5 x i8> %va, <5 x i8> %b, <5 x i1> splat (i1 true), i32 %evl)138 ret <5 x i8> %v139}140 141define <5 x i8> @vmin_vx_v5i8(<5 x i8> %va, i8 %b, <5 x i1> %m, i32 zeroext %evl) {142; CHECK-LABEL: vmin_vx_v5i8:143; CHECK: # %bb.0:144; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma145; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t146; CHECK-NEXT: ret147 %elt.head = insertelement <5 x i8> poison, i8 %b, i32 0148 %vb = shufflevector <5 x i8> %elt.head, <5 x i8> poison, <5 x i32> zeroinitializer149 %v = call <5 x i8> @llvm.vp.smin.v5i8(<5 x i8> %va, <5 x i8> %vb, <5 x i1> %m, i32 %evl)150 ret <5 x i8> %v151}152 153define <5 x i8> @vmin_vx_v5i8_unmasked(<5 x i8> %va, i8 %b, i32 zeroext %evl) {154; CHECK-LABEL: vmin_vx_v5i8_unmasked:155; CHECK: # %bb.0:156; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma157; CHECK-NEXT: vmin.vx v8, v8, a0158; CHECK-NEXT: ret159 %elt.head = insertelement <5 x i8> poison, i8 %b, i32 0160 %vb = shufflevector <5 x i8> %elt.head, <5 x i8> poison, <5 x i32> zeroinitializer161 %v = call <5 x i8> @llvm.vp.smin.v5i8(<5 x i8> %va, <5 x i8> %vb, <5 x i1> splat (i1 true), i32 %evl)162 ret <5 x i8> %v163}164 165define <8 x i8> @vmin_vv_v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 zeroext %evl) {166; CHECK-LABEL: vmin_vv_v8i8:167; CHECK: # %bb.0:168; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma169; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t170; CHECK-NEXT: ret171 %v = call <8 x i8> @llvm.vp.smin.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 %evl)172 ret <8 x i8> %v173}174 175define <8 x i8> @vmin_vv_v8i8_unmasked(<8 x i8> %va, <8 x i8> %b, i32 zeroext %evl) {176; CHECK-LABEL: vmin_vv_v8i8_unmasked:177; CHECK: # %bb.0:178; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma179; CHECK-NEXT: vmin.vv v8, v8, v9180; CHECK-NEXT: ret181 %v = call <8 x i8> @llvm.vp.smin.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> splat (i1 true), i32 %evl)182 ret <8 x i8> %v183}184 185define <8 x i8> @vmin_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {186; CHECK-LABEL: vmin_vx_v8i8:187; CHECK: # %bb.0:188; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma189; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t190; CHECK-NEXT: ret191 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0192 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer193 %v = call <8 x i8> @llvm.vp.smin.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 %evl)194 ret <8 x i8> %v195}196 197define <8 x i8> @vmin_vx_v8i8_unmasked(<8 x i8> %va, i8 %b, i32 zeroext %evl) {198; CHECK-LABEL: vmin_vx_v8i8_unmasked:199; CHECK: # %bb.0:200; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma201; CHECK-NEXT: vmin.vx v8, v8, a0202; CHECK-NEXT: ret203 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0204 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer205 %v = call <8 x i8> @llvm.vp.smin.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> splat (i1 true), i32 %evl)206 ret <8 x i8> %v207}208 209define <16 x i8> @vmin_vv_v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 zeroext %evl) {210; CHECK-LABEL: vmin_vv_v16i8:211; CHECK: # %bb.0:212; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma213; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t214; CHECK-NEXT: ret215 %v = call <16 x i8> @llvm.vp.smin.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 %evl)216 ret <16 x i8> %v217}218 219define <16 x i8> @vmin_vv_v16i8_unmasked(<16 x i8> %va, <16 x i8> %b, i32 zeroext %evl) {220; CHECK-LABEL: vmin_vv_v16i8_unmasked:221; CHECK: # %bb.0:222; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma223; CHECK-NEXT: vmin.vv v8, v8, v9224; CHECK-NEXT: ret225 %v = call <16 x i8> @llvm.vp.smin.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> splat (i1 true), i32 %evl)226 ret <16 x i8> %v227}228 229define <16 x i8> @vmin_vx_v16i8(<16 x i8> %va, i8 %b, <16 x i1> %m, i32 zeroext %evl) {230; CHECK-LABEL: vmin_vx_v16i8:231; CHECK: # %bb.0:232; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma233; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t234; CHECK-NEXT: ret235 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0236 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer237 %v = call <16 x i8> @llvm.vp.smin.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> %m, i32 %evl)238 ret <16 x i8> %v239}240 241define <16 x i8> @vmin_vx_v16i8_unmasked(<16 x i8> %va, i8 %b, i32 zeroext %evl) {242; CHECK-LABEL: vmin_vx_v16i8_unmasked:243; CHECK: # %bb.0:244; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma245; CHECK-NEXT: vmin.vx v8, v8, a0246; CHECK-NEXT: ret247 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0248 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer249 %v = call <16 x i8> @llvm.vp.smin.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> splat (i1 true), i32 %evl)250 ret <16 x i8> %v251}252 253define <256 x i8> @vmin_vx_v258i8(<256 x i8> %va, i8 %b, <256 x i1> %m, i32 zeroext %evl) {254; CHECK-LABEL: vmin_vx_v258i8:255; CHECK: # %bb.0:256; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma257; CHECK-NEXT: vmv1r.v v24, v0258; CHECK-NEXT: li a3, 128259; CHECK-NEXT: vsetvli zero, a3, e8, m8, ta, ma260; CHECK-NEXT: vlm.v v0, (a1)261; CHECK-NEXT: addi a1, a2, -128262; CHECK-NEXT: sltu a4, a2, a1263; CHECK-NEXT: addi a4, a4, -1264; CHECK-NEXT: and a1, a4, a1265; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma266; CHECK-NEXT: vmin.vx v16, v16, a0, v0.t267; CHECK-NEXT: bltu a2, a3, .LBB22_2268; CHECK-NEXT: # %bb.1:269; CHECK-NEXT: li a2, 128270; CHECK-NEXT: .LBB22_2:271; CHECK-NEXT: vmv1r.v v0, v24272; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma273; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t274; CHECK-NEXT: ret275 %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0276 %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer277 %v = call <256 x i8> @llvm.vp.smin.v258i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> %m, i32 %evl)278 ret <256 x i8> %v279}280 281define <256 x i8> @vmin_vx_v258i8_unmasked(<256 x i8> %va, i8 %b, i32 zeroext %evl) {282; CHECK-LABEL: vmin_vx_v258i8_unmasked:283; CHECK: # %bb.0:284; CHECK-NEXT: li a3, 128285; CHECK-NEXT: mv a2, a1286; CHECK-NEXT: bltu a1, a3, .LBB23_2287; CHECK-NEXT: # %bb.1:288; CHECK-NEXT: li a2, 128289; CHECK-NEXT: .LBB23_2:290; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma291; CHECK-NEXT: vmin.vx v8, v8, a0292; CHECK-NEXT: addi a2, a1, -128293; CHECK-NEXT: sltu a1, a1, a2294; CHECK-NEXT: addi a1, a1, -1295; CHECK-NEXT: and a1, a1, a2296; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma297; CHECK-NEXT: vmin.vx v16, v16, a0298; CHECK-NEXT: ret299 %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0300 %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer301 %v = call <256 x i8> @llvm.vp.smin.v258i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> splat (i1 true), i32 %evl)302 ret <256 x i8> %v303}304 305; Test splitting when the %evl is a known constant.306 307define <256 x i8> @vmin_vx_v258i8_evl129(<256 x i8> %va, i8 %b, <256 x i1> %m) {308; CHECK-LABEL: vmin_vx_v258i8_evl129:309; CHECK: # %bb.0:310; CHECK-NEXT: vsetivli zero, 1, e8, m8, ta, ma311; CHECK-NEXT: vlm.v v24, (a1)312; CHECK-NEXT: li a1, 128313; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma314; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t315; CHECK-NEXT: vmv1r.v v0, v24316; CHECK-NEXT: vsetivli zero, 1, e8, m8, ta, ma317; CHECK-NEXT: vmin.vx v16, v16, a0, v0.t318; CHECK-NEXT: ret319 %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0320 %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer321 %v = call <256 x i8> @llvm.vp.smin.v258i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> %m, i32 129)322 ret <256 x i8> %v323}324 325; The upper half is doing nothing.326 327define <256 x i8> @vmin_vx_v258i8_evl128(<256 x i8> %va, i8 %b, <256 x i1> %m) {328; CHECK-LABEL: vmin_vx_v258i8_evl128:329; CHECK: # %bb.0:330; CHECK-NEXT: li a1, 128331; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma332; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t333; CHECK-NEXT: ret334 %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0335 %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer336 %v = call <256 x i8> @llvm.vp.smin.v258i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> %m, i32 128)337 ret <256 x i8> %v338}339 340define <2 x i16> @vmin_vv_v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 zeroext %evl) {341; CHECK-LABEL: vmin_vv_v2i16:342; CHECK: # %bb.0:343; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma344; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t345; CHECK-NEXT: ret346 %v = call <2 x i16> @llvm.vp.smin.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 %evl)347 ret <2 x i16> %v348}349 350define <2 x i16> @vmin_vv_v2i16_unmasked(<2 x i16> %va, <2 x i16> %b, i32 zeroext %evl) {351; CHECK-LABEL: vmin_vv_v2i16_unmasked:352; CHECK: # %bb.0:353; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma354; CHECK-NEXT: vmin.vv v8, v8, v9355; CHECK-NEXT: ret356 %v = call <2 x i16> @llvm.vp.smin.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> splat (i1 true), i32 %evl)357 ret <2 x i16> %v358}359 360define <2 x i16> @vmin_vx_v2i16(<2 x i16> %va, i16 %b, <2 x i1> %m, i32 zeroext %evl) {361; CHECK-LABEL: vmin_vx_v2i16:362; CHECK: # %bb.0:363; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma364; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t365; CHECK-NEXT: ret366 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0367 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer368 %v = call <2 x i16> @llvm.vp.smin.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> %m, i32 %evl)369 ret <2 x i16> %v370}371 372define <2 x i16> @vmin_vx_v2i16_unmasked(<2 x i16> %va, i16 %b, i32 zeroext %evl) {373; CHECK-LABEL: vmin_vx_v2i16_unmasked:374; CHECK: # %bb.0:375; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma376; CHECK-NEXT: vmin.vx v8, v8, a0377; CHECK-NEXT: ret378 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0379 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer380 %v = call <2 x i16> @llvm.vp.smin.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> splat (i1 true), i32 %evl)381 ret <2 x i16> %v382}383 384define <4 x i16> @vmin_vv_v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 zeroext %evl) {385; CHECK-LABEL: vmin_vv_v4i16:386; CHECK: # %bb.0:387; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma388; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t389; CHECK-NEXT: ret390 %v = call <4 x i16> @llvm.vp.smin.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 %evl)391 ret <4 x i16> %v392}393 394define <4 x i16> @vmin_vv_v4i16_unmasked(<4 x i16> %va, <4 x i16> %b, i32 zeroext %evl) {395; CHECK-LABEL: vmin_vv_v4i16_unmasked:396; CHECK: # %bb.0:397; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma398; CHECK-NEXT: vmin.vv v8, v8, v9399; CHECK-NEXT: ret400 %v = call <4 x i16> @llvm.vp.smin.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> splat (i1 true), i32 %evl)401 ret <4 x i16> %v402}403 404define <4 x i16> @vmin_vx_v4i16(<4 x i16> %va, i16 %b, <4 x i1> %m, i32 zeroext %evl) {405; CHECK-LABEL: vmin_vx_v4i16:406; CHECK: # %bb.0:407; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma408; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t409; CHECK-NEXT: ret410 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0411 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer412 %v = call <4 x i16> @llvm.vp.smin.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> %m, i32 %evl)413 ret <4 x i16> %v414}415 416define <4 x i16> @vmin_vx_v4i16_unmasked(<4 x i16> %va, i16 %b, i32 zeroext %evl) {417; CHECK-LABEL: vmin_vx_v4i16_unmasked:418; CHECK: # %bb.0:419; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma420; CHECK-NEXT: vmin.vx v8, v8, a0421; CHECK-NEXT: ret422 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0423 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer424 %v = call <4 x i16> @llvm.vp.smin.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> splat (i1 true), i32 %evl)425 ret <4 x i16> %v426}427 428define <8 x i16> @vmin_vv_v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 zeroext %evl) {429; CHECK-LABEL: vmin_vv_v8i16:430; CHECK: # %bb.0:431; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma432; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t433; CHECK-NEXT: ret434 %v = call <8 x i16> @llvm.vp.smin.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 %evl)435 ret <8 x i16> %v436}437 438define <8 x i16> @vmin_vv_v8i16_unmasked(<8 x i16> %va, <8 x i16> %b, i32 zeroext %evl) {439; CHECK-LABEL: vmin_vv_v8i16_unmasked:440; CHECK: # %bb.0:441; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma442; CHECK-NEXT: vmin.vv v8, v8, v9443; CHECK-NEXT: ret444 %v = call <8 x i16> @llvm.vp.smin.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> splat (i1 true), i32 %evl)445 ret <8 x i16> %v446}447 448define <8 x i16> @vmin_vx_v8i16(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {449; CHECK-LABEL: vmin_vx_v8i16:450; CHECK: # %bb.0:451; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma452; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t453; CHECK-NEXT: ret454 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0455 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer456 %v = call <8 x i16> @llvm.vp.smin.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> %m, i32 %evl)457 ret <8 x i16> %v458}459 460define <8 x i16> @vmin_vx_v8i16_unmasked(<8 x i16> %va, i16 %b, i32 zeroext %evl) {461; CHECK-LABEL: vmin_vx_v8i16_unmasked:462; CHECK: # %bb.0:463; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma464; CHECK-NEXT: vmin.vx v8, v8, a0465; CHECK-NEXT: ret466 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0467 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer468 %v = call <8 x i16> @llvm.vp.smin.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> splat (i1 true), i32 %evl)469 ret <8 x i16> %v470}471 472define <16 x i16> @vmin_vv_v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 zeroext %evl) {473; CHECK-LABEL: vmin_vv_v16i16:474; CHECK: # %bb.0:475; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma476; CHECK-NEXT: vmin.vv v8, v8, v10, v0.t477; CHECK-NEXT: ret478 %v = call <16 x i16> @llvm.vp.smin.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 %evl)479 ret <16 x i16> %v480}481 482define <16 x i16> @vmin_vv_v16i16_unmasked(<16 x i16> %va, <16 x i16> %b, i32 zeroext %evl) {483; CHECK-LABEL: vmin_vv_v16i16_unmasked:484; CHECK: # %bb.0:485; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma486; CHECK-NEXT: vmin.vv v8, v8, v10487; CHECK-NEXT: ret488 %v = call <16 x i16> @llvm.vp.smin.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> splat (i1 true), i32 %evl)489 ret <16 x i16> %v490}491 492define <16 x i16> @vmin_vx_v16i16(<16 x i16> %va, i16 %b, <16 x i1> %m, i32 zeroext %evl) {493; CHECK-LABEL: vmin_vx_v16i16:494; CHECK: # %bb.0:495; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma496; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t497; CHECK-NEXT: ret498 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0499 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer500 %v = call <16 x i16> @llvm.vp.smin.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> %m, i32 %evl)501 ret <16 x i16> %v502}503 504define <16 x i16> @vmin_vx_v16i16_unmasked(<16 x i16> %va, i16 %b, i32 zeroext %evl) {505; CHECK-LABEL: vmin_vx_v16i16_unmasked:506; CHECK: # %bb.0:507; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma508; CHECK-NEXT: vmin.vx v8, v8, a0509; CHECK-NEXT: ret510 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0511 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer512 %v = call <16 x i16> @llvm.vp.smin.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> splat (i1 true), i32 %evl)513 ret <16 x i16> %v514}515 516define <2 x i32> @vmin_vv_v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 zeroext %evl) {517; CHECK-LABEL: vmin_vv_v2i32:518; CHECK: # %bb.0:519; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma520; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t521; CHECK-NEXT: ret522 %v = call <2 x i32> @llvm.vp.smin.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 %evl)523 ret <2 x i32> %v524}525 526define <2 x i32> @vmin_vv_v2i32_unmasked(<2 x i32> %va, <2 x i32> %b, i32 zeroext %evl) {527; CHECK-LABEL: vmin_vv_v2i32_unmasked:528; CHECK: # %bb.0:529; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma530; CHECK-NEXT: vmin.vv v8, v8, v9531; CHECK-NEXT: ret532 %v = call <2 x i32> @llvm.vp.smin.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> splat (i1 true), i32 %evl)533 ret <2 x i32> %v534}535 536define <2 x i32> @vmin_vx_v2i32(<2 x i32> %va, i32 %b, <2 x i1> %m, i32 zeroext %evl) {537; CHECK-LABEL: vmin_vx_v2i32:538; CHECK: # %bb.0:539; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma540; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t541; CHECK-NEXT: ret542 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0543 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer544 %v = call <2 x i32> @llvm.vp.smin.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> %m, i32 %evl)545 ret <2 x i32> %v546}547 548define <2 x i32> @vmin_vx_v2i32_unmasked(<2 x i32> %va, i32 %b, i32 zeroext %evl) {549; CHECK-LABEL: vmin_vx_v2i32_unmasked:550; CHECK: # %bb.0:551; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma552; CHECK-NEXT: vmin.vx v8, v8, a0553; CHECK-NEXT: ret554 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0555 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer556 %v = call <2 x i32> @llvm.vp.smin.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> splat (i1 true), i32 %evl)557 ret <2 x i32> %v558}559 560define <4 x i32> @vmin_vv_v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 zeroext %evl) {561; CHECK-LABEL: vmin_vv_v4i32:562; CHECK: # %bb.0:563; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma564; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t565; CHECK-NEXT: ret566 %v = call <4 x i32> @llvm.vp.smin.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 %evl)567 ret <4 x i32> %v568}569 570define <4 x i32> @vmin_vv_v4i32_unmasked(<4 x i32> %va, <4 x i32> %b, i32 zeroext %evl) {571; CHECK-LABEL: vmin_vv_v4i32_unmasked:572; CHECK: # %bb.0:573; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma574; CHECK-NEXT: vmin.vv v8, v8, v9575; CHECK-NEXT: ret576 %v = call <4 x i32> @llvm.vp.smin.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> splat (i1 true), i32 %evl)577 ret <4 x i32> %v578}579 580define <4 x i32> @vmin_vx_v4i32(<4 x i32> %va, i32 %b, <4 x i1> %m, i32 zeroext %evl) {581; CHECK-LABEL: vmin_vx_v4i32:582; CHECK: # %bb.0:583; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma584; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t585; CHECK-NEXT: ret586 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0587 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer588 %v = call <4 x i32> @llvm.vp.smin.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> %m, i32 %evl)589 ret <4 x i32> %v590}591 592define <4 x i32> @vmin_vx_v4i32_unmasked(<4 x i32> %va, i32 %b, i32 zeroext %evl) {593; CHECK-LABEL: vmin_vx_v4i32_unmasked:594; CHECK: # %bb.0:595; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma596; CHECK-NEXT: vmin.vx v8, v8, a0597; CHECK-NEXT: ret598 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0599 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer600 %v = call <4 x i32> @llvm.vp.smin.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> splat (i1 true), i32 %evl)601 ret <4 x i32> %v602}603 604define <8 x i32> @vmin_vv_v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 zeroext %evl) {605; CHECK-LABEL: vmin_vv_v8i32:606; CHECK: # %bb.0:607; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma608; CHECK-NEXT: vmin.vv v8, v8, v10, v0.t609; CHECK-NEXT: ret610 %v = call <8 x i32> @llvm.vp.smin.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 %evl)611 ret <8 x i32> %v612}613 614define <8 x i32> @vmin_vv_v8i32_unmasked(<8 x i32> %va, <8 x i32> %b, i32 zeroext %evl) {615; CHECK-LABEL: vmin_vv_v8i32_unmasked:616; CHECK: # %bb.0:617; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma618; CHECK-NEXT: vmin.vv v8, v8, v10619; CHECK-NEXT: ret620 %v = call <8 x i32> @llvm.vp.smin.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> splat (i1 true), i32 %evl)621 ret <8 x i32> %v622}623 624define <8 x i32> @vmin_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {625; CHECK-LABEL: vmin_vx_v8i32:626; CHECK: # %bb.0:627; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma628; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t629; CHECK-NEXT: ret630 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0631 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer632 %v = call <8 x i32> @llvm.vp.smin.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 %evl)633 ret <8 x i32> %v634}635 636define <8 x i32> @vmin_vx_v8i32_unmasked(<8 x i32> %va, i32 %b, i32 zeroext %evl) {637; CHECK-LABEL: vmin_vx_v8i32_unmasked:638; CHECK: # %bb.0:639; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma640; CHECK-NEXT: vmin.vx v8, v8, a0641; CHECK-NEXT: ret642 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0643 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer644 %v = call <8 x i32> @llvm.vp.smin.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> splat (i1 true), i32 %evl)645 ret <8 x i32> %v646}647 648define <16 x i32> @vmin_vv_v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 zeroext %evl) {649; CHECK-LABEL: vmin_vv_v16i32:650; CHECK: # %bb.0:651; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma652; CHECK-NEXT: vmin.vv v8, v8, v12, v0.t653; CHECK-NEXT: ret654 %v = call <16 x i32> @llvm.vp.smin.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 %evl)655 ret <16 x i32> %v656}657 658define <16 x i32> @vmin_vv_v16i32_unmasked(<16 x i32> %va, <16 x i32> %b, i32 zeroext %evl) {659; CHECK-LABEL: vmin_vv_v16i32_unmasked:660; CHECK: # %bb.0:661; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma662; CHECK-NEXT: vmin.vv v8, v8, v12663; CHECK-NEXT: ret664 %v = call <16 x i32> @llvm.vp.smin.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> splat (i1 true), i32 %evl)665 ret <16 x i32> %v666}667 668define <16 x i32> @vmin_vx_v16i32(<16 x i32> %va, i32 %b, <16 x i1> %m, i32 zeroext %evl) {669; CHECK-LABEL: vmin_vx_v16i32:670; CHECK: # %bb.0:671; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma672; CHECK-NEXT: vmin.vx v8, v8, a0, v0.t673; CHECK-NEXT: ret674 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0675 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer676 %v = call <16 x i32> @llvm.vp.smin.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> %m, i32 %evl)677 ret <16 x i32> %v678}679 680define <16 x i32> @vmin_vx_v16i32_unmasked(<16 x i32> %va, i32 %b, i32 zeroext %evl) {681; CHECK-LABEL: vmin_vx_v16i32_unmasked:682; CHECK: # %bb.0:683; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma684; CHECK-NEXT: vmin.vx v8, v8, a0685; CHECK-NEXT: ret686 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0687 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer688 %v = call <16 x i32> @llvm.vp.smin.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> splat (i1 true), i32 %evl)689 ret <16 x i32> %v690}691 692define <2 x i64> @vmin_vv_v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 zeroext %evl) {693; CHECK-LABEL: vmin_vv_v2i64:694; CHECK: # %bb.0:695; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma696; CHECK-NEXT: vmin.vv v8, v8, v9, v0.t697; CHECK-NEXT: ret698 %v = call <2 x i64> @llvm.vp.smin.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 %evl)699 ret <2 x i64> %v700}701 702define <2 x i64> @vmin_vv_v2i64_unmasked(<2 x i64> %va, <2 x i64> %b, i32 zeroext %evl) {703; CHECK-LABEL: vmin_vv_v2i64_unmasked:704; CHECK: # %bb.0:705; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma706; CHECK-NEXT: vmin.vv v8, v8, v9707; CHECK-NEXT: ret708 %v = call <2 x i64> @llvm.vp.smin.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> splat (i1 true), i32 %evl)709 ret <2 x i64> %v710}711 712define <2 x i64> @vmin_vx_v2i64(<2 x i64> %va, i64 %b, <2 x i1> %m, i32 zeroext %evl) {713; RV32-LABEL: vmin_vx_v2i64:714; RV32: # %bb.0:715; RV32-NEXT: addi sp, sp, -16716; RV32-NEXT: .cfi_def_cfa_offset 16717; RV32-NEXT: sw a0, 8(sp)718; RV32-NEXT: sw a1, 12(sp)719; RV32-NEXT: addi a0, sp, 8720; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma721; RV32-NEXT: vlse64.v v9, (a0), zero722; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma723; RV32-NEXT: vmin.vv v8, v8, v9, v0.t724; RV32-NEXT: addi sp, sp, 16725; RV32-NEXT: .cfi_def_cfa_offset 0726; RV32-NEXT: ret727;728; RV64-LABEL: vmin_vx_v2i64:729; RV64: # %bb.0:730; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma731; RV64-NEXT: vmin.vx v8, v8, a0, v0.t732; RV64-NEXT: ret733 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0734 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer735 %v = call <2 x i64> @llvm.vp.smin.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> %m, i32 %evl)736 ret <2 x i64> %v737}738 739define <2 x i64> @vmin_vx_v2i64_unmasked(<2 x i64> %va, i64 %b, i32 zeroext %evl) {740; RV32-LABEL: vmin_vx_v2i64_unmasked:741; RV32: # %bb.0:742; RV32-NEXT: addi sp, sp, -16743; RV32-NEXT: .cfi_def_cfa_offset 16744; RV32-NEXT: sw a0, 8(sp)745; RV32-NEXT: sw a1, 12(sp)746; RV32-NEXT: addi a0, sp, 8747; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma748; RV32-NEXT: vlse64.v v9, (a0), zero749; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma750; RV32-NEXT: vmin.vv v8, v8, v9751; RV32-NEXT: addi sp, sp, 16752; RV32-NEXT: .cfi_def_cfa_offset 0753; RV32-NEXT: ret754;755; RV64-LABEL: vmin_vx_v2i64_unmasked:756; RV64: # %bb.0:757; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma758; RV64-NEXT: vmin.vx v8, v8, a0759; RV64-NEXT: ret760 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0761 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer762 %v = call <2 x i64> @llvm.vp.smin.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> splat (i1 true), i32 %evl)763 ret <2 x i64> %v764}765 766define <4 x i64> @vmin_vv_v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 zeroext %evl) {767; CHECK-LABEL: vmin_vv_v4i64:768; CHECK: # %bb.0:769; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma770; CHECK-NEXT: vmin.vv v8, v8, v10, v0.t771; CHECK-NEXT: ret772 %v = call <4 x i64> @llvm.vp.smin.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 %evl)773 ret <4 x i64> %v774}775 776define <4 x i64> @vmin_vv_v4i64_unmasked(<4 x i64> %va, <4 x i64> %b, i32 zeroext %evl) {777; CHECK-LABEL: vmin_vv_v4i64_unmasked:778; CHECK: # %bb.0:779; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma780; CHECK-NEXT: vmin.vv v8, v8, v10781; CHECK-NEXT: ret782 %v = call <4 x i64> @llvm.vp.smin.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> splat (i1 true), i32 %evl)783 ret <4 x i64> %v784}785 786define <4 x i64> @vmin_vx_v4i64(<4 x i64> %va, i64 %b, <4 x i1> %m, i32 zeroext %evl) {787; RV32-LABEL: vmin_vx_v4i64:788; RV32: # %bb.0:789; RV32-NEXT: addi sp, sp, -16790; RV32-NEXT: .cfi_def_cfa_offset 16791; RV32-NEXT: sw a0, 8(sp)792; RV32-NEXT: sw a1, 12(sp)793; RV32-NEXT: addi a0, sp, 8794; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma795; RV32-NEXT: vlse64.v v10, (a0), zero796; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma797; RV32-NEXT: vmin.vv v8, v8, v10, v0.t798; RV32-NEXT: addi sp, sp, 16799; RV32-NEXT: .cfi_def_cfa_offset 0800; RV32-NEXT: ret801;802; RV64-LABEL: vmin_vx_v4i64:803; RV64: # %bb.0:804; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma805; RV64-NEXT: vmin.vx v8, v8, a0, v0.t806; RV64-NEXT: ret807 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0808 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer809 %v = call <4 x i64> @llvm.vp.smin.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> %m, i32 %evl)810 ret <4 x i64> %v811}812 813define <4 x i64> @vmin_vx_v4i64_unmasked(<4 x i64> %va, i64 %b, i32 zeroext %evl) {814; RV32-LABEL: vmin_vx_v4i64_unmasked:815; RV32: # %bb.0:816; RV32-NEXT: addi sp, sp, -16817; RV32-NEXT: .cfi_def_cfa_offset 16818; RV32-NEXT: sw a0, 8(sp)819; RV32-NEXT: sw a1, 12(sp)820; RV32-NEXT: addi a0, sp, 8821; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma822; RV32-NEXT: vlse64.v v10, (a0), zero823; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma824; RV32-NEXT: vmin.vv v8, v8, v10825; RV32-NEXT: addi sp, sp, 16826; RV32-NEXT: .cfi_def_cfa_offset 0827; RV32-NEXT: ret828;829; RV64-LABEL: vmin_vx_v4i64_unmasked:830; RV64: # %bb.0:831; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma832; RV64-NEXT: vmin.vx v8, v8, a0833; RV64-NEXT: ret834 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0835 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer836 %v = call <4 x i64> @llvm.vp.smin.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> splat (i1 true), i32 %evl)837 ret <4 x i64> %v838}839 840define <8 x i64> @vmin_vv_v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 zeroext %evl) {841; CHECK-LABEL: vmin_vv_v8i64:842; CHECK: # %bb.0:843; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma844; CHECK-NEXT: vmin.vv v8, v8, v12, v0.t845; CHECK-NEXT: ret846 %v = call <8 x i64> @llvm.vp.smin.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 %evl)847 ret <8 x i64> %v848}849 850define <8 x i64> @vmin_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %b, i32 zeroext %evl) {851; CHECK-LABEL: vmin_vv_v8i64_unmasked:852; CHECK: # %bb.0:853; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma854; CHECK-NEXT: vmin.vv v8, v8, v12855; CHECK-NEXT: ret856 %v = call <8 x i64> @llvm.vp.smin.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> splat (i1 true), i32 %evl)857 ret <8 x i64> %v858}859 860define <8 x i64> @vmin_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {861; RV32-LABEL: vmin_vx_v8i64:862; RV32: # %bb.0:863; RV32-NEXT: addi sp, sp, -16864; RV32-NEXT: .cfi_def_cfa_offset 16865; RV32-NEXT: sw a0, 8(sp)866; RV32-NEXT: sw a1, 12(sp)867; RV32-NEXT: addi a0, sp, 8868; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma869; RV32-NEXT: vlse64.v v12, (a0), zero870; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma871; RV32-NEXT: vmin.vv v8, v8, v12, v0.t872; RV32-NEXT: addi sp, sp, 16873; RV32-NEXT: .cfi_def_cfa_offset 0874; RV32-NEXT: ret875;876; RV64-LABEL: vmin_vx_v8i64:877; RV64: # %bb.0:878; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma879; RV64-NEXT: vmin.vx v8, v8, a0, v0.t880; RV64-NEXT: ret881 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0882 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer883 %v = call <8 x i64> @llvm.vp.smin.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)884 ret <8 x i64> %v885}886 887define <8 x i64> @vmin_vx_v8i64_unmasked(<8 x i64> %va, i64 %b, i32 zeroext %evl) {888; RV32-LABEL: vmin_vx_v8i64_unmasked:889; RV32: # %bb.0:890; RV32-NEXT: addi sp, sp, -16891; RV32-NEXT: .cfi_def_cfa_offset 16892; RV32-NEXT: sw a0, 8(sp)893; RV32-NEXT: sw a1, 12(sp)894; RV32-NEXT: addi a0, sp, 8895; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma896; RV32-NEXT: vlse64.v v12, (a0), zero897; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma898; RV32-NEXT: vmin.vv v8, v8, v12899; RV32-NEXT: addi sp, sp, 16900; RV32-NEXT: .cfi_def_cfa_offset 0901; RV32-NEXT: ret902;903; RV64-LABEL: vmin_vx_v8i64_unmasked:904; RV64: # %bb.0:905; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma906; RV64-NEXT: vmin.vx v8, v8, a0907; RV64-NEXT: ret908 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0909 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer910 %v = call <8 x i64> @llvm.vp.smin.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> splat (i1 true), i32 %evl)911 ret <8 x i64> %v912}913 914define <16 x i64> @vmin_vv_v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 zeroext %evl) {915; CHECK-LABEL: vmin_vv_v16i64:916; CHECK: # %bb.0:917; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma918; CHECK-NEXT: vmin.vv v8, v8, v16, v0.t919; CHECK-NEXT: ret920 %v = call <16 x i64> @llvm.vp.smin.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 %evl)921 ret <16 x i64> %v922}923 924define <16 x i64> @vmin_vv_v16i64_unmasked(<16 x i64> %va, <16 x i64> %b, i32 zeroext %evl) {925; CHECK-LABEL: vmin_vv_v16i64_unmasked:926; CHECK: # %bb.0:927; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma928; CHECK-NEXT: vmin.vv v8, v8, v16929; CHECK-NEXT: ret930 %v = call <16 x i64> @llvm.vp.smin.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> splat (i1 true), i32 %evl)931 ret <16 x i64> %v932}933 934define <16 x i64> @vmin_vx_v16i64(<16 x i64> %va, i64 %b, <16 x i1> %m, i32 zeroext %evl) {935; RV32-LABEL: vmin_vx_v16i64:936; RV32: # %bb.0:937; RV32-NEXT: addi sp, sp, -16938; RV32-NEXT: .cfi_def_cfa_offset 16939; RV32-NEXT: sw a0, 8(sp)940; RV32-NEXT: sw a1, 12(sp)941; RV32-NEXT: addi a0, sp, 8942; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma943; RV32-NEXT: vlse64.v v16, (a0), zero944; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma945; RV32-NEXT: vmin.vv v8, v8, v16, v0.t946; RV32-NEXT: addi sp, sp, 16947; RV32-NEXT: .cfi_def_cfa_offset 0948; RV32-NEXT: ret949;950; RV64-LABEL: vmin_vx_v16i64:951; RV64: # %bb.0:952; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma953; RV64-NEXT: vmin.vx v8, v8, a0, v0.t954; RV64-NEXT: ret955 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0956 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer957 %v = call <16 x i64> @llvm.vp.smin.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> %m, i32 %evl)958 ret <16 x i64> %v959}960 961define <16 x i64> @vmin_vx_v16i64_unmasked(<16 x i64> %va, i64 %b, i32 zeroext %evl) {962; RV32-LABEL: vmin_vx_v16i64_unmasked:963; RV32: # %bb.0:964; RV32-NEXT: addi sp, sp, -16965; RV32-NEXT: .cfi_def_cfa_offset 16966; RV32-NEXT: sw a0, 8(sp)967; RV32-NEXT: sw a1, 12(sp)968; RV32-NEXT: addi a0, sp, 8969; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma970; RV32-NEXT: vlse64.v v16, (a0), zero971; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma972; RV32-NEXT: vmin.vv v8, v8, v16973; RV32-NEXT: addi sp, sp, 16974; RV32-NEXT: .cfi_def_cfa_offset 0975; RV32-NEXT: ret976;977; RV64-LABEL: vmin_vx_v16i64_unmasked:978; RV64: # %bb.0:979; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma980; RV64-NEXT: vmin.vx v8, v8, a0981; RV64-NEXT: ret982 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0983 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer984 %v = call <16 x i64> @llvm.vp.smin.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> splat (i1 true), i32 %evl)985 ret <16 x i64> %v986}987 988; Test that split-legalization works as expected.989 990define <32 x i64> @vmin_vx_v32i64(<32 x i64> %va, <32 x i1> %m, i32 zeroext %evl) {991; CHECK-LABEL: vmin_vx_v32i64:992; CHECK: # %bb.0:993; CHECK-NEXT: li a2, 16994; CHECK-NEXT: vsetivli zero, 2, e8, mf4, ta, ma995; CHECK-NEXT: vslidedown.vi v24, v0, 2996; CHECK-NEXT: mv a1, a0997; CHECK-NEXT: bltu a0, a2, .LBB74_2998; CHECK-NEXT: # %bb.1:999; CHECK-NEXT: li a1, 161000; CHECK-NEXT: .LBB74_2:1001; CHECK-NEXT: li a2, -11002; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma1003; CHECK-NEXT: vmin.vx v8, v8, a2, v0.t1004; CHECK-NEXT: addi a1, a0, -161005; CHECK-NEXT: sltu a0, a0, a11006; CHECK-NEXT: addi a0, a0, -11007; CHECK-NEXT: and a0, a0, a11008; CHECK-NEXT: vmv1r.v v0, v241009; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1010; CHECK-NEXT: vmin.vx v16, v16, a2, v0.t1011; CHECK-NEXT: ret1012 %v = call <32 x i64> @llvm.vp.smin.v32i64(<32 x i64> %va, <32 x i64> splat (i64 -1), <32 x i1> %m, i32 %evl)1013 ret <32 x i64> %v1014}1015