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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <8 x i7> @vminu_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vminu_vv_v8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: li a1, 12711; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma12; CHECK-NEXT: vand.vx v9, v9, a1, v0.t13; CHECK-NEXT: vand.vx v8, v8, a1, v0.t14; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t15; CHECK-NEXT: ret16 %v = call <8 x i7> @llvm.vp.umin.v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 %evl)17 ret <8 x i7> %v18}19 20define <2 x i8> @vminu_vv_v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 zeroext %evl) {21; CHECK-LABEL: vminu_vv_v2i8:22; CHECK: # %bb.0:23; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma24; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t25; CHECK-NEXT: ret26 %v = call <2 x i8> @llvm.vp.umin.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 %evl)27 ret <2 x i8> %v28}29 30define <2 x i8> @vminu_vv_v2i8_unmasked(<2 x i8> %va, <2 x i8> %b, i32 zeroext %evl) {31; CHECK-LABEL: vminu_vv_v2i8_unmasked:32; CHECK: # %bb.0:33; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma34; CHECK-NEXT: vminu.vv v8, v8, v935; CHECK-NEXT: ret36 %v = call <2 x i8> @llvm.vp.umin.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> splat (i1 true), i32 %evl)37 ret <2 x i8> %v38}39 40define <2 x i8> @vminu_vx_v2i8(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {41; CHECK-LABEL: vminu_vx_v2i8:42; CHECK: # %bb.0:43; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma44; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t45; CHECK-NEXT: ret46 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 047 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer48 %v = call <2 x i8> @llvm.vp.umin.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> %m, i32 %evl)49 ret <2 x i8> %v50}51 52define <2 x i8> @vminu_vx_v2i8_unmasked(<2 x i8> %va, i8 %b, i32 zeroext %evl) {53; CHECK-LABEL: vminu_vx_v2i8_unmasked:54; CHECK: # %bb.0:55; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma56; CHECK-NEXT: vminu.vx v8, v8, a057; CHECK-NEXT: ret58 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 059 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer60 %v = call <2 x i8> @llvm.vp.umin.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> splat (i1 true), i32 %evl)61 ret <2 x i8> %v62}63 64define <4 x i8> @vminu_vv_v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 zeroext %evl) {65; CHECK-LABEL: vminu_vv_v4i8:66; CHECK: # %bb.0:67; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma68; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t69; CHECK-NEXT: ret70 %v = call <4 x i8> @llvm.vp.umin.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 %evl)71 ret <4 x i8> %v72}73 74define <4 x i8> @vminu_vv_v4i8_unmasked(<4 x i8> %va, <4 x i8> %b, i32 zeroext %evl) {75; CHECK-LABEL: vminu_vv_v4i8_unmasked:76; CHECK: # %bb.0:77; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma78; CHECK-NEXT: vminu.vv v8, v8, v979; CHECK-NEXT: ret80 %v = call <4 x i8> @llvm.vp.umin.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> splat (i1 true), i32 %evl)81 ret <4 x i8> %v82}83 84define <4 x i8> @vminu_vx_v4i8(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {85; CHECK-LABEL: vminu_vx_v4i8:86; CHECK: # %bb.0:87; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma88; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t89; CHECK-NEXT: ret90 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 091 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer92 %v = call <4 x i8> @llvm.vp.umin.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> %m, i32 %evl)93 ret <4 x i8> %v94}95 96define <4 x i8> @vminu_vx_v4i8_commute(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {97; CHECK-LABEL: vminu_vx_v4i8_commute:98; CHECK: # %bb.0:99; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma100; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t101; CHECK-NEXT: ret102 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0103 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer104 %v = call <4 x i8> @llvm.vp.umin.v4i8(<4 x i8> %vb, <4 x i8> %va, <4 x i1> %m, i32 %evl)105 ret <4 x i8> %v106}107 108define <4 x i8> @vminu_vx_v4i8_unmasked(<4 x i8> %va, i8 %b, i32 zeroext %evl) {109; CHECK-LABEL: vminu_vx_v4i8_unmasked:110; CHECK: # %bb.0:111; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma112; CHECK-NEXT: vminu.vx v8, v8, a0113; CHECK-NEXT: ret114 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0115 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer116 %v = call <4 x i8> @llvm.vp.umin.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> splat (i1 true), i32 %evl)117 ret <4 x i8> %v118}119 120define <5 x i8> @vminu_vv_v5i8(<5 x i8> %va, <5 x i8> %b, <5 x i1> %m, i32 zeroext %evl) {121; CHECK-LABEL: vminu_vv_v5i8:122; CHECK: # %bb.0:123; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma124; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t125; CHECK-NEXT: ret126 %v = call <5 x i8> @llvm.vp.umin.v5i8(<5 x i8> %va, <5 x i8> %b, <5 x i1> %m, i32 %evl)127 ret <5 x i8> %v128}129 130define <5 x i8> @vminu_vv_v5i8_unmasked(<5 x i8> %va, <5 x i8> %b, i32 zeroext %evl) {131; CHECK-LABEL: vminu_vv_v5i8_unmasked:132; CHECK: # %bb.0:133; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma134; CHECK-NEXT: vminu.vv v8, v8, v9135; CHECK-NEXT: ret136 %v = call <5 x i8> @llvm.vp.umin.v5i8(<5 x i8> %va, <5 x i8> %b, <5 x i1> splat (i1 true), i32 %evl)137 ret <5 x i8> %v138}139 140define <5 x i8> @vminu_vx_v5i8(<5 x i8> %va, i8 %b, <5 x i1> %m, i32 zeroext %evl) {141; CHECK-LABEL: vminu_vx_v5i8:142; CHECK: # %bb.0:143; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma144; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t145; CHECK-NEXT: ret146 %elt.head = insertelement <5 x i8> poison, i8 %b, i32 0147 %vb = shufflevector <5 x i8> %elt.head, <5 x i8> poison, <5 x i32> zeroinitializer148 %v = call <5 x i8> @llvm.vp.umin.v5i8(<5 x i8> %va, <5 x i8> %vb, <5 x i1> %m, i32 %evl)149 ret <5 x i8> %v150}151 152define <5 x i8> @vminu_vx_v5i8_unmasked(<5 x i8> %va, i8 %b, i32 zeroext %evl) {153; CHECK-LABEL: vminu_vx_v5i8_unmasked:154; CHECK: # %bb.0:155; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma156; CHECK-NEXT: vminu.vx v8, v8, a0157; CHECK-NEXT: ret158 %elt.head = insertelement <5 x i8> poison, i8 %b, i32 0159 %vb = shufflevector <5 x i8> %elt.head, <5 x i8> poison, <5 x i32> zeroinitializer160 %v = call <5 x i8> @llvm.vp.umin.v5i8(<5 x i8> %va, <5 x i8> %vb, <5 x i1> splat (i1 true), i32 %evl)161 ret <5 x i8> %v162}163 164define <8 x i8> @vminu_vv_v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 zeroext %evl) {165; CHECK-LABEL: vminu_vv_v8i8:166; CHECK: # %bb.0:167; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma168; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t169; CHECK-NEXT: ret170 %v = call <8 x i8> @llvm.vp.umin.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 %evl)171 ret <8 x i8> %v172}173 174define <8 x i8> @vminu_vv_v8i8_unmasked(<8 x i8> %va, <8 x i8> %b, i32 zeroext %evl) {175; CHECK-LABEL: vminu_vv_v8i8_unmasked:176; CHECK: # %bb.0:177; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma178; CHECK-NEXT: vminu.vv v8, v8, v9179; CHECK-NEXT: ret180 %v = call <8 x i8> @llvm.vp.umin.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> splat (i1 true), i32 %evl)181 ret <8 x i8> %v182}183 184define <8 x i8> @vminu_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {185; CHECK-LABEL: vminu_vx_v8i8:186; CHECK: # %bb.0:187; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma188; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t189; CHECK-NEXT: ret190 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0191 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer192 %v = call <8 x i8> @llvm.vp.umin.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 %evl)193 ret <8 x i8> %v194}195 196define <8 x i8> @vminu_vx_v8i8_unmasked(<8 x i8> %va, i8 %b, i32 zeroext %evl) {197; CHECK-LABEL: vminu_vx_v8i8_unmasked:198; CHECK: # %bb.0:199; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma200; CHECK-NEXT: vminu.vx v8, v8, a0201; CHECK-NEXT: ret202 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0203 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer204 %v = call <8 x i8> @llvm.vp.umin.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> splat (i1 true), i32 %evl)205 ret <8 x i8> %v206}207 208define <16 x i8> @vminu_vv_v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 zeroext %evl) {209; CHECK-LABEL: vminu_vv_v16i8:210; CHECK: # %bb.0:211; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma212; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t213; CHECK-NEXT: ret214 %v = call <16 x i8> @llvm.vp.umin.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 %evl)215 ret <16 x i8> %v216}217 218define <16 x i8> @vminu_vv_v16i8_unmasked(<16 x i8> %va, <16 x i8> %b, i32 zeroext %evl) {219; CHECK-LABEL: vminu_vv_v16i8_unmasked:220; CHECK: # %bb.0:221; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma222; CHECK-NEXT: vminu.vv v8, v8, v9223; CHECK-NEXT: ret224 %v = call <16 x i8> @llvm.vp.umin.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> splat (i1 true), i32 %evl)225 ret <16 x i8> %v226}227 228define <16 x i8> @vminu_vx_v16i8(<16 x i8> %va, i8 %b, <16 x i1> %m, i32 zeroext %evl) {229; CHECK-LABEL: vminu_vx_v16i8:230; CHECK: # %bb.0:231; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma232; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t233; CHECK-NEXT: ret234 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0235 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer236 %v = call <16 x i8> @llvm.vp.umin.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> %m, i32 %evl)237 ret <16 x i8> %v238}239 240define <16 x i8> @vminu_vx_v16i8_unmasked(<16 x i8> %va, i8 %b, i32 zeroext %evl) {241; CHECK-LABEL: vminu_vx_v16i8_unmasked:242; CHECK: # %bb.0:243; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma244; CHECK-NEXT: vminu.vx v8, v8, a0245; CHECK-NEXT: ret246 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0247 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer248 %v = call <16 x i8> @llvm.vp.umin.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> splat (i1 true), i32 %evl)249 ret <16 x i8> %v250}251 252define <256 x i8> @vminu_vx_v258i8(<256 x i8> %va, i8 %b, <256 x i1> %m, i32 zeroext %evl) {253; CHECK-LABEL: vminu_vx_v258i8:254; CHECK: # %bb.0:255; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma256; CHECK-NEXT: vmv1r.v v24, v0257; CHECK-NEXT: li a3, 128258; CHECK-NEXT: vsetvli zero, a3, e8, m8, ta, ma259; CHECK-NEXT: vlm.v v0, (a1)260; CHECK-NEXT: addi a1, a2, -128261; CHECK-NEXT: sltu a4, a2, a1262; CHECK-NEXT: addi a4, a4, -1263; CHECK-NEXT: and a1, a4, a1264; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma265; CHECK-NEXT: vminu.vx v16, v16, a0, v0.t266; CHECK-NEXT: bltu a2, a3, .LBB22_2267; CHECK-NEXT: # %bb.1:268; CHECK-NEXT: li a2, 128269; CHECK-NEXT: .LBB22_2:270; CHECK-NEXT: vmv1r.v v0, v24271; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma272; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t273; CHECK-NEXT: ret274 %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0275 %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer276 %v = call <256 x i8> @llvm.vp.umin.v258i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> %m, i32 %evl)277 ret <256 x i8> %v278}279 280define <256 x i8> @vminu_vx_v258i8_unmasked(<256 x i8> %va, i8 %b, i32 zeroext %evl) {281; CHECK-LABEL: vminu_vx_v258i8_unmasked:282; CHECK: # %bb.0:283; CHECK-NEXT: li a3, 128284; CHECK-NEXT: mv a2, a1285; CHECK-NEXT: bltu a1, a3, .LBB23_2286; CHECK-NEXT: # %bb.1:287; CHECK-NEXT: li a2, 128288; CHECK-NEXT: .LBB23_2:289; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma290; CHECK-NEXT: vminu.vx v8, v8, a0291; CHECK-NEXT: addi a2, a1, -128292; CHECK-NEXT: sltu a1, a1, a2293; CHECK-NEXT: addi a1, a1, -1294; CHECK-NEXT: and a1, a1, a2295; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma296; CHECK-NEXT: vminu.vx v16, v16, a0297; CHECK-NEXT: ret298 %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0299 %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer300 %v = call <256 x i8> @llvm.vp.umin.v258i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> splat (i1 true), i32 %evl)301 ret <256 x i8> %v302}303 304; Test splitting when the %evl is a known constant.305 306define <256 x i8> @vminu_vx_v258i8_evl129(<256 x i8> %va, i8 %b, <256 x i1> %m) {307; CHECK-LABEL: vminu_vx_v258i8_evl129:308; CHECK: # %bb.0:309; CHECK-NEXT: vsetivli zero, 1, e8, m8, ta, ma310; CHECK-NEXT: vlm.v v24, (a1)311; CHECK-NEXT: li a1, 128312; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma313; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t314; CHECK-NEXT: vmv1r.v v0, v24315; CHECK-NEXT: vsetivli zero, 1, e8, m8, ta, ma316; CHECK-NEXT: vminu.vx v16, v16, a0, v0.t317; CHECK-NEXT: ret318 %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0319 %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer320 %v = call <256 x i8> @llvm.vp.umin.v258i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> %m, i32 129)321 ret <256 x i8> %v322}323 324; The upper half is doing nothing.325 326define <256 x i8> @vminu_vx_v258i8_evl128(<256 x i8> %va, i8 %b, <256 x i1> %m) {327; CHECK-LABEL: vminu_vx_v258i8_evl128:328; CHECK: # %bb.0:329; CHECK-NEXT: li a1, 128330; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma331; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t332; CHECK-NEXT: ret333 %elt.head = insertelement <256 x i8> poison, i8 %b, i32 0334 %vb = shufflevector <256 x i8> %elt.head, <256 x i8> poison, <256 x i32> zeroinitializer335 %v = call <256 x i8> @llvm.vp.umin.v258i8(<256 x i8> %va, <256 x i8> %vb, <256 x i1> %m, i32 128)336 ret <256 x i8> %v337}338 339define <2 x i16> @vminu_vv_v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 zeroext %evl) {340; CHECK-LABEL: vminu_vv_v2i16:341; CHECK: # %bb.0:342; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma343; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t344; CHECK-NEXT: ret345 %v = call <2 x i16> @llvm.vp.umin.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 %evl)346 ret <2 x i16> %v347}348 349define <2 x i16> @vminu_vv_v2i16_unmasked(<2 x i16> %va, <2 x i16> %b, i32 zeroext %evl) {350; CHECK-LABEL: vminu_vv_v2i16_unmasked:351; CHECK: # %bb.0:352; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma353; CHECK-NEXT: vminu.vv v8, v8, v9354; CHECK-NEXT: ret355 %v = call <2 x i16> @llvm.vp.umin.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> splat (i1 true), i32 %evl)356 ret <2 x i16> %v357}358 359define <2 x i16> @vminu_vx_v2i16(<2 x i16> %va, i16 %b, <2 x i1> %m, i32 zeroext %evl) {360; CHECK-LABEL: vminu_vx_v2i16:361; CHECK: # %bb.0:362; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma363; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t364; CHECK-NEXT: ret365 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0366 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer367 %v = call <2 x i16> @llvm.vp.umin.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> %m, i32 %evl)368 ret <2 x i16> %v369}370 371define <2 x i16> @vminu_vx_v2i16_unmasked(<2 x i16> %va, i16 %b, i32 zeroext %evl) {372; CHECK-LABEL: vminu_vx_v2i16_unmasked:373; CHECK: # %bb.0:374; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma375; CHECK-NEXT: vminu.vx v8, v8, a0376; CHECK-NEXT: ret377 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0378 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer379 %v = call <2 x i16> @llvm.vp.umin.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> splat (i1 true), i32 %evl)380 ret <2 x i16> %v381}382 383define <4 x i16> @vminu_vv_v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 zeroext %evl) {384; CHECK-LABEL: vminu_vv_v4i16:385; CHECK: # %bb.0:386; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma387; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t388; CHECK-NEXT: ret389 %v = call <4 x i16> @llvm.vp.umin.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 %evl)390 ret <4 x i16> %v391}392 393define <4 x i16> @vminu_vv_v4i16_unmasked(<4 x i16> %va, <4 x i16> %b, i32 zeroext %evl) {394; CHECK-LABEL: vminu_vv_v4i16_unmasked:395; CHECK: # %bb.0:396; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma397; CHECK-NEXT: vminu.vv v8, v8, v9398; CHECK-NEXT: ret399 %v = call <4 x i16> @llvm.vp.umin.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> splat (i1 true), i32 %evl)400 ret <4 x i16> %v401}402 403define <4 x i16> @vminu_vx_v4i16(<4 x i16> %va, i16 %b, <4 x i1> %m, i32 zeroext %evl) {404; CHECK-LABEL: vminu_vx_v4i16:405; CHECK: # %bb.0:406; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma407; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t408; CHECK-NEXT: ret409 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0410 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer411 %v = call <4 x i16> @llvm.vp.umin.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> %m, i32 %evl)412 ret <4 x i16> %v413}414 415define <4 x i16> @vminu_vx_v4i16_unmasked(<4 x i16> %va, i16 %b, i32 zeroext %evl) {416; CHECK-LABEL: vminu_vx_v4i16_unmasked:417; CHECK: # %bb.0:418; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma419; CHECK-NEXT: vminu.vx v8, v8, a0420; CHECK-NEXT: ret421 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0422 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer423 %v = call <4 x i16> @llvm.vp.umin.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> splat (i1 true), i32 %evl)424 ret <4 x i16> %v425}426 427define <8 x i16> @vminu_vv_v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 zeroext %evl) {428; CHECK-LABEL: vminu_vv_v8i16:429; CHECK: # %bb.0:430; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma431; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t432; CHECK-NEXT: ret433 %v = call <8 x i16> @llvm.vp.umin.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 %evl)434 ret <8 x i16> %v435}436 437define <8 x i16> @vminu_vv_v8i16_unmasked(<8 x i16> %va, <8 x i16> %b, i32 zeroext %evl) {438; CHECK-LABEL: vminu_vv_v8i16_unmasked:439; CHECK: # %bb.0:440; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma441; CHECK-NEXT: vminu.vv v8, v8, v9442; CHECK-NEXT: ret443 %v = call <8 x i16> @llvm.vp.umin.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> splat (i1 true), i32 %evl)444 ret <8 x i16> %v445}446 447define <8 x i16> @vminu_vx_v8i16(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {448; CHECK-LABEL: vminu_vx_v8i16:449; CHECK: # %bb.0:450; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma451; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t452; CHECK-NEXT: ret453 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0454 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer455 %v = call <8 x i16> @llvm.vp.umin.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> %m, i32 %evl)456 ret <8 x i16> %v457}458 459define <8 x i16> @vminu_vx_v8i16_unmasked(<8 x i16> %va, i16 %b, i32 zeroext %evl) {460; CHECK-LABEL: vminu_vx_v8i16_unmasked:461; CHECK: # %bb.0:462; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma463; CHECK-NEXT: vminu.vx v8, v8, a0464; CHECK-NEXT: ret465 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0466 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer467 %v = call <8 x i16> @llvm.vp.umin.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> splat (i1 true), i32 %evl)468 ret <8 x i16> %v469}470 471define <16 x i16> @vminu_vv_v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 zeroext %evl) {472; CHECK-LABEL: vminu_vv_v16i16:473; CHECK: # %bb.0:474; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma475; CHECK-NEXT: vminu.vv v8, v8, v10, v0.t476; CHECK-NEXT: ret477 %v = call <16 x i16> @llvm.vp.umin.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 %evl)478 ret <16 x i16> %v479}480 481define <16 x i16> @vminu_vv_v16i16_unmasked(<16 x i16> %va, <16 x i16> %b, i32 zeroext %evl) {482; CHECK-LABEL: vminu_vv_v16i16_unmasked:483; CHECK: # %bb.0:484; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma485; CHECK-NEXT: vminu.vv v8, v8, v10486; CHECK-NEXT: ret487 %v = call <16 x i16> @llvm.vp.umin.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> splat (i1 true), i32 %evl)488 ret <16 x i16> %v489}490 491define <16 x i16> @vminu_vx_v16i16(<16 x i16> %va, i16 %b, <16 x i1> %m, i32 zeroext %evl) {492; CHECK-LABEL: vminu_vx_v16i16:493; CHECK: # %bb.0:494; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma495; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t496; CHECK-NEXT: ret497 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0498 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer499 %v = call <16 x i16> @llvm.vp.umin.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> %m, i32 %evl)500 ret <16 x i16> %v501}502 503define <16 x i16> @vminu_vx_v16i16_unmasked(<16 x i16> %va, i16 %b, i32 zeroext %evl) {504; CHECK-LABEL: vminu_vx_v16i16_unmasked:505; CHECK: # %bb.0:506; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma507; CHECK-NEXT: vminu.vx v8, v8, a0508; CHECK-NEXT: ret509 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0510 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer511 %v = call <16 x i16> @llvm.vp.umin.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> splat (i1 true), i32 %evl)512 ret <16 x i16> %v513}514 515define <2 x i32> @vminu_vv_v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 zeroext %evl) {516; CHECK-LABEL: vminu_vv_v2i32:517; CHECK: # %bb.0:518; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma519; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t520; CHECK-NEXT: ret521 %v = call <2 x i32> @llvm.vp.umin.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 %evl)522 ret <2 x i32> %v523}524 525define <2 x i32> @vminu_vv_v2i32_unmasked(<2 x i32> %va, <2 x i32> %b, i32 zeroext %evl) {526; CHECK-LABEL: vminu_vv_v2i32_unmasked:527; CHECK: # %bb.0:528; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma529; CHECK-NEXT: vminu.vv v8, v8, v9530; CHECK-NEXT: ret531 %v = call <2 x i32> @llvm.vp.umin.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> splat (i1 true), i32 %evl)532 ret <2 x i32> %v533}534 535define <2 x i32> @vminu_vx_v2i32(<2 x i32> %va, i32 %b, <2 x i1> %m, i32 zeroext %evl) {536; CHECK-LABEL: vminu_vx_v2i32:537; CHECK: # %bb.0:538; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma539; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t540; CHECK-NEXT: ret541 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0542 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer543 %v = call <2 x i32> @llvm.vp.umin.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> %m, i32 %evl)544 ret <2 x i32> %v545}546 547define <2 x i32> @vminu_vx_v2i32_unmasked(<2 x i32> %va, i32 %b, i32 zeroext %evl) {548; CHECK-LABEL: vminu_vx_v2i32_unmasked:549; CHECK: # %bb.0:550; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma551; CHECK-NEXT: vminu.vx v8, v8, a0552; CHECK-NEXT: ret553 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0554 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer555 %v = call <2 x i32> @llvm.vp.umin.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> splat (i1 true), i32 %evl)556 ret <2 x i32> %v557}558 559define <4 x i32> @vminu_vv_v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 zeroext %evl) {560; CHECK-LABEL: vminu_vv_v4i32:561; CHECK: # %bb.0:562; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma563; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t564; CHECK-NEXT: ret565 %v = call <4 x i32> @llvm.vp.umin.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 %evl)566 ret <4 x i32> %v567}568 569define <4 x i32> @vminu_vv_v4i32_unmasked(<4 x i32> %va, <4 x i32> %b, i32 zeroext %evl) {570; CHECK-LABEL: vminu_vv_v4i32_unmasked:571; CHECK: # %bb.0:572; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma573; CHECK-NEXT: vminu.vv v8, v8, v9574; CHECK-NEXT: ret575 %v = call <4 x i32> @llvm.vp.umin.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> splat (i1 true), i32 %evl)576 ret <4 x i32> %v577}578 579define <4 x i32> @vminu_vx_v4i32(<4 x i32> %va, i32 %b, <4 x i1> %m, i32 zeroext %evl) {580; CHECK-LABEL: vminu_vx_v4i32:581; CHECK: # %bb.0:582; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma583; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t584; CHECK-NEXT: ret585 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0586 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer587 %v = call <4 x i32> @llvm.vp.umin.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> %m, i32 %evl)588 ret <4 x i32> %v589}590 591define <4 x i32> @vminu_vx_v4i32_unmasked(<4 x i32> %va, i32 %b, i32 zeroext %evl) {592; CHECK-LABEL: vminu_vx_v4i32_unmasked:593; CHECK: # %bb.0:594; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma595; CHECK-NEXT: vminu.vx v8, v8, a0596; CHECK-NEXT: ret597 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0598 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer599 %v = call <4 x i32> @llvm.vp.umin.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> splat (i1 true), i32 %evl)600 ret <4 x i32> %v601}602 603define <8 x i32> @vminu_vv_v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 zeroext %evl) {604; CHECK-LABEL: vminu_vv_v8i32:605; CHECK: # %bb.0:606; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma607; CHECK-NEXT: vminu.vv v8, v8, v10, v0.t608; CHECK-NEXT: ret609 %v = call <8 x i32> @llvm.vp.umin.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 %evl)610 ret <8 x i32> %v611}612 613define <8 x i32> @vminu_vv_v8i32_unmasked(<8 x i32> %va, <8 x i32> %b, i32 zeroext %evl) {614; CHECK-LABEL: vminu_vv_v8i32_unmasked:615; CHECK: # %bb.0:616; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma617; CHECK-NEXT: vminu.vv v8, v8, v10618; CHECK-NEXT: ret619 %v = call <8 x i32> @llvm.vp.umin.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> splat (i1 true), i32 %evl)620 ret <8 x i32> %v621}622 623define <8 x i32> @vminu_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {624; CHECK-LABEL: vminu_vx_v8i32:625; CHECK: # %bb.0:626; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma627; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t628; CHECK-NEXT: ret629 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0630 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer631 %v = call <8 x i32> @llvm.vp.umin.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 %evl)632 ret <8 x i32> %v633}634 635define <8 x i32> @vminu_vx_v8i32_unmasked(<8 x i32> %va, i32 %b, i32 zeroext %evl) {636; CHECK-LABEL: vminu_vx_v8i32_unmasked:637; CHECK: # %bb.0:638; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma639; CHECK-NEXT: vminu.vx v8, v8, a0640; CHECK-NEXT: ret641 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0642 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer643 %v = call <8 x i32> @llvm.vp.umin.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> splat (i1 true), i32 %evl)644 ret <8 x i32> %v645}646 647define <16 x i32> @vminu_vv_v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 zeroext %evl) {648; CHECK-LABEL: vminu_vv_v16i32:649; CHECK: # %bb.0:650; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma651; CHECK-NEXT: vminu.vv v8, v8, v12, v0.t652; CHECK-NEXT: ret653 %v = call <16 x i32> @llvm.vp.umin.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 %evl)654 ret <16 x i32> %v655}656 657define <16 x i32> @vminu_vv_v16i32_unmasked(<16 x i32> %va, <16 x i32> %b, i32 zeroext %evl) {658; CHECK-LABEL: vminu_vv_v16i32_unmasked:659; CHECK: # %bb.0:660; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma661; CHECK-NEXT: vminu.vv v8, v8, v12662; CHECK-NEXT: ret663 %v = call <16 x i32> @llvm.vp.umin.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> splat (i1 true), i32 %evl)664 ret <16 x i32> %v665}666 667define <16 x i32> @vminu_vx_v16i32(<16 x i32> %va, i32 %b, <16 x i1> %m, i32 zeroext %evl) {668; CHECK-LABEL: vminu_vx_v16i32:669; CHECK: # %bb.0:670; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma671; CHECK-NEXT: vminu.vx v8, v8, a0, v0.t672; CHECK-NEXT: ret673 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0674 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer675 %v = call <16 x i32> @llvm.vp.umin.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> %m, i32 %evl)676 ret <16 x i32> %v677}678 679define <16 x i32> @vminu_vx_v16i32_unmasked(<16 x i32> %va, i32 %b, i32 zeroext %evl) {680; CHECK-LABEL: vminu_vx_v16i32_unmasked:681; CHECK: # %bb.0:682; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma683; CHECK-NEXT: vminu.vx v8, v8, a0684; CHECK-NEXT: ret685 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0686 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer687 %v = call <16 x i32> @llvm.vp.umin.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> splat (i1 true), i32 %evl)688 ret <16 x i32> %v689}690 691define <2 x i64> @vminu_vv_v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 zeroext %evl) {692; CHECK-LABEL: vminu_vv_v2i64:693; CHECK: # %bb.0:694; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma695; CHECK-NEXT: vminu.vv v8, v8, v9, v0.t696; CHECK-NEXT: ret697 %v = call <2 x i64> @llvm.vp.umin.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 %evl)698 ret <2 x i64> %v699}700 701define <2 x i64> @vminu_vv_v2i64_unmasked(<2 x i64> %va, <2 x i64> %b, i32 zeroext %evl) {702; CHECK-LABEL: vminu_vv_v2i64_unmasked:703; CHECK: # %bb.0:704; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma705; CHECK-NEXT: vminu.vv v8, v8, v9706; CHECK-NEXT: ret707 %v = call <2 x i64> @llvm.vp.umin.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> splat (i1 true), i32 %evl)708 ret <2 x i64> %v709}710 711define <2 x i64> @vminu_vx_v2i64(<2 x i64> %va, i64 %b, <2 x i1> %m, i32 zeroext %evl) {712; RV32-LABEL: vminu_vx_v2i64:713; RV32: # %bb.0:714; RV32-NEXT: addi sp, sp, -16715; RV32-NEXT: .cfi_def_cfa_offset 16716; RV32-NEXT: sw a0, 8(sp)717; RV32-NEXT: sw a1, 12(sp)718; RV32-NEXT: addi a0, sp, 8719; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma720; RV32-NEXT: vlse64.v v9, (a0), zero721; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma722; RV32-NEXT: vminu.vv v8, v8, v9, v0.t723; RV32-NEXT: addi sp, sp, 16724; RV32-NEXT: .cfi_def_cfa_offset 0725; RV32-NEXT: ret726;727; RV64-LABEL: vminu_vx_v2i64:728; RV64: # %bb.0:729; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma730; RV64-NEXT: vminu.vx v8, v8, a0, v0.t731; RV64-NEXT: ret732 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0733 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer734 %v = call <2 x i64> @llvm.vp.umin.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> %m, i32 %evl)735 ret <2 x i64> %v736}737 738define <2 x i64> @vminu_vx_v2i64_unmasked(<2 x i64> %va, i64 %b, i32 zeroext %evl) {739; RV32-LABEL: vminu_vx_v2i64_unmasked:740; RV32: # %bb.0:741; RV32-NEXT: addi sp, sp, -16742; RV32-NEXT: .cfi_def_cfa_offset 16743; RV32-NEXT: sw a0, 8(sp)744; RV32-NEXT: sw a1, 12(sp)745; RV32-NEXT: addi a0, sp, 8746; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma747; RV32-NEXT: vlse64.v v9, (a0), zero748; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma749; RV32-NEXT: vminu.vv v8, v8, v9750; RV32-NEXT: addi sp, sp, 16751; RV32-NEXT: .cfi_def_cfa_offset 0752; RV32-NEXT: ret753;754; RV64-LABEL: vminu_vx_v2i64_unmasked:755; RV64: # %bb.0:756; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma757; RV64-NEXT: vminu.vx v8, v8, a0758; RV64-NEXT: ret759 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0760 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer761 %v = call <2 x i64> @llvm.vp.umin.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> splat (i1 true), i32 %evl)762 ret <2 x i64> %v763}764 765define <4 x i64> @vminu_vv_v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 zeroext %evl) {766; CHECK-LABEL: vminu_vv_v4i64:767; CHECK: # %bb.0:768; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma769; CHECK-NEXT: vminu.vv v8, v8, v10, v0.t770; CHECK-NEXT: ret771 %v = call <4 x i64> @llvm.vp.umin.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 %evl)772 ret <4 x i64> %v773}774 775define <4 x i64> @vminu_vv_v4i64_unmasked(<4 x i64> %va, <4 x i64> %b, i32 zeroext %evl) {776; CHECK-LABEL: vminu_vv_v4i64_unmasked:777; CHECK: # %bb.0:778; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma779; CHECK-NEXT: vminu.vv v8, v8, v10780; CHECK-NEXT: ret781 %v = call <4 x i64> @llvm.vp.umin.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> splat (i1 true), i32 %evl)782 ret <4 x i64> %v783}784 785define <4 x i64> @vminu_vx_v4i64(<4 x i64> %va, i64 %b, <4 x i1> %m, i32 zeroext %evl) {786; RV32-LABEL: vminu_vx_v4i64:787; RV32: # %bb.0:788; RV32-NEXT: addi sp, sp, -16789; RV32-NEXT: .cfi_def_cfa_offset 16790; RV32-NEXT: sw a0, 8(sp)791; RV32-NEXT: sw a1, 12(sp)792; RV32-NEXT: addi a0, sp, 8793; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma794; RV32-NEXT: vlse64.v v10, (a0), zero795; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma796; RV32-NEXT: vminu.vv v8, v8, v10, v0.t797; RV32-NEXT: addi sp, sp, 16798; RV32-NEXT: .cfi_def_cfa_offset 0799; RV32-NEXT: ret800;801; RV64-LABEL: vminu_vx_v4i64:802; RV64: # %bb.0:803; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma804; RV64-NEXT: vminu.vx v8, v8, a0, v0.t805; RV64-NEXT: ret806 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0807 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer808 %v = call <4 x i64> @llvm.vp.umin.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> %m, i32 %evl)809 ret <4 x i64> %v810}811 812define <4 x i64> @vminu_vx_v4i64_unmasked(<4 x i64> %va, i64 %b, i32 zeroext %evl) {813; RV32-LABEL: vminu_vx_v4i64_unmasked:814; RV32: # %bb.0:815; RV32-NEXT: addi sp, sp, -16816; RV32-NEXT: .cfi_def_cfa_offset 16817; RV32-NEXT: sw a0, 8(sp)818; RV32-NEXT: sw a1, 12(sp)819; RV32-NEXT: addi a0, sp, 8820; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma821; RV32-NEXT: vlse64.v v10, (a0), zero822; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma823; RV32-NEXT: vminu.vv v8, v8, v10824; RV32-NEXT: addi sp, sp, 16825; RV32-NEXT: .cfi_def_cfa_offset 0826; RV32-NEXT: ret827;828; RV64-LABEL: vminu_vx_v4i64_unmasked:829; RV64: # %bb.0:830; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma831; RV64-NEXT: vminu.vx v8, v8, a0832; RV64-NEXT: ret833 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0834 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer835 %v = call <4 x i64> @llvm.vp.umin.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> splat (i1 true), i32 %evl)836 ret <4 x i64> %v837}838 839define <8 x i64> @vminu_vv_v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 zeroext %evl) {840; CHECK-LABEL: vminu_vv_v8i64:841; CHECK: # %bb.0:842; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma843; CHECK-NEXT: vminu.vv v8, v8, v12, v0.t844; CHECK-NEXT: ret845 %v = call <8 x i64> @llvm.vp.umin.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 %evl)846 ret <8 x i64> %v847}848 849define <8 x i64> @vminu_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %b, i32 zeroext %evl) {850; CHECK-LABEL: vminu_vv_v8i64_unmasked:851; CHECK: # %bb.0:852; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma853; CHECK-NEXT: vminu.vv v8, v8, v12854; CHECK-NEXT: ret855 %v = call <8 x i64> @llvm.vp.umin.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> splat (i1 true), i32 %evl)856 ret <8 x i64> %v857}858 859define <8 x i64> @vminu_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {860; RV32-LABEL: vminu_vx_v8i64:861; RV32: # %bb.0:862; RV32-NEXT: addi sp, sp, -16863; RV32-NEXT: .cfi_def_cfa_offset 16864; RV32-NEXT: sw a0, 8(sp)865; RV32-NEXT: sw a1, 12(sp)866; RV32-NEXT: addi a0, sp, 8867; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma868; RV32-NEXT: vlse64.v v12, (a0), zero869; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma870; RV32-NEXT: vminu.vv v8, v8, v12, v0.t871; RV32-NEXT: addi sp, sp, 16872; RV32-NEXT: .cfi_def_cfa_offset 0873; RV32-NEXT: ret874;875; RV64-LABEL: vminu_vx_v8i64:876; RV64: # %bb.0:877; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma878; RV64-NEXT: vminu.vx v8, v8, a0, v0.t879; RV64-NEXT: ret880 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0881 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer882 %v = call <8 x i64> @llvm.vp.umin.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)883 ret <8 x i64> %v884}885 886define <8 x i64> @vminu_vx_v8i64_unmasked(<8 x i64> %va, i64 %b, i32 zeroext %evl) {887; RV32-LABEL: vminu_vx_v8i64_unmasked:888; RV32: # %bb.0:889; RV32-NEXT: addi sp, sp, -16890; RV32-NEXT: .cfi_def_cfa_offset 16891; RV32-NEXT: sw a0, 8(sp)892; RV32-NEXT: sw a1, 12(sp)893; RV32-NEXT: addi a0, sp, 8894; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma895; RV32-NEXT: vlse64.v v12, (a0), zero896; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma897; RV32-NEXT: vminu.vv v8, v8, v12898; RV32-NEXT: addi sp, sp, 16899; RV32-NEXT: .cfi_def_cfa_offset 0900; RV32-NEXT: ret901;902; RV64-LABEL: vminu_vx_v8i64_unmasked:903; RV64: # %bb.0:904; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma905; RV64-NEXT: vminu.vx v8, v8, a0906; RV64-NEXT: ret907 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0908 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer909 %v = call <8 x i64> @llvm.vp.umin.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> splat (i1 true), i32 %evl)910 ret <8 x i64> %v911}912 913define <16 x i64> @vminu_vv_v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 zeroext %evl) {914; CHECK-LABEL: vminu_vv_v16i64:915; CHECK: # %bb.0:916; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma917; CHECK-NEXT: vminu.vv v8, v8, v16, v0.t918; CHECK-NEXT: ret919 %v = call <16 x i64> @llvm.vp.umin.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 %evl)920 ret <16 x i64> %v921}922 923define <16 x i64> @vminu_vv_v16i64_unmasked(<16 x i64> %va, <16 x i64> %b, i32 zeroext %evl) {924; CHECK-LABEL: vminu_vv_v16i64_unmasked:925; CHECK: # %bb.0:926; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma927; CHECK-NEXT: vminu.vv v8, v8, v16928; CHECK-NEXT: ret929 %v = call <16 x i64> @llvm.vp.umin.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> splat (i1 true), i32 %evl)930 ret <16 x i64> %v931}932 933define <16 x i64> @vminu_vx_v16i64(<16 x i64> %va, i64 %b, <16 x i1> %m, i32 zeroext %evl) {934; RV32-LABEL: vminu_vx_v16i64:935; RV32: # %bb.0:936; RV32-NEXT: addi sp, sp, -16937; RV32-NEXT: .cfi_def_cfa_offset 16938; RV32-NEXT: sw a0, 8(sp)939; RV32-NEXT: sw a1, 12(sp)940; RV32-NEXT: addi a0, sp, 8941; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma942; RV32-NEXT: vlse64.v v16, (a0), zero943; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma944; RV32-NEXT: vminu.vv v8, v8, v16, v0.t945; RV32-NEXT: addi sp, sp, 16946; RV32-NEXT: .cfi_def_cfa_offset 0947; RV32-NEXT: ret948;949; RV64-LABEL: vminu_vx_v16i64:950; RV64: # %bb.0:951; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma952; RV64-NEXT: vminu.vx v8, v8, a0, v0.t953; RV64-NEXT: ret954 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0955 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer956 %v = call <16 x i64> @llvm.vp.umin.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> %m, i32 %evl)957 ret <16 x i64> %v958}959 960define <16 x i64> @vminu_vx_v16i64_unmasked(<16 x i64> %va, i64 %b, i32 zeroext %evl) {961; RV32-LABEL: vminu_vx_v16i64_unmasked:962; RV32: # %bb.0:963; RV32-NEXT: addi sp, sp, -16964; RV32-NEXT: .cfi_def_cfa_offset 16965; RV32-NEXT: sw a0, 8(sp)966; RV32-NEXT: sw a1, 12(sp)967; RV32-NEXT: addi a0, sp, 8968; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma969; RV32-NEXT: vlse64.v v16, (a0), zero970; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma971; RV32-NEXT: vminu.vv v8, v8, v16972; RV32-NEXT: addi sp, sp, 16973; RV32-NEXT: .cfi_def_cfa_offset 0974; RV32-NEXT: ret975;976; RV64-LABEL: vminu_vx_v16i64_unmasked:977; RV64: # %bb.0:978; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma979; RV64-NEXT: vminu.vx v8, v8, a0980; RV64-NEXT: ret981 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0982 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer983 %v = call <16 x i64> @llvm.vp.umin.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> splat (i1 true), i32 %evl)984 ret <16 x i64> %v985}986 987; Test that split-legalization works as expected.988 989define <32 x i64> @vminu_vx_v32i64(<32 x i64> %va, <32 x i1> %m, i32 zeroext %evl) {990; CHECK-LABEL: vminu_vx_v32i64:991; CHECK: # %bb.0:992; CHECK-NEXT: li a2, 16993; CHECK-NEXT: vsetivli zero, 2, e8, mf4, ta, ma994; CHECK-NEXT: vslidedown.vi v24, v0, 2995; CHECK-NEXT: mv a1, a0996; CHECK-NEXT: bltu a0, a2, .LBB74_2997; CHECK-NEXT: # %bb.1:998; CHECK-NEXT: li a1, 16999; CHECK-NEXT: .LBB74_2:1000; CHECK-NEXT: li a2, -11001; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma1002; CHECK-NEXT: vminu.vx v8, v8, a2, v0.t1003; CHECK-NEXT: addi a1, a0, -161004; CHECK-NEXT: sltu a0, a0, a11005; CHECK-NEXT: addi a0, a0, -11006; CHECK-NEXT: and a0, a0, a11007; CHECK-NEXT: vmv1r.v v0, v241008; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1009; CHECK-NEXT: vminu.vx v16, v16, a2, v0.t1010; CHECK-NEXT: ret1011 %v = call <32 x i64> @llvm.vp.umin.v32i64(<32 x i64> %va, <32 x i64> splat (i64 -1), <32 x i1> %m, i32 %evl)1012 ret <32 x i64> %v1013}1014