66 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK4; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK6 7define <2 x i1> @vmul_vv_v2i1(<2 x i1> %va, <2 x i1> %b, <2 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vmul_vv_v2i1:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma11; CHECK-NEXT: vmand.mm v0, v0, v812; CHECK-NEXT: ret13 %v = call <2 x i1> @llvm.vp.mul.v2i1(<2 x i1> %va, <2 x i1> %b, <2 x i1> %m, i32 %evl)14 ret <2 x i1> %v15}16 17define <4 x i1> @vmul_vv_v4i1(<4 x i1> %va, <4 x i1> %b, <4 x i1> %m, i32 zeroext %evl) {18; CHECK-LABEL: vmul_vv_v4i1:19; CHECK: # %bb.0:20; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma21; CHECK-NEXT: vmand.mm v0, v0, v822; CHECK-NEXT: ret23 %v = call <4 x i1> @llvm.vp.mul.v4i1(<4 x i1> %va, <4 x i1> %b, <4 x i1> %m, i32 %evl)24 ret <4 x i1> %v25}26 27define <8 x i1> @vmul_vv_v8i1(<8 x i1> %va, <8 x i1> %b, <8 x i1> %m, i32 zeroext %evl) {28; CHECK-LABEL: vmul_vv_v8i1:29; CHECK: # %bb.0:30; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma31; CHECK-NEXT: vmand.mm v0, v0, v832; CHECK-NEXT: ret33 %v = call <8 x i1> @llvm.vp.mul.v8i1(<8 x i1> %va, <8 x i1> %b, <8 x i1> %m, i32 %evl)34 ret <8 x i1> %v35}36 37define <16 x i1> @vmul_vv_v16i1(<16 x i1> %va, <16 x i1> %b, <16 x i1> %m, i32 zeroext %evl) {38; CHECK-LABEL: vmul_vv_v16i1:39; CHECK: # %bb.0:40; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma41; CHECK-NEXT: vmand.mm v0, v0, v842; CHECK-NEXT: ret43 %v = call <16 x i1> @llvm.vp.mul.v16i1(<16 x i1> %va, <16 x i1> %b, <16 x i1> %m, i32 %evl)44 ret <16 x i1> %v45}46 47define <32 x i1> @vmul_vv_v32i1(<32 x i1> %va, <32 x i1> %b, <32 x i1> %m, i32 zeroext %evl) {48; CHECK-LABEL: vmul_vv_v32i1:49; CHECK: # %bb.0:50; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma51; CHECK-NEXT: vmand.mm v0, v0, v852; CHECK-NEXT: ret53 %v = call <32 x i1> @llvm.vp.mul.v32i1(<32 x i1> %va, <32 x i1> %b, <32 x i1> %m, i32 %evl)54 ret <32 x i1> %v55}56 57define <64 x i1> @vmul_vv_v64i1(<64 x i1> %va, <64 x i1> %b, <64 x i1> %m, i32 zeroext %evl) {58; CHECK-LABEL: vmul_vv_v64i1:59; CHECK: # %bb.0:60; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma61; CHECK-NEXT: vmand.mm v0, v0, v862; CHECK-NEXT: ret63 %v = call <64 x i1> @llvm.vp.mul.v64i1(<64 x i1> %va, <64 x i1> %b, <64 x i1> %m, i32 %evl)64 ret <64 x i1> %v65}66