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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <8 x i7> @vmul_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vmul_vv_v8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma11; CHECK-NEXT: vmul.vv v8, v8, v9, v0.t12; CHECK-NEXT: ret13 %v = call <8 x i7> @llvm.vp.mul.v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 %evl)14 ret <8 x i7> %v15}16 17define <2 x i8> @vmul_vv_v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 zeroext %evl) {18; CHECK-LABEL: vmul_vv_v2i8:19; CHECK: # %bb.0:20; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma21; CHECK-NEXT: vmul.vv v8, v8, v9, v0.t22; CHECK-NEXT: ret23 %v = call <2 x i8> @llvm.vp.mul.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 %evl)24 ret <2 x i8> %v25}26 27define <2 x i8> @vmul_vv_v2i8_unmasked(<2 x i8> %va, <2 x i8> %b, i32 zeroext %evl) {28; CHECK-LABEL: vmul_vv_v2i8_unmasked:29; CHECK: # %bb.0:30; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma31; CHECK-NEXT: vmul.vv v8, v8, v932; CHECK-NEXT: ret33 %v = call <2 x i8> @llvm.vp.mul.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> splat (i1 true), i32 %evl)34 ret <2 x i8> %v35}36 37define <2 x i8> @vmul_vx_v2i8(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {38; CHECK-LABEL: vmul_vx_v2i8:39; CHECK: # %bb.0:40; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma41; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t42; CHECK-NEXT: ret43 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 044 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer45 %v = call <2 x i8> @llvm.vp.mul.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> %m, i32 %evl)46 ret <2 x i8> %v47}48 49define <2 x i8> @vmul_vx_v2i8_unmasked(<2 x i8> %va, i8 %b, i32 zeroext %evl) {50; CHECK-LABEL: vmul_vx_v2i8_unmasked:51; CHECK: # %bb.0:52; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma53; CHECK-NEXT: vmul.vx v8, v8, a054; CHECK-NEXT: ret55 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 056 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer57 %v = call <2 x i8> @llvm.vp.mul.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> splat (i1 true), i32 %evl)58 ret <2 x i8> %v59}60 61define <4 x i8> @vmul_vv_v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 zeroext %evl) {62; CHECK-LABEL: vmul_vv_v4i8:63; CHECK: # %bb.0:64; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma65; CHECK-NEXT: vmul.vv v8, v8, v9, v0.t66; CHECK-NEXT: ret67 %v = call <4 x i8> @llvm.vp.mul.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 %evl)68 ret <4 x i8> %v69}70 71define <4 x i8> @vmul_vv_v4i8_unmasked(<4 x i8> %va, <4 x i8> %b, i32 zeroext %evl) {72; CHECK-LABEL: vmul_vv_v4i8_unmasked:73; CHECK: # %bb.0:74; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma75; CHECK-NEXT: vmul.vv v8, v8, v976; CHECK-NEXT: ret77 %v = call <4 x i8> @llvm.vp.mul.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> splat (i1 true), i32 %evl)78 ret <4 x i8> %v79}80 81define <4 x i8> @vmul_vx_v4i8(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {82; CHECK-LABEL: vmul_vx_v4i8:83; CHECK: # %bb.0:84; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma85; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t86; CHECK-NEXT: ret87 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 088 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer89 %v = call <4 x i8> @llvm.vp.mul.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> %m, i32 %evl)90 ret <4 x i8> %v91}92 93define <4 x i8> @vmul_vx_v4i8_unmasked(<4 x i8> %va, i8 %b, i32 zeroext %evl) {94; CHECK-LABEL: vmul_vx_v4i8_unmasked:95; CHECK: # %bb.0:96; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma97; CHECK-NEXT: vmul.vx v8, v8, a098; CHECK-NEXT: ret99 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0100 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer101 %v = call <4 x i8> @llvm.vp.mul.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> splat (i1 true), i32 %evl)102 ret <4 x i8> %v103}104 105define <8 x i8> @vmul_vv_v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 zeroext %evl) {106; CHECK-LABEL: vmul_vv_v8i8:107; CHECK: # %bb.0:108; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma109; CHECK-NEXT: vmul.vv v8, v8, v9, v0.t110; CHECK-NEXT: ret111 %v = call <8 x i8> @llvm.vp.mul.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 %evl)112 ret <8 x i8> %v113}114 115define <8 x i8> @vmul_vv_v8i8_unmasked(<8 x i8> %va, <8 x i8> %b, i32 zeroext %evl) {116; CHECK-LABEL: vmul_vv_v8i8_unmasked:117; CHECK: # %bb.0:118; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma119; CHECK-NEXT: vmul.vv v8, v8, v9120; CHECK-NEXT: ret121 %v = call <8 x i8> @llvm.vp.mul.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> splat (i1 true), i32 %evl)122 ret <8 x i8> %v123}124 125define <8 x i8> @vmul_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {126; CHECK-LABEL: vmul_vx_v8i8:127; CHECK: # %bb.0:128; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma129; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t130; CHECK-NEXT: ret131 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0132 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer133 %v = call <8 x i8> @llvm.vp.mul.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 %evl)134 ret <8 x i8> %v135}136 137define <8 x i8> @vmul_vx_v8i8_unmasked(<8 x i8> %va, i8 %b, i32 zeroext %evl) {138; CHECK-LABEL: vmul_vx_v8i8_unmasked:139; CHECK: # %bb.0:140; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma141; CHECK-NEXT: vmul.vx v8, v8, a0142; CHECK-NEXT: ret143 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0144 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer145 %v = call <8 x i8> @llvm.vp.mul.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> splat (i1 true), i32 %evl)146 ret <8 x i8> %v147}148 149define <16 x i8> @vmul_vv_v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 zeroext %evl) {150; CHECK-LABEL: vmul_vv_v16i8:151; CHECK: # %bb.0:152; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma153; CHECK-NEXT: vmul.vv v8, v8, v9, v0.t154; CHECK-NEXT: ret155 %v = call <16 x i8> @llvm.vp.mul.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 %evl)156 ret <16 x i8> %v157}158 159define <16 x i8> @vmul_vv_v16i8_unmasked(<16 x i8> %va, <16 x i8> %b, i32 zeroext %evl) {160; CHECK-LABEL: vmul_vv_v16i8_unmasked:161; CHECK: # %bb.0:162; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma163; CHECK-NEXT: vmul.vv v8, v8, v9164; CHECK-NEXT: ret165 %v = call <16 x i8> @llvm.vp.mul.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> splat (i1 true), i32 %evl)166 ret <16 x i8> %v167}168 169define <16 x i8> @vmul_vx_v16i8(<16 x i8> %va, i8 %b, <16 x i1> %m, i32 zeroext %evl) {170; CHECK-LABEL: vmul_vx_v16i8:171; CHECK: # %bb.0:172; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma173; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t174; CHECK-NEXT: ret175 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0176 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer177 %v = call <16 x i8> @llvm.vp.mul.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> %m, i32 %evl)178 ret <16 x i8> %v179}180 181define <16 x i8> @vmul_vx_v16i8_unmasked(<16 x i8> %va, i8 %b, i32 zeroext %evl) {182; CHECK-LABEL: vmul_vx_v16i8_unmasked:183; CHECK: # %bb.0:184; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma185; CHECK-NEXT: vmul.vx v8, v8, a0186; CHECK-NEXT: ret187 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0188 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer189 %v = call <16 x i8> @llvm.vp.mul.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> splat (i1 true), i32 %evl)190 ret <16 x i8> %v191}192 193define <2 x i16> @vmul_vv_v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 zeroext %evl) {194; CHECK-LABEL: vmul_vv_v2i16:195; CHECK: # %bb.0:196; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma197; CHECK-NEXT: vmul.vv v8, v8, v9, v0.t198; CHECK-NEXT: ret199 %v = call <2 x i16> @llvm.vp.mul.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 %evl)200 ret <2 x i16> %v201}202 203define <2 x i16> @vmul_vv_v2i16_unmasked(<2 x i16> %va, <2 x i16> %b, i32 zeroext %evl) {204; CHECK-LABEL: vmul_vv_v2i16_unmasked:205; CHECK: # %bb.0:206; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma207; CHECK-NEXT: vmul.vv v8, v8, v9208; CHECK-NEXT: ret209 %v = call <2 x i16> @llvm.vp.mul.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> splat (i1 true), i32 %evl)210 ret <2 x i16> %v211}212 213define <2 x i16> @vmul_vx_v2i16(<2 x i16> %va, i16 %b, <2 x i1> %m, i32 zeroext %evl) {214; CHECK-LABEL: vmul_vx_v2i16:215; CHECK: # %bb.0:216; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma217; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t218; CHECK-NEXT: ret219 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0220 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer221 %v = call <2 x i16> @llvm.vp.mul.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> %m, i32 %evl)222 ret <2 x i16> %v223}224 225define <2 x i16> @vmul_vx_v2i16_unmasked(<2 x i16> %va, i16 %b, i32 zeroext %evl) {226; CHECK-LABEL: vmul_vx_v2i16_unmasked:227; CHECK: # %bb.0:228; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma229; CHECK-NEXT: vmul.vx v8, v8, a0230; CHECK-NEXT: ret231 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0232 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer233 %v = call <2 x i16> @llvm.vp.mul.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> splat (i1 true), i32 %evl)234 ret <2 x i16> %v235}236 237define <4 x i16> @vmul_vv_v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 zeroext %evl) {238; CHECK-LABEL: vmul_vv_v4i16:239; CHECK: # %bb.0:240; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma241; CHECK-NEXT: vmul.vv v8, v8, v9, v0.t242; CHECK-NEXT: ret243 %v = call <4 x i16> @llvm.vp.mul.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 %evl)244 ret <4 x i16> %v245}246 247define <4 x i16> @vmul_vv_v4i16_unmasked(<4 x i16> %va, <4 x i16> %b, i32 zeroext %evl) {248; CHECK-LABEL: vmul_vv_v4i16_unmasked:249; CHECK: # %bb.0:250; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma251; CHECK-NEXT: vmul.vv v8, v8, v9252; CHECK-NEXT: ret253 %v = call <4 x i16> @llvm.vp.mul.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> splat (i1 true), i32 %evl)254 ret <4 x i16> %v255}256 257define <4 x i16> @vmul_vx_v4i16(<4 x i16> %va, i16 %b, <4 x i1> %m, i32 zeroext %evl) {258; CHECK-LABEL: vmul_vx_v4i16:259; CHECK: # %bb.0:260; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma261; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t262; CHECK-NEXT: ret263 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0264 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer265 %v = call <4 x i16> @llvm.vp.mul.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> %m, i32 %evl)266 ret <4 x i16> %v267}268 269define <4 x i16> @vmul_vx_v4i16_unmasked(<4 x i16> %va, i16 %b, i32 zeroext %evl) {270; CHECK-LABEL: vmul_vx_v4i16_unmasked:271; CHECK: # %bb.0:272; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma273; CHECK-NEXT: vmul.vx v8, v8, a0274; CHECK-NEXT: ret275 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0276 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer277 %v = call <4 x i16> @llvm.vp.mul.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> splat (i1 true), i32 %evl)278 ret <4 x i16> %v279}280 281define <8 x i16> @vmul_vv_v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 zeroext %evl) {282; CHECK-LABEL: vmul_vv_v8i16:283; CHECK: # %bb.0:284; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma285; CHECK-NEXT: vmul.vv v8, v8, v9, v0.t286; CHECK-NEXT: ret287 %v = call <8 x i16> @llvm.vp.mul.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 %evl)288 ret <8 x i16> %v289}290 291define <8 x i16> @vmul_vv_v8i16_unmasked(<8 x i16> %va, <8 x i16> %b, i32 zeroext %evl) {292; CHECK-LABEL: vmul_vv_v8i16_unmasked:293; CHECK: # %bb.0:294; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma295; CHECK-NEXT: vmul.vv v8, v8, v9296; CHECK-NEXT: ret297 %v = call <8 x i16> @llvm.vp.mul.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> splat (i1 true), i32 %evl)298 ret <8 x i16> %v299}300 301define <8 x i16> @vmul_vx_v8i16(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {302; CHECK-LABEL: vmul_vx_v8i16:303; CHECK: # %bb.0:304; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma305; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t306; CHECK-NEXT: ret307 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0308 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer309 %v = call <8 x i16> @llvm.vp.mul.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> %m, i32 %evl)310 ret <8 x i16> %v311}312 313define <8 x i16> @vmul_vx_v8i16_commute(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {314; CHECK-LABEL: vmul_vx_v8i16_commute:315; CHECK: # %bb.0:316; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma317; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t318; CHECK-NEXT: ret319 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0320 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer321 %v = call <8 x i16> @llvm.vp.mul.v8i16(<8 x i16> %vb, <8 x i16> %va, <8 x i1> %m, i32 %evl)322 ret <8 x i16> %v323}324 325define <8 x i16> @vmul_vx_v8i16_unmasked(<8 x i16> %va, i16 %b, i32 zeroext %evl) {326; CHECK-LABEL: vmul_vx_v8i16_unmasked:327; CHECK: # %bb.0:328; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma329; CHECK-NEXT: vmul.vx v8, v8, a0330; CHECK-NEXT: ret331 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0332 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer333 %v = call <8 x i16> @llvm.vp.mul.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> splat (i1 true), i32 %evl)334 ret <8 x i16> %v335}336 337define <12 x i16> @vmul_vv_v12i16(<12 x i16> %va, <12 x i16> %b, <12 x i1> %m, i32 zeroext %evl) {338; CHECK-LABEL: vmul_vv_v12i16:339; CHECK: # %bb.0:340; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma341; CHECK-NEXT: vmul.vv v8, v8, v10, v0.t342; CHECK-NEXT: ret343 %v = call <12 x i16> @llvm.vp.mul.v12i16(<12 x i16> %va, <12 x i16> %b, <12 x i1> %m, i32 %evl)344 ret <12 x i16> %v345}346 347define <12 x i16> @vmul_vv_v12i16_unmasked(<12 x i16> %va, <12 x i16> %b, i32 zeroext %evl) {348; CHECK-LABEL: vmul_vv_v12i16_unmasked:349; CHECK: # %bb.0:350; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma351; CHECK-NEXT: vmul.vv v8, v8, v10352; CHECK-NEXT: ret353 %v = call <12 x i16> @llvm.vp.mul.v12i16(<12 x i16> %va, <12 x i16> %b, <12 x i1> splat (i1 true), i32 %evl)354 ret <12 x i16> %v355}356 357define <12 x i16> @vmul_vx_v12i16(<12 x i16> %va, i16 %b, <12 x i1> %m, i32 zeroext %evl) {358; CHECK-LABEL: vmul_vx_v12i16:359; CHECK: # %bb.0:360; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma361; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t362; CHECK-NEXT: ret363 %elt.head = insertelement <12 x i16> poison, i16 %b, i32 0364 %vb = shufflevector <12 x i16> %elt.head, <12 x i16> poison, <12 x i32> zeroinitializer365 %v = call <12 x i16> @llvm.vp.mul.v12i16(<12 x i16> %va, <12 x i16> %vb, <12 x i1> %m, i32 %evl)366 ret <12 x i16> %v367}368 369define <12 x i16> @vmul_vx_v12i16_unmasked(<12 x i16> %va, i16 %b, i32 zeroext %evl) {370; CHECK-LABEL: vmul_vx_v12i16_unmasked:371; CHECK: # %bb.0:372; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma373; CHECK-NEXT: vmul.vx v8, v8, a0374; CHECK-NEXT: ret375 %elt.head = insertelement <12 x i16> poison, i16 %b, i32 0376 %vb = shufflevector <12 x i16> %elt.head, <12 x i16> poison, <12 x i32> zeroinitializer377 %v = call <12 x i16> @llvm.vp.mul.v12i16(<12 x i16> %va, <12 x i16> %vb, <12 x i1> splat (i1 true), i32 %evl)378 ret <12 x i16> %v379}380 381define <16 x i16> @vmul_vv_v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 zeroext %evl) {382; CHECK-LABEL: vmul_vv_v16i16:383; CHECK: # %bb.0:384; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma385; CHECK-NEXT: vmul.vv v8, v8, v10, v0.t386; CHECK-NEXT: ret387 %v = call <16 x i16> @llvm.vp.mul.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 %evl)388 ret <16 x i16> %v389}390 391define <16 x i16> @vmul_vv_v16i16_unmasked(<16 x i16> %va, <16 x i16> %b, i32 zeroext %evl) {392; CHECK-LABEL: vmul_vv_v16i16_unmasked:393; CHECK: # %bb.0:394; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma395; CHECK-NEXT: vmul.vv v8, v8, v10396; CHECK-NEXT: ret397 %v = call <16 x i16> @llvm.vp.mul.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> splat (i1 true), i32 %evl)398 ret <16 x i16> %v399}400 401define <16 x i16> @vmul_vx_v16i16(<16 x i16> %va, i16 %b, <16 x i1> %m, i32 zeroext %evl) {402; CHECK-LABEL: vmul_vx_v16i16:403; CHECK: # %bb.0:404; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma405; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t406; CHECK-NEXT: ret407 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0408 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer409 %v = call <16 x i16> @llvm.vp.mul.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> %m, i32 %evl)410 ret <16 x i16> %v411}412 413define <16 x i16> @vmul_vx_v16i16_unmasked(<16 x i16> %va, i16 %b, i32 zeroext %evl) {414; CHECK-LABEL: vmul_vx_v16i16_unmasked:415; CHECK: # %bb.0:416; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma417; CHECK-NEXT: vmul.vx v8, v8, a0418; CHECK-NEXT: ret419 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0420 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer421 %v = call <16 x i16> @llvm.vp.mul.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> splat (i1 true), i32 %evl)422 ret <16 x i16> %v423}424 425define <2 x i32> @vmul_vv_v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 zeroext %evl) {426; CHECK-LABEL: vmul_vv_v2i32:427; CHECK: # %bb.0:428; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma429; CHECK-NEXT: vmul.vv v8, v8, v9, v0.t430; CHECK-NEXT: ret431 %v = call <2 x i32> @llvm.vp.mul.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 %evl)432 ret <2 x i32> %v433}434 435define <2 x i32> @vmul_vv_v2i32_unmasked(<2 x i32> %va, <2 x i32> %b, i32 zeroext %evl) {436; CHECK-LABEL: vmul_vv_v2i32_unmasked:437; CHECK: # %bb.0:438; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma439; CHECK-NEXT: vmul.vv v8, v8, v9440; CHECK-NEXT: ret441 %v = call <2 x i32> @llvm.vp.mul.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> splat (i1 true), i32 %evl)442 ret <2 x i32> %v443}444 445define <2 x i32> @vmul_vx_v2i32(<2 x i32> %va, i32 %b, <2 x i1> %m, i32 zeroext %evl) {446; CHECK-LABEL: vmul_vx_v2i32:447; CHECK: # %bb.0:448; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma449; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t450; CHECK-NEXT: ret451 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0452 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer453 %v = call <2 x i32> @llvm.vp.mul.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> %m, i32 %evl)454 ret <2 x i32> %v455}456 457define <2 x i32> @vmul_vx_v2i32_unmasked(<2 x i32> %va, i32 %b, i32 zeroext %evl) {458; CHECK-LABEL: vmul_vx_v2i32_unmasked:459; CHECK: # %bb.0:460; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma461; CHECK-NEXT: vmul.vx v8, v8, a0462; CHECK-NEXT: ret463 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0464 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer465 %v = call <2 x i32> @llvm.vp.mul.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> splat (i1 true), i32 %evl)466 ret <2 x i32> %v467}468 469define <4 x i32> @vmul_vv_v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 zeroext %evl) {470; CHECK-LABEL: vmul_vv_v4i32:471; CHECK: # %bb.0:472; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma473; CHECK-NEXT: vmul.vv v8, v8, v9, v0.t474; CHECK-NEXT: ret475 %v = call <4 x i32> @llvm.vp.mul.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 %evl)476 ret <4 x i32> %v477}478 479define <4 x i32> @vmul_vv_v4i32_unmasked(<4 x i32> %va, <4 x i32> %b, i32 zeroext %evl) {480; CHECK-LABEL: vmul_vv_v4i32_unmasked:481; CHECK: # %bb.0:482; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma483; CHECK-NEXT: vmul.vv v8, v8, v9484; CHECK-NEXT: ret485 %v = call <4 x i32> @llvm.vp.mul.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> splat (i1 true), i32 %evl)486 ret <4 x i32> %v487}488 489define <4 x i32> @vmul_vx_v4i32(<4 x i32> %va, i32 %b, <4 x i1> %m, i32 zeroext %evl) {490; CHECK-LABEL: vmul_vx_v4i32:491; CHECK: # %bb.0:492; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma493; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t494; CHECK-NEXT: ret495 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0496 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer497 %v = call <4 x i32> @llvm.vp.mul.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> %m, i32 %evl)498 ret <4 x i32> %v499}500 501define <4 x i32> @vmul_vx_v4i32_unmasked(<4 x i32> %va, i32 %b, i32 zeroext %evl) {502; CHECK-LABEL: vmul_vx_v4i32_unmasked:503; CHECK: # %bb.0:504; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma505; CHECK-NEXT: vmul.vx v8, v8, a0506; CHECK-NEXT: ret507 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0508 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer509 %v = call <4 x i32> @llvm.vp.mul.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> splat (i1 true), i32 %evl)510 ret <4 x i32> %v511}512 513define <8 x i32> @vmul_vv_v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 zeroext %evl) {514; CHECK-LABEL: vmul_vv_v8i32:515; CHECK: # %bb.0:516; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma517; CHECK-NEXT: vmul.vv v8, v8, v10, v0.t518; CHECK-NEXT: ret519 %v = call <8 x i32> @llvm.vp.mul.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 %evl)520 ret <8 x i32> %v521}522 523define <8 x i32> @vmul_vv_v8i32_unmasked(<8 x i32> %va, <8 x i32> %b, i32 zeroext %evl) {524; CHECK-LABEL: vmul_vv_v8i32_unmasked:525; CHECK: # %bb.0:526; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma527; CHECK-NEXT: vmul.vv v8, v8, v10528; CHECK-NEXT: ret529 %v = call <8 x i32> @llvm.vp.mul.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> splat (i1 true), i32 %evl)530 ret <8 x i32> %v531}532 533define <8 x i32> @vmul_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {534; CHECK-LABEL: vmul_vx_v8i32:535; CHECK: # %bb.0:536; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma537; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t538; CHECK-NEXT: ret539 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0540 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer541 %v = call <8 x i32> @llvm.vp.mul.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 %evl)542 ret <8 x i32> %v543}544 545define <8 x i32> @vmul_vx_v8i32_unmasked(<8 x i32> %va, i32 %b, i32 zeroext %evl) {546; CHECK-LABEL: vmul_vx_v8i32_unmasked:547; CHECK: # %bb.0:548; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma549; CHECK-NEXT: vmul.vx v8, v8, a0550; CHECK-NEXT: ret551 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0552 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer553 %v = call <8 x i32> @llvm.vp.mul.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> splat (i1 true), i32 %evl)554 ret <8 x i32> %v555}556 557define <16 x i32> @vmul_vv_v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 zeroext %evl) {558; CHECK-LABEL: vmul_vv_v16i32:559; CHECK: # %bb.0:560; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma561; CHECK-NEXT: vmul.vv v8, v8, v12, v0.t562; CHECK-NEXT: ret563 %v = call <16 x i32> @llvm.vp.mul.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 %evl)564 ret <16 x i32> %v565}566 567define <16 x i32> @vmul_vv_v16i32_unmasked(<16 x i32> %va, <16 x i32> %b, i32 zeroext %evl) {568; CHECK-LABEL: vmul_vv_v16i32_unmasked:569; CHECK: # %bb.0:570; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma571; CHECK-NEXT: vmul.vv v8, v8, v12572; CHECK-NEXT: ret573 %v = call <16 x i32> @llvm.vp.mul.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> splat (i1 true), i32 %evl)574 ret <16 x i32> %v575}576 577define <16 x i32> @vmul_vx_v16i32(<16 x i32> %va, i32 %b, <16 x i1> %m, i32 zeroext %evl) {578; CHECK-LABEL: vmul_vx_v16i32:579; CHECK: # %bb.0:580; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma581; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t582; CHECK-NEXT: ret583 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0584 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer585 %v = call <16 x i32> @llvm.vp.mul.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> %m, i32 %evl)586 ret <16 x i32> %v587}588 589define <16 x i32> @vmul_vx_v16i32_unmasked(<16 x i32> %va, i32 %b, i32 zeroext %evl) {590; CHECK-LABEL: vmul_vx_v16i32_unmasked:591; CHECK: # %bb.0:592; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma593; CHECK-NEXT: vmul.vx v8, v8, a0594; CHECK-NEXT: ret595 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0596 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer597 %v = call <16 x i32> @llvm.vp.mul.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> splat (i1 true), i32 %evl)598 ret <16 x i32> %v599}600 601define <2 x i64> @vmul_vv_v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 zeroext %evl) {602; CHECK-LABEL: vmul_vv_v2i64:603; CHECK: # %bb.0:604; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma605; CHECK-NEXT: vmul.vv v8, v8, v9, v0.t606; CHECK-NEXT: ret607 %v = call <2 x i64> @llvm.vp.mul.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 %evl)608 ret <2 x i64> %v609}610 611define <2 x i64> @vmul_vv_v2i64_unmasked(<2 x i64> %va, <2 x i64> %b, i32 zeroext %evl) {612; CHECK-LABEL: vmul_vv_v2i64_unmasked:613; CHECK: # %bb.0:614; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma615; CHECK-NEXT: vmul.vv v8, v8, v9616; CHECK-NEXT: ret617 %v = call <2 x i64> @llvm.vp.mul.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> splat (i1 true), i32 %evl)618 ret <2 x i64> %v619}620 621define <2 x i64> @vmul_vx_v2i64(<2 x i64> %va, i64 %b, <2 x i1> %m, i32 zeroext %evl) {622; RV32-LABEL: vmul_vx_v2i64:623; RV32: # %bb.0:624; RV32-NEXT: addi sp, sp, -16625; RV32-NEXT: .cfi_def_cfa_offset 16626; RV32-NEXT: sw a0, 8(sp)627; RV32-NEXT: sw a1, 12(sp)628; RV32-NEXT: addi a0, sp, 8629; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma630; RV32-NEXT: vlse64.v v9, (a0), zero631; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma632; RV32-NEXT: vmul.vv v8, v8, v9, v0.t633; RV32-NEXT: addi sp, sp, 16634; RV32-NEXT: .cfi_def_cfa_offset 0635; RV32-NEXT: ret636;637; RV64-LABEL: vmul_vx_v2i64:638; RV64: # %bb.0:639; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma640; RV64-NEXT: vmul.vx v8, v8, a0, v0.t641; RV64-NEXT: ret642 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0643 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer644 %v = call <2 x i64> @llvm.vp.mul.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> %m, i32 %evl)645 ret <2 x i64> %v646}647 648define <2 x i64> @vmul_vx_v2i64_unmasked(<2 x i64> %va, i64 %b, i32 zeroext %evl) {649; RV32-LABEL: vmul_vx_v2i64_unmasked:650; RV32: # %bb.0:651; RV32-NEXT: addi sp, sp, -16652; RV32-NEXT: .cfi_def_cfa_offset 16653; RV32-NEXT: sw a0, 8(sp)654; RV32-NEXT: sw a1, 12(sp)655; RV32-NEXT: addi a0, sp, 8656; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma657; RV32-NEXT: vlse64.v v9, (a0), zero658; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma659; RV32-NEXT: vmul.vv v8, v8, v9660; RV32-NEXT: addi sp, sp, 16661; RV32-NEXT: .cfi_def_cfa_offset 0662; RV32-NEXT: ret663;664; RV64-LABEL: vmul_vx_v2i64_unmasked:665; RV64: # %bb.0:666; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma667; RV64-NEXT: vmul.vx v8, v8, a0668; RV64-NEXT: ret669 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0670 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer671 %v = call <2 x i64> @llvm.vp.mul.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> splat (i1 true), i32 %evl)672 ret <2 x i64> %v673}674 675define <4 x i64> @vmul_vv_v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 zeroext %evl) {676; CHECK-LABEL: vmul_vv_v4i64:677; CHECK: # %bb.0:678; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma679; CHECK-NEXT: vmul.vv v8, v8, v10, v0.t680; CHECK-NEXT: ret681 %v = call <4 x i64> @llvm.vp.mul.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 %evl)682 ret <4 x i64> %v683}684 685define <4 x i64> @vmul_vv_v4i64_unmasked(<4 x i64> %va, <4 x i64> %b, i32 zeroext %evl) {686; CHECK-LABEL: vmul_vv_v4i64_unmasked:687; CHECK: # %bb.0:688; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma689; CHECK-NEXT: vmul.vv v8, v8, v10690; CHECK-NEXT: ret691 %v = call <4 x i64> @llvm.vp.mul.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> splat (i1 true), i32 %evl)692 ret <4 x i64> %v693}694 695define <4 x i64> @vmul_vx_v4i64(<4 x i64> %va, i64 %b, <4 x i1> %m, i32 zeroext %evl) {696; RV32-LABEL: vmul_vx_v4i64:697; RV32: # %bb.0:698; RV32-NEXT: addi sp, sp, -16699; RV32-NEXT: .cfi_def_cfa_offset 16700; RV32-NEXT: sw a0, 8(sp)701; RV32-NEXT: sw a1, 12(sp)702; RV32-NEXT: addi a0, sp, 8703; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma704; RV32-NEXT: vlse64.v v10, (a0), zero705; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma706; RV32-NEXT: vmul.vv v8, v8, v10, v0.t707; RV32-NEXT: addi sp, sp, 16708; RV32-NEXT: .cfi_def_cfa_offset 0709; RV32-NEXT: ret710;711; RV64-LABEL: vmul_vx_v4i64:712; RV64: # %bb.0:713; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma714; RV64-NEXT: vmul.vx v8, v8, a0, v0.t715; RV64-NEXT: ret716 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0717 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer718 %v = call <4 x i64> @llvm.vp.mul.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> %m, i32 %evl)719 ret <4 x i64> %v720}721 722define <4 x i64> @vmul_vx_v4i64_unmasked(<4 x i64> %va, i64 %b, i32 zeroext %evl) {723; RV32-LABEL: vmul_vx_v4i64_unmasked:724; RV32: # %bb.0:725; RV32-NEXT: addi sp, sp, -16726; RV32-NEXT: .cfi_def_cfa_offset 16727; RV32-NEXT: sw a0, 8(sp)728; RV32-NEXT: sw a1, 12(sp)729; RV32-NEXT: addi a0, sp, 8730; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma731; RV32-NEXT: vlse64.v v10, (a0), zero732; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma733; RV32-NEXT: vmul.vv v8, v8, v10734; RV32-NEXT: addi sp, sp, 16735; RV32-NEXT: .cfi_def_cfa_offset 0736; RV32-NEXT: ret737;738; RV64-LABEL: vmul_vx_v4i64_unmasked:739; RV64: # %bb.0:740; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma741; RV64-NEXT: vmul.vx v8, v8, a0742; RV64-NEXT: ret743 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0744 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer745 %v = call <4 x i64> @llvm.vp.mul.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> splat (i1 true), i32 %evl)746 ret <4 x i64> %v747}748 749define <8 x i64> @vmul_vv_v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 zeroext %evl) {750; CHECK-LABEL: vmul_vv_v8i64:751; CHECK: # %bb.0:752; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma753; CHECK-NEXT: vmul.vv v8, v8, v12, v0.t754; CHECK-NEXT: ret755 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 %evl)756 ret <8 x i64> %v757}758 759define <8 x i64> @vmul_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %b, i32 zeroext %evl) {760; CHECK-LABEL: vmul_vv_v8i64_unmasked:761; CHECK: # %bb.0:762; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma763; CHECK-NEXT: vmul.vv v8, v8, v12764; CHECK-NEXT: ret765 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> splat (i1 true), i32 %evl)766 ret <8 x i64> %v767}768 769define <8 x i64> @vmul_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {770; RV32-LABEL: vmul_vx_v8i64:771; RV32: # %bb.0:772; RV32-NEXT: addi sp, sp, -16773; RV32-NEXT: .cfi_def_cfa_offset 16774; RV32-NEXT: sw a0, 8(sp)775; RV32-NEXT: sw a1, 12(sp)776; RV32-NEXT: addi a0, sp, 8777; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma778; RV32-NEXT: vlse64.v v12, (a0), zero779; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma780; RV32-NEXT: vmul.vv v8, v8, v12, v0.t781; RV32-NEXT: addi sp, sp, 16782; RV32-NEXT: .cfi_def_cfa_offset 0783; RV32-NEXT: ret784;785; RV64-LABEL: vmul_vx_v8i64:786; RV64: # %bb.0:787; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma788; RV64-NEXT: vmul.vx v8, v8, a0, v0.t789; RV64-NEXT: ret790 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0791 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer792 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)793 ret <8 x i64> %v794}795 796define <8 x i64> @vmul_vx_v8i64_unmasked(<8 x i64> %va, i64 %b, i32 zeroext %evl) {797; RV32-LABEL: vmul_vx_v8i64_unmasked:798; RV32: # %bb.0:799; RV32-NEXT: addi sp, sp, -16800; RV32-NEXT: .cfi_def_cfa_offset 16801; RV32-NEXT: sw a0, 8(sp)802; RV32-NEXT: sw a1, 12(sp)803; RV32-NEXT: addi a0, sp, 8804; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma805; RV32-NEXT: vlse64.v v12, (a0), zero806; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma807; RV32-NEXT: vmul.vv v8, v8, v12808; RV32-NEXT: addi sp, sp, 16809; RV32-NEXT: .cfi_def_cfa_offset 0810; RV32-NEXT: ret811;812; RV64-LABEL: vmul_vx_v8i64_unmasked:813; RV64: # %bb.0:814; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma815; RV64-NEXT: vmul.vx v8, v8, a0816; RV64-NEXT: ret817 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0818 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer819 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> splat (i1 true), i32 %evl)820 ret <8 x i64> %v821}822 823define <16 x i64> @vmul_vv_v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 zeroext %evl) {824; CHECK-LABEL: vmul_vv_v16i64:825; CHECK: # %bb.0:826; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma827; CHECK-NEXT: vmul.vv v8, v8, v16, v0.t828; CHECK-NEXT: ret829 %v = call <16 x i64> @llvm.vp.mul.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 %evl)830 ret <16 x i64> %v831}832 833define <16 x i64> @vmul_vv_v16i64_unmasked(<16 x i64> %va, <16 x i64> %b, i32 zeroext %evl) {834; CHECK-LABEL: vmul_vv_v16i64_unmasked:835; CHECK: # %bb.0:836; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma837; CHECK-NEXT: vmul.vv v8, v8, v16838; CHECK-NEXT: ret839 %v = call <16 x i64> @llvm.vp.mul.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> splat (i1 true), i32 %evl)840 ret <16 x i64> %v841}842 843define <16 x i64> @vmul_vx_v16i64(<16 x i64> %va, i64 %b, <16 x i1> %m, i32 zeroext %evl) {844; RV32-LABEL: vmul_vx_v16i64:845; RV32: # %bb.0:846; RV32-NEXT: addi sp, sp, -16847; RV32-NEXT: .cfi_def_cfa_offset 16848; RV32-NEXT: sw a0, 8(sp)849; RV32-NEXT: sw a1, 12(sp)850; RV32-NEXT: addi a0, sp, 8851; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma852; RV32-NEXT: vlse64.v v16, (a0), zero853; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma854; RV32-NEXT: vmul.vv v8, v8, v16, v0.t855; RV32-NEXT: addi sp, sp, 16856; RV32-NEXT: .cfi_def_cfa_offset 0857; RV32-NEXT: ret858;859; RV64-LABEL: vmul_vx_v16i64:860; RV64: # %bb.0:861; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma862; RV64-NEXT: vmul.vx v8, v8, a0, v0.t863; RV64-NEXT: ret864 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0865 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer866 %v = call <16 x i64> @llvm.vp.mul.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> %m, i32 %evl)867 ret <16 x i64> %v868}869 870define <16 x i64> @vmul_vx_v16i64_unmasked(<16 x i64> %va, i64 %b, i32 zeroext %evl) {871; RV32-LABEL: vmul_vx_v16i64_unmasked:872; RV32: # %bb.0:873; RV32-NEXT: addi sp, sp, -16874; RV32-NEXT: .cfi_def_cfa_offset 16875; RV32-NEXT: sw a0, 8(sp)876; RV32-NEXT: sw a1, 12(sp)877; RV32-NEXT: addi a0, sp, 8878; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma879; RV32-NEXT: vlse64.v v16, (a0), zero880; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma881; RV32-NEXT: vmul.vv v8, v8, v16882; RV32-NEXT: addi sp, sp, 16883; RV32-NEXT: .cfi_def_cfa_offset 0884; RV32-NEXT: ret885;886; RV64-LABEL: vmul_vx_v16i64_unmasked:887; RV64: # %bb.0:888; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma889; RV64-NEXT: vmul.vx v8, v8, a0890; RV64-NEXT: ret891 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0892 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer893 %v = call <16 x i64> @llvm.vp.mul.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> splat (i1 true), i32 %evl)894 ret <16 x i64> %v895}896 897define <8 x i64> @vmul_vv_undef_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {898; RV32-LABEL: vmul_vv_undef_v8i64:899; RV32: # %bb.0:900; RV32-NEXT: vsetvli a0, zero, e64, m4, ta, ma901; RV32-NEXT: vmv.v.i v8, 0902; RV32-NEXT: ret903;904; RV64-LABEL: vmul_vv_undef_v8i64:905; RV64: # %bb.0:906; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma907; RV64-NEXT: vmv.v.i v8, 0908; RV64-NEXT: ret909 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> poison, <8 x i1> %m, i32 %evl)910 ret <8 x i64> %v911}912 913define <8 x i64> @vmul_vx_undef_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {914; RV32-LABEL: vmul_vx_undef_v8i64_unmasked:915; RV32: # %bb.0:916; RV32-NEXT: vsetvli a0, zero, e64, m4, ta, ma917; RV32-NEXT: vmv.v.i v8, 0918; RV32-NEXT: ret919;920; RV64-LABEL: vmul_vx_undef_v8i64_unmasked:921; RV64: # %bb.0:922; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma923; RV64-NEXT: vmv.v.i v8, 0924; RV64-NEXT: ret925 %head = insertelement <8 x i1> poison, i1 true, i32 0926 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer927 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> poison, <8 x i1> %m, i32 %evl)928 ret <8 x i64> %v929}930 931define <8 x i64> @vmul_vx_zero_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {932; RV32-LABEL: vmul_vx_zero_v8i64:933; RV32: # %bb.0:934; RV32-NEXT: vsetvli a0, zero, e64, m4, ta, ma935; RV32-NEXT: vmv.v.i v8, 0936; RV32-NEXT: ret937;938; RV64-LABEL: vmul_vx_zero_v8i64:939; RV64: # %bb.0:940; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma941; RV64-NEXT: vmv.v.i v8, 0942; RV64-NEXT: ret943 %elt.head = insertelement <8 x i64> poison, i64 0, i32 0944 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer945 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)946 ret <8 x i64> %v947}948 949define <8 x i64> @vmul_vx_zero_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {950; RV32-LABEL: vmul_vx_zero_v8i64_unmasked:951; RV32: # %bb.0:952; RV32-NEXT: vsetvli a0, zero, e64, m4, ta, ma953; RV32-NEXT: vmv.v.i v8, 0954; RV32-NEXT: ret955;956; RV64-LABEL: vmul_vx_zero_v8i64_unmasked:957; RV64: # %bb.0:958; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma959; RV64-NEXT: vmv.v.i v8, 0960; RV64-NEXT: ret961 %elt.head = insertelement <8 x i64> poison, i64 0, i32 0962 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer963 %head = insertelement <8 x i1> poison, i1 true, i32 0964 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer965 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)966 ret <8 x i64> %v967}968 969define <8 x i64> @vmul_vx_one_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {970; CHECK-LABEL: vmul_vx_one_v8i64:971; CHECK: # %bb.0:972; CHECK-NEXT: ret973 %elt.head = insertelement <8 x i64> poison, i64 1, i32 0974 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer975 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)976 ret <8 x i64> %v977}978 979define <8 x i64> @vmul_vx_one_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {980; CHECK-LABEL: vmul_vx_one_v8i64_unmasked:981; CHECK: # %bb.0:982; CHECK-NEXT: ret983 %elt.head = insertelement <8 x i64> poison, i64 1, i32 0984 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer985 %head = insertelement <8 x i1> poison, i1 true, i32 0986 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer987 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)988 ret <8 x i64> %v989}990 991define <8 x i64> @vmul_vx_negone_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {992; CHECK-LABEL: vmul_vx_negone_v8i64:993; CHECK: # %bb.0:994; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma995; CHECK-NEXT: vrsub.vi v8, v8, 0, v0.t996; CHECK-NEXT: ret997 %elt.head = insertelement <8 x i64> poison, i64 -1, i32 0998 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer999 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1000 ret <8 x i64> %v1001}1002 1003define <8 x i64> @vmul_vx_negone_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {1004; CHECK-LABEL: vmul_vx_negone_v8i64_unmasked:1005; CHECK: # %bb.0:1006; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1007; CHECK-NEXT: vrsub.vi v8, v8, 01008; CHECK-NEXT: ret1009 %elt.head = insertelement <8 x i64> poison, i64 -1, i32 01010 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1011 %head = insertelement <8 x i1> poison, i1 true, i32 01012 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer1013 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1014 ret <8 x i64> %v1015}1016 1017define <8 x i64> @vmul_vx_pow2_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {1018; CHECK-LABEL: vmul_vx_pow2_v8i64:1019; CHECK: # %bb.0:1020; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1021; CHECK-NEXT: vsll.vi v8, v8, 6, v0.t1022; CHECK-NEXT: ret1023 %elt.head = insertelement <8 x i64> poison, i64 64, i32 01024 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1025 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1026 ret <8 x i64> %v1027}1028 1029define <8 x i64> @vmul_vx_pow2_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {1030; CHECK-LABEL: vmul_vx_pow2_v8i64_unmasked:1031; CHECK: # %bb.0:1032; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1033; CHECK-NEXT: vsll.vi v8, v8, 61034; CHECK-NEXT: ret1035 %elt.head = insertelement <8 x i64> poison, i64 64, i32 01036 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1037 %head = insertelement <8 x i1> poison, i1 true, i32 01038 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer1039 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1040 ret <8 x i64> %v1041}1042 1043define <8 x i64> @vmul_vx_negpow2_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {1044; CHECK-LABEL: vmul_vx_negpow2_v8i64:1045; CHECK: # %bb.0:1046; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1047; CHECK-NEXT: vsll.vi v8, v8, 6, v0.t1048; CHECK-NEXT: vrsub.vi v8, v8, 0, v0.t1049; CHECK-NEXT: ret1050 %elt.head = insertelement <8 x i64> poison, i64 -64, i32 01051 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1052 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1053 ret <8 x i64> %v1054}1055 1056define <8 x i64> @vmul_vx_negpow2_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {1057; CHECK-LABEL: vmul_vx_negpow2_v8i64_unmasked:1058; CHECK: # %bb.0:1059; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1060; CHECK-NEXT: vsll.vi v8, v8, 61061; CHECK-NEXT: vrsub.vi v8, v8, 01062; CHECK-NEXT: ret1063 %elt.head = insertelement <8 x i64> poison, i64 -64, i32 01064 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1065 %head = insertelement <8 x i1> poison, i1 true, i32 01066 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer1067 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1068 ret <8 x i64> %v1069}1070 1071define <8 x i64> @vmul_vshl_vx_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {1072; CHECK-LABEL: vmul_vshl_vx_v8i64:1073; CHECK: # %bb.0:1074; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1075; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t1076; CHECK-NEXT: li a0, 71077; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t1078; CHECK-NEXT: ret1079 %elt.head1 = insertelement <8 x i64> poison, i64 3, i32 01080 %vb = shufflevector <8 x i64> %elt.head1, <8 x i64> poison, <8 x i32> zeroinitializer1081 %elt.head2 = insertelement <8 x i64> poison, i64 7, i32 01082 %vc = shufflevector <8 x i64> %elt.head2, <8 x i64> poison, <8 x i32> zeroinitializer1083 %vshl = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1084 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %vshl, <8 x i64> %vc, <8 x i1> %m, i32 %evl)1085 ret <8 x i64> %v1086}1087 1088define <8 x i64> @vmul_vshl_vx_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {1089; CHECK-LABEL: vmul_vshl_vx_v8i64_unmasked:1090; CHECK: # %bb.0:1091; CHECK-NEXT: li a0, 561092; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma1093; CHECK-NEXT: vmul.vx v8, v8, a01094; CHECK-NEXT: ret1095 %head = insertelement <8 x i1> poison, i1 true, i32 01096 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer1097 %elt.head1 = insertelement <8 x i64> poison, i64 3, i32 01098 %vb = shufflevector <8 x i64> %elt.head1, <8 x i64> poison, <8 x i32> zeroinitializer1099 %elt.head2 = insertelement <8 x i64> poison, i64 7, i32 01100 %vc = shufflevector <8 x i64> %elt.head2, <8 x i64> poison, <8 x i32> zeroinitializer1101 %vshl = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1102 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %vshl, <8 x i64> %vc, <8 x i1> %m, i32 %evl)1103 ret <8 x i64> %v1104}1105 1106define <8 x i64> @vmul_vshl_vv_v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 zeroext %evl) {1107; CHECK-LABEL: vmul_vshl_vv_v8i64:1108; CHECK: # %bb.0:1109; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1110; CHECK-NEXT: vsll.vi v8, v8, 7, v0.t1111; CHECK-NEXT: vmul.vv v8, v8, v12, v0.t1112; CHECK-NEXT: ret1113 %elt.head = insertelement <8 x i64> poison, i64 7, i32 01114 %vc = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1115 %vshl = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> %vc, <8 x i1> %m, i32 %evl)1116 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %vshl, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1117 ret <8 x i64> %v1118}1119 1120define <8 x i64> @vmul_vshl_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %vb, i32 zeroext %evl) {1121; CHECK-LABEL: vmul_vshl_vv_v8i64_unmasked:1122; CHECK: # %bb.0:1123; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1124; CHECK-NEXT: vmul.vv v8, v8, v121125; CHECK-NEXT: vsll.vi v8, v8, 71126; CHECK-NEXT: ret1127 %head = insertelement <8 x i1> poison, i1 true, i32 01128 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer1129 %elt.head = insertelement <8 x i64> poison, i64 7, i32 01130 %vc = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1131 %vshl = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> %vc, <8 x i1> %m, i32 %evl)1132 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %vshl, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1133 ret <8 x i64> %v1134}1135 1136define <8 x i64> @vmul_vadd_vx_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {1137; CHECK-LABEL: vmul_vadd_vx_v8i64:1138; CHECK: # %bb.0:1139; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1140; CHECK-NEXT: vadd.vi v8, v8, 3, v0.t1141; CHECK-NEXT: li a0, 71142; CHECK-NEXT: vmul.vx v8, v8, a0, v0.t1143; CHECK-NEXT: ret1144 %elt.head1 = insertelement <8 x i64> poison, i64 3, i32 01145 %vb = shufflevector <8 x i64> %elt.head1, <8 x i64> poison, <8 x i32> zeroinitializer1146 %elt.head2 = insertelement <8 x i64> poison, i64 7, i32 01147 %vc = shufflevector <8 x i64> %elt.head2, <8 x i64> poison, <8 x i32> zeroinitializer1148 %vadd = call <8 x i64> @llvm.vp.add.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1149 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %vadd, <8 x i64> %vc, <8 x i1> %m, i32 %evl)1150 ret <8 x i64> %v1151}1152 1153define <8 x i64> @vmul_vadd_vx_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {1154; CHECK-LABEL: vmul_vadd_vx_v8i64_unmasked:1155; CHECK: # %bb.0:1156; CHECK-NEXT: li a1, 211157; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma1158; CHECK-NEXT: vmv.v.x v12, a11159; CHECK-NEXT: li a1, 71160; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1161; CHECK-NEXT: vmadd.vx v8, a1, v121162; CHECK-NEXT: ret1163 %head = insertelement <8 x i1> poison, i1 true, i32 01164 %m = shufflevector <8 x i1> %head, <8 x i1> poison, <8 x i32> zeroinitializer1165 %elt.head1 = insertelement <8 x i64> poison, i64 3, i32 01166 %vb = shufflevector <8 x i64> %elt.head1, <8 x i64> poison, <8 x i32> zeroinitializer1167 %elt.head2 = insertelement <8 x i64> poison, i64 7, i32 01168 %vc = shufflevector <8 x i64> %elt.head2, <8 x i64> poison, <8 x i32> zeroinitializer1169 %vadd = call <8 x i64> @llvm.vp.add.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1170 %v = call <8 x i64> @llvm.vp.mul.v8i64(<8 x i64> %vadd, <8 x i64> %vc, <8 x i1> %m, i32 %evl)1171 ret <8 x i64> %v1172}1173