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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v,+m -target-abi=ilp32d \3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v,+m -target-abi=lp64d \5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV646 7define <2 x i8> @vnmsac_vv_nxv2i8(<2 x i8> %a, <2 x i8> %b, <2 x i8> %c,  <2 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vnmsac_vv_nxv2i8:9; CHECK:       # %bb.0:10; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, tu, mu11; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t12; CHECK-NEXT:    vmv1r.v v8, v1013; CHECK-NEXT:    ret14  %x = call <2 x i8> @llvm.vp.mul.nxv2i8(<2 x i8> %a, <2 x i8> %b, <2 x i1> splat (i1 -1), i32 %evl)15  %y = call <2 x i8> @llvm.vp.sub.nxv2i8(<2 x i8> %c, <2 x i8> %x, <2 x i1> splat (i1 -1), i32 %evl)16  %u = call <2 x i8> @llvm.vp.merge.nxv2i8(<2 x i1> %m, <2 x i8> %y, <2 x i8> %c, i32 %evl)17  ret <2 x i8> %u18}19 20define <2 x i8> @vnmsac_vv_nxv2i8_unmasked(<2 x i8> %a, <2 x i8> %b, <2 x i8> %c,  <2 x i1> %m, i32 zeroext %evl) {21; CHECK-LABEL: vnmsac_vv_nxv2i8_unmasked:22; CHECK:       # %bb.0:23; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, tu, ma24; CHECK-NEXT:    vnmsac.vv v10, v8, v925; CHECK-NEXT:    vmv1r.v v8, v1026; CHECK-NEXT:    ret27  %x = call <2 x i8> @llvm.vp.mul.nxv2i8(<2 x i8> %a, <2 x i8> %b, <2 x i1> splat (i1 -1), i32 %evl)28  %y = call <2 x i8> @llvm.vp.sub.nxv2i8(<2 x i8> %c, <2 x i8> %x, <2 x i1> splat (i1 -1), i32 %evl)29  %u = call <2 x i8> @llvm.vp.merge.nxv2i8(<2 x i1> splat (i1 -1), <2 x i8> %y, <2 x i8> %c, i32 %evl)30  ret <2 x i8> %u31}32 33define <2 x i8> @vnmsac_vx_nxv2i8(<2 x i8> %a, i8 %b, <2 x i8> %c,  <2 x i1> %m, i32 zeroext %evl) {34; CHECK-LABEL: vnmsac_vx_nxv2i8:35; CHECK:       # %bb.0:36; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, tu, mu37; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t38; CHECK-NEXT:    vmv1r.v v8, v939; CHECK-NEXT:    ret40  %elt.head = insertelement <2 x i8> poison, i8 %b, i32 041  %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer42  %x = call <2 x i8> @llvm.vp.mul.nxv2i8(<2 x i8> %a, <2 x i8> %vb, <2 x i1> splat (i1 -1), i32 %evl)43  %y = call <2 x i8> @llvm.vp.sub.nxv2i8(<2 x i8> %c, <2 x i8> %x, <2 x i1> splat (i1 -1), i32 %evl)44  %u = call <2 x i8> @llvm.vp.merge.nxv2i8(<2 x i1> %m, <2 x i8> %y, <2 x i8> %c, i32 %evl)45  ret <2 x i8> %u46}47 48define <2 x i8> @vnmsac_vx_nxv2i8_unmasked(<2 x i8> %a, i8 %b, <2 x i8> %c,  <2 x i1> %m, i32 zeroext %evl) {49; CHECK-LABEL: vnmsac_vx_nxv2i8_unmasked:50; CHECK:       # %bb.0:51; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, tu, ma52; CHECK-NEXT:    vnmsac.vx v9, a0, v853; CHECK-NEXT:    vmv1r.v v8, v954; CHECK-NEXT:    ret55  %elt.head = insertelement <2 x i8> poison, i8 %b, i32 056  %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer57  %x = call <2 x i8> @llvm.vp.mul.nxv2i8(<2 x i8> %a, <2 x i8> %vb, <2 x i1> splat (i1 -1), i32 %evl)58  %y = call <2 x i8> @llvm.vp.sub.nxv2i8(<2 x i8> %c, <2 x i8> %x, <2 x i1> splat (i1 -1), i32 %evl)59  %u = call <2 x i8> @llvm.vp.merge.nxv2i8(<2 x i1> splat (i1 -1), <2 x i8> %y, <2 x i8> %c, i32 %evl)60  ret <2 x i8> %u61}62 63define <2 x i8> @vnmsac_vv_nxv2i8_ta(<2 x i8> %a, <2 x i8> %b, <2 x i8> %c,  <2 x i1> %m, i32 zeroext %evl) {64; CHECK-LABEL: vnmsac_vv_nxv2i8_ta:65; CHECK:       # %bb.0:66; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, mu67; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t68; CHECK-NEXT:    vmv1r.v v8, v1069; CHECK-NEXT:    ret70  %x = call <2 x i8> @llvm.vp.mul.nxv2i8(<2 x i8> %a, <2 x i8> %b, <2 x i1> splat (i1 -1), i32 %evl)71  %y = call <2 x i8> @llvm.vp.sub.nxv2i8(<2 x i8> %c, <2 x i8> %x, <2 x i1> splat (i1 -1), i32 %evl)72  %u = call <2 x i8> @llvm.vp.select.nxv2i8(<2 x i1> %m, <2 x i8> %y, <2 x i8> %c, i32 %evl)73  ret <2 x i8> %u74}75 76define <2 x i8> @vnmsac_vx_nxv2i8_ta(<2 x i8> %a, i8 %b, <2 x i8> %c,  <2 x i1> %m, i32 zeroext %evl) {77; CHECK-LABEL: vnmsac_vx_nxv2i8_ta:78; CHECK:       # %bb.0:79; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, mu80; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t81; CHECK-NEXT:    vmv1r.v v8, v982; CHECK-NEXT:    ret83  %elt.head = insertelement <2 x i8> poison, i8 %b, i32 084  %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer85  %x = call <2 x i8> @llvm.vp.mul.nxv2i8(<2 x i8> %a, <2 x i8> %vb, <2 x i1> splat (i1 -1), i32 %evl)86  %y = call <2 x i8> @llvm.vp.sub.nxv2i8(<2 x i8> %c, <2 x i8> %x, <2 x i1> splat (i1 -1), i32 %evl)87  %u = call <2 x i8> @llvm.vp.select.nxv2i8(<2 x i1> %m, <2 x i8> %y, <2 x i8> %c, i32 %evl)88  ret <2 x i8> %u89}90 91define <4 x i8> @vnmsac_vv_nxv4i8(<4 x i8> %a, <4 x i8> %b, <4 x i8> %c,  <4 x i1> %m, i32 zeroext %evl) {92; CHECK-LABEL: vnmsac_vv_nxv4i8:93; CHECK:       # %bb.0:94; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, tu, mu95; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t96; CHECK-NEXT:    vmv1r.v v8, v1097; CHECK-NEXT:    ret98  %x = call <4 x i8> @llvm.vp.mul.nxv4i8(<4 x i8> %a, <4 x i8> %b, <4 x i1> splat (i1 -1), i32 %evl)99  %y = call <4 x i8> @llvm.vp.sub.nxv4i8(<4 x i8> %c, <4 x i8> %x, <4 x i1> splat (i1 -1), i32 %evl)100  %u = call <4 x i8> @llvm.vp.merge.nxv4i8(<4 x i1> %m, <4 x i8> %y, <4 x i8> %c, i32 %evl)101  ret <4 x i8> %u102}103 104define <4 x i8> @vnmsac_vv_nxv4i8_unmasked(<4 x i8> %a, <4 x i8> %b, <4 x i8> %c,  <4 x i1> %m, i32 zeroext %evl) {105; CHECK-LABEL: vnmsac_vv_nxv4i8_unmasked:106; CHECK:       # %bb.0:107; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, tu, ma108; CHECK-NEXT:    vnmsac.vv v10, v8, v9109; CHECK-NEXT:    vmv1r.v v8, v10110; CHECK-NEXT:    ret111  %x = call <4 x i8> @llvm.vp.mul.nxv4i8(<4 x i8> %a, <4 x i8> %b, <4 x i1> splat (i1 -1), i32 %evl)112  %y = call <4 x i8> @llvm.vp.sub.nxv4i8(<4 x i8> %c, <4 x i8> %x, <4 x i1> splat (i1 -1), i32 %evl)113  %u = call <4 x i8> @llvm.vp.merge.nxv4i8(<4 x i1> splat (i1 -1), <4 x i8> %y, <4 x i8> %c, i32 %evl)114  ret <4 x i8> %u115}116 117define <4 x i8> @vnmsac_vx_nxv4i8(<4 x i8> %a, i8 %b, <4 x i8> %c,  <4 x i1> %m, i32 zeroext %evl) {118; CHECK-LABEL: vnmsac_vx_nxv4i8:119; CHECK:       # %bb.0:120; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, tu, mu121; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t122; CHECK-NEXT:    vmv1r.v v8, v9123; CHECK-NEXT:    ret124  %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0125  %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer126  %x = call <4 x i8> @llvm.vp.mul.nxv4i8(<4 x i8> %a, <4 x i8> %vb, <4 x i1> splat (i1 -1), i32 %evl)127  %y = call <4 x i8> @llvm.vp.sub.nxv4i8(<4 x i8> %c, <4 x i8> %x, <4 x i1> splat (i1 -1), i32 %evl)128  %u = call <4 x i8> @llvm.vp.merge.nxv4i8(<4 x i1> %m, <4 x i8> %y, <4 x i8> %c, i32 %evl)129  ret <4 x i8> %u130}131 132define <4 x i8> @vnmsac_vx_nxv4i8_unmasked(<4 x i8> %a, i8 %b, <4 x i8> %c,  <4 x i1> %m, i32 zeroext %evl) {133; CHECK-LABEL: vnmsac_vx_nxv4i8_unmasked:134; CHECK:       # %bb.0:135; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, tu, ma136; CHECK-NEXT:    vnmsac.vx v9, a0, v8137; CHECK-NEXT:    vmv1r.v v8, v9138; CHECK-NEXT:    ret139  %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0140  %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer141  %x = call <4 x i8> @llvm.vp.mul.nxv4i8(<4 x i8> %a, <4 x i8> %vb, <4 x i1> splat (i1 -1), i32 %evl)142  %y = call <4 x i8> @llvm.vp.sub.nxv4i8(<4 x i8> %c, <4 x i8> %x, <4 x i1> splat (i1 -1), i32 %evl)143  %u = call <4 x i8> @llvm.vp.merge.nxv4i8(<4 x i1> splat (i1 -1), <4 x i8> %y, <4 x i8> %c, i32 %evl)144  ret <4 x i8> %u145}146 147define <4 x i8> @vnmsac_vv_nxv4i8_ta(<4 x i8> %a, <4 x i8> %b, <4 x i8> %c,  <4 x i1> %m, i32 zeroext %evl) {148; CHECK-LABEL: vnmsac_vv_nxv4i8_ta:149; CHECK:       # %bb.0:150; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu151; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t152; CHECK-NEXT:    vmv1r.v v8, v10153; CHECK-NEXT:    ret154  %x = call <4 x i8> @llvm.vp.mul.nxv4i8(<4 x i8> %a, <4 x i8> %b, <4 x i1> splat (i1 -1), i32 %evl)155  %y = call <4 x i8> @llvm.vp.sub.nxv4i8(<4 x i8> %c, <4 x i8> %x, <4 x i1> splat (i1 -1), i32 %evl)156  %u = call <4 x i8> @llvm.vp.select.nxv4i8(<4 x i1> %m, <4 x i8> %y, <4 x i8> %c, i32 %evl)157  ret <4 x i8> %u158}159 160define <4 x i8> @vnmsac_vx_nxv4i8_ta(<4 x i8> %a, i8 %b, <4 x i8> %c,  <4 x i1> %m, i32 zeroext %evl) {161; CHECK-LABEL: vnmsac_vx_nxv4i8_ta:162; CHECK:       # %bb.0:163; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, mu164; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t165; CHECK-NEXT:    vmv1r.v v8, v9166; CHECK-NEXT:    ret167  %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0168  %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer169  %x = call <4 x i8> @llvm.vp.mul.nxv4i8(<4 x i8> %a, <4 x i8> %vb, <4 x i1> splat (i1 -1), i32 %evl)170  %y = call <4 x i8> @llvm.vp.sub.nxv4i8(<4 x i8> %c, <4 x i8> %x, <4 x i1> splat (i1 -1), i32 %evl)171  %u = call <4 x i8> @llvm.vp.select.nxv4i8(<4 x i1> %m, <4 x i8> %y, <4 x i8> %c, i32 %evl)172  ret <4 x i8> %u173}174 175define <8 x i8> @vnmsac_vv_nxv8i8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c,  <8 x i1> %m, i32 zeroext %evl) {176; CHECK-LABEL: vnmsac_vv_nxv8i8:177; CHECK:       # %bb.0:178; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, tu, mu179; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t180; CHECK-NEXT:    vmv1r.v v8, v10181; CHECK-NEXT:    ret182  %x = call <8 x i8> @llvm.vp.mul.nxv8i8(<8 x i8> %a, <8 x i8> %b, <8 x i1> splat (i1 -1), i32 %evl)183  %y = call <8 x i8> @llvm.vp.sub.nxv8i8(<8 x i8> %c, <8 x i8> %x, <8 x i1> splat (i1 -1), i32 %evl)184  %u = call <8 x i8> @llvm.vp.merge.nxv8i8(<8 x i1> %m, <8 x i8> %y, <8 x i8> %c, i32 %evl)185  ret <8 x i8> %u186}187 188define <8 x i8> @vnmsac_vv_nxv8i8_unmasked(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c,  <8 x i1> %m, i32 zeroext %evl) {189; CHECK-LABEL: vnmsac_vv_nxv8i8_unmasked:190; CHECK:       # %bb.0:191; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, tu, ma192; CHECK-NEXT:    vnmsac.vv v10, v8, v9193; CHECK-NEXT:    vmv1r.v v8, v10194; CHECK-NEXT:    ret195  %x = call <8 x i8> @llvm.vp.mul.nxv8i8(<8 x i8> %a, <8 x i8> %b, <8 x i1> splat (i1 -1), i32 %evl)196  %y = call <8 x i8> @llvm.vp.sub.nxv8i8(<8 x i8> %c, <8 x i8> %x, <8 x i1> splat (i1 -1), i32 %evl)197  %u = call <8 x i8> @llvm.vp.merge.nxv8i8(<8 x i1> splat (i1 -1), <8 x i8> %y, <8 x i8> %c, i32 %evl)198  ret <8 x i8> %u199}200 201define <8 x i8> @vnmsac_vx_nxv8i8(<8 x i8> %a, i8 %b, <8 x i8> %c,  <8 x i1> %m, i32 zeroext %evl) {202; CHECK-LABEL: vnmsac_vx_nxv8i8:203; CHECK:       # %bb.0:204; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, tu, mu205; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t206; CHECK-NEXT:    vmv1r.v v8, v9207; CHECK-NEXT:    ret208  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0209  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer210  %x = call <8 x i8> @llvm.vp.mul.nxv8i8(<8 x i8> %a, <8 x i8> %vb, <8 x i1> splat (i1 -1), i32 %evl)211  %y = call <8 x i8> @llvm.vp.sub.nxv8i8(<8 x i8> %c, <8 x i8> %x, <8 x i1> splat (i1 -1), i32 %evl)212  %u = call <8 x i8> @llvm.vp.merge.nxv8i8(<8 x i1> %m, <8 x i8> %y, <8 x i8> %c, i32 %evl)213  ret <8 x i8> %u214}215 216define <8 x i8> @vnmsac_vx_nxv8i8_unmasked(<8 x i8> %a, i8 %b, <8 x i8> %c,  <8 x i1> %m, i32 zeroext %evl) {217; CHECK-LABEL: vnmsac_vx_nxv8i8_unmasked:218; CHECK:       # %bb.0:219; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, tu, ma220; CHECK-NEXT:    vnmsac.vx v9, a0, v8221; CHECK-NEXT:    vmv1r.v v8, v9222; CHECK-NEXT:    ret223  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0224  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer225  %x = call <8 x i8> @llvm.vp.mul.nxv8i8(<8 x i8> %a, <8 x i8> %vb, <8 x i1> splat (i1 -1), i32 %evl)226  %y = call <8 x i8> @llvm.vp.sub.nxv8i8(<8 x i8> %c, <8 x i8> %x, <8 x i1> splat (i1 -1), i32 %evl)227  %u = call <8 x i8> @llvm.vp.merge.nxv8i8(<8 x i1> splat (i1 -1), <8 x i8> %y, <8 x i8> %c, i32 %evl)228  ret <8 x i8> %u229}230 231define <8 x i8> @vnmsac_vv_nxv8i8_ta(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c,  <8 x i1> %m, i32 zeroext %evl) {232; CHECK-LABEL: vnmsac_vv_nxv8i8_ta:233; CHECK:       # %bb.0:234; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, mu235; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t236; CHECK-NEXT:    vmv1r.v v8, v10237; CHECK-NEXT:    ret238  %x = call <8 x i8> @llvm.vp.mul.nxv8i8(<8 x i8> %a, <8 x i8> %b, <8 x i1> splat (i1 -1), i32 %evl)239  %y = call <8 x i8> @llvm.vp.sub.nxv8i8(<8 x i8> %c, <8 x i8> %x, <8 x i1> splat (i1 -1), i32 %evl)240  %u = call <8 x i8> @llvm.vp.select.nxv8i8(<8 x i1> %m, <8 x i8> %y, <8 x i8> %c, i32 %evl)241  ret <8 x i8> %u242}243 244define <8 x i8> @vnmsac_vx_nxv8i8_ta(<8 x i8> %a, i8 %b, <8 x i8> %c,  <8 x i1> %m, i32 zeroext %evl) {245; CHECK-LABEL: vnmsac_vx_nxv8i8_ta:246; CHECK:       # %bb.0:247; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, mu248; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t249; CHECK-NEXT:    vmv1r.v v8, v9250; CHECK-NEXT:    ret251  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0252  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer253  %x = call <8 x i8> @llvm.vp.mul.nxv8i8(<8 x i8> %a, <8 x i8> %vb, <8 x i1> splat (i1 -1), i32 %evl)254  %y = call <8 x i8> @llvm.vp.sub.nxv8i8(<8 x i8> %c, <8 x i8> %x, <8 x i1> splat (i1 -1), i32 %evl)255  %u = call <8 x i8> @llvm.vp.select.nxv8i8(<8 x i1> %m, <8 x i8> %y, <8 x i8> %c, i32 %evl)256  ret <8 x i8> %u257}258 259define <16 x i8> @vnmsac_vv_nxv16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c,  <16 x i1> %m, i32 zeroext %evl) {260; CHECK-LABEL: vnmsac_vv_nxv16i8:261; CHECK:       # %bb.0:262; CHECK-NEXT:    vsetvli zero, a0, e8, m1, tu, mu263; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t264; CHECK-NEXT:    vmv1r.v v8, v10265; CHECK-NEXT:    ret266  %x = call <16 x i8> @llvm.vp.mul.nxv16i8(<16 x i8> %a, <16 x i8> %b, <16 x i1> splat (i1 -1), i32 %evl)267  %y = call <16 x i8> @llvm.vp.sub.nxv16i8(<16 x i8> %c, <16 x i8> %x, <16 x i1> splat (i1 -1), i32 %evl)268  %u = call <16 x i8> @llvm.vp.merge.nxv16i8(<16 x i1> %m, <16 x i8> %y, <16 x i8> %c, i32 %evl)269  ret <16 x i8> %u270}271 272define <16 x i8> @vnmsac_vv_nxv16i8_unmasked(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c,  <16 x i1> %m, i32 zeroext %evl) {273; CHECK-LABEL: vnmsac_vv_nxv16i8_unmasked:274; CHECK:       # %bb.0:275; CHECK-NEXT:    vsetvli zero, a0, e8, m1, tu, ma276; CHECK-NEXT:    vnmsac.vv v10, v8, v9277; CHECK-NEXT:    vmv1r.v v8, v10278; CHECK-NEXT:    ret279  %x = call <16 x i8> @llvm.vp.mul.nxv16i8(<16 x i8> %a, <16 x i8> %b, <16 x i1> splat (i1 -1), i32 %evl)280  %y = call <16 x i8> @llvm.vp.sub.nxv16i8(<16 x i8> %c, <16 x i8> %x, <16 x i1> splat (i1 -1), i32 %evl)281  %u = call <16 x i8> @llvm.vp.merge.nxv16i8(<16 x i1> splat (i1 -1), <16 x i8> %y, <16 x i8> %c, i32 %evl)282  ret <16 x i8> %u283}284 285define <16 x i8> @vnmsac_vx_nxv16i8(<16 x i8> %a, i8 %b, <16 x i8> %c,  <16 x i1> %m, i32 zeroext %evl) {286; CHECK-LABEL: vnmsac_vx_nxv16i8:287; CHECK:       # %bb.0:288; CHECK-NEXT:    vsetvli zero, a1, e8, m1, tu, mu289; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t290; CHECK-NEXT:    vmv1r.v v8, v9291; CHECK-NEXT:    ret292  %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0293  %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer294  %x = call <16 x i8> @llvm.vp.mul.nxv16i8(<16 x i8> %a, <16 x i8> %vb, <16 x i1> splat (i1 -1), i32 %evl)295  %y = call <16 x i8> @llvm.vp.sub.nxv16i8(<16 x i8> %c, <16 x i8> %x, <16 x i1> splat (i1 -1), i32 %evl)296  %u = call <16 x i8> @llvm.vp.merge.nxv16i8(<16 x i1> %m, <16 x i8> %y, <16 x i8> %c, i32 %evl)297  ret <16 x i8> %u298}299 300define <16 x i8> @vnmsac_vx_nxv16i8_unmasked(<16 x i8> %a, i8 %b, <16 x i8> %c,  <16 x i1> %m, i32 zeroext %evl) {301; CHECK-LABEL: vnmsac_vx_nxv16i8_unmasked:302; CHECK:       # %bb.0:303; CHECK-NEXT:    vsetvli zero, a1, e8, m1, tu, ma304; CHECK-NEXT:    vnmsac.vx v9, a0, v8305; CHECK-NEXT:    vmv1r.v v8, v9306; CHECK-NEXT:    ret307  %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0308  %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer309  %x = call <16 x i8> @llvm.vp.mul.nxv16i8(<16 x i8> %a, <16 x i8> %vb, <16 x i1> splat (i1 -1), i32 %evl)310  %y = call <16 x i8> @llvm.vp.sub.nxv16i8(<16 x i8> %c, <16 x i8> %x, <16 x i1> splat (i1 -1), i32 %evl)311  %u = call <16 x i8> @llvm.vp.merge.nxv16i8(<16 x i1> splat (i1 -1), <16 x i8> %y, <16 x i8> %c, i32 %evl)312  ret <16 x i8> %u313}314 315define <16 x i8> @vnmsac_vv_nxv16i8_ta(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c,  <16 x i1> %m, i32 zeroext %evl) {316; CHECK-LABEL: vnmsac_vv_nxv16i8_ta:317; CHECK:       # %bb.0:318; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, mu319; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t320; CHECK-NEXT:    vmv.v.v v8, v10321; CHECK-NEXT:    ret322  %x = call <16 x i8> @llvm.vp.mul.nxv16i8(<16 x i8> %a, <16 x i8> %b, <16 x i1> splat (i1 -1), i32 %evl)323  %y = call <16 x i8> @llvm.vp.sub.nxv16i8(<16 x i8> %c, <16 x i8> %x, <16 x i1> splat (i1 -1), i32 %evl)324  %u = call <16 x i8> @llvm.vp.select.nxv16i8(<16 x i1> %m, <16 x i8> %y, <16 x i8> %c, i32 %evl)325  ret <16 x i8> %u326}327 328define <16 x i8> @vnmsac_vx_nxv16i8_ta(<16 x i8> %a, i8 %b, <16 x i8> %c,  <16 x i1> %m, i32 zeroext %evl) {329; CHECK-LABEL: vnmsac_vx_nxv16i8_ta:330; CHECK:       # %bb.0:331; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, mu332; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t333; CHECK-NEXT:    vmv.v.v v8, v9334; CHECK-NEXT:    ret335  %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0336  %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer337  %x = call <16 x i8> @llvm.vp.mul.nxv16i8(<16 x i8> %a, <16 x i8> %vb, <16 x i1> splat (i1 -1), i32 %evl)338  %y = call <16 x i8> @llvm.vp.sub.nxv16i8(<16 x i8> %c, <16 x i8> %x, <16 x i1> splat (i1 -1), i32 %evl)339  %u = call <16 x i8> @llvm.vp.select.nxv16i8(<16 x i1> %m, <16 x i8> %y, <16 x i8> %c, i32 %evl)340  ret <16 x i8> %u341}342 343define <32 x i8> @vnmsac_vv_nxv32i8(<32 x i8> %a, <32 x i8> %b, <32 x i8> %c,  <32 x i1> %m, i32 zeroext %evl) {344; CHECK-LABEL: vnmsac_vv_nxv32i8:345; CHECK:       # %bb.0:346; CHECK-NEXT:    vsetvli zero, a0, e8, m2, tu, mu347; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t348; CHECK-NEXT:    vmv2r.v v8, v12349; CHECK-NEXT:    ret350  %x = call <32 x i8> @llvm.vp.mul.nxv32i8(<32 x i8> %a, <32 x i8> %b, <32 x i1> splat (i1 -1), i32 %evl)351  %y = call <32 x i8> @llvm.vp.sub.nxv32i8(<32 x i8> %c, <32 x i8> %x, <32 x i1> splat (i1 -1), i32 %evl)352  %u = call <32 x i8> @llvm.vp.merge.nxv32i8(<32 x i1> %m, <32 x i8> %y, <32 x i8> %c, i32 %evl)353  ret <32 x i8> %u354}355 356define <32 x i8> @vnmsac_vv_nxv32i8_unmasked(<32 x i8> %a, <32 x i8> %b, <32 x i8> %c,  <32 x i1> %m, i32 zeroext %evl) {357; CHECK-LABEL: vnmsac_vv_nxv32i8_unmasked:358; CHECK:       # %bb.0:359; CHECK-NEXT:    vsetvli zero, a0, e8, m2, tu, ma360; CHECK-NEXT:    vnmsac.vv v12, v8, v10361; CHECK-NEXT:    vmv2r.v v8, v12362; CHECK-NEXT:    ret363  %x = call <32 x i8> @llvm.vp.mul.nxv32i8(<32 x i8> %a, <32 x i8> %b, <32 x i1> splat (i1 -1), i32 %evl)364  %y = call <32 x i8> @llvm.vp.sub.nxv32i8(<32 x i8> %c, <32 x i8> %x, <32 x i1> splat (i1 -1), i32 %evl)365  %u = call <32 x i8> @llvm.vp.merge.nxv32i8(<32 x i1> splat (i1 -1), <32 x i8> %y, <32 x i8> %c, i32 %evl)366  ret <32 x i8> %u367}368 369define <32 x i8> @vnmsac_vx_nxv32i8(<32 x i8> %a, i8 %b, <32 x i8> %c,  <32 x i1> %m, i32 zeroext %evl) {370; CHECK-LABEL: vnmsac_vx_nxv32i8:371; CHECK:       # %bb.0:372; CHECK-NEXT:    vsetvli zero, a1, e8, m2, tu, mu373; CHECK-NEXT:    vnmsac.vx v10, a0, v8, v0.t374; CHECK-NEXT:    vmv2r.v v8, v10375; CHECK-NEXT:    ret376  %elt.head = insertelement <32 x i8> poison, i8 %b, i32 0377  %vb = shufflevector <32 x i8> %elt.head, <32 x i8> poison, <32 x i32> zeroinitializer378  %x = call <32 x i8> @llvm.vp.mul.nxv32i8(<32 x i8> %a, <32 x i8> %vb, <32 x i1> splat (i1 -1), i32 %evl)379  %y = call <32 x i8> @llvm.vp.sub.nxv32i8(<32 x i8> %c, <32 x i8> %x, <32 x i1> splat (i1 -1), i32 %evl)380  %u = call <32 x i8> @llvm.vp.merge.nxv32i8(<32 x i1> %m, <32 x i8> %y, <32 x i8> %c, i32 %evl)381  ret <32 x i8> %u382}383 384define <32 x i8> @vnmsac_vx_nxv32i8_unmasked(<32 x i8> %a, i8 %b, <32 x i8> %c,  <32 x i1> %m, i32 zeroext %evl) {385; CHECK-LABEL: vnmsac_vx_nxv32i8_unmasked:386; CHECK:       # %bb.0:387; CHECK-NEXT:    vsetvli zero, a1, e8, m2, tu, ma388; CHECK-NEXT:    vnmsac.vx v10, a0, v8389; CHECK-NEXT:    vmv2r.v v8, v10390; CHECK-NEXT:    ret391  %elt.head = insertelement <32 x i8> poison, i8 %b, i32 0392  %vb = shufflevector <32 x i8> %elt.head, <32 x i8> poison, <32 x i32> zeroinitializer393  %x = call <32 x i8> @llvm.vp.mul.nxv32i8(<32 x i8> %a, <32 x i8> %vb, <32 x i1> splat (i1 -1), i32 %evl)394  %y = call <32 x i8> @llvm.vp.sub.nxv32i8(<32 x i8> %c, <32 x i8> %x, <32 x i1> splat (i1 -1), i32 %evl)395  %u = call <32 x i8> @llvm.vp.merge.nxv32i8(<32 x i1> splat (i1 -1), <32 x i8> %y, <32 x i8> %c, i32 %evl)396  ret <32 x i8> %u397}398 399define <32 x i8> @vnmsac_vv_nxv32i8_ta(<32 x i8> %a, <32 x i8> %b, <32 x i8> %c,  <32 x i1> %m, i32 zeroext %evl) {400; CHECK-LABEL: vnmsac_vv_nxv32i8_ta:401; CHECK:       # %bb.0:402; CHECK-NEXT:    vsetvli zero, a0, e8, m2, ta, mu403; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t404; CHECK-NEXT:    vmv.v.v v8, v12405; CHECK-NEXT:    ret406  %x = call <32 x i8> @llvm.vp.mul.nxv32i8(<32 x i8> %a, <32 x i8> %b, <32 x i1> splat (i1 -1), i32 %evl)407  %y = call <32 x i8> @llvm.vp.sub.nxv32i8(<32 x i8> %c, <32 x i8> %x, <32 x i1> splat (i1 -1), i32 %evl)408  %u = call <32 x i8> @llvm.vp.select.nxv32i8(<32 x i1> %m, <32 x i8> %y, <32 x i8> %c, i32 %evl)409  ret <32 x i8> %u410}411 412define <32 x i8> @vnmsac_vx_nxv32i8_ta(<32 x i8> %a, i8 %b, <32 x i8> %c,  <32 x i1> %m, i32 zeroext %evl) {413; CHECK-LABEL: vnmsac_vx_nxv32i8_ta:414; CHECK:       # %bb.0:415; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, mu416; CHECK-NEXT:    vnmsac.vx v10, a0, v8, v0.t417; CHECK-NEXT:    vmv.v.v v8, v10418; CHECK-NEXT:    ret419  %elt.head = insertelement <32 x i8> poison, i8 %b, i32 0420  %vb = shufflevector <32 x i8> %elt.head, <32 x i8> poison, <32 x i32> zeroinitializer421  %x = call <32 x i8> @llvm.vp.mul.nxv32i8(<32 x i8> %a, <32 x i8> %vb, <32 x i1> splat (i1 -1), i32 %evl)422  %y = call <32 x i8> @llvm.vp.sub.nxv32i8(<32 x i8> %c, <32 x i8> %x, <32 x i1> splat (i1 -1), i32 %evl)423  %u = call <32 x i8> @llvm.vp.select.nxv32i8(<32 x i1> %m, <32 x i8> %y, <32 x i8> %c, i32 %evl)424  ret <32 x i8> %u425}426 427define <64 x i8> @vnmsac_vv_nxv64i8(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c,  <64 x i1> %m, i32 zeroext %evl) {428; CHECK-LABEL: vnmsac_vv_nxv64i8:429; CHECK:       # %bb.0:430; CHECK-NEXT:    vsetvli zero, a0, e8, m4, tu, mu431; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t432; CHECK-NEXT:    vmv4r.v v8, v16433; CHECK-NEXT:    ret434  %x = call <64 x i8> @llvm.vp.mul.nxv64i8(<64 x i8> %a, <64 x i8> %b, <64 x i1> splat (i1 -1), i32 %evl)435  %y = call <64 x i8> @llvm.vp.sub.nxv64i8(<64 x i8> %c, <64 x i8> %x, <64 x i1> splat (i1 -1), i32 %evl)436  %u = call <64 x i8> @llvm.vp.merge.nxv64i8(<64 x i1> %m, <64 x i8> %y, <64 x i8> %c, i32 %evl)437  ret <64 x i8> %u438}439 440define <64 x i8> @vnmsac_vv_nxv64i8_unmasked(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c,  <64 x i1> %m, i32 zeroext %evl) {441; CHECK-LABEL: vnmsac_vv_nxv64i8_unmasked:442; CHECK:       # %bb.0:443; CHECK-NEXT:    vsetvli zero, a0, e8, m4, tu, ma444; CHECK-NEXT:    vnmsac.vv v16, v8, v12445; CHECK-NEXT:    vmv4r.v v8, v16446; CHECK-NEXT:    ret447  %x = call <64 x i8> @llvm.vp.mul.nxv64i8(<64 x i8> %a, <64 x i8> %b, <64 x i1> splat (i1 -1), i32 %evl)448  %y = call <64 x i8> @llvm.vp.sub.nxv64i8(<64 x i8> %c, <64 x i8> %x, <64 x i1> splat (i1 -1), i32 %evl)449  %u = call <64 x i8> @llvm.vp.merge.nxv64i8(<64 x i1> splat (i1 -1), <64 x i8> %y, <64 x i8> %c, i32 %evl)450  ret <64 x i8> %u451}452 453define <64 x i8> @vnmsac_vx_nxv64i8(<64 x i8> %a, i8 %b, <64 x i8> %c,  <64 x i1> %m, i32 zeroext %evl) {454; CHECK-LABEL: vnmsac_vx_nxv64i8:455; CHECK:       # %bb.0:456; CHECK-NEXT:    vsetvli zero, a1, e8, m4, tu, mu457; CHECK-NEXT:    vnmsac.vx v12, a0, v8, v0.t458; CHECK-NEXT:    vmv4r.v v8, v12459; CHECK-NEXT:    ret460  %elt.head = insertelement <64 x i8> poison, i8 %b, i32 0461  %vb = shufflevector <64 x i8> %elt.head, <64 x i8> poison, <64 x i32> zeroinitializer462  %x = call <64 x i8> @llvm.vp.mul.nxv64i8(<64 x i8> %a, <64 x i8> %vb, <64 x i1> splat (i1 -1), i32 %evl)463  %y = call <64 x i8> @llvm.vp.sub.nxv64i8(<64 x i8> %c, <64 x i8> %x, <64 x i1> splat (i1 -1), i32 %evl)464  %u = call <64 x i8> @llvm.vp.merge.nxv64i8(<64 x i1> %m, <64 x i8> %y, <64 x i8> %c, i32 %evl)465  ret <64 x i8> %u466}467 468define <64 x i8> @vnmsac_vx_nxv64i8_unmasked(<64 x i8> %a, i8 %b, <64 x i8> %c,  <64 x i1> %m, i32 zeroext %evl) {469; CHECK-LABEL: vnmsac_vx_nxv64i8_unmasked:470; CHECK:       # %bb.0:471; CHECK-NEXT:    vsetvli zero, a1, e8, m4, tu, ma472; CHECK-NEXT:    vnmsac.vx v12, a0, v8473; CHECK-NEXT:    vmv4r.v v8, v12474; CHECK-NEXT:    ret475  %elt.head = insertelement <64 x i8> poison, i8 %b, i32 0476  %vb = shufflevector <64 x i8> %elt.head, <64 x i8> poison, <64 x i32> zeroinitializer477  %x = call <64 x i8> @llvm.vp.mul.nxv64i8(<64 x i8> %a, <64 x i8> %vb, <64 x i1> splat (i1 -1), i32 %evl)478  %y = call <64 x i8> @llvm.vp.sub.nxv64i8(<64 x i8> %c, <64 x i8> %x, <64 x i1> splat (i1 -1), i32 %evl)479  %u = call <64 x i8> @llvm.vp.merge.nxv64i8(<64 x i1> splat (i1 -1), <64 x i8> %y, <64 x i8> %c, i32 %evl)480  ret <64 x i8> %u481}482 483define <64 x i8> @vnmsac_vv_nxv64i8_ta(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c,  <64 x i1> %m, i32 zeroext %evl) {484; CHECK-LABEL: vnmsac_vv_nxv64i8_ta:485; CHECK:       # %bb.0:486; CHECK-NEXT:    vsetvli zero, a0, e8, m4, ta, mu487; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t488; CHECK-NEXT:    vmv.v.v v8, v16489; CHECK-NEXT:    ret490  %x = call <64 x i8> @llvm.vp.mul.nxv64i8(<64 x i8> %a, <64 x i8> %b, <64 x i1> splat (i1 -1), i32 %evl)491  %y = call <64 x i8> @llvm.vp.sub.nxv64i8(<64 x i8> %c, <64 x i8> %x, <64 x i1> splat (i1 -1), i32 %evl)492  %u = call <64 x i8> @llvm.vp.select.nxv64i8(<64 x i1> %m, <64 x i8> %y, <64 x i8> %c, i32 %evl)493  ret <64 x i8> %u494}495 496define <64 x i8> @vnmsac_vx_nxv64i8_ta(<64 x i8> %a, i8 %b, <64 x i8> %c,  <64 x i1> %m, i32 zeroext %evl) {497; CHECK-LABEL: vnmsac_vx_nxv64i8_ta:498; CHECK:       # %bb.0:499; CHECK-NEXT:    vsetvli zero, a1, e8, m4, ta, mu500; CHECK-NEXT:    vnmsac.vx v12, a0, v8, v0.t501; CHECK-NEXT:    vmv.v.v v8, v12502; CHECK-NEXT:    ret503  %elt.head = insertelement <64 x i8> poison, i8 %b, i32 0504  %vb = shufflevector <64 x i8> %elt.head, <64 x i8> poison, <64 x i32> zeroinitializer505  %x = call <64 x i8> @llvm.vp.mul.nxv64i8(<64 x i8> %a, <64 x i8> %vb, <64 x i1> splat (i1 -1), i32 %evl)506  %y = call <64 x i8> @llvm.vp.sub.nxv64i8(<64 x i8> %c, <64 x i8> %x, <64 x i1> splat (i1 -1), i32 %evl)507  %u = call <64 x i8> @llvm.vp.select.nxv64i8(<64 x i1> %m, <64 x i8> %y, <64 x i8> %c, i32 %evl)508  ret <64 x i8> %u509}510 511define <2 x i16> @vnmsac_vv_nxv2i16(<2 x i16> %a, <2 x i16> %b, <2 x i16> %c,  <2 x i1> %m, i32 zeroext %evl) {512; CHECK-LABEL: vnmsac_vv_nxv2i16:513; CHECK:       # %bb.0:514; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, tu, mu515; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t516; CHECK-NEXT:    vmv1r.v v8, v10517; CHECK-NEXT:    ret518  %x = call <2 x i16> @llvm.vp.mul.nxv2i16(<2 x i16> %a, <2 x i16> %b, <2 x i1> splat (i1 -1), i32 %evl)519  %y = call <2 x i16> @llvm.vp.sub.nxv2i16(<2 x i16> %c, <2 x i16> %x, <2 x i1> splat (i1 -1), i32 %evl)520  %u = call <2 x i16> @llvm.vp.merge.nxv2i16(<2 x i1> %m, <2 x i16> %y, <2 x i16> %c, i32 %evl)521  ret <2 x i16> %u522}523 524define <2 x i16> @vnmsac_vv_nxv2i16_unmasked(<2 x i16> %a, <2 x i16> %b, <2 x i16> %c,  <2 x i1> %m, i32 zeroext %evl) {525; CHECK-LABEL: vnmsac_vv_nxv2i16_unmasked:526; CHECK:       # %bb.0:527; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, tu, ma528; CHECK-NEXT:    vnmsac.vv v10, v8, v9529; CHECK-NEXT:    vmv1r.v v8, v10530; CHECK-NEXT:    ret531  %x = call <2 x i16> @llvm.vp.mul.nxv2i16(<2 x i16> %a, <2 x i16> %b, <2 x i1> splat (i1 -1), i32 %evl)532  %y = call <2 x i16> @llvm.vp.sub.nxv2i16(<2 x i16> %c, <2 x i16> %x, <2 x i1> splat (i1 -1), i32 %evl)533  %u = call <2 x i16> @llvm.vp.merge.nxv2i16(<2 x i1> splat (i1 -1), <2 x i16> %y, <2 x i16> %c, i32 %evl)534  ret <2 x i16> %u535}536 537define <2 x i16> @vnmsac_vx_nxv2i16(<2 x i16> %a, i16 %b, <2 x i16> %c,  <2 x i1> %m, i32 zeroext %evl) {538; CHECK-LABEL: vnmsac_vx_nxv2i16:539; CHECK:       # %bb.0:540; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, tu, mu541; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t542; CHECK-NEXT:    vmv1r.v v8, v9543; CHECK-NEXT:    ret544  %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0545  %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer546  %x = call <2 x i16> @llvm.vp.mul.nxv2i16(<2 x i16> %a, <2 x i16> %vb, <2 x i1> splat (i1 -1), i32 %evl)547  %y = call <2 x i16> @llvm.vp.sub.nxv2i16(<2 x i16> %c, <2 x i16> %x, <2 x i1> splat (i1 -1), i32 %evl)548  %u = call <2 x i16> @llvm.vp.merge.nxv2i16(<2 x i1> %m, <2 x i16> %y, <2 x i16> %c, i32 %evl)549  ret <2 x i16> %u550}551 552define <2 x i16> @vnmsac_vx_nxv2i16_unmasked(<2 x i16> %a, i16 %b, <2 x i16> %c,  <2 x i1> %m, i32 zeroext %evl) {553; CHECK-LABEL: vnmsac_vx_nxv2i16_unmasked:554; CHECK:       # %bb.0:555; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, tu, ma556; CHECK-NEXT:    vnmsac.vx v9, a0, v8557; CHECK-NEXT:    vmv1r.v v8, v9558; CHECK-NEXT:    ret559  %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0560  %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer561  %x = call <2 x i16> @llvm.vp.mul.nxv2i16(<2 x i16> %a, <2 x i16> %vb, <2 x i1> splat (i1 -1), i32 %evl)562  %y = call <2 x i16> @llvm.vp.sub.nxv2i16(<2 x i16> %c, <2 x i16> %x, <2 x i1> splat (i1 -1), i32 %evl)563  %u = call <2 x i16> @llvm.vp.merge.nxv2i16(<2 x i1> splat (i1 -1), <2 x i16> %y, <2 x i16> %c, i32 %evl)564  ret <2 x i16> %u565}566 567define <2 x i16> @vnmsac_vv_nxv2i16_ta(<2 x i16> %a, <2 x i16> %b, <2 x i16> %c,  <2 x i1> %m, i32 zeroext %evl) {568; CHECK-LABEL: vnmsac_vv_nxv2i16_ta:569; CHECK:       # %bb.0:570; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, mu571; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t572; CHECK-NEXT:    vmv1r.v v8, v10573; CHECK-NEXT:    ret574  %x = call <2 x i16> @llvm.vp.mul.nxv2i16(<2 x i16> %a, <2 x i16> %b, <2 x i1> splat (i1 -1), i32 %evl)575  %y = call <2 x i16> @llvm.vp.sub.nxv2i16(<2 x i16> %c, <2 x i16> %x, <2 x i1> splat (i1 -1), i32 %evl)576  %u = call <2 x i16> @llvm.vp.select.nxv2i16(<2 x i1> %m, <2 x i16> %y, <2 x i16> %c, i32 %evl)577  ret <2 x i16> %u578}579 580define <2 x i16> @vnmsac_vx_nxv2i16_ta(<2 x i16> %a, i16 %b, <2 x i16> %c,  <2 x i1> %m, i32 zeroext %evl) {581; CHECK-LABEL: vnmsac_vx_nxv2i16_ta:582; CHECK:       # %bb.0:583; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, mu584; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t585; CHECK-NEXT:    vmv1r.v v8, v9586; CHECK-NEXT:    ret587  %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0588  %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer589  %x = call <2 x i16> @llvm.vp.mul.nxv2i16(<2 x i16> %a, <2 x i16> %vb, <2 x i1> splat (i1 -1), i32 %evl)590  %y = call <2 x i16> @llvm.vp.sub.nxv2i16(<2 x i16> %c, <2 x i16> %x, <2 x i1> splat (i1 -1), i32 %evl)591  %u = call <2 x i16> @llvm.vp.select.nxv2i16(<2 x i1> %m, <2 x i16> %y, <2 x i16> %c, i32 %evl)592  ret <2 x i16> %u593}594 595define <4 x i16> @vnmsac_vv_nxv4i16(<4 x i16> %a, <4 x i16> %b, <4 x i16> %c,  <4 x i1> %m, i32 zeroext %evl) {596; CHECK-LABEL: vnmsac_vv_nxv4i16:597; CHECK:       # %bb.0:598; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, tu, mu599; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t600; CHECK-NEXT:    vmv1r.v v8, v10601; CHECK-NEXT:    ret602  %x = call <4 x i16> @llvm.vp.mul.nxv4i16(<4 x i16> %a, <4 x i16> %b, <4 x i1> splat (i1 -1), i32 %evl)603  %y = call <4 x i16> @llvm.vp.sub.nxv4i16(<4 x i16> %c, <4 x i16> %x, <4 x i1> splat (i1 -1), i32 %evl)604  %u = call <4 x i16> @llvm.vp.merge.nxv4i16(<4 x i1> %m, <4 x i16> %y, <4 x i16> %c, i32 %evl)605  ret <4 x i16> %u606}607 608define <4 x i16> @vnmsac_vv_nxv4i16_unmasked(<4 x i16> %a, <4 x i16> %b, <4 x i16> %c,  <4 x i1> %m, i32 zeroext %evl) {609; CHECK-LABEL: vnmsac_vv_nxv4i16_unmasked:610; CHECK:       # %bb.0:611; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, tu, ma612; CHECK-NEXT:    vnmsac.vv v10, v8, v9613; CHECK-NEXT:    vmv1r.v v8, v10614; CHECK-NEXT:    ret615  %x = call <4 x i16> @llvm.vp.mul.nxv4i16(<4 x i16> %a, <4 x i16> %b, <4 x i1> splat (i1 -1), i32 %evl)616  %y = call <4 x i16> @llvm.vp.sub.nxv4i16(<4 x i16> %c, <4 x i16> %x, <4 x i1> splat (i1 -1), i32 %evl)617  %u = call <4 x i16> @llvm.vp.merge.nxv4i16(<4 x i1> splat (i1 -1), <4 x i16> %y, <4 x i16> %c, i32 %evl)618  ret <4 x i16> %u619}620 621define <4 x i16> @vnmsac_vx_nxv4i16(<4 x i16> %a, i16 %b, <4 x i16> %c,  <4 x i1> %m, i32 zeroext %evl) {622; CHECK-LABEL: vnmsac_vx_nxv4i16:623; CHECK:       # %bb.0:624; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, tu, mu625; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t626; CHECK-NEXT:    vmv1r.v v8, v9627; CHECK-NEXT:    ret628  %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0629  %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer630  %x = call <4 x i16> @llvm.vp.mul.nxv4i16(<4 x i16> %a, <4 x i16> %vb, <4 x i1> splat (i1 -1), i32 %evl)631  %y = call <4 x i16> @llvm.vp.sub.nxv4i16(<4 x i16> %c, <4 x i16> %x, <4 x i1> splat (i1 -1), i32 %evl)632  %u = call <4 x i16> @llvm.vp.merge.nxv4i16(<4 x i1> %m, <4 x i16> %y, <4 x i16> %c, i32 %evl)633  ret <4 x i16> %u634}635 636define <4 x i16> @vnmsac_vx_nxv4i16_unmasked(<4 x i16> %a, i16 %b, <4 x i16> %c,  <4 x i1> %m, i32 zeroext %evl) {637; CHECK-LABEL: vnmsac_vx_nxv4i16_unmasked:638; CHECK:       # %bb.0:639; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, tu, ma640; CHECK-NEXT:    vnmsac.vx v9, a0, v8641; CHECK-NEXT:    vmv1r.v v8, v9642; CHECK-NEXT:    ret643  %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0644  %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer645  %x = call <4 x i16> @llvm.vp.mul.nxv4i16(<4 x i16> %a, <4 x i16> %vb, <4 x i1> splat (i1 -1), i32 %evl)646  %y = call <4 x i16> @llvm.vp.sub.nxv4i16(<4 x i16> %c, <4 x i16> %x, <4 x i1> splat (i1 -1), i32 %evl)647  %u = call <4 x i16> @llvm.vp.merge.nxv4i16(<4 x i1> splat (i1 -1), <4 x i16> %y, <4 x i16> %c, i32 %evl)648  ret <4 x i16> %u649}650 651define <4 x i16> @vnmsac_vv_nxv4i16_ta(<4 x i16> %a, <4 x i16> %b, <4 x i16> %c,  <4 x i1> %m, i32 zeroext %evl) {652; CHECK-LABEL: vnmsac_vv_nxv4i16_ta:653; CHECK:       # %bb.0:654; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu655; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t656; CHECK-NEXT:    vmv1r.v v8, v10657; CHECK-NEXT:    ret658  %x = call <4 x i16> @llvm.vp.mul.nxv4i16(<4 x i16> %a, <4 x i16> %b, <4 x i1> splat (i1 -1), i32 %evl)659  %y = call <4 x i16> @llvm.vp.sub.nxv4i16(<4 x i16> %c, <4 x i16> %x, <4 x i1> splat (i1 -1), i32 %evl)660  %u = call <4 x i16> @llvm.vp.select.nxv4i16(<4 x i1> %m, <4 x i16> %y, <4 x i16> %c, i32 %evl)661  ret <4 x i16> %u662}663 664define <4 x i16> @vnmsac_vx_nxv4i16_ta(<4 x i16> %a, i16 %b, <4 x i16> %c,  <4 x i1> %m, i32 zeroext %evl) {665; CHECK-LABEL: vnmsac_vx_nxv4i16_ta:666; CHECK:       # %bb.0:667; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, mu668; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t669; CHECK-NEXT:    vmv1r.v v8, v9670; CHECK-NEXT:    ret671  %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0672  %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer673  %x = call <4 x i16> @llvm.vp.mul.nxv4i16(<4 x i16> %a, <4 x i16> %vb, <4 x i1> splat (i1 -1), i32 %evl)674  %y = call <4 x i16> @llvm.vp.sub.nxv4i16(<4 x i16> %c, <4 x i16> %x, <4 x i1> splat (i1 -1), i32 %evl)675  %u = call <4 x i16> @llvm.vp.select.nxv4i16(<4 x i1> %m, <4 x i16> %y, <4 x i16> %c, i32 %evl)676  ret <4 x i16> %u677}678 679define <8 x i16> @vnmsac_vv_nxv8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c,  <8 x i1> %m, i32 zeroext %evl) {680; CHECK-LABEL: vnmsac_vv_nxv8i16:681; CHECK:       # %bb.0:682; CHECK-NEXT:    vsetvli zero, a0, e16, m1, tu, mu683; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t684; CHECK-NEXT:    vmv1r.v v8, v10685; CHECK-NEXT:    ret686  %x = call <8 x i16> @llvm.vp.mul.nxv8i16(<8 x i16> %a, <8 x i16> %b, <8 x i1> splat (i1 -1), i32 %evl)687  %y = call <8 x i16> @llvm.vp.sub.nxv8i16(<8 x i16> %c, <8 x i16> %x, <8 x i1> splat (i1 -1), i32 %evl)688  %u = call <8 x i16> @llvm.vp.merge.nxv8i16(<8 x i1> %m, <8 x i16> %y, <8 x i16> %c, i32 %evl)689  ret <8 x i16> %u690}691 692define <8 x i16> @vnmsac_vv_nxv8i16_unmasked(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c,  <8 x i1> %m, i32 zeroext %evl) {693; CHECK-LABEL: vnmsac_vv_nxv8i16_unmasked:694; CHECK:       # %bb.0:695; CHECK-NEXT:    vsetvli zero, a0, e16, m1, tu, ma696; CHECK-NEXT:    vnmsac.vv v10, v8, v9697; CHECK-NEXT:    vmv1r.v v8, v10698; CHECK-NEXT:    ret699  %x = call <8 x i16> @llvm.vp.mul.nxv8i16(<8 x i16> %a, <8 x i16> %b, <8 x i1> splat (i1 -1), i32 %evl)700  %y = call <8 x i16> @llvm.vp.sub.nxv8i16(<8 x i16> %c, <8 x i16> %x, <8 x i1> splat (i1 -1), i32 %evl)701  %u = call <8 x i16> @llvm.vp.merge.nxv8i16(<8 x i1> splat (i1 -1), <8 x i16> %y, <8 x i16> %c, i32 %evl)702  ret <8 x i16> %u703}704 705define <8 x i16> @vnmsac_vx_nxv8i16(<8 x i16> %a, i16 %b, <8 x i16> %c,  <8 x i1> %m, i32 zeroext %evl) {706; CHECK-LABEL: vnmsac_vx_nxv8i16:707; CHECK:       # %bb.0:708; CHECK-NEXT:    vsetvli zero, a1, e16, m1, tu, mu709; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t710; CHECK-NEXT:    vmv1r.v v8, v9711; CHECK-NEXT:    ret712  %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0713  %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer714  %x = call <8 x i16> @llvm.vp.mul.nxv8i16(<8 x i16> %a, <8 x i16> %vb, <8 x i1> splat (i1 -1), i32 %evl)715  %y = call <8 x i16> @llvm.vp.sub.nxv8i16(<8 x i16> %c, <8 x i16> %x, <8 x i1> splat (i1 -1), i32 %evl)716  %u = call <8 x i16> @llvm.vp.merge.nxv8i16(<8 x i1> %m, <8 x i16> %y, <8 x i16> %c, i32 %evl)717  ret <8 x i16> %u718}719 720define <8 x i16> @vnmsac_vx_nxv8i16_unmasked(<8 x i16> %a, i16 %b, <8 x i16> %c,  <8 x i1> %m, i32 zeroext %evl) {721; CHECK-LABEL: vnmsac_vx_nxv8i16_unmasked:722; CHECK:       # %bb.0:723; CHECK-NEXT:    vsetvli zero, a1, e16, m1, tu, ma724; CHECK-NEXT:    vnmsac.vx v9, a0, v8725; CHECK-NEXT:    vmv1r.v v8, v9726; CHECK-NEXT:    ret727  %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0728  %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer729  %x = call <8 x i16> @llvm.vp.mul.nxv8i16(<8 x i16> %a, <8 x i16> %vb, <8 x i1> splat (i1 -1), i32 %evl)730  %y = call <8 x i16> @llvm.vp.sub.nxv8i16(<8 x i16> %c, <8 x i16> %x, <8 x i1> splat (i1 -1), i32 %evl)731  %u = call <8 x i16> @llvm.vp.merge.nxv8i16(<8 x i1> splat (i1 -1), <8 x i16> %y, <8 x i16> %c, i32 %evl)732  ret <8 x i16> %u733}734 735define <8 x i16> @vnmsac_vv_nxv8i16_ta(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c,  <8 x i1> %m, i32 zeroext %evl) {736; CHECK-LABEL: vnmsac_vv_nxv8i16_ta:737; CHECK:       # %bb.0:738; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, mu739; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t740; CHECK-NEXT:    vmv.v.v v8, v10741; CHECK-NEXT:    ret742  %x = call <8 x i16> @llvm.vp.mul.nxv8i16(<8 x i16> %a, <8 x i16> %b, <8 x i1> splat (i1 -1), i32 %evl)743  %y = call <8 x i16> @llvm.vp.sub.nxv8i16(<8 x i16> %c, <8 x i16> %x, <8 x i1> splat (i1 -1), i32 %evl)744  %u = call <8 x i16> @llvm.vp.select.nxv8i16(<8 x i1> %m, <8 x i16> %y, <8 x i16> %c, i32 %evl)745  ret <8 x i16> %u746}747 748define <8 x i16> @vnmsac_vx_nxv8i16_ta(<8 x i16> %a, i16 %b, <8 x i16> %c,  <8 x i1> %m, i32 zeroext %evl) {749; CHECK-LABEL: vnmsac_vx_nxv8i16_ta:750; CHECK:       # %bb.0:751; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, mu752; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t753; CHECK-NEXT:    vmv.v.v v8, v9754; CHECK-NEXT:    ret755  %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0756  %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer757  %x = call <8 x i16> @llvm.vp.mul.nxv8i16(<8 x i16> %a, <8 x i16> %vb, <8 x i1> splat (i1 -1), i32 %evl)758  %y = call <8 x i16> @llvm.vp.sub.nxv8i16(<8 x i16> %c, <8 x i16> %x, <8 x i1> splat (i1 -1), i32 %evl)759  %u = call <8 x i16> @llvm.vp.select.nxv8i16(<8 x i1> %m, <8 x i16> %y, <8 x i16> %c, i32 %evl)760  ret <8 x i16> %u761}762 763define <16 x i16> @vnmsac_vv_nxv16i16(<16 x i16> %a, <16 x i16> %b, <16 x i16> %c,  <16 x i1> %m, i32 zeroext %evl) {764; CHECK-LABEL: vnmsac_vv_nxv16i16:765; CHECK:       # %bb.0:766; CHECK-NEXT:    vsetvli zero, a0, e16, m2, tu, mu767; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t768; CHECK-NEXT:    vmv2r.v v8, v12769; CHECK-NEXT:    ret770  %x = call <16 x i16> @llvm.vp.mul.nxv16i16(<16 x i16> %a, <16 x i16> %b, <16 x i1> splat (i1 -1), i32 %evl)771  %y = call <16 x i16> @llvm.vp.sub.nxv16i16(<16 x i16> %c, <16 x i16> %x, <16 x i1> splat (i1 -1), i32 %evl)772  %u = call <16 x i16> @llvm.vp.merge.nxv16i16(<16 x i1> %m, <16 x i16> %y, <16 x i16> %c, i32 %evl)773  ret <16 x i16> %u774}775 776define <16 x i16> @vnmsac_vv_nxv16i16_unmasked(<16 x i16> %a, <16 x i16> %b, <16 x i16> %c,  <16 x i1> %m, i32 zeroext %evl) {777; CHECK-LABEL: vnmsac_vv_nxv16i16_unmasked:778; CHECK:       # %bb.0:779; CHECK-NEXT:    vsetvli zero, a0, e16, m2, tu, ma780; CHECK-NEXT:    vnmsac.vv v12, v8, v10781; CHECK-NEXT:    vmv2r.v v8, v12782; CHECK-NEXT:    ret783  %x = call <16 x i16> @llvm.vp.mul.nxv16i16(<16 x i16> %a, <16 x i16> %b, <16 x i1> splat (i1 -1), i32 %evl)784  %y = call <16 x i16> @llvm.vp.sub.nxv16i16(<16 x i16> %c, <16 x i16> %x, <16 x i1> splat (i1 -1), i32 %evl)785  %u = call <16 x i16> @llvm.vp.merge.nxv16i16(<16 x i1> splat (i1 -1), <16 x i16> %y, <16 x i16> %c, i32 %evl)786  ret <16 x i16> %u787}788 789define <16 x i16> @vnmsac_vx_nxv16i16(<16 x i16> %a, i16 %b, <16 x i16> %c,  <16 x i1> %m, i32 zeroext %evl) {790; CHECK-LABEL: vnmsac_vx_nxv16i16:791; CHECK:       # %bb.0:792; CHECK-NEXT:    vsetvli zero, a1, e16, m2, tu, mu793; CHECK-NEXT:    vnmsac.vx v10, a0, v8, v0.t794; CHECK-NEXT:    vmv2r.v v8, v10795; CHECK-NEXT:    ret796  %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0797  %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer798  %x = call <16 x i16> @llvm.vp.mul.nxv16i16(<16 x i16> %a, <16 x i16> %vb, <16 x i1> splat (i1 -1), i32 %evl)799  %y = call <16 x i16> @llvm.vp.sub.nxv16i16(<16 x i16> %c, <16 x i16> %x, <16 x i1> splat (i1 -1), i32 %evl)800  %u = call <16 x i16> @llvm.vp.merge.nxv16i16(<16 x i1> %m, <16 x i16> %y, <16 x i16> %c, i32 %evl)801  ret <16 x i16> %u802}803 804define <16 x i16> @vnmsac_vx_nxv16i16_unmasked(<16 x i16> %a, i16 %b, <16 x i16> %c,  <16 x i1> %m, i32 zeroext %evl) {805; CHECK-LABEL: vnmsac_vx_nxv16i16_unmasked:806; CHECK:       # %bb.0:807; CHECK-NEXT:    vsetvli zero, a1, e16, m2, tu, ma808; CHECK-NEXT:    vnmsac.vx v10, a0, v8809; CHECK-NEXT:    vmv2r.v v8, v10810; CHECK-NEXT:    ret811  %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0812  %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer813  %x = call <16 x i16> @llvm.vp.mul.nxv16i16(<16 x i16> %a, <16 x i16> %vb, <16 x i1> splat (i1 -1), i32 %evl)814  %y = call <16 x i16> @llvm.vp.sub.nxv16i16(<16 x i16> %c, <16 x i16> %x, <16 x i1> splat (i1 -1), i32 %evl)815  %u = call <16 x i16> @llvm.vp.merge.nxv16i16(<16 x i1> splat (i1 -1), <16 x i16> %y, <16 x i16> %c, i32 %evl)816  ret <16 x i16> %u817}818 819define <16 x i16> @vnmsac_vv_nxv16i16_ta(<16 x i16> %a, <16 x i16> %b, <16 x i16> %c,  <16 x i1> %m, i32 zeroext %evl) {820; CHECK-LABEL: vnmsac_vv_nxv16i16_ta:821; CHECK:       # %bb.0:822; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, mu823; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t824; CHECK-NEXT:    vmv.v.v v8, v12825; CHECK-NEXT:    ret826  %x = call <16 x i16> @llvm.vp.mul.nxv16i16(<16 x i16> %a, <16 x i16> %b, <16 x i1> splat (i1 -1), i32 %evl)827  %y = call <16 x i16> @llvm.vp.sub.nxv16i16(<16 x i16> %c, <16 x i16> %x, <16 x i1> splat (i1 -1), i32 %evl)828  %u = call <16 x i16> @llvm.vp.select.nxv16i16(<16 x i1> %m, <16 x i16> %y, <16 x i16> %c, i32 %evl)829  ret <16 x i16> %u830}831 832define <16 x i16> @vnmsac_vx_nxv16i16_ta(<16 x i16> %a, i16 %b, <16 x i16> %c,  <16 x i1> %m, i32 zeroext %evl) {833; CHECK-LABEL: vnmsac_vx_nxv16i16_ta:834; CHECK:       # %bb.0:835; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, mu836; CHECK-NEXT:    vnmsac.vx v10, a0, v8, v0.t837; CHECK-NEXT:    vmv.v.v v8, v10838; CHECK-NEXT:    ret839  %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0840  %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer841  %x = call <16 x i16> @llvm.vp.mul.nxv16i16(<16 x i16> %a, <16 x i16> %vb, <16 x i1> splat (i1 -1), i32 %evl)842  %y = call <16 x i16> @llvm.vp.sub.nxv16i16(<16 x i16> %c, <16 x i16> %x, <16 x i1> splat (i1 -1), i32 %evl)843  %u = call <16 x i16> @llvm.vp.select.nxv16i16(<16 x i1> %m, <16 x i16> %y, <16 x i16> %c, i32 %evl)844  ret <16 x i16> %u845}846 847define <32 x i16> @vnmsac_vv_nxv32i16(<32 x i16> %a, <32 x i16> %b, <32 x i16> %c,  <32 x i1> %m, i32 zeroext %evl) {848; CHECK-LABEL: vnmsac_vv_nxv32i16:849; CHECK:       # %bb.0:850; CHECK-NEXT:    vsetvli zero, a0, e16, m4, tu, mu851; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t852; CHECK-NEXT:    vmv4r.v v8, v16853; CHECK-NEXT:    ret854  %x = call <32 x i16> @llvm.vp.mul.nxv32i16(<32 x i16> %a, <32 x i16> %b, <32 x i1> splat (i1 -1), i32 %evl)855  %y = call <32 x i16> @llvm.vp.sub.nxv32i16(<32 x i16> %c, <32 x i16> %x, <32 x i1> splat (i1 -1), i32 %evl)856  %u = call <32 x i16> @llvm.vp.merge.nxv32i16(<32 x i1> %m, <32 x i16> %y, <32 x i16> %c, i32 %evl)857  ret <32 x i16> %u858}859 860define <32 x i16> @vnmsac_vv_nxv32i16_unmasked(<32 x i16> %a, <32 x i16> %b, <32 x i16> %c,  <32 x i1> %m, i32 zeroext %evl) {861; CHECK-LABEL: vnmsac_vv_nxv32i16_unmasked:862; CHECK:       # %bb.0:863; CHECK-NEXT:    vsetvli zero, a0, e16, m4, tu, ma864; CHECK-NEXT:    vnmsac.vv v16, v8, v12865; CHECK-NEXT:    vmv4r.v v8, v16866; CHECK-NEXT:    ret867  %x = call <32 x i16> @llvm.vp.mul.nxv32i16(<32 x i16> %a, <32 x i16> %b, <32 x i1> splat (i1 -1), i32 %evl)868  %y = call <32 x i16> @llvm.vp.sub.nxv32i16(<32 x i16> %c, <32 x i16> %x, <32 x i1> splat (i1 -1), i32 %evl)869  %u = call <32 x i16> @llvm.vp.merge.nxv32i16(<32 x i1> splat (i1 -1), <32 x i16> %y, <32 x i16> %c, i32 %evl)870  ret <32 x i16> %u871}872 873define <32 x i16> @vnmsac_vx_nxv32i16(<32 x i16> %a, i16 %b, <32 x i16> %c,  <32 x i1> %m, i32 zeroext %evl) {874; CHECK-LABEL: vnmsac_vx_nxv32i16:875; CHECK:       # %bb.0:876; CHECK-NEXT:    vsetvli zero, a1, e16, m4, tu, mu877; CHECK-NEXT:    vnmsac.vx v12, a0, v8, v0.t878; CHECK-NEXT:    vmv4r.v v8, v12879; CHECK-NEXT:    ret880  %elt.head = insertelement <32 x i16> poison, i16 %b, i32 0881  %vb = shufflevector <32 x i16> %elt.head, <32 x i16> poison, <32 x i32> zeroinitializer882  %x = call <32 x i16> @llvm.vp.mul.nxv32i16(<32 x i16> %a, <32 x i16> %vb, <32 x i1> splat (i1 -1), i32 %evl)883  %y = call <32 x i16> @llvm.vp.sub.nxv32i16(<32 x i16> %c, <32 x i16> %x, <32 x i1> splat (i1 -1), i32 %evl)884  %u = call <32 x i16> @llvm.vp.merge.nxv32i16(<32 x i1> %m, <32 x i16> %y, <32 x i16> %c, i32 %evl)885  ret <32 x i16> %u886}887 888define <32 x i16> @vnmsac_vx_nxv32i16_unmasked(<32 x i16> %a, i16 %b, <32 x i16> %c,  <32 x i1> %m, i32 zeroext %evl) {889; CHECK-LABEL: vnmsac_vx_nxv32i16_unmasked:890; CHECK:       # %bb.0:891; CHECK-NEXT:    vsetvli zero, a1, e16, m4, tu, ma892; CHECK-NEXT:    vnmsac.vx v12, a0, v8893; CHECK-NEXT:    vmv4r.v v8, v12894; CHECK-NEXT:    ret895  %elt.head = insertelement <32 x i16> poison, i16 %b, i32 0896  %vb = shufflevector <32 x i16> %elt.head, <32 x i16> poison, <32 x i32> zeroinitializer897  %x = call <32 x i16> @llvm.vp.mul.nxv32i16(<32 x i16> %a, <32 x i16> %vb, <32 x i1> splat (i1 -1), i32 %evl)898  %y = call <32 x i16> @llvm.vp.sub.nxv32i16(<32 x i16> %c, <32 x i16> %x, <32 x i1> splat (i1 -1), i32 %evl)899  %u = call <32 x i16> @llvm.vp.merge.nxv32i16(<32 x i1> splat (i1 -1), <32 x i16> %y, <32 x i16> %c, i32 %evl)900  ret <32 x i16> %u901}902 903define <32 x i16> @vnmsac_vv_nxv32i16_ta(<32 x i16> %a, <32 x i16> %b, <32 x i16> %c,  <32 x i1> %m, i32 zeroext %evl) {904; CHECK-LABEL: vnmsac_vv_nxv32i16_ta:905; CHECK:       # %bb.0:906; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, mu907; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t908; CHECK-NEXT:    vmv.v.v v8, v16909; CHECK-NEXT:    ret910  %x = call <32 x i16> @llvm.vp.mul.nxv32i16(<32 x i16> %a, <32 x i16> %b, <32 x i1> splat (i1 -1), i32 %evl)911  %y = call <32 x i16> @llvm.vp.sub.nxv32i16(<32 x i16> %c, <32 x i16> %x, <32 x i1> splat (i1 -1), i32 %evl)912  %u = call <32 x i16> @llvm.vp.select.nxv32i16(<32 x i1> %m, <32 x i16> %y, <32 x i16> %c, i32 %evl)913  ret <32 x i16> %u914}915 916define <32 x i16> @vnmsac_vx_nxv32i16_ta(<32 x i16> %a, i16 %b, <32 x i16> %c,  <32 x i1> %m, i32 zeroext %evl) {917; CHECK-LABEL: vnmsac_vx_nxv32i16_ta:918; CHECK:       # %bb.0:919; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, mu920; CHECK-NEXT:    vnmsac.vx v12, a0, v8, v0.t921; CHECK-NEXT:    vmv.v.v v8, v12922; CHECK-NEXT:    ret923  %elt.head = insertelement <32 x i16> poison, i16 %b, i32 0924  %vb = shufflevector <32 x i16> %elt.head, <32 x i16> poison, <32 x i32> zeroinitializer925  %x = call <32 x i16> @llvm.vp.mul.nxv32i16(<32 x i16> %a, <32 x i16> %vb, <32 x i1> splat (i1 -1), i32 %evl)926  %y = call <32 x i16> @llvm.vp.sub.nxv32i16(<32 x i16> %c, <32 x i16> %x, <32 x i1> splat (i1 -1), i32 %evl)927  %u = call <32 x i16> @llvm.vp.select.nxv32i16(<32 x i1> %m, <32 x i16> %y, <32 x i16> %c, i32 %evl)928  ret <32 x i16> %u929}930 931define <2 x i32> @vnmsac_vv_nxv2i32(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c,  <2 x i1> %m, i32 zeroext %evl) {932; CHECK-LABEL: vnmsac_vv_nxv2i32:933; CHECK:       # %bb.0:934; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, tu, mu935; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t936; CHECK-NEXT:    vmv1r.v v8, v10937; CHECK-NEXT:    ret938  %x = call <2 x i32> @llvm.vp.mul.nxv2i32(<2 x i32> %a, <2 x i32> %b, <2 x i1> splat (i1 -1), i32 %evl)939  %y = call <2 x i32> @llvm.vp.sub.nxv2i32(<2 x i32> %c, <2 x i32> %x, <2 x i1> splat (i1 -1), i32 %evl)940  %u = call <2 x i32> @llvm.vp.merge.nxv2i32(<2 x i1> %m, <2 x i32> %y, <2 x i32> %c, i32 %evl)941  ret <2 x i32> %u942}943 944define <2 x i32> @vnmsac_vv_nxv2i32_unmasked(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c,  <2 x i1> %m, i32 zeroext %evl) {945; CHECK-LABEL: vnmsac_vv_nxv2i32_unmasked:946; CHECK:       # %bb.0:947; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, tu, ma948; CHECK-NEXT:    vnmsac.vv v10, v8, v9949; CHECK-NEXT:    vmv1r.v v8, v10950; CHECK-NEXT:    ret951  %x = call <2 x i32> @llvm.vp.mul.nxv2i32(<2 x i32> %a, <2 x i32> %b, <2 x i1> splat (i1 -1), i32 %evl)952  %y = call <2 x i32> @llvm.vp.sub.nxv2i32(<2 x i32> %c, <2 x i32> %x, <2 x i1> splat (i1 -1), i32 %evl)953  %u = call <2 x i32> @llvm.vp.merge.nxv2i32(<2 x i1> splat (i1 -1), <2 x i32> %y, <2 x i32> %c, i32 %evl)954  ret <2 x i32> %u955}956 957define <2 x i32> @vnmsac_vx_nxv2i32(<2 x i32> %a, i32 %b, <2 x i32> %c,  <2 x i1> %m, i32 zeroext %evl) {958; CHECK-LABEL: vnmsac_vx_nxv2i32:959; CHECK:       # %bb.0:960; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, tu, mu961; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t962; CHECK-NEXT:    vmv1r.v v8, v9963; CHECK-NEXT:    ret964  %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0965  %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer966  %x = call <2 x i32> @llvm.vp.mul.nxv2i32(<2 x i32> %a, <2 x i32> %vb, <2 x i1> splat (i1 -1), i32 %evl)967  %y = call <2 x i32> @llvm.vp.sub.nxv2i32(<2 x i32> %c, <2 x i32> %x, <2 x i1> splat (i1 -1), i32 %evl)968  %u = call <2 x i32> @llvm.vp.merge.nxv2i32(<2 x i1> %m, <2 x i32> %y, <2 x i32> %c, i32 %evl)969  ret <2 x i32> %u970}971 972define <2 x i32> @vnmsac_vx_nxv2i32_unmasked(<2 x i32> %a, i32 %b, <2 x i32> %c,  <2 x i1> %m, i32 zeroext %evl) {973; CHECK-LABEL: vnmsac_vx_nxv2i32_unmasked:974; CHECK:       # %bb.0:975; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, tu, ma976; CHECK-NEXT:    vnmsac.vx v9, a0, v8977; CHECK-NEXT:    vmv1r.v v8, v9978; CHECK-NEXT:    ret979  %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0980  %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer981  %x = call <2 x i32> @llvm.vp.mul.nxv2i32(<2 x i32> %a, <2 x i32> %vb, <2 x i1> splat (i1 -1), i32 %evl)982  %y = call <2 x i32> @llvm.vp.sub.nxv2i32(<2 x i32> %c, <2 x i32> %x, <2 x i1> splat (i1 -1), i32 %evl)983  %u = call <2 x i32> @llvm.vp.merge.nxv2i32(<2 x i1> splat (i1 -1), <2 x i32> %y, <2 x i32> %c, i32 %evl)984  ret <2 x i32> %u985}986 987define <2 x i32> @vnmsac_vv_nxv2i32_ta(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c,  <2 x i1> %m, i32 zeroext %evl) {988; CHECK-LABEL: vnmsac_vv_nxv2i32_ta:989; CHECK:       # %bb.0:990; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, mu991; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t992; CHECK-NEXT:    vmv1r.v v8, v10993; CHECK-NEXT:    ret994  %x = call <2 x i32> @llvm.vp.mul.nxv2i32(<2 x i32> %a, <2 x i32> %b, <2 x i1> splat (i1 -1), i32 %evl)995  %y = call <2 x i32> @llvm.vp.sub.nxv2i32(<2 x i32> %c, <2 x i32> %x, <2 x i1> splat (i1 -1), i32 %evl)996  %u = call <2 x i32> @llvm.vp.select.nxv2i32(<2 x i1> %m, <2 x i32> %y, <2 x i32> %c, i32 %evl)997  ret <2 x i32> %u998}999 1000define <2 x i32> @vnmsac_vx_nxv2i32_ta(<2 x i32> %a, i32 %b, <2 x i32> %c,  <2 x i1> %m, i32 zeroext %evl) {1001; CHECK-LABEL: vnmsac_vx_nxv2i32_ta:1002; CHECK:       # %bb.0:1003; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, mu1004; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t1005; CHECK-NEXT:    vmv1r.v v8, v91006; CHECK-NEXT:    ret1007  %elt.head = insertelement <2 x i32> poison, i32 %b, i32 01008  %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer1009  %x = call <2 x i32> @llvm.vp.mul.nxv2i32(<2 x i32> %a, <2 x i32> %vb, <2 x i1> splat (i1 -1), i32 %evl)1010  %y = call <2 x i32> @llvm.vp.sub.nxv2i32(<2 x i32> %c, <2 x i32> %x, <2 x i1> splat (i1 -1), i32 %evl)1011  %u = call <2 x i32> @llvm.vp.select.nxv2i32(<2 x i1> %m, <2 x i32> %y, <2 x i32> %c, i32 %evl)1012  ret <2 x i32> %u1013}1014 1015define <4 x i32> @vnmsac_vv_nxv4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c,  <4 x i1> %m, i32 zeroext %evl) {1016; CHECK-LABEL: vnmsac_vv_nxv4i32:1017; CHECK:       # %bb.0:1018; CHECK-NEXT:    vsetvli zero, a0, e32, m1, tu, mu1019; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t1020; CHECK-NEXT:    vmv1r.v v8, v101021; CHECK-NEXT:    ret1022  %x = call <4 x i32> @llvm.vp.mul.nxv4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> splat (i1 -1), i32 %evl)1023  %y = call <4 x i32> @llvm.vp.sub.nxv4i32(<4 x i32> %c, <4 x i32> %x, <4 x i1> splat (i1 -1), i32 %evl)1024  %u = call <4 x i32> @llvm.vp.merge.nxv4i32(<4 x i1> %m, <4 x i32> %y, <4 x i32> %c, i32 %evl)1025  ret <4 x i32> %u1026}1027 1028define <4 x i32> @vnmsac_vv_nxv4i32_unmasked(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c,  <4 x i1> %m, i32 zeroext %evl) {1029; CHECK-LABEL: vnmsac_vv_nxv4i32_unmasked:1030; CHECK:       # %bb.0:1031; CHECK-NEXT:    vsetvli zero, a0, e32, m1, tu, ma1032; CHECK-NEXT:    vnmsac.vv v10, v8, v91033; CHECK-NEXT:    vmv1r.v v8, v101034; CHECK-NEXT:    ret1035  %x = call <4 x i32> @llvm.vp.mul.nxv4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> splat (i1 -1), i32 %evl)1036  %y = call <4 x i32> @llvm.vp.sub.nxv4i32(<4 x i32> %c, <4 x i32> %x, <4 x i1> splat (i1 -1), i32 %evl)1037  %u = call <4 x i32> @llvm.vp.merge.nxv4i32(<4 x i1> splat (i1 -1), <4 x i32> %y, <4 x i32> %c, i32 %evl)1038  ret <4 x i32> %u1039}1040 1041define <4 x i32> @vnmsac_vx_nxv4i32(<4 x i32> %a, i32 %b, <4 x i32> %c,  <4 x i1> %m, i32 zeroext %evl) {1042; CHECK-LABEL: vnmsac_vx_nxv4i32:1043; CHECK:       # %bb.0:1044; CHECK-NEXT:    vsetvli zero, a1, e32, m1, tu, mu1045; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t1046; CHECK-NEXT:    vmv1r.v v8, v91047; CHECK-NEXT:    ret1048  %elt.head = insertelement <4 x i32> poison, i32 %b, i32 01049  %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer1050  %x = call <4 x i32> @llvm.vp.mul.nxv4i32(<4 x i32> %a, <4 x i32> %vb, <4 x i1> splat (i1 -1), i32 %evl)1051  %y = call <4 x i32> @llvm.vp.sub.nxv4i32(<4 x i32> %c, <4 x i32> %x, <4 x i1> splat (i1 -1), i32 %evl)1052  %u = call <4 x i32> @llvm.vp.merge.nxv4i32(<4 x i1> %m, <4 x i32> %y, <4 x i32> %c, i32 %evl)1053  ret <4 x i32> %u1054}1055 1056define <4 x i32> @vnmsac_vx_nxv4i32_unmasked(<4 x i32> %a, i32 %b, <4 x i32> %c,  <4 x i1> %m, i32 zeroext %evl) {1057; CHECK-LABEL: vnmsac_vx_nxv4i32_unmasked:1058; CHECK:       # %bb.0:1059; CHECK-NEXT:    vsetvli zero, a1, e32, m1, tu, ma1060; CHECK-NEXT:    vnmsac.vx v9, a0, v81061; CHECK-NEXT:    vmv1r.v v8, v91062; CHECK-NEXT:    ret1063  %elt.head = insertelement <4 x i32> poison, i32 %b, i32 01064  %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer1065  %x = call <4 x i32> @llvm.vp.mul.nxv4i32(<4 x i32> %a, <4 x i32> %vb, <4 x i1> splat (i1 -1), i32 %evl)1066  %y = call <4 x i32> @llvm.vp.sub.nxv4i32(<4 x i32> %c, <4 x i32> %x, <4 x i1> splat (i1 -1), i32 %evl)1067  %u = call <4 x i32> @llvm.vp.merge.nxv4i32(<4 x i1> splat (i1 -1), <4 x i32> %y, <4 x i32> %c, i32 %evl)1068  ret <4 x i32> %u1069}1070 1071define <4 x i32> @vnmsac_vv_nxv4i32_ta(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c,  <4 x i1> %m, i32 zeroext %evl) {1072; CHECK-LABEL: vnmsac_vv_nxv4i32_ta:1073; CHECK:       # %bb.0:1074; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, mu1075; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t1076; CHECK-NEXT:    vmv.v.v v8, v101077; CHECK-NEXT:    ret1078  %x = call <4 x i32> @llvm.vp.mul.nxv4i32(<4 x i32> %a, <4 x i32> %b, <4 x i1> splat (i1 -1), i32 %evl)1079  %y = call <4 x i32> @llvm.vp.sub.nxv4i32(<4 x i32> %c, <4 x i32> %x, <4 x i1> splat (i1 -1), i32 %evl)1080  %u = call <4 x i32> @llvm.vp.select.nxv4i32(<4 x i1> %m, <4 x i32> %y, <4 x i32> %c, i32 %evl)1081  ret <4 x i32> %u1082}1083 1084define <4 x i32> @vnmsac_vx_nxv4i32_ta(<4 x i32> %a, i32 %b, <4 x i32> %c,  <4 x i1> %m, i32 zeroext %evl) {1085; CHECK-LABEL: vnmsac_vx_nxv4i32_ta:1086; CHECK:       # %bb.0:1087; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, mu1088; CHECK-NEXT:    vnmsac.vx v9, a0, v8, v0.t1089; CHECK-NEXT:    vmv.v.v v8, v91090; CHECK-NEXT:    ret1091  %elt.head = insertelement <4 x i32> poison, i32 %b, i32 01092  %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer1093  %x = call <4 x i32> @llvm.vp.mul.nxv4i32(<4 x i32> %a, <4 x i32> %vb, <4 x i1> splat (i1 -1), i32 %evl)1094  %y = call <4 x i32> @llvm.vp.sub.nxv4i32(<4 x i32> %c, <4 x i32> %x, <4 x i1> splat (i1 -1), i32 %evl)1095  %u = call <4 x i32> @llvm.vp.select.nxv4i32(<4 x i1> %m, <4 x i32> %y, <4 x i32> %c, i32 %evl)1096  ret <4 x i32> %u1097}1098 1099define <8 x i32> @vnmsac_vv_nxv8i32(<8 x i32> %a, <8 x i32> %b, <8 x i32> %c,  <8 x i1> %m, i32 zeroext %evl) {1100; CHECK-LABEL: vnmsac_vv_nxv8i32:1101; CHECK:       # %bb.0:1102; CHECK-NEXT:    vsetvli zero, a0, e32, m2, tu, mu1103; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t1104; CHECK-NEXT:    vmv2r.v v8, v121105; CHECK-NEXT:    ret1106  %x = call <8 x i32> @llvm.vp.mul.nxv8i32(<8 x i32> %a, <8 x i32> %b, <8 x i1> splat (i1 -1), i32 %evl)1107  %y = call <8 x i32> @llvm.vp.sub.nxv8i32(<8 x i32> %c, <8 x i32> %x, <8 x i1> splat (i1 -1), i32 %evl)1108  %u = call <8 x i32> @llvm.vp.merge.nxv8i32(<8 x i1> %m, <8 x i32> %y, <8 x i32> %c, i32 %evl)1109  ret <8 x i32> %u1110}1111 1112define <8 x i32> @vnmsac_vv_nxv8i32_unmasked(<8 x i32> %a, <8 x i32> %b, <8 x i32> %c,  <8 x i1> %m, i32 zeroext %evl) {1113; CHECK-LABEL: vnmsac_vv_nxv8i32_unmasked:1114; CHECK:       # %bb.0:1115; CHECK-NEXT:    vsetvli zero, a0, e32, m2, tu, ma1116; CHECK-NEXT:    vnmsac.vv v12, v8, v101117; CHECK-NEXT:    vmv2r.v v8, v121118; CHECK-NEXT:    ret1119  %x = call <8 x i32> @llvm.vp.mul.nxv8i32(<8 x i32> %a, <8 x i32> %b, <8 x i1> splat (i1 -1), i32 %evl)1120  %y = call <8 x i32> @llvm.vp.sub.nxv8i32(<8 x i32> %c, <8 x i32> %x, <8 x i1> splat (i1 -1), i32 %evl)1121  %u = call <8 x i32> @llvm.vp.merge.nxv8i32(<8 x i1> splat (i1 -1), <8 x i32> %y, <8 x i32> %c, i32 %evl)1122  ret <8 x i32> %u1123}1124 1125define <8 x i32> @vnmsac_vx_nxv8i32(<8 x i32> %a, i32 %b, <8 x i32> %c,  <8 x i1> %m, i32 zeroext %evl) {1126; CHECK-LABEL: vnmsac_vx_nxv8i32:1127; CHECK:       # %bb.0:1128; CHECK-NEXT:    vsetvli zero, a1, e32, m2, tu, mu1129; CHECK-NEXT:    vnmsac.vx v10, a0, v8, v0.t1130; CHECK-NEXT:    vmv2r.v v8, v101131; CHECK-NEXT:    ret1132  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 01133  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer1134  %x = call <8 x i32> @llvm.vp.mul.nxv8i32(<8 x i32> %a, <8 x i32> %vb, <8 x i1> splat (i1 -1), i32 %evl)1135  %y = call <8 x i32> @llvm.vp.sub.nxv8i32(<8 x i32> %c, <8 x i32> %x, <8 x i1> splat (i1 -1), i32 %evl)1136  %u = call <8 x i32> @llvm.vp.merge.nxv8i32(<8 x i1> %m, <8 x i32> %y, <8 x i32> %c, i32 %evl)1137  ret <8 x i32> %u1138}1139 1140define <8 x i32> @vnmsac_vx_nxv8i32_unmasked(<8 x i32> %a, i32 %b, <8 x i32> %c,  <8 x i1> %m, i32 zeroext %evl) {1141; CHECK-LABEL: vnmsac_vx_nxv8i32_unmasked:1142; CHECK:       # %bb.0:1143; CHECK-NEXT:    vsetvli zero, a1, e32, m2, tu, ma1144; CHECK-NEXT:    vnmsac.vx v10, a0, v81145; CHECK-NEXT:    vmv2r.v v8, v101146; CHECK-NEXT:    ret1147  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 01148  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer1149  %x = call <8 x i32> @llvm.vp.mul.nxv8i32(<8 x i32> %a, <8 x i32> %vb, <8 x i1> splat (i1 -1), i32 %evl)1150  %y = call <8 x i32> @llvm.vp.sub.nxv8i32(<8 x i32> %c, <8 x i32> %x, <8 x i1> splat (i1 -1), i32 %evl)1151  %u = call <8 x i32> @llvm.vp.merge.nxv8i32(<8 x i1> splat (i1 -1), <8 x i32> %y, <8 x i32> %c, i32 %evl)1152  ret <8 x i32> %u1153}1154 1155define <8 x i32> @vnmsac_vv_nxv8i32_ta(<8 x i32> %a, <8 x i32> %b, <8 x i32> %c,  <8 x i1> %m, i32 zeroext %evl) {1156; CHECK-LABEL: vnmsac_vv_nxv8i32_ta:1157; CHECK:       # %bb.0:1158; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, mu1159; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t1160; CHECK-NEXT:    vmv.v.v v8, v121161; CHECK-NEXT:    ret1162  %x = call <8 x i32> @llvm.vp.mul.nxv8i32(<8 x i32> %a, <8 x i32> %b, <8 x i1> splat (i1 -1), i32 %evl)1163  %y = call <8 x i32> @llvm.vp.sub.nxv8i32(<8 x i32> %c, <8 x i32> %x, <8 x i1> splat (i1 -1), i32 %evl)1164  %u = call <8 x i32> @llvm.vp.select.nxv8i32(<8 x i1> %m, <8 x i32> %y, <8 x i32> %c, i32 %evl)1165  ret <8 x i32> %u1166}1167 1168define <8 x i32> @vnmsac_vx_nxv8i32_ta(<8 x i32> %a, i32 %b, <8 x i32> %c,  <8 x i1> %m, i32 zeroext %evl) {1169; CHECK-LABEL: vnmsac_vx_nxv8i32_ta:1170; CHECK:       # %bb.0:1171; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, mu1172; CHECK-NEXT:    vnmsac.vx v10, a0, v8, v0.t1173; CHECK-NEXT:    vmv.v.v v8, v101174; CHECK-NEXT:    ret1175  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 01176  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer1177  %x = call <8 x i32> @llvm.vp.mul.nxv8i32(<8 x i32> %a, <8 x i32> %vb, <8 x i1> splat (i1 -1), i32 %evl)1178  %y = call <8 x i32> @llvm.vp.sub.nxv8i32(<8 x i32> %c, <8 x i32> %x, <8 x i1> splat (i1 -1), i32 %evl)1179  %u = call <8 x i32> @llvm.vp.select.nxv8i32(<8 x i1> %m, <8 x i32> %y, <8 x i32> %c, i32 %evl)1180  ret <8 x i32> %u1181}1182 1183define <16 x i32> @vnmsac_vv_nxv16i32(<16 x i32> %a, <16 x i32> %b, <16 x i32> %c,  <16 x i1> %m, i32 zeroext %evl) {1184; CHECK-LABEL: vnmsac_vv_nxv16i32:1185; CHECK:       # %bb.0:1186; CHECK-NEXT:    vsetvli zero, a0, e32, m4, tu, mu1187; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t1188; CHECK-NEXT:    vmv4r.v v8, v161189; CHECK-NEXT:    ret1190  %x = call <16 x i32> @llvm.vp.mul.nxv16i32(<16 x i32> %a, <16 x i32> %b, <16 x i1> splat (i1 -1), i32 %evl)1191  %y = call <16 x i32> @llvm.vp.sub.nxv16i32(<16 x i32> %c, <16 x i32> %x, <16 x i1> splat (i1 -1), i32 %evl)1192  %u = call <16 x i32> @llvm.vp.merge.nxv16i32(<16 x i1> %m, <16 x i32> %y, <16 x i32> %c, i32 %evl)1193  ret <16 x i32> %u1194}1195 1196define <16 x i32> @vnmsac_vv_nxv16i32_unmasked(<16 x i32> %a, <16 x i32> %b, <16 x i32> %c,  <16 x i1> %m, i32 zeroext %evl) {1197; CHECK-LABEL: vnmsac_vv_nxv16i32_unmasked:1198; CHECK:       # %bb.0:1199; CHECK-NEXT:    vsetvli zero, a0, e32, m4, tu, ma1200; CHECK-NEXT:    vnmsac.vv v16, v8, v121201; CHECK-NEXT:    vmv4r.v v8, v161202; CHECK-NEXT:    ret1203  %x = call <16 x i32> @llvm.vp.mul.nxv16i32(<16 x i32> %a, <16 x i32> %b, <16 x i1> splat (i1 -1), i32 %evl)1204  %y = call <16 x i32> @llvm.vp.sub.nxv16i32(<16 x i32> %c, <16 x i32> %x, <16 x i1> splat (i1 -1), i32 %evl)1205  %u = call <16 x i32> @llvm.vp.merge.nxv16i32(<16 x i1> splat (i1 -1), <16 x i32> %y, <16 x i32> %c, i32 %evl)1206  ret <16 x i32> %u1207}1208 1209define <16 x i32> @vnmsac_vx_nxv16i32(<16 x i32> %a, i32 %b, <16 x i32> %c,  <16 x i1> %m, i32 zeroext %evl) {1210; CHECK-LABEL: vnmsac_vx_nxv16i32:1211; CHECK:       # %bb.0:1212; CHECK-NEXT:    vsetvli zero, a1, e32, m4, tu, mu1213; CHECK-NEXT:    vnmsac.vx v12, a0, v8, v0.t1214; CHECK-NEXT:    vmv4r.v v8, v121215; CHECK-NEXT:    ret1216  %elt.head = insertelement <16 x i32> poison, i32 %b, i32 01217  %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer1218  %x = call <16 x i32> @llvm.vp.mul.nxv16i32(<16 x i32> %a, <16 x i32> %vb, <16 x i1> splat (i1 -1), i32 %evl)1219  %y = call <16 x i32> @llvm.vp.sub.nxv16i32(<16 x i32> %c, <16 x i32> %x, <16 x i1> splat (i1 -1), i32 %evl)1220  %u = call <16 x i32> @llvm.vp.merge.nxv16i32(<16 x i1> %m, <16 x i32> %y, <16 x i32> %c, i32 %evl)1221  ret <16 x i32> %u1222}1223 1224define <16 x i32> @vnmsac_vx_nxv16i32_unmasked(<16 x i32> %a, i32 %b, <16 x i32> %c,  <16 x i1> %m, i32 zeroext %evl) {1225; CHECK-LABEL: vnmsac_vx_nxv16i32_unmasked:1226; CHECK:       # %bb.0:1227; CHECK-NEXT:    vsetvli zero, a1, e32, m4, tu, ma1228; CHECK-NEXT:    vnmsac.vx v12, a0, v81229; CHECK-NEXT:    vmv4r.v v8, v121230; CHECK-NEXT:    ret1231  %elt.head = insertelement <16 x i32> poison, i32 %b, i32 01232  %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer1233  %x = call <16 x i32> @llvm.vp.mul.nxv16i32(<16 x i32> %a, <16 x i32> %vb, <16 x i1> splat (i1 -1), i32 %evl)1234  %y = call <16 x i32> @llvm.vp.sub.nxv16i32(<16 x i32> %c, <16 x i32> %x, <16 x i1> splat (i1 -1), i32 %evl)1235  %u = call <16 x i32> @llvm.vp.merge.nxv16i32(<16 x i1> splat (i1 -1), <16 x i32> %y, <16 x i32> %c, i32 %evl)1236  ret <16 x i32> %u1237}1238 1239define <16 x i32> @vnmsac_vv_nxv16i32_ta(<16 x i32> %a, <16 x i32> %b, <16 x i32> %c,  <16 x i1> %m, i32 zeroext %evl) {1240; CHECK-LABEL: vnmsac_vv_nxv16i32_ta:1241; CHECK:       # %bb.0:1242; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, mu1243; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t1244; CHECK-NEXT:    vmv.v.v v8, v161245; CHECK-NEXT:    ret1246  %x = call <16 x i32> @llvm.vp.mul.nxv16i32(<16 x i32> %a, <16 x i32> %b, <16 x i1> splat (i1 -1), i32 %evl)1247  %y = call <16 x i32> @llvm.vp.sub.nxv16i32(<16 x i32> %c, <16 x i32> %x, <16 x i1> splat (i1 -1), i32 %evl)1248  %u = call <16 x i32> @llvm.vp.select.nxv16i32(<16 x i1> %m, <16 x i32> %y, <16 x i32> %c, i32 %evl)1249  ret <16 x i32> %u1250}1251 1252define <16 x i32> @vnmsac_vx_nxv16i32_ta(<16 x i32> %a, i32 %b, <16 x i32> %c,  <16 x i1> %m, i32 zeroext %evl) {1253; CHECK-LABEL: vnmsac_vx_nxv16i32_ta:1254; CHECK:       # %bb.0:1255; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, mu1256; CHECK-NEXT:    vnmsac.vx v12, a0, v8, v0.t1257; CHECK-NEXT:    vmv.v.v v8, v121258; CHECK-NEXT:    ret1259  %elt.head = insertelement <16 x i32> poison, i32 %b, i32 01260  %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer1261  %x = call <16 x i32> @llvm.vp.mul.nxv16i32(<16 x i32> %a, <16 x i32> %vb, <16 x i1> splat (i1 -1), i32 %evl)1262  %y = call <16 x i32> @llvm.vp.sub.nxv16i32(<16 x i32> %c, <16 x i32> %x, <16 x i1> splat (i1 -1), i32 %evl)1263  %u = call <16 x i32> @llvm.vp.select.nxv16i32(<16 x i1> %m, <16 x i32> %y, <16 x i32> %c, i32 %evl)1264  ret <16 x i32> %u1265}1266 1267define <2 x i64> @vnmsac_vv_nxv2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c,  <2 x i1> %m, i32 zeroext %evl) {1268; CHECK-LABEL: vnmsac_vv_nxv2i64:1269; CHECK:       # %bb.0:1270; CHECK-NEXT:    vsetvli zero, a0, e64, m1, tu, mu1271; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t1272; CHECK-NEXT:    vmv1r.v v8, v101273; CHECK-NEXT:    ret1274  %x = call <2 x i64> @llvm.vp.mul.nxv2i64(<2 x i64> %a, <2 x i64> %b, <2 x i1> splat (i1 -1), i32 %evl)1275  %y = call <2 x i64> @llvm.vp.sub.nxv2i64(<2 x i64> %c, <2 x i64> %x, <2 x i1> splat (i1 -1), i32 %evl)1276  %u = call <2 x i64> @llvm.vp.merge.nxv2i64(<2 x i1> %m, <2 x i64> %y, <2 x i64> %c, i32 %evl)1277  ret <2 x i64> %u1278}1279 1280define <2 x i64> @vnmsac_vv_nxv2i64_unmasked(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c,  <2 x i1> %m, i32 zeroext %evl) {1281; CHECK-LABEL: vnmsac_vv_nxv2i64_unmasked:1282; CHECK:       # %bb.0:1283; CHECK-NEXT:    vsetvli zero, a0, e64, m1, tu, ma1284; CHECK-NEXT:    vnmsac.vv v10, v8, v91285; CHECK-NEXT:    vmv1r.v v8, v101286; CHECK-NEXT:    ret1287  %x = call <2 x i64> @llvm.vp.mul.nxv2i64(<2 x i64> %a, <2 x i64> %b, <2 x i1> splat (i1 -1), i32 %evl)1288  %y = call <2 x i64> @llvm.vp.sub.nxv2i64(<2 x i64> %c, <2 x i64> %x, <2 x i1> splat (i1 -1), i32 %evl)1289  %u = call <2 x i64> @llvm.vp.merge.nxv2i64(<2 x i1> splat (i1 -1), <2 x i64> %y, <2 x i64> %c, i32 %evl)1290  ret <2 x i64> %u1291}1292 1293define <2 x i64> @vnmsac_vx_nxv2i64(<2 x i64> %a, i64 %b, <2 x i64> %c,  <2 x i1> %m, i32 zeroext %evl) {1294; RV32-LABEL: vnmsac_vx_nxv2i64:1295; RV32:       # %bb.0:1296; RV32-NEXT:    addi sp, sp, -161297; RV32-NEXT:    .cfi_def_cfa_offset 161298; RV32-NEXT:    sw a0, 8(sp)1299; RV32-NEXT:    sw a1, 12(sp)1300; RV32-NEXT:    addi a0, sp, 81301; RV32-NEXT:    vsetivli zero, 2, e64, m1, ta, ma1302; RV32-NEXT:    vlse64.v v10, (a0), zero1303; RV32-NEXT:    vsetvli zero, a2, e64, m1, tu, mu1304; RV32-NEXT:    vnmsac.vv v9, v8, v10, v0.t1305; RV32-NEXT:    vmv1r.v v8, v91306; RV32-NEXT:    addi sp, sp, 161307; RV32-NEXT:    .cfi_def_cfa_offset 01308; RV32-NEXT:    ret1309;1310; RV64-LABEL: vnmsac_vx_nxv2i64:1311; RV64:       # %bb.0:1312; RV64-NEXT:    vsetvli zero, a1, e64, m1, tu, mu1313; RV64-NEXT:    vnmsac.vx v9, a0, v8, v0.t1314; RV64-NEXT:    vmv1r.v v8, v91315; RV64-NEXT:    ret1316  %elt.head = insertelement <2 x i64> poison, i64 %b, i32 01317  %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer1318  %x = call <2 x i64> @llvm.vp.mul.nxv2i64(<2 x i64> %a, <2 x i64> %vb, <2 x i1> splat (i1 -1), i32 %evl)1319  %y = call <2 x i64> @llvm.vp.sub.nxv2i64(<2 x i64> %c, <2 x i64> %x, <2 x i1> splat (i1 -1), i32 %evl)1320  %u = call <2 x i64> @llvm.vp.merge.nxv2i64(<2 x i1> %m, <2 x i64> %y, <2 x i64> %c, i32 %evl)1321  ret <2 x i64> %u1322}1323 1324define <2 x i64> @vnmsac_vx_nxv2i64_unmasked(<2 x i64> %a, i64 %b, <2 x i64> %c,  <2 x i1> %m, i32 zeroext %evl) {1325; RV32-LABEL: vnmsac_vx_nxv2i64_unmasked:1326; RV32:       # %bb.0:1327; RV32-NEXT:    addi sp, sp, -161328; RV32-NEXT:    .cfi_def_cfa_offset 161329; RV32-NEXT:    sw a0, 8(sp)1330; RV32-NEXT:    sw a1, 12(sp)1331; RV32-NEXT:    addi a0, sp, 81332; RV32-NEXT:    vsetivli zero, 2, e64, m1, ta, ma1333; RV32-NEXT:    vlse64.v v10, (a0), zero1334; RV32-NEXT:    vsetvli zero, a2, e64, m1, tu, ma1335; RV32-NEXT:    vnmsac.vv v9, v8, v101336; RV32-NEXT:    vmv1r.v v8, v91337; RV32-NEXT:    addi sp, sp, 161338; RV32-NEXT:    .cfi_def_cfa_offset 01339; RV32-NEXT:    ret1340;1341; RV64-LABEL: vnmsac_vx_nxv2i64_unmasked:1342; RV64:       # %bb.0:1343; RV64-NEXT:    vsetvli zero, a1, e64, m1, tu, ma1344; RV64-NEXT:    vnmsac.vx v9, a0, v81345; RV64-NEXT:    vmv1r.v v8, v91346; RV64-NEXT:    ret1347  %elt.head = insertelement <2 x i64> poison, i64 %b, i32 01348  %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer1349  %x = call <2 x i64> @llvm.vp.mul.nxv2i64(<2 x i64> %a, <2 x i64> %vb, <2 x i1> splat (i1 -1), i32 %evl)1350  %y = call <2 x i64> @llvm.vp.sub.nxv2i64(<2 x i64> %c, <2 x i64> %x, <2 x i1> splat (i1 -1), i32 %evl)1351  %u = call <2 x i64> @llvm.vp.merge.nxv2i64(<2 x i1> splat (i1 -1), <2 x i64> %y, <2 x i64> %c, i32 %evl)1352  ret <2 x i64> %u1353}1354 1355define <2 x i64> @vnmsac_vv_nxv2i64_ta(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c,  <2 x i1> %m, i32 zeroext %evl) {1356; CHECK-LABEL: vnmsac_vv_nxv2i64_ta:1357; CHECK:       # %bb.0:1358; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, mu1359; CHECK-NEXT:    vnmsac.vv v10, v8, v9, v0.t1360; CHECK-NEXT:    vmv.v.v v8, v101361; CHECK-NEXT:    ret1362  %x = call <2 x i64> @llvm.vp.mul.nxv2i64(<2 x i64> %a, <2 x i64> %b, <2 x i1> splat (i1 -1), i32 %evl)1363  %y = call <2 x i64> @llvm.vp.sub.nxv2i64(<2 x i64> %c, <2 x i64> %x, <2 x i1> splat (i1 -1), i32 %evl)1364  %u = call <2 x i64> @llvm.vp.select.nxv2i64(<2 x i1> %m, <2 x i64> %y, <2 x i64> %c, i32 %evl)1365  ret <2 x i64> %u1366}1367 1368define <2 x i64> @vnmsac_vx_nxv2i64_ta(<2 x i64> %a, i64 %b, <2 x i64> %c,  <2 x i1> %m, i32 zeroext %evl) {1369; RV32-LABEL: vnmsac_vx_nxv2i64_ta:1370; RV32:       # %bb.0:1371; RV32-NEXT:    addi sp, sp, -161372; RV32-NEXT:    .cfi_def_cfa_offset 161373; RV32-NEXT:    sw a0, 8(sp)1374; RV32-NEXT:    sw a1, 12(sp)1375; RV32-NEXT:    addi a0, sp, 81376; RV32-NEXT:    vsetivli zero, 2, e64, m1, ta, ma1377; RV32-NEXT:    vlse64.v v10, (a0), zero1378; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, mu1379; RV32-NEXT:    vnmsac.vv v9, v8, v10, v0.t1380; RV32-NEXT:    vmv.v.v v8, v91381; RV32-NEXT:    addi sp, sp, 161382; RV32-NEXT:    .cfi_def_cfa_offset 01383; RV32-NEXT:    ret1384;1385; RV64-LABEL: vnmsac_vx_nxv2i64_ta:1386; RV64:       # %bb.0:1387; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, mu1388; RV64-NEXT:    vnmsac.vx v9, a0, v8, v0.t1389; RV64-NEXT:    vmv.v.v v8, v91390; RV64-NEXT:    ret1391  %elt.head = insertelement <2 x i64> poison, i64 %b, i32 01392  %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer1393  %x = call <2 x i64> @llvm.vp.mul.nxv2i64(<2 x i64> %a, <2 x i64> %vb, <2 x i1> splat (i1 -1), i32 %evl)1394  %y = call <2 x i64> @llvm.vp.sub.nxv2i64(<2 x i64> %c, <2 x i64> %x, <2 x i1> splat (i1 -1), i32 %evl)1395  %u = call <2 x i64> @llvm.vp.select.nxv2i64(<2 x i1> %m, <2 x i64> %y, <2 x i64> %c, i32 %evl)1396  ret <2 x i64> %u1397}1398 1399define <4 x i64> @vnmsac_vv_nxv4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c,  <4 x i1> %m, i32 zeroext %evl) {1400; CHECK-LABEL: vnmsac_vv_nxv4i64:1401; CHECK:       # %bb.0:1402; CHECK-NEXT:    vsetvli zero, a0, e64, m2, tu, mu1403; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t1404; CHECK-NEXT:    vmv2r.v v8, v121405; CHECK-NEXT:    ret1406  %x = call <4 x i64> @llvm.vp.mul.nxv4i64(<4 x i64> %a, <4 x i64> %b, <4 x i1> splat (i1 -1), i32 %evl)1407  %y = call <4 x i64> @llvm.vp.sub.nxv4i64(<4 x i64> %c, <4 x i64> %x, <4 x i1> splat (i1 -1), i32 %evl)1408  %u = call <4 x i64> @llvm.vp.merge.nxv4i64(<4 x i1> %m, <4 x i64> %y, <4 x i64> %c, i32 %evl)1409  ret <4 x i64> %u1410}1411 1412define <4 x i64> @vnmsac_vv_nxv4i64_unmasked(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c,  <4 x i1> %m, i32 zeroext %evl) {1413; CHECK-LABEL: vnmsac_vv_nxv4i64_unmasked:1414; CHECK:       # %bb.0:1415; CHECK-NEXT:    vsetvli zero, a0, e64, m2, tu, ma1416; CHECK-NEXT:    vnmsac.vv v12, v8, v101417; CHECK-NEXT:    vmv2r.v v8, v121418; CHECK-NEXT:    ret1419  %x = call <4 x i64> @llvm.vp.mul.nxv4i64(<4 x i64> %a, <4 x i64> %b, <4 x i1> splat (i1 -1), i32 %evl)1420  %y = call <4 x i64> @llvm.vp.sub.nxv4i64(<4 x i64> %c, <4 x i64> %x, <4 x i1> splat (i1 -1), i32 %evl)1421  %u = call <4 x i64> @llvm.vp.merge.nxv4i64(<4 x i1> splat (i1 -1), <4 x i64> %y, <4 x i64> %c, i32 %evl)1422  ret <4 x i64> %u1423}1424 1425define <4 x i64> @vnmsac_vx_nxv4i64(<4 x i64> %a, i64 %b, <4 x i64> %c,  <4 x i1> %m, i32 zeroext %evl) {1426; RV32-LABEL: vnmsac_vx_nxv4i64:1427; RV32:       # %bb.0:1428; RV32-NEXT:    addi sp, sp, -161429; RV32-NEXT:    .cfi_def_cfa_offset 161430; RV32-NEXT:    sw a0, 8(sp)1431; RV32-NEXT:    sw a1, 12(sp)1432; RV32-NEXT:    addi a0, sp, 81433; RV32-NEXT:    vsetivli zero, 4, e64, m2, ta, ma1434; RV32-NEXT:    vlse64.v v12, (a0), zero1435; RV32-NEXT:    vsetvli zero, a2, e64, m2, tu, mu1436; RV32-NEXT:    vnmsac.vv v10, v8, v12, v0.t1437; RV32-NEXT:    vmv2r.v v8, v101438; RV32-NEXT:    addi sp, sp, 161439; RV32-NEXT:    .cfi_def_cfa_offset 01440; RV32-NEXT:    ret1441;1442; RV64-LABEL: vnmsac_vx_nxv4i64:1443; RV64:       # %bb.0:1444; RV64-NEXT:    vsetvli zero, a1, e64, m2, tu, mu1445; RV64-NEXT:    vnmsac.vx v10, a0, v8, v0.t1446; RV64-NEXT:    vmv2r.v v8, v101447; RV64-NEXT:    ret1448  %elt.head = insertelement <4 x i64> poison, i64 %b, i32 01449  %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer1450  %x = call <4 x i64> @llvm.vp.mul.nxv4i64(<4 x i64> %a, <4 x i64> %vb, <4 x i1> splat (i1 -1), i32 %evl)1451  %y = call <4 x i64> @llvm.vp.sub.nxv4i64(<4 x i64> %c, <4 x i64> %x, <4 x i1> splat (i1 -1), i32 %evl)1452  %u = call <4 x i64> @llvm.vp.merge.nxv4i64(<4 x i1> %m, <4 x i64> %y, <4 x i64> %c, i32 %evl)1453  ret <4 x i64> %u1454}1455 1456define <4 x i64> @vnmsac_vx_nxv4i64_unmasked(<4 x i64> %a, i64 %b, <4 x i64> %c,  <4 x i1> %m, i32 zeroext %evl) {1457; RV32-LABEL: vnmsac_vx_nxv4i64_unmasked:1458; RV32:       # %bb.0:1459; RV32-NEXT:    addi sp, sp, -161460; RV32-NEXT:    .cfi_def_cfa_offset 161461; RV32-NEXT:    sw a0, 8(sp)1462; RV32-NEXT:    sw a1, 12(sp)1463; RV32-NEXT:    addi a0, sp, 81464; RV32-NEXT:    vsetivli zero, 4, e64, m2, ta, ma1465; RV32-NEXT:    vlse64.v v12, (a0), zero1466; RV32-NEXT:    vsetvli zero, a2, e64, m2, tu, ma1467; RV32-NEXT:    vnmsac.vv v10, v8, v121468; RV32-NEXT:    vmv2r.v v8, v101469; RV32-NEXT:    addi sp, sp, 161470; RV32-NEXT:    .cfi_def_cfa_offset 01471; RV32-NEXT:    ret1472;1473; RV64-LABEL: vnmsac_vx_nxv4i64_unmasked:1474; RV64:       # %bb.0:1475; RV64-NEXT:    vsetvli zero, a1, e64, m2, tu, ma1476; RV64-NEXT:    vnmsac.vx v10, a0, v81477; RV64-NEXT:    vmv2r.v v8, v101478; RV64-NEXT:    ret1479  %elt.head = insertelement <4 x i64> poison, i64 %b, i32 01480  %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer1481  %x = call <4 x i64> @llvm.vp.mul.nxv4i64(<4 x i64> %a, <4 x i64> %vb, <4 x i1> splat (i1 -1), i32 %evl)1482  %y = call <4 x i64> @llvm.vp.sub.nxv4i64(<4 x i64> %c, <4 x i64> %x, <4 x i1> splat (i1 -1), i32 %evl)1483  %u = call <4 x i64> @llvm.vp.merge.nxv4i64(<4 x i1> splat (i1 -1), <4 x i64> %y, <4 x i64> %c, i32 %evl)1484  ret <4 x i64> %u1485}1486 1487define <4 x i64> @vnmsac_vv_nxv4i64_ta(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c,  <4 x i1> %m, i32 zeroext %evl) {1488; CHECK-LABEL: vnmsac_vv_nxv4i64_ta:1489; CHECK:       # %bb.0:1490; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, mu1491; CHECK-NEXT:    vnmsac.vv v12, v8, v10, v0.t1492; CHECK-NEXT:    vmv.v.v v8, v121493; CHECK-NEXT:    ret1494  %x = call <4 x i64> @llvm.vp.mul.nxv4i64(<4 x i64> %a, <4 x i64> %b, <4 x i1> splat (i1 -1), i32 %evl)1495  %y = call <4 x i64> @llvm.vp.sub.nxv4i64(<4 x i64> %c, <4 x i64> %x, <4 x i1> splat (i1 -1), i32 %evl)1496  %u = call <4 x i64> @llvm.vp.select.nxv4i64(<4 x i1> %m, <4 x i64> %y, <4 x i64> %c, i32 %evl)1497  ret <4 x i64> %u1498}1499 1500define <4 x i64> @vnmsac_vx_nxv4i64_ta(<4 x i64> %a, i64 %b, <4 x i64> %c,  <4 x i1> %m, i32 zeroext %evl) {1501; RV32-LABEL: vnmsac_vx_nxv4i64_ta:1502; RV32:       # %bb.0:1503; RV32-NEXT:    addi sp, sp, -161504; RV32-NEXT:    .cfi_def_cfa_offset 161505; RV32-NEXT:    sw a0, 8(sp)1506; RV32-NEXT:    sw a1, 12(sp)1507; RV32-NEXT:    addi a0, sp, 81508; RV32-NEXT:    vsetivli zero, 4, e64, m2, ta, ma1509; RV32-NEXT:    vlse64.v v12, (a0), zero1510; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, mu1511; RV32-NEXT:    vnmsac.vv v10, v8, v12, v0.t1512; RV32-NEXT:    vmv.v.v v8, v101513; RV32-NEXT:    addi sp, sp, 161514; RV32-NEXT:    .cfi_def_cfa_offset 01515; RV32-NEXT:    ret1516;1517; RV64-LABEL: vnmsac_vx_nxv4i64_ta:1518; RV64:       # %bb.0:1519; RV64-NEXT:    vsetvli zero, a1, e64, m2, ta, mu1520; RV64-NEXT:    vnmsac.vx v10, a0, v8, v0.t1521; RV64-NEXT:    vmv.v.v v8, v101522; RV64-NEXT:    ret1523  %elt.head = insertelement <4 x i64> poison, i64 %b, i32 01524  %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer1525  %x = call <4 x i64> @llvm.vp.mul.nxv4i64(<4 x i64> %a, <4 x i64> %vb, <4 x i1> splat (i1 -1), i32 %evl)1526  %y = call <4 x i64> @llvm.vp.sub.nxv4i64(<4 x i64> %c, <4 x i64> %x, <4 x i1> splat (i1 -1), i32 %evl)1527  %u = call <4 x i64> @llvm.vp.select.nxv4i64(<4 x i1> %m, <4 x i64> %y, <4 x i64> %c, i32 %evl)1528  ret <4 x i64> %u1529}1530 1531define <8 x i64> @vnmsac_vv_nxv8i64(<8 x i64> %a, <8 x i64> %b, <8 x i64> %c,  <8 x i1> %m, i32 zeroext %evl) {1532; CHECK-LABEL: vnmsac_vv_nxv8i64:1533; CHECK:       # %bb.0:1534; CHECK-NEXT:    vsetvli zero, a0, e64, m4, tu, mu1535; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t1536; CHECK-NEXT:    vmv4r.v v8, v161537; CHECK-NEXT:    ret1538  %x = call <8 x i64> @llvm.vp.mul.nxv8i64(<8 x i64> %a, <8 x i64> %b, <8 x i1> splat (i1 -1), i32 %evl)1539  %y = call <8 x i64> @llvm.vp.sub.nxv8i64(<8 x i64> %c, <8 x i64> %x, <8 x i1> splat (i1 -1), i32 %evl)1540  %u = call <8 x i64> @llvm.vp.merge.nxv8i64(<8 x i1> %m, <8 x i64> %y, <8 x i64> %c, i32 %evl)1541  ret <8 x i64> %u1542}1543 1544define <8 x i64> @vnmsac_vv_nxv8i64_unmasked(<8 x i64> %a, <8 x i64> %b, <8 x i64> %c,  <8 x i1> %m, i32 zeroext %evl) {1545; CHECK-LABEL: vnmsac_vv_nxv8i64_unmasked:1546; CHECK:       # %bb.0:1547; CHECK-NEXT:    vsetvli zero, a0, e64, m4, tu, ma1548; CHECK-NEXT:    vnmsac.vv v16, v8, v121549; CHECK-NEXT:    vmv4r.v v8, v161550; CHECK-NEXT:    ret1551  %x = call <8 x i64> @llvm.vp.mul.nxv8i64(<8 x i64> %a, <8 x i64> %b, <8 x i1> splat (i1 -1), i32 %evl)1552  %y = call <8 x i64> @llvm.vp.sub.nxv8i64(<8 x i64> %c, <8 x i64> %x, <8 x i1> splat (i1 -1), i32 %evl)1553  %u = call <8 x i64> @llvm.vp.merge.nxv8i64(<8 x i1> splat (i1 -1), <8 x i64> %y, <8 x i64> %c, i32 %evl)1554  ret <8 x i64> %u1555}1556 1557define <8 x i64> @vnmsac_vx_nxv8i64(<8 x i64> %a, i64 %b, <8 x i64> %c,  <8 x i1> %m, i32 zeroext %evl) {1558; RV32-LABEL: vnmsac_vx_nxv8i64:1559; RV32:       # %bb.0:1560; RV32-NEXT:    addi sp, sp, -161561; RV32-NEXT:    .cfi_def_cfa_offset 161562; RV32-NEXT:    sw a0, 8(sp)1563; RV32-NEXT:    sw a1, 12(sp)1564; RV32-NEXT:    addi a0, sp, 81565; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma1566; RV32-NEXT:    vlse64.v v16, (a0), zero1567; RV32-NEXT:    vsetvli zero, a2, e64, m4, tu, mu1568; RV32-NEXT:    vnmsac.vv v12, v8, v16, v0.t1569; RV32-NEXT:    vmv4r.v v8, v121570; RV32-NEXT:    addi sp, sp, 161571; RV32-NEXT:    .cfi_def_cfa_offset 01572; RV32-NEXT:    ret1573;1574; RV64-LABEL: vnmsac_vx_nxv8i64:1575; RV64:       # %bb.0:1576; RV64-NEXT:    vsetvli zero, a1, e64, m4, tu, mu1577; RV64-NEXT:    vnmsac.vx v12, a0, v8, v0.t1578; RV64-NEXT:    vmv4r.v v8, v121579; RV64-NEXT:    ret1580  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 01581  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1582  %x = call <8 x i64> @llvm.vp.mul.nxv8i64(<8 x i64> %a, <8 x i64> %vb, <8 x i1> splat (i1 -1), i32 %evl)1583  %y = call <8 x i64> @llvm.vp.sub.nxv8i64(<8 x i64> %c, <8 x i64> %x, <8 x i1> splat (i1 -1), i32 %evl)1584  %u = call <8 x i64> @llvm.vp.merge.nxv8i64(<8 x i1> %m, <8 x i64> %y, <8 x i64> %c, i32 %evl)1585  ret <8 x i64> %u1586}1587 1588define <8 x i64> @vnmsac_vx_nxv8i64_unmasked(<8 x i64> %a, i64 %b, <8 x i64> %c,  <8 x i1> %m, i32 zeroext %evl) {1589; RV32-LABEL: vnmsac_vx_nxv8i64_unmasked:1590; RV32:       # %bb.0:1591; RV32-NEXT:    addi sp, sp, -161592; RV32-NEXT:    .cfi_def_cfa_offset 161593; RV32-NEXT:    sw a0, 8(sp)1594; RV32-NEXT:    sw a1, 12(sp)1595; RV32-NEXT:    addi a0, sp, 81596; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma1597; RV32-NEXT:    vlse64.v v16, (a0), zero1598; RV32-NEXT:    vsetvli zero, a2, e64, m4, tu, ma1599; RV32-NEXT:    vnmsac.vv v12, v8, v161600; RV32-NEXT:    vmv4r.v v8, v121601; RV32-NEXT:    addi sp, sp, 161602; RV32-NEXT:    .cfi_def_cfa_offset 01603; RV32-NEXT:    ret1604;1605; RV64-LABEL: vnmsac_vx_nxv8i64_unmasked:1606; RV64:       # %bb.0:1607; RV64-NEXT:    vsetvli zero, a1, e64, m4, tu, ma1608; RV64-NEXT:    vnmsac.vx v12, a0, v81609; RV64-NEXT:    vmv4r.v v8, v121610; RV64-NEXT:    ret1611  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 01612  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1613  %x = call <8 x i64> @llvm.vp.mul.nxv8i64(<8 x i64> %a, <8 x i64> %vb, <8 x i1> splat (i1 -1), i32 %evl)1614  %y = call <8 x i64> @llvm.vp.sub.nxv8i64(<8 x i64> %c, <8 x i64> %x, <8 x i1> splat (i1 -1), i32 %evl)1615  %u = call <8 x i64> @llvm.vp.merge.nxv8i64(<8 x i1> splat (i1 -1), <8 x i64> %y, <8 x i64> %c, i32 %evl)1616  ret <8 x i64> %u1617}1618 1619define <8 x i64> @vnmsac_vv_nxv8i64_ta(<8 x i64> %a, <8 x i64> %b, <8 x i64> %c,  <8 x i1> %m, i32 zeroext %evl) {1620; CHECK-LABEL: vnmsac_vv_nxv8i64_ta:1621; CHECK:       # %bb.0:1622; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, mu1623; CHECK-NEXT:    vnmsac.vv v16, v8, v12, v0.t1624; CHECK-NEXT:    vmv.v.v v8, v161625; CHECK-NEXT:    ret1626  %x = call <8 x i64> @llvm.vp.mul.nxv8i64(<8 x i64> %a, <8 x i64> %b, <8 x i1> splat (i1 -1), i32 %evl)1627  %y = call <8 x i64> @llvm.vp.sub.nxv8i64(<8 x i64> %c, <8 x i64> %x, <8 x i1> splat (i1 -1), i32 %evl)1628  %u = call <8 x i64> @llvm.vp.select.nxv8i64(<8 x i1> %m, <8 x i64> %y, <8 x i64> %c, i32 %evl)1629  ret <8 x i64> %u1630}1631 1632define <8 x i64> @vnmsac_vx_nxv8i64_ta(<8 x i64> %a, i64 %b, <8 x i64> %c,  <8 x i1> %m, i32 zeroext %evl) {1633; RV32-LABEL: vnmsac_vx_nxv8i64_ta:1634; RV32:       # %bb.0:1635; RV32-NEXT:    addi sp, sp, -161636; RV32-NEXT:    .cfi_def_cfa_offset 161637; RV32-NEXT:    sw a0, 8(sp)1638; RV32-NEXT:    sw a1, 12(sp)1639; RV32-NEXT:    addi a0, sp, 81640; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma1641; RV32-NEXT:    vlse64.v v16, (a0), zero1642; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, mu1643; RV32-NEXT:    vnmsac.vv v12, v8, v16, v0.t1644; RV32-NEXT:    vmv.v.v v8, v121645; RV32-NEXT:    addi sp, sp, 161646; RV32-NEXT:    .cfi_def_cfa_offset 01647; RV32-NEXT:    ret1648;1649; RV64-LABEL: vnmsac_vx_nxv8i64_ta:1650; RV64:       # %bb.0:1651; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, mu1652; RV64-NEXT:    vnmsac.vx v12, a0, v8, v0.t1653; RV64-NEXT:    vmv.v.v v8, v121654; RV64-NEXT:    ret1655  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 01656  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1657  %x = call <8 x i64> @llvm.vp.mul.nxv8i64(<8 x i64> %a, <8 x i64> %vb, <8 x i1> splat (i1 -1), i32 %evl)1658  %y = call <8 x i64> @llvm.vp.sub.nxv8i64(<8 x i64> %c, <8 x i64> %x, <8 x i1> splat (i1 -1), i32 %evl)1659  %u = call <8 x i64> @llvm.vp.select.nxv8i64(<8 x i1> %m, <8 x i64> %y, <8 x i64> %c, i32 %evl)1660  ret <8 x i64> %u1661}1662