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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <8 x i7> @vor_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vor_vv_v8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma11; CHECK-NEXT: vor.vv v8, v8, v9, v0.t12; CHECK-NEXT: ret13 %v = call <8 x i7> @llvm.vp.or.v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 %evl)14 ret <8 x i7> %v15}16 17define <2 x i8> @vor_vv_v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 zeroext %evl) {18; CHECK-LABEL: vor_vv_v2i8:19; CHECK: # %bb.0:20; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma21; CHECK-NEXT: vor.vv v8, v8, v9, v0.t22; CHECK-NEXT: ret23 %v = call <2 x i8> @llvm.vp.or.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 %evl)24 ret <2 x i8> %v25}26 27define <2 x i8> @vor_vv_v2i8_unmasked(<2 x i8> %va, <2 x i8> %b, i32 zeroext %evl) {28; CHECK-LABEL: vor_vv_v2i8_unmasked:29; CHECK: # %bb.0:30; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma31; CHECK-NEXT: vor.vv v8, v8, v932; CHECK-NEXT: ret33 %v = call <2 x i8> @llvm.vp.or.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> splat (i1 true), i32 %evl)34 ret <2 x i8> %v35}36 37define <2 x i8> @vor_vx_v2i8(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {38; CHECK-LABEL: vor_vx_v2i8:39; CHECK: # %bb.0:40; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma41; CHECK-NEXT: vor.vx v8, v8, a0, v0.t42; CHECK-NEXT: ret43 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 044 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer45 %v = call <2 x i8> @llvm.vp.or.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> %m, i32 %evl)46 ret <2 x i8> %v47}48 49define <2 x i8> @vor_vx_v2i8_unmasked(<2 x i8> %va, i8 %b, i32 zeroext %evl) {50; CHECK-LABEL: vor_vx_v2i8_unmasked:51; CHECK: # %bb.0:52; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma53; CHECK-NEXT: vor.vx v8, v8, a054; CHECK-NEXT: ret55 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 056 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer57 %v = call <2 x i8> @llvm.vp.or.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> splat (i1 true), i32 %evl)58 ret <2 x i8> %v59}60 61define <2 x i8> @vor_vi_v2i8(<2 x i8> %va, <2 x i1> %m, i32 zeroext %evl) {62; CHECK-LABEL: vor_vi_v2i8:63; CHECK: # %bb.0:64; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma65; CHECK-NEXT: vor.vi v8, v8, 5, v0.t66; CHECK-NEXT: ret67 %v = call <2 x i8> @llvm.vp.or.v2i8(<2 x i8> %va, <2 x i8> splat (i8 5), <2 x i1> %m, i32 %evl)68 ret <2 x i8> %v69}70 71define <2 x i8> @vor_vi_v2i8_unmasked(<2 x i8> %va, i32 zeroext %evl) {72; CHECK-LABEL: vor_vi_v2i8_unmasked:73; CHECK: # %bb.0:74; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma75; CHECK-NEXT: vor.vi v8, v8, 576; CHECK-NEXT: ret77 %v = call <2 x i8> @llvm.vp.or.v2i8(<2 x i8> %va, <2 x i8> splat (i8 5), <2 x i1> splat (i1 true), i32 %evl)78 ret <2 x i8> %v79}80 81define <4 x i8> @vor_vv_v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 zeroext %evl) {82; CHECK-LABEL: vor_vv_v4i8:83; CHECK: # %bb.0:84; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma85; CHECK-NEXT: vor.vv v8, v8, v9, v0.t86; CHECK-NEXT: ret87 %v = call <4 x i8> @llvm.vp.or.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 %evl)88 ret <4 x i8> %v89}90 91define <4 x i8> @vor_vv_v4i8_unmasked(<4 x i8> %va, <4 x i8> %b, i32 zeroext %evl) {92; CHECK-LABEL: vor_vv_v4i8_unmasked:93; CHECK: # %bb.0:94; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma95; CHECK-NEXT: vor.vv v8, v8, v996; CHECK-NEXT: ret97 %v = call <4 x i8> @llvm.vp.or.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> splat (i1 true), i32 %evl)98 ret <4 x i8> %v99}100 101define <4 x i8> @vor_vx_v4i8(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {102; CHECK-LABEL: vor_vx_v4i8:103; CHECK: # %bb.0:104; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma105; CHECK-NEXT: vor.vx v8, v8, a0, v0.t106; CHECK-NEXT: ret107 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0108 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer109 %v = call <4 x i8> @llvm.vp.or.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> %m, i32 %evl)110 ret <4 x i8> %v111}112 113define <4 x i8> @vor_vx_v4i8_commute(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {114; CHECK-LABEL: vor_vx_v4i8_commute:115; CHECK: # %bb.0:116; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma117; CHECK-NEXT: vor.vx v8, v8, a0, v0.t118; CHECK-NEXT: ret119 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0120 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer121 %v = call <4 x i8> @llvm.vp.or.v4i8(<4 x i8> %vb, <4 x i8> %va, <4 x i1> %m, i32 %evl)122 ret <4 x i8> %v123}124 125define <4 x i8> @vor_vx_v4i8_unmasked(<4 x i8> %va, i8 %b, i32 zeroext %evl) {126; CHECK-LABEL: vor_vx_v4i8_unmasked:127; CHECK: # %bb.0:128; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma129; CHECK-NEXT: vor.vx v8, v8, a0130; CHECK-NEXT: ret131 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0132 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer133 %v = call <4 x i8> @llvm.vp.or.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> splat (i1 true), i32 %evl)134 ret <4 x i8> %v135}136 137define <4 x i8> @vor_vi_v4i8(<4 x i8> %va, <4 x i1> %m, i32 zeroext %evl) {138; CHECK-LABEL: vor_vi_v4i8:139; CHECK: # %bb.0:140; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma141; CHECK-NEXT: vor.vi v8, v8, 5, v0.t142; CHECK-NEXT: ret143 %v = call <4 x i8> @llvm.vp.or.v4i8(<4 x i8> %va, <4 x i8> splat (i8 5), <4 x i1> %m, i32 %evl)144 ret <4 x i8> %v145}146 147define <4 x i8> @vor_vi_v4i8_unmasked(<4 x i8> %va, i32 zeroext %evl) {148; CHECK-LABEL: vor_vi_v4i8_unmasked:149; CHECK: # %bb.0:150; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma151; CHECK-NEXT: vor.vi v8, v8, 5152; CHECK-NEXT: ret153 %v = call <4 x i8> @llvm.vp.or.v4i8(<4 x i8> %va, <4 x i8> splat (i8 5), <4 x i1> splat (i1 true), i32 %evl)154 ret <4 x i8> %v155}156 157define <7 x i8> @vor_vv_v5i8(<7 x i8> %va, <7 x i8> %b, <7 x i1> %m, i32 zeroext %evl) {158; CHECK-LABEL: vor_vv_v5i8:159; CHECK: # %bb.0:160; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma161; CHECK-NEXT: vor.vv v8, v8, v9, v0.t162; CHECK-NEXT: ret163 %v = call <7 x i8> @llvm.vp.or.v5i8(<7 x i8> %va, <7 x i8> %b, <7 x i1> %m, i32 %evl)164 ret <7 x i8> %v165}166 167define <7 x i8> @vor_vv_v5i8_unmasked(<7 x i8> %va, <7 x i8> %b, i32 zeroext %evl) {168; CHECK-LABEL: vor_vv_v5i8_unmasked:169; CHECK: # %bb.0:170; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma171; CHECK-NEXT: vor.vv v8, v8, v9172; CHECK-NEXT: ret173 %v = call <7 x i8> @llvm.vp.or.v5i8(<7 x i8> %va, <7 x i8> %b, <7 x i1> splat (i1 true), i32 %evl)174 ret <7 x i8> %v175}176 177define <7 x i8> @vor_vx_v5i8(<7 x i8> %va, i8 %b, <7 x i1> %m, i32 zeroext %evl) {178; CHECK-LABEL: vor_vx_v5i8:179; CHECK: # %bb.0:180; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma181; CHECK-NEXT: vor.vx v8, v8, a0, v0.t182; CHECK-NEXT: ret183 %elt.head = insertelement <7 x i8> poison, i8 %b, i32 0184 %vb = shufflevector <7 x i8> %elt.head, <7 x i8> poison, <7 x i32> zeroinitializer185 %v = call <7 x i8> @llvm.vp.or.v5i8(<7 x i8> %va, <7 x i8> %vb, <7 x i1> %m, i32 %evl)186 ret <7 x i8> %v187}188 189define <7 x i8> @vor_vx_v5i8_unmasked(<7 x i8> %va, i8 %b, i32 zeroext %evl) {190; CHECK-LABEL: vor_vx_v5i8_unmasked:191; CHECK: # %bb.0:192; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma193; CHECK-NEXT: vor.vx v8, v8, a0194; CHECK-NEXT: ret195 %elt.head = insertelement <7 x i8> poison, i8 %b, i32 0196 %vb = shufflevector <7 x i8> %elt.head, <7 x i8> poison, <7 x i32> zeroinitializer197 %v = call <7 x i8> @llvm.vp.or.v5i8(<7 x i8> %va, <7 x i8> %vb, <7 x i1> splat (i1 true), i32 %evl)198 ret <7 x i8> %v199}200 201define <7 x i8> @vor_vi_v5i8(<7 x i8> %va, <7 x i1> %m, i32 zeroext %evl) {202; CHECK-LABEL: vor_vi_v5i8:203; CHECK: # %bb.0:204; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma205; CHECK-NEXT: vor.vi v8, v8, 5, v0.t206; CHECK-NEXT: ret207 %v = call <7 x i8> @llvm.vp.or.v5i8(<7 x i8> %va, <7 x i8> splat (i8 5), <7 x i1> %m, i32 %evl)208 ret <7 x i8> %v209}210 211define <7 x i8> @vor_vi_v5i8_unmasked(<7 x i8> %va, i32 zeroext %evl) {212; CHECK-LABEL: vor_vi_v5i8_unmasked:213; CHECK: # %bb.0:214; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma215; CHECK-NEXT: vor.vi v8, v8, 5216; CHECK-NEXT: ret217 %v = call <7 x i8> @llvm.vp.or.v5i8(<7 x i8> %va, <7 x i8> splat (i8 5), <7 x i1> splat (i1 true), i32 %evl)218 ret <7 x i8> %v219}220 221define <8 x i8> @vor_vv_v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 zeroext %evl) {222; CHECK-LABEL: vor_vv_v8i8:223; CHECK: # %bb.0:224; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma225; CHECK-NEXT: vor.vv v8, v8, v9, v0.t226; CHECK-NEXT: ret227 %v = call <8 x i8> @llvm.vp.or.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 %evl)228 ret <8 x i8> %v229}230 231define <8 x i8> @vor_vv_v8i8_unmasked(<8 x i8> %va, <8 x i8> %b, i32 zeroext %evl) {232; CHECK-LABEL: vor_vv_v8i8_unmasked:233; CHECK: # %bb.0:234; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma235; CHECK-NEXT: vor.vv v8, v8, v9236; CHECK-NEXT: ret237 %v = call <8 x i8> @llvm.vp.or.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> splat (i1 true), i32 %evl)238 ret <8 x i8> %v239}240 241define <8 x i8> @vor_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {242; CHECK-LABEL: vor_vx_v8i8:243; CHECK: # %bb.0:244; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma245; CHECK-NEXT: vor.vx v8, v8, a0, v0.t246; CHECK-NEXT: ret247 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0248 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer249 %v = call <8 x i8> @llvm.vp.or.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 %evl)250 ret <8 x i8> %v251}252 253define <8 x i8> @vor_vx_v8i8_unmasked(<8 x i8> %va, i8 %b, i32 zeroext %evl) {254; CHECK-LABEL: vor_vx_v8i8_unmasked:255; CHECK: # %bb.0:256; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma257; CHECK-NEXT: vor.vx v8, v8, a0258; CHECK-NEXT: ret259 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0260 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer261 %v = call <8 x i8> @llvm.vp.or.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> splat (i1 true), i32 %evl)262 ret <8 x i8> %v263}264 265define <8 x i8> @vor_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {266; CHECK-LABEL: vor_vi_v8i8:267; CHECK: # %bb.0:268; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma269; CHECK-NEXT: vor.vi v8, v8, 5, v0.t270; CHECK-NEXT: ret271 %v = call <8 x i8> @llvm.vp.or.v8i8(<8 x i8> %va, <8 x i8> splat (i8 5), <8 x i1> %m, i32 %evl)272 ret <8 x i8> %v273}274 275define <8 x i8> @vor_vi_v8i8_unmasked(<8 x i8> %va, i32 zeroext %evl) {276; CHECK-LABEL: vor_vi_v8i8_unmasked:277; CHECK: # %bb.0:278; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma279; CHECK-NEXT: vor.vi v8, v8, 5280; CHECK-NEXT: ret281 %v = call <8 x i8> @llvm.vp.or.v8i8(<8 x i8> %va, <8 x i8> splat (i8 5), <8 x i1> splat (i1 true), i32 %evl)282 ret <8 x i8> %v283}284 285define <16 x i8> @vor_vv_v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 zeroext %evl) {286; CHECK-LABEL: vor_vv_v16i8:287; CHECK: # %bb.0:288; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma289; CHECK-NEXT: vor.vv v8, v8, v9, v0.t290; CHECK-NEXT: ret291 %v = call <16 x i8> @llvm.vp.or.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 %evl)292 ret <16 x i8> %v293}294 295define <16 x i8> @vor_vv_v16i8_unmasked(<16 x i8> %va, <16 x i8> %b, i32 zeroext %evl) {296; CHECK-LABEL: vor_vv_v16i8_unmasked:297; CHECK: # %bb.0:298; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma299; CHECK-NEXT: vor.vv v8, v8, v9300; CHECK-NEXT: ret301 %v = call <16 x i8> @llvm.vp.or.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> splat (i1 true), i32 %evl)302 ret <16 x i8> %v303}304 305define <16 x i8> @vor_vx_v16i8(<16 x i8> %va, i8 %b, <16 x i1> %m, i32 zeroext %evl) {306; CHECK-LABEL: vor_vx_v16i8:307; CHECK: # %bb.0:308; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma309; CHECK-NEXT: vor.vx v8, v8, a0, v0.t310; CHECK-NEXT: ret311 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0312 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer313 %v = call <16 x i8> @llvm.vp.or.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> %m, i32 %evl)314 ret <16 x i8> %v315}316 317define <16 x i8> @vor_vx_v16i8_unmasked(<16 x i8> %va, i8 %b, i32 zeroext %evl) {318; CHECK-LABEL: vor_vx_v16i8_unmasked:319; CHECK: # %bb.0:320; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma321; CHECK-NEXT: vor.vx v8, v8, a0322; CHECK-NEXT: ret323 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0324 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer325 %v = call <16 x i8> @llvm.vp.or.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> splat (i1 true), i32 %evl)326 ret <16 x i8> %v327}328 329define <16 x i8> @vor_vi_v16i8(<16 x i8> %va, <16 x i1> %m, i32 zeroext %evl) {330; CHECK-LABEL: vor_vi_v16i8:331; CHECK: # %bb.0:332; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma333; CHECK-NEXT: vor.vi v8, v8, 5, v0.t334; CHECK-NEXT: ret335 %v = call <16 x i8> @llvm.vp.or.v16i8(<16 x i8> %va, <16 x i8> splat (i8 5), <16 x i1> %m, i32 %evl)336 ret <16 x i8> %v337}338 339define <16 x i8> @vor_vi_v16i8_unmasked(<16 x i8> %va, i32 zeroext %evl) {340; CHECK-LABEL: vor_vi_v16i8_unmasked:341; CHECK: # %bb.0:342; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma343; CHECK-NEXT: vor.vi v8, v8, 5344; CHECK-NEXT: ret345 %v = call <16 x i8> @llvm.vp.or.v16i8(<16 x i8> %va, <16 x i8> splat (i8 5), <16 x i1> splat (i1 true), i32 %evl)346 ret <16 x i8> %v347}348 349define <2 x i16> @vor_vv_v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 zeroext %evl) {350; CHECK-LABEL: vor_vv_v2i16:351; CHECK: # %bb.0:352; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma353; CHECK-NEXT: vor.vv v8, v8, v9, v0.t354; CHECK-NEXT: ret355 %v = call <2 x i16> @llvm.vp.or.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 %evl)356 ret <2 x i16> %v357}358 359define <2 x i16> @vor_vv_v2i16_unmasked(<2 x i16> %va, <2 x i16> %b, i32 zeroext %evl) {360; CHECK-LABEL: vor_vv_v2i16_unmasked:361; CHECK: # %bb.0:362; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma363; CHECK-NEXT: vor.vv v8, v8, v9364; CHECK-NEXT: ret365 %v = call <2 x i16> @llvm.vp.or.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> splat (i1 true), i32 %evl)366 ret <2 x i16> %v367}368 369define <2 x i16> @vor_vx_v2i16(<2 x i16> %va, i16 %b, <2 x i1> %m, i32 zeroext %evl) {370; CHECK-LABEL: vor_vx_v2i16:371; CHECK: # %bb.0:372; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma373; CHECK-NEXT: vor.vx v8, v8, a0, v0.t374; CHECK-NEXT: ret375 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0376 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer377 %v = call <2 x i16> @llvm.vp.or.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> %m, i32 %evl)378 ret <2 x i16> %v379}380 381define <2 x i16> @vor_vx_v2i16_unmasked(<2 x i16> %va, i16 %b, i32 zeroext %evl) {382; CHECK-LABEL: vor_vx_v2i16_unmasked:383; CHECK: # %bb.0:384; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma385; CHECK-NEXT: vor.vx v8, v8, a0386; CHECK-NEXT: ret387 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0388 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer389 %v = call <2 x i16> @llvm.vp.or.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> splat (i1 true), i32 %evl)390 ret <2 x i16> %v391}392 393define <2 x i16> @vor_vi_v2i16(<2 x i16> %va, <2 x i1> %m, i32 zeroext %evl) {394; CHECK-LABEL: vor_vi_v2i16:395; CHECK: # %bb.0:396; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma397; CHECK-NEXT: vor.vi v8, v8, 5, v0.t398; CHECK-NEXT: ret399 %v = call <2 x i16> @llvm.vp.or.v2i16(<2 x i16> %va, <2 x i16> splat (i16 5), <2 x i1> %m, i32 %evl)400 ret <2 x i16> %v401}402 403define <2 x i16> @vor_vi_v2i16_unmasked(<2 x i16> %va, i32 zeroext %evl) {404; CHECK-LABEL: vor_vi_v2i16_unmasked:405; CHECK: # %bb.0:406; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma407; CHECK-NEXT: vor.vi v8, v8, 5408; CHECK-NEXT: ret409 %v = call <2 x i16> @llvm.vp.or.v2i16(<2 x i16> %va, <2 x i16> splat (i16 5), <2 x i1> splat (i1 true), i32 %evl)410 ret <2 x i16> %v411}412 413define <4 x i16> @vor_vv_v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 zeroext %evl) {414; CHECK-LABEL: vor_vv_v4i16:415; CHECK: # %bb.0:416; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma417; CHECK-NEXT: vor.vv v8, v8, v9, v0.t418; CHECK-NEXT: ret419 %v = call <4 x i16> @llvm.vp.or.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 %evl)420 ret <4 x i16> %v421}422 423define <4 x i16> @vor_vv_v4i16_unmasked(<4 x i16> %va, <4 x i16> %b, i32 zeroext %evl) {424; CHECK-LABEL: vor_vv_v4i16_unmasked:425; CHECK: # %bb.0:426; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma427; CHECK-NEXT: vor.vv v8, v8, v9428; CHECK-NEXT: ret429 %v = call <4 x i16> @llvm.vp.or.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> splat (i1 true), i32 %evl)430 ret <4 x i16> %v431}432 433define <4 x i16> @vor_vx_v4i16(<4 x i16> %va, i16 %b, <4 x i1> %m, i32 zeroext %evl) {434; CHECK-LABEL: vor_vx_v4i16:435; CHECK: # %bb.0:436; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma437; CHECK-NEXT: vor.vx v8, v8, a0, v0.t438; CHECK-NEXT: ret439 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0440 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer441 %v = call <4 x i16> @llvm.vp.or.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> %m, i32 %evl)442 ret <4 x i16> %v443}444 445define <4 x i16> @vor_vx_v4i16_unmasked(<4 x i16> %va, i16 %b, i32 zeroext %evl) {446; CHECK-LABEL: vor_vx_v4i16_unmasked:447; CHECK: # %bb.0:448; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma449; CHECK-NEXT: vor.vx v8, v8, a0450; CHECK-NEXT: ret451 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0452 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer453 %v = call <4 x i16> @llvm.vp.or.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> splat (i1 true), i32 %evl)454 ret <4 x i16> %v455}456 457define <4 x i16> @vor_vi_v4i16(<4 x i16> %va, <4 x i1> %m, i32 zeroext %evl) {458; CHECK-LABEL: vor_vi_v4i16:459; CHECK: # %bb.0:460; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma461; CHECK-NEXT: vor.vi v8, v8, 5, v0.t462; CHECK-NEXT: ret463 %v = call <4 x i16> @llvm.vp.or.v4i16(<4 x i16> %va, <4 x i16> splat (i16 5), <4 x i1> %m, i32 %evl)464 ret <4 x i16> %v465}466 467define <4 x i16> @vor_vi_v4i16_unmasked(<4 x i16> %va, i32 zeroext %evl) {468; CHECK-LABEL: vor_vi_v4i16_unmasked:469; CHECK: # %bb.0:470; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma471; CHECK-NEXT: vor.vi v8, v8, 5472; CHECK-NEXT: ret473 %v = call <4 x i16> @llvm.vp.or.v4i16(<4 x i16> %va, <4 x i16> splat (i16 5), <4 x i1> splat (i1 true), i32 %evl)474 ret <4 x i16> %v475}476 477define <8 x i16> @vor_vv_v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 zeroext %evl) {478; CHECK-LABEL: vor_vv_v8i16:479; CHECK: # %bb.0:480; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma481; CHECK-NEXT: vor.vv v8, v8, v9, v0.t482; CHECK-NEXT: ret483 %v = call <8 x i16> @llvm.vp.or.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 %evl)484 ret <8 x i16> %v485}486 487define <8 x i16> @vor_vv_v8i16_unmasked(<8 x i16> %va, <8 x i16> %b, i32 zeroext %evl) {488; CHECK-LABEL: vor_vv_v8i16_unmasked:489; CHECK: # %bb.0:490; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma491; CHECK-NEXT: vor.vv v8, v8, v9492; CHECK-NEXT: ret493 %v = call <8 x i16> @llvm.vp.or.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> splat (i1 true), i32 %evl)494 ret <8 x i16> %v495}496 497define <8 x i16> @vor_vx_v8i16(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {498; CHECK-LABEL: vor_vx_v8i16:499; CHECK: # %bb.0:500; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma501; CHECK-NEXT: vor.vx v8, v8, a0, v0.t502; CHECK-NEXT: ret503 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0504 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer505 %v = call <8 x i16> @llvm.vp.or.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> %m, i32 %evl)506 ret <8 x i16> %v507}508 509define <8 x i16> @vor_vx_v8i16_unmasked(<8 x i16> %va, i16 %b, i32 zeroext %evl) {510; CHECK-LABEL: vor_vx_v8i16_unmasked:511; CHECK: # %bb.0:512; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma513; CHECK-NEXT: vor.vx v8, v8, a0514; CHECK-NEXT: ret515 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0516 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer517 %v = call <8 x i16> @llvm.vp.or.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> splat (i1 true), i32 %evl)518 ret <8 x i16> %v519}520 521define <8 x i16> @vor_vi_v8i16(<8 x i16> %va, <8 x i1> %m, i32 zeroext %evl) {522; CHECK-LABEL: vor_vi_v8i16:523; CHECK: # %bb.0:524; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma525; CHECK-NEXT: vor.vi v8, v8, 5, v0.t526; CHECK-NEXT: ret527 %v = call <8 x i16> @llvm.vp.or.v8i16(<8 x i16> %va, <8 x i16> splat (i16 5), <8 x i1> %m, i32 %evl)528 ret <8 x i16> %v529}530 531define <8 x i16> @vor_vi_v8i16_unmasked(<8 x i16> %va, i32 zeroext %evl) {532; CHECK-LABEL: vor_vi_v8i16_unmasked:533; CHECK: # %bb.0:534; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma535; CHECK-NEXT: vor.vi v8, v8, 5536; CHECK-NEXT: ret537 %v = call <8 x i16> @llvm.vp.or.v8i16(<8 x i16> %va, <8 x i16> splat (i16 5), <8 x i1> splat (i1 true), i32 %evl)538 ret <8 x i16> %v539}540 541define <16 x i16> @vor_vv_v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 zeroext %evl) {542; CHECK-LABEL: vor_vv_v16i16:543; CHECK: # %bb.0:544; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma545; CHECK-NEXT: vor.vv v8, v8, v10, v0.t546; CHECK-NEXT: ret547 %v = call <16 x i16> @llvm.vp.or.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 %evl)548 ret <16 x i16> %v549}550 551define <16 x i16> @vor_vv_v16i16_unmasked(<16 x i16> %va, <16 x i16> %b, i32 zeroext %evl) {552; CHECK-LABEL: vor_vv_v16i16_unmasked:553; CHECK: # %bb.0:554; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma555; CHECK-NEXT: vor.vv v8, v8, v10556; CHECK-NEXT: ret557 %v = call <16 x i16> @llvm.vp.or.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> splat (i1 true), i32 %evl)558 ret <16 x i16> %v559}560 561define <16 x i16> @vor_vx_v16i16(<16 x i16> %va, i16 %b, <16 x i1> %m, i32 zeroext %evl) {562; CHECK-LABEL: vor_vx_v16i16:563; CHECK: # %bb.0:564; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma565; CHECK-NEXT: vor.vx v8, v8, a0, v0.t566; CHECK-NEXT: ret567 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0568 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer569 %v = call <16 x i16> @llvm.vp.or.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> %m, i32 %evl)570 ret <16 x i16> %v571}572 573define <16 x i16> @vor_vx_v16i16_unmasked(<16 x i16> %va, i16 %b, i32 zeroext %evl) {574; CHECK-LABEL: vor_vx_v16i16_unmasked:575; CHECK: # %bb.0:576; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma577; CHECK-NEXT: vor.vx v8, v8, a0578; CHECK-NEXT: ret579 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0580 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer581 %v = call <16 x i16> @llvm.vp.or.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> splat (i1 true), i32 %evl)582 ret <16 x i16> %v583}584 585define <16 x i16> @vor_vi_v16i16(<16 x i16> %va, <16 x i1> %m, i32 zeroext %evl) {586; CHECK-LABEL: vor_vi_v16i16:587; CHECK: # %bb.0:588; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma589; CHECK-NEXT: vor.vi v8, v8, 5, v0.t590; CHECK-NEXT: ret591 %v = call <16 x i16> @llvm.vp.or.v16i16(<16 x i16> %va, <16 x i16> splat (i16 5), <16 x i1> %m, i32 %evl)592 ret <16 x i16> %v593}594 595define <16 x i16> @vor_vi_v16i16_unmasked(<16 x i16> %va, i32 zeroext %evl) {596; CHECK-LABEL: vor_vi_v16i16_unmasked:597; CHECK: # %bb.0:598; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma599; CHECK-NEXT: vor.vi v8, v8, 5600; CHECK-NEXT: ret601 %v = call <16 x i16> @llvm.vp.or.v16i16(<16 x i16> %va, <16 x i16> splat (i16 5), <16 x i1> splat (i1 true), i32 %evl)602 ret <16 x i16> %v603}604 605define <2 x i32> @vor_vv_v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 zeroext %evl) {606; CHECK-LABEL: vor_vv_v2i32:607; CHECK: # %bb.0:608; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma609; CHECK-NEXT: vor.vv v8, v8, v9, v0.t610; CHECK-NEXT: ret611 %v = call <2 x i32> @llvm.vp.or.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 %evl)612 ret <2 x i32> %v613}614 615define <2 x i32> @vor_vv_v2i32_unmasked(<2 x i32> %va, <2 x i32> %b, i32 zeroext %evl) {616; CHECK-LABEL: vor_vv_v2i32_unmasked:617; CHECK: # %bb.0:618; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma619; CHECK-NEXT: vor.vv v8, v8, v9620; CHECK-NEXT: ret621 %v = call <2 x i32> @llvm.vp.or.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> splat (i1 true), i32 %evl)622 ret <2 x i32> %v623}624 625define <2 x i32> @vor_vx_v2i32(<2 x i32> %va, i32 %b, <2 x i1> %m, i32 zeroext %evl) {626; CHECK-LABEL: vor_vx_v2i32:627; CHECK: # %bb.0:628; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma629; CHECK-NEXT: vor.vx v8, v8, a0, v0.t630; CHECK-NEXT: ret631 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0632 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer633 %v = call <2 x i32> @llvm.vp.or.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> %m, i32 %evl)634 ret <2 x i32> %v635}636 637define <2 x i32> @vor_vx_v2i32_unmasked(<2 x i32> %va, i32 %b, i32 zeroext %evl) {638; CHECK-LABEL: vor_vx_v2i32_unmasked:639; CHECK: # %bb.0:640; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma641; CHECK-NEXT: vor.vx v8, v8, a0642; CHECK-NEXT: ret643 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0644 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer645 %v = call <2 x i32> @llvm.vp.or.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> splat (i1 true), i32 %evl)646 ret <2 x i32> %v647}648 649define <2 x i32> @vor_vi_v2i32(<2 x i32> %va, <2 x i1> %m, i32 zeroext %evl) {650; CHECK-LABEL: vor_vi_v2i32:651; CHECK: # %bb.0:652; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma653; CHECK-NEXT: vor.vi v8, v8, 5, v0.t654; CHECK-NEXT: ret655 %v = call <2 x i32> @llvm.vp.or.v2i32(<2 x i32> %va, <2 x i32> splat (i32 5), <2 x i1> %m, i32 %evl)656 ret <2 x i32> %v657}658 659define <2 x i32> @vor_vi_v2i32_unmasked(<2 x i32> %va, i32 zeroext %evl) {660; CHECK-LABEL: vor_vi_v2i32_unmasked:661; CHECK: # %bb.0:662; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma663; CHECK-NEXT: vor.vi v8, v8, 5664; CHECK-NEXT: ret665 %v = call <2 x i32> @llvm.vp.or.v2i32(<2 x i32> %va, <2 x i32> splat (i32 5), <2 x i1> splat (i1 true), i32 %evl)666 ret <2 x i32> %v667}668 669define <4 x i32> @vor_vv_v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 zeroext %evl) {670; CHECK-LABEL: vor_vv_v4i32:671; CHECK: # %bb.0:672; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma673; CHECK-NEXT: vor.vv v8, v8, v9, v0.t674; CHECK-NEXT: ret675 %v = call <4 x i32> @llvm.vp.or.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 %evl)676 ret <4 x i32> %v677}678 679define <4 x i32> @vor_vv_v4i32_unmasked(<4 x i32> %va, <4 x i32> %b, i32 zeroext %evl) {680; CHECK-LABEL: vor_vv_v4i32_unmasked:681; CHECK: # %bb.0:682; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma683; CHECK-NEXT: vor.vv v8, v8, v9684; CHECK-NEXT: ret685 %v = call <4 x i32> @llvm.vp.or.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> splat (i1 true), i32 %evl)686 ret <4 x i32> %v687}688 689define <4 x i32> @vor_vx_v4i32(<4 x i32> %va, i32 %b, <4 x i1> %m, i32 zeroext %evl) {690; CHECK-LABEL: vor_vx_v4i32:691; CHECK: # %bb.0:692; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma693; CHECK-NEXT: vor.vx v8, v8, a0, v0.t694; CHECK-NEXT: ret695 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0696 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer697 %v = call <4 x i32> @llvm.vp.or.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> %m, i32 %evl)698 ret <4 x i32> %v699}700 701define <4 x i32> @vor_vx_v4i32_unmasked(<4 x i32> %va, i32 %b, i32 zeroext %evl) {702; CHECK-LABEL: vor_vx_v4i32_unmasked:703; CHECK: # %bb.0:704; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma705; CHECK-NEXT: vor.vx v8, v8, a0706; CHECK-NEXT: ret707 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0708 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer709 %v = call <4 x i32> @llvm.vp.or.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> splat (i1 true), i32 %evl)710 ret <4 x i32> %v711}712 713define <4 x i32> @vor_vi_v4i32(<4 x i32> %va, <4 x i1> %m, i32 zeroext %evl) {714; CHECK-LABEL: vor_vi_v4i32:715; CHECK: # %bb.0:716; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma717; CHECK-NEXT: vor.vi v8, v8, 5, v0.t718; CHECK-NEXT: ret719 %v = call <4 x i32> @llvm.vp.or.v4i32(<4 x i32> %va, <4 x i32> splat (i32 5), <4 x i1> %m, i32 %evl)720 ret <4 x i32> %v721}722 723define <4 x i32> @vor_vi_v4i32_unmasked(<4 x i32> %va, i32 zeroext %evl) {724; CHECK-LABEL: vor_vi_v4i32_unmasked:725; CHECK: # %bb.0:726; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma727; CHECK-NEXT: vor.vi v8, v8, 5728; CHECK-NEXT: ret729 %v = call <4 x i32> @llvm.vp.or.v4i32(<4 x i32> %va, <4 x i32> splat (i32 5), <4 x i1> splat (i1 true), i32 %evl)730 ret <4 x i32> %v731}732 733define <8 x i32> @vor_vv_v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 zeroext %evl) {734; CHECK-LABEL: vor_vv_v8i32:735; CHECK: # %bb.0:736; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma737; CHECK-NEXT: vor.vv v8, v8, v10, v0.t738; CHECK-NEXT: ret739 %v = call <8 x i32> @llvm.vp.or.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 %evl)740 ret <8 x i32> %v741}742 743define <8 x i32> @vor_vv_v8i32_unmasked(<8 x i32> %va, <8 x i32> %b, i32 zeroext %evl) {744; CHECK-LABEL: vor_vv_v8i32_unmasked:745; CHECK: # %bb.0:746; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma747; CHECK-NEXT: vor.vv v8, v8, v10748; CHECK-NEXT: ret749 %v = call <8 x i32> @llvm.vp.or.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> splat (i1 true), i32 %evl)750 ret <8 x i32> %v751}752 753define <8 x i32> @vor_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {754; CHECK-LABEL: vor_vx_v8i32:755; CHECK: # %bb.0:756; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma757; CHECK-NEXT: vor.vx v8, v8, a0, v0.t758; CHECK-NEXT: ret759 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0760 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer761 %v = call <8 x i32> @llvm.vp.or.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 %evl)762 ret <8 x i32> %v763}764 765define <8 x i32> @vor_vx_v8i32_unmasked(<8 x i32> %va, i32 %b, i32 zeroext %evl) {766; CHECK-LABEL: vor_vx_v8i32_unmasked:767; CHECK: # %bb.0:768; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma769; CHECK-NEXT: vor.vx v8, v8, a0770; CHECK-NEXT: ret771 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0772 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer773 %v = call <8 x i32> @llvm.vp.or.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> splat (i1 true), i32 %evl)774 ret <8 x i32> %v775}776 777define <8 x i32> @vor_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {778; CHECK-LABEL: vor_vi_v8i32:779; CHECK: # %bb.0:780; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma781; CHECK-NEXT: vor.vi v8, v8, 5, v0.t782; CHECK-NEXT: ret783 %v = call <8 x i32> @llvm.vp.or.v8i32(<8 x i32> %va, <8 x i32> splat (i32 5), <8 x i1> %m, i32 %evl)784 ret <8 x i32> %v785}786 787define <8 x i32> @vor_vi_v8i32_unmasked(<8 x i32> %va, i32 zeroext %evl) {788; CHECK-LABEL: vor_vi_v8i32_unmasked:789; CHECK: # %bb.0:790; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma791; CHECK-NEXT: vor.vi v8, v8, 5792; CHECK-NEXT: ret793 %v = call <8 x i32> @llvm.vp.or.v8i32(<8 x i32> %va, <8 x i32> splat (i32 5), <8 x i1> splat (i1 true), i32 %evl)794 ret <8 x i32> %v795}796 797define <16 x i32> @vor_vv_v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 zeroext %evl) {798; CHECK-LABEL: vor_vv_v16i32:799; CHECK: # %bb.0:800; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma801; CHECK-NEXT: vor.vv v8, v8, v12, v0.t802; CHECK-NEXT: ret803 %v = call <16 x i32> @llvm.vp.or.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 %evl)804 ret <16 x i32> %v805}806 807define <16 x i32> @vor_vv_v16i32_unmasked(<16 x i32> %va, <16 x i32> %b, i32 zeroext %evl) {808; CHECK-LABEL: vor_vv_v16i32_unmasked:809; CHECK: # %bb.0:810; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma811; CHECK-NEXT: vor.vv v8, v8, v12812; CHECK-NEXT: ret813 %v = call <16 x i32> @llvm.vp.or.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> splat (i1 true), i32 %evl)814 ret <16 x i32> %v815}816 817define <16 x i32> @vor_vx_v16i32(<16 x i32> %va, i32 %b, <16 x i1> %m, i32 zeroext %evl) {818; CHECK-LABEL: vor_vx_v16i32:819; CHECK: # %bb.0:820; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma821; CHECK-NEXT: vor.vx v8, v8, a0, v0.t822; CHECK-NEXT: ret823 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0824 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer825 %v = call <16 x i32> @llvm.vp.or.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> %m, i32 %evl)826 ret <16 x i32> %v827}828 829define <16 x i32> @vor_vx_v16i32_unmasked(<16 x i32> %va, i32 %b, i32 zeroext %evl) {830; CHECK-LABEL: vor_vx_v16i32_unmasked:831; CHECK: # %bb.0:832; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma833; CHECK-NEXT: vor.vx v8, v8, a0834; CHECK-NEXT: ret835 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0836 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer837 %v = call <16 x i32> @llvm.vp.or.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> splat (i1 true), i32 %evl)838 ret <16 x i32> %v839}840 841define <16 x i32> @vor_vi_v16i32(<16 x i32> %va, <16 x i1> %m, i32 zeroext %evl) {842; CHECK-LABEL: vor_vi_v16i32:843; CHECK: # %bb.0:844; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma845; CHECK-NEXT: vor.vi v8, v8, 5, v0.t846; CHECK-NEXT: ret847 %v = call <16 x i32> @llvm.vp.or.v16i32(<16 x i32> %va, <16 x i32> splat (i32 5), <16 x i1> %m, i32 %evl)848 ret <16 x i32> %v849}850 851define <16 x i32> @vor_vi_v16i32_unmasked(<16 x i32> %va, i32 zeroext %evl) {852; CHECK-LABEL: vor_vi_v16i32_unmasked:853; CHECK: # %bb.0:854; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma855; CHECK-NEXT: vor.vi v8, v8, 5856; CHECK-NEXT: ret857 %v = call <16 x i32> @llvm.vp.or.v16i32(<16 x i32> %va, <16 x i32> splat (i32 5), <16 x i1> splat (i1 true), i32 %evl)858 ret <16 x i32> %v859}860 861define <2 x i64> @vor_vv_v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 zeroext %evl) {862; CHECK-LABEL: vor_vv_v2i64:863; CHECK: # %bb.0:864; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma865; CHECK-NEXT: vor.vv v8, v8, v9, v0.t866; CHECK-NEXT: ret867 %v = call <2 x i64> @llvm.vp.or.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 %evl)868 ret <2 x i64> %v869}870 871define <2 x i64> @vor_vv_v2i64_unmasked(<2 x i64> %va, <2 x i64> %b, i32 zeroext %evl) {872; CHECK-LABEL: vor_vv_v2i64_unmasked:873; CHECK: # %bb.0:874; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma875; CHECK-NEXT: vor.vv v8, v8, v9876; CHECK-NEXT: ret877 %v = call <2 x i64> @llvm.vp.or.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> splat (i1 true), i32 %evl)878 ret <2 x i64> %v879}880 881define <2 x i64> @vor_vx_v2i64(<2 x i64> %va, i64 %b, <2 x i1> %m, i32 zeroext %evl) {882; RV32-LABEL: vor_vx_v2i64:883; RV32: # %bb.0:884; RV32-NEXT: addi sp, sp, -16885; RV32-NEXT: .cfi_def_cfa_offset 16886; RV32-NEXT: sw a0, 8(sp)887; RV32-NEXT: sw a1, 12(sp)888; RV32-NEXT: addi a0, sp, 8889; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma890; RV32-NEXT: vlse64.v v9, (a0), zero891; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma892; RV32-NEXT: vor.vv v8, v8, v9, v0.t893; RV32-NEXT: addi sp, sp, 16894; RV32-NEXT: .cfi_def_cfa_offset 0895; RV32-NEXT: ret896;897; RV64-LABEL: vor_vx_v2i64:898; RV64: # %bb.0:899; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma900; RV64-NEXT: vor.vx v8, v8, a0, v0.t901; RV64-NEXT: ret902 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0903 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer904 %v = call <2 x i64> @llvm.vp.or.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> %m, i32 %evl)905 ret <2 x i64> %v906}907 908define <2 x i64> @vor_vx_v2i64_unmasked(<2 x i64> %va, i64 %b, i32 zeroext %evl) {909; RV32-LABEL: vor_vx_v2i64_unmasked:910; RV32: # %bb.0:911; RV32-NEXT: addi sp, sp, -16912; RV32-NEXT: .cfi_def_cfa_offset 16913; RV32-NEXT: sw a0, 8(sp)914; RV32-NEXT: sw a1, 12(sp)915; RV32-NEXT: addi a0, sp, 8916; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma917; RV32-NEXT: vlse64.v v9, (a0), zero918; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma919; RV32-NEXT: vor.vv v8, v8, v9920; RV32-NEXT: addi sp, sp, 16921; RV32-NEXT: .cfi_def_cfa_offset 0922; RV32-NEXT: ret923;924; RV64-LABEL: vor_vx_v2i64_unmasked:925; RV64: # %bb.0:926; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma927; RV64-NEXT: vor.vx v8, v8, a0928; RV64-NEXT: ret929 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0930 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer931 %v = call <2 x i64> @llvm.vp.or.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> splat (i1 true), i32 %evl)932 ret <2 x i64> %v933}934 935define <2 x i64> @vor_vi_v2i64(<2 x i64> %va, <2 x i1> %m, i32 zeroext %evl) {936; CHECK-LABEL: vor_vi_v2i64:937; CHECK: # %bb.0:938; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma939; CHECK-NEXT: vor.vi v8, v8, 5, v0.t940; CHECK-NEXT: ret941 %v = call <2 x i64> @llvm.vp.or.v2i64(<2 x i64> %va, <2 x i64> splat (i64 5), <2 x i1> %m, i32 %evl)942 ret <2 x i64> %v943}944 945define <2 x i64> @vor_vi_v2i64_unmasked(<2 x i64> %va, i32 zeroext %evl) {946; CHECK-LABEL: vor_vi_v2i64_unmasked:947; CHECK: # %bb.0:948; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma949; CHECK-NEXT: vor.vi v8, v8, 5950; CHECK-NEXT: ret951 %v = call <2 x i64> @llvm.vp.or.v2i64(<2 x i64> %va, <2 x i64> splat (i64 5), <2 x i1> splat (i1 true), i32 %evl)952 ret <2 x i64> %v953}954 955define <4 x i64> @vor_vv_v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 zeroext %evl) {956; CHECK-LABEL: vor_vv_v4i64:957; CHECK: # %bb.0:958; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma959; CHECK-NEXT: vor.vv v8, v8, v10, v0.t960; CHECK-NEXT: ret961 %v = call <4 x i64> @llvm.vp.or.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 %evl)962 ret <4 x i64> %v963}964 965define <4 x i64> @vor_vv_v4i64_unmasked(<4 x i64> %va, <4 x i64> %b, i32 zeroext %evl) {966; CHECK-LABEL: vor_vv_v4i64_unmasked:967; CHECK: # %bb.0:968; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma969; CHECK-NEXT: vor.vv v8, v8, v10970; CHECK-NEXT: ret971 %v = call <4 x i64> @llvm.vp.or.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> splat (i1 true), i32 %evl)972 ret <4 x i64> %v973}974 975define <4 x i64> @vor_vx_v4i64(<4 x i64> %va, i64 %b, <4 x i1> %m, i32 zeroext %evl) {976; RV32-LABEL: vor_vx_v4i64:977; RV32: # %bb.0:978; RV32-NEXT: addi sp, sp, -16979; RV32-NEXT: .cfi_def_cfa_offset 16980; RV32-NEXT: sw a0, 8(sp)981; RV32-NEXT: sw a1, 12(sp)982; RV32-NEXT: addi a0, sp, 8983; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma984; RV32-NEXT: vlse64.v v10, (a0), zero985; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma986; RV32-NEXT: vor.vv v8, v8, v10, v0.t987; RV32-NEXT: addi sp, sp, 16988; RV32-NEXT: .cfi_def_cfa_offset 0989; RV32-NEXT: ret990;991; RV64-LABEL: vor_vx_v4i64:992; RV64: # %bb.0:993; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma994; RV64-NEXT: vor.vx v8, v8, a0, v0.t995; RV64-NEXT: ret996 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0997 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer998 %v = call <4 x i64> @llvm.vp.or.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> %m, i32 %evl)999 ret <4 x i64> %v1000}1001 1002define <4 x i64> @vor_vx_v4i64_unmasked(<4 x i64> %va, i64 %b, i32 zeroext %evl) {1003; RV32-LABEL: vor_vx_v4i64_unmasked:1004; RV32: # %bb.0:1005; RV32-NEXT: addi sp, sp, -161006; RV32-NEXT: .cfi_def_cfa_offset 161007; RV32-NEXT: sw a0, 8(sp)1008; RV32-NEXT: sw a1, 12(sp)1009; RV32-NEXT: addi a0, sp, 81010; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma1011; RV32-NEXT: vlse64.v v10, (a0), zero1012; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1013; RV32-NEXT: vor.vv v8, v8, v101014; RV32-NEXT: addi sp, sp, 161015; RV32-NEXT: .cfi_def_cfa_offset 01016; RV32-NEXT: ret1017;1018; RV64-LABEL: vor_vx_v4i64_unmasked:1019; RV64: # %bb.0:1020; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1021; RV64-NEXT: vor.vx v8, v8, a01022; RV64-NEXT: ret1023 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 01024 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer1025 %v = call <4 x i64> @llvm.vp.or.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> splat (i1 true), i32 %evl)1026 ret <4 x i64> %v1027}1028 1029define <4 x i64> @vor_vi_v4i64(<4 x i64> %va, <4 x i1> %m, i32 zeroext %evl) {1030; CHECK-LABEL: vor_vi_v4i64:1031; CHECK: # %bb.0:1032; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1033; CHECK-NEXT: vor.vi v8, v8, 5, v0.t1034; CHECK-NEXT: ret1035 %v = call <4 x i64> @llvm.vp.or.v4i64(<4 x i64> %va, <4 x i64> splat (i64 5), <4 x i1> %m, i32 %evl)1036 ret <4 x i64> %v1037}1038 1039define <4 x i64> @vor_vi_v4i64_unmasked(<4 x i64> %va, i32 zeroext %evl) {1040; CHECK-LABEL: vor_vi_v4i64_unmasked:1041; CHECK: # %bb.0:1042; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1043; CHECK-NEXT: vor.vi v8, v8, 51044; CHECK-NEXT: ret1045 %v = call <4 x i64> @llvm.vp.or.v4i64(<4 x i64> %va, <4 x i64> splat (i64 5), <4 x i1> splat (i1 true), i32 %evl)1046 ret <4 x i64> %v1047}1048 1049define <8 x i64> @vor_vv_v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 zeroext %evl) {1050; CHECK-LABEL: vor_vv_v8i64:1051; CHECK: # %bb.0:1052; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1053; CHECK-NEXT: vor.vv v8, v8, v12, v0.t1054; CHECK-NEXT: ret1055 %v = call <8 x i64> @llvm.vp.or.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 %evl)1056 ret <8 x i64> %v1057}1058 1059define <8 x i64> @vor_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %b, i32 zeroext %evl) {1060; CHECK-LABEL: vor_vv_v8i64_unmasked:1061; CHECK: # %bb.0:1062; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1063; CHECK-NEXT: vor.vv v8, v8, v121064; CHECK-NEXT: ret1065 %v = call <8 x i64> @llvm.vp.or.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> splat (i1 true), i32 %evl)1066 ret <8 x i64> %v1067}1068 1069define <8 x i64> @vor_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {1070; RV32-LABEL: vor_vx_v8i64:1071; RV32: # %bb.0:1072; RV32-NEXT: addi sp, sp, -161073; RV32-NEXT: .cfi_def_cfa_offset 161074; RV32-NEXT: sw a0, 8(sp)1075; RV32-NEXT: sw a1, 12(sp)1076; RV32-NEXT: addi a0, sp, 81077; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma1078; RV32-NEXT: vlse64.v v12, (a0), zero1079; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1080; RV32-NEXT: vor.vv v8, v8, v12, v0.t1081; RV32-NEXT: addi sp, sp, 161082; RV32-NEXT: .cfi_def_cfa_offset 01083; RV32-NEXT: ret1084;1085; RV64-LABEL: vor_vx_v8i64:1086; RV64: # %bb.0:1087; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1088; RV64-NEXT: vor.vx v8, v8, a0, v0.t1089; RV64-NEXT: ret1090 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 01091 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1092 %v = call <8 x i64> @llvm.vp.or.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1093 ret <8 x i64> %v1094}1095 1096define <8 x i64> @vor_vx_v8i64_unmasked(<8 x i64> %va, i64 %b, i32 zeroext %evl) {1097; RV32-LABEL: vor_vx_v8i64_unmasked:1098; RV32: # %bb.0:1099; RV32-NEXT: addi sp, sp, -161100; RV32-NEXT: .cfi_def_cfa_offset 161101; RV32-NEXT: sw a0, 8(sp)1102; RV32-NEXT: sw a1, 12(sp)1103; RV32-NEXT: addi a0, sp, 81104; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma1105; RV32-NEXT: vlse64.v v12, (a0), zero1106; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1107; RV32-NEXT: vor.vv v8, v8, v121108; RV32-NEXT: addi sp, sp, 161109; RV32-NEXT: .cfi_def_cfa_offset 01110; RV32-NEXT: ret1111;1112; RV64-LABEL: vor_vx_v8i64_unmasked:1113; RV64: # %bb.0:1114; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1115; RV64-NEXT: vor.vx v8, v8, a01116; RV64-NEXT: ret1117 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 01118 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1119 %v = call <8 x i64> @llvm.vp.or.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> splat (i1 true), i32 %evl)1120 ret <8 x i64> %v1121}1122 1123define <8 x i64> @vor_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {1124; CHECK-LABEL: vor_vi_v8i64:1125; CHECK: # %bb.0:1126; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1127; CHECK-NEXT: vor.vi v8, v8, 5, v0.t1128; CHECK-NEXT: ret1129 %v = call <8 x i64> @llvm.vp.or.v8i64(<8 x i64> %va, <8 x i64> splat (i64 5), <8 x i1> %m, i32 %evl)1130 ret <8 x i64> %v1131}1132 1133define <8 x i64> @vor_vi_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {1134; CHECK-LABEL: vor_vi_v8i64_unmasked:1135; CHECK: # %bb.0:1136; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1137; CHECK-NEXT: vor.vi v8, v8, 51138; CHECK-NEXT: ret1139 %v = call <8 x i64> @llvm.vp.or.v8i64(<8 x i64> %va, <8 x i64> splat (i64 5), <8 x i1> splat (i1 true), i32 %evl)1140 ret <8 x i64> %v1141}1142 1143define <16 x i64> @vor_vv_v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 zeroext %evl) {1144; CHECK-LABEL: vor_vv_v16i64:1145; CHECK: # %bb.0:1146; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1147; CHECK-NEXT: vor.vv v8, v8, v16, v0.t1148; CHECK-NEXT: ret1149 %v = call <16 x i64> @llvm.vp.or.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 %evl)1150 ret <16 x i64> %v1151}1152 1153define <16 x i64> @vor_vv_v16i64_unmasked(<16 x i64> %va, <16 x i64> %b, i32 zeroext %evl) {1154; CHECK-LABEL: vor_vv_v16i64_unmasked:1155; CHECK: # %bb.0:1156; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1157; CHECK-NEXT: vor.vv v8, v8, v161158; CHECK-NEXT: ret1159 %v = call <16 x i64> @llvm.vp.or.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> splat (i1 true), i32 %evl)1160 ret <16 x i64> %v1161}1162 1163define <16 x i64> @vor_vx_v16i64(<16 x i64> %va, i64 %b, <16 x i1> %m, i32 zeroext %evl) {1164; RV32-LABEL: vor_vx_v16i64:1165; RV32: # %bb.0:1166; RV32-NEXT: addi sp, sp, -161167; RV32-NEXT: .cfi_def_cfa_offset 161168; RV32-NEXT: sw a0, 8(sp)1169; RV32-NEXT: sw a1, 12(sp)1170; RV32-NEXT: addi a0, sp, 81171; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma1172; RV32-NEXT: vlse64.v v16, (a0), zero1173; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1174; RV32-NEXT: vor.vv v8, v8, v16, v0.t1175; RV32-NEXT: addi sp, sp, 161176; RV32-NEXT: .cfi_def_cfa_offset 01177; RV32-NEXT: ret1178;1179; RV64-LABEL: vor_vx_v16i64:1180; RV64: # %bb.0:1181; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1182; RV64-NEXT: vor.vx v8, v8, a0, v0.t1183; RV64-NEXT: ret1184 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 01185 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer1186 %v = call <16 x i64> @llvm.vp.or.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> %m, i32 %evl)1187 ret <16 x i64> %v1188}1189 1190define <16 x i64> @vor_vx_v16i64_unmasked(<16 x i64> %va, i64 %b, i32 zeroext %evl) {1191; RV32-LABEL: vor_vx_v16i64_unmasked:1192; RV32: # %bb.0:1193; RV32-NEXT: addi sp, sp, -161194; RV32-NEXT: .cfi_def_cfa_offset 161195; RV32-NEXT: sw a0, 8(sp)1196; RV32-NEXT: sw a1, 12(sp)1197; RV32-NEXT: addi a0, sp, 81198; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma1199; RV32-NEXT: vlse64.v v16, (a0), zero1200; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1201; RV32-NEXT: vor.vv v8, v8, v161202; RV32-NEXT: addi sp, sp, 161203; RV32-NEXT: .cfi_def_cfa_offset 01204; RV32-NEXT: ret1205;1206; RV64-LABEL: vor_vx_v16i64_unmasked:1207; RV64: # %bb.0:1208; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1209; RV64-NEXT: vor.vx v8, v8, a01210; RV64-NEXT: ret1211 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 01212 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer1213 %v = call <16 x i64> @llvm.vp.or.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> splat (i1 true), i32 %evl)1214 ret <16 x i64> %v1215}1216 1217define <16 x i64> @vor_vi_v16i64(<16 x i64> %va, <16 x i1> %m, i32 zeroext %evl) {1218; CHECK-LABEL: vor_vi_v16i64:1219; CHECK: # %bb.0:1220; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1221; CHECK-NEXT: vor.vi v8, v8, 5, v0.t1222; CHECK-NEXT: ret1223 %v = call <16 x i64> @llvm.vp.or.v16i64(<16 x i64> %va, <16 x i64> splat (i64 5), <16 x i1> %m, i32 %evl)1224 ret <16 x i64> %v1225}1226 1227define <16 x i64> @vor_vi_v16i64_unmasked(<16 x i64> %va, i32 zeroext %evl) {1228; CHECK-LABEL: vor_vi_v16i64_unmasked:1229; CHECK: # %bb.0:1230; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1231; CHECK-NEXT: vor.vi v8, v8, 51232; CHECK-NEXT: ret1233 %v = call <16 x i64> @llvm.vp.or.v16i64(<16 x i64> %va, <16 x i64> splat (i64 5), <16 x i1> splat (i1 true), i32 %evl)1234 ret <16 x i64> %v1235}1236