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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zvfbfmin,+v \3; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV324; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zvfbfmin,+v \5; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV646; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfhmin,+zvfbfmin,+v \7; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV328; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfhmin,+zvfbfmin,+v \9; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV6410 11define void @vpscatter_v2i8(<2 x i8> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {12; RV32-LABEL: vpscatter_v2i8:13; RV32: # %bb.0:14; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, ma15; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t16; RV32-NEXT: ret17;18; RV64-LABEL: vpscatter_v2i8:19; RV64: # %bb.0:20; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, ma21; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t22; RV64-NEXT: ret23 call void @llvm.vp.scatter.v2i8.v2p0(<2 x i8> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)24 ret void25}26 27define void @vpscatter_v2i16_truncstore_v2i8(<2 x i16> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {28; RV32-LABEL: vpscatter_v2i16_truncstore_v2i8:29; RV32: # %bb.0:30; RV32-NEXT: vsetivli zero, 2, e8, mf8, ta, ma31; RV32-NEXT: vnsrl.wi v8, v8, 032; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, ma33; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t34; RV32-NEXT: ret35;36; RV64-LABEL: vpscatter_v2i16_truncstore_v2i8:37; RV64: # %bb.0:38; RV64-NEXT: vsetivli zero, 2, e8, mf8, ta, ma39; RV64-NEXT: vnsrl.wi v8, v8, 040; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, ma41; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t42; RV64-NEXT: ret43 %tval = trunc <2 x i16> %val to <2 x i8>44 call void @llvm.vp.scatter.v2i8.v2p0(<2 x i8> %tval, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)45 ret void46}47 48define void @vpscatter_v2i32_truncstore_v2i8(<2 x i32> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {49; RV32-LABEL: vpscatter_v2i32_truncstore_v2i8:50; RV32: # %bb.0:51; RV32-NEXT: vsetivli zero, 2, e16, mf4, ta, ma52; RV32-NEXT: vnsrl.wi v8, v8, 053; RV32-NEXT: vsetvli zero, zero, e8, mf8, ta, ma54; RV32-NEXT: vnsrl.wi v8, v8, 055; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, ma56; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t57; RV32-NEXT: ret58;59; RV64-LABEL: vpscatter_v2i32_truncstore_v2i8:60; RV64: # %bb.0:61; RV64-NEXT: vsetivli zero, 2, e16, mf4, ta, ma62; RV64-NEXT: vnsrl.wi v8, v8, 063; RV64-NEXT: vsetvli zero, zero, e8, mf8, ta, ma64; RV64-NEXT: vnsrl.wi v8, v8, 065; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, ma66; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t67; RV64-NEXT: ret68 %tval = trunc <2 x i32> %val to <2 x i8>69 call void @llvm.vp.scatter.v2i8.v2p0(<2 x i8> %tval, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)70 ret void71}72 73define void @vpscatter_v2i64_truncstore_v2i8(<2 x i64> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {74; RV32-LABEL: vpscatter_v2i64_truncstore_v2i8:75; RV32: # %bb.0:76; RV32-NEXT: vsetivli zero, 2, e32, mf2, ta, ma77; RV32-NEXT: vnsrl.wi v8, v8, 078; RV32-NEXT: vsetvli zero, zero, e16, mf4, ta, ma79; RV32-NEXT: vnsrl.wi v8, v8, 080; RV32-NEXT: vsetvli zero, zero, e8, mf8, ta, ma81; RV32-NEXT: vnsrl.wi v8, v8, 082; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, ma83; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t84; RV32-NEXT: ret85;86; RV64-LABEL: vpscatter_v2i64_truncstore_v2i8:87; RV64: # %bb.0:88; RV64-NEXT: vsetivli zero, 2, e32, mf2, ta, ma89; RV64-NEXT: vnsrl.wi v8, v8, 090; RV64-NEXT: vsetvli zero, zero, e16, mf4, ta, ma91; RV64-NEXT: vnsrl.wi v8, v8, 092; RV64-NEXT: vsetvli zero, zero, e8, mf8, ta, ma93; RV64-NEXT: vnsrl.wi v8, v8, 094; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, ma95; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t96; RV64-NEXT: ret97 %tval = trunc <2 x i64> %val to <2 x i8>98 call void @llvm.vp.scatter.v2i8.v2p0(<2 x i8> %tval, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)99 ret void100}101 102define void @vpscatter_v4i8(<4 x i8> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 zeroext %evl) {103; RV32-LABEL: vpscatter_v4i8:104; RV32: # %bb.0:105; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, ma106; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t107; RV32-NEXT: ret108;109; RV64-LABEL: vpscatter_v4i8:110; RV64: # %bb.0:111; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, ma112; RV64-NEXT: vsoxei64.v v8, (zero), v10, v0.t113; RV64-NEXT: ret114 call void @llvm.vp.scatter.v4i8.v4p0(<4 x i8> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 %evl)115 ret void116}117 118define void @vpscatter_truemask_v4i8(<4 x i8> %val, <4 x ptr> %ptrs, i32 zeroext %evl) {119; RV32-LABEL: vpscatter_truemask_v4i8:120; RV32: # %bb.0:121; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, ma122; RV32-NEXT: vsoxei32.v v8, (zero), v9123; RV32-NEXT: ret124;125; RV64-LABEL: vpscatter_truemask_v4i8:126; RV64: # %bb.0:127; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, ma128; RV64-NEXT: vsoxei64.v v8, (zero), v10129; RV64-NEXT: ret130 call void @llvm.vp.scatter.v4i8.v4p0(<4 x i8> %val, <4 x ptr> %ptrs, <4 x i1> splat (i1 1), i32 %evl)131 ret void132}133 134define void @vpscatter_v8i8(<8 x i8> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 zeroext %evl) {135; RV32-LABEL: vpscatter_v8i8:136; RV32: # %bb.0:137; RV32-NEXT: vsetvli zero, a0, e8, mf2, ta, ma138; RV32-NEXT: vsoxei32.v v8, (zero), v10, v0.t139; RV32-NEXT: ret140;141; RV64-LABEL: vpscatter_v8i8:142; RV64: # %bb.0:143; RV64-NEXT: vsetvli zero, a0, e8, mf2, ta, ma144; RV64-NEXT: vsoxei64.v v8, (zero), v12, v0.t145; RV64-NEXT: ret146 call void @llvm.vp.scatter.v8i8.v8p0(<8 x i8> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)147 ret void148}149 150define void @vpscatter_baseidx_v8i8(<8 x i8> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {151; RV32-LABEL: vpscatter_baseidx_v8i8:152; RV32: # %bb.0:153; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma154; RV32-NEXT: vsext.vf4 v10, v9155; RV32-NEXT: vsetvli zero, a1, e8, mf2, ta, ma156; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t157; RV32-NEXT: ret158;159; RV64-LABEL: vpscatter_baseidx_v8i8:160; RV64: # %bb.0:161; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma162; RV64-NEXT: vsext.vf8 v12, v9163; RV64-NEXT: vsetvli zero, a1, e8, mf2, ta, ma164; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t165; RV64-NEXT: ret166 %ptrs = getelementptr inbounds i8, ptr %base, <8 x i8> %idxs167 call void @llvm.vp.scatter.v8i8.v8p0(<8 x i8> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)168 ret void169}170 171define void @vpscatter_v2i16(<2 x i16> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {172; RV32-LABEL: vpscatter_v2i16:173; RV32: # %bb.0:174; RV32-NEXT: vsetvli zero, a0, e16, mf4, ta, ma175; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t176; RV32-NEXT: ret177;178; RV64-LABEL: vpscatter_v2i16:179; RV64: # %bb.0:180; RV64-NEXT: vsetvli zero, a0, e16, mf4, ta, ma181; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t182; RV64-NEXT: ret183 call void @llvm.vp.scatter.v2i16.v2p0(<2 x i16> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)184 ret void185}186 187define void @vpscatter_v2i32_truncstore_v2i16(<2 x i32> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {188; RV32-LABEL: vpscatter_v2i32_truncstore_v2i16:189; RV32: # %bb.0:190; RV32-NEXT: vsetivli zero, 2, e16, mf4, ta, ma191; RV32-NEXT: vnsrl.wi v8, v8, 0192; RV32-NEXT: vsetvli zero, a0, e16, mf4, ta, ma193; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t194; RV32-NEXT: ret195;196; RV64-LABEL: vpscatter_v2i32_truncstore_v2i16:197; RV64: # %bb.0:198; RV64-NEXT: vsetivli zero, 2, e16, mf4, ta, ma199; RV64-NEXT: vnsrl.wi v8, v8, 0200; RV64-NEXT: vsetvli zero, a0, e16, mf4, ta, ma201; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t202; RV64-NEXT: ret203 %tval = trunc <2 x i32> %val to <2 x i16>204 call void @llvm.vp.scatter.v2i16.v2p0(<2 x i16> %tval, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)205 ret void206}207 208define void @vpscatter_v2i64_truncstore_v2i16(<2 x i64> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {209; RV32-LABEL: vpscatter_v2i64_truncstore_v2i16:210; RV32: # %bb.0:211; RV32-NEXT: vsetivli zero, 2, e32, mf2, ta, ma212; RV32-NEXT: vnsrl.wi v8, v8, 0213; RV32-NEXT: vsetvli zero, zero, e16, mf4, ta, ma214; RV32-NEXT: vnsrl.wi v8, v8, 0215; RV32-NEXT: vsetvli zero, a0, e16, mf4, ta, ma216; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t217; RV32-NEXT: ret218;219; RV64-LABEL: vpscatter_v2i64_truncstore_v2i16:220; RV64: # %bb.0:221; RV64-NEXT: vsetivli zero, 2, e32, mf2, ta, ma222; RV64-NEXT: vnsrl.wi v8, v8, 0223; RV64-NEXT: vsetvli zero, zero, e16, mf4, ta, ma224; RV64-NEXT: vnsrl.wi v8, v8, 0225; RV64-NEXT: vsetvli zero, a0, e16, mf4, ta, ma226; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t227; RV64-NEXT: ret228 %tval = trunc <2 x i64> %val to <2 x i16>229 call void @llvm.vp.scatter.v2i16.v2p0(<2 x i16> %tval, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)230 ret void231}232 233define void @vpscatter_v3i16(<3 x i16> %val, <3 x ptr> %ptrs, <3 x i1> %m, i32 zeroext %evl) {234; RV32-LABEL: vpscatter_v3i16:235; RV32: # %bb.0:236; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, ma237; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t238; RV32-NEXT: ret239;240; RV64-LABEL: vpscatter_v3i16:241; RV64: # %bb.0:242; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, ma243; RV64-NEXT: vsoxei64.v v8, (zero), v10, v0.t244; RV64-NEXT: ret245 call void @llvm.vp.scatter.v3i16.v3p0(<3 x i16> %val, <3 x ptr> %ptrs, <3 x i1> %m, i32 %evl)246 ret void247}248 249define void @vpscatter_truemask_v3i16(<3 x i16> %val, <3 x ptr> %ptrs, i32 zeroext %evl) {250; RV32-LABEL: vpscatter_truemask_v3i16:251; RV32: # %bb.0:252; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, ma253; RV32-NEXT: vsoxei32.v v8, (zero), v9254; RV32-NEXT: ret255;256; RV64-LABEL: vpscatter_truemask_v3i16:257; RV64: # %bb.0:258; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, ma259; RV64-NEXT: vsoxei64.v v8, (zero), v10260; RV64-NEXT: ret261 call void @llvm.vp.scatter.v3i16.v3p0(<3 x i16> %val, <3 x ptr> %ptrs, <3 x i1> splat (i1 1), i32 %evl)262 ret void263}264 265define void @vpscatter_v4i16(<4 x i16> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 zeroext %evl) {266; RV32-LABEL: vpscatter_v4i16:267; RV32: # %bb.0:268; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, ma269; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t270; RV32-NEXT: ret271;272; RV64-LABEL: vpscatter_v4i16:273; RV64: # %bb.0:274; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, ma275; RV64-NEXT: vsoxei64.v v8, (zero), v10, v0.t276; RV64-NEXT: ret277 call void @llvm.vp.scatter.v4i16.v4p0(<4 x i16> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 %evl)278 ret void279}280 281define void @vpscatter_truemask_v4i16(<4 x i16> %val, <4 x ptr> %ptrs, i32 zeroext %evl) {282; RV32-LABEL: vpscatter_truemask_v4i16:283; RV32: # %bb.0:284; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, ma285; RV32-NEXT: vsoxei32.v v8, (zero), v9286; RV32-NEXT: ret287;288; RV64-LABEL: vpscatter_truemask_v4i16:289; RV64: # %bb.0:290; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, ma291; RV64-NEXT: vsoxei64.v v8, (zero), v10292; RV64-NEXT: ret293 call void @llvm.vp.scatter.v4i16.v4p0(<4 x i16> %val, <4 x ptr> %ptrs, <4 x i1> splat (i1 1), i32 %evl)294 ret void295}296 297define void @vpscatter_v8i16(<8 x i16> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 zeroext %evl) {298; RV32-LABEL: vpscatter_v8i16:299; RV32: # %bb.0:300; RV32-NEXT: vsetvli zero, a0, e16, m1, ta, ma301; RV32-NEXT: vsoxei32.v v8, (zero), v10, v0.t302; RV32-NEXT: ret303;304; RV64-LABEL: vpscatter_v8i16:305; RV64: # %bb.0:306; RV64-NEXT: vsetvli zero, a0, e16, m1, ta, ma307; RV64-NEXT: vsoxei64.v v8, (zero), v12, v0.t308; RV64-NEXT: ret309 call void @llvm.vp.scatter.v8i16.v8p0(<8 x i16> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)310 ret void311}312 313define void @vpscatter_baseidx_v8i8_v8i16(<8 x i16> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {314; RV32-LABEL: vpscatter_baseidx_v8i8_v8i16:315; RV32: # %bb.0:316; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma317; RV32-NEXT: vsext.vf4 v10, v9318; RV32-NEXT: vadd.vv v10, v10, v10319; RV32-NEXT: vsetvli zero, a1, e16, m1, ta, ma320; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t321; RV32-NEXT: ret322;323; RV64-LABEL: vpscatter_baseidx_v8i8_v8i16:324; RV64: # %bb.0:325; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma326; RV64-NEXT: vsext.vf8 v12, v9327; RV64-NEXT: vadd.vv v12, v12, v12328; RV64-NEXT: vsetvli zero, a1, e16, m1, ta, ma329; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t330; RV64-NEXT: ret331 %ptrs = getelementptr inbounds i16, ptr %base, <8 x i8> %idxs332 call void @llvm.vp.scatter.v8i16.v8p0(<8 x i16> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)333 ret void334}335 336define void @vpscatter_baseidx_sext_v8i8_v8i16(<8 x i16> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {337; RV32-LABEL: vpscatter_baseidx_sext_v8i8_v8i16:338; RV32: # %bb.0:339; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma340; RV32-NEXT: vsext.vf4 v10, v9341; RV32-NEXT: vadd.vv v10, v10, v10342; RV32-NEXT: vsetvli zero, a1, e16, m1, ta, ma343; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t344; RV32-NEXT: ret345;346; RV64-LABEL: vpscatter_baseidx_sext_v8i8_v8i16:347; RV64: # %bb.0:348; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma349; RV64-NEXT: vsext.vf8 v12, v9350; RV64-NEXT: vadd.vv v12, v12, v12351; RV64-NEXT: vsetvli zero, a1, e16, m1, ta, ma352; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t353; RV64-NEXT: ret354 %eidxs = sext <8 x i8> %idxs to <8 x i16>355 %ptrs = getelementptr inbounds i16, ptr %base, <8 x i16> %eidxs356 call void @llvm.vp.scatter.v8i16.v8p0(<8 x i16> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)357 ret void358}359 360define void @vpscatter_baseidx_zext_v8i8_v8i16(<8 x i16> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {361; RV32-LABEL: vpscatter_baseidx_zext_v8i8_v8i16:362; RV32: # %bb.0:363; RV32-NEXT: vsetivli zero, 8, e8, mf2, ta, ma364; RV32-NEXT: vwaddu.vv v10, v9, v9365; RV32-NEXT: vsetvli zero, a1, e16, m1, ta, ma366; RV32-NEXT: vsoxei16.v v8, (a0), v10, v0.t367; RV32-NEXT: ret368;369; RV64-LABEL: vpscatter_baseidx_zext_v8i8_v8i16:370; RV64: # %bb.0:371; RV64-NEXT: vsetivli zero, 8, e8, mf2, ta, ma372; RV64-NEXT: vwaddu.vv v10, v9, v9373; RV64-NEXT: vsetvli zero, a1, e16, m1, ta, ma374; RV64-NEXT: vsoxei16.v v8, (a0), v10, v0.t375; RV64-NEXT: ret376 %eidxs = zext <8 x i8> %idxs to <8 x i16>377 %ptrs = getelementptr inbounds i16, ptr %base, <8 x i16> %eidxs378 call void @llvm.vp.scatter.v8i16.v8p0(<8 x i16> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)379 ret void380}381 382define void @vpscatter_baseidx_v8i16(<8 x i16> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {383; RV32-LABEL: vpscatter_baseidx_v8i16:384; RV32: # %bb.0:385; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma386; RV32-NEXT: vwadd.vv v10, v9, v9387; RV32-NEXT: vsetvli zero, a1, e16, m1, ta, ma388; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t389; RV32-NEXT: ret390;391; RV64-LABEL: vpscatter_baseidx_v8i16:392; RV64: # %bb.0:393; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma394; RV64-NEXT: vsext.vf4 v12, v9395; RV64-NEXT: vadd.vv v12, v12, v12396; RV64-NEXT: vsetvli zero, a1, e16, m1, ta, ma397; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t398; RV64-NEXT: ret399 %ptrs = getelementptr inbounds i16, ptr %base, <8 x i16> %idxs400 call void @llvm.vp.scatter.v8i16.v8p0(<8 x i16> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)401 ret void402}403 404define void @vpscatter_v2i32(<2 x i32> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {405; RV32-LABEL: vpscatter_v2i32:406; RV32: # %bb.0:407; RV32-NEXT: vsetvli zero, a0, e32, mf2, ta, ma408; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t409; RV32-NEXT: ret410;411; RV64-LABEL: vpscatter_v2i32:412; RV64: # %bb.0:413; RV64-NEXT: vsetvli zero, a0, e32, mf2, ta, ma414; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t415; RV64-NEXT: ret416 call void @llvm.vp.scatter.v2i32.v2p0(<2 x i32> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)417 ret void418}419 420define void @vpscatter_v2i64_truncstore_v2i32(<2 x i64> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {421; RV32-LABEL: vpscatter_v2i64_truncstore_v2i32:422; RV32: # %bb.0:423; RV32-NEXT: vsetivli zero, 2, e32, mf2, ta, ma424; RV32-NEXT: vnsrl.wi v8, v8, 0425; RV32-NEXT: vsetvli zero, a0, e32, mf2, ta, ma426; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t427; RV32-NEXT: ret428;429; RV64-LABEL: vpscatter_v2i64_truncstore_v2i32:430; RV64: # %bb.0:431; RV64-NEXT: vsetivli zero, 2, e32, mf2, ta, ma432; RV64-NEXT: vnsrl.wi v8, v8, 0433; RV64-NEXT: vsetvli zero, a0, e32, mf2, ta, ma434; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t435; RV64-NEXT: ret436 %tval = trunc <2 x i64> %val to <2 x i32>437 call void @llvm.vp.scatter.v2i32.v2p0(<2 x i32> %tval, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)438 ret void439}440 441define void @vpscatter_v4i32(<4 x i32> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 zeroext %evl) {442; RV32-LABEL: vpscatter_v4i32:443; RV32: # %bb.0:444; RV32-NEXT: vsetvli zero, a0, e32, m1, ta, ma445; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t446; RV32-NEXT: ret447;448; RV64-LABEL: vpscatter_v4i32:449; RV64: # %bb.0:450; RV64-NEXT: vsetvli zero, a0, e32, m1, ta, ma451; RV64-NEXT: vsoxei64.v v8, (zero), v10, v0.t452; RV64-NEXT: ret453 call void @llvm.vp.scatter.v4i32.v4p0(<4 x i32> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 %evl)454 ret void455}456 457define void @vpscatter_truemask_v4i32(<4 x i32> %val, <4 x ptr> %ptrs, i32 zeroext %evl) {458; RV32-LABEL: vpscatter_truemask_v4i32:459; RV32: # %bb.0:460; RV32-NEXT: vsetvli zero, a0, e32, m1, ta, ma461; RV32-NEXT: vsoxei32.v v8, (zero), v9462; RV32-NEXT: ret463;464; RV64-LABEL: vpscatter_truemask_v4i32:465; RV64: # %bb.0:466; RV64-NEXT: vsetvli zero, a0, e32, m1, ta, ma467; RV64-NEXT: vsoxei64.v v8, (zero), v10468; RV64-NEXT: ret469 call void @llvm.vp.scatter.v4i32.v4p0(<4 x i32> %val, <4 x ptr> %ptrs, <4 x i1> splat (i1 1), i32 %evl)470 ret void471}472 473define void @vpscatter_v8i32(<8 x i32> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 zeroext %evl) {474; RV32-LABEL: vpscatter_v8i32:475; RV32: # %bb.0:476; RV32-NEXT: vsetvli zero, a0, e32, m2, ta, ma477; RV32-NEXT: vsoxei32.v v8, (zero), v10, v0.t478; RV32-NEXT: ret479;480; RV64-LABEL: vpscatter_v8i32:481; RV64: # %bb.0:482; RV64-NEXT: vsetvli zero, a0, e32, m2, ta, ma483; RV64-NEXT: vsoxei64.v v8, (zero), v12, v0.t484; RV64-NEXT: ret485 call void @llvm.vp.scatter.v8i32.v8p0(<8 x i32> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)486 ret void487}488 489define void @vpscatter_baseidx_v8i8_v8i32(<8 x i32> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {490; RV32-LABEL: vpscatter_baseidx_v8i8_v8i32:491; RV32: # %bb.0:492; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma493; RV32-NEXT: vsext.vf4 v12, v10494; RV32-NEXT: vsll.vi v10, v12, 2495; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma496; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t497; RV32-NEXT: ret498;499; RV64-LABEL: vpscatter_baseidx_v8i8_v8i32:500; RV64: # %bb.0:501; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma502; RV64-NEXT: vsext.vf8 v12, v10503; RV64-NEXT: vsll.vi v12, v12, 2504; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma505; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t506; RV64-NEXT: ret507 %ptrs = getelementptr inbounds i32, ptr %base, <8 x i8> %idxs508 call void @llvm.vp.scatter.v8i32.v8p0(<8 x i32> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)509 ret void510}511 512define void @vpscatter_baseidx_sext_v8i8_v8i32(<8 x i32> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {513; RV32-LABEL: vpscatter_baseidx_sext_v8i8_v8i32:514; RV32: # %bb.0:515; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma516; RV32-NEXT: vsext.vf4 v12, v10517; RV32-NEXT: vsll.vi v10, v12, 2518; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma519; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t520; RV32-NEXT: ret521;522; RV64-LABEL: vpscatter_baseidx_sext_v8i8_v8i32:523; RV64: # %bb.0:524; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma525; RV64-NEXT: vsext.vf8 v12, v10526; RV64-NEXT: vsll.vi v12, v12, 2527; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma528; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t529; RV64-NEXT: ret530 %eidxs = sext <8 x i8> %idxs to <8 x i32>531 %ptrs = getelementptr inbounds i32, ptr %base, <8 x i32> %eidxs532 call void @llvm.vp.scatter.v8i32.v8p0(<8 x i32> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)533 ret void534}535 536define void @vpscatter_baseidx_zext_v8i8_v8i32(<8 x i32> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {537; RV32-LABEL: vpscatter_baseidx_zext_v8i8_v8i32:538; RV32: # %bb.0:539; RV32-NEXT: li a2, 4540; RV32-NEXT: vsetivli zero, 8, e8, mf2, ta, ma541; RV32-NEXT: vwmulu.vx v11, v10, a2542; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma543; RV32-NEXT: vsoxei16.v v8, (a0), v11, v0.t544; RV32-NEXT: ret545;546; RV64-LABEL: vpscatter_baseidx_zext_v8i8_v8i32:547; RV64: # %bb.0:548; RV64-NEXT: li a2, 4549; RV64-NEXT: vsetivli zero, 8, e8, mf2, ta, ma550; RV64-NEXT: vwmulu.vx v11, v10, a2551; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma552; RV64-NEXT: vsoxei16.v v8, (a0), v11, v0.t553; RV64-NEXT: ret554 %eidxs = zext <8 x i8> %idxs to <8 x i32>555 %ptrs = getelementptr inbounds i32, ptr %base, <8 x i32> %eidxs556 call void @llvm.vp.scatter.v8i32.v8p0(<8 x i32> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)557 ret void558}559 560define void @vpscatter_baseidx_v8i16_v8i32(<8 x i32> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {561; RV32-LABEL: vpscatter_baseidx_v8i16_v8i32:562; RV32: # %bb.0:563; RV32-NEXT: li a2, 4564; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma565; RV32-NEXT: vwmulsu.vx v12, v10, a2566; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma567; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t568; RV32-NEXT: ret569;570; RV64-LABEL: vpscatter_baseidx_v8i16_v8i32:571; RV64: # %bb.0:572; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma573; RV64-NEXT: vsext.vf4 v12, v10574; RV64-NEXT: vsll.vi v12, v12, 2575; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma576; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t577; RV64-NEXT: ret578 %ptrs = getelementptr inbounds i32, ptr %base, <8 x i16> %idxs579 call void @llvm.vp.scatter.v8i32.v8p0(<8 x i32> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)580 ret void581}582 583define void @vpscatter_baseidx_sext_v8i16_v8i32(<8 x i32> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {584; RV32-LABEL: vpscatter_baseidx_sext_v8i16_v8i32:585; RV32: # %bb.0:586; RV32-NEXT: li a2, 4587; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma588; RV32-NEXT: vwmulsu.vx v12, v10, a2589; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma590; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t591; RV32-NEXT: ret592;593; RV64-LABEL: vpscatter_baseidx_sext_v8i16_v8i32:594; RV64: # %bb.0:595; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma596; RV64-NEXT: vsext.vf4 v12, v10597; RV64-NEXT: vsll.vi v12, v12, 2598; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma599; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t600; RV64-NEXT: ret601 %eidxs = sext <8 x i16> %idxs to <8 x i32>602 %ptrs = getelementptr inbounds i32, ptr %base, <8 x i32> %eidxs603 call void @llvm.vp.scatter.v8i32.v8p0(<8 x i32> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)604 ret void605}606 607define void @vpscatter_baseidx_zext_v8i16_v8i32(<8 x i32> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {608; RV32-LABEL: vpscatter_baseidx_zext_v8i16_v8i32:609; RV32: # %bb.0:610; RV32-NEXT: li a2, 4611; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma612; RV32-NEXT: vwmulu.vx v12, v10, a2613; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma614; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t615; RV32-NEXT: ret616;617; RV64-LABEL: vpscatter_baseidx_zext_v8i16_v8i32:618; RV64: # %bb.0:619; RV64-NEXT: li a2, 4620; RV64-NEXT: vsetivli zero, 8, e16, m1, ta, ma621; RV64-NEXT: vwmulu.vx v12, v10, a2622; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma623; RV64-NEXT: vsoxei32.v v8, (a0), v12, v0.t624; RV64-NEXT: ret625 %eidxs = zext <8 x i16> %idxs to <8 x i32>626 %ptrs = getelementptr inbounds i32, ptr %base, <8 x i32> %eidxs627 call void @llvm.vp.scatter.v8i32.v8p0(<8 x i32> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)628 ret void629}630 631define void @vpscatter_baseidx_v8i32(<8 x i32> %val, ptr %base, <8 x i32> %idxs, <8 x i1> %m, i32 zeroext %evl) {632; RV32-LABEL: vpscatter_baseidx_v8i32:633; RV32: # %bb.0:634; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma635; RV32-NEXT: vsll.vi v10, v10, 2636; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma637; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t638; RV32-NEXT: ret639;640; RV64-LABEL: vpscatter_baseidx_v8i32:641; RV64: # %bb.0:642; RV64-NEXT: li a2, 4643; RV64-NEXT: vsetivli zero, 8, e32, m2, ta, ma644; RV64-NEXT: vwmulsu.vx v12, v10, a2645; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma646; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t647; RV64-NEXT: ret648 %ptrs = getelementptr inbounds i32, ptr %base, <8 x i32> %idxs649 call void @llvm.vp.scatter.v8i32.v8p0(<8 x i32> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)650 ret void651}652 653define void @vpscatter_v2i64(<2 x i64> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {654; RV32-LABEL: vpscatter_v2i64:655; RV32: # %bb.0:656; RV32-NEXT: vsetvli zero, a0, e64, m1, ta, ma657; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t658; RV32-NEXT: ret659;660; RV64-LABEL: vpscatter_v2i64:661; RV64: # %bb.0:662; RV64-NEXT: vsetvli zero, a0, e64, m1, ta, ma663; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t664; RV64-NEXT: ret665 call void @llvm.vp.scatter.v2i64.v2p0(<2 x i64> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)666 ret void667}668 669define void @vpscatter_v4i64(<4 x i64> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 zeroext %evl) {670; RV32-LABEL: vpscatter_v4i64:671; RV32: # %bb.0:672; RV32-NEXT: vsetvli zero, a0, e64, m2, ta, ma673; RV32-NEXT: vsoxei32.v v8, (zero), v10, v0.t674; RV32-NEXT: ret675;676; RV64-LABEL: vpscatter_v4i64:677; RV64: # %bb.0:678; RV64-NEXT: vsetvli zero, a0, e64, m2, ta, ma679; RV64-NEXT: vsoxei64.v v8, (zero), v10, v0.t680; RV64-NEXT: ret681 call void @llvm.vp.scatter.v4i64.v4p0(<4 x i64> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 %evl)682 ret void683}684 685define void @vpscatter_truemask_v4i64(<4 x i64> %val, <4 x ptr> %ptrs, i32 zeroext %evl) {686; RV32-LABEL: vpscatter_truemask_v4i64:687; RV32: # %bb.0:688; RV32-NEXT: vsetvli zero, a0, e64, m2, ta, ma689; RV32-NEXT: vsoxei32.v v8, (zero), v10690; RV32-NEXT: ret691;692; RV64-LABEL: vpscatter_truemask_v4i64:693; RV64: # %bb.0:694; RV64-NEXT: vsetvli zero, a0, e64, m2, ta, ma695; RV64-NEXT: vsoxei64.v v8, (zero), v10696; RV64-NEXT: ret697 call void @llvm.vp.scatter.v4i64.v4p0(<4 x i64> %val, <4 x ptr> %ptrs, <4 x i1> splat (i1 1), i32 %evl)698 ret void699}700 701define void @vpscatter_v8i64(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 zeroext %evl) {702; RV32-LABEL: vpscatter_v8i64:703; RV32: # %bb.0:704; RV32-NEXT: vsetvli zero, a0, e64, m4, ta, ma705; RV32-NEXT: vsoxei32.v v8, (zero), v12, v0.t706; RV32-NEXT: ret707;708; RV64-LABEL: vpscatter_v8i64:709; RV64: # %bb.0:710; RV64-NEXT: vsetvli zero, a0, e64, m4, ta, ma711; RV64-NEXT: vsoxei64.v v8, (zero), v12, v0.t712; RV64-NEXT: ret713 call void @llvm.vp.scatter.v8i64.v8p0(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)714 ret void715}716 717define void @vpscatter_baseidx_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {718; RV32-LABEL: vpscatter_baseidx_v8i8_v8i64:719; RV32: # %bb.0:720; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma721; RV32-NEXT: vsext.vf4 v14, v12722; RV32-NEXT: vsll.vi v12, v14, 3723; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma724; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t725; RV32-NEXT: ret726;727; RV64-LABEL: vpscatter_baseidx_v8i8_v8i64:728; RV64: # %bb.0:729; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma730; RV64-NEXT: vsext.vf8 v16, v12731; RV64-NEXT: vsll.vi v12, v16, 3732; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma733; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t734; RV64-NEXT: ret735 %ptrs = getelementptr inbounds i64, ptr %base, <8 x i8> %idxs736 call void @llvm.vp.scatter.v8i64.v8p0(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)737 ret void738}739 740define void @vpscatter_baseidx_sext_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {741; RV32-LABEL: vpscatter_baseidx_sext_v8i8_v8i64:742; RV32: # %bb.0:743; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma744; RV32-NEXT: vsext.vf4 v14, v12745; RV32-NEXT: vsll.vi v12, v14, 3746; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma747; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t748; RV32-NEXT: ret749;750; RV64-LABEL: vpscatter_baseidx_sext_v8i8_v8i64:751; RV64: # %bb.0:752; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma753; RV64-NEXT: vsext.vf8 v16, v12754; RV64-NEXT: vsll.vi v12, v16, 3755; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma756; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t757; RV64-NEXT: ret758 %eidxs = sext <8 x i8> %idxs to <8 x i64>759 %ptrs = getelementptr inbounds i64, ptr %base, <8 x i64> %eidxs760 call void @llvm.vp.scatter.v8i64.v8p0(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)761 ret void762}763 764define void @vpscatter_baseidx_zext_v8i8_v8i64(<8 x i64> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {765; RV32-LABEL: vpscatter_baseidx_zext_v8i8_v8i64:766; RV32: # %bb.0:767; RV32-NEXT: li a2, 8768; RV32-NEXT: vsetivli zero, 8, e8, mf2, ta, ma769; RV32-NEXT: vwmulu.vx v13, v12, a2770; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma771; RV32-NEXT: vsoxei16.v v8, (a0), v13, v0.t772; RV32-NEXT: ret773;774; RV64-LABEL: vpscatter_baseidx_zext_v8i8_v8i64:775; RV64: # %bb.0:776; RV64-NEXT: li a2, 8777; RV64-NEXT: vsetivli zero, 8, e8, mf2, ta, ma778; RV64-NEXT: vwmulu.vx v13, v12, a2779; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma780; RV64-NEXT: vsoxei16.v v8, (a0), v13, v0.t781; RV64-NEXT: ret782 %eidxs = zext <8 x i8> %idxs to <8 x i64>783 %ptrs = getelementptr inbounds i64, ptr %base, <8 x i64> %eidxs784 call void @llvm.vp.scatter.v8i64.v8p0(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)785 ret void786}787 788define void @vpscatter_baseidx_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {789; RV32-LABEL: vpscatter_baseidx_v8i16_v8i64:790; RV32: # %bb.0:791; RV32-NEXT: li a2, 8792; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma793; RV32-NEXT: vwmulsu.vx v14, v12, a2794; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma795; RV32-NEXT: vsoxei32.v v8, (a0), v14, v0.t796; RV32-NEXT: ret797;798; RV64-LABEL: vpscatter_baseidx_v8i16_v8i64:799; RV64: # %bb.0:800; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma801; RV64-NEXT: vsext.vf4 v16, v12802; RV64-NEXT: vsll.vi v12, v16, 3803; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma804; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t805; RV64-NEXT: ret806 %ptrs = getelementptr inbounds i64, ptr %base, <8 x i16> %idxs807 call void @llvm.vp.scatter.v8i64.v8p0(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)808 ret void809}810 811define void @vpscatter_baseidx_sext_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {812; RV32-LABEL: vpscatter_baseidx_sext_v8i16_v8i64:813; RV32: # %bb.0:814; RV32-NEXT: li a2, 8815; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma816; RV32-NEXT: vwmulsu.vx v14, v12, a2817; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma818; RV32-NEXT: vsoxei32.v v8, (a0), v14, v0.t819; RV32-NEXT: ret820;821; RV64-LABEL: vpscatter_baseidx_sext_v8i16_v8i64:822; RV64: # %bb.0:823; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma824; RV64-NEXT: vsext.vf4 v16, v12825; RV64-NEXT: vsll.vi v12, v16, 3826; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma827; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t828; RV64-NEXT: ret829 %eidxs = sext <8 x i16> %idxs to <8 x i64>830 %ptrs = getelementptr inbounds i64, ptr %base, <8 x i64> %eidxs831 call void @llvm.vp.scatter.v8i64.v8p0(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)832 ret void833}834 835define void @vpscatter_baseidx_zext_v8i16_v8i64(<8 x i64> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {836; RV32-LABEL: vpscatter_baseidx_zext_v8i16_v8i64:837; RV32: # %bb.0:838; RV32-NEXT: li a2, 8839; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma840; RV32-NEXT: vwmulu.vx v14, v12, a2841; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma842; RV32-NEXT: vsoxei32.v v8, (a0), v14, v0.t843; RV32-NEXT: ret844;845; RV64-LABEL: vpscatter_baseidx_zext_v8i16_v8i64:846; RV64: # %bb.0:847; RV64-NEXT: li a2, 8848; RV64-NEXT: vsetivli zero, 8, e16, m1, ta, ma849; RV64-NEXT: vwmulu.vx v14, v12, a2850; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma851; RV64-NEXT: vsoxei32.v v8, (a0), v14, v0.t852; RV64-NEXT: ret853 %eidxs = zext <8 x i16> %idxs to <8 x i64>854 %ptrs = getelementptr inbounds i64, ptr %base, <8 x i64> %eidxs855 call void @llvm.vp.scatter.v8i64.v8p0(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)856 ret void857}858 859define void @vpscatter_baseidx_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i32> %idxs, <8 x i1> %m, i32 zeroext %evl) {860; RV32-LABEL: vpscatter_baseidx_v8i32_v8i64:861; RV32: # %bb.0:862; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma863; RV32-NEXT: vsll.vi v12, v12, 3864; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma865; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t866; RV32-NEXT: ret867;868; RV64-LABEL: vpscatter_baseidx_v8i32_v8i64:869; RV64: # %bb.0:870; RV64-NEXT: li a2, 8871; RV64-NEXT: vsetivli zero, 8, e32, m2, ta, ma872; RV64-NEXT: vwmulsu.vx v16, v12, a2873; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma874; RV64-NEXT: vsoxei64.v v8, (a0), v16, v0.t875; RV64-NEXT: ret876 %ptrs = getelementptr inbounds i64, ptr %base, <8 x i32> %idxs877 call void @llvm.vp.scatter.v8i64.v8p0(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)878 ret void879}880 881define void @vpscatter_baseidx_sext_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i32> %idxs, <8 x i1> %m, i32 zeroext %evl) {882; RV32-LABEL: vpscatter_baseidx_sext_v8i32_v8i64:883; RV32: # %bb.0:884; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma885; RV32-NEXT: vsll.vi v12, v12, 3886; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma887; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t888; RV32-NEXT: ret889;890; RV64-LABEL: vpscatter_baseidx_sext_v8i32_v8i64:891; RV64: # %bb.0:892; RV64-NEXT: li a2, 8893; RV64-NEXT: vsetivli zero, 8, e32, m2, ta, ma894; RV64-NEXT: vwmulsu.vx v16, v12, a2895; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma896; RV64-NEXT: vsoxei64.v v8, (a0), v16, v0.t897; RV64-NEXT: ret898 %eidxs = sext <8 x i32> %idxs to <8 x i64>899 %ptrs = getelementptr inbounds i64, ptr %base, <8 x i64> %eidxs900 call void @llvm.vp.scatter.v8i64.v8p0(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)901 ret void902}903 904define void @vpscatter_baseidx_zext_v8i32_v8i64(<8 x i64> %val, ptr %base, <8 x i32> %idxs, <8 x i1> %m, i32 zeroext %evl) {905; RV32-LABEL: vpscatter_baseidx_zext_v8i32_v8i64:906; RV32: # %bb.0:907; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma908; RV32-NEXT: vsll.vi v12, v12, 3909; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma910; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t911; RV32-NEXT: ret912;913; RV64-LABEL: vpscatter_baseidx_zext_v8i32_v8i64:914; RV64: # %bb.0:915; RV64-NEXT: li a2, 8916; RV64-NEXT: vsetivli zero, 8, e32, m2, ta, ma917; RV64-NEXT: vwmulu.vx v16, v12, a2918; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma919; RV64-NEXT: vsoxei64.v v8, (a0), v16, v0.t920; RV64-NEXT: ret921 %eidxs = zext <8 x i32> %idxs to <8 x i64>922 %ptrs = getelementptr inbounds i64, ptr %base, <8 x i64> %eidxs923 call void @llvm.vp.scatter.v8i64.v8p0(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)924 ret void925}926 927define void @vpscatter_baseidx_v8i64(<8 x i64> %val, ptr %base, <8 x i64> %idxs, <8 x i1> %m, i32 zeroext %evl) {928; RV32-LABEL: vpscatter_baseidx_v8i64:929; RV32: # %bb.0:930; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma931; RV32-NEXT: vnsrl.wi v16, v12, 0932; RV32-NEXT: vsll.vi v12, v16, 3933; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma934; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t935; RV32-NEXT: ret936;937; RV64-LABEL: vpscatter_baseidx_v8i64:938; RV64: # %bb.0:939; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma940; RV64-NEXT: vsll.vi v12, v12, 3941; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma942; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t943; RV64-NEXT: ret944 %ptrs = getelementptr inbounds i64, ptr %base, <8 x i64> %idxs945 call void @llvm.vp.scatter.v8i64.v8p0(<8 x i64> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)946 ret void947}948 949define void @vpscatter_v2bf16(<2 x bfloat> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {950; RV32-LABEL: vpscatter_v2bf16:951; RV32: # %bb.0:952; RV32-NEXT: vsetvli zero, a0, e16, mf4, ta, ma953; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t954; RV32-NEXT: ret955;956; RV64-LABEL: vpscatter_v2bf16:957; RV64: # %bb.0:958; RV64-NEXT: vsetvli zero, a0, e16, mf4, ta, ma959; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t960; RV64-NEXT: ret961 call void @llvm.vp.scatter.v2bf16.v2p0(<2 x bfloat> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)962 ret void963}964 965define void @vpscatter_v4bf16(<4 x bfloat> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 zeroext %evl) {966; RV32-LABEL: vpscatter_v4bf16:967; RV32: # %bb.0:968; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, ma969; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t970; RV32-NEXT: ret971;972; RV64-LABEL: vpscatter_v4bf16:973; RV64: # %bb.0:974; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, ma975; RV64-NEXT: vsoxei64.v v8, (zero), v10, v0.t976; RV64-NEXT: ret977 call void @llvm.vp.scatter.v4bf16.v4p0(<4 x bfloat> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 %evl)978 ret void979}980 981define void @vpscatter_truemask_v4bf16(<4 x bfloat> %val, <4 x ptr> %ptrs, i32 zeroext %evl) {982; RV32-LABEL: vpscatter_truemask_v4bf16:983; RV32: # %bb.0:984; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, ma985; RV32-NEXT: vsoxei32.v v8, (zero), v9986; RV32-NEXT: ret987;988; RV64-LABEL: vpscatter_truemask_v4bf16:989; RV64: # %bb.0:990; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, ma991; RV64-NEXT: vsoxei64.v v8, (zero), v10992; RV64-NEXT: ret993 call void @llvm.vp.scatter.v4bf16.v4p0(<4 x bfloat> %val, <4 x ptr> %ptrs, <4 x i1> splat (i1 1), i32 %evl)994 ret void995}996 997define void @vpscatter_v8bf16(<8 x bfloat> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 zeroext %evl) {998; RV32-LABEL: vpscatter_v8bf16:999; RV32: # %bb.0:1000; RV32-NEXT: vsetvli zero, a0, e16, m1, ta, ma1001; RV32-NEXT: vsoxei32.v v8, (zero), v10, v0.t1002; RV32-NEXT: ret1003;1004; RV64-LABEL: vpscatter_v8bf16:1005; RV64: # %bb.0:1006; RV64-NEXT: vsetvli zero, a0, e16, m1, ta, ma1007; RV64-NEXT: vsoxei64.v v8, (zero), v12, v0.t1008; RV64-NEXT: ret1009 call void @llvm.vp.scatter.v8bf16.v8p0(<8 x bfloat> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1010 ret void1011}1012 1013define void @vpscatter_v2f16(<2 x half> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {1014; RV32-LABEL: vpscatter_v2f16:1015; RV32: # %bb.0:1016; RV32-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1017; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t1018; RV32-NEXT: ret1019;1020; RV64-LABEL: vpscatter_v2f16:1021; RV64: # %bb.0:1022; RV64-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1023; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t1024; RV64-NEXT: ret1025 call void @llvm.vp.scatter.v2f16.v2p0(<2 x half> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)1026 ret void1027}1028 1029define void @vpscatter_v4f16(<4 x half> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 zeroext %evl) {1030; RV32-LABEL: vpscatter_v4f16:1031; RV32: # %bb.0:1032; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1033; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t1034; RV32-NEXT: ret1035;1036; RV64-LABEL: vpscatter_v4f16:1037; RV64: # %bb.0:1038; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1039; RV64-NEXT: vsoxei64.v v8, (zero), v10, v0.t1040; RV64-NEXT: ret1041 call void @llvm.vp.scatter.v4f16.v4p0(<4 x half> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 %evl)1042 ret void1043}1044 1045define void @vpscatter_truemask_v4f16(<4 x half> %val, <4 x ptr> %ptrs, i32 zeroext %evl) {1046; RV32-LABEL: vpscatter_truemask_v4f16:1047; RV32: # %bb.0:1048; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1049; RV32-NEXT: vsoxei32.v v8, (zero), v91050; RV32-NEXT: ret1051;1052; RV64-LABEL: vpscatter_truemask_v4f16:1053; RV64: # %bb.0:1054; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1055; RV64-NEXT: vsoxei64.v v8, (zero), v101056; RV64-NEXT: ret1057 call void @llvm.vp.scatter.v4f16.v4p0(<4 x half> %val, <4 x ptr> %ptrs, <4 x i1> splat (i1 1), i32 %evl)1058 ret void1059}1060 1061define void @vpscatter_v8f16(<8 x half> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 zeroext %evl) {1062; RV32-LABEL: vpscatter_v8f16:1063; RV32: # %bb.0:1064; RV32-NEXT: vsetvli zero, a0, e16, m1, ta, ma1065; RV32-NEXT: vsoxei32.v v8, (zero), v10, v0.t1066; RV32-NEXT: ret1067;1068; RV64-LABEL: vpscatter_v8f16:1069; RV64: # %bb.0:1070; RV64-NEXT: vsetvli zero, a0, e16, m1, ta, ma1071; RV64-NEXT: vsoxei64.v v8, (zero), v12, v0.t1072; RV64-NEXT: ret1073 call void @llvm.vp.scatter.v8f16.v8p0(<8 x half> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1074 ret void1075}1076 1077define void @vpscatter_baseidx_v8i8_v8f16(<8 x half> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {1078; RV32-LABEL: vpscatter_baseidx_v8i8_v8f16:1079; RV32: # %bb.0:1080; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma1081; RV32-NEXT: vsext.vf4 v10, v91082; RV32-NEXT: vadd.vv v10, v10, v101083; RV32-NEXT: vsetvli zero, a1, e16, m1, ta, ma1084; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t1085; RV32-NEXT: ret1086;1087; RV64-LABEL: vpscatter_baseidx_v8i8_v8f16:1088; RV64: # %bb.0:1089; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1090; RV64-NEXT: vsext.vf8 v12, v91091; RV64-NEXT: vadd.vv v12, v12, v121092; RV64-NEXT: vsetvli zero, a1, e16, m1, ta, ma1093; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1094; RV64-NEXT: ret1095 %ptrs = getelementptr inbounds half, ptr %base, <8 x i8> %idxs1096 call void @llvm.vp.scatter.v8f16.v8p0(<8 x half> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1097 ret void1098}1099 1100define void @vpscatter_baseidx_sext_v8i8_v8f16(<8 x half> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {1101; RV32-LABEL: vpscatter_baseidx_sext_v8i8_v8f16:1102; RV32: # %bb.0:1103; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma1104; RV32-NEXT: vsext.vf4 v10, v91105; RV32-NEXT: vadd.vv v10, v10, v101106; RV32-NEXT: vsetvli zero, a1, e16, m1, ta, ma1107; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t1108; RV32-NEXT: ret1109;1110; RV64-LABEL: vpscatter_baseidx_sext_v8i8_v8f16:1111; RV64: # %bb.0:1112; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1113; RV64-NEXT: vsext.vf8 v12, v91114; RV64-NEXT: vadd.vv v12, v12, v121115; RV64-NEXT: vsetvli zero, a1, e16, m1, ta, ma1116; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1117; RV64-NEXT: ret1118 %eidxs = sext <8 x i8> %idxs to <8 x i16>1119 %ptrs = getelementptr inbounds half, ptr %base, <8 x i16> %eidxs1120 call void @llvm.vp.scatter.v8f16.v8p0(<8 x half> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1121 ret void1122}1123 1124define void @vpscatter_baseidx_zext_v8i8_v8f16(<8 x half> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {1125; RV32-LABEL: vpscatter_baseidx_zext_v8i8_v8f16:1126; RV32: # %bb.0:1127; RV32-NEXT: vsetivli zero, 8, e8, mf2, ta, ma1128; RV32-NEXT: vwaddu.vv v10, v9, v91129; RV32-NEXT: vsetvli zero, a1, e16, m1, ta, ma1130; RV32-NEXT: vsoxei16.v v8, (a0), v10, v0.t1131; RV32-NEXT: ret1132;1133; RV64-LABEL: vpscatter_baseidx_zext_v8i8_v8f16:1134; RV64: # %bb.0:1135; RV64-NEXT: vsetivli zero, 8, e8, mf2, ta, ma1136; RV64-NEXT: vwaddu.vv v10, v9, v91137; RV64-NEXT: vsetvli zero, a1, e16, m1, ta, ma1138; RV64-NEXT: vsoxei16.v v8, (a0), v10, v0.t1139; RV64-NEXT: ret1140 %eidxs = zext <8 x i8> %idxs to <8 x i16>1141 %ptrs = getelementptr inbounds half, ptr %base, <8 x i16> %eidxs1142 call void @llvm.vp.scatter.v8f16.v8p0(<8 x half> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1143 ret void1144}1145 1146define void @vpscatter_baseidx_v8f16(<8 x half> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {1147; RV32-LABEL: vpscatter_baseidx_v8f16:1148; RV32: # %bb.0:1149; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma1150; RV32-NEXT: vwadd.vv v10, v9, v91151; RV32-NEXT: vsetvli zero, a1, e16, m1, ta, ma1152; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t1153; RV32-NEXT: ret1154;1155; RV64-LABEL: vpscatter_baseidx_v8f16:1156; RV64: # %bb.0:1157; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1158; RV64-NEXT: vsext.vf4 v12, v91159; RV64-NEXT: vadd.vv v12, v12, v121160; RV64-NEXT: vsetvli zero, a1, e16, m1, ta, ma1161; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1162; RV64-NEXT: ret1163 %ptrs = getelementptr inbounds half, ptr %base, <8 x i16> %idxs1164 call void @llvm.vp.scatter.v8f16.v8p0(<8 x half> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1165 ret void1166}1167 1168define void @vpscatter_v2f32(<2 x float> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {1169; RV32-LABEL: vpscatter_v2f32:1170; RV32: # %bb.0:1171; RV32-NEXT: vsetvli zero, a0, e32, mf2, ta, ma1172; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t1173; RV32-NEXT: ret1174;1175; RV64-LABEL: vpscatter_v2f32:1176; RV64: # %bb.0:1177; RV64-NEXT: vsetvli zero, a0, e32, mf2, ta, ma1178; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t1179; RV64-NEXT: ret1180 call void @llvm.vp.scatter.v2f32.v2p0(<2 x float> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)1181 ret void1182}1183 1184define void @vpscatter_v4f32(<4 x float> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 zeroext %evl) {1185; RV32-LABEL: vpscatter_v4f32:1186; RV32: # %bb.0:1187; RV32-NEXT: vsetvli zero, a0, e32, m1, ta, ma1188; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t1189; RV32-NEXT: ret1190;1191; RV64-LABEL: vpscatter_v4f32:1192; RV64: # %bb.0:1193; RV64-NEXT: vsetvli zero, a0, e32, m1, ta, ma1194; RV64-NEXT: vsoxei64.v v8, (zero), v10, v0.t1195; RV64-NEXT: ret1196 call void @llvm.vp.scatter.v4f32.v4p0(<4 x float> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 %evl)1197 ret void1198}1199 1200define void @vpscatter_truemask_v4f32(<4 x float> %val, <4 x ptr> %ptrs, i32 zeroext %evl) {1201; RV32-LABEL: vpscatter_truemask_v4f32:1202; RV32: # %bb.0:1203; RV32-NEXT: vsetvli zero, a0, e32, m1, ta, ma1204; RV32-NEXT: vsoxei32.v v8, (zero), v91205; RV32-NEXT: ret1206;1207; RV64-LABEL: vpscatter_truemask_v4f32:1208; RV64: # %bb.0:1209; RV64-NEXT: vsetvli zero, a0, e32, m1, ta, ma1210; RV64-NEXT: vsoxei64.v v8, (zero), v101211; RV64-NEXT: ret1212 call void @llvm.vp.scatter.v4f32.v4p0(<4 x float> %val, <4 x ptr> %ptrs, <4 x i1> splat (i1 1), i32 %evl)1213 ret void1214}1215 1216define void @vpscatter_v8f32(<8 x float> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 zeroext %evl) {1217; RV32-LABEL: vpscatter_v8f32:1218; RV32: # %bb.0:1219; RV32-NEXT: vsetvli zero, a0, e32, m2, ta, ma1220; RV32-NEXT: vsoxei32.v v8, (zero), v10, v0.t1221; RV32-NEXT: ret1222;1223; RV64-LABEL: vpscatter_v8f32:1224; RV64: # %bb.0:1225; RV64-NEXT: vsetvli zero, a0, e32, m2, ta, ma1226; RV64-NEXT: vsoxei64.v v8, (zero), v12, v0.t1227; RV64-NEXT: ret1228 call void @llvm.vp.scatter.v8f32.v8p0(<8 x float> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1229 ret void1230}1231 1232define void @vpscatter_baseidx_v8i8_v8f32(<8 x float> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {1233; RV32-LABEL: vpscatter_baseidx_v8i8_v8f32:1234; RV32: # %bb.0:1235; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma1236; RV32-NEXT: vsext.vf4 v12, v101237; RV32-NEXT: vsll.vi v10, v12, 21238; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma1239; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t1240; RV32-NEXT: ret1241;1242; RV64-LABEL: vpscatter_baseidx_v8i8_v8f32:1243; RV64: # %bb.0:1244; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1245; RV64-NEXT: vsext.vf8 v12, v101246; RV64-NEXT: vsll.vi v12, v12, 21247; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma1248; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1249; RV64-NEXT: ret1250 %ptrs = getelementptr inbounds float, ptr %base, <8 x i8> %idxs1251 call void @llvm.vp.scatter.v8f32.v8p0(<8 x float> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1252 ret void1253}1254 1255define void @vpscatter_baseidx_sext_v8i8_v8f32(<8 x float> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {1256; RV32-LABEL: vpscatter_baseidx_sext_v8i8_v8f32:1257; RV32: # %bb.0:1258; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma1259; RV32-NEXT: vsext.vf4 v12, v101260; RV32-NEXT: vsll.vi v10, v12, 21261; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma1262; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t1263; RV32-NEXT: ret1264;1265; RV64-LABEL: vpscatter_baseidx_sext_v8i8_v8f32:1266; RV64: # %bb.0:1267; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1268; RV64-NEXT: vsext.vf8 v12, v101269; RV64-NEXT: vsll.vi v12, v12, 21270; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma1271; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1272; RV64-NEXT: ret1273 %eidxs = sext <8 x i8> %idxs to <8 x i32>1274 %ptrs = getelementptr inbounds float, ptr %base, <8 x i32> %eidxs1275 call void @llvm.vp.scatter.v8f32.v8p0(<8 x float> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1276 ret void1277}1278 1279define void @vpscatter_baseidx_zext_v8i8_v8f32(<8 x float> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {1280; RV32-LABEL: vpscatter_baseidx_zext_v8i8_v8f32:1281; RV32: # %bb.0:1282; RV32-NEXT: li a2, 41283; RV32-NEXT: vsetivli zero, 8, e8, mf2, ta, ma1284; RV32-NEXT: vwmulu.vx v11, v10, a21285; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma1286; RV32-NEXT: vsoxei16.v v8, (a0), v11, v0.t1287; RV32-NEXT: ret1288;1289; RV64-LABEL: vpscatter_baseidx_zext_v8i8_v8f32:1290; RV64: # %bb.0:1291; RV64-NEXT: li a2, 41292; RV64-NEXT: vsetivli zero, 8, e8, mf2, ta, ma1293; RV64-NEXT: vwmulu.vx v11, v10, a21294; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma1295; RV64-NEXT: vsoxei16.v v8, (a0), v11, v0.t1296; RV64-NEXT: ret1297 %eidxs = zext <8 x i8> %idxs to <8 x i32>1298 %ptrs = getelementptr inbounds float, ptr %base, <8 x i32> %eidxs1299 call void @llvm.vp.scatter.v8f32.v8p0(<8 x float> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1300 ret void1301}1302 1303define void @vpscatter_baseidx_v8i16_v8f32(<8 x float> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {1304; RV32-LABEL: vpscatter_baseidx_v8i16_v8f32:1305; RV32: # %bb.0:1306; RV32-NEXT: li a2, 41307; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma1308; RV32-NEXT: vwmulsu.vx v12, v10, a21309; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma1310; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t1311; RV32-NEXT: ret1312;1313; RV64-LABEL: vpscatter_baseidx_v8i16_v8f32:1314; RV64: # %bb.0:1315; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1316; RV64-NEXT: vsext.vf4 v12, v101317; RV64-NEXT: vsll.vi v12, v12, 21318; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma1319; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1320; RV64-NEXT: ret1321 %ptrs = getelementptr inbounds float, ptr %base, <8 x i16> %idxs1322 call void @llvm.vp.scatter.v8f32.v8p0(<8 x float> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1323 ret void1324}1325 1326define void @vpscatter_baseidx_sext_v8i16_v8f32(<8 x float> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {1327; RV32-LABEL: vpscatter_baseidx_sext_v8i16_v8f32:1328; RV32: # %bb.0:1329; RV32-NEXT: li a2, 41330; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma1331; RV32-NEXT: vwmulsu.vx v12, v10, a21332; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma1333; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t1334; RV32-NEXT: ret1335;1336; RV64-LABEL: vpscatter_baseidx_sext_v8i16_v8f32:1337; RV64: # %bb.0:1338; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1339; RV64-NEXT: vsext.vf4 v12, v101340; RV64-NEXT: vsll.vi v12, v12, 21341; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma1342; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1343; RV64-NEXT: ret1344 %eidxs = sext <8 x i16> %idxs to <8 x i32>1345 %ptrs = getelementptr inbounds float, ptr %base, <8 x i32> %eidxs1346 call void @llvm.vp.scatter.v8f32.v8p0(<8 x float> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1347 ret void1348}1349 1350define void @vpscatter_baseidx_zext_v8i16_v8f32(<8 x float> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {1351; RV32-LABEL: vpscatter_baseidx_zext_v8i16_v8f32:1352; RV32: # %bb.0:1353; RV32-NEXT: li a2, 41354; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma1355; RV32-NEXT: vwmulu.vx v12, v10, a21356; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma1357; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t1358; RV32-NEXT: ret1359;1360; RV64-LABEL: vpscatter_baseidx_zext_v8i16_v8f32:1361; RV64: # %bb.0:1362; RV64-NEXT: li a2, 41363; RV64-NEXT: vsetivli zero, 8, e16, m1, ta, ma1364; RV64-NEXT: vwmulu.vx v12, v10, a21365; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma1366; RV64-NEXT: vsoxei32.v v8, (a0), v12, v0.t1367; RV64-NEXT: ret1368 %eidxs = zext <8 x i16> %idxs to <8 x i32>1369 %ptrs = getelementptr inbounds float, ptr %base, <8 x i32> %eidxs1370 call void @llvm.vp.scatter.v8f32.v8p0(<8 x float> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1371 ret void1372}1373 1374define void @vpscatter_baseidx_v8f32(<8 x float> %val, ptr %base, <8 x i32> %idxs, <8 x i1> %m, i32 zeroext %evl) {1375; RV32-LABEL: vpscatter_baseidx_v8f32:1376; RV32: # %bb.0:1377; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma1378; RV32-NEXT: vsll.vi v10, v10, 21379; RV32-NEXT: vsetvli zero, a1, e32, m2, ta, ma1380; RV32-NEXT: vsoxei32.v v8, (a0), v10, v0.t1381; RV32-NEXT: ret1382;1383; RV64-LABEL: vpscatter_baseidx_v8f32:1384; RV64: # %bb.0:1385; RV64-NEXT: li a2, 41386; RV64-NEXT: vsetivli zero, 8, e32, m2, ta, ma1387; RV64-NEXT: vwmulsu.vx v12, v10, a21388; RV64-NEXT: vsetvli zero, a1, e32, m2, ta, ma1389; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1390; RV64-NEXT: ret1391 %ptrs = getelementptr inbounds float, ptr %base, <8 x i32> %idxs1392 call void @llvm.vp.scatter.v8f32.v8p0(<8 x float> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1393 ret void1394}1395 1396define void @vpscatter_v2f64(<2 x double> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 zeroext %evl) {1397; RV32-LABEL: vpscatter_v2f64:1398; RV32: # %bb.0:1399; RV32-NEXT: vsetvli zero, a0, e64, m1, ta, ma1400; RV32-NEXT: vsoxei32.v v8, (zero), v9, v0.t1401; RV32-NEXT: ret1402;1403; RV64-LABEL: vpscatter_v2f64:1404; RV64: # %bb.0:1405; RV64-NEXT: vsetvli zero, a0, e64, m1, ta, ma1406; RV64-NEXT: vsoxei64.v v8, (zero), v9, v0.t1407; RV64-NEXT: ret1408 call void @llvm.vp.scatter.v2f64.v2p0(<2 x double> %val, <2 x ptr> %ptrs, <2 x i1> %m, i32 %evl)1409 ret void1410}1411 1412define void @vpscatter_v4f64(<4 x double> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 zeroext %evl) {1413; RV32-LABEL: vpscatter_v4f64:1414; RV32: # %bb.0:1415; RV32-NEXT: vsetvli zero, a0, e64, m2, ta, ma1416; RV32-NEXT: vsoxei32.v v8, (zero), v10, v0.t1417; RV32-NEXT: ret1418;1419; RV64-LABEL: vpscatter_v4f64:1420; RV64: # %bb.0:1421; RV64-NEXT: vsetvli zero, a0, e64, m2, ta, ma1422; RV64-NEXT: vsoxei64.v v8, (zero), v10, v0.t1423; RV64-NEXT: ret1424 call void @llvm.vp.scatter.v4f64.v4p0(<4 x double> %val, <4 x ptr> %ptrs, <4 x i1> %m, i32 %evl)1425 ret void1426}1427 1428define void @vpscatter_truemask_v4f64(<4 x double> %val, <4 x ptr> %ptrs, i32 zeroext %evl) {1429; RV32-LABEL: vpscatter_truemask_v4f64:1430; RV32: # %bb.0:1431; RV32-NEXT: vsetvli zero, a0, e64, m2, ta, ma1432; RV32-NEXT: vsoxei32.v v8, (zero), v101433; RV32-NEXT: ret1434;1435; RV64-LABEL: vpscatter_truemask_v4f64:1436; RV64: # %bb.0:1437; RV64-NEXT: vsetvli zero, a0, e64, m2, ta, ma1438; RV64-NEXT: vsoxei64.v v8, (zero), v101439; RV64-NEXT: ret1440 call void @llvm.vp.scatter.v4f64.v4p0(<4 x double> %val, <4 x ptr> %ptrs, <4 x i1> splat (i1 1), i32 %evl)1441 ret void1442}1443 1444define void @vpscatter_v8f64(<8 x double> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 zeroext %evl) {1445; RV32-LABEL: vpscatter_v8f64:1446; RV32: # %bb.0:1447; RV32-NEXT: vsetvli zero, a0, e64, m4, ta, ma1448; RV32-NEXT: vsoxei32.v v8, (zero), v12, v0.t1449; RV32-NEXT: ret1450;1451; RV64-LABEL: vpscatter_v8f64:1452; RV64: # %bb.0:1453; RV64-NEXT: vsetvli zero, a0, e64, m4, ta, ma1454; RV64-NEXT: vsoxei64.v v8, (zero), v12, v0.t1455; RV64-NEXT: ret1456 call void @llvm.vp.scatter.v8f64.v8p0(<8 x double> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1457 ret void1458}1459 1460define void @vpscatter_baseidx_v8i8_v8f64(<8 x double> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {1461; RV32-LABEL: vpscatter_baseidx_v8i8_v8f64:1462; RV32: # %bb.0:1463; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma1464; RV32-NEXT: vsext.vf4 v14, v121465; RV32-NEXT: vsll.vi v12, v14, 31466; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma1467; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t1468; RV32-NEXT: ret1469;1470; RV64-LABEL: vpscatter_baseidx_v8i8_v8f64:1471; RV64: # %bb.0:1472; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1473; RV64-NEXT: vsext.vf8 v16, v121474; RV64-NEXT: vsll.vi v12, v16, 31475; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1476; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1477; RV64-NEXT: ret1478 %ptrs = getelementptr inbounds double, ptr %base, <8 x i8> %idxs1479 call void @llvm.vp.scatter.v8f64.v8p0(<8 x double> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1480 ret void1481}1482 1483define void @vpscatter_baseidx_sext_v8i8_v8f64(<8 x double> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {1484; RV32-LABEL: vpscatter_baseidx_sext_v8i8_v8f64:1485; RV32: # %bb.0:1486; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma1487; RV32-NEXT: vsext.vf4 v14, v121488; RV32-NEXT: vsll.vi v12, v14, 31489; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma1490; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t1491; RV32-NEXT: ret1492;1493; RV64-LABEL: vpscatter_baseidx_sext_v8i8_v8f64:1494; RV64: # %bb.0:1495; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1496; RV64-NEXT: vsext.vf8 v16, v121497; RV64-NEXT: vsll.vi v12, v16, 31498; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1499; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1500; RV64-NEXT: ret1501 %eidxs = sext <8 x i8> %idxs to <8 x i64>1502 %ptrs = getelementptr inbounds double, ptr %base, <8 x i64> %eidxs1503 call void @llvm.vp.scatter.v8f64.v8p0(<8 x double> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1504 ret void1505}1506 1507define void @vpscatter_baseidx_zext_v8i8_v8f64(<8 x double> %val, ptr %base, <8 x i8> %idxs, <8 x i1> %m, i32 zeroext %evl) {1508; RV32-LABEL: vpscatter_baseidx_zext_v8i8_v8f64:1509; RV32: # %bb.0:1510; RV32-NEXT: li a2, 81511; RV32-NEXT: vsetivli zero, 8, e8, mf2, ta, ma1512; RV32-NEXT: vwmulu.vx v13, v12, a21513; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma1514; RV32-NEXT: vsoxei16.v v8, (a0), v13, v0.t1515; RV32-NEXT: ret1516;1517; RV64-LABEL: vpscatter_baseidx_zext_v8i8_v8f64:1518; RV64: # %bb.0:1519; RV64-NEXT: li a2, 81520; RV64-NEXT: vsetivli zero, 8, e8, mf2, ta, ma1521; RV64-NEXT: vwmulu.vx v13, v12, a21522; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1523; RV64-NEXT: vsoxei16.v v8, (a0), v13, v0.t1524; RV64-NEXT: ret1525 %eidxs = zext <8 x i8> %idxs to <8 x i64>1526 %ptrs = getelementptr inbounds double, ptr %base, <8 x i64> %eidxs1527 call void @llvm.vp.scatter.v8f64.v8p0(<8 x double> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1528 ret void1529}1530 1531define void @vpscatter_baseidx_v8i16_v8f64(<8 x double> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {1532; RV32-LABEL: vpscatter_baseidx_v8i16_v8f64:1533; RV32: # %bb.0:1534; RV32-NEXT: li a2, 81535; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma1536; RV32-NEXT: vwmulsu.vx v14, v12, a21537; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma1538; RV32-NEXT: vsoxei32.v v8, (a0), v14, v0.t1539; RV32-NEXT: ret1540;1541; RV64-LABEL: vpscatter_baseidx_v8i16_v8f64:1542; RV64: # %bb.0:1543; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1544; RV64-NEXT: vsext.vf4 v16, v121545; RV64-NEXT: vsll.vi v12, v16, 31546; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1547; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1548; RV64-NEXT: ret1549 %ptrs = getelementptr inbounds double, ptr %base, <8 x i16> %idxs1550 call void @llvm.vp.scatter.v8f64.v8p0(<8 x double> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1551 ret void1552}1553 1554define void @vpscatter_baseidx_sext_v8i16_v8f64(<8 x double> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {1555; RV32-LABEL: vpscatter_baseidx_sext_v8i16_v8f64:1556; RV32: # %bb.0:1557; RV32-NEXT: li a2, 81558; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma1559; RV32-NEXT: vwmulsu.vx v14, v12, a21560; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma1561; RV32-NEXT: vsoxei32.v v8, (a0), v14, v0.t1562; RV32-NEXT: ret1563;1564; RV64-LABEL: vpscatter_baseidx_sext_v8i16_v8f64:1565; RV64: # %bb.0:1566; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1567; RV64-NEXT: vsext.vf4 v16, v121568; RV64-NEXT: vsll.vi v12, v16, 31569; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1570; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1571; RV64-NEXT: ret1572 %eidxs = sext <8 x i16> %idxs to <8 x i64>1573 %ptrs = getelementptr inbounds double, ptr %base, <8 x i64> %eidxs1574 call void @llvm.vp.scatter.v8f64.v8p0(<8 x double> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1575 ret void1576}1577 1578define void @vpscatter_baseidx_zext_v8i16_v8f64(<8 x double> %val, ptr %base, <8 x i16> %idxs, <8 x i1> %m, i32 zeroext %evl) {1579; RV32-LABEL: vpscatter_baseidx_zext_v8i16_v8f64:1580; RV32: # %bb.0:1581; RV32-NEXT: li a2, 81582; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma1583; RV32-NEXT: vwmulu.vx v14, v12, a21584; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma1585; RV32-NEXT: vsoxei32.v v8, (a0), v14, v0.t1586; RV32-NEXT: ret1587;1588; RV64-LABEL: vpscatter_baseidx_zext_v8i16_v8f64:1589; RV64: # %bb.0:1590; RV64-NEXT: li a2, 81591; RV64-NEXT: vsetivli zero, 8, e16, m1, ta, ma1592; RV64-NEXT: vwmulu.vx v14, v12, a21593; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1594; RV64-NEXT: vsoxei32.v v8, (a0), v14, v0.t1595; RV64-NEXT: ret1596 %eidxs = zext <8 x i16> %idxs to <8 x i64>1597 %ptrs = getelementptr inbounds double, ptr %base, <8 x i64> %eidxs1598 call void @llvm.vp.scatter.v8f64.v8p0(<8 x double> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1599 ret void1600}1601 1602define void @vpscatter_baseidx_v8i32_v8f64(<8 x double> %val, ptr %base, <8 x i32> %idxs, <8 x i1> %m, i32 zeroext %evl) {1603; RV32-LABEL: vpscatter_baseidx_v8i32_v8f64:1604; RV32: # %bb.0:1605; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma1606; RV32-NEXT: vsll.vi v12, v12, 31607; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma1608; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t1609; RV32-NEXT: ret1610;1611; RV64-LABEL: vpscatter_baseidx_v8i32_v8f64:1612; RV64: # %bb.0:1613; RV64-NEXT: li a2, 81614; RV64-NEXT: vsetivli zero, 8, e32, m2, ta, ma1615; RV64-NEXT: vwmulsu.vx v16, v12, a21616; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1617; RV64-NEXT: vsoxei64.v v8, (a0), v16, v0.t1618; RV64-NEXT: ret1619 %ptrs = getelementptr inbounds double, ptr %base, <8 x i32> %idxs1620 call void @llvm.vp.scatter.v8f64.v8p0(<8 x double> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1621 ret void1622}1623 1624define void @vpscatter_baseidx_sext_v8i32_v8f64(<8 x double> %val, ptr %base, <8 x i32> %idxs, <8 x i1> %m, i32 zeroext %evl) {1625; RV32-LABEL: vpscatter_baseidx_sext_v8i32_v8f64:1626; RV32: # %bb.0:1627; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma1628; RV32-NEXT: vsll.vi v12, v12, 31629; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma1630; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t1631; RV32-NEXT: ret1632;1633; RV64-LABEL: vpscatter_baseidx_sext_v8i32_v8f64:1634; RV64: # %bb.0:1635; RV64-NEXT: li a2, 81636; RV64-NEXT: vsetivli zero, 8, e32, m2, ta, ma1637; RV64-NEXT: vwmulsu.vx v16, v12, a21638; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1639; RV64-NEXT: vsoxei64.v v8, (a0), v16, v0.t1640; RV64-NEXT: ret1641 %eidxs = sext <8 x i32> %idxs to <8 x i64>1642 %ptrs = getelementptr inbounds double, ptr %base, <8 x i64> %eidxs1643 call void @llvm.vp.scatter.v8f64.v8p0(<8 x double> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1644 ret void1645}1646 1647define void @vpscatter_baseidx_zext_v8i32_v8f64(<8 x double> %val, ptr %base, <8 x i32> %idxs, <8 x i1> %m, i32 zeroext %evl) {1648; RV32-LABEL: vpscatter_baseidx_zext_v8i32_v8f64:1649; RV32: # %bb.0:1650; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma1651; RV32-NEXT: vsll.vi v12, v12, 31652; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma1653; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t1654; RV32-NEXT: ret1655;1656; RV64-LABEL: vpscatter_baseidx_zext_v8i32_v8f64:1657; RV64: # %bb.0:1658; RV64-NEXT: li a2, 81659; RV64-NEXT: vsetivli zero, 8, e32, m2, ta, ma1660; RV64-NEXT: vwmulu.vx v16, v12, a21661; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1662; RV64-NEXT: vsoxei64.v v8, (a0), v16, v0.t1663; RV64-NEXT: ret1664 %eidxs = zext <8 x i32> %idxs to <8 x i64>1665 %ptrs = getelementptr inbounds double, ptr %base, <8 x i64> %eidxs1666 call void @llvm.vp.scatter.v8f64.v8p0(<8 x double> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1667 ret void1668}1669 1670define void @vpscatter_baseidx_v8f64(<8 x double> %val, ptr %base, <8 x i64> %idxs, <8 x i1> %m, i32 zeroext %evl) {1671; RV32-LABEL: vpscatter_baseidx_v8f64:1672; RV32: # %bb.0:1673; RV32-NEXT: vsetivli zero, 8, e32, m2, ta, ma1674; RV32-NEXT: vnsrl.wi v16, v12, 01675; RV32-NEXT: vsll.vi v12, v16, 31676; RV32-NEXT: vsetvli zero, a1, e64, m4, ta, ma1677; RV32-NEXT: vsoxei32.v v8, (a0), v12, v0.t1678; RV32-NEXT: ret1679;1680; RV64-LABEL: vpscatter_baseidx_v8f64:1681; RV64: # %bb.0:1682; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma1683; RV64-NEXT: vsll.vi v12, v12, 31684; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1685; RV64-NEXT: vsoxei64.v v8, (a0), v12, v0.t1686; RV64-NEXT: ret1687 %ptrs = getelementptr inbounds double, ptr %base, <8 x i64> %idxs1688 call void @llvm.vp.scatter.v8f64.v8p0(<8 x double> %val, <8 x ptr> %ptrs, <8 x i1> %m, i32 %evl)1689 ret void1690}1691 1692define void @vpscatter_v32f64(<32 x double> %val, <32 x ptr> %ptrs, <32 x i1> %m, i32 zeroext %evl) {1693; RV32-LABEL: vpscatter_v32f64:1694; RV32: # %bb.0:1695; RV32-NEXT: li a2, 321696; RV32-NEXT: vsetvli zero, a2, e32, m8, ta, ma1697; RV32-NEXT: vle32.v v24, (a0)1698; RV32-NEXT: li a2, 161699; RV32-NEXT: mv a0, a11700; RV32-NEXT: bltu a1, a2, .LBB83_21701; RV32-NEXT: # %bb.1:1702; RV32-NEXT: li a0, 161703; RV32-NEXT: .LBB83_2:1704; RV32-NEXT: vsetvli zero, a0, e64, m8, ta, ma1705; RV32-NEXT: vsoxei32.v v8, (zero), v24, v0.t1706; RV32-NEXT: addi a0, a1, -161707; RV32-NEXT: vsetivli zero, 2, e8, mf4, ta, ma1708; RV32-NEXT: vslidedown.vi v0, v0, 21709; RV32-NEXT: sltu a1, a1, a01710; RV32-NEXT: addi a1, a1, -11711; RV32-NEXT: and a0, a1, a01712; RV32-NEXT: vsetivli zero, 16, e32, m8, ta, ma1713; RV32-NEXT: vslidedown.vi v8, v24, 161714; RV32-NEXT: vsetvli zero, a0, e64, m8, ta, ma1715; RV32-NEXT: vsoxei32.v v16, (zero), v8, v0.t1716; RV32-NEXT: ret1717;1718; RV64-LABEL: vpscatter_v32f64:1719; RV64: # %bb.0:1720; RV64-NEXT: addi sp, sp, -161721; RV64-NEXT: .cfi_def_cfa_offset 161722; RV64-NEXT: csrr a1, vlenb1723; RV64-NEXT: slli a1, a1, 31724; RV64-NEXT: sub sp, sp, a11725; RV64-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1726; RV64-NEXT: addi a1, sp, 161727; RV64-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill1728; RV64-NEXT: addi a1, a0, 1281729; RV64-NEXT: vsetivli zero, 16, e64, m8, ta, ma1730; RV64-NEXT: vle64.v v16, (a1)1731; RV64-NEXT: vle64.v v24, (a0)1732; RV64-NEXT: li a1, 161733; RV64-NEXT: mv a0, a21734; RV64-NEXT: bltu a2, a1, .LBB83_21735; RV64-NEXT: # %bb.1:1736; RV64-NEXT: li a0, 161737; RV64-NEXT: .LBB83_2:1738; RV64-NEXT: vsetvli zero, a0, e64, m8, ta, ma1739; RV64-NEXT: vsoxei64.v v8, (zero), v24, v0.t1740; RV64-NEXT: addi a0, a2, -161741; RV64-NEXT: sltu a1, a2, a01742; RV64-NEXT: addi a1, a1, -11743; RV64-NEXT: vsetivli zero, 2, e8, mf4, ta, ma1744; RV64-NEXT: vslidedown.vi v0, v0, 21745; RV64-NEXT: and a0, a1, a01746; RV64-NEXT: addi a1, sp, 161747; RV64-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload1748; RV64-NEXT: vsetvli zero, a0, e64, m8, ta, ma1749; RV64-NEXT: vsoxei64.v v8, (zero), v16, v0.t1750; RV64-NEXT: csrr a0, vlenb1751; RV64-NEXT: slli a0, a0, 31752; RV64-NEXT: add sp, sp, a01753; RV64-NEXT: .cfi_def_cfa sp, 161754; RV64-NEXT: addi sp, sp, 161755; RV64-NEXT: .cfi_def_cfa_offset 01756; RV64-NEXT: ret1757 call void @llvm.vp.scatter.v32f64.v32p0(<32 x double> %val, <32 x ptr> %ptrs, <32 x i1> %m, i32 %evl)1758 ret void1759}1760 1761define void @vpscatter_baseidx_v32i32_v32f64(<32 x double> %val, ptr %base, <32 x i32> %idxs, <32 x i1> %m, i32 zeroext %evl) {1762; RV32-LABEL: vpscatter_baseidx_v32i32_v32f64:1763; RV32: # %bb.0:1764; RV32-NEXT: li a3, 321765; RV32-NEXT: vsetvli zero, a3, e32, m8, ta, ma1766; RV32-NEXT: vle32.v v24, (a1)1767; RV32-NEXT: li a3, 161768; RV32-NEXT: vsll.vi v24, v24, 31769; RV32-NEXT: mv a1, a21770; RV32-NEXT: bltu a2, a3, .LBB84_21771; RV32-NEXT: # %bb.1:1772; RV32-NEXT: li a1, 161773; RV32-NEXT: .LBB84_2:1774; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, ma1775; RV32-NEXT: vsoxei32.v v8, (a0), v24, v0.t1776; RV32-NEXT: addi a1, a2, -161777; RV32-NEXT: vsetivli zero, 2, e8, mf4, ta, ma1778; RV32-NEXT: vslidedown.vi v0, v0, 21779; RV32-NEXT: sltu a2, a2, a11780; RV32-NEXT: addi a2, a2, -11781; RV32-NEXT: and a1, a2, a11782; RV32-NEXT: vsetivli zero, 16, e32, m8, ta, ma1783; RV32-NEXT: vslidedown.vi v8, v24, 161784; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, ma1785; RV32-NEXT: vsoxei32.v v16, (a0), v8, v0.t1786; RV32-NEXT: ret1787;1788; RV64-LABEL: vpscatter_baseidx_v32i32_v32f64:1789; RV64: # %bb.0:1790; RV64-NEXT: addi sp, sp, -161791; RV64-NEXT: .cfi_def_cfa_offset 161792; RV64-NEXT: csrr a3, vlenb1793; RV64-NEXT: slli a3, a3, 41794; RV64-NEXT: sub sp, sp, a31795; RV64-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb1796; RV64-NEXT: csrr a3, vlenb1797; RV64-NEXT: slli a3, a3, 31798; RV64-NEXT: add a3, sp, a31799; RV64-NEXT: addi a3, a3, 161800; RV64-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1801; RV64-NEXT: addi a3, sp, 161802; RV64-NEXT: vs8r.v v8, (a3) # vscale x 64-byte Folded Spill1803; RV64-NEXT: li a3, 321804; RV64-NEXT: vsetvli zero, a3, e32, m8, ta, ma1805; RV64-NEXT: vle32.v v24, (a1)1806; RV64-NEXT: li a1, 81807; RV64-NEXT: li a3, 161808; RV64-NEXT: vsetivli zero, 16, e32, m8, ta, ma1809; RV64-NEXT: vslidedown.vi v16, v24, 161810; RV64-NEXT: vsetivli zero, 16, e32, m4, ta, ma1811; RV64-NEXT: vwmulsu.vx v8, v16, a11812; RV64-NEXT: vwmulsu.vx v16, v24, a11813; RV64-NEXT: mv a1, a21814; RV64-NEXT: bltu a2, a3, .LBB84_21815; RV64-NEXT: # %bb.1:1816; RV64-NEXT: li a1, 161817; RV64-NEXT: .LBB84_2:1818; RV64-NEXT: addi a3, sp, 161819; RV64-NEXT: vl8r.v v24, (a3) # vscale x 64-byte Folded Reload1820; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1821; RV64-NEXT: vsoxei64.v v24, (a0), v16, v0.t1822; RV64-NEXT: addi a1, a2, -161823; RV64-NEXT: sltu a2, a2, a11824; RV64-NEXT: addi a2, a2, -11825; RV64-NEXT: vsetivli zero, 2, e8, mf4, ta, ma1826; RV64-NEXT: vslidedown.vi v0, v0, 21827; RV64-NEXT: and a1, a2, a11828; RV64-NEXT: csrr a2, vlenb1829; RV64-NEXT: slli a2, a2, 31830; RV64-NEXT: add a2, sp, a21831; RV64-NEXT: addi a2, a2, 161832; RV64-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload1833; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1834; RV64-NEXT: vsoxei64.v v16, (a0), v8, v0.t1835; RV64-NEXT: csrr a0, vlenb1836; RV64-NEXT: slli a0, a0, 41837; RV64-NEXT: add sp, sp, a01838; RV64-NEXT: .cfi_def_cfa sp, 161839; RV64-NEXT: addi sp, sp, 161840; RV64-NEXT: .cfi_def_cfa_offset 01841; RV64-NEXT: ret1842 %ptrs = getelementptr inbounds double, ptr %base, <32 x i32> %idxs1843 call void @llvm.vp.scatter.v32f64.v32p0(<32 x double> %val, <32 x ptr> %ptrs, <32 x i1> %m, i32 %evl)1844 ret void1845}1846 1847define void @vpscatter_baseidx_sext_v32i32_v32f64(<32 x double> %val, ptr %base, <32 x i32> %idxs, <32 x i1> %m, i32 zeroext %evl) {1848; RV32-LABEL: vpscatter_baseidx_sext_v32i32_v32f64:1849; RV32: # %bb.0:1850; RV32-NEXT: li a3, 321851; RV32-NEXT: vsetvli zero, a3, e32, m8, ta, ma1852; RV32-NEXT: vle32.v v24, (a1)1853; RV32-NEXT: li a3, 161854; RV32-NEXT: vsll.vi v24, v24, 31855; RV32-NEXT: mv a1, a21856; RV32-NEXT: bltu a2, a3, .LBB85_21857; RV32-NEXT: # %bb.1:1858; RV32-NEXT: li a1, 161859; RV32-NEXT: .LBB85_2:1860; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, ma1861; RV32-NEXT: vsoxei32.v v8, (a0), v24, v0.t1862; RV32-NEXT: addi a1, a2, -161863; RV32-NEXT: vsetivli zero, 2, e8, mf4, ta, ma1864; RV32-NEXT: vslidedown.vi v0, v0, 21865; RV32-NEXT: sltu a2, a2, a11866; RV32-NEXT: addi a2, a2, -11867; RV32-NEXT: and a1, a2, a11868; RV32-NEXT: vsetivli zero, 16, e32, m8, ta, ma1869; RV32-NEXT: vslidedown.vi v8, v24, 161870; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, ma1871; RV32-NEXT: vsoxei32.v v16, (a0), v8, v0.t1872; RV32-NEXT: ret1873;1874; RV64-LABEL: vpscatter_baseidx_sext_v32i32_v32f64:1875; RV64: # %bb.0:1876; RV64-NEXT: addi sp, sp, -161877; RV64-NEXT: .cfi_def_cfa_offset 161878; RV64-NEXT: csrr a3, vlenb1879; RV64-NEXT: slli a3, a3, 41880; RV64-NEXT: sub sp, sp, a31881; RV64-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb1882; RV64-NEXT: csrr a3, vlenb1883; RV64-NEXT: slli a3, a3, 31884; RV64-NEXT: add a3, sp, a31885; RV64-NEXT: addi a3, a3, 161886; RV64-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1887; RV64-NEXT: addi a3, sp, 161888; RV64-NEXT: vs8r.v v8, (a3) # vscale x 64-byte Folded Spill1889; RV64-NEXT: li a3, 321890; RV64-NEXT: vsetvli zero, a3, e32, m8, ta, ma1891; RV64-NEXT: vle32.v v24, (a1)1892; RV64-NEXT: li a1, 81893; RV64-NEXT: li a3, 161894; RV64-NEXT: vsetivli zero, 16, e32, m8, ta, ma1895; RV64-NEXT: vslidedown.vi v16, v24, 161896; RV64-NEXT: vsetivli zero, 16, e32, m4, ta, ma1897; RV64-NEXT: vwmulsu.vx v8, v16, a11898; RV64-NEXT: vwmulsu.vx v16, v24, a11899; RV64-NEXT: mv a1, a21900; RV64-NEXT: bltu a2, a3, .LBB85_21901; RV64-NEXT: # %bb.1:1902; RV64-NEXT: li a1, 161903; RV64-NEXT: .LBB85_2:1904; RV64-NEXT: addi a3, sp, 161905; RV64-NEXT: vl8r.v v24, (a3) # vscale x 64-byte Folded Reload1906; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1907; RV64-NEXT: vsoxei64.v v24, (a0), v16, v0.t1908; RV64-NEXT: addi a1, a2, -161909; RV64-NEXT: sltu a2, a2, a11910; RV64-NEXT: addi a2, a2, -11911; RV64-NEXT: vsetivli zero, 2, e8, mf4, ta, ma1912; RV64-NEXT: vslidedown.vi v0, v0, 21913; RV64-NEXT: and a1, a2, a11914; RV64-NEXT: csrr a2, vlenb1915; RV64-NEXT: slli a2, a2, 31916; RV64-NEXT: add a2, sp, a21917; RV64-NEXT: addi a2, a2, 161918; RV64-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload1919; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1920; RV64-NEXT: vsoxei64.v v16, (a0), v8, v0.t1921; RV64-NEXT: csrr a0, vlenb1922; RV64-NEXT: slli a0, a0, 41923; RV64-NEXT: add sp, sp, a01924; RV64-NEXT: .cfi_def_cfa sp, 161925; RV64-NEXT: addi sp, sp, 161926; RV64-NEXT: .cfi_def_cfa_offset 01927; RV64-NEXT: ret1928 %eidxs = sext <32 x i32> %idxs to <32 x i64>1929 %ptrs = getelementptr inbounds double, ptr %base, <32 x i64> %eidxs1930 call void @llvm.vp.scatter.v32f64.v32p0(<32 x double> %val, <32 x ptr> %ptrs, <32 x i1> %m, i32 %evl)1931 ret void1932}1933 1934define void @vpscatter_baseidx_zext_v32i32_v32f64(<32 x double> %val, ptr %base, <32 x i32> %idxs, <32 x i1> %m, i32 zeroext %evl) {1935; RV32-LABEL: vpscatter_baseidx_zext_v32i32_v32f64:1936; RV32: # %bb.0:1937; RV32-NEXT: li a3, 321938; RV32-NEXT: vsetvli zero, a3, e32, m8, ta, ma1939; RV32-NEXT: vle32.v v24, (a1)1940; RV32-NEXT: li a3, 161941; RV32-NEXT: vsll.vi v24, v24, 31942; RV32-NEXT: mv a1, a21943; RV32-NEXT: bltu a2, a3, .LBB86_21944; RV32-NEXT: # %bb.1:1945; RV32-NEXT: li a1, 161946; RV32-NEXT: .LBB86_2:1947; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, ma1948; RV32-NEXT: vsoxei32.v v8, (a0), v24, v0.t1949; RV32-NEXT: addi a1, a2, -161950; RV32-NEXT: vsetivli zero, 2, e8, mf4, ta, ma1951; RV32-NEXT: vslidedown.vi v0, v0, 21952; RV32-NEXT: sltu a2, a2, a11953; RV32-NEXT: addi a2, a2, -11954; RV32-NEXT: and a1, a2, a11955; RV32-NEXT: vsetivli zero, 16, e32, m8, ta, ma1956; RV32-NEXT: vslidedown.vi v8, v24, 161957; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, ma1958; RV32-NEXT: vsoxei32.v v16, (a0), v8, v0.t1959; RV32-NEXT: ret1960;1961; RV64-LABEL: vpscatter_baseidx_zext_v32i32_v32f64:1962; RV64: # %bb.0:1963; RV64-NEXT: addi sp, sp, -161964; RV64-NEXT: .cfi_def_cfa_offset 161965; RV64-NEXT: csrr a3, vlenb1966; RV64-NEXT: slli a3, a3, 41967; RV64-NEXT: sub sp, sp, a31968; RV64-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb1969; RV64-NEXT: csrr a3, vlenb1970; RV64-NEXT: slli a3, a3, 31971; RV64-NEXT: add a3, sp, a31972; RV64-NEXT: addi a3, a3, 161973; RV64-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1974; RV64-NEXT: addi a3, sp, 161975; RV64-NEXT: vs8r.v v8, (a3) # vscale x 64-byte Folded Spill1976; RV64-NEXT: li a3, 321977; RV64-NEXT: vsetvli zero, a3, e32, m8, ta, ma1978; RV64-NEXT: vle32.v v24, (a1)1979; RV64-NEXT: li a1, 81980; RV64-NEXT: li a3, 161981; RV64-NEXT: vsetivli zero, 16, e32, m8, ta, ma1982; RV64-NEXT: vslidedown.vi v16, v24, 161983; RV64-NEXT: vsetivli zero, 16, e32, m4, ta, ma1984; RV64-NEXT: vwmulu.vx v8, v16, a11985; RV64-NEXT: vwmulu.vx v16, v24, a11986; RV64-NEXT: mv a1, a21987; RV64-NEXT: bltu a2, a3, .LBB86_21988; RV64-NEXT: # %bb.1:1989; RV64-NEXT: li a1, 161990; RV64-NEXT: .LBB86_2:1991; RV64-NEXT: addi a3, sp, 161992; RV64-NEXT: vl8r.v v24, (a3) # vscale x 64-byte Folded Reload1993; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1994; RV64-NEXT: vsoxei64.v v24, (a0), v16, v0.t1995; RV64-NEXT: addi a1, a2, -161996; RV64-NEXT: sltu a2, a2, a11997; RV64-NEXT: addi a2, a2, -11998; RV64-NEXT: vsetivli zero, 2, e8, mf4, ta, ma1999; RV64-NEXT: vslidedown.vi v0, v0, 22000; RV64-NEXT: and a1, a2, a12001; RV64-NEXT: csrr a2, vlenb2002; RV64-NEXT: slli a2, a2, 32003; RV64-NEXT: add a2, sp, a22004; RV64-NEXT: addi a2, a2, 162005; RV64-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload2006; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma2007; RV64-NEXT: vsoxei64.v v16, (a0), v8, v0.t2008; RV64-NEXT: csrr a0, vlenb2009; RV64-NEXT: slli a0, a0, 42010; RV64-NEXT: add sp, sp, a02011; RV64-NEXT: .cfi_def_cfa sp, 162012; RV64-NEXT: addi sp, sp, 162013; RV64-NEXT: .cfi_def_cfa_offset 02014; RV64-NEXT: ret2015 %eidxs = zext <32 x i32> %idxs to <32 x i64>2016 %ptrs = getelementptr inbounds double, ptr %base, <32 x i64> %eidxs2017 call void @llvm.vp.scatter.v32f64.v32p0(<32 x double> %val, <32 x ptr> %ptrs, <32 x i1> %m, i32 %evl)2018 ret void2019}2020