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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v \3; RUN: -verify-machineinstrs < %s | FileCheck %s4; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v \5; RUN: -verify-machineinstrs < %s | FileCheck %s6 7define void @vpstore_v2i8(<2 x i8> %val, ptr %ptr, <2 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vpstore_v2i8:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma11; CHECK-NEXT: vse8.v v8, (a0), v0.t12; CHECK-NEXT: ret13 call void @llvm.vp.store.v2i8.p0(<2 x i8> %val, ptr %ptr, <2 x i1> %m, i32 %evl)14 ret void15}16 17define void @vpstore_v4i8(<4 x i8> %val, ptr %ptr, <4 x i1> %m, i32 zeroext %evl) {18; CHECK-LABEL: vpstore_v4i8:19; CHECK: # %bb.0:20; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma21; CHECK-NEXT: vse8.v v8, (a0), v0.t22; CHECK-NEXT: ret23 call void @llvm.vp.store.v4i8.p0(<4 x i8> %val, ptr %ptr, <4 x i1> %m, i32 %evl)24 ret void25}26 27define void @vpstore_v8i7(<8 x i7> %val, ptr %ptr, <8 x i1> %m, i32 zeroext %evl) {28; CHECK-LABEL: vpstore_v8i7:29; CHECK: # %bb.0:30; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma31; CHECK-NEXT: vse8.v v8, (a0), v0.t32; CHECK-NEXT: ret33 call void @llvm.vp.store.v8i7.v8i7.p0(<8 x i7> %val, ptr %ptr, <8 x i1> %m, i32 %evl)34 ret void35}36 37define void @vpstore_v8i8(<8 x i8> %val, ptr %ptr, <8 x i1> %m, i32 zeroext %evl) {38; CHECK-LABEL: vpstore_v8i8:39; CHECK: # %bb.0:40; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma41; CHECK-NEXT: vse8.v v8, (a0), v0.t42; CHECK-NEXT: ret43 call void @llvm.vp.store.v8i8.p0(<8 x i8> %val, ptr %ptr, <8 x i1> %m, i32 %evl)44 ret void45}46 47define void @vpstore_v2i16(<2 x i16> %val, ptr %ptr, <2 x i1> %m, i32 zeroext %evl) {48; CHECK-LABEL: vpstore_v2i16:49; CHECK: # %bb.0:50; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma51; CHECK-NEXT: vse16.v v8, (a0), v0.t52; CHECK-NEXT: ret53 call void @llvm.vp.store.v2i16.p0(<2 x i16> %val, ptr %ptr, <2 x i1> %m, i32 %evl)54 ret void55}56 57define void @vpstore_v4i16(<4 x i16> %val, ptr %ptr, <4 x i1> %m, i32 zeroext %evl) {58; CHECK-LABEL: vpstore_v4i16:59; CHECK: # %bb.0:60; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma61; CHECK-NEXT: vse16.v v8, (a0), v0.t62; CHECK-NEXT: ret63 call void @llvm.vp.store.v4i16.p0(<4 x i16> %val, ptr %ptr, <4 x i1> %m, i32 %evl)64 ret void65}66 67define void @vpstore_v8i16(<8 x i16> %val, ptr %ptr, <8 x i1> %m, i32 zeroext %evl) {68; CHECK-LABEL: vpstore_v8i16:69; CHECK: # %bb.0:70; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma71; CHECK-NEXT: vse16.v v8, (a0), v0.t72; CHECK-NEXT: ret73 call void @llvm.vp.store.v8i16.p0(<8 x i16> %val, ptr %ptr, <8 x i1> %m, i32 %evl)74 ret void75}76 77define void @vpstore_v2i32(<2 x i32> %val, ptr %ptr, <2 x i1> %m, i32 zeroext %evl) {78; CHECK-LABEL: vpstore_v2i32:79; CHECK: # %bb.0:80; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma81; CHECK-NEXT: vse32.v v8, (a0), v0.t82; CHECK-NEXT: ret83 call void @llvm.vp.store.v2i32.p0(<2 x i32> %val, ptr %ptr, <2 x i1> %m, i32 %evl)84 ret void85}86 87define void @vpstore_v4i32(<4 x i32> %val, ptr %ptr, <4 x i1> %m, i32 zeroext %evl) {88; CHECK-LABEL: vpstore_v4i32:89; CHECK: # %bb.0:90; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma91; CHECK-NEXT: vse32.v v8, (a0), v0.t92; CHECK-NEXT: ret93 call void @llvm.vp.store.v4i32.p0(<4 x i32> %val, ptr %ptr, <4 x i1> %m, i32 %evl)94 ret void95}96 97define void @vpstore_v8i32(<8 x i32> %val, ptr %ptr, <8 x i1> %m, i32 zeroext %evl) {98; CHECK-LABEL: vpstore_v8i32:99; CHECK: # %bb.0:100; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma101; CHECK-NEXT: vse32.v v8, (a0), v0.t102; CHECK-NEXT: ret103 call void @llvm.vp.store.v8i32.p0(<8 x i32> %val, ptr %ptr, <8 x i1> %m, i32 %evl)104 ret void105}106 107define void @vpstore_v2i64(<2 x i64> %val, ptr %ptr, <2 x i1> %m, i32 zeroext %evl) {108; CHECK-LABEL: vpstore_v2i64:109; CHECK: # %bb.0:110; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma111; CHECK-NEXT: vse64.v v8, (a0), v0.t112; CHECK-NEXT: ret113 call void @llvm.vp.store.v2i64.p0(<2 x i64> %val, ptr %ptr, <2 x i1> %m, i32 %evl)114 ret void115}116 117define void @vpstore_v4i64(<4 x i64> %val, ptr %ptr, <4 x i1> %m, i32 zeroext %evl) {118; CHECK-LABEL: vpstore_v4i64:119; CHECK: # %bb.0:120; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma121; CHECK-NEXT: vse64.v v8, (a0), v0.t122; CHECK-NEXT: ret123 call void @llvm.vp.store.v4i64.p0(<4 x i64> %val, ptr %ptr, <4 x i1> %m, i32 %evl)124 ret void125}126 127define void @vpstore_v8i64(<8 x i64> %val, ptr %ptr, <8 x i1> %m, i32 zeroext %evl) {128; CHECK-LABEL: vpstore_v8i64:129; CHECK: # %bb.0:130; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, ma131; CHECK-NEXT: vse64.v v8, (a0), v0.t132; CHECK-NEXT: ret133 call void @llvm.vp.store.v8i64.p0(<8 x i64> %val, ptr %ptr, <8 x i1> %m, i32 %evl)134 ret void135}136 137define void @vpstore_v2f16(<2 x half> %val, ptr %ptr, <2 x i1> %m, i32 zeroext %evl) {138; CHECK-LABEL: vpstore_v2f16:139; CHECK: # %bb.0:140; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma141; CHECK-NEXT: vse16.v v8, (a0), v0.t142; CHECK-NEXT: ret143 call void @llvm.vp.store.v2f16.p0(<2 x half> %val, ptr %ptr, <2 x i1> %m, i32 %evl)144 ret void145}146 147define void @vpstore_v4f16(<4 x half> %val, ptr %ptr, <4 x i1> %m, i32 zeroext %evl) {148; CHECK-LABEL: vpstore_v4f16:149; CHECK: # %bb.0:150; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma151; CHECK-NEXT: vse16.v v8, (a0), v0.t152; CHECK-NEXT: ret153 call void @llvm.vp.store.v4f16.p0(<4 x half> %val, ptr %ptr, <4 x i1> %m, i32 %evl)154 ret void155}156 157define void @vpstore_v8f16(<8 x half> %val, ptr %ptr, <8 x i1> %m, i32 zeroext %evl) {158; CHECK-LABEL: vpstore_v8f16:159; CHECK: # %bb.0:160; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma161; CHECK-NEXT: vse16.v v8, (a0), v0.t162; CHECK-NEXT: ret163 call void @llvm.vp.store.v8f16.p0(<8 x half> %val, ptr %ptr, <8 x i1> %m, i32 %evl)164 ret void165}166 167define void @vpstore_v2f32(<2 x float> %val, ptr %ptr, <2 x i1> %m, i32 zeroext %evl) {168; CHECK-LABEL: vpstore_v2f32:169; CHECK: # %bb.0:170; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma171; CHECK-NEXT: vse32.v v8, (a0), v0.t172; CHECK-NEXT: ret173 call void @llvm.vp.store.v2f32.p0(<2 x float> %val, ptr %ptr, <2 x i1> %m, i32 %evl)174 ret void175}176 177define void @vpstore_v4f32(<4 x float> %val, ptr %ptr, <4 x i1> %m, i32 zeroext %evl) {178; CHECK-LABEL: vpstore_v4f32:179; CHECK: # %bb.0:180; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma181; CHECK-NEXT: vse32.v v8, (a0), v0.t182; CHECK-NEXT: ret183 call void @llvm.vp.store.v4f32.p0(<4 x float> %val, ptr %ptr, <4 x i1> %m, i32 %evl)184 ret void185}186 187define void @vpstore_v6f32(<6 x float> %val, ptr %ptr, <6 x i1> %m, i32 zeroext %evl) {188; CHECK-LABEL: vpstore_v6f32:189; CHECK: # %bb.0:190; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma191; CHECK-NEXT: vse32.v v8, (a0), v0.t192; CHECK-NEXT: ret193 call void @llvm.vp.store.v6f32.p0(<6 x float> %val, ptr %ptr, <6 x i1> %m, i32 %evl)194 ret void195}196 197define void @vpstore_v8f32(<8 x float> %val, ptr %ptr, <8 x i1> %m, i32 zeroext %evl) {198; CHECK-LABEL: vpstore_v8f32:199; CHECK: # %bb.0:200; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma201; CHECK-NEXT: vse32.v v8, (a0), v0.t202; CHECK-NEXT: ret203 call void @llvm.vp.store.v8f32.p0(<8 x float> %val, ptr %ptr, <8 x i1> %m, i32 %evl)204 ret void205}206 207define void @vpstore_v2f64(<2 x double> %val, ptr %ptr, <2 x i1> %m, i32 zeroext %evl) {208; CHECK-LABEL: vpstore_v2f64:209; CHECK: # %bb.0:210; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, ma211; CHECK-NEXT: vse64.v v8, (a0), v0.t212; CHECK-NEXT: ret213 call void @llvm.vp.store.v2f64.p0(<2 x double> %val, ptr %ptr, <2 x i1> %m, i32 %evl)214 ret void215}216 217define void @vpstore_v4f64(<4 x double> %val, ptr %ptr, <4 x i1> %m, i32 zeroext %evl) {218; CHECK-LABEL: vpstore_v4f64:219; CHECK: # %bb.0:220; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, ma221; CHECK-NEXT: vse64.v v8, (a0), v0.t222; CHECK-NEXT: ret223 call void @llvm.vp.store.v4f64.p0(<4 x double> %val, ptr %ptr, <4 x i1> %m, i32 %evl)224 ret void225}226 227define void @vpstore_v8f64(<8 x double> %val, ptr %ptr, <8 x i1> %m, i32 zeroext %evl) {228; CHECK-LABEL: vpstore_v8f64:229; CHECK: # %bb.0:230; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, ma231; CHECK-NEXT: vse64.v v8, (a0), v0.t232; CHECK-NEXT: ret233 call void @llvm.vp.store.v8f64.p0(<8 x double> %val, ptr %ptr, <8 x i1> %m, i32 %evl)234 ret void235}236 237define void @vpstore_v2i8_allones_mask(<2 x i8> %val, ptr %ptr, i32 zeroext %evl) {238; CHECK-LABEL: vpstore_v2i8_allones_mask:239; CHECK: # %bb.0:240; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma241; CHECK-NEXT: vse8.v v8, (a0)242; CHECK-NEXT: ret243 call void @llvm.vp.store.v2i8.p0(<2 x i8> %val, ptr %ptr, <2 x i1> splat (i1 true), i32 %evl)244 ret void245}246 247define void @vpstore_v32f64(<32 x double> %val, ptr %ptr, <32 x i1> %m, i32 zeroext %evl) {248; CHECK-LABEL: vpstore_v32f64:249; CHECK: # %bb.0:250; CHECK-NEXT: li a3, 16251; CHECK-NEXT: mv a2, a1252; CHECK-NEXT: bltu a1, a3, .LBB24_2253; CHECK-NEXT: # %bb.1:254; CHECK-NEXT: li a2, 16255; CHECK-NEXT: .LBB24_2:256; CHECK-NEXT: vsetvli zero, a2, e64, m8, ta, ma257; CHECK-NEXT: vse64.v v8, (a0), v0.t258; CHECK-NEXT: addi a2, a1, -16259; CHECK-NEXT: vsetivli zero, 2, e8, mf4, ta, ma260; CHECK-NEXT: vslidedown.vi v0, v0, 2261; CHECK-NEXT: sltu a1, a1, a2262; CHECK-NEXT: addi a1, a1, -1263; CHECK-NEXT: and a1, a1, a2264; CHECK-NEXT: addi a0, a0, 128265; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma266; CHECK-NEXT: vse64.v v16, (a0), v0.t267; CHECK-NEXT: ret268 call void @llvm.vp.store.v32f64.p0(<32 x double> %val, ptr %ptr, <32 x i1> %m, i32 %evl)269 ret void270}271