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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <8 x i7> @vsll_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vsll_vv_v8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: li a1, 12711; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma12; CHECK-NEXT: vand.vx v9, v9, a1, v0.t13; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t14; CHECK-NEXT: ret15 %v = call <8 x i7> @llvm.vp.shl.v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 %evl)16 ret <8 x i7> %v17}18 19define <2 x i8> @vsll_vv_v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 zeroext %evl) {20; CHECK-LABEL: vsll_vv_v2i8:21; CHECK: # %bb.0:22; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma23; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t24; CHECK-NEXT: ret25 %v = call <2 x i8> @llvm.vp.shl.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 %evl)26 ret <2 x i8> %v27}28 29define <2 x i8> @vsll_vv_v2i8_unmasked(<2 x i8> %va, <2 x i8> %b, i32 zeroext %evl) {30; CHECK-LABEL: vsll_vv_v2i8_unmasked:31; CHECK: # %bb.0:32; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma33; CHECK-NEXT: vsll.vv v8, v8, v934; CHECK-NEXT: ret35 %v = call <2 x i8> @llvm.vp.shl.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> splat (i1 true), i32 %evl)36 ret <2 x i8> %v37}38 39define <2 x i8> @vsll_vx_v2i8(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {40; CHECK-LABEL: vsll_vx_v2i8:41; CHECK: # %bb.0:42; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma43; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t44; CHECK-NEXT: ret45 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 046 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer47 %v = call <2 x i8> @llvm.vp.shl.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> %m, i32 %evl)48 ret <2 x i8> %v49}50 51define <2 x i8> @vsll_vx_v2i8_unmasked(<2 x i8> %va, i8 %b, i32 zeroext %evl) {52; CHECK-LABEL: vsll_vx_v2i8_unmasked:53; CHECK: # %bb.0:54; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma55; CHECK-NEXT: vsll.vx v8, v8, a056; CHECK-NEXT: ret57 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 058 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer59 %v = call <2 x i8> @llvm.vp.shl.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> splat (i1 true), i32 %evl)60 ret <2 x i8> %v61}62 63define <2 x i8> @vsll_vi_v2i8(<2 x i8> %va, <2 x i1> %m, i32 zeroext %evl) {64; CHECK-LABEL: vsll_vi_v2i8:65; CHECK: # %bb.0:66; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma67; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t68; CHECK-NEXT: ret69 %v = call <2 x i8> @llvm.vp.shl.v2i8(<2 x i8> %va, <2 x i8> splat (i8 3), <2 x i1> %m, i32 %evl)70 ret <2 x i8> %v71}72 73define <2 x i8> @vsll_vi_v2i8_unmasked(<2 x i8> %va, i32 zeroext %evl) {74; CHECK-LABEL: vsll_vi_v2i8_unmasked:75; CHECK: # %bb.0:76; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma77; CHECK-NEXT: vsll.vi v8, v8, 378; CHECK-NEXT: ret79 %v = call <2 x i8> @llvm.vp.shl.v2i8(<2 x i8> %va, <2 x i8> splat (i8 3), <2 x i1> splat (i1 true), i32 %evl)80 ret <2 x i8> %v81}82 83define <3 x i8> @vsll_vv_v3i8(<3 x i8> %va, <3 x i8> %b, <3 x i1> %m, i32 zeroext %evl) {84; CHECK-LABEL: vsll_vv_v3i8:85; CHECK: # %bb.0:86; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma87; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t88; CHECK-NEXT: ret89 %v = call <3 x i8> @llvm.vp.shl.v3i8(<3 x i8> %va, <3 x i8> %b, <3 x i1> %m, i32 %evl)90 ret <3 x i8> %v91}92 93define <4 x i8> @vsll_vv_v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 zeroext %evl) {94; CHECK-LABEL: vsll_vv_v4i8:95; CHECK: # %bb.0:96; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma97; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t98; CHECK-NEXT: ret99 %v = call <4 x i8> @llvm.vp.shl.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 %evl)100 ret <4 x i8> %v101}102 103define <4 x i8> @vsll_vv_v4i8_unmasked(<4 x i8> %va, <4 x i8> %b, i32 zeroext %evl) {104; CHECK-LABEL: vsll_vv_v4i8_unmasked:105; CHECK: # %bb.0:106; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma107; CHECK-NEXT: vsll.vv v8, v8, v9108; CHECK-NEXT: ret109 %v = call <4 x i8> @llvm.vp.shl.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> splat (i1 true), i32 %evl)110 ret <4 x i8> %v111}112 113define <4 x i8> @vsll_vx_v4i8(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {114; CHECK-LABEL: vsll_vx_v4i8:115; CHECK: # %bb.0:116; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma117; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t118; CHECK-NEXT: ret119 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0120 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer121 %v = call <4 x i8> @llvm.vp.shl.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> %m, i32 %evl)122 ret <4 x i8> %v123}124 125define <4 x i8> @vsll_vx_v4i8_unmasked(<4 x i8> %va, i8 %b, i32 zeroext %evl) {126; CHECK-LABEL: vsll_vx_v4i8_unmasked:127; CHECK: # %bb.0:128; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma129; CHECK-NEXT: vsll.vx v8, v8, a0130; CHECK-NEXT: ret131 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0132 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer133 %v = call <4 x i8> @llvm.vp.shl.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> splat (i1 true), i32 %evl)134 ret <4 x i8> %v135}136 137define <4 x i8> @vsll_vi_v4i8(<4 x i8> %va, <4 x i1> %m, i32 zeroext %evl) {138; CHECK-LABEL: vsll_vi_v4i8:139; CHECK: # %bb.0:140; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma141; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t142; CHECK-NEXT: ret143 %v = call <4 x i8> @llvm.vp.shl.v4i8(<4 x i8> %va, <4 x i8> splat (i8 3), <4 x i1> %m, i32 %evl)144 ret <4 x i8> %v145}146 147define <4 x i8> @vsll_vi_v4i8_unmasked(<4 x i8> %va, i32 zeroext %evl) {148; CHECK-LABEL: vsll_vi_v4i8_unmasked:149; CHECK: # %bb.0:150; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma151; CHECK-NEXT: vsll.vi v8, v8, 3152; CHECK-NEXT: ret153 %v = call <4 x i8> @llvm.vp.shl.v4i8(<4 x i8> %va, <4 x i8> splat (i8 3), <4 x i1> splat (i1 true), i32 %evl)154 ret <4 x i8> %v155}156 157define <8 x i8> @vsll_vv_v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 zeroext %evl) {158; CHECK-LABEL: vsll_vv_v8i8:159; CHECK: # %bb.0:160; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma161; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t162; CHECK-NEXT: ret163 %v = call <8 x i8> @llvm.vp.shl.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 %evl)164 ret <8 x i8> %v165}166 167define <8 x i8> @vsll_vv_v8i8_unmasked(<8 x i8> %va, <8 x i8> %b, i32 zeroext %evl) {168; CHECK-LABEL: vsll_vv_v8i8_unmasked:169; CHECK: # %bb.0:170; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma171; CHECK-NEXT: vsll.vv v8, v8, v9172; CHECK-NEXT: ret173 %v = call <8 x i8> @llvm.vp.shl.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> splat (i1 true), i32 %evl)174 ret <8 x i8> %v175}176 177define <8 x i8> @vsll_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {178; CHECK-LABEL: vsll_vx_v8i8:179; CHECK: # %bb.0:180; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma181; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t182; CHECK-NEXT: ret183 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0184 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer185 %v = call <8 x i8> @llvm.vp.shl.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 %evl)186 ret <8 x i8> %v187}188 189define <8 x i8> @vsll_vx_v8i8_unmasked(<8 x i8> %va, i8 %b, i32 zeroext %evl) {190; CHECK-LABEL: vsll_vx_v8i8_unmasked:191; CHECK: # %bb.0:192; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma193; CHECK-NEXT: vsll.vx v8, v8, a0194; CHECK-NEXT: ret195 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0196 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer197 %v = call <8 x i8> @llvm.vp.shl.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> splat (i1 true), i32 %evl)198 ret <8 x i8> %v199}200 201define <8 x i8> @vsll_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {202; CHECK-LABEL: vsll_vi_v8i8:203; CHECK: # %bb.0:204; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma205; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t206; CHECK-NEXT: ret207 %v = call <8 x i8> @llvm.vp.shl.v8i8(<8 x i8> %va, <8 x i8> splat (i8 3), <8 x i1> %m, i32 %evl)208 ret <8 x i8> %v209}210 211define <8 x i8> @vsll_vi_v8i8_unmasked(<8 x i8> %va, i32 zeroext %evl) {212; CHECK-LABEL: vsll_vi_v8i8_unmasked:213; CHECK: # %bb.0:214; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma215; CHECK-NEXT: vsll.vi v8, v8, 3216; CHECK-NEXT: ret217 %v = call <8 x i8> @llvm.vp.shl.v8i8(<8 x i8> %va, <8 x i8> splat (i8 3), <8 x i1> splat (i1 true), i32 %evl)218 ret <8 x i8> %v219}220 221define <16 x i8> @vsll_vv_v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 zeroext %evl) {222; CHECK-LABEL: vsll_vv_v16i8:223; CHECK: # %bb.0:224; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma225; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t226; CHECK-NEXT: ret227 %v = call <16 x i8> @llvm.vp.shl.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 %evl)228 ret <16 x i8> %v229}230 231define <16 x i8> @vsll_vv_v16i8_unmasked(<16 x i8> %va, <16 x i8> %b, i32 zeroext %evl) {232; CHECK-LABEL: vsll_vv_v16i8_unmasked:233; CHECK: # %bb.0:234; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma235; CHECK-NEXT: vsll.vv v8, v8, v9236; CHECK-NEXT: ret237 %v = call <16 x i8> @llvm.vp.shl.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> splat (i1 true), i32 %evl)238 ret <16 x i8> %v239}240 241define <16 x i8> @vsll_vx_v16i8(<16 x i8> %va, i8 %b, <16 x i1> %m, i32 zeroext %evl) {242; CHECK-LABEL: vsll_vx_v16i8:243; CHECK: # %bb.0:244; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma245; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t246; CHECK-NEXT: ret247 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0248 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer249 %v = call <16 x i8> @llvm.vp.shl.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> %m, i32 %evl)250 ret <16 x i8> %v251}252 253define <16 x i8> @vsll_vx_v16i8_unmasked(<16 x i8> %va, i8 %b, i32 zeroext %evl) {254; CHECK-LABEL: vsll_vx_v16i8_unmasked:255; CHECK: # %bb.0:256; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma257; CHECK-NEXT: vsll.vx v8, v8, a0258; CHECK-NEXT: ret259 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0260 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer261 %v = call <16 x i8> @llvm.vp.shl.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> splat (i1 true), i32 %evl)262 ret <16 x i8> %v263}264 265define <16 x i8> @vsll_vi_v16i8(<16 x i8> %va, <16 x i1> %m, i32 zeroext %evl) {266; CHECK-LABEL: vsll_vi_v16i8:267; CHECK: # %bb.0:268; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma269; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t270; CHECK-NEXT: ret271 %v = call <16 x i8> @llvm.vp.shl.v16i8(<16 x i8> %va, <16 x i8> splat (i8 3), <16 x i1> %m, i32 %evl)272 ret <16 x i8> %v273}274 275define <16 x i8> @vsll_vi_v16i8_unmasked(<16 x i8> %va, i32 zeroext %evl) {276; CHECK-LABEL: vsll_vi_v16i8_unmasked:277; CHECK: # %bb.0:278; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma279; CHECK-NEXT: vsll.vi v8, v8, 3280; CHECK-NEXT: ret281 %v = call <16 x i8> @llvm.vp.shl.v16i8(<16 x i8> %va, <16 x i8> splat (i8 3), <16 x i1> splat (i1 true), i32 %evl)282 ret <16 x i8> %v283}284 285define <2 x i16> @vsll_vv_v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 zeroext %evl) {286; CHECK-LABEL: vsll_vv_v2i16:287; CHECK: # %bb.0:288; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma289; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t290; CHECK-NEXT: ret291 %v = call <2 x i16> @llvm.vp.shl.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 %evl)292 ret <2 x i16> %v293}294 295define <2 x i16> @vsll_vv_v2i16_unmasked(<2 x i16> %va, <2 x i16> %b, i32 zeroext %evl) {296; CHECK-LABEL: vsll_vv_v2i16_unmasked:297; CHECK: # %bb.0:298; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma299; CHECK-NEXT: vsll.vv v8, v8, v9300; CHECK-NEXT: ret301 %v = call <2 x i16> @llvm.vp.shl.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> splat (i1 true), i32 %evl)302 ret <2 x i16> %v303}304 305define <2 x i16> @vsll_vx_v2i16(<2 x i16> %va, i16 %b, <2 x i1> %m, i32 zeroext %evl) {306; CHECK-LABEL: vsll_vx_v2i16:307; CHECK: # %bb.0:308; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma309; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t310; CHECK-NEXT: ret311 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0312 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer313 %v = call <2 x i16> @llvm.vp.shl.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> %m, i32 %evl)314 ret <2 x i16> %v315}316 317define <2 x i16> @vsll_vx_v2i16_unmasked(<2 x i16> %va, i16 %b, i32 zeroext %evl) {318; CHECK-LABEL: vsll_vx_v2i16_unmasked:319; CHECK: # %bb.0:320; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma321; CHECK-NEXT: vsll.vx v8, v8, a0322; CHECK-NEXT: ret323 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0324 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer325 %v = call <2 x i16> @llvm.vp.shl.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> splat (i1 true), i32 %evl)326 ret <2 x i16> %v327}328 329define <2 x i16> @vsll_vi_v2i16(<2 x i16> %va, <2 x i1> %m, i32 zeroext %evl) {330; CHECK-LABEL: vsll_vi_v2i16:331; CHECK: # %bb.0:332; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma333; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t334; CHECK-NEXT: ret335 %v = call <2 x i16> @llvm.vp.shl.v2i16(<2 x i16> %va, <2 x i16> splat (i16 3), <2 x i1> %m, i32 %evl)336 ret <2 x i16> %v337}338 339define <2 x i16> @vsll_vi_v2i16_unmasked(<2 x i16> %va, i32 zeroext %evl) {340; CHECK-LABEL: vsll_vi_v2i16_unmasked:341; CHECK: # %bb.0:342; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma343; CHECK-NEXT: vsll.vi v8, v8, 3344; CHECK-NEXT: ret345 %v = call <2 x i16> @llvm.vp.shl.v2i16(<2 x i16> %va, <2 x i16> splat (i16 3), <2 x i1> splat (i1 true), i32 %evl)346 ret <2 x i16> %v347}348 349define <4 x i16> @vsll_vv_v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 zeroext %evl) {350; CHECK-LABEL: vsll_vv_v4i16:351; CHECK: # %bb.0:352; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma353; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t354; CHECK-NEXT: ret355 %v = call <4 x i16> @llvm.vp.shl.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 %evl)356 ret <4 x i16> %v357}358 359define <4 x i16> @vsll_vv_v4i16_unmasked(<4 x i16> %va, <4 x i16> %b, i32 zeroext %evl) {360; CHECK-LABEL: vsll_vv_v4i16_unmasked:361; CHECK: # %bb.0:362; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma363; CHECK-NEXT: vsll.vv v8, v8, v9364; CHECK-NEXT: ret365 %v = call <4 x i16> @llvm.vp.shl.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> splat (i1 true), i32 %evl)366 ret <4 x i16> %v367}368 369define <4 x i16> @vsll_vx_v4i16(<4 x i16> %va, i16 %b, <4 x i1> %m, i32 zeroext %evl) {370; CHECK-LABEL: vsll_vx_v4i16:371; CHECK: # %bb.0:372; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma373; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t374; CHECK-NEXT: ret375 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0376 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer377 %v = call <4 x i16> @llvm.vp.shl.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> %m, i32 %evl)378 ret <4 x i16> %v379}380 381define <4 x i16> @vsll_vx_v4i16_unmasked(<4 x i16> %va, i16 %b, i32 zeroext %evl) {382; CHECK-LABEL: vsll_vx_v4i16_unmasked:383; CHECK: # %bb.0:384; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma385; CHECK-NEXT: vsll.vx v8, v8, a0386; CHECK-NEXT: ret387 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0388 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer389 %v = call <4 x i16> @llvm.vp.shl.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> splat (i1 true), i32 %evl)390 ret <4 x i16> %v391}392 393define <4 x i16> @vsll_vi_v4i16(<4 x i16> %va, <4 x i1> %m, i32 zeroext %evl) {394; CHECK-LABEL: vsll_vi_v4i16:395; CHECK: # %bb.0:396; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma397; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t398; CHECK-NEXT: ret399 %v = call <4 x i16> @llvm.vp.shl.v4i16(<4 x i16> %va, <4 x i16> splat (i16 3), <4 x i1> %m, i32 %evl)400 ret <4 x i16> %v401}402 403define <4 x i16> @vsll_vi_v4i16_unmasked(<4 x i16> %va, i32 zeroext %evl) {404; CHECK-LABEL: vsll_vi_v4i16_unmasked:405; CHECK: # %bb.0:406; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma407; CHECK-NEXT: vsll.vi v8, v8, 3408; CHECK-NEXT: ret409 %v = call <4 x i16> @llvm.vp.shl.v4i16(<4 x i16> %va, <4 x i16> splat (i16 3), <4 x i1> splat (i1 true), i32 %evl)410 ret <4 x i16> %v411}412 413define <8 x i16> @vsll_vv_v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 zeroext %evl) {414; CHECK-LABEL: vsll_vv_v8i16:415; CHECK: # %bb.0:416; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma417; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t418; CHECK-NEXT: ret419 %v = call <8 x i16> @llvm.vp.shl.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 %evl)420 ret <8 x i16> %v421}422 423define <8 x i16> @vsll_vv_v8i16_unmasked(<8 x i16> %va, <8 x i16> %b, i32 zeroext %evl) {424; CHECK-LABEL: vsll_vv_v8i16_unmasked:425; CHECK: # %bb.0:426; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma427; CHECK-NEXT: vsll.vv v8, v8, v9428; CHECK-NEXT: ret429 %v = call <8 x i16> @llvm.vp.shl.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> splat (i1 true), i32 %evl)430 ret <8 x i16> %v431}432 433define <8 x i16> @vsll_vx_v8i16(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {434; CHECK-LABEL: vsll_vx_v8i16:435; CHECK: # %bb.0:436; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma437; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t438; CHECK-NEXT: ret439 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0440 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer441 %v = call <8 x i16> @llvm.vp.shl.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> %m, i32 %evl)442 ret <8 x i16> %v443}444 445define <8 x i16> @vsll_vx_v8i16_unmasked(<8 x i16> %va, i16 %b, i32 zeroext %evl) {446; CHECK-LABEL: vsll_vx_v8i16_unmasked:447; CHECK: # %bb.0:448; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma449; CHECK-NEXT: vsll.vx v8, v8, a0450; CHECK-NEXT: ret451 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0452 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer453 %v = call <8 x i16> @llvm.vp.shl.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> splat (i1 true), i32 %evl)454 ret <8 x i16> %v455}456 457define <8 x i16> @vsll_vi_v8i16(<8 x i16> %va, <8 x i1> %m, i32 zeroext %evl) {458; CHECK-LABEL: vsll_vi_v8i16:459; CHECK: # %bb.0:460; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma461; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t462; CHECK-NEXT: ret463 %v = call <8 x i16> @llvm.vp.shl.v8i16(<8 x i16> %va, <8 x i16> splat (i16 3), <8 x i1> %m, i32 %evl)464 ret <8 x i16> %v465}466 467define <8 x i16> @vsll_vi_v8i16_unmasked(<8 x i16> %va, i32 zeroext %evl) {468; CHECK-LABEL: vsll_vi_v8i16_unmasked:469; CHECK: # %bb.0:470; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma471; CHECK-NEXT: vsll.vi v8, v8, 3472; CHECK-NEXT: ret473 %v = call <8 x i16> @llvm.vp.shl.v8i16(<8 x i16> %va, <8 x i16> splat (i16 3), <8 x i1> splat (i1 true), i32 %evl)474 ret <8 x i16> %v475}476 477define <16 x i16> @vsll_vv_v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 zeroext %evl) {478; CHECK-LABEL: vsll_vv_v16i16:479; CHECK: # %bb.0:480; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma481; CHECK-NEXT: vsll.vv v8, v8, v10, v0.t482; CHECK-NEXT: ret483 %v = call <16 x i16> @llvm.vp.shl.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 %evl)484 ret <16 x i16> %v485}486 487define <16 x i16> @vsll_vv_v16i16_unmasked(<16 x i16> %va, <16 x i16> %b, i32 zeroext %evl) {488; CHECK-LABEL: vsll_vv_v16i16_unmasked:489; CHECK: # %bb.0:490; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma491; CHECK-NEXT: vsll.vv v8, v8, v10492; CHECK-NEXT: ret493 %v = call <16 x i16> @llvm.vp.shl.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> splat (i1 true), i32 %evl)494 ret <16 x i16> %v495}496 497define <16 x i16> @vsll_vx_v16i16(<16 x i16> %va, i16 %b, <16 x i1> %m, i32 zeroext %evl) {498; CHECK-LABEL: vsll_vx_v16i16:499; CHECK: # %bb.0:500; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma501; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t502; CHECK-NEXT: ret503 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0504 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer505 %v = call <16 x i16> @llvm.vp.shl.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> %m, i32 %evl)506 ret <16 x i16> %v507}508 509define <16 x i16> @vsll_vx_v16i16_unmasked(<16 x i16> %va, i16 %b, i32 zeroext %evl) {510; CHECK-LABEL: vsll_vx_v16i16_unmasked:511; CHECK: # %bb.0:512; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma513; CHECK-NEXT: vsll.vx v8, v8, a0514; CHECK-NEXT: ret515 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0516 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer517 %v = call <16 x i16> @llvm.vp.shl.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> splat (i1 true), i32 %evl)518 ret <16 x i16> %v519}520 521define <16 x i16> @vsll_vi_v16i16(<16 x i16> %va, <16 x i1> %m, i32 zeroext %evl) {522; CHECK-LABEL: vsll_vi_v16i16:523; CHECK: # %bb.0:524; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma525; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t526; CHECK-NEXT: ret527 %v = call <16 x i16> @llvm.vp.shl.v16i16(<16 x i16> %va, <16 x i16> splat (i16 3), <16 x i1> %m, i32 %evl)528 ret <16 x i16> %v529}530 531define <16 x i16> @vsll_vi_v16i16_unmasked(<16 x i16> %va, i32 zeroext %evl) {532; CHECK-LABEL: vsll_vi_v16i16_unmasked:533; CHECK: # %bb.0:534; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma535; CHECK-NEXT: vsll.vi v8, v8, 3536; CHECK-NEXT: ret537 %v = call <16 x i16> @llvm.vp.shl.v16i16(<16 x i16> %va, <16 x i16> splat (i16 3), <16 x i1> splat (i1 true), i32 %evl)538 ret <16 x i16> %v539}540 541define <2 x i32> @vsll_vv_v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 zeroext %evl) {542; CHECK-LABEL: vsll_vv_v2i32:543; CHECK: # %bb.0:544; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma545; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t546; CHECK-NEXT: ret547 %v = call <2 x i32> @llvm.vp.shl.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 %evl)548 ret <2 x i32> %v549}550 551define <2 x i32> @vsll_vv_v2i32_unmasked(<2 x i32> %va, <2 x i32> %b, i32 zeroext %evl) {552; CHECK-LABEL: vsll_vv_v2i32_unmasked:553; CHECK: # %bb.0:554; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma555; CHECK-NEXT: vsll.vv v8, v8, v9556; CHECK-NEXT: ret557 %v = call <2 x i32> @llvm.vp.shl.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> splat (i1 true), i32 %evl)558 ret <2 x i32> %v559}560 561define <2 x i32> @vsll_vx_v2i32(<2 x i32> %va, i32 %b, <2 x i1> %m, i32 zeroext %evl) {562; CHECK-LABEL: vsll_vx_v2i32:563; CHECK: # %bb.0:564; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma565; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t566; CHECK-NEXT: ret567 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0568 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer569 %v = call <2 x i32> @llvm.vp.shl.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> %m, i32 %evl)570 ret <2 x i32> %v571}572 573define <2 x i32> @vsll_vx_v2i32_unmasked(<2 x i32> %va, i32 %b, i32 zeroext %evl) {574; CHECK-LABEL: vsll_vx_v2i32_unmasked:575; CHECK: # %bb.0:576; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma577; CHECK-NEXT: vsll.vx v8, v8, a0578; CHECK-NEXT: ret579 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0580 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer581 %v = call <2 x i32> @llvm.vp.shl.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> splat (i1 true), i32 %evl)582 ret <2 x i32> %v583}584 585define <2 x i32> @vsll_vi_v2i32(<2 x i32> %va, <2 x i1> %m, i32 zeroext %evl) {586; CHECK-LABEL: vsll_vi_v2i32:587; CHECK: # %bb.0:588; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma589; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t590; CHECK-NEXT: ret591 %v = call <2 x i32> @llvm.vp.shl.v2i32(<2 x i32> %va, <2 x i32> splat (i32 3), <2 x i1> %m, i32 %evl)592 ret <2 x i32> %v593}594 595define <2 x i32> @vsll_vi_v2i32_unmasked(<2 x i32> %va, i32 zeroext %evl) {596; CHECK-LABEL: vsll_vi_v2i32_unmasked:597; CHECK: # %bb.0:598; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma599; CHECK-NEXT: vsll.vi v8, v8, 3600; CHECK-NEXT: ret601 %v = call <2 x i32> @llvm.vp.shl.v2i32(<2 x i32> %va, <2 x i32> splat (i32 3), <2 x i1> splat (i1 true), i32 %evl)602 ret <2 x i32> %v603}604 605define <4 x i32> @vsll_vv_v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 zeroext %evl) {606; CHECK-LABEL: vsll_vv_v4i32:607; CHECK: # %bb.0:608; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma609; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t610; CHECK-NEXT: ret611 %v = call <4 x i32> @llvm.vp.shl.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 %evl)612 ret <4 x i32> %v613}614 615define <4 x i32> @vsll_vv_v4i32_unmasked(<4 x i32> %va, <4 x i32> %b, i32 zeroext %evl) {616; CHECK-LABEL: vsll_vv_v4i32_unmasked:617; CHECK: # %bb.0:618; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma619; CHECK-NEXT: vsll.vv v8, v8, v9620; CHECK-NEXT: ret621 %v = call <4 x i32> @llvm.vp.shl.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> splat (i1 true), i32 %evl)622 ret <4 x i32> %v623}624 625define <4 x i32> @vsll_vx_v4i32(<4 x i32> %va, i32 %b, <4 x i1> %m, i32 zeroext %evl) {626; CHECK-LABEL: vsll_vx_v4i32:627; CHECK: # %bb.0:628; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma629; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t630; CHECK-NEXT: ret631 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0632 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer633 %v = call <4 x i32> @llvm.vp.shl.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> %m, i32 %evl)634 ret <4 x i32> %v635}636 637define <4 x i32> @vsll_vx_v4i32_unmasked(<4 x i32> %va, i32 %b, i32 zeroext %evl) {638; CHECK-LABEL: vsll_vx_v4i32_unmasked:639; CHECK: # %bb.0:640; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma641; CHECK-NEXT: vsll.vx v8, v8, a0642; CHECK-NEXT: ret643 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0644 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer645 %v = call <4 x i32> @llvm.vp.shl.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> splat (i1 true), i32 %evl)646 ret <4 x i32> %v647}648 649define <4 x i32> @vsll_vi_v4i32(<4 x i32> %va, <4 x i1> %m, i32 zeroext %evl) {650; CHECK-LABEL: vsll_vi_v4i32:651; CHECK: # %bb.0:652; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma653; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t654; CHECK-NEXT: ret655 %v = call <4 x i32> @llvm.vp.shl.v4i32(<4 x i32> %va, <4 x i32> splat (i32 3), <4 x i1> %m, i32 %evl)656 ret <4 x i32> %v657}658 659define <4 x i32> @vsll_vi_v4i32_unmasked(<4 x i32> %va, i32 zeroext %evl) {660; CHECK-LABEL: vsll_vi_v4i32_unmasked:661; CHECK: # %bb.0:662; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma663; CHECK-NEXT: vsll.vi v8, v8, 3664; CHECK-NEXT: ret665 %v = call <4 x i32> @llvm.vp.shl.v4i32(<4 x i32> %va, <4 x i32> splat (i32 3), <4 x i1> splat (i1 true), i32 %evl)666 ret <4 x i32> %v667}668 669define <8 x i32> @vsll_vv_v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 zeroext %evl) {670; CHECK-LABEL: vsll_vv_v8i32:671; CHECK: # %bb.0:672; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma673; CHECK-NEXT: vsll.vv v8, v8, v10, v0.t674; CHECK-NEXT: ret675 %v = call <8 x i32> @llvm.vp.shl.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 %evl)676 ret <8 x i32> %v677}678 679define <8 x i32> @vsll_vv_v8i32_unmasked(<8 x i32> %va, <8 x i32> %b, i32 zeroext %evl) {680; CHECK-LABEL: vsll_vv_v8i32_unmasked:681; CHECK: # %bb.0:682; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma683; CHECK-NEXT: vsll.vv v8, v8, v10684; CHECK-NEXT: ret685 %v = call <8 x i32> @llvm.vp.shl.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> splat (i1 true), i32 %evl)686 ret <8 x i32> %v687}688 689define <8 x i32> @vsll_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {690; CHECK-LABEL: vsll_vx_v8i32:691; CHECK: # %bb.0:692; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma693; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t694; CHECK-NEXT: ret695 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0696 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer697 %v = call <8 x i32> @llvm.vp.shl.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 %evl)698 ret <8 x i32> %v699}700 701define <8 x i32> @vsll_vx_v8i32_unmasked(<8 x i32> %va, i32 %b, i32 zeroext %evl) {702; CHECK-LABEL: vsll_vx_v8i32_unmasked:703; CHECK: # %bb.0:704; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma705; CHECK-NEXT: vsll.vx v8, v8, a0706; CHECK-NEXT: ret707 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0708 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer709 %v = call <8 x i32> @llvm.vp.shl.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> splat (i1 true), i32 %evl)710 ret <8 x i32> %v711}712 713define <8 x i32> @vsll_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {714; CHECK-LABEL: vsll_vi_v8i32:715; CHECK: # %bb.0:716; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma717; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t718; CHECK-NEXT: ret719 %v = call <8 x i32> @llvm.vp.shl.v8i32(<8 x i32> %va, <8 x i32> splat (i32 3), <8 x i1> %m, i32 %evl)720 ret <8 x i32> %v721}722 723define <8 x i32> @vsll_vi_v8i32_unmasked(<8 x i32> %va, i32 zeroext %evl) {724; CHECK-LABEL: vsll_vi_v8i32_unmasked:725; CHECK: # %bb.0:726; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma727; CHECK-NEXT: vsll.vi v8, v8, 3728; CHECK-NEXT: ret729 %v = call <8 x i32> @llvm.vp.shl.v8i32(<8 x i32> %va, <8 x i32> splat (i32 3), <8 x i1> splat (i1 true), i32 %evl)730 ret <8 x i32> %v731}732 733define <16 x i32> @vsll_vv_v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 zeroext %evl) {734; CHECK-LABEL: vsll_vv_v16i32:735; CHECK: # %bb.0:736; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma737; CHECK-NEXT: vsll.vv v8, v8, v12, v0.t738; CHECK-NEXT: ret739 %v = call <16 x i32> @llvm.vp.shl.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 %evl)740 ret <16 x i32> %v741}742 743define <16 x i32> @vsll_vv_v16i32_unmasked(<16 x i32> %va, <16 x i32> %b, i32 zeroext %evl) {744; CHECK-LABEL: vsll_vv_v16i32_unmasked:745; CHECK: # %bb.0:746; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma747; CHECK-NEXT: vsll.vv v8, v8, v12748; CHECK-NEXT: ret749 %v = call <16 x i32> @llvm.vp.shl.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> splat (i1 true), i32 %evl)750 ret <16 x i32> %v751}752 753define <16 x i32> @vsll_vx_v16i32(<16 x i32> %va, i32 %b, <16 x i1> %m, i32 zeroext %evl) {754; CHECK-LABEL: vsll_vx_v16i32:755; CHECK: # %bb.0:756; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma757; CHECK-NEXT: vsll.vx v8, v8, a0, v0.t758; CHECK-NEXT: ret759 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0760 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer761 %v = call <16 x i32> @llvm.vp.shl.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> %m, i32 %evl)762 ret <16 x i32> %v763}764 765define <16 x i32> @vsll_vx_v16i32_unmasked(<16 x i32> %va, i32 %b, i32 zeroext %evl) {766; CHECK-LABEL: vsll_vx_v16i32_unmasked:767; CHECK: # %bb.0:768; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma769; CHECK-NEXT: vsll.vx v8, v8, a0770; CHECK-NEXT: ret771 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0772 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer773 %v = call <16 x i32> @llvm.vp.shl.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> splat (i1 true), i32 %evl)774 ret <16 x i32> %v775}776 777define <16 x i32> @vsll_vi_v16i32(<16 x i32> %va, <16 x i1> %m, i32 zeroext %evl) {778; CHECK-LABEL: vsll_vi_v16i32:779; CHECK: # %bb.0:780; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma781; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t782; CHECK-NEXT: ret783 %v = call <16 x i32> @llvm.vp.shl.v16i32(<16 x i32> %va, <16 x i32> splat (i32 3), <16 x i1> %m, i32 %evl)784 ret <16 x i32> %v785}786 787define <16 x i32> @vsll_vi_v16i32_unmasked(<16 x i32> %va, i32 zeroext %evl) {788; CHECK-LABEL: vsll_vi_v16i32_unmasked:789; CHECK: # %bb.0:790; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma791; CHECK-NEXT: vsll.vi v8, v8, 3792; CHECK-NEXT: ret793 %v = call <16 x i32> @llvm.vp.shl.v16i32(<16 x i32> %va, <16 x i32> splat (i32 3), <16 x i1> splat (i1 true), i32 %evl)794 ret <16 x i32> %v795}796 797define <2 x i64> @vsll_vv_v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 zeroext %evl) {798; CHECK-LABEL: vsll_vv_v2i64:799; CHECK: # %bb.0:800; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma801; CHECK-NEXT: vsll.vv v8, v8, v9, v0.t802; CHECK-NEXT: ret803 %v = call <2 x i64> @llvm.vp.shl.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 %evl)804 ret <2 x i64> %v805}806 807define <2 x i64> @vsll_vv_v2i64_unmasked(<2 x i64> %va, <2 x i64> %b, i32 zeroext %evl) {808; CHECK-LABEL: vsll_vv_v2i64_unmasked:809; CHECK: # %bb.0:810; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma811; CHECK-NEXT: vsll.vv v8, v8, v9812; CHECK-NEXT: ret813 %v = call <2 x i64> @llvm.vp.shl.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> splat (i1 true), i32 %evl)814 ret <2 x i64> %v815}816 817define <2 x i64> @vsll_vx_v2i64(<2 x i64> %va, i64 %b, <2 x i1> %m, i32 zeroext %evl) {818; RV32-LABEL: vsll_vx_v2i64:819; RV32: # %bb.0:820; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma821; RV32-NEXT: vsll.vx v8, v8, a0, v0.t822; RV32-NEXT: ret823;824; RV64-LABEL: vsll_vx_v2i64:825; RV64: # %bb.0:826; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma827; RV64-NEXT: vsll.vx v8, v8, a0, v0.t828; RV64-NEXT: ret829 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0830 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer831 %v = call <2 x i64> @llvm.vp.shl.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> %m, i32 %evl)832 ret <2 x i64> %v833}834 835define <2 x i64> @vsll_vx_v2i64_unmasked(<2 x i64> %va, i64 %b, i32 zeroext %evl) {836; RV32-LABEL: vsll_vx_v2i64_unmasked:837; RV32: # %bb.0:838; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma839; RV32-NEXT: vsll.vx v8, v8, a0840; RV32-NEXT: ret841;842; RV64-LABEL: vsll_vx_v2i64_unmasked:843; RV64: # %bb.0:844; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma845; RV64-NEXT: vsll.vx v8, v8, a0846; RV64-NEXT: ret847 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0848 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer849 %v = call <2 x i64> @llvm.vp.shl.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> splat (i1 true), i32 %evl)850 ret <2 x i64> %v851}852 853define <2 x i64> @vsll_vi_v2i64(<2 x i64> %va, <2 x i1> %m, i32 zeroext %evl) {854; CHECK-LABEL: vsll_vi_v2i64:855; CHECK: # %bb.0:856; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma857; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t858; CHECK-NEXT: ret859 %v = call <2 x i64> @llvm.vp.shl.v2i64(<2 x i64> %va, <2 x i64> splat (i64 3), <2 x i1> %m, i32 %evl)860 ret <2 x i64> %v861}862 863define <2 x i64> @vsll_vi_v2i64_unmasked(<2 x i64> %va, i32 zeroext %evl) {864; CHECK-LABEL: vsll_vi_v2i64_unmasked:865; CHECK: # %bb.0:866; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma867; CHECK-NEXT: vsll.vi v8, v8, 3868; CHECK-NEXT: ret869 %v = call <2 x i64> @llvm.vp.shl.v2i64(<2 x i64> %va, <2 x i64> splat (i64 3), <2 x i1> splat (i1 true), i32 %evl)870 ret <2 x i64> %v871}872 873define <4 x i64> @vsll_vv_v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 zeroext %evl) {874; CHECK-LABEL: vsll_vv_v4i64:875; CHECK: # %bb.0:876; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma877; CHECK-NEXT: vsll.vv v8, v8, v10, v0.t878; CHECK-NEXT: ret879 %v = call <4 x i64> @llvm.vp.shl.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 %evl)880 ret <4 x i64> %v881}882 883define <4 x i64> @vsll_vv_v4i64_unmasked(<4 x i64> %va, <4 x i64> %b, i32 zeroext %evl) {884; CHECK-LABEL: vsll_vv_v4i64_unmasked:885; CHECK: # %bb.0:886; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma887; CHECK-NEXT: vsll.vv v8, v8, v10888; CHECK-NEXT: ret889 %v = call <4 x i64> @llvm.vp.shl.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> splat (i1 true), i32 %evl)890 ret <4 x i64> %v891}892 893define <4 x i64> @vsll_vx_v4i64(<4 x i64> %va, i64 %b, <4 x i1> %m, i32 zeroext %evl) {894; RV32-LABEL: vsll_vx_v4i64:895; RV32: # %bb.0:896; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma897; RV32-NEXT: vsll.vx v8, v8, a0, v0.t898; RV32-NEXT: ret899;900; RV64-LABEL: vsll_vx_v4i64:901; RV64: # %bb.0:902; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma903; RV64-NEXT: vsll.vx v8, v8, a0, v0.t904; RV64-NEXT: ret905 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0906 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer907 %v = call <4 x i64> @llvm.vp.shl.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> %m, i32 %evl)908 ret <4 x i64> %v909}910 911define <4 x i64> @vsll_vx_v4i64_unmasked(<4 x i64> %va, i64 %b, i32 zeroext %evl) {912; RV32-LABEL: vsll_vx_v4i64_unmasked:913; RV32: # %bb.0:914; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma915; RV32-NEXT: vsll.vx v8, v8, a0916; RV32-NEXT: ret917;918; RV64-LABEL: vsll_vx_v4i64_unmasked:919; RV64: # %bb.0:920; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma921; RV64-NEXT: vsll.vx v8, v8, a0922; RV64-NEXT: ret923 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0924 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer925 %v = call <4 x i64> @llvm.vp.shl.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> splat (i1 true), i32 %evl)926 ret <4 x i64> %v927}928 929define <4 x i64> @vsll_vi_v4i64(<4 x i64> %va, <4 x i1> %m, i32 zeroext %evl) {930; CHECK-LABEL: vsll_vi_v4i64:931; CHECK: # %bb.0:932; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma933; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t934; CHECK-NEXT: ret935 %v = call <4 x i64> @llvm.vp.shl.v4i64(<4 x i64> %va, <4 x i64> splat (i64 3), <4 x i1> %m, i32 %evl)936 ret <4 x i64> %v937}938 939define <4 x i64> @vsll_vi_v4i64_unmasked(<4 x i64> %va, i32 zeroext %evl) {940; CHECK-LABEL: vsll_vi_v4i64_unmasked:941; CHECK: # %bb.0:942; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma943; CHECK-NEXT: vsll.vi v8, v8, 3944; CHECK-NEXT: ret945 %v = call <4 x i64> @llvm.vp.shl.v4i64(<4 x i64> %va, <4 x i64> splat (i64 3), <4 x i1> splat (i1 true), i32 %evl)946 ret <4 x i64> %v947}948 949define <8 x i64> @vsll_vv_v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 zeroext %evl) {950; CHECK-LABEL: vsll_vv_v8i64:951; CHECK: # %bb.0:952; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma953; CHECK-NEXT: vsll.vv v8, v8, v12, v0.t954; CHECK-NEXT: ret955 %v = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 %evl)956 ret <8 x i64> %v957}958 959define <8 x i64> @vsll_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %b, i32 zeroext %evl) {960; CHECK-LABEL: vsll_vv_v8i64_unmasked:961; CHECK: # %bb.0:962; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma963; CHECK-NEXT: vsll.vv v8, v8, v12964; CHECK-NEXT: ret965 %v = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> splat (i1 true), i32 %evl)966 ret <8 x i64> %v967}968 969define <8 x i64> @vsll_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {970; RV32-LABEL: vsll_vx_v8i64:971; RV32: # %bb.0:972; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma973; RV32-NEXT: vsll.vx v8, v8, a0, v0.t974; RV32-NEXT: ret975;976; RV64-LABEL: vsll_vx_v8i64:977; RV64: # %bb.0:978; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma979; RV64-NEXT: vsll.vx v8, v8, a0, v0.t980; RV64-NEXT: ret981 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0982 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer983 %v = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)984 ret <8 x i64> %v985}986 987define <8 x i64> @vsll_vx_v8i64_unmasked(<8 x i64> %va, i64 %b, i32 zeroext %evl) {988; RV32-LABEL: vsll_vx_v8i64_unmasked:989; RV32: # %bb.0:990; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma991; RV32-NEXT: vsll.vx v8, v8, a0992; RV32-NEXT: ret993;994; RV64-LABEL: vsll_vx_v8i64_unmasked:995; RV64: # %bb.0:996; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma997; RV64-NEXT: vsll.vx v8, v8, a0998; RV64-NEXT: ret999 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 01000 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1001 %v = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> splat (i1 true), i32 %evl)1002 ret <8 x i64> %v1003}1004 1005define <8 x i64> @vsll_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {1006; CHECK-LABEL: vsll_vi_v8i64:1007; CHECK: # %bb.0:1008; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1009; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t1010; CHECK-NEXT: ret1011 %v = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> splat (i64 3), <8 x i1> %m, i32 %evl)1012 ret <8 x i64> %v1013}1014 1015define <8 x i64> @vsll_vi_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {1016; CHECK-LABEL: vsll_vi_v8i64_unmasked:1017; CHECK: # %bb.0:1018; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1019; CHECK-NEXT: vsll.vi v8, v8, 31020; CHECK-NEXT: ret1021 %v = call <8 x i64> @llvm.vp.shl.v8i64(<8 x i64> %va, <8 x i64> splat (i64 3), <8 x i1> splat (i1 true), i32 %evl)1022 ret <8 x i64> %v1023}1024 1025define <16 x i64> @vsll_vv_v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 zeroext %evl) {1026; CHECK-LABEL: vsll_vv_v16i64:1027; CHECK: # %bb.0:1028; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1029; CHECK-NEXT: vsll.vv v8, v8, v16, v0.t1030; CHECK-NEXT: ret1031 %v = call <16 x i64> @llvm.vp.shl.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 %evl)1032 ret <16 x i64> %v1033}1034 1035define <16 x i64> @vsll_vv_v16i64_unmasked(<16 x i64> %va, <16 x i64> %b, i32 zeroext %evl) {1036; CHECK-LABEL: vsll_vv_v16i64_unmasked:1037; CHECK: # %bb.0:1038; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1039; CHECK-NEXT: vsll.vv v8, v8, v161040; CHECK-NEXT: ret1041 %v = call <16 x i64> @llvm.vp.shl.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> splat (i1 true), i32 %evl)1042 ret <16 x i64> %v1043}1044 1045define <16 x i64> @vsll_vx_v16i64(<16 x i64> %va, i64 %b, <16 x i1> %m, i32 zeroext %evl) {1046; RV32-LABEL: vsll_vx_v16i64:1047; RV32: # %bb.0:1048; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1049; RV32-NEXT: vsll.vx v8, v8, a0, v0.t1050; RV32-NEXT: ret1051;1052; RV64-LABEL: vsll_vx_v16i64:1053; RV64: # %bb.0:1054; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1055; RV64-NEXT: vsll.vx v8, v8, a0, v0.t1056; RV64-NEXT: ret1057 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 01058 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer1059 %v = call <16 x i64> @llvm.vp.shl.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> %m, i32 %evl)1060 ret <16 x i64> %v1061}1062 1063define <16 x i64> @vsll_vx_v16i64_unmasked(<16 x i64> %va, i64 %b, i32 zeroext %evl) {1064; RV32-LABEL: vsll_vx_v16i64_unmasked:1065; RV32: # %bb.0:1066; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1067; RV32-NEXT: vsll.vx v8, v8, a01068; RV32-NEXT: ret1069;1070; RV64-LABEL: vsll_vx_v16i64_unmasked:1071; RV64: # %bb.0:1072; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1073; RV64-NEXT: vsll.vx v8, v8, a01074; RV64-NEXT: ret1075 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 01076 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer1077 %v = call <16 x i64> @llvm.vp.shl.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> splat (i1 true), i32 %evl)1078 ret <16 x i64> %v1079}1080 1081define <16 x i64> @vsll_vi_v16i64(<16 x i64> %va, <16 x i1> %m, i32 zeroext %evl) {1082; CHECK-LABEL: vsll_vi_v16i64:1083; CHECK: # %bb.0:1084; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1085; CHECK-NEXT: vsll.vi v8, v8, 3, v0.t1086; CHECK-NEXT: ret1087 %v = call <16 x i64> @llvm.vp.shl.v16i64(<16 x i64> %va, <16 x i64> splat (i64 3), <16 x i1> %m, i32 %evl)1088 ret <16 x i64> %v1089}1090 1091define <16 x i64> @vsll_vi_v16i64_unmasked(<16 x i64> %va, i32 zeroext %evl) {1092; CHECK-LABEL: vsll_vi_v16i64_unmasked:1093; CHECK: # %bb.0:1094; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1095; CHECK-NEXT: vsll.vi v8, v8, 31096; CHECK-NEXT: ret1097 %v = call <16 x i64> @llvm.vp.shl.v16i64(<16 x i64> %va, <16 x i64> splat (i64 3), <16 x i1> splat (i1 true), i32 %evl)1098 ret <16 x i64> %v1099}1100