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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <8 x i7> @vsrl_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vsrl_vv_v8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: li a1, 12711; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma12; CHECK-NEXT: vand.vx v9, v9, a1, v0.t13; CHECK-NEXT: vand.vx v8, v8, a1, v0.t14; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t15; CHECK-NEXT: ret16 %v = call <8 x i7> @llvm.vp.lshr.v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 %evl)17 ret <8 x i7> %v18}19 20define <2 x i8> @vsrl_vv_v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 zeroext %evl) {21; CHECK-LABEL: vsrl_vv_v2i8:22; CHECK: # %bb.0:23; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma24; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t25; CHECK-NEXT: ret26 %v = call <2 x i8> @llvm.vp.lshr.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 %evl)27 ret <2 x i8> %v28}29 30define <2 x i8> @vsrl_vv_v2i8_unmasked(<2 x i8> %va, <2 x i8> %b, i32 zeroext %evl) {31; CHECK-LABEL: vsrl_vv_v2i8_unmasked:32; CHECK: # %bb.0:33; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma34; CHECK-NEXT: vsrl.vv v8, v8, v935; CHECK-NEXT: ret36 %v = call <2 x i8> @llvm.vp.lshr.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> splat (i1 true), i32 %evl)37 ret <2 x i8> %v38}39 40define <2 x i8> @vsrl_vx_v2i8(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {41; CHECK-LABEL: vsrl_vx_v2i8:42; CHECK: # %bb.0:43; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma44; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t45; CHECK-NEXT: ret46 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 047 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer48 %v = call <2 x i8> @llvm.vp.lshr.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> %m, i32 %evl)49 ret <2 x i8> %v50}51 52define <2 x i8> @vsrl_vx_v2i8_unmasked(<2 x i8> %va, i8 %b, i32 zeroext %evl) {53; CHECK-LABEL: vsrl_vx_v2i8_unmasked:54; CHECK: # %bb.0:55; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma56; CHECK-NEXT: vsrl.vx v8, v8, a057; CHECK-NEXT: ret58 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 059 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer60 %v = call <2 x i8> @llvm.vp.lshr.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> splat (i1 true), i32 %evl)61 ret <2 x i8> %v62}63 64define <2 x i8> @vsrl_vi_v2i8(<2 x i8> %va, <2 x i1> %m, i32 zeroext %evl) {65; CHECK-LABEL: vsrl_vi_v2i8:66; CHECK: # %bb.0:67; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma68; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t69; CHECK-NEXT: ret70 %v = call <2 x i8> @llvm.vp.lshr.v2i8(<2 x i8> %va, <2 x i8> splat (i8 4), <2 x i1> %m, i32 %evl)71 ret <2 x i8> %v72}73 74define <2 x i8> @vsrl_vi_v2i8_unmasked(<2 x i8> %va, i32 zeroext %evl) {75; CHECK-LABEL: vsrl_vi_v2i8_unmasked:76; CHECK: # %bb.0:77; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma78; CHECK-NEXT: vsrl.vi v8, v8, 479; CHECK-NEXT: ret80 %v = call <2 x i8> @llvm.vp.lshr.v2i8(<2 x i8> %va, <2 x i8> splat (i8 4), <2 x i1> splat (i1 true), i32 %evl)81 ret <2 x i8> %v82}83 84define <4 x i8> @vsrl_vv_v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 zeroext %evl) {85; CHECK-LABEL: vsrl_vv_v4i8:86; CHECK: # %bb.0:87; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma88; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t89; CHECK-NEXT: ret90 %v = call <4 x i8> @llvm.vp.lshr.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 %evl)91 ret <4 x i8> %v92}93 94define <4 x i8> @vsrl_vv_v4i8_unmasked(<4 x i8> %va, <4 x i8> %b, i32 zeroext %evl) {95; CHECK-LABEL: vsrl_vv_v4i8_unmasked:96; CHECK: # %bb.0:97; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma98; CHECK-NEXT: vsrl.vv v8, v8, v999; CHECK-NEXT: ret100 %v = call <4 x i8> @llvm.vp.lshr.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> splat (i1 true), i32 %evl)101 ret <4 x i8> %v102}103 104define <4 x i8> @vsrl_vx_v4i8(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {105; CHECK-LABEL: vsrl_vx_v4i8:106; CHECK: # %bb.0:107; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma108; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t109; CHECK-NEXT: ret110 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0111 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer112 %v = call <4 x i8> @llvm.vp.lshr.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> %m, i32 %evl)113 ret <4 x i8> %v114}115 116define <4 x i8> @vsrl_vx_v4i8_unmasked(<4 x i8> %va, i8 %b, i32 zeroext %evl) {117; CHECK-LABEL: vsrl_vx_v4i8_unmasked:118; CHECK: # %bb.0:119; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma120; CHECK-NEXT: vsrl.vx v8, v8, a0121; CHECK-NEXT: ret122 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0123 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer124 %v = call <4 x i8> @llvm.vp.lshr.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> splat (i1 true), i32 %evl)125 ret <4 x i8> %v126}127 128define <4 x i8> @vsrl_vi_v4i8(<4 x i8> %va, <4 x i1> %m, i32 zeroext %evl) {129; CHECK-LABEL: vsrl_vi_v4i8:130; CHECK: # %bb.0:131; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma132; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t133; CHECK-NEXT: ret134 %v = call <4 x i8> @llvm.vp.lshr.v4i8(<4 x i8> %va, <4 x i8> splat (i8 4), <4 x i1> %m, i32 %evl)135 ret <4 x i8> %v136}137 138define <4 x i8> @vsrl_vi_v4i8_unmasked(<4 x i8> %va, i32 zeroext %evl) {139; CHECK-LABEL: vsrl_vi_v4i8_unmasked:140; CHECK: # %bb.0:141; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma142; CHECK-NEXT: vsrl.vi v8, v8, 4143; CHECK-NEXT: ret144 %v = call <4 x i8> @llvm.vp.lshr.v4i8(<4 x i8> %va, <4 x i8> splat (i8 4), <4 x i1> splat (i1 true), i32 %evl)145 ret <4 x i8> %v146}147 148define <7 x i8> @vsrl_vv_v7i8(<7 x i8> %va, <7 x i8> %b, <7 x i1> %m, i32 zeroext %evl) {149; CHECK-LABEL: vsrl_vv_v7i8:150; CHECK: # %bb.0:151; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma152; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t153; CHECK-NEXT: ret154 %v = call <7 x i8> @llvm.vp.lshr.v7i8(<7 x i8> %va, <7 x i8> %b, <7 x i1> %m, i32 %evl)155 ret <7 x i8> %v156}157 158define <8 x i8> @vsrl_vv_v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 zeroext %evl) {159; CHECK-LABEL: vsrl_vv_v8i8:160; CHECK: # %bb.0:161; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma162; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t163; CHECK-NEXT: ret164 %v = call <8 x i8> @llvm.vp.lshr.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 %evl)165 ret <8 x i8> %v166}167 168define <8 x i8> @vsrl_vv_v8i8_unmasked(<8 x i8> %va, <8 x i8> %b, i32 zeroext %evl) {169; CHECK-LABEL: vsrl_vv_v8i8_unmasked:170; CHECK: # %bb.0:171; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma172; CHECK-NEXT: vsrl.vv v8, v8, v9173; CHECK-NEXT: ret174 %v = call <8 x i8> @llvm.vp.lshr.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> splat (i1 true), i32 %evl)175 ret <8 x i8> %v176}177 178define <8 x i8> @vsrl_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {179; CHECK-LABEL: vsrl_vx_v8i8:180; CHECK: # %bb.0:181; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma182; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t183; CHECK-NEXT: ret184 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0185 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer186 %v = call <8 x i8> @llvm.vp.lshr.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 %evl)187 ret <8 x i8> %v188}189 190define <8 x i8> @vsrl_vx_v8i8_unmasked(<8 x i8> %va, i8 %b, i32 zeroext %evl) {191; CHECK-LABEL: vsrl_vx_v8i8_unmasked:192; CHECK: # %bb.0:193; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma194; CHECK-NEXT: vsrl.vx v8, v8, a0195; CHECK-NEXT: ret196 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0197 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer198 %v = call <8 x i8> @llvm.vp.lshr.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> splat (i1 true), i32 %evl)199 ret <8 x i8> %v200}201 202define <8 x i8> @vsrl_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {203; CHECK-LABEL: vsrl_vi_v8i8:204; CHECK: # %bb.0:205; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma206; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t207; CHECK-NEXT: ret208 %v = call <8 x i8> @llvm.vp.lshr.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), <8 x i1> %m, i32 %evl)209 ret <8 x i8> %v210}211 212define <8 x i8> @vsrl_vi_v8i8_unmasked(<8 x i8> %va, i32 zeroext %evl) {213; CHECK-LABEL: vsrl_vi_v8i8_unmasked:214; CHECK: # %bb.0:215; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma216; CHECK-NEXT: vsrl.vi v8, v8, 4217; CHECK-NEXT: ret218 %v = call <8 x i8> @llvm.vp.lshr.v8i8(<8 x i8> %va, <8 x i8> splat (i8 4), <8 x i1> splat (i1 true), i32 %evl)219 ret <8 x i8> %v220}221 222define <16 x i8> @vsrl_vv_v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 zeroext %evl) {223; CHECK-LABEL: vsrl_vv_v16i8:224; CHECK: # %bb.0:225; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma226; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t227; CHECK-NEXT: ret228 %v = call <16 x i8> @llvm.vp.lshr.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 %evl)229 ret <16 x i8> %v230}231 232define <16 x i8> @vsrl_vv_v16i8_unmasked(<16 x i8> %va, <16 x i8> %b, i32 zeroext %evl) {233; CHECK-LABEL: vsrl_vv_v16i8_unmasked:234; CHECK: # %bb.0:235; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma236; CHECK-NEXT: vsrl.vv v8, v8, v9237; CHECK-NEXT: ret238 %v = call <16 x i8> @llvm.vp.lshr.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> splat (i1 true), i32 %evl)239 ret <16 x i8> %v240}241 242define <16 x i8> @vsrl_vx_v16i8(<16 x i8> %va, i8 %b, <16 x i1> %m, i32 zeroext %evl) {243; CHECK-LABEL: vsrl_vx_v16i8:244; CHECK: # %bb.0:245; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma246; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t247; CHECK-NEXT: ret248 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0249 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer250 %v = call <16 x i8> @llvm.vp.lshr.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> %m, i32 %evl)251 ret <16 x i8> %v252}253 254define <16 x i8> @vsrl_vx_v16i8_unmasked(<16 x i8> %va, i8 %b, i32 zeroext %evl) {255; CHECK-LABEL: vsrl_vx_v16i8_unmasked:256; CHECK: # %bb.0:257; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma258; CHECK-NEXT: vsrl.vx v8, v8, a0259; CHECK-NEXT: ret260 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0261 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer262 %v = call <16 x i8> @llvm.vp.lshr.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> splat (i1 true), i32 %evl)263 ret <16 x i8> %v264}265 266define <16 x i8> @vsrl_vi_v16i8(<16 x i8> %va, <16 x i1> %m, i32 zeroext %evl) {267; CHECK-LABEL: vsrl_vi_v16i8:268; CHECK: # %bb.0:269; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma270; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t271; CHECK-NEXT: ret272 %v = call <16 x i8> @llvm.vp.lshr.v16i8(<16 x i8> %va, <16 x i8> splat (i8 4), <16 x i1> %m, i32 %evl)273 ret <16 x i8> %v274}275 276define <16 x i8> @vsrl_vi_v16i8_unmasked(<16 x i8> %va, i32 zeroext %evl) {277; CHECK-LABEL: vsrl_vi_v16i8_unmasked:278; CHECK: # %bb.0:279; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma280; CHECK-NEXT: vsrl.vi v8, v8, 4281; CHECK-NEXT: ret282 %v = call <16 x i8> @llvm.vp.lshr.v16i8(<16 x i8> %va, <16 x i8> splat (i8 4), <16 x i1> splat (i1 true), i32 %evl)283 ret <16 x i8> %v284}285 286define <2 x i16> @vsrl_vv_v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 zeroext %evl) {287; CHECK-LABEL: vsrl_vv_v2i16:288; CHECK: # %bb.0:289; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma290; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t291; CHECK-NEXT: ret292 %v = call <2 x i16> @llvm.vp.lshr.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 %evl)293 ret <2 x i16> %v294}295 296define <2 x i16> @vsrl_vv_v2i16_unmasked(<2 x i16> %va, <2 x i16> %b, i32 zeroext %evl) {297; CHECK-LABEL: vsrl_vv_v2i16_unmasked:298; CHECK: # %bb.0:299; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma300; CHECK-NEXT: vsrl.vv v8, v8, v9301; CHECK-NEXT: ret302 %v = call <2 x i16> @llvm.vp.lshr.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> splat (i1 true), i32 %evl)303 ret <2 x i16> %v304}305 306define <2 x i16> @vsrl_vx_v2i16(<2 x i16> %va, i16 %b, <2 x i1> %m, i32 zeroext %evl) {307; CHECK-LABEL: vsrl_vx_v2i16:308; CHECK: # %bb.0:309; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma310; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t311; CHECK-NEXT: ret312 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0313 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer314 %v = call <2 x i16> @llvm.vp.lshr.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> %m, i32 %evl)315 ret <2 x i16> %v316}317 318define <2 x i16> @vsrl_vx_v2i16_unmasked(<2 x i16> %va, i16 %b, i32 zeroext %evl) {319; CHECK-LABEL: vsrl_vx_v2i16_unmasked:320; CHECK: # %bb.0:321; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma322; CHECK-NEXT: vsrl.vx v8, v8, a0323; CHECK-NEXT: ret324 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0325 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer326 %v = call <2 x i16> @llvm.vp.lshr.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> splat (i1 true), i32 %evl)327 ret <2 x i16> %v328}329 330define <2 x i16> @vsrl_vi_v2i16(<2 x i16> %va, <2 x i1> %m, i32 zeroext %evl) {331; CHECK-LABEL: vsrl_vi_v2i16:332; CHECK: # %bb.0:333; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma334; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t335; CHECK-NEXT: ret336 %v = call <2 x i16> @llvm.vp.lshr.v2i16(<2 x i16> %va, <2 x i16> splat (i16 4), <2 x i1> %m, i32 %evl)337 ret <2 x i16> %v338}339 340define <2 x i16> @vsrl_vi_v2i16_unmasked(<2 x i16> %va, i32 zeroext %evl) {341; CHECK-LABEL: vsrl_vi_v2i16_unmasked:342; CHECK: # %bb.0:343; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma344; CHECK-NEXT: vsrl.vi v8, v8, 4345; CHECK-NEXT: ret346 %v = call <2 x i16> @llvm.vp.lshr.v2i16(<2 x i16> %va, <2 x i16> splat (i16 4), <2 x i1> splat (i1 true), i32 %evl)347 ret <2 x i16> %v348}349 350define <4 x i16> @vsrl_vv_v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 zeroext %evl) {351; CHECK-LABEL: vsrl_vv_v4i16:352; CHECK: # %bb.0:353; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma354; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t355; CHECK-NEXT: ret356 %v = call <4 x i16> @llvm.vp.lshr.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 %evl)357 ret <4 x i16> %v358}359 360define <4 x i16> @vsrl_vv_v4i16_unmasked(<4 x i16> %va, <4 x i16> %b, i32 zeroext %evl) {361; CHECK-LABEL: vsrl_vv_v4i16_unmasked:362; CHECK: # %bb.0:363; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma364; CHECK-NEXT: vsrl.vv v8, v8, v9365; CHECK-NEXT: ret366 %v = call <4 x i16> @llvm.vp.lshr.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> splat (i1 true), i32 %evl)367 ret <4 x i16> %v368}369 370define <4 x i16> @vsrl_vx_v4i16(<4 x i16> %va, i16 %b, <4 x i1> %m, i32 zeroext %evl) {371; CHECK-LABEL: vsrl_vx_v4i16:372; CHECK: # %bb.0:373; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma374; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t375; CHECK-NEXT: ret376 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0377 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer378 %v = call <4 x i16> @llvm.vp.lshr.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> %m, i32 %evl)379 ret <4 x i16> %v380}381 382define <4 x i16> @vsrl_vx_v4i16_unmasked(<4 x i16> %va, i16 %b, i32 zeroext %evl) {383; CHECK-LABEL: vsrl_vx_v4i16_unmasked:384; CHECK: # %bb.0:385; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma386; CHECK-NEXT: vsrl.vx v8, v8, a0387; CHECK-NEXT: ret388 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0389 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer390 %v = call <4 x i16> @llvm.vp.lshr.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> splat (i1 true), i32 %evl)391 ret <4 x i16> %v392}393 394define <4 x i16> @vsrl_vi_v4i16(<4 x i16> %va, <4 x i1> %m, i32 zeroext %evl) {395; CHECK-LABEL: vsrl_vi_v4i16:396; CHECK: # %bb.0:397; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma398; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t399; CHECK-NEXT: ret400 %v = call <4 x i16> @llvm.vp.lshr.v4i16(<4 x i16> %va, <4 x i16> splat (i16 4), <4 x i1> %m, i32 %evl)401 ret <4 x i16> %v402}403 404define <4 x i16> @vsrl_vi_v4i16_unmasked(<4 x i16> %va, i32 zeroext %evl) {405; CHECK-LABEL: vsrl_vi_v4i16_unmasked:406; CHECK: # %bb.0:407; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma408; CHECK-NEXT: vsrl.vi v8, v8, 4409; CHECK-NEXT: ret410 %v = call <4 x i16> @llvm.vp.lshr.v4i16(<4 x i16> %va, <4 x i16> splat (i16 4), <4 x i1> splat (i1 true), i32 %evl)411 ret <4 x i16> %v412}413 414define <8 x i16> @vsrl_vv_v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 zeroext %evl) {415; CHECK-LABEL: vsrl_vv_v8i16:416; CHECK: # %bb.0:417; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma418; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t419; CHECK-NEXT: ret420 %v = call <8 x i16> @llvm.vp.lshr.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 %evl)421 ret <8 x i16> %v422}423 424define <8 x i16> @vsrl_vv_v8i16_unmasked(<8 x i16> %va, <8 x i16> %b, i32 zeroext %evl) {425; CHECK-LABEL: vsrl_vv_v8i16_unmasked:426; CHECK: # %bb.0:427; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma428; CHECK-NEXT: vsrl.vv v8, v8, v9429; CHECK-NEXT: ret430 %v = call <8 x i16> @llvm.vp.lshr.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> splat (i1 true), i32 %evl)431 ret <8 x i16> %v432}433 434define <8 x i16> @vsrl_vx_v8i16(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {435; CHECK-LABEL: vsrl_vx_v8i16:436; CHECK: # %bb.0:437; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma438; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t439; CHECK-NEXT: ret440 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0441 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer442 %v = call <8 x i16> @llvm.vp.lshr.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> %m, i32 %evl)443 ret <8 x i16> %v444}445 446define <8 x i16> @vsrl_vx_v8i16_unmasked(<8 x i16> %va, i16 %b, i32 zeroext %evl) {447; CHECK-LABEL: vsrl_vx_v8i16_unmasked:448; CHECK: # %bb.0:449; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma450; CHECK-NEXT: vsrl.vx v8, v8, a0451; CHECK-NEXT: ret452 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0453 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer454 %v = call <8 x i16> @llvm.vp.lshr.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> splat (i1 true), i32 %evl)455 ret <8 x i16> %v456}457 458define <8 x i16> @vsrl_vi_v8i16(<8 x i16> %va, <8 x i1> %m, i32 zeroext %evl) {459; CHECK-LABEL: vsrl_vi_v8i16:460; CHECK: # %bb.0:461; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma462; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t463; CHECK-NEXT: ret464 %v = call <8 x i16> @llvm.vp.lshr.v8i16(<8 x i16> %va, <8 x i16> splat (i16 4), <8 x i1> %m, i32 %evl)465 ret <8 x i16> %v466}467 468define <8 x i16> @vsrl_vi_v8i16_unmasked(<8 x i16> %va, i32 zeroext %evl) {469; CHECK-LABEL: vsrl_vi_v8i16_unmasked:470; CHECK: # %bb.0:471; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma472; CHECK-NEXT: vsrl.vi v8, v8, 4473; CHECK-NEXT: ret474 %v = call <8 x i16> @llvm.vp.lshr.v8i16(<8 x i16> %va, <8 x i16> splat (i16 4), <8 x i1> splat (i1 true), i32 %evl)475 ret <8 x i16> %v476}477 478define <16 x i16> @vsrl_vv_v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 zeroext %evl) {479; CHECK-LABEL: vsrl_vv_v16i16:480; CHECK: # %bb.0:481; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma482; CHECK-NEXT: vsrl.vv v8, v8, v10, v0.t483; CHECK-NEXT: ret484 %v = call <16 x i16> @llvm.vp.lshr.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 %evl)485 ret <16 x i16> %v486}487 488define <16 x i16> @vsrl_vv_v16i16_unmasked(<16 x i16> %va, <16 x i16> %b, i32 zeroext %evl) {489; CHECK-LABEL: vsrl_vv_v16i16_unmasked:490; CHECK: # %bb.0:491; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma492; CHECK-NEXT: vsrl.vv v8, v8, v10493; CHECK-NEXT: ret494 %v = call <16 x i16> @llvm.vp.lshr.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> splat (i1 true), i32 %evl)495 ret <16 x i16> %v496}497 498define <16 x i16> @vsrl_vx_v16i16(<16 x i16> %va, i16 %b, <16 x i1> %m, i32 zeroext %evl) {499; CHECK-LABEL: vsrl_vx_v16i16:500; CHECK: # %bb.0:501; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma502; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t503; CHECK-NEXT: ret504 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0505 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer506 %v = call <16 x i16> @llvm.vp.lshr.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> %m, i32 %evl)507 ret <16 x i16> %v508}509 510define <16 x i16> @vsrl_vx_v16i16_unmasked(<16 x i16> %va, i16 %b, i32 zeroext %evl) {511; CHECK-LABEL: vsrl_vx_v16i16_unmasked:512; CHECK: # %bb.0:513; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma514; CHECK-NEXT: vsrl.vx v8, v8, a0515; CHECK-NEXT: ret516 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0517 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer518 %v = call <16 x i16> @llvm.vp.lshr.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> splat (i1 true), i32 %evl)519 ret <16 x i16> %v520}521 522define <16 x i16> @vsrl_vi_v16i16(<16 x i16> %va, <16 x i1> %m, i32 zeroext %evl) {523; CHECK-LABEL: vsrl_vi_v16i16:524; CHECK: # %bb.0:525; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma526; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t527; CHECK-NEXT: ret528 %v = call <16 x i16> @llvm.vp.lshr.v16i16(<16 x i16> %va, <16 x i16> splat (i16 4), <16 x i1> %m, i32 %evl)529 ret <16 x i16> %v530}531 532define <16 x i16> @vsrl_vi_v16i16_unmasked(<16 x i16> %va, i32 zeroext %evl) {533; CHECK-LABEL: vsrl_vi_v16i16_unmasked:534; CHECK: # %bb.0:535; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma536; CHECK-NEXT: vsrl.vi v8, v8, 4537; CHECK-NEXT: ret538 %v = call <16 x i16> @llvm.vp.lshr.v16i16(<16 x i16> %va, <16 x i16> splat (i16 4), <16 x i1> splat (i1 true), i32 %evl)539 ret <16 x i16> %v540}541 542define <2 x i32> @vsrl_vv_v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 zeroext %evl) {543; CHECK-LABEL: vsrl_vv_v2i32:544; CHECK: # %bb.0:545; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma546; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t547; CHECK-NEXT: ret548 %v = call <2 x i32> @llvm.vp.lshr.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 %evl)549 ret <2 x i32> %v550}551 552define <2 x i32> @vsrl_vv_v2i32_unmasked(<2 x i32> %va, <2 x i32> %b, i32 zeroext %evl) {553; CHECK-LABEL: vsrl_vv_v2i32_unmasked:554; CHECK: # %bb.0:555; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma556; CHECK-NEXT: vsrl.vv v8, v8, v9557; CHECK-NEXT: ret558 %v = call <2 x i32> @llvm.vp.lshr.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> splat (i1 true), i32 %evl)559 ret <2 x i32> %v560}561 562define <2 x i32> @vsrl_vx_v2i32(<2 x i32> %va, i32 %b, <2 x i1> %m, i32 zeroext %evl) {563; CHECK-LABEL: vsrl_vx_v2i32:564; CHECK: # %bb.0:565; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma566; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t567; CHECK-NEXT: ret568 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0569 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer570 %v = call <2 x i32> @llvm.vp.lshr.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> %m, i32 %evl)571 ret <2 x i32> %v572}573 574define <2 x i32> @vsrl_vx_v2i32_unmasked(<2 x i32> %va, i32 %b, i32 zeroext %evl) {575; CHECK-LABEL: vsrl_vx_v2i32_unmasked:576; CHECK: # %bb.0:577; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma578; CHECK-NEXT: vsrl.vx v8, v8, a0579; CHECK-NEXT: ret580 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0581 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer582 %v = call <2 x i32> @llvm.vp.lshr.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> splat (i1 true), i32 %evl)583 ret <2 x i32> %v584}585 586define <2 x i32> @vsrl_vi_v2i32(<2 x i32> %va, <2 x i1> %m, i32 zeroext %evl) {587; CHECK-LABEL: vsrl_vi_v2i32:588; CHECK: # %bb.0:589; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma590; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t591; CHECK-NEXT: ret592 %v = call <2 x i32> @llvm.vp.lshr.v2i32(<2 x i32> %va, <2 x i32> splat (i32 4), <2 x i1> %m, i32 %evl)593 ret <2 x i32> %v594}595 596define <2 x i32> @vsrl_vi_v2i32_unmasked(<2 x i32> %va, i32 zeroext %evl) {597; CHECK-LABEL: vsrl_vi_v2i32_unmasked:598; CHECK: # %bb.0:599; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma600; CHECK-NEXT: vsrl.vi v8, v8, 4601; CHECK-NEXT: ret602 %v = call <2 x i32> @llvm.vp.lshr.v2i32(<2 x i32> %va, <2 x i32> splat (i32 4), <2 x i1> splat (i1 true), i32 %evl)603 ret <2 x i32> %v604}605 606define <4 x i32> @vsrl_vv_v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 zeroext %evl) {607; CHECK-LABEL: vsrl_vv_v4i32:608; CHECK: # %bb.0:609; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma610; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t611; CHECK-NEXT: ret612 %v = call <4 x i32> @llvm.vp.lshr.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 %evl)613 ret <4 x i32> %v614}615 616define <4 x i32> @vsrl_vv_v4i32_unmasked(<4 x i32> %va, <4 x i32> %b, i32 zeroext %evl) {617; CHECK-LABEL: vsrl_vv_v4i32_unmasked:618; CHECK: # %bb.0:619; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma620; CHECK-NEXT: vsrl.vv v8, v8, v9621; CHECK-NEXT: ret622 %v = call <4 x i32> @llvm.vp.lshr.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> splat (i1 true), i32 %evl)623 ret <4 x i32> %v624}625 626define <4 x i32> @vsrl_vx_v4i32(<4 x i32> %va, i32 %b, <4 x i1> %m, i32 zeroext %evl) {627; CHECK-LABEL: vsrl_vx_v4i32:628; CHECK: # %bb.0:629; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma630; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t631; CHECK-NEXT: ret632 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0633 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer634 %v = call <4 x i32> @llvm.vp.lshr.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> %m, i32 %evl)635 ret <4 x i32> %v636}637 638define <4 x i32> @vsrl_vx_v4i32_unmasked(<4 x i32> %va, i32 %b, i32 zeroext %evl) {639; CHECK-LABEL: vsrl_vx_v4i32_unmasked:640; CHECK: # %bb.0:641; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma642; CHECK-NEXT: vsrl.vx v8, v8, a0643; CHECK-NEXT: ret644 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0645 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer646 %v = call <4 x i32> @llvm.vp.lshr.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> splat (i1 true), i32 %evl)647 ret <4 x i32> %v648}649 650define <4 x i32> @vsrl_vi_v4i32(<4 x i32> %va, <4 x i1> %m, i32 zeroext %evl) {651; CHECK-LABEL: vsrl_vi_v4i32:652; CHECK: # %bb.0:653; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma654; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t655; CHECK-NEXT: ret656 %v = call <4 x i32> @llvm.vp.lshr.v4i32(<4 x i32> %va, <4 x i32> splat (i32 4), <4 x i1> %m, i32 %evl)657 ret <4 x i32> %v658}659 660define <4 x i32> @vsrl_vi_v4i32_unmasked(<4 x i32> %va, i32 zeroext %evl) {661; CHECK-LABEL: vsrl_vi_v4i32_unmasked:662; CHECK: # %bb.0:663; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma664; CHECK-NEXT: vsrl.vi v8, v8, 4665; CHECK-NEXT: ret666 %v = call <4 x i32> @llvm.vp.lshr.v4i32(<4 x i32> %va, <4 x i32> splat (i32 4), <4 x i1> splat (i1 true), i32 %evl)667 ret <4 x i32> %v668}669 670define <8 x i32> @vsrl_vv_v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 zeroext %evl) {671; CHECK-LABEL: vsrl_vv_v8i32:672; CHECK: # %bb.0:673; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma674; CHECK-NEXT: vsrl.vv v8, v8, v10, v0.t675; CHECK-NEXT: ret676 %v = call <8 x i32> @llvm.vp.lshr.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 %evl)677 ret <8 x i32> %v678}679 680define <8 x i32> @vsrl_vv_v8i32_unmasked(<8 x i32> %va, <8 x i32> %b, i32 zeroext %evl) {681; CHECK-LABEL: vsrl_vv_v8i32_unmasked:682; CHECK: # %bb.0:683; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma684; CHECK-NEXT: vsrl.vv v8, v8, v10685; CHECK-NEXT: ret686 %v = call <8 x i32> @llvm.vp.lshr.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> splat (i1 true), i32 %evl)687 ret <8 x i32> %v688}689 690define <8 x i32> @vsrl_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {691; CHECK-LABEL: vsrl_vx_v8i32:692; CHECK: # %bb.0:693; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma694; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t695; CHECK-NEXT: ret696 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0697 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer698 %v = call <8 x i32> @llvm.vp.lshr.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 %evl)699 ret <8 x i32> %v700}701 702define <8 x i32> @vsrl_vx_v8i32_unmasked(<8 x i32> %va, i32 %b, i32 zeroext %evl) {703; CHECK-LABEL: vsrl_vx_v8i32_unmasked:704; CHECK: # %bb.0:705; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma706; CHECK-NEXT: vsrl.vx v8, v8, a0707; CHECK-NEXT: ret708 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0709 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer710 %v = call <8 x i32> @llvm.vp.lshr.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> splat (i1 true), i32 %evl)711 ret <8 x i32> %v712}713 714define <8 x i32> @vsrl_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {715; CHECK-LABEL: vsrl_vi_v8i32:716; CHECK: # %bb.0:717; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma718; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t719; CHECK-NEXT: ret720 %v = call <8 x i32> @llvm.vp.lshr.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), <8 x i1> %m, i32 %evl)721 ret <8 x i32> %v722}723 724define <8 x i32> @vsrl_vi_v8i32_unmasked(<8 x i32> %va, i32 zeroext %evl) {725; CHECK-LABEL: vsrl_vi_v8i32_unmasked:726; CHECK: # %bb.0:727; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma728; CHECK-NEXT: vsrl.vi v8, v8, 4729; CHECK-NEXT: ret730 %v = call <8 x i32> @llvm.vp.lshr.v8i32(<8 x i32> %va, <8 x i32> splat (i32 4), <8 x i1> splat (i1 true), i32 %evl)731 ret <8 x i32> %v732}733 734define <16 x i32> @vsrl_vv_v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 zeroext %evl) {735; CHECK-LABEL: vsrl_vv_v16i32:736; CHECK: # %bb.0:737; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma738; CHECK-NEXT: vsrl.vv v8, v8, v12, v0.t739; CHECK-NEXT: ret740 %v = call <16 x i32> @llvm.vp.lshr.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 %evl)741 ret <16 x i32> %v742}743 744define <16 x i32> @vsrl_vv_v16i32_unmasked(<16 x i32> %va, <16 x i32> %b, i32 zeroext %evl) {745; CHECK-LABEL: vsrl_vv_v16i32_unmasked:746; CHECK: # %bb.0:747; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma748; CHECK-NEXT: vsrl.vv v8, v8, v12749; CHECK-NEXT: ret750 %v = call <16 x i32> @llvm.vp.lshr.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> splat (i1 true), i32 %evl)751 ret <16 x i32> %v752}753 754define <16 x i32> @vsrl_vx_v16i32(<16 x i32> %va, i32 %b, <16 x i1> %m, i32 zeroext %evl) {755; CHECK-LABEL: vsrl_vx_v16i32:756; CHECK: # %bb.0:757; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma758; CHECK-NEXT: vsrl.vx v8, v8, a0, v0.t759; CHECK-NEXT: ret760 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0761 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer762 %v = call <16 x i32> @llvm.vp.lshr.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> %m, i32 %evl)763 ret <16 x i32> %v764}765 766define <16 x i32> @vsrl_vx_v16i32_unmasked(<16 x i32> %va, i32 %b, i32 zeroext %evl) {767; CHECK-LABEL: vsrl_vx_v16i32_unmasked:768; CHECK: # %bb.0:769; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma770; CHECK-NEXT: vsrl.vx v8, v8, a0771; CHECK-NEXT: ret772 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0773 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer774 %v = call <16 x i32> @llvm.vp.lshr.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> splat (i1 true), i32 %evl)775 ret <16 x i32> %v776}777 778define <16 x i32> @vsrl_vi_v16i32(<16 x i32> %va, <16 x i1> %m, i32 zeroext %evl) {779; CHECK-LABEL: vsrl_vi_v16i32:780; CHECK: # %bb.0:781; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma782; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t783; CHECK-NEXT: ret784 %v = call <16 x i32> @llvm.vp.lshr.v16i32(<16 x i32> %va, <16 x i32> splat (i32 4), <16 x i1> %m, i32 %evl)785 ret <16 x i32> %v786}787 788define <16 x i32> @vsrl_vi_v16i32_unmasked(<16 x i32> %va, i32 zeroext %evl) {789; CHECK-LABEL: vsrl_vi_v16i32_unmasked:790; CHECK: # %bb.0:791; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma792; CHECK-NEXT: vsrl.vi v8, v8, 4793; CHECK-NEXT: ret794 %v = call <16 x i32> @llvm.vp.lshr.v16i32(<16 x i32> %va, <16 x i32> splat (i32 4), <16 x i1> splat (i1 true), i32 %evl)795 ret <16 x i32> %v796}797 798define <2 x i64> @vsrl_vv_v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 zeroext %evl) {799; CHECK-LABEL: vsrl_vv_v2i64:800; CHECK: # %bb.0:801; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma802; CHECK-NEXT: vsrl.vv v8, v8, v9, v0.t803; CHECK-NEXT: ret804 %v = call <2 x i64> @llvm.vp.lshr.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 %evl)805 ret <2 x i64> %v806}807 808define <2 x i64> @vsrl_vv_v2i64_unmasked(<2 x i64> %va, <2 x i64> %b, i32 zeroext %evl) {809; CHECK-LABEL: vsrl_vv_v2i64_unmasked:810; CHECK: # %bb.0:811; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma812; CHECK-NEXT: vsrl.vv v8, v8, v9813; CHECK-NEXT: ret814 %v = call <2 x i64> @llvm.vp.lshr.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> splat (i1 true), i32 %evl)815 ret <2 x i64> %v816}817 818define <2 x i64> @vsrl_vx_v2i64(<2 x i64> %va, i64 %b, <2 x i1> %m, i32 zeroext %evl) {819; RV32-LABEL: vsrl_vx_v2i64:820; RV32: # %bb.0:821; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma822; RV32-NEXT: vsrl.vx v8, v8, a0, v0.t823; RV32-NEXT: ret824;825; RV64-LABEL: vsrl_vx_v2i64:826; RV64: # %bb.0:827; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma828; RV64-NEXT: vsrl.vx v8, v8, a0, v0.t829; RV64-NEXT: ret830 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0831 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer832 %v = call <2 x i64> @llvm.vp.lshr.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> %m, i32 %evl)833 ret <2 x i64> %v834}835 836define <2 x i64> @vsrl_vx_v2i64_unmasked(<2 x i64> %va, i64 %b, i32 zeroext %evl) {837; RV32-LABEL: vsrl_vx_v2i64_unmasked:838; RV32: # %bb.0:839; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma840; RV32-NEXT: vsrl.vx v8, v8, a0841; RV32-NEXT: ret842;843; RV64-LABEL: vsrl_vx_v2i64_unmasked:844; RV64: # %bb.0:845; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma846; RV64-NEXT: vsrl.vx v8, v8, a0847; RV64-NEXT: ret848 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0849 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer850 %v = call <2 x i64> @llvm.vp.lshr.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> splat (i1 true), i32 %evl)851 ret <2 x i64> %v852}853 854define <2 x i64> @vsrl_vi_v2i64(<2 x i64> %va, <2 x i1> %m, i32 zeroext %evl) {855; CHECK-LABEL: vsrl_vi_v2i64:856; CHECK: # %bb.0:857; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma858; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t859; CHECK-NEXT: ret860 %v = call <2 x i64> @llvm.vp.lshr.v2i64(<2 x i64> %va, <2 x i64> splat (i64 4), <2 x i1> %m, i32 %evl)861 ret <2 x i64> %v862}863 864define <2 x i64> @vsrl_vi_v2i64_unmasked(<2 x i64> %va, i32 zeroext %evl) {865; CHECK-LABEL: vsrl_vi_v2i64_unmasked:866; CHECK: # %bb.0:867; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma868; CHECK-NEXT: vsrl.vi v8, v8, 4869; CHECK-NEXT: ret870 %v = call <2 x i64> @llvm.vp.lshr.v2i64(<2 x i64> %va, <2 x i64> splat (i64 4), <2 x i1> splat (i1 true), i32 %evl)871 ret <2 x i64> %v872}873 874define <4 x i64> @vsrl_vv_v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 zeroext %evl) {875; CHECK-LABEL: vsrl_vv_v4i64:876; CHECK: # %bb.0:877; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma878; CHECK-NEXT: vsrl.vv v8, v8, v10, v0.t879; CHECK-NEXT: ret880 %v = call <4 x i64> @llvm.vp.lshr.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 %evl)881 ret <4 x i64> %v882}883 884define <4 x i64> @vsrl_vv_v4i64_unmasked(<4 x i64> %va, <4 x i64> %b, i32 zeroext %evl) {885; CHECK-LABEL: vsrl_vv_v4i64_unmasked:886; CHECK: # %bb.0:887; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma888; CHECK-NEXT: vsrl.vv v8, v8, v10889; CHECK-NEXT: ret890 %v = call <4 x i64> @llvm.vp.lshr.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> splat (i1 true), i32 %evl)891 ret <4 x i64> %v892}893 894define <4 x i64> @vsrl_vx_v4i64(<4 x i64> %va, i64 %b, <4 x i1> %m, i32 zeroext %evl) {895; RV32-LABEL: vsrl_vx_v4i64:896; RV32: # %bb.0:897; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma898; RV32-NEXT: vsrl.vx v8, v8, a0, v0.t899; RV32-NEXT: ret900;901; RV64-LABEL: vsrl_vx_v4i64:902; RV64: # %bb.0:903; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma904; RV64-NEXT: vsrl.vx v8, v8, a0, v0.t905; RV64-NEXT: ret906 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0907 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer908 %v = call <4 x i64> @llvm.vp.lshr.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> %m, i32 %evl)909 ret <4 x i64> %v910}911 912define <4 x i64> @vsrl_vx_v4i64_unmasked(<4 x i64> %va, i64 %b, i32 zeroext %evl) {913; RV32-LABEL: vsrl_vx_v4i64_unmasked:914; RV32: # %bb.0:915; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma916; RV32-NEXT: vsrl.vx v8, v8, a0917; RV32-NEXT: ret918;919; RV64-LABEL: vsrl_vx_v4i64_unmasked:920; RV64: # %bb.0:921; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma922; RV64-NEXT: vsrl.vx v8, v8, a0923; RV64-NEXT: ret924 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0925 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer926 %v = call <4 x i64> @llvm.vp.lshr.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> splat (i1 true), i32 %evl)927 ret <4 x i64> %v928}929 930define <4 x i64> @vsrl_vi_v4i64(<4 x i64> %va, <4 x i1> %m, i32 zeroext %evl) {931; CHECK-LABEL: vsrl_vi_v4i64:932; CHECK: # %bb.0:933; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma934; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t935; CHECK-NEXT: ret936 %v = call <4 x i64> @llvm.vp.lshr.v4i64(<4 x i64> %va, <4 x i64> splat (i64 4), <4 x i1> %m, i32 %evl)937 ret <4 x i64> %v938}939 940define <4 x i64> @vsrl_vi_v4i64_unmasked(<4 x i64> %va, i32 zeroext %evl) {941; CHECK-LABEL: vsrl_vi_v4i64_unmasked:942; CHECK: # %bb.0:943; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma944; CHECK-NEXT: vsrl.vi v8, v8, 4945; CHECK-NEXT: ret946 %v = call <4 x i64> @llvm.vp.lshr.v4i64(<4 x i64> %va, <4 x i64> splat (i64 4), <4 x i1> splat (i1 true), i32 %evl)947 ret <4 x i64> %v948}949 950define <8 x i64> @vsrl_vv_v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 zeroext %evl) {951; CHECK-LABEL: vsrl_vv_v8i64:952; CHECK: # %bb.0:953; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma954; CHECK-NEXT: vsrl.vv v8, v8, v12, v0.t955; CHECK-NEXT: ret956 %v = call <8 x i64> @llvm.vp.lshr.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 %evl)957 ret <8 x i64> %v958}959 960define <8 x i64> @vsrl_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %b, i32 zeroext %evl) {961; CHECK-LABEL: vsrl_vv_v8i64_unmasked:962; CHECK: # %bb.0:963; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma964; CHECK-NEXT: vsrl.vv v8, v8, v12965; CHECK-NEXT: ret966 %v = call <8 x i64> @llvm.vp.lshr.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> splat (i1 true), i32 %evl)967 ret <8 x i64> %v968}969 970define <8 x i64> @vsrl_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {971; RV32-LABEL: vsrl_vx_v8i64:972; RV32: # %bb.0:973; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma974; RV32-NEXT: vsrl.vx v8, v8, a0, v0.t975; RV32-NEXT: ret976;977; RV64-LABEL: vsrl_vx_v8i64:978; RV64: # %bb.0:979; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma980; RV64-NEXT: vsrl.vx v8, v8, a0, v0.t981; RV64-NEXT: ret982 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0983 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer984 %v = call <8 x i64> @llvm.vp.lshr.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)985 ret <8 x i64> %v986}987 988define <8 x i64> @vsrl_vx_v8i64_unmasked(<8 x i64> %va, i64 %b, i32 zeroext %evl) {989; RV32-LABEL: vsrl_vx_v8i64_unmasked:990; RV32: # %bb.0:991; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma992; RV32-NEXT: vsrl.vx v8, v8, a0993; RV32-NEXT: ret994;995; RV64-LABEL: vsrl_vx_v8i64_unmasked:996; RV64: # %bb.0:997; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma998; RV64-NEXT: vsrl.vx v8, v8, a0999; RV64-NEXT: ret1000 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 01001 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1002 %v = call <8 x i64> @llvm.vp.lshr.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> splat (i1 true), i32 %evl)1003 ret <8 x i64> %v1004}1005 1006define <8 x i64> @vsrl_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {1007; CHECK-LABEL: vsrl_vi_v8i64:1008; CHECK: # %bb.0:1009; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1010; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t1011; CHECK-NEXT: ret1012 %v = call <8 x i64> @llvm.vp.lshr.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), <8 x i1> %m, i32 %evl)1013 ret <8 x i64> %v1014}1015 1016define <8 x i64> @vsrl_vi_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {1017; CHECK-LABEL: vsrl_vi_v8i64_unmasked:1018; CHECK: # %bb.0:1019; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1020; CHECK-NEXT: vsrl.vi v8, v8, 41021; CHECK-NEXT: ret1022 %v = call <8 x i64> @llvm.vp.lshr.v8i64(<8 x i64> %va, <8 x i64> splat (i64 4), <8 x i1> splat (i1 true), i32 %evl)1023 ret <8 x i64> %v1024}1025 1026define <16 x i64> @vsrl_vv_v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 zeroext %evl) {1027; CHECK-LABEL: vsrl_vv_v16i64:1028; CHECK: # %bb.0:1029; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1030; CHECK-NEXT: vsrl.vv v8, v8, v16, v0.t1031; CHECK-NEXT: ret1032 %v = call <16 x i64> @llvm.vp.lshr.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 %evl)1033 ret <16 x i64> %v1034}1035 1036define <16 x i64> @vsrl_vv_v16i64_unmasked(<16 x i64> %va, <16 x i64> %b, i32 zeroext %evl) {1037; CHECK-LABEL: vsrl_vv_v16i64_unmasked:1038; CHECK: # %bb.0:1039; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1040; CHECK-NEXT: vsrl.vv v8, v8, v161041; CHECK-NEXT: ret1042 %v = call <16 x i64> @llvm.vp.lshr.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> splat (i1 true), i32 %evl)1043 ret <16 x i64> %v1044}1045 1046define <16 x i64> @vsrl_vx_v16i64(<16 x i64> %va, i64 %b, <16 x i1> %m, i32 zeroext %evl) {1047; RV32-LABEL: vsrl_vx_v16i64:1048; RV32: # %bb.0:1049; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1050; RV32-NEXT: vsrl.vx v8, v8, a0, v0.t1051; RV32-NEXT: ret1052;1053; RV64-LABEL: vsrl_vx_v16i64:1054; RV64: # %bb.0:1055; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1056; RV64-NEXT: vsrl.vx v8, v8, a0, v0.t1057; RV64-NEXT: ret1058 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 01059 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer1060 %v = call <16 x i64> @llvm.vp.lshr.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> %m, i32 %evl)1061 ret <16 x i64> %v1062}1063 1064define <16 x i64> @vsrl_vx_v16i64_unmasked(<16 x i64> %va, i64 %b, i32 zeroext %evl) {1065; RV32-LABEL: vsrl_vx_v16i64_unmasked:1066; RV32: # %bb.0:1067; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1068; RV32-NEXT: vsrl.vx v8, v8, a01069; RV32-NEXT: ret1070;1071; RV64-LABEL: vsrl_vx_v16i64_unmasked:1072; RV64: # %bb.0:1073; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1074; RV64-NEXT: vsrl.vx v8, v8, a01075; RV64-NEXT: ret1076 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 01077 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer1078 %v = call <16 x i64> @llvm.vp.lshr.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> splat (i1 true), i32 %evl)1079 ret <16 x i64> %v1080}1081 1082define <16 x i64> @vsrl_vi_v16i64(<16 x i64> %va, <16 x i1> %m, i32 zeroext %evl) {1083; CHECK-LABEL: vsrl_vi_v16i64:1084; CHECK: # %bb.0:1085; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1086; CHECK-NEXT: vsrl.vi v8, v8, 4, v0.t1087; CHECK-NEXT: ret1088 %v = call <16 x i64> @llvm.vp.lshr.v16i64(<16 x i64> %va, <16 x i64> splat (i64 4), <16 x i1> %m, i32 %evl)1089 ret <16 x i64> %v1090}1091 1092define <16 x i64> @vsrl_vi_v16i64_unmasked(<16 x i64> %va, i32 zeroext %evl) {1093; CHECK-LABEL: vsrl_vi_v16i64_unmasked:1094; CHECK: # %bb.0:1095; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1096; CHECK-NEXT: vsrl.vi v8, v8, 41097; CHECK-NEXT: ret1098 %v = call <16 x i64> @llvm.vp.lshr.v16i64(<16 x i64> %va, <16 x i64> splat (i64 4), <16 x i1> splat (i1 true), i32 %evl)1099 ret <16 x i64> %v1100}1101