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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <2 x i8> @ssub_v2i8_vv(<2 x i8> %va, <2 x i8> %b) {8; CHECK-LABEL: ssub_v2i8_vv:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma11; CHECK-NEXT: vssub.vv v8, v8, v912; CHECK-NEXT: ret13 %v = call <2 x i8> @llvm.ssub.sat.v2i8(<2 x i8> %va, <2 x i8> %b)14 ret <2 x i8> %v15}16 17define <2 x i8> @ssub_v2i8_vx(<2 x i8> %va, i8 %b) {18; CHECK-LABEL: ssub_v2i8_vx:19; CHECK: # %bb.0:20; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma21; CHECK-NEXT: vssub.vx v8, v8, a022; CHECK-NEXT: ret23 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 024 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer25 %v = call <2 x i8> @llvm.ssub.sat.v2i8(<2 x i8> %va, <2 x i8> %vb)26 ret <2 x i8> %v27}28 29define <2 x i8> @ssub_v2i8_vi(<2 x i8> %va) {30; CHECK-LABEL: ssub_v2i8_vi:31; CHECK: # %bb.0:32; CHECK-NEXT: li a0, 133; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma34; CHECK-NEXT: vssub.vx v8, v8, a035; CHECK-NEXT: ret36 %v = call <2 x i8> @llvm.ssub.sat.v2i8(<2 x i8> %va, <2 x i8> splat (i8 1))37 ret <2 x i8> %v38}39 40define <4 x i8> @ssub_v4i8_vv(<4 x i8> %va, <4 x i8> %b) {41; CHECK-LABEL: ssub_v4i8_vv:42; CHECK: # %bb.0:43; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma44; CHECK-NEXT: vssub.vv v8, v8, v945; CHECK-NEXT: ret46 %v = call <4 x i8> @llvm.ssub.sat.v4i8(<4 x i8> %va, <4 x i8> %b)47 ret <4 x i8> %v48}49 50define <4 x i8> @ssub_v4i8_vx(<4 x i8> %va, i8 %b) {51; CHECK-LABEL: ssub_v4i8_vx:52; CHECK: # %bb.0:53; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma54; CHECK-NEXT: vssub.vx v8, v8, a055; CHECK-NEXT: ret56 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 057 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer58 %v = call <4 x i8> @llvm.ssub.sat.v4i8(<4 x i8> %va, <4 x i8> %vb)59 ret <4 x i8> %v60}61 62define <4 x i8> @ssub_v4i8_vi(<4 x i8> %va) {63; CHECK-LABEL: ssub_v4i8_vi:64; CHECK: # %bb.0:65; CHECK-NEXT: li a0, 166; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma67; CHECK-NEXT: vssub.vx v8, v8, a068; CHECK-NEXT: ret69 %v = call <4 x i8> @llvm.ssub.sat.v4i8(<4 x i8> %va, <4 x i8> splat (i8 1))70 ret <4 x i8> %v71}72 73define <8 x i8> @ssub_v8i8_vv(<8 x i8> %va, <8 x i8> %b) {74; CHECK-LABEL: ssub_v8i8_vv:75; CHECK: # %bb.0:76; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma77; CHECK-NEXT: vssub.vv v8, v8, v978; CHECK-NEXT: ret79 %v = call <8 x i8> @llvm.ssub.sat.v8i8(<8 x i8> %va, <8 x i8> %b)80 ret <8 x i8> %v81}82 83define <8 x i8> @ssub_v8i8_vx(<8 x i8> %va, i8 %b) {84; CHECK-LABEL: ssub_v8i8_vx:85; CHECK: # %bb.0:86; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma87; CHECK-NEXT: vssub.vx v8, v8, a088; CHECK-NEXT: ret89 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 090 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer91 %v = call <8 x i8> @llvm.ssub.sat.v8i8(<8 x i8> %va, <8 x i8> %vb)92 ret <8 x i8> %v93}94 95define <8 x i8> @ssub_v8i8_vi(<8 x i8> %va) {96; CHECK-LABEL: ssub_v8i8_vi:97; CHECK: # %bb.0:98; CHECK-NEXT: li a0, 199; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma100; CHECK-NEXT: vssub.vx v8, v8, a0101; CHECK-NEXT: ret102 %v = call <8 x i8> @llvm.ssub.sat.v8i8(<8 x i8> %va, <8 x i8> splat (i8 1))103 ret <8 x i8> %v104}105 106define <16 x i8> @ssub_v16i8_vv(<16 x i8> %va, <16 x i8> %b) {107; CHECK-LABEL: ssub_v16i8_vv:108; CHECK: # %bb.0:109; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma110; CHECK-NEXT: vssub.vv v8, v8, v9111; CHECK-NEXT: ret112 %v = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> %va, <16 x i8> %b)113 ret <16 x i8> %v114}115 116define <16 x i8> @ssub_v16i8_vx(<16 x i8> %va, i8 %b) {117; CHECK-LABEL: ssub_v16i8_vx:118; CHECK: # %bb.0:119; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma120; CHECK-NEXT: vssub.vx v8, v8, a0121; CHECK-NEXT: ret122 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0123 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer124 %v = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> %va, <16 x i8> %vb)125 ret <16 x i8> %v126}127 128define <16 x i8> @ssub_v16i8_vi(<16 x i8> %va) {129; CHECK-LABEL: ssub_v16i8_vi:130; CHECK: # %bb.0:131; CHECK-NEXT: li a0, 1132; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma133; CHECK-NEXT: vssub.vx v8, v8, a0134; CHECK-NEXT: ret135 %v = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> %va, <16 x i8> splat (i8 1))136 ret <16 x i8> %v137}138 139define <2 x i16> @ssub_v2i16_vv(<2 x i16> %va, <2 x i16> %b) {140; CHECK-LABEL: ssub_v2i16_vv:141; CHECK: # %bb.0:142; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma143; CHECK-NEXT: vssub.vv v8, v8, v9144; CHECK-NEXT: ret145 %v = call <2 x i16> @llvm.ssub.sat.v2i16(<2 x i16> %va, <2 x i16> %b)146 ret <2 x i16> %v147}148 149define <2 x i16> @ssub_v2i16_vx(<2 x i16> %va, i16 %b) {150; CHECK-LABEL: ssub_v2i16_vx:151; CHECK: # %bb.0:152; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma153; CHECK-NEXT: vssub.vx v8, v8, a0154; CHECK-NEXT: ret155 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0156 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer157 %v = call <2 x i16> @llvm.ssub.sat.v2i16(<2 x i16> %va, <2 x i16> %vb)158 ret <2 x i16> %v159}160 161define <2 x i16> @ssub_v2i16_vi(<2 x i16> %va) {162; CHECK-LABEL: ssub_v2i16_vi:163; CHECK: # %bb.0:164; CHECK-NEXT: li a0, 1165; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma166; CHECK-NEXT: vssub.vx v8, v8, a0167; CHECK-NEXT: ret168 %v = call <2 x i16> @llvm.ssub.sat.v2i16(<2 x i16> %va, <2 x i16> splat (i16 1))169 ret <2 x i16> %v170}171 172define <4 x i16> @ssub_v4i16_vv(<4 x i16> %va, <4 x i16> %b) {173; CHECK-LABEL: ssub_v4i16_vv:174; CHECK: # %bb.0:175; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma176; CHECK-NEXT: vssub.vv v8, v8, v9177; CHECK-NEXT: ret178 %v = call <4 x i16> @llvm.ssub.sat.v4i16(<4 x i16> %va, <4 x i16> %b)179 ret <4 x i16> %v180}181 182define <4 x i16> @ssub_v4i16_vx(<4 x i16> %va, i16 %b) {183; CHECK-LABEL: ssub_v4i16_vx:184; CHECK: # %bb.0:185; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma186; CHECK-NEXT: vssub.vx v8, v8, a0187; CHECK-NEXT: ret188 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0189 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer190 %v = call <4 x i16> @llvm.ssub.sat.v4i16(<4 x i16> %va, <4 x i16> %vb)191 ret <4 x i16> %v192}193 194define <4 x i16> @ssub_v4i16_vi(<4 x i16> %va) {195; CHECK-LABEL: ssub_v4i16_vi:196; CHECK: # %bb.0:197; CHECK-NEXT: li a0, 1198; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma199; CHECK-NEXT: vssub.vx v8, v8, a0200; CHECK-NEXT: ret201 %v = call <4 x i16> @llvm.ssub.sat.v4i16(<4 x i16> %va, <4 x i16> splat (i16 1))202 ret <4 x i16> %v203}204 205define <8 x i16> @ssub_v8i16_vv(<8 x i16> %va, <8 x i16> %b) {206; CHECK-LABEL: ssub_v8i16_vv:207; CHECK: # %bb.0:208; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma209; CHECK-NEXT: vssub.vv v8, v8, v9210; CHECK-NEXT: ret211 %v = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %va, <8 x i16> %b)212 ret <8 x i16> %v213}214 215define <8 x i16> @ssub_v8i16_vx(<8 x i16> %va, i16 %b) {216; CHECK-LABEL: ssub_v8i16_vx:217; CHECK: # %bb.0:218; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma219; CHECK-NEXT: vssub.vx v8, v8, a0220; CHECK-NEXT: ret221 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0222 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer223 %v = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %va, <8 x i16> %vb)224 ret <8 x i16> %v225}226 227define <8 x i16> @ssub_v8i16_vi(<8 x i16> %va) {228; CHECK-LABEL: ssub_v8i16_vi:229; CHECK: # %bb.0:230; CHECK-NEXT: li a0, 1231; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma232; CHECK-NEXT: vssub.vx v8, v8, a0233; CHECK-NEXT: ret234 %v = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %va, <8 x i16> splat (i16 1))235 ret <8 x i16> %v236}237 238define <16 x i16> @ssub_v16i16_vv(<16 x i16> %va, <16 x i16> %b) {239; CHECK-LABEL: ssub_v16i16_vv:240; CHECK: # %bb.0:241; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma242; CHECK-NEXT: vssub.vv v8, v8, v10243; CHECK-NEXT: ret244 %v = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> %va, <16 x i16> %b)245 ret <16 x i16> %v246}247 248define <16 x i16> @ssub_v16i16_vx(<16 x i16> %va, i16 %b) {249; CHECK-LABEL: ssub_v16i16_vx:250; CHECK: # %bb.0:251; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma252; CHECK-NEXT: vssub.vx v8, v8, a0253; CHECK-NEXT: ret254 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0255 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer256 %v = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> %va, <16 x i16> %vb)257 ret <16 x i16> %v258}259 260define <16 x i16> @ssub_v16i16_vi(<16 x i16> %va) {261; CHECK-LABEL: ssub_v16i16_vi:262; CHECK: # %bb.0:263; CHECK-NEXT: li a0, 1264; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma265; CHECK-NEXT: vssub.vx v8, v8, a0266; CHECK-NEXT: ret267 %v = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> %va, <16 x i16> splat (i16 1))268 ret <16 x i16> %v269}270 271define <2 x i32> @ssub_v2i32_vv(<2 x i32> %va, <2 x i32> %b) {272; CHECK-LABEL: ssub_v2i32_vv:273; CHECK: # %bb.0:274; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma275; CHECK-NEXT: vssub.vv v8, v8, v9276; CHECK-NEXT: ret277 %v = call <2 x i32> @llvm.ssub.sat.v2i32(<2 x i32> %va, <2 x i32> %b)278 ret <2 x i32> %v279}280 281define <2 x i32> @ssub_v2i32_vx(<2 x i32> %va, i32 %b) {282; CHECK-LABEL: ssub_v2i32_vx:283; CHECK: # %bb.0:284; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma285; CHECK-NEXT: vssub.vx v8, v8, a0286; CHECK-NEXT: ret287 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0288 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer289 %v = call <2 x i32> @llvm.ssub.sat.v2i32(<2 x i32> %va, <2 x i32> %vb)290 ret <2 x i32> %v291}292 293define <2 x i32> @ssub_v2i32_vi(<2 x i32> %va) {294; CHECK-LABEL: ssub_v2i32_vi:295; CHECK: # %bb.0:296; CHECK-NEXT: li a0, 1297; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma298; CHECK-NEXT: vssub.vx v8, v8, a0299; CHECK-NEXT: ret300 %v = call <2 x i32> @llvm.ssub.sat.v2i32(<2 x i32> %va, <2 x i32> splat (i32 1))301 ret <2 x i32> %v302}303 304define <4 x i32> @ssub_v4i32_vv(<4 x i32> %va, <4 x i32> %b) {305; CHECK-LABEL: ssub_v4i32_vv:306; CHECK: # %bb.0:307; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma308; CHECK-NEXT: vssub.vv v8, v8, v9309; CHECK-NEXT: ret310 %v = call <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> %va, <4 x i32> %b)311 ret <4 x i32> %v312}313 314define <4 x i32> @ssub_v4i32_vx(<4 x i32> %va, i32 %b) {315; CHECK-LABEL: ssub_v4i32_vx:316; CHECK: # %bb.0:317; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma318; CHECK-NEXT: vssub.vx v8, v8, a0319; CHECK-NEXT: ret320 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0321 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer322 %v = call <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> %va, <4 x i32> %vb)323 ret <4 x i32> %v324}325 326define <4 x i32> @ssub_v4i32_vi(<4 x i32> %va) {327; CHECK-LABEL: ssub_v4i32_vi:328; CHECK: # %bb.0:329; CHECK-NEXT: li a0, 1330; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma331; CHECK-NEXT: vssub.vx v8, v8, a0332; CHECK-NEXT: ret333 %v = call <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> %va, <4 x i32> splat (i32 1))334 ret <4 x i32> %v335}336 337define <8 x i32> @ssub_v8i32_vv(<8 x i32> %va, <8 x i32> %b) {338; CHECK-LABEL: ssub_v8i32_vv:339; CHECK: # %bb.0:340; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma341; CHECK-NEXT: vssub.vv v8, v8, v10342; CHECK-NEXT: ret343 %v = call <8 x i32> @llvm.ssub.sat.v8i32(<8 x i32> %va, <8 x i32> %b)344 ret <8 x i32> %v345}346 347define <8 x i32> @ssub_v8i32_vx(<8 x i32> %va, i32 %b) {348; CHECK-LABEL: ssub_v8i32_vx:349; CHECK: # %bb.0:350; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma351; CHECK-NEXT: vssub.vx v8, v8, a0352; CHECK-NEXT: ret353 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0354 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer355 %v = call <8 x i32> @llvm.ssub.sat.v8i32(<8 x i32> %va, <8 x i32> %vb)356 ret <8 x i32> %v357}358 359define <8 x i32> @ssub_v8i32_vi(<8 x i32> %va) {360; CHECK-LABEL: ssub_v8i32_vi:361; CHECK: # %bb.0:362; CHECK-NEXT: li a0, 1363; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma364; CHECK-NEXT: vssub.vx v8, v8, a0365; CHECK-NEXT: ret366 %v = call <8 x i32> @llvm.ssub.sat.v8i32(<8 x i32> %va, <8 x i32> splat (i32 1))367 ret <8 x i32> %v368}369 370define <16 x i32> @ssub_v16i32_vv(<16 x i32> %va, <16 x i32> %b) {371; CHECK-LABEL: ssub_v16i32_vv:372; CHECK: # %bb.0:373; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma374; CHECK-NEXT: vssub.vv v8, v8, v12375; CHECK-NEXT: ret376 %v = call <16 x i32> @llvm.ssub.sat.v16i32(<16 x i32> %va, <16 x i32> %b)377 ret <16 x i32> %v378}379 380define <16 x i32> @ssub_v16i32_vx(<16 x i32> %va, i32 %b) {381; CHECK-LABEL: ssub_v16i32_vx:382; CHECK: # %bb.0:383; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma384; CHECK-NEXT: vssub.vx v8, v8, a0385; CHECK-NEXT: ret386 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0387 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer388 %v = call <16 x i32> @llvm.ssub.sat.v16i32(<16 x i32> %va, <16 x i32> %vb)389 ret <16 x i32> %v390}391 392define <16 x i32> @ssub_v16i32_vi(<16 x i32> %va) {393; CHECK-LABEL: ssub_v16i32_vi:394; CHECK: # %bb.0:395; CHECK-NEXT: li a0, 1396; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma397; CHECK-NEXT: vssub.vx v8, v8, a0398; CHECK-NEXT: ret399 %v = call <16 x i32> @llvm.ssub.sat.v16i32(<16 x i32> %va, <16 x i32> splat (i32 1))400 ret <16 x i32> %v401}402 403define <2 x i64> @ssub_v2i64_vv(<2 x i64> %va, <2 x i64> %b) {404; CHECK-LABEL: ssub_v2i64_vv:405; CHECK: # %bb.0:406; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma407; CHECK-NEXT: vssub.vv v8, v8, v9408; CHECK-NEXT: ret409 %v = call <2 x i64> @llvm.ssub.sat.v2i64(<2 x i64> %va, <2 x i64> %b)410 ret <2 x i64> %v411}412 413define <2 x i64> @ssub_v2i64_vx(<2 x i64> %va, i64 %b) {414; RV32-LABEL: ssub_v2i64_vx:415; RV32: # %bb.0:416; RV32-NEXT: addi sp, sp, -16417; RV32-NEXT: .cfi_def_cfa_offset 16418; RV32-NEXT: sw a0, 8(sp)419; RV32-NEXT: sw a1, 12(sp)420; RV32-NEXT: addi a0, sp, 8421; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma422; RV32-NEXT: vlse64.v v9, (a0), zero423; RV32-NEXT: vssub.vv v8, v8, v9424; RV32-NEXT: addi sp, sp, 16425; RV32-NEXT: .cfi_def_cfa_offset 0426; RV32-NEXT: ret427;428; RV64-LABEL: ssub_v2i64_vx:429; RV64: # %bb.0:430; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma431; RV64-NEXT: vssub.vx v8, v8, a0432; RV64-NEXT: ret433 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0434 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer435 %v = call <2 x i64> @llvm.ssub.sat.v2i64(<2 x i64> %va, <2 x i64> %vb)436 ret <2 x i64> %v437}438 439define <2 x i64> @ssub_v2i64_vi(<2 x i64> %va) {440; CHECK-LABEL: ssub_v2i64_vi:441; CHECK: # %bb.0:442; CHECK-NEXT: li a0, 1443; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma444; CHECK-NEXT: vssub.vx v8, v8, a0445; CHECK-NEXT: ret446 %v = call <2 x i64> @llvm.ssub.sat.v2i64(<2 x i64> %va, <2 x i64> splat (i64 1))447 ret <2 x i64> %v448}449 450define <4 x i64> @ssub_v4i64_vv(<4 x i64> %va, <4 x i64> %b) {451; CHECK-LABEL: ssub_v4i64_vv:452; CHECK: # %bb.0:453; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma454; CHECK-NEXT: vssub.vv v8, v8, v10455; CHECK-NEXT: ret456 %v = call <4 x i64> @llvm.ssub.sat.v4i64(<4 x i64> %va, <4 x i64> %b)457 ret <4 x i64> %v458}459 460define <4 x i64> @ssub_v4i64_vx(<4 x i64> %va, i64 %b) {461; RV32-LABEL: ssub_v4i64_vx:462; RV32: # %bb.0:463; RV32-NEXT: addi sp, sp, -16464; RV32-NEXT: .cfi_def_cfa_offset 16465; RV32-NEXT: sw a0, 8(sp)466; RV32-NEXT: sw a1, 12(sp)467; RV32-NEXT: addi a0, sp, 8468; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma469; RV32-NEXT: vlse64.v v10, (a0), zero470; RV32-NEXT: vssub.vv v8, v8, v10471; RV32-NEXT: addi sp, sp, 16472; RV32-NEXT: .cfi_def_cfa_offset 0473; RV32-NEXT: ret474;475; RV64-LABEL: ssub_v4i64_vx:476; RV64: # %bb.0:477; RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma478; RV64-NEXT: vssub.vx v8, v8, a0479; RV64-NEXT: ret480 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0481 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer482 %v = call <4 x i64> @llvm.ssub.sat.v4i64(<4 x i64> %va, <4 x i64> %vb)483 ret <4 x i64> %v484}485 486define <4 x i64> @ssub_v4i64_vi(<4 x i64> %va) {487; CHECK-LABEL: ssub_v4i64_vi:488; CHECK: # %bb.0:489; CHECK-NEXT: li a0, 1490; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma491; CHECK-NEXT: vssub.vx v8, v8, a0492; CHECK-NEXT: ret493 %v = call <4 x i64> @llvm.ssub.sat.v4i64(<4 x i64> %va, <4 x i64> splat (i64 1))494 ret <4 x i64> %v495}496 497define <8 x i64> @ssub_v8i64_vv(<8 x i64> %va, <8 x i64> %b) {498; CHECK-LABEL: ssub_v8i64_vv:499; CHECK: # %bb.0:500; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma501; CHECK-NEXT: vssub.vv v8, v8, v12502; CHECK-NEXT: ret503 %v = call <8 x i64> @llvm.ssub.sat.v8i64(<8 x i64> %va, <8 x i64> %b)504 ret <8 x i64> %v505}506 507define <8 x i64> @ssub_v8i64_vx(<8 x i64> %va, i64 %b) {508; RV32-LABEL: ssub_v8i64_vx:509; RV32: # %bb.0:510; RV32-NEXT: addi sp, sp, -16511; RV32-NEXT: .cfi_def_cfa_offset 16512; RV32-NEXT: sw a0, 8(sp)513; RV32-NEXT: sw a1, 12(sp)514; RV32-NEXT: addi a0, sp, 8515; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma516; RV32-NEXT: vlse64.v v12, (a0), zero517; RV32-NEXT: vssub.vv v8, v8, v12518; RV32-NEXT: addi sp, sp, 16519; RV32-NEXT: .cfi_def_cfa_offset 0520; RV32-NEXT: ret521;522; RV64-LABEL: ssub_v8i64_vx:523; RV64: # %bb.0:524; RV64-NEXT: vsetivli zero, 8, e64, m4, ta, ma525; RV64-NEXT: vssub.vx v8, v8, a0526; RV64-NEXT: ret527 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0528 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer529 %v = call <8 x i64> @llvm.ssub.sat.v8i64(<8 x i64> %va, <8 x i64> %vb)530 ret <8 x i64> %v531}532 533define <8 x i64> @ssub_v8i64_vi(<8 x i64> %va) {534; CHECK-LABEL: ssub_v8i64_vi:535; CHECK: # %bb.0:536; CHECK-NEXT: li a0, 1537; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma538; CHECK-NEXT: vssub.vx v8, v8, a0539; CHECK-NEXT: ret540 %v = call <8 x i64> @llvm.ssub.sat.v8i64(<8 x i64> %va, <8 x i64> splat (i64 1))541 ret <8 x i64> %v542}543 544define <16 x i64> @ssub_v16i64_vv(<16 x i64> %va, <16 x i64> %b) {545; CHECK-LABEL: ssub_v16i64_vv:546; CHECK: # %bb.0:547; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma548; CHECK-NEXT: vssub.vv v8, v8, v16549; CHECK-NEXT: ret550 %v = call <16 x i64> @llvm.ssub.sat.v16i64(<16 x i64> %va, <16 x i64> %b)551 ret <16 x i64> %v552}553 554define <16 x i64> @ssub_v16i64_vx(<16 x i64> %va, i64 %b) {555; RV32-LABEL: ssub_v16i64_vx:556; RV32: # %bb.0:557; RV32-NEXT: addi sp, sp, -16558; RV32-NEXT: .cfi_def_cfa_offset 16559; RV32-NEXT: sw a0, 8(sp)560; RV32-NEXT: sw a1, 12(sp)561; RV32-NEXT: addi a0, sp, 8562; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma563; RV32-NEXT: vlse64.v v16, (a0), zero564; RV32-NEXT: vssub.vv v8, v8, v16565; RV32-NEXT: addi sp, sp, 16566; RV32-NEXT: .cfi_def_cfa_offset 0567; RV32-NEXT: ret568;569; RV64-LABEL: ssub_v16i64_vx:570; RV64: # %bb.0:571; RV64-NEXT: vsetivli zero, 16, e64, m8, ta, ma572; RV64-NEXT: vssub.vx v8, v8, a0573; RV64-NEXT: ret574 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0575 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer576 %v = call <16 x i64> @llvm.ssub.sat.v16i64(<16 x i64> %va, <16 x i64> %vb)577 ret <16 x i64> %v578}579 580define <16 x i64> @ssub_v16i64_vi(<16 x i64> %va) {581; CHECK-LABEL: ssub_v16i64_vi:582; CHECK: # %bb.0:583; CHECK-NEXT: li a0, 1584; CHECK-NEXT: vsetivli zero, 16, e64, m8, ta, ma585; CHECK-NEXT: vssub.vx v8, v8, a0586; CHECK-NEXT: ret587 %v = call <16 x i64> @llvm.ssub.sat.v16i64(<16 x i64> %va, <16 x i64> splat (i64 1))588 ret <16 x i64> %v589}590