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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <8 x i7> @vsub_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vsub_vv_v8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma11; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t12; CHECK-NEXT: ret13 %v = call <8 x i7> @llvm.vp.sub.v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 %evl)14 ret <8 x i7> %v15}16 17define <2 x i8> @vsub_vv_v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 zeroext %evl) {18; CHECK-LABEL: vsub_vv_v2i8:19; CHECK: # %bb.0:20; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma21; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t22; CHECK-NEXT: ret23 %v = call <2 x i8> @llvm.vp.sub.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 %evl)24 ret <2 x i8> %v25}26 27define <2 x i8> @vsub_vv_v2i8_unmasked(<2 x i8> %va, <2 x i8> %b, i32 zeroext %evl) {28; CHECK-LABEL: vsub_vv_v2i8_unmasked:29; CHECK: # %bb.0:30; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma31; CHECK-NEXT: vsub.vv v8, v8, v932; CHECK-NEXT: ret33 %v = call <2 x i8> @llvm.vp.sub.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> splat (i1 true), i32 %evl)34 ret <2 x i8> %v35}36 37define <2 x i8> @vsub_vx_v2i8(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {38; CHECK-LABEL: vsub_vx_v2i8:39; CHECK: # %bb.0:40; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma41; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t42; CHECK-NEXT: ret43 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 044 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer45 %v = call <2 x i8> @llvm.vp.sub.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> %m, i32 %evl)46 ret <2 x i8> %v47}48 49define <2 x i8> @vsub_vx_v2i8_unmasked(<2 x i8> %va, i8 %b, i32 zeroext %evl) {50; CHECK-LABEL: vsub_vx_v2i8_unmasked:51; CHECK: # %bb.0:52; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma53; CHECK-NEXT: vsub.vx v8, v8, a054; CHECK-NEXT: ret55 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 056 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer57 %v = call <2 x i8> @llvm.vp.sub.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> splat (i1 true), i32 %evl)58 ret <2 x i8> %v59}60 61define <3 x i8> @vsub_vv_v3i8(<3 x i8> %va, <3 x i8> %b, <3 x i1> %m, i32 zeroext %evl) {62; CHECK-LABEL: vsub_vv_v3i8:63; CHECK: # %bb.0:64; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma65; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t66; CHECK-NEXT: ret67 %v = call <3 x i8> @llvm.vp.sub.v3i8(<3 x i8> %va, <3 x i8> %b, <3 x i1> %m, i32 %evl)68 ret <3 x i8> %v69}70 71define <3 x i8> @vsub_vv_v3i8_unmasked(<3 x i8> %va, <3 x i8> %b, i32 zeroext %evl) {72; CHECK-LABEL: vsub_vv_v3i8_unmasked:73; CHECK: # %bb.0:74; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma75; CHECK-NEXT: vsub.vv v8, v8, v976; CHECK-NEXT: ret77 %v = call <3 x i8> @llvm.vp.sub.v3i8(<3 x i8> %va, <3 x i8> %b, <3 x i1> splat (i1 true), i32 %evl)78 ret <3 x i8> %v79}80 81define <3 x i8> @vsub_vx_v3i8(<3 x i8> %va, i8 %b, <3 x i1> %m, i32 zeroext %evl) {82; CHECK-LABEL: vsub_vx_v3i8:83; CHECK: # %bb.0:84; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma85; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t86; CHECK-NEXT: ret87 %elt.head = insertelement <3 x i8> poison, i8 %b, i32 088 %vb = shufflevector <3 x i8> %elt.head, <3 x i8> poison, <3 x i32> zeroinitializer89 %v = call <3 x i8> @llvm.vp.sub.v3i8(<3 x i8> %va, <3 x i8> %vb, <3 x i1> %m, i32 %evl)90 ret <3 x i8> %v91}92 93define <3 x i8> @vsub_vx_v3i8_unmasked(<3 x i8> %va, i8 %b, i32 zeroext %evl) {94; CHECK-LABEL: vsub_vx_v3i8_unmasked:95; CHECK: # %bb.0:96; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma97; CHECK-NEXT: vsub.vx v8, v8, a098; CHECK-NEXT: ret99 %elt.head = insertelement <3 x i8> poison, i8 %b, i32 0100 %vb = shufflevector <3 x i8> %elt.head, <3 x i8> poison, <3 x i32> zeroinitializer101 %v = call <3 x i8> @llvm.vp.sub.v3i8(<3 x i8> %va, <3 x i8> %vb, <3 x i1> splat (i1 true), i32 %evl)102 ret <3 x i8> %v103}104 105define <4 x i8> @vsub_vv_v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 zeroext %evl) {106; CHECK-LABEL: vsub_vv_v4i8:107; CHECK: # %bb.0:108; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma109; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t110; CHECK-NEXT: ret111 %v = call <4 x i8> @llvm.vp.sub.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 %evl)112 ret <4 x i8> %v113}114 115define <4 x i8> @vsub_vv_v4i8_unmasked(<4 x i8> %va, <4 x i8> %b, i32 zeroext %evl) {116; CHECK-LABEL: vsub_vv_v4i8_unmasked:117; CHECK: # %bb.0:118; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma119; CHECK-NEXT: vsub.vv v8, v8, v9120; CHECK-NEXT: ret121 %v = call <4 x i8> @llvm.vp.sub.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> splat (i1 true), i32 %evl)122 ret <4 x i8> %v123}124 125define <4 x i8> @vsub_vx_v4i8(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {126; CHECK-LABEL: vsub_vx_v4i8:127; CHECK: # %bb.0:128; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma129; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t130; CHECK-NEXT: ret131 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0132 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer133 %v = call <4 x i8> @llvm.vp.sub.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> %m, i32 %evl)134 ret <4 x i8> %v135}136 137define <4 x i8> @vsub_vx_v4i8_unmasked(<4 x i8> %va, i8 %b, i32 zeroext %evl) {138; CHECK-LABEL: vsub_vx_v4i8_unmasked:139; CHECK: # %bb.0:140; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma141; CHECK-NEXT: vsub.vx v8, v8, a0142; CHECK-NEXT: ret143 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0144 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer145 %v = call <4 x i8> @llvm.vp.sub.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> splat (i1 true), i32 %evl)146 ret <4 x i8> %v147}148 149define <8 x i8> @vsub_vv_v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 zeroext %evl) {150; CHECK-LABEL: vsub_vv_v8i8:151; CHECK: # %bb.0:152; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma153; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t154; CHECK-NEXT: ret155 %v = call <8 x i8> @llvm.vp.sub.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 %evl)156 ret <8 x i8> %v157}158 159define <8 x i8> @vsub_vv_v8i8_unmasked(<8 x i8> %va, <8 x i8> %b, i32 zeroext %evl) {160; CHECK-LABEL: vsub_vv_v8i8_unmasked:161; CHECK: # %bb.0:162; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma163; CHECK-NEXT: vsub.vv v8, v8, v9164; CHECK-NEXT: ret165 %v = call <8 x i8> @llvm.vp.sub.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> splat (i1 true), i32 %evl)166 ret <8 x i8> %v167}168 169define <8 x i8> @vsub_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {170; CHECK-LABEL: vsub_vx_v8i8:171; CHECK: # %bb.0:172; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma173; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t174; CHECK-NEXT: ret175 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0176 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer177 %v = call <8 x i8> @llvm.vp.sub.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 %evl)178 ret <8 x i8> %v179}180 181define <8 x i8> @vsub_vx_v8i8_unmasked(<8 x i8> %va, i8 %b, i32 zeroext %evl) {182; CHECK-LABEL: vsub_vx_v8i8_unmasked:183; CHECK: # %bb.0:184; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma185; CHECK-NEXT: vsub.vx v8, v8, a0186; CHECK-NEXT: ret187 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0188 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer189 %v = call <8 x i8> @llvm.vp.sub.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> splat (i1 true), i32 %evl)190 ret <8 x i8> %v191}192 193define <16 x i8> @vsub_vv_v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 zeroext %evl) {194; CHECK-LABEL: vsub_vv_v16i8:195; CHECK: # %bb.0:196; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma197; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t198; CHECK-NEXT: ret199 %v = call <16 x i8> @llvm.vp.sub.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 %evl)200 ret <16 x i8> %v201}202 203define <16 x i8> @vsub_vv_v16i8_unmasked(<16 x i8> %va, <16 x i8> %b, i32 zeroext %evl) {204; CHECK-LABEL: vsub_vv_v16i8_unmasked:205; CHECK: # %bb.0:206; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma207; CHECK-NEXT: vsub.vv v8, v8, v9208; CHECK-NEXT: ret209 %v = call <16 x i8> @llvm.vp.sub.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> splat (i1 true), i32 %evl)210 ret <16 x i8> %v211}212 213define <16 x i8> @vsub_vx_v16i8(<16 x i8> %va, i8 %b, <16 x i1> %m, i32 zeroext %evl) {214; CHECK-LABEL: vsub_vx_v16i8:215; CHECK: # %bb.0:216; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma217; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t218; CHECK-NEXT: ret219 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0220 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer221 %v = call <16 x i8> @llvm.vp.sub.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> %m, i32 %evl)222 ret <16 x i8> %v223}224 225define <16 x i8> @vsub_vx_v16i8_unmasked(<16 x i8> %va, i8 %b, i32 zeroext %evl) {226; CHECK-LABEL: vsub_vx_v16i8_unmasked:227; CHECK: # %bb.0:228; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma229; CHECK-NEXT: vsub.vx v8, v8, a0230; CHECK-NEXT: ret231 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0232 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer233 %v = call <16 x i8> @llvm.vp.sub.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> splat (i1 true), i32 %evl)234 ret <16 x i8> %v235}236 237define <2 x i16> @vsub_vv_v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 zeroext %evl) {238; CHECK-LABEL: vsub_vv_v2i16:239; CHECK: # %bb.0:240; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma241; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t242; CHECK-NEXT: ret243 %v = call <2 x i16> @llvm.vp.sub.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 %evl)244 ret <2 x i16> %v245}246 247define <2 x i16> @vsub_vv_v2i16_unmasked(<2 x i16> %va, <2 x i16> %b, i32 zeroext %evl) {248; CHECK-LABEL: vsub_vv_v2i16_unmasked:249; CHECK: # %bb.0:250; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma251; CHECK-NEXT: vsub.vv v8, v8, v9252; CHECK-NEXT: ret253 %v = call <2 x i16> @llvm.vp.sub.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> splat (i1 true), i32 %evl)254 ret <2 x i16> %v255}256 257define <2 x i16> @vsub_vx_v2i16(<2 x i16> %va, i16 %b, <2 x i1> %m, i32 zeroext %evl) {258; CHECK-LABEL: vsub_vx_v2i16:259; CHECK: # %bb.0:260; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma261; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t262; CHECK-NEXT: ret263 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0264 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer265 %v = call <2 x i16> @llvm.vp.sub.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> %m, i32 %evl)266 ret <2 x i16> %v267}268 269define <2 x i16> @vsub_vx_v2i16_unmasked(<2 x i16> %va, i16 %b, i32 zeroext %evl) {270; CHECK-LABEL: vsub_vx_v2i16_unmasked:271; CHECK: # %bb.0:272; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma273; CHECK-NEXT: vsub.vx v8, v8, a0274; CHECK-NEXT: ret275 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0276 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer277 %v = call <2 x i16> @llvm.vp.sub.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> splat (i1 true), i32 %evl)278 ret <2 x i16> %v279}280 281define <4 x i16> @vsub_vv_v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 zeroext %evl) {282; CHECK-LABEL: vsub_vv_v4i16:283; CHECK: # %bb.0:284; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma285; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t286; CHECK-NEXT: ret287 %v = call <4 x i16> @llvm.vp.sub.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 %evl)288 ret <4 x i16> %v289}290 291define <4 x i16> @vsub_vv_v4i16_unmasked(<4 x i16> %va, <4 x i16> %b, i32 zeroext %evl) {292; CHECK-LABEL: vsub_vv_v4i16_unmasked:293; CHECK: # %bb.0:294; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma295; CHECK-NEXT: vsub.vv v8, v8, v9296; CHECK-NEXT: ret297 %v = call <4 x i16> @llvm.vp.sub.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> splat (i1 true), i32 %evl)298 ret <4 x i16> %v299}300 301define <4 x i16> @vsub_vx_v4i16(<4 x i16> %va, i16 %b, <4 x i1> %m, i32 zeroext %evl) {302; CHECK-LABEL: vsub_vx_v4i16:303; CHECK: # %bb.0:304; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma305; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t306; CHECK-NEXT: ret307 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0308 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer309 %v = call <4 x i16> @llvm.vp.sub.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> %m, i32 %evl)310 ret <4 x i16> %v311}312 313define <4 x i16> @vsub_vx_v4i16_unmasked(<4 x i16> %va, i16 %b, i32 zeroext %evl) {314; CHECK-LABEL: vsub_vx_v4i16_unmasked:315; CHECK: # %bb.0:316; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma317; CHECK-NEXT: vsub.vx v8, v8, a0318; CHECK-NEXT: ret319 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0320 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer321 %v = call <4 x i16> @llvm.vp.sub.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> splat (i1 true), i32 %evl)322 ret <4 x i16> %v323}324 325define <8 x i16> @vsub_vv_v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 zeroext %evl) {326; CHECK-LABEL: vsub_vv_v8i16:327; CHECK: # %bb.0:328; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma329; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t330; CHECK-NEXT: ret331 %v = call <8 x i16> @llvm.vp.sub.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 %evl)332 ret <8 x i16> %v333}334 335define <8 x i16> @vsub_vv_v8i16_unmasked(<8 x i16> %va, <8 x i16> %b, i32 zeroext %evl) {336; CHECK-LABEL: vsub_vv_v8i16_unmasked:337; CHECK: # %bb.0:338; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma339; CHECK-NEXT: vsub.vv v8, v8, v9340; CHECK-NEXT: ret341 %v = call <8 x i16> @llvm.vp.sub.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> splat (i1 true), i32 %evl)342 ret <8 x i16> %v343}344 345define <8 x i16> @vsub_vx_v8i16(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {346; CHECK-LABEL: vsub_vx_v8i16:347; CHECK: # %bb.0:348; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma349; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t350; CHECK-NEXT: ret351 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0352 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer353 %v = call <8 x i16> @llvm.vp.sub.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> %m, i32 %evl)354 ret <8 x i16> %v355}356 357define <8 x i16> @vsub_vx_v8i16_unmasked(<8 x i16> %va, i16 %b, i32 zeroext %evl) {358; CHECK-LABEL: vsub_vx_v8i16_unmasked:359; CHECK: # %bb.0:360; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma361; CHECK-NEXT: vsub.vx v8, v8, a0362; CHECK-NEXT: ret363 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0364 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer365 %v = call <8 x i16> @llvm.vp.sub.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> splat (i1 true), i32 %evl)366 ret <8 x i16> %v367}368 369define <16 x i16> @vsub_vv_v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 zeroext %evl) {370; CHECK-LABEL: vsub_vv_v16i16:371; CHECK: # %bb.0:372; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma373; CHECK-NEXT: vsub.vv v8, v8, v10, v0.t374; CHECK-NEXT: ret375 %v = call <16 x i16> @llvm.vp.sub.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 %evl)376 ret <16 x i16> %v377}378 379define <16 x i16> @vsub_vv_v16i16_unmasked(<16 x i16> %va, <16 x i16> %b, i32 zeroext %evl) {380; CHECK-LABEL: vsub_vv_v16i16_unmasked:381; CHECK: # %bb.0:382; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma383; CHECK-NEXT: vsub.vv v8, v8, v10384; CHECK-NEXT: ret385 %v = call <16 x i16> @llvm.vp.sub.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> splat (i1 true), i32 %evl)386 ret <16 x i16> %v387}388 389define <16 x i16> @vsub_vx_v16i16(<16 x i16> %va, i16 %b, <16 x i1> %m, i32 zeroext %evl) {390; CHECK-LABEL: vsub_vx_v16i16:391; CHECK: # %bb.0:392; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma393; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t394; CHECK-NEXT: ret395 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0396 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer397 %v = call <16 x i16> @llvm.vp.sub.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> %m, i32 %evl)398 ret <16 x i16> %v399}400 401define <16 x i16> @vsub_vx_v16i16_unmasked(<16 x i16> %va, i16 %b, i32 zeroext %evl) {402; CHECK-LABEL: vsub_vx_v16i16_unmasked:403; CHECK: # %bb.0:404; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma405; CHECK-NEXT: vsub.vx v8, v8, a0406; CHECK-NEXT: ret407 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0408 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer409 %v = call <16 x i16> @llvm.vp.sub.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> splat (i1 true), i32 %evl)410 ret <16 x i16> %v411}412 413define <2 x i32> @vsub_vv_v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 zeroext %evl) {414; CHECK-LABEL: vsub_vv_v2i32:415; CHECK: # %bb.0:416; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma417; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t418; CHECK-NEXT: ret419 %v = call <2 x i32> @llvm.vp.sub.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 %evl)420 ret <2 x i32> %v421}422 423define <2 x i32> @vsub_vv_v2i32_unmasked(<2 x i32> %va, <2 x i32> %b, i32 zeroext %evl) {424; CHECK-LABEL: vsub_vv_v2i32_unmasked:425; CHECK: # %bb.0:426; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma427; CHECK-NEXT: vsub.vv v8, v8, v9428; CHECK-NEXT: ret429 %v = call <2 x i32> @llvm.vp.sub.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> splat (i1 true), i32 %evl)430 ret <2 x i32> %v431}432 433define <2 x i32> @vsub_vx_v2i32(<2 x i32> %va, i32 %b, <2 x i1> %m, i32 zeroext %evl) {434; CHECK-LABEL: vsub_vx_v2i32:435; CHECK: # %bb.0:436; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma437; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t438; CHECK-NEXT: ret439 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0440 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer441 %v = call <2 x i32> @llvm.vp.sub.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> %m, i32 %evl)442 ret <2 x i32> %v443}444 445define <2 x i32> @vsub_vx_v2i32_unmasked(<2 x i32> %va, i32 %b, i32 zeroext %evl) {446; CHECK-LABEL: vsub_vx_v2i32_unmasked:447; CHECK: # %bb.0:448; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma449; CHECK-NEXT: vsub.vx v8, v8, a0450; CHECK-NEXT: ret451 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0452 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer453 %v = call <2 x i32> @llvm.vp.sub.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> splat (i1 true), i32 %evl)454 ret <2 x i32> %v455}456 457define <4 x i32> @vsub_vv_v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 zeroext %evl) {458; CHECK-LABEL: vsub_vv_v4i32:459; CHECK: # %bb.0:460; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma461; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t462; CHECK-NEXT: ret463 %v = call <4 x i32> @llvm.vp.sub.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 %evl)464 ret <4 x i32> %v465}466 467define <4 x i32> @vsub_vv_v4i32_unmasked(<4 x i32> %va, <4 x i32> %b, i32 zeroext %evl) {468; CHECK-LABEL: vsub_vv_v4i32_unmasked:469; CHECK: # %bb.0:470; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma471; CHECK-NEXT: vsub.vv v8, v8, v9472; CHECK-NEXT: ret473 %v = call <4 x i32> @llvm.vp.sub.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> splat (i1 true), i32 %evl)474 ret <4 x i32> %v475}476 477define <4 x i32> @vsub_vx_v4i32(<4 x i32> %va, i32 %b, <4 x i1> %m, i32 zeroext %evl) {478; CHECK-LABEL: vsub_vx_v4i32:479; CHECK: # %bb.0:480; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma481; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t482; CHECK-NEXT: ret483 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0484 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer485 %v = call <4 x i32> @llvm.vp.sub.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> %m, i32 %evl)486 ret <4 x i32> %v487}488 489define <4 x i32> @vsub_vx_v4i32_unmasked(<4 x i32> %va, i32 %b, i32 zeroext %evl) {490; CHECK-LABEL: vsub_vx_v4i32_unmasked:491; CHECK: # %bb.0:492; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma493; CHECK-NEXT: vsub.vx v8, v8, a0494; CHECK-NEXT: ret495 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0496 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer497 %v = call <4 x i32> @llvm.vp.sub.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> splat (i1 true), i32 %evl)498 ret <4 x i32> %v499}500 501define <8 x i32> @vsub_vv_v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 zeroext %evl) {502; CHECK-LABEL: vsub_vv_v8i32:503; CHECK: # %bb.0:504; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma505; CHECK-NEXT: vsub.vv v8, v8, v10, v0.t506; CHECK-NEXT: ret507 %v = call <8 x i32> @llvm.vp.sub.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 %evl)508 ret <8 x i32> %v509}510 511define <8 x i32> @vsub_vv_v8i32_unmasked(<8 x i32> %va, <8 x i32> %b, i32 zeroext %evl) {512; CHECK-LABEL: vsub_vv_v8i32_unmasked:513; CHECK: # %bb.0:514; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma515; CHECK-NEXT: vsub.vv v8, v8, v10516; CHECK-NEXT: ret517 %v = call <8 x i32> @llvm.vp.sub.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> splat (i1 true), i32 %evl)518 ret <8 x i32> %v519}520 521define <8 x i32> @vsub_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {522; CHECK-LABEL: vsub_vx_v8i32:523; CHECK: # %bb.0:524; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma525; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t526; CHECK-NEXT: ret527 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0528 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer529 %v = call <8 x i32> @llvm.vp.sub.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 %evl)530 ret <8 x i32> %v531}532 533define <8 x i32> @vsub_vx_v8i32_unmasked(<8 x i32> %va, i32 %b, i32 zeroext %evl) {534; CHECK-LABEL: vsub_vx_v8i32_unmasked:535; CHECK: # %bb.0:536; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma537; CHECK-NEXT: vsub.vx v8, v8, a0538; CHECK-NEXT: ret539 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0540 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer541 %v = call <8 x i32> @llvm.vp.sub.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> splat (i1 true), i32 %evl)542 ret <8 x i32> %v543}544 545define <16 x i32> @vsub_vv_v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 zeroext %evl) {546; CHECK-LABEL: vsub_vv_v16i32:547; CHECK: # %bb.0:548; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma549; CHECK-NEXT: vsub.vv v8, v8, v12, v0.t550; CHECK-NEXT: ret551 %v = call <16 x i32> @llvm.vp.sub.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 %evl)552 ret <16 x i32> %v553}554 555define <16 x i32> @vsub_vv_v16i32_unmasked(<16 x i32> %va, <16 x i32> %b, i32 zeroext %evl) {556; CHECK-LABEL: vsub_vv_v16i32_unmasked:557; CHECK: # %bb.0:558; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma559; CHECK-NEXT: vsub.vv v8, v8, v12560; CHECK-NEXT: ret561 %v = call <16 x i32> @llvm.vp.sub.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> splat (i1 true), i32 %evl)562 ret <16 x i32> %v563}564 565define <16 x i32> @vsub_vx_v16i32(<16 x i32> %va, i32 %b, <16 x i1> %m, i32 zeroext %evl) {566; CHECK-LABEL: vsub_vx_v16i32:567; CHECK: # %bb.0:568; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma569; CHECK-NEXT: vsub.vx v8, v8, a0, v0.t570; CHECK-NEXT: ret571 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0572 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer573 %v = call <16 x i32> @llvm.vp.sub.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> %m, i32 %evl)574 ret <16 x i32> %v575}576 577define <16 x i32> @vsub_vx_v16i32_unmasked(<16 x i32> %va, i32 %b, i32 zeroext %evl) {578; CHECK-LABEL: vsub_vx_v16i32_unmasked:579; CHECK: # %bb.0:580; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma581; CHECK-NEXT: vsub.vx v8, v8, a0582; CHECK-NEXT: ret583 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0584 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer585 %v = call <16 x i32> @llvm.vp.sub.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> splat (i1 true), i32 %evl)586 ret <16 x i32> %v587}588 589define <2 x i64> @vsub_vv_v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 zeroext %evl) {590; CHECK-LABEL: vsub_vv_v2i64:591; CHECK: # %bb.0:592; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma593; CHECK-NEXT: vsub.vv v8, v8, v9, v0.t594; CHECK-NEXT: ret595 %v = call <2 x i64> @llvm.vp.sub.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 %evl)596 ret <2 x i64> %v597}598 599define <2 x i64> @vsub_vv_v2i64_unmasked(<2 x i64> %va, <2 x i64> %b, i32 zeroext %evl) {600; CHECK-LABEL: vsub_vv_v2i64_unmasked:601; CHECK: # %bb.0:602; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma603; CHECK-NEXT: vsub.vv v8, v8, v9604; CHECK-NEXT: ret605 %v = call <2 x i64> @llvm.vp.sub.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> splat (i1 true), i32 %evl)606 ret <2 x i64> %v607}608 609define <2 x i64> @vsub_vx_v2i64(<2 x i64> %va, i64 %b, <2 x i1> %m, i32 zeroext %evl) {610; RV32-LABEL: vsub_vx_v2i64:611; RV32: # %bb.0:612; RV32-NEXT: addi sp, sp, -16613; RV32-NEXT: .cfi_def_cfa_offset 16614; RV32-NEXT: sw a0, 8(sp)615; RV32-NEXT: sw a1, 12(sp)616; RV32-NEXT: addi a0, sp, 8617; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma618; RV32-NEXT: vlse64.v v9, (a0), zero619; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma620; RV32-NEXT: vsub.vv v8, v8, v9, v0.t621; RV32-NEXT: addi sp, sp, 16622; RV32-NEXT: .cfi_def_cfa_offset 0623; RV32-NEXT: ret624;625; RV64-LABEL: vsub_vx_v2i64:626; RV64: # %bb.0:627; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma628; RV64-NEXT: vsub.vx v8, v8, a0, v0.t629; RV64-NEXT: ret630 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0631 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer632 %v = call <2 x i64> @llvm.vp.sub.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> %m, i32 %evl)633 ret <2 x i64> %v634}635 636define <2 x i64> @vsub_vx_v2i64_unmasked(<2 x i64> %va, i64 %b, i32 zeroext %evl) {637; RV32-LABEL: vsub_vx_v2i64_unmasked:638; RV32: # %bb.0:639; RV32-NEXT: addi sp, sp, -16640; RV32-NEXT: .cfi_def_cfa_offset 16641; RV32-NEXT: sw a0, 8(sp)642; RV32-NEXT: sw a1, 12(sp)643; RV32-NEXT: addi a0, sp, 8644; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma645; RV32-NEXT: vlse64.v v9, (a0), zero646; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma647; RV32-NEXT: vsub.vv v8, v8, v9648; RV32-NEXT: addi sp, sp, 16649; RV32-NEXT: .cfi_def_cfa_offset 0650; RV32-NEXT: ret651;652; RV64-LABEL: vsub_vx_v2i64_unmasked:653; RV64: # %bb.0:654; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma655; RV64-NEXT: vsub.vx v8, v8, a0656; RV64-NEXT: ret657 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0658 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer659 %v = call <2 x i64> @llvm.vp.sub.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> splat (i1 true), i32 %evl)660 ret <2 x i64> %v661}662 663define <4 x i64> @vsub_vv_v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 zeroext %evl) {664; CHECK-LABEL: vsub_vv_v4i64:665; CHECK: # %bb.0:666; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma667; CHECK-NEXT: vsub.vv v8, v8, v10, v0.t668; CHECK-NEXT: ret669 %v = call <4 x i64> @llvm.vp.sub.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 %evl)670 ret <4 x i64> %v671}672 673define <4 x i64> @vsub_vv_v4i64_unmasked(<4 x i64> %va, <4 x i64> %b, i32 zeroext %evl) {674; CHECK-LABEL: vsub_vv_v4i64_unmasked:675; CHECK: # %bb.0:676; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma677; CHECK-NEXT: vsub.vv v8, v8, v10678; CHECK-NEXT: ret679 %v = call <4 x i64> @llvm.vp.sub.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> splat (i1 true), i32 %evl)680 ret <4 x i64> %v681}682 683define <4 x i64> @vsub_vx_v4i64(<4 x i64> %va, i64 %b, <4 x i1> %m, i32 zeroext %evl) {684; RV32-LABEL: vsub_vx_v4i64:685; RV32: # %bb.0:686; RV32-NEXT: addi sp, sp, -16687; RV32-NEXT: .cfi_def_cfa_offset 16688; RV32-NEXT: sw a0, 8(sp)689; RV32-NEXT: sw a1, 12(sp)690; RV32-NEXT: addi a0, sp, 8691; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma692; RV32-NEXT: vlse64.v v10, (a0), zero693; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma694; RV32-NEXT: vsub.vv v8, v8, v10, v0.t695; RV32-NEXT: addi sp, sp, 16696; RV32-NEXT: .cfi_def_cfa_offset 0697; RV32-NEXT: ret698;699; RV64-LABEL: vsub_vx_v4i64:700; RV64: # %bb.0:701; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma702; RV64-NEXT: vsub.vx v8, v8, a0, v0.t703; RV64-NEXT: ret704 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0705 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer706 %v = call <4 x i64> @llvm.vp.sub.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> %m, i32 %evl)707 ret <4 x i64> %v708}709 710define <4 x i64> @vsub_vx_v4i64_unmasked(<4 x i64> %va, i64 %b, i32 zeroext %evl) {711; RV32-LABEL: vsub_vx_v4i64_unmasked:712; RV32: # %bb.0:713; RV32-NEXT: addi sp, sp, -16714; RV32-NEXT: .cfi_def_cfa_offset 16715; RV32-NEXT: sw a0, 8(sp)716; RV32-NEXT: sw a1, 12(sp)717; RV32-NEXT: addi a0, sp, 8718; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma719; RV32-NEXT: vlse64.v v10, (a0), zero720; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma721; RV32-NEXT: vsub.vv v8, v8, v10722; RV32-NEXT: addi sp, sp, 16723; RV32-NEXT: .cfi_def_cfa_offset 0724; RV32-NEXT: ret725;726; RV64-LABEL: vsub_vx_v4i64_unmasked:727; RV64: # %bb.0:728; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma729; RV64-NEXT: vsub.vx v8, v8, a0730; RV64-NEXT: ret731 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0732 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer733 %v = call <4 x i64> @llvm.vp.sub.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> splat (i1 true), i32 %evl)734 ret <4 x i64> %v735}736 737define <8 x i64> @vsub_vv_v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 zeroext %evl) {738; CHECK-LABEL: vsub_vv_v8i64:739; CHECK: # %bb.0:740; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma741; CHECK-NEXT: vsub.vv v8, v8, v12, v0.t742; CHECK-NEXT: ret743 %v = call <8 x i64> @llvm.vp.sub.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 %evl)744 ret <8 x i64> %v745}746 747define <8 x i64> @vsub_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %b, i32 zeroext %evl) {748; CHECK-LABEL: vsub_vv_v8i64_unmasked:749; CHECK: # %bb.0:750; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma751; CHECK-NEXT: vsub.vv v8, v8, v12752; CHECK-NEXT: ret753 %v = call <8 x i64> @llvm.vp.sub.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> splat (i1 true), i32 %evl)754 ret <8 x i64> %v755}756 757define <8 x i64> @vsub_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {758; RV32-LABEL: vsub_vx_v8i64:759; RV32: # %bb.0:760; RV32-NEXT: addi sp, sp, -16761; RV32-NEXT: .cfi_def_cfa_offset 16762; RV32-NEXT: sw a0, 8(sp)763; RV32-NEXT: sw a1, 12(sp)764; RV32-NEXT: addi a0, sp, 8765; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma766; RV32-NEXT: vlse64.v v12, (a0), zero767; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma768; RV32-NEXT: vsub.vv v8, v8, v12, v0.t769; RV32-NEXT: addi sp, sp, 16770; RV32-NEXT: .cfi_def_cfa_offset 0771; RV32-NEXT: ret772;773; RV64-LABEL: vsub_vx_v8i64:774; RV64: # %bb.0:775; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma776; RV64-NEXT: vsub.vx v8, v8, a0, v0.t777; RV64-NEXT: ret778 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0779 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer780 %v = call <8 x i64> @llvm.vp.sub.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)781 ret <8 x i64> %v782}783 784define <8 x i64> @vsub_vx_v8i64_unmasked(<8 x i64> %va, i64 %b, i32 zeroext %evl) {785; RV32-LABEL: vsub_vx_v8i64_unmasked:786; RV32: # %bb.0:787; RV32-NEXT: addi sp, sp, -16788; RV32-NEXT: .cfi_def_cfa_offset 16789; RV32-NEXT: sw a0, 8(sp)790; RV32-NEXT: sw a1, 12(sp)791; RV32-NEXT: addi a0, sp, 8792; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma793; RV32-NEXT: vlse64.v v12, (a0), zero794; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma795; RV32-NEXT: vsub.vv v8, v8, v12796; RV32-NEXT: addi sp, sp, 16797; RV32-NEXT: .cfi_def_cfa_offset 0798; RV32-NEXT: ret799;800; RV64-LABEL: vsub_vx_v8i64_unmasked:801; RV64: # %bb.0:802; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma803; RV64-NEXT: vsub.vx v8, v8, a0804; RV64-NEXT: ret805 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0806 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer807 %v = call <8 x i64> @llvm.vp.sub.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> splat (i1 true), i32 %evl)808 ret <8 x i64> %v809}810 811define <16 x i64> @vsub_vv_v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 zeroext %evl) {812; CHECK-LABEL: vsub_vv_v16i64:813; CHECK: # %bb.0:814; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma815; CHECK-NEXT: vsub.vv v8, v8, v16, v0.t816; CHECK-NEXT: ret817 %v = call <16 x i64> @llvm.vp.sub.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 %evl)818 ret <16 x i64> %v819}820 821define <16 x i64> @vsub_vv_v16i64_unmasked(<16 x i64> %va, <16 x i64> %b, i32 zeroext %evl) {822; CHECK-LABEL: vsub_vv_v16i64_unmasked:823; CHECK: # %bb.0:824; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma825; CHECK-NEXT: vsub.vv v8, v8, v16826; CHECK-NEXT: ret827 %v = call <16 x i64> @llvm.vp.sub.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> splat (i1 true), i32 %evl)828 ret <16 x i64> %v829}830 831define <16 x i64> @vsub_vx_v16i64(<16 x i64> %va, i64 %b, <16 x i1> %m, i32 zeroext %evl) {832; RV32-LABEL: vsub_vx_v16i64:833; RV32: # %bb.0:834; RV32-NEXT: addi sp, sp, -16835; RV32-NEXT: .cfi_def_cfa_offset 16836; RV32-NEXT: sw a0, 8(sp)837; RV32-NEXT: sw a1, 12(sp)838; RV32-NEXT: addi a0, sp, 8839; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma840; RV32-NEXT: vlse64.v v16, (a0), zero841; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma842; RV32-NEXT: vsub.vv v8, v8, v16, v0.t843; RV32-NEXT: addi sp, sp, 16844; RV32-NEXT: .cfi_def_cfa_offset 0845; RV32-NEXT: ret846;847; RV64-LABEL: vsub_vx_v16i64:848; RV64: # %bb.0:849; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma850; RV64-NEXT: vsub.vx v8, v8, a0, v0.t851; RV64-NEXT: ret852 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0853 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer854 %v = call <16 x i64> @llvm.vp.sub.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> %m, i32 %evl)855 ret <16 x i64> %v856}857 858define <16 x i64> @vsub_vx_v16i64_unmasked(<16 x i64> %va, i64 %b, i32 zeroext %evl) {859; RV32-LABEL: vsub_vx_v16i64_unmasked:860; RV32: # %bb.0:861; RV32-NEXT: addi sp, sp, -16862; RV32-NEXT: .cfi_def_cfa_offset 16863; RV32-NEXT: sw a0, 8(sp)864; RV32-NEXT: sw a1, 12(sp)865; RV32-NEXT: addi a0, sp, 8866; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma867; RV32-NEXT: vlse64.v v16, (a0), zero868; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma869; RV32-NEXT: vsub.vv v8, v8, v16870; RV32-NEXT: addi sp, sp, 16871; RV32-NEXT: .cfi_def_cfa_offset 0872; RV32-NEXT: ret873;874; RV64-LABEL: vsub_vx_v16i64_unmasked:875; RV64: # %bb.0:876; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma877; RV64-NEXT: vsub.vx v8, v8, a0878; RV64-NEXT: ret879 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0880 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer881 %v = call <16 x i64> @llvm.vp.sub.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> splat (i1 true), i32 %evl)882 ret <16 x i64> %v883}884