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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s3; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s4 5define <2 x i16> @vwmaccu_v2i16(ptr %x, ptr %y, <2 x i16> %z) {6; CHECK-LABEL: vwmaccu_v2i16:7; CHECK: # %bb.0:8; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma9; CHECK-NEXT: vle8.v v9, (a0)10; CHECK-NEXT: vle8.v v10, (a1)11; CHECK-NEXT: vwmaccu.vv v8, v9, v1012; CHECK-NEXT: ret13 %a = load <2 x i8>, ptr %x14 %b = load <2 x i8>, ptr %y15 %c = zext <2 x i8> %a to <2 x i16>16 %d = zext <2 x i8> %b to <2 x i16>17 %e = mul <2 x i16> %c, %d18 %f = add <2 x i16> %e, %z19 ret <2 x i16> %f20}21 22define <4 x i16> @vwmaccu_v4i16(ptr %x, ptr %y, <4 x i16> %z) {23; CHECK-LABEL: vwmaccu_v4i16:24; CHECK: # %bb.0:25; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma26; CHECK-NEXT: vle8.v v9, (a0)27; CHECK-NEXT: vle8.v v10, (a1)28; CHECK-NEXT: vwmaccu.vv v8, v9, v1029; CHECK-NEXT: ret30 %a = load <4 x i8>, ptr %x31 %b = load <4 x i8>, ptr %y32 %c = zext <4 x i8> %a to <4 x i16>33 %d = zext <4 x i8> %b to <4 x i16>34 %e = mul <4 x i16> %c, %d35 %f = add <4 x i16> %e, %z36 ret <4 x i16> %f37}38 39define <2 x i32> @vwmaccu_v2i32(ptr %x, ptr %y, <2 x i32> %z) {40; CHECK-LABEL: vwmaccu_v2i32:41; CHECK: # %bb.0:42; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma43; CHECK-NEXT: vle16.v v9, (a0)44; CHECK-NEXT: vle16.v v10, (a1)45; CHECK-NEXT: vwmaccu.vv v8, v9, v1046; CHECK-NEXT: ret47 %a = load <2 x i16>, ptr %x48 %b = load <2 x i16>, ptr %y49 %c = zext <2 x i16> %a to <2 x i32>50 %d = zext <2 x i16> %b to <2 x i32>51 %e = mul <2 x i32> %c, %d52 %f = add <2 x i32> %e, %z53 ret <2 x i32> %f54}55 56define <8 x i16> @vwmaccu_v8i16(ptr %x, ptr %y, <8 x i16> %z) {57; CHECK-LABEL: vwmaccu_v8i16:58; CHECK: # %bb.0:59; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma60; CHECK-NEXT: vle8.v v9, (a0)61; CHECK-NEXT: vle8.v v10, (a1)62; CHECK-NEXT: vwmaccu.vv v8, v9, v1063; CHECK-NEXT: ret64 %a = load <8 x i8>, ptr %x65 %b = load <8 x i8>, ptr %y66 %c = zext <8 x i8> %a to <8 x i16>67 %d = zext <8 x i8> %b to <8 x i16>68 %e = mul <8 x i16> %c, %d69 %f = add <8 x i16> %e, %z70 ret <8 x i16> %f71}72 73define <4 x i32> @vwmaccu_v4i32(ptr %x, ptr %y, <4 x i32> %z) {74; CHECK-LABEL: vwmaccu_v4i32:75; CHECK: # %bb.0:76; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma77; CHECK-NEXT: vle16.v v9, (a0)78; CHECK-NEXT: vle16.v v10, (a1)79; CHECK-NEXT: vwmaccu.vv v8, v9, v1080; CHECK-NEXT: ret81 %a = load <4 x i16>, ptr %x82 %b = load <4 x i16>, ptr %y83 %c = zext <4 x i16> %a to <4 x i32>84 %d = zext <4 x i16> %b to <4 x i32>85 %e = mul <4 x i32> %c, %d86 %f = add <4 x i32> %e, %z87 ret <4 x i32> %f88}89 90define <2 x i64> @vwmaccu_v2i64(ptr %x, ptr %y, <2 x i64> %z) {91; CHECK-LABEL: vwmaccu_v2i64:92; CHECK: # %bb.0:93; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma94; CHECK-NEXT: vle32.v v9, (a0)95; CHECK-NEXT: vle32.v v10, (a1)96; CHECK-NEXT: vwmaccu.vv v8, v9, v1097; CHECK-NEXT: ret98 %a = load <2 x i32>, ptr %x99 %b = load <2 x i32>, ptr %y100 %c = zext <2 x i32> %a to <2 x i64>101 %d = zext <2 x i32> %b to <2 x i64>102 %e = mul <2 x i64> %c, %d103 %f = add <2 x i64> %e, %z104 ret <2 x i64> %f105}106 107define <16 x i16> @vwmaccu_v16i16(ptr %x, ptr %y, <16 x i16> %z) {108; CHECK-LABEL: vwmaccu_v16i16:109; CHECK: # %bb.0:110; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma111; CHECK-NEXT: vle8.v v10, (a0)112; CHECK-NEXT: vle8.v v11, (a1)113; CHECK-NEXT: vwmaccu.vv v8, v10, v11114; CHECK-NEXT: ret115 %a = load <16 x i8>, ptr %x116 %b = load <16 x i8>, ptr %y117 %c = zext <16 x i8> %a to <16 x i16>118 %d = zext <16 x i8> %b to <16 x i16>119 %e = mul <16 x i16> %c, %d120 %f = add <16 x i16> %e, %z121 ret <16 x i16> %f122}123 124define <8 x i32> @vwmaccu_v8i32(ptr %x, ptr %y, <8 x i32> %z) {125; CHECK-LABEL: vwmaccu_v8i32:126; CHECK: # %bb.0:127; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma128; CHECK-NEXT: vle16.v v10, (a0)129; CHECK-NEXT: vle16.v v11, (a1)130; CHECK-NEXT: vwmaccu.vv v8, v10, v11131; CHECK-NEXT: ret132 %a = load <8 x i16>, ptr %x133 %b = load <8 x i16>, ptr %y134 %c = zext <8 x i16> %a to <8 x i32>135 %d = zext <8 x i16> %b to <8 x i32>136 %e = mul <8 x i32> %c, %d137 %f = add <8 x i32> %e, %z138 ret <8 x i32> %f139}140 141define <4 x i64> @vwmaccu_v4i64(ptr %x, ptr %y, <4 x i64> %z) {142; CHECK-LABEL: vwmaccu_v4i64:143; CHECK: # %bb.0:144; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma145; CHECK-NEXT: vle32.v v10, (a0)146; CHECK-NEXT: vle32.v v11, (a1)147; CHECK-NEXT: vwmaccu.vv v8, v10, v11148; CHECK-NEXT: ret149 %a = load <4 x i32>, ptr %x150 %b = load <4 x i32>, ptr %y151 %c = zext <4 x i32> %a to <4 x i64>152 %d = zext <4 x i32> %b to <4 x i64>153 %e = mul <4 x i64> %c, %d154 %f = add <4 x i64> %e, %z155 ret <4 x i64> %f156}157 158define <32 x i16> @vwmaccu_v32i16(ptr %x, ptr %y, <32 x i16> %z) {159; CHECK-LABEL: vwmaccu_v32i16:160; CHECK: # %bb.0:161; CHECK-NEXT: li a2, 32162; CHECK-NEXT: vsetvli zero, a2, e8, m2, ta, ma163; CHECK-NEXT: vle8.v v12, (a0)164; CHECK-NEXT: vle8.v v14, (a1)165; CHECK-NEXT: vwmaccu.vv v8, v12, v14166; CHECK-NEXT: ret167 %a = load <32 x i8>, ptr %x168 %b = load <32 x i8>, ptr %y169 %c = zext <32 x i8> %a to <32 x i16>170 %d = zext <32 x i8> %b to <32 x i16>171 %e = mul <32 x i16> %c, %d172 %f = add <32 x i16> %e, %z173 ret <32 x i16> %f174}175 176define <16 x i32> @vwmaccu_v16i32(ptr %x, ptr %y, <16 x i32> %z) {177; CHECK-LABEL: vwmaccu_v16i32:178; CHECK: # %bb.0:179; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma180; CHECK-NEXT: vle16.v v12, (a0)181; CHECK-NEXT: vle16.v v14, (a1)182; CHECK-NEXT: vwmaccu.vv v8, v12, v14183; CHECK-NEXT: ret184 %a = load <16 x i16>, ptr %x185 %b = load <16 x i16>, ptr %y186 %c = zext <16 x i16> %a to <16 x i32>187 %d = zext <16 x i16> %b to <16 x i32>188 %e = mul <16 x i32> %c, %d189 %f = add <16 x i32> %e, %z190 ret <16 x i32> %f191}192 193define <8 x i64> @vwmaccu_v8i64(ptr %x, ptr %y, <8 x i64> %z) {194; CHECK-LABEL: vwmaccu_v8i64:195; CHECK: # %bb.0:196; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma197; CHECK-NEXT: vle32.v v12, (a0)198; CHECK-NEXT: vle32.v v14, (a1)199; CHECK-NEXT: vwmaccu.vv v8, v12, v14200; CHECK-NEXT: ret201 %a = load <8 x i32>, ptr %x202 %b = load <8 x i32>, ptr %y203 %c = zext <8 x i32> %a to <8 x i64>204 %d = zext <8 x i32> %b to <8 x i64>205 %e = mul <8 x i64> %c, %d206 %f = add <8 x i64> %e, %z207 ret <8 x i64> %f208}209 210define <64 x i16> @vwmaccu_v64i16(ptr %x, ptr %y, <64 x i16> %z) {211; CHECK-LABEL: vwmaccu_v64i16:212; CHECK: # %bb.0:213; CHECK-NEXT: li a2, 64214; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma215; CHECK-NEXT: vle8.v v16, (a0)216; CHECK-NEXT: vle8.v v20, (a1)217; CHECK-NEXT: vwmaccu.vv v8, v16, v20218; CHECK-NEXT: ret219 %a = load <64 x i8>, ptr %x220 %b = load <64 x i8>, ptr %y221 %c = zext <64 x i8> %a to <64 x i16>222 %d = zext <64 x i8> %b to <64 x i16>223 %e = mul <64 x i16> %c, %d224 %f = add <64 x i16> %e, %z225 ret <64 x i16> %f226}227 228define <32 x i32> @vwmaccu_v32i32(ptr %x, ptr %y, <32 x i32> %z) {229; CHECK-LABEL: vwmaccu_v32i32:230; CHECK: # %bb.0:231; CHECK-NEXT: li a2, 32232; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma233; CHECK-NEXT: vle16.v v16, (a0)234; CHECK-NEXT: vle16.v v20, (a1)235; CHECK-NEXT: vwmaccu.vv v8, v16, v20236; CHECK-NEXT: ret237 %a = load <32 x i16>, ptr %x238 %b = load <32 x i16>, ptr %y239 %c = zext <32 x i16> %a to <32 x i32>240 %d = zext <32 x i16> %b to <32 x i32>241 %e = mul <32 x i32> %c, %d242 %f = add <32 x i32> %e, %z243 ret <32 x i32> %f244}245 246define <16 x i64> @vwmaccu_v16i64(ptr %x, ptr %y, <16 x i64> %z) {247; CHECK-LABEL: vwmaccu_v16i64:248; CHECK: # %bb.0:249; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma250; CHECK-NEXT: vle32.v v16, (a0)251; CHECK-NEXT: vle32.v v20, (a1)252; CHECK-NEXT: vwmaccu.vv v8, v16, v20253; CHECK-NEXT: ret254 %a = load <16 x i32>, ptr %x255 %b = load <16 x i32>, ptr %y256 %c = zext <16 x i32> %a to <16 x i64>257 %d = zext <16 x i32> %b to <16 x i64>258 %e = mul <16 x i64> %c, %d259 %f = add <16 x i64> %e, %z260 ret <16 x i64> %f261}262 263define <2 x i16> @vwmaccu_vx_v2i16(ptr %x, i8 %y, <2 x i16> %z) {264; CHECK-LABEL: vwmaccu_vx_v2i16:265; CHECK: # %bb.0:266; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma267; CHECK-NEXT: vle8.v v9, (a0)268; CHECK-NEXT: vwmaccu.vx v8, a1, v9269; CHECK-NEXT: ret270 %a = load <2 x i8>, ptr %x271 %b = insertelement <2 x i8> poison, i8 %y, i32 0272 %c = shufflevector <2 x i8> %b, <2 x i8> poison, <2 x i32> zeroinitializer273 %d = zext <2 x i8> %a to <2 x i16>274 %e = zext <2 x i8> %c to <2 x i16>275 %f = mul <2 x i16> %d, %e276 %g = add <2 x i16> %f, %z277 ret <2 x i16> %g278}279 280define <4 x i16> @vwmaccu_vx_v4i16(ptr %x, i8 %y, <4 x i16> %z) {281; CHECK-LABEL: vwmaccu_vx_v4i16:282; CHECK: # %bb.0:283; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma284; CHECK-NEXT: vle8.v v9, (a0)285; CHECK-NEXT: vwmaccu.vx v8, a1, v9286; CHECK-NEXT: ret287 %a = load <4 x i8>, ptr %x288 %b = insertelement <4 x i8> poison, i8 %y, i32 0289 %c = shufflevector <4 x i8> %b, <4 x i8> poison, <4 x i32> zeroinitializer290 %d = zext <4 x i8> %a to <4 x i16>291 %e = zext <4 x i8> %c to <4 x i16>292 %f = mul <4 x i16> %d, %e293 %g = add <4 x i16> %f, %z294 ret <4 x i16> %g295}296 297define <2 x i32> @vwmaccu_vx_v2i32(ptr %x, i16 %y, <2 x i32> %z) {298; CHECK-LABEL: vwmaccu_vx_v2i32:299; CHECK: # %bb.0:300; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma301; CHECK-NEXT: vle16.v v9, (a0)302; CHECK-NEXT: vwmaccu.vx v8, a1, v9303; CHECK-NEXT: ret304 %a = load <2 x i16>, ptr %x305 %b = insertelement <2 x i16> poison, i16 %y, i32 0306 %c = shufflevector <2 x i16> %b, <2 x i16> poison, <2 x i32> zeroinitializer307 %d = zext <2 x i16> %a to <2 x i32>308 %e = zext <2 x i16> %c to <2 x i32>309 %f = mul <2 x i32> %d, %e310 %g = add <2 x i32> %f, %z311 ret <2 x i32> %g312}313 314define <8 x i16> @vwmaccu_vx_v8i16(ptr %x, i8 %y, <8 x i16> %z) {315; CHECK-LABEL: vwmaccu_vx_v8i16:316; CHECK: # %bb.0:317; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma318; CHECK-NEXT: vle8.v v9, (a0)319; CHECK-NEXT: vwmaccu.vx v8, a1, v9320; CHECK-NEXT: ret321 %a = load <8 x i8>, ptr %x322 %b = insertelement <8 x i8> poison, i8 %y, i32 0323 %c = shufflevector <8 x i8> %b, <8 x i8> poison, <8 x i32> zeroinitializer324 %d = zext <8 x i8> %a to <8 x i16>325 %e = zext <8 x i8> %c to <8 x i16>326 %f = mul <8 x i16> %d, %e327 %g = add <8 x i16> %f, %z328 ret <8 x i16> %g329}330 331define <4 x i32> @vwmaccu_vx_v4i32(ptr %x, i16 %y, <4 x i32> %z) {332; CHECK-LABEL: vwmaccu_vx_v4i32:333; CHECK: # %bb.0:334; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma335; CHECK-NEXT: vle16.v v9, (a0)336; CHECK-NEXT: vwmaccu.vx v8, a1, v9337; CHECK-NEXT: ret338 %a = load <4 x i16>, ptr %x339 %b = insertelement <4 x i16> poison, i16 %y, i32 0340 %c = shufflevector <4 x i16> %b, <4 x i16> poison, <4 x i32> zeroinitializer341 %d = zext <4 x i16> %a to <4 x i32>342 %e = zext <4 x i16> %c to <4 x i32>343 %f = mul <4 x i32> %d, %e344 %g = add <4 x i32> %f, %z345 ret <4 x i32> %g346}347 348define <2 x i64> @vwmaccu_vx_v2i64(ptr %x, i32 %y, <2 x i64> %z) {349; CHECK-LABEL: vwmaccu_vx_v2i64:350; CHECK: # %bb.0:351; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma352; CHECK-NEXT: vle32.v v9, (a0)353; CHECK-NEXT: vwmaccu.vx v8, a1, v9354; CHECK-NEXT: ret355 %a = load <2 x i32>, ptr %x356 %b = insertelement <2 x i32> poison, i32 %y, i64 0357 %c = shufflevector <2 x i32> %b, <2 x i32> poison, <2 x i32> zeroinitializer358 %d = zext <2 x i32> %a to <2 x i64>359 %e = zext <2 x i32> %c to <2 x i64>360 %f = mul <2 x i64> %d, %e361 %g = add <2 x i64> %f, %z362 ret <2 x i64> %g363}364 365define <16 x i16> @vwmaccu_vx_v16i16(ptr %x, i8 %y, <16 x i16> %z) {366; CHECK-LABEL: vwmaccu_vx_v16i16:367; CHECK: # %bb.0:368; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma369; CHECK-NEXT: vle8.v v10, (a0)370; CHECK-NEXT: vwmaccu.vx v8, a1, v10371; CHECK-NEXT: ret372 %a = load <16 x i8>, ptr %x373 %b = insertelement <16 x i8> poison, i8 %y, i32 0374 %c = shufflevector <16 x i8> %b, <16 x i8> poison, <16 x i32> zeroinitializer375 %d = zext <16 x i8> %a to <16 x i16>376 %e = zext <16 x i8> %c to <16 x i16>377 %f = mul <16 x i16> %d, %e378 %g = add <16 x i16> %f, %z379 ret <16 x i16> %g380}381 382define <8 x i32> @vwmaccu_vx_v8i32(ptr %x, i16 %y, <8 x i32> %z) {383; CHECK-LABEL: vwmaccu_vx_v8i32:384; CHECK: # %bb.0:385; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma386; CHECK-NEXT: vle16.v v10, (a0)387; CHECK-NEXT: vwmaccu.vx v8, a1, v10388; CHECK-NEXT: ret389 %a = load <8 x i16>, ptr %x390 %b = insertelement <8 x i16> poison, i16 %y, i32 0391 %c = shufflevector <8 x i16> %b, <8 x i16> poison, <8 x i32> zeroinitializer392 %d = zext <8 x i16> %a to <8 x i32>393 %e = zext <8 x i16> %c to <8 x i32>394 %f = mul <8 x i32> %d, %e395 %g = add <8 x i32> %f, %z396 ret <8 x i32> %g397}398 399define <4 x i64> @vwmaccu_vx_v4i64(ptr %x, i32 %y, <4 x i64> %z) {400; CHECK-LABEL: vwmaccu_vx_v4i64:401; CHECK: # %bb.0:402; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma403; CHECK-NEXT: vle32.v v10, (a0)404; CHECK-NEXT: vwmaccu.vx v8, a1, v10405; CHECK-NEXT: ret406 %a = load <4 x i32>, ptr %x407 %b = insertelement <4 x i32> poison, i32 %y, i64 0408 %c = shufflevector <4 x i32> %b, <4 x i32> poison, <4 x i32> zeroinitializer409 %d = zext <4 x i32> %a to <4 x i64>410 %e = zext <4 x i32> %c to <4 x i64>411 %f = mul <4 x i64> %d, %e412 %g = add <4 x i64> %f, %z413 ret <4 x i64> %g414}415 416define <32 x i16> @vwmaccu_vx_v32i16(ptr %x, i8 %y, <32 x i16> %z) {417; CHECK-LABEL: vwmaccu_vx_v32i16:418; CHECK: # %bb.0:419; CHECK-NEXT: li a2, 32420; CHECK-NEXT: vsetvli zero, a2, e8, m2, ta, ma421; CHECK-NEXT: vle8.v v12, (a0)422; CHECK-NEXT: vwmaccu.vx v8, a1, v12423; CHECK-NEXT: ret424 %a = load <32 x i8>, ptr %x425 %b = insertelement <32 x i8> poison, i8 %y, i32 0426 %c = shufflevector <32 x i8> %b, <32 x i8> poison, <32 x i32> zeroinitializer427 %d = zext <32 x i8> %a to <32 x i16>428 %e = zext <32 x i8> %c to <32 x i16>429 %f = mul <32 x i16> %d, %e430 %g = add <32 x i16> %f, %z431 ret <32 x i16> %g432}433 434define <16 x i32> @vwmaccu_vx_v16i32(ptr %x, i16 %y, <16 x i32> %z) {435; CHECK-LABEL: vwmaccu_vx_v16i32:436; CHECK: # %bb.0:437; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma438; CHECK-NEXT: vle16.v v12, (a0)439; CHECK-NEXT: vwmaccu.vx v8, a1, v12440; CHECK-NEXT: ret441 %a = load <16 x i16>, ptr %x442 %b = insertelement <16 x i16> poison, i16 %y, i32 0443 %c = shufflevector <16 x i16> %b, <16 x i16> poison, <16 x i32> zeroinitializer444 %d = zext <16 x i16> %a to <16 x i32>445 %e = zext <16 x i16> %c to <16 x i32>446 %f = mul <16 x i32> %d, %e447 %g = add <16 x i32> %f, %z448 ret <16 x i32> %g449}450 451define <8 x i64> @vwmaccu_vx_v8i64(ptr %x, i32 %y, <8 x i64> %z) {452; CHECK-LABEL: vwmaccu_vx_v8i64:453; CHECK: # %bb.0:454; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma455; CHECK-NEXT: vle32.v v12, (a0)456; CHECK-NEXT: vwmaccu.vx v8, a1, v12457; CHECK-NEXT: ret458 %a = load <8 x i32>, ptr %x459 %b = insertelement <8 x i32> poison, i32 %y, i64 0460 %c = shufflevector <8 x i32> %b, <8 x i32> poison, <8 x i32> zeroinitializer461 %d = zext <8 x i32> %a to <8 x i64>462 %e = zext <8 x i32> %c to <8 x i64>463 %f = mul <8 x i64> %d, %e464 %g = add <8 x i64> %f, %z465 ret <8 x i64> %g466}467 468define <64 x i16> @vwmaccu_vx_v64i16(ptr %x, i8 %y, <64 x i16> %z) {469; CHECK-LABEL: vwmaccu_vx_v64i16:470; CHECK: # %bb.0:471; CHECK-NEXT: li a2, 64472; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma473; CHECK-NEXT: vle8.v v16, (a0)474; CHECK-NEXT: vwmaccu.vx v8, a1, v16475; CHECK-NEXT: ret476 %a = load <64 x i8>, ptr %x477 %b = insertelement <64 x i8> poison, i8 %y, i32 0478 %c = shufflevector <64 x i8> %b, <64 x i8> poison, <64 x i32> zeroinitializer479 %d = zext <64 x i8> %a to <64 x i16>480 %e = zext <64 x i8> %c to <64 x i16>481 %f = mul <64 x i16> %d, %e482 %g = add <64 x i16> %f, %z483 ret <64 x i16> %g484}485 486define <32 x i32> @vwmaccu_vx_v32i32(ptr %x, i16 %y, <32 x i32> %z) {487; CHECK-LABEL: vwmaccu_vx_v32i32:488; CHECK: # %bb.0:489; CHECK-NEXT: li a2, 32490; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma491; CHECK-NEXT: vle16.v v16, (a0)492; CHECK-NEXT: vwmaccu.vx v8, a1, v16493; CHECK-NEXT: ret494 %a = load <32 x i16>, ptr %x495 %b = insertelement <32 x i16> poison, i16 %y, i32 0496 %c = shufflevector <32 x i16> %b, <32 x i16> poison, <32 x i32> zeroinitializer497 %d = zext <32 x i16> %a to <32 x i32>498 %e = zext <32 x i16> %c to <32 x i32>499 %f = mul <32 x i32> %d, %e500 %g = add <32 x i32> %f, %z501 ret <32 x i32> %g502}503 504define <16 x i64> @vwmaccu_vx_v16i64(ptr %x, i32 %y, <16 x i64> %z) {505; CHECK-LABEL: vwmaccu_vx_v16i64:506; CHECK: # %bb.0:507; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma508; CHECK-NEXT: vle32.v v16, (a0)509; CHECK-NEXT: vwmaccu.vx v8, a1, v16510; CHECK-NEXT: ret511 %a = load <16 x i32>, ptr %x512 %b = insertelement <16 x i32> poison, i32 %y, i64 0513 %c = shufflevector <16 x i32> %b, <16 x i32> poison, <16 x i32> zeroinitializer514 %d = zext <16 x i32> %a to <16 x i64>515 %e = zext <16 x i32> %c to <16 x i64>516 %f = mul <16 x i64> %d, %e517 %g = add <16 x i64> %f, %z518 ret <16 x i64> %g519}520