1576 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <8 x i7> @vxor_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: vxor_vv_v8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma11; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t12; CHECK-NEXT: ret13 %v = call <8 x i7> @llvm.vp.xor.v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 %evl)14 ret <8 x i7> %v15}16 17define <2 x i8> @vxor_vv_v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 zeroext %evl) {18; CHECK-LABEL: vxor_vv_v2i8:19; CHECK: # %bb.0:20; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma21; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t22; CHECK-NEXT: ret23 %v = call <2 x i8> @llvm.vp.xor.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 %evl)24 ret <2 x i8> %v25}26 27define <2 x i8> @vxor_vv_v2i8_unmasked(<2 x i8> %va, <2 x i8> %b, i32 zeroext %evl) {28; CHECK-LABEL: vxor_vv_v2i8_unmasked:29; CHECK: # %bb.0:30; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma31; CHECK-NEXT: vxor.vv v8, v8, v932; CHECK-NEXT: ret33 %v = call <2 x i8> @llvm.vp.xor.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> splat (i1 true), i32 %evl)34 ret <2 x i8> %v35}36 37define <2 x i8> @vxor_vx_v2i8(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {38; CHECK-LABEL: vxor_vx_v2i8:39; CHECK: # %bb.0:40; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma41; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t42; CHECK-NEXT: ret43 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 044 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer45 %v = call <2 x i8> @llvm.vp.xor.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> %m, i32 %evl)46 ret <2 x i8> %v47}48 49define <2 x i8> @vxor_vx_v2i8_commute(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {50; CHECK-LABEL: vxor_vx_v2i8_commute:51; CHECK: # %bb.0:52; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma53; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t54; CHECK-NEXT: ret55 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 056 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer57 %v = call <2 x i8> @llvm.vp.xor.v2i8(<2 x i8> %vb, <2 x i8> %va, <2 x i1> %m, i32 %evl)58 ret <2 x i8> %v59}60 61define <2 x i8> @vxor_vx_v2i8_unmasked(<2 x i8> %va, i8 %b, i32 zeroext %evl) {62; CHECK-LABEL: vxor_vx_v2i8_unmasked:63; CHECK: # %bb.0:64; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma65; CHECK-NEXT: vxor.vx v8, v8, a066; CHECK-NEXT: ret67 %elt.head = insertelement <2 x i8> poison, i8 %b, i32 068 %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer69 %v = call <2 x i8> @llvm.vp.xor.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> splat (i1 true), i32 %evl)70 ret <2 x i8> %v71}72 73define <2 x i8> @vxor_vi_v2i8(<2 x i8> %va, <2 x i1> %m, i32 zeroext %evl) {74; CHECK-LABEL: vxor_vi_v2i8:75; CHECK: # %bb.0:76; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma77; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t78; CHECK-NEXT: ret79 %v = call <2 x i8> @llvm.vp.xor.v2i8(<2 x i8> %va, <2 x i8> splat (i8 7), <2 x i1> %m, i32 %evl)80 ret <2 x i8> %v81}82 83define <2 x i8> @vxor_vi_v2i8_unmasked(<2 x i8> %va, i32 zeroext %evl) {84; CHECK-LABEL: vxor_vi_v2i8_unmasked:85; CHECK: # %bb.0:86; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma87; CHECK-NEXT: vxor.vi v8, v8, 788; CHECK-NEXT: ret89 %v = call <2 x i8> @llvm.vp.xor.v2i8(<2 x i8> %va, <2 x i8> splat (i8 7), <2 x i1> splat (i1 true), i32 %evl)90 ret <2 x i8> %v91}92 93define <2 x i8> @vxor_vi_v2i8_1(<2 x i8> %va, <2 x i1> %m, i32 zeroext %evl) {94; CHECK-LABEL: vxor_vi_v2i8_1:95; CHECK: # %bb.0:96; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma97; CHECK-NEXT: vnot.v v8, v8, v0.t98; CHECK-NEXT: ret99 %v = call <2 x i8> @llvm.vp.xor.v2i8(<2 x i8> %va, <2 x i8> splat (i8 -1), <2 x i1> %m, i32 %evl)100 ret <2 x i8> %v101}102 103define <2 x i8> @vxor_vi_v2i8_unmasked_1(<2 x i8> %va, i32 zeroext %evl) {104; CHECK-LABEL: vxor_vi_v2i8_unmasked_1:105; CHECK: # %bb.0:106; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma107; CHECK-NEXT: vnot.v v8, v8108; CHECK-NEXT: ret109 %v = call <2 x i8> @llvm.vp.xor.v2i8(<2 x i8> %va, <2 x i8> splat (i8 -1), <2 x i1> splat (i1 true), i32 %evl)110 ret <2 x i8> %v111}112 113define <4 x i8> @vxor_vv_v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 zeroext %evl) {114; CHECK-LABEL: vxor_vv_v4i8:115; CHECK: # %bb.0:116; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma117; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t118; CHECK-NEXT: ret119 %v = call <4 x i8> @llvm.vp.xor.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 %evl)120 ret <4 x i8> %v121}122 123define <4 x i8> @vxor_vv_v4i8_unmasked(<4 x i8> %va, <4 x i8> %b, i32 zeroext %evl) {124; CHECK-LABEL: vxor_vv_v4i8_unmasked:125; CHECK: # %bb.0:126; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma127; CHECK-NEXT: vxor.vv v8, v8, v9128; CHECK-NEXT: ret129 %v = call <4 x i8> @llvm.vp.xor.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> splat (i1 true), i32 %evl)130 ret <4 x i8> %v131}132 133define <4 x i8> @vxor_vx_v4i8(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {134; CHECK-LABEL: vxor_vx_v4i8:135; CHECK: # %bb.0:136; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma137; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t138; CHECK-NEXT: ret139 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0140 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer141 %v = call <4 x i8> @llvm.vp.xor.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> %m, i32 %evl)142 ret <4 x i8> %v143}144 145define <4 x i8> @vxor_vx_v4i8_unmasked(<4 x i8> %va, i8 %b, i32 zeroext %evl) {146; CHECK-LABEL: vxor_vx_v4i8_unmasked:147; CHECK: # %bb.0:148; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma149; CHECK-NEXT: vxor.vx v8, v8, a0150; CHECK-NEXT: ret151 %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0152 %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer153 %v = call <4 x i8> @llvm.vp.xor.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> splat (i1 true), i32 %evl)154 ret <4 x i8> %v155}156 157define <4 x i8> @vxor_vi_v4i8(<4 x i8> %va, <4 x i1> %m, i32 zeroext %evl) {158; CHECK-LABEL: vxor_vi_v4i8:159; CHECK: # %bb.0:160; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma161; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t162; CHECK-NEXT: ret163 %v = call <4 x i8> @llvm.vp.xor.v4i8(<4 x i8> %va, <4 x i8> splat (i8 7), <4 x i1> %m, i32 %evl)164 ret <4 x i8> %v165}166 167define <4 x i8> @vxor_vi_v4i8_unmasked(<4 x i8> %va, i32 zeroext %evl) {168; CHECK-LABEL: vxor_vi_v4i8_unmasked:169; CHECK: # %bb.0:170; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma171; CHECK-NEXT: vxor.vi v8, v8, 7172; CHECK-NEXT: ret173 %v = call <4 x i8> @llvm.vp.xor.v4i8(<4 x i8> %va, <4 x i8> splat (i8 7), <4 x i1> splat (i1 true), i32 %evl)174 ret <4 x i8> %v175}176 177define <4 x i8> @vxor_vi_v4i8_1(<4 x i8> %va, <4 x i1> %m, i32 zeroext %evl) {178; CHECK-LABEL: vxor_vi_v4i8_1:179; CHECK: # %bb.0:180; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma181; CHECK-NEXT: vnot.v v8, v8, v0.t182; CHECK-NEXT: ret183 %v = call <4 x i8> @llvm.vp.xor.v4i8(<4 x i8> %va, <4 x i8> splat (i8 -1), <4 x i1> %m, i32 %evl)184 ret <4 x i8> %v185}186 187define <4 x i8> @vxor_vi_v4i8_unmasked_1(<4 x i8> %va, i32 zeroext %evl) {188; CHECK-LABEL: vxor_vi_v4i8_unmasked_1:189; CHECK: # %bb.0:190; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma191; CHECK-NEXT: vnot.v v8, v8192; CHECK-NEXT: ret193 %v = call <4 x i8> @llvm.vp.xor.v4i8(<4 x i8> %va, <4 x i8> splat (i8 -1), <4 x i1> splat (i1 true), i32 %evl)194 ret <4 x i8> %v195}196 197define <8 x i8> @vxor_vv_v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 zeroext %evl) {198; CHECK-LABEL: vxor_vv_v8i8:199; CHECK: # %bb.0:200; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma201; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t202; CHECK-NEXT: ret203 %v = call <8 x i8> @llvm.vp.xor.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 %evl)204 ret <8 x i8> %v205}206 207define <8 x i8> @vxor_vv_v8i8_unmasked(<8 x i8> %va, <8 x i8> %b, i32 zeroext %evl) {208; CHECK-LABEL: vxor_vv_v8i8_unmasked:209; CHECK: # %bb.0:210; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma211; CHECK-NEXT: vxor.vv v8, v8, v9212; CHECK-NEXT: ret213 %v = call <8 x i8> @llvm.vp.xor.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> splat (i1 true), i32 %evl)214 ret <8 x i8> %v215}216 217define <8 x i8> @vxor_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {218; CHECK-LABEL: vxor_vx_v8i8:219; CHECK: # %bb.0:220; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma221; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t222; CHECK-NEXT: ret223 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0224 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer225 %v = call <8 x i8> @llvm.vp.xor.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 %evl)226 ret <8 x i8> %v227}228 229define <8 x i8> @vxor_vx_v8i8_unmasked(<8 x i8> %va, i8 %b, i32 zeroext %evl) {230; CHECK-LABEL: vxor_vx_v8i8_unmasked:231; CHECK: # %bb.0:232; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma233; CHECK-NEXT: vxor.vx v8, v8, a0234; CHECK-NEXT: ret235 %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0236 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer237 %v = call <8 x i8> @llvm.vp.xor.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> splat (i1 true), i32 %evl)238 ret <8 x i8> %v239}240 241define <8 x i8> @vxor_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {242; CHECK-LABEL: vxor_vi_v8i8:243; CHECK: # %bb.0:244; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma245; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t246; CHECK-NEXT: ret247 %v = call <8 x i8> @llvm.vp.xor.v8i8(<8 x i8> %va, <8 x i8> splat (i8 7), <8 x i1> %m, i32 %evl)248 ret <8 x i8> %v249}250 251define <8 x i8> @vxor_vi_v8i8_unmasked(<8 x i8> %va, i32 zeroext %evl) {252; CHECK-LABEL: vxor_vi_v8i8_unmasked:253; CHECK: # %bb.0:254; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma255; CHECK-NEXT: vxor.vi v8, v8, 7256; CHECK-NEXT: ret257 %v = call <8 x i8> @llvm.vp.xor.v8i8(<8 x i8> %va, <8 x i8> splat (i8 7), <8 x i1> splat (i1 true), i32 %evl)258 ret <8 x i8> %v259}260 261define <8 x i8> @vxor_vi_v8i8_1(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) {262; CHECK-LABEL: vxor_vi_v8i8_1:263; CHECK: # %bb.0:264; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma265; CHECK-NEXT: vnot.v v8, v8, v0.t266; CHECK-NEXT: ret267 %v = call <8 x i8> @llvm.vp.xor.v8i8(<8 x i8> %va, <8 x i8> splat (i8 -1), <8 x i1> %m, i32 %evl)268 ret <8 x i8> %v269}270 271define <8 x i8> @vxor_vi_v8i8_unmasked_1(<8 x i8> %va, i32 zeroext %evl) {272; CHECK-LABEL: vxor_vi_v8i8_unmasked_1:273; CHECK: # %bb.0:274; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma275; CHECK-NEXT: vnot.v v8, v8276; CHECK-NEXT: ret277 %v = call <8 x i8> @llvm.vp.xor.v8i8(<8 x i8> %va, <8 x i8> splat (i8 -1), <8 x i1> splat (i1 true), i32 %evl)278 ret <8 x i8> %v279}280 281define <9 x i8> @vxor_vv_v9i8(<9 x i8> %va, <9 x i8> %b, <9 x i1> %m, i32 zeroext %evl) {282; CHECK-LABEL: vxor_vv_v9i8:283; CHECK: # %bb.0:284; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma285; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t286; CHECK-NEXT: ret287 %v = call <9 x i8> @llvm.vp.xor.v9i8(<9 x i8> %va, <9 x i8> %b, <9 x i1> %m, i32 %evl)288 ret <9 x i8> %v289}290 291define <9 x i8> @vxor_vv_v9i8_unmasked(<9 x i8> %va, <9 x i8> %b, i32 zeroext %evl) {292; CHECK-LABEL: vxor_vv_v9i8_unmasked:293; CHECK: # %bb.0:294; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma295; CHECK-NEXT: vxor.vv v8, v8, v9296; CHECK-NEXT: ret297 %v = call <9 x i8> @llvm.vp.xor.v9i8(<9 x i8> %va, <9 x i8> %b, <9 x i1> splat (i1 true), i32 %evl)298 ret <9 x i8> %v299}300 301define <9 x i8> @vxor_vx_v9i8(<9 x i8> %va, i8 %b, <9 x i1> %m, i32 zeroext %evl) {302; CHECK-LABEL: vxor_vx_v9i8:303; CHECK: # %bb.0:304; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma305; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t306; CHECK-NEXT: ret307 %elt.head = insertelement <9 x i8> poison, i8 %b, i32 0308 %vb = shufflevector <9 x i8> %elt.head, <9 x i8> poison, <9 x i32> zeroinitializer309 %v = call <9 x i8> @llvm.vp.xor.v9i8(<9 x i8> %va, <9 x i8> %vb, <9 x i1> %m, i32 %evl)310 ret <9 x i8> %v311}312 313define <9 x i8> @vxor_vx_v9i8_unmasked(<9 x i8> %va, i8 %b, i32 zeroext %evl) {314; CHECK-LABEL: vxor_vx_v9i8_unmasked:315; CHECK: # %bb.0:316; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma317; CHECK-NEXT: vxor.vx v8, v8, a0318; CHECK-NEXT: ret319 %elt.head = insertelement <9 x i8> poison, i8 %b, i32 0320 %vb = shufflevector <9 x i8> %elt.head, <9 x i8> poison, <9 x i32> zeroinitializer321 %v = call <9 x i8> @llvm.vp.xor.v9i8(<9 x i8> %va, <9 x i8> %vb, <9 x i1> splat (i1 true), i32 %evl)322 ret <9 x i8> %v323}324 325define <9 x i8> @vxor_vi_v9i8(<9 x i8> %va, <9 x i1> %m, i32 zeroext %evl) {326; CHECK-LABEL: vxor_vi_v9i8:327; CHECK: # %bb.0:328; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma329; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t330; CHECK-NEXT: ret331 %v = call <9 x i8> @llvm.vp.xor.v9i8(<9 x i8> %va, <9 x i8> splat (i8 7), <9 x i1> %m, i32 %evl)332 ret <9 x i8> %v333}334 335define <9 x i8> @vxor_vi_v9i8_unmasked(<9 x i8> %va, i32 zeroext %evl) {336; CHECK-LABEL: vxor_vi_v9i8_unmasked:337; CHECK: # %bb.0:338; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma339; CHECK-NEXT: vxor.vi v8, v8, 7340; CHECK-NEXT: ret341 %v = call <9 x i8> @llvm.vp.xor.v9i8(<9 x i8> %va, <9 x i8> splat (i8 7), <9 x i1> splat (i1 true), i32 %evl)342 ret <9 x i8> %v343}344 345define <9 x i8> @vxor_vi_v9i8_1(<9 x i8> %va, <9 x i1> %m, i32 zeroext %evl) {346; CHECK-LABEL: vxor_vi_v9i8_1:347; CHECK: # %bb.0:348; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma349; CHECK-NEXT: vnot.v v8, v8, v0.t350; CHECK-NEXT: ret351 %v = call <9 x i8> @llvm.vp.xor.v9i8(<9 x i8> %va, <9 x i8> splat (i8 -1), <9 x i1> %m, i32 %evl)352 ret <9 x i8> %v353}354 355define <9 x i8> @vxor_vi_v9i8_unmasked_1(<9 x i8> %va, i32 zeroext %evl) {356; CHECK-LABEL: vxor_vi_v9i8_unmasked_1:357; CHECK: # %bb.0:358; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma359; CHECK-NEXT: vnot.v v8, v8360; CHECK-NEXT: ret361 %v = call <9 x i8> @llvm.vp.xor.v9i8(<9 x i8> %va, <9 x i8> splat (i8 -1), <9 x i1> splat (i1 true), i32 %evl)362 ret <9 x i8> %v363}364 365define <16 x i8> @vxor_vv_v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 zeroext %evl) {366; CHECK-LABEL: vxor_vv_v16i8:367; CHECK: # %bb.0:368; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma369; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t370; CHECK-NEXT: ret371 %v = call <16 x i8> @llvm.vp.xor.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 %evl)372 ret <16 x i8> %v373}374 375define <16 x i8> @vxor_vv_v16i8_unmasked(<16 x i8> %va, <16 x i8> %b, i32 zeroext %evl) {376; CHECK-LABEL: vxor_vv_v16i8_unmasked:377; CHECK: # %bb.0:378; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma379; CHECK-NEXT: vxor.vv v8, v8, v9380; CHECK-NEXT: ret381 %v = call <16 x i8> @llvm.vp.xor.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> splat (i1 true), i32 %evl)382 ret <16 x i8> %v383}384 385define <16 x i8> @vxor_vx_v16i8(<16 x i8> %va, i8 %b, <16 x i1> %m, i32 zeroext %evl) {386; CHECK-LABEL: vxor_vx_v16i8:387; CHECK: # %bb.0:388; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma389; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t390; CHECK-NEXT: ret391 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0392 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer393 %v = call <16 x i8> @llvm.vp.xor.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> %m, i32 %evl)394 ret <16 x i8> %v395}396 397define <16 x i8> @vxor_vx_v16i8_unmasked(<16 x i8> %va, i8 %b, i32 zeroext %evl) {398; CHECK-LABEL: vxor_vx_v16i8_unmasked:399; CHECK: # %bb.0:400; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma401; CHECK-NEXT: vxor.vx v8, v8, a0402; CHECK-NEXT: ret403 %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0404 %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer405 %v = call <16 x i8> @llvm.vp.xor.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> splat (i1 true), i32 %evl)406 ret <16 x i8> %v407}408 409define <16 x i8> @vxor_vi_v16i8(<16 x i8> %va, <16 x i1> %m, i32 zeroext %evl) {410; CHECK-LABEL: vxor_vi_v16i8:411; CHECK: # %bb.0:412; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma413; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t414; CHECK-NEXT: ret415 %v = call <16 x i8> @llvm.vp.xor.v16i8(<16 x i8> %va, <16 x i8> splat (i8 7), <16 x i1> %m, i32 %evl)416 ret <16 x i8> %v417}418 419define <16 x i8> @vxor_vi_v16i8_unmasked(<16 x i8> %va, i32 zeroext %evl) {420; CHECK-LABEL: vxor_vi_v16i8_unmasked:421; CHECK: # %bb.0:422; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma423; CHECK-NEXT: vxor.vi v8, v8, 7424; CHECK-NEXT: ret425 %v = call <16 x i8> @llvm.vp.xor.v16i8(<16 x i8> %va, <16 x i8> splat (i8 7), <16 x i1> splat (i1 true), i32 %evl)426 ret <16 x i8> %v427}428 429define <16 x i8> @vxor_vi_v16i8_1(<16 x i8> %va, <16 x i1> %m, i32 zeroext %evl) {430; CHECK-LABEL: vxor_vi_v16i8_1:431; CHECK: # %bb.0:432; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma433; CHECK-NEXT: vnot.v v8, v8, v0.t434; CHECK-NEXT: ret435 %v = call <16 x i8> @llvm.vp.xor.v16i8(<16 x i8> %va, <16 x i8> splat (i8 -1), <16 x i1> %m, i32 %evl)436 ret <16 x i8> %v437}438 439define <16 x i8> @vxor_vi_v16i8_unmasked_1(<16 x i8> %va, i32 zeroext %evl) {440; CHECK-LABEL: vxor_vi_v16i8_unmasked_1:441; CHECK: # %bb.0:442; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma443; CHECK-NEXT: vnot.v v8, v8444; CHECK-NEXT: ret445 %v = call <16 x i8> @llvm.vp.xor.v16i8(<16 x i8> %va, <16 x i8> splat (i8 -1), <16 x i1> splat (i1 true), i32 %evl)446 ret <16 x i8> %v447}448 449define <2 x i16> @vxor_vv_v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 zeroext %evl) {450; CHECK-LABEL: vxor_vv_v2i16:451; CHECK: # %bb.0:452; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma453; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t454; CHECK-NEXT: ret455 %v = call <2 x i16> @llvm.vp.xor.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 %evl)456 ret <2 x i16> %v457}458 459define <2 x i16> @vxor_vv_v2i16_unmasked(<2 x i16> %va, <2 x i16> %b, i32 zeroext %evl) {460; CHECK-LABEL: vxor_vv_v2i16_unmasked:461; CHECK: # %bb.0:462; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma463; CHECK-NEXT: vxor.vv v8, v8, v9464; CHECK-NEXT: ret465 %v = call <2 x i16> @llvm.vp.xor.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> splat (i1 true), i32 %evl)466 ret <2 x i16> %v467}468 469define <2 x i16> @vxor_vx_v2i16(<2 x i16> %va, i16 %b, <2 x i1> %m, i32 zeroext %evl) {470; CHECK-LABEL: vxor_vx_v2i16:471; CHECK: # %bb.0:472; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma473; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t474; CHECK-NEXT: ret475 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0476 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer477 %v = call <2 x i16> @llvm.vp.xor.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> %m, i32 %evl)478 ret <2 x i16> %v479}480 481define <2 x i16> @vxor_vx_v2i16_unmasked(<2 x i16> %va, i16 %b, i32 zeroext %evl) {482; CHECK-LABEL: vxor_vx_v2i16_unmasked:483; CHECK: # %bb.0:484; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma485; CHECK-NEXT: vxor.vx v8, v8, a0486; CHECK-NEXT: ret487 %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0488 %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer489 %v = call <2 x i16> @llvm.vp.xor.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> splat (i1 true), i32 %evl)490 ret <2 x i16> %v491}492 493define <2 x i16> @vxor_vi_v2i16(<2 x i16> %va, <2 x i1> %m, i32 zeroext %evl) {494; CHECK-LABEL: vxor_vi_v2i16:495; CHECK: # %bb.0:496; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma497; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t498; CHECK-NEXT: ret499 %v = call <2 x i16> @llvm.vp.xor.v2i16(<2 x i16> %va, <2 x i16> splat (i16 7), <2 x i1> %m, i32 %evl)500 ret <2 x i16> %v501}502 503define <2 x i16> @vxor_vi_v2i16_unmasked(<2 x i16> %va, i32 zeroext %evl) {504; CHECK-LABEL: vxor_vi_v2i16_unmasked:505; CHECK: # %bb.0:506; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma507; CHECK-NEXT: vxor.vi v8, v8, 7508; CHECK-NEXT: ret509 %v = call <2 x i16> @llvm.vp.xor.v2i16(<2 x i16> %va, <2 x i16> splat (i16 7), <2 x i1> splat (i1 true), i32 %evl)510 ret <2 x i16> %v511}512 513define <2 x i16> @vxor_vi_v2i16_1(<2 x i16> %va, <2 x i1> %m, i32 zeroext %evl) {514; CHECK-LABEL: vxor_vi_v2i16_1:515; CHECK: # %bb.0:516; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma517; CHECK-NEXT: vnot.v v8, v8, v0.t518; CHECK-NEXT: ret519 %v = call <2 x i16> @llvm.vp.xor.v2i16(<2 x i16> %va, <2 x i16> splat (i16 -1), <2 x i1> %m, i32 %evl)520 ret <2 x i16> %v521}522 523define <2 x i16> @vxor_vi_v2i16_unmasked_1(<2 x i16> %va, i32 zeroext %evl) {524; CHECK-LABEL: vxor_vi_v2i16_unmasked_1:525; CHECK: # %bb.0:526; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma527; CHECK-NEXT: vnot.v v8, v8528; CHECK-NEXT: ret529 %v = call <2 x i16> @llvm.vp.xor.v2i16(<2 x i16> %va, <2 x i16> splat (i16 -1), <2 x i1> splat (i1 true), i32 %evl)530 ret <2 x i16> %v531}532 533define <4 x i16> @vxor_vv_v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 zeroext %evl) {534; CHECK-LABEL: vxor_vv_v4i16:535; CHECK: # %bb.0:536; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma537; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t538; CHECK-NEXT: ret539 %v = call <4 x i16> @llvm.vp.xor.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 %evl)540 ret <4 x i16> %v541}542 543define <4 x i16> @vxor_vv_v4i16_unmasked(<4 x i16> %va, <4 x i16> %b, i32 zeroext %evl) {544; CHECK-LABEL: vxor_vv_v4i16_unmasked:545; CHECK: # %bb.0:546; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma547; CHECK-NEXT: vxor.vv v8, v8, v9548; CHECK-NEXT: ret549 %v = call <4 x i16> @llvm.vp.xor.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> splat (i1 true), i32 %evl)550 ret <4 x i16> %v551}552 553define <4 x i16> @vxor_vx_v4i16(<4 x i16> %va, i16 %b, <4 x i1> %m, i32 zeroext %evl) {554; CHECK-LABEL: vxor_vx_v4i16:555; CHECK: # %bb.0:556; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma557; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t558; CHECK-NEXT: ret559 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0560 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer561 %v = call <4 x i16> @llvm.vp.xor.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> %m, i32 %evl)562 ret <4 x i16> %v563}564 565define <4 x i16> @vxor_vx_v4i16_unmasked(<4 x i16> %va, i16 %b, i32 zeroext %evl) {566; CHECK-LABEL: vxor_vx_v4i16_unmasked:567; CHECK: # %bb.0:568; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma569; CHECK-NEXT: vxor.vx v8, v8, a0570; CHECK-NEXT: ret571 %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0572 %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer573 %v = call <4 x i16> @llvm.vp.xor.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> splat (i1 true), i32 %evl)574 ret <4 x i16> %v575}576 577define <4 x i16> @vxor_vi_v4i16(<4 x i16> %va, <4 x i1> %m, i32 zeroext %evl) {578; CHECK-LABEL: vxor_vi_v4i16:579; CHECK: # %bb.0:580; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma581; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t582; CHECK-NEXT: ret583 %v = call <4 x i16> @llvm.vp.xor.v4i16(<4 x i16> %va, <4 x i16> splat (i16 7), <4 x i1> %m, i32 %evl)584 ret <4 x i16> %v585}586 587define <4 x i16> @vxor_vi_v4i16_unmasked(<4 x i16> %va, i32 zeroext %evl) {588; CHECK-LABEL: vxor_vi_v4i16_unmasked:589; CHECK: # %bb.0:590; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma591; CHECK-NEXT: vxor.vi v8, v8, 7592; CHECK-NEXT: ret593 %v = call <4 x i16> @llvm.vp.xor.v4i16(<4 x i16> %va, <4 x i16> splat (i16 7), <4 x i1> splat (i1 true), i32 %evl)594 ret <4 x i16> %v595}596 597define <4 x i16> @vxor_vi_v4i16_1(<4 x i16> %va, <4 x i1> %m, i32 zeroext %evl) {598; CHECK-LABEL: vxor_vi_v4i16_1:599; CHECK: # %bb.0:600; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma601; CHECK-NEXT: vnot.v v8, v8, v0.t602; CHECK-NEXT: ret603 %v = call <4 x i16> @llvm.vp.xor.v4i16(<4 x i16> %va, <4 x i16> splat (i16 -1), <4 x i1> %m, i32 %evl)604 ret <4 x i16> %v605}606 607define <4 x i16> @vxor_vi_v4i16_unmasked_1(<4 x i16> %va, i32 zeroext %evl) {608; CHECK-LABEL: vxor_vi_v4i16_unmasked_1:609; CHECK: # %bb.0:610; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma611; CHECK-NEXT: vnot.v v8, v8612; CHECK-NEXT: ret613 %v = call <4 x i16> @llvm.vp.xor.v4i16(<4 x i16> %va, <4 x i16> splat (i16 -1), <4 x i1> splat (i1 true), i32 %evl)614 ret <4 x i16> %v615}616 617define <8 x i16> @vxor_vv_v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 zeroext %evl) {618; CHECK-LABEL: vxor_vv_v8i16:619; CHECK: # %bb.0:620; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma621; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t622; CHECK-NEXT: ret623 %v = call <8 x i16> @llvm.vp.xor.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 %evl)624 ret <8 x i16> %v625}626 627define <8 x i16> @vxor_vv_v8i16_unmasked(<8 x i16> %va, <8 x i16> %b, i32 zeroext %evl) {628; CHECK-LABEL: vxor_vv_v8i16_unmasked:629; CHECK: # %bb.0:630; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma631; CHECK-NEXT: vxor.vv v8, v8, v9632; CHECK-NEXT: ret633 %v = call <8 x i16> @llvm.vp.xor.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> splat (i1 true), i32 %evl)634 ret <8 x i16> %v635}636 637define <8 x i16> @vxor_vx_v8i16(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {638; CHECK-LABEL: vxor_vx_v8i16:639; CHECK: # %bb.0:640; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma641; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t642; CHECK-NEXT: ret643 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0644 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer645 %v = call <8 x i16> @llvm.vp.xor.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> %m, i32 %evl)646 ret <8 x i16> %v647}648 649define <8 x i16> @vxor_vx_v8i16_unmasked(<8 x i16> %va, i16 %b, i32 zeroext %evl) {650; CHECK-LABEL: vxor_vx_v8i16_unmasked:651; CHECK: # %bb.0:652; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma653; CHECK-NEXT: vxor.vx v8, v8, a0654; CHECK-NEXT: ret655 %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0656 %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer657 %v = call <8 x i16> @llvm.vp.xor.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> splat (i1 true), i32 %evl)658 ret <8 x i16> %v659}660 661define <8 x i16> @vxor_vi_v8i16(<8 x i16> %va, <8 x i1> %m, i32 zeroext %evl) {662; CHECK-LABEL: vxor_vi_v8i16:663; CHECK: # %bb.0:664; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma665; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t666; CHECK-NEXT: ret667 %v = call <8 x i16> @llvm.vp.xor.v8i16(<8 x i16> %va, <8 x i16> splat (i16 7), <8 x i1> %m, i32 %evl)668 ret <8 x i16> %v669}670 671define <8 x i16> @vxor_vi_v8i16_unmasked(<8 x i16> %va, i32 zeroext %evl) {672; CHECK-LABEL: vxor_vi_v8i16_unmasked:673; CHECK: # %bb.0:674; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma675; CHECK-NEXT: vxor.vi v8, v8, 7676; CHECK-NEXT: ret677 %v = call <8 x i16> @llvm.vp.xor.v8i16(<8 x i16> %va, <8 x i16> splat (i16 7), <8 x i1> splat (i1 true), i32 %evl)678 ret <8 x i16> %v679}680 681define <8 x i16> @vxor_vi_v8i16_1(<8 x i16> %va, <8 x i1> %m, i32 zeroext %evl) {682; CHECK-LABEL: vxor_vi_v8i16_1:683; CHECK: # %bb.0:684; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma685; CHECK-NEXT: vnot.v v8, v8, v0.t686; CHECK-NEXT: ret687 %v = call <8 x i16> @llvm.vp.xor.v8i16(<8 x i16> %va, <8 x i16> splat (i16 -1), <8 x i1> %m, i32 %evl)688 ret <8 x i16> %v689}690 691define <8 x i16> @vxor_vi_v8i16_unmasked_1(<8 x i16> %va, i32 zeroext %evl) {692; CHECK-LABEL: vxor_vi_v8i16_unmasked_1:693; CHECK: # %bb.0:694; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma695; CHECK-NEXT: vnot.v v8, v8696; CHECK-NEXT: ret697 %v = call <8 x i16> @llvm.vp.xor.v8i16(<8 x i16> %va, <8 x i16> splat (i16 -1), <8 x i1> splat (i1 true), i32 %evl)698 ret <8 x i16> %v699}700 701define <16 x i16> @vxor_vv_v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 zeroext %evl) {702; CHECK-LABEL: vxor_vv_v16i16:703; CHECK: # %bb.0:704; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma705; CHECK-NEXT: vxor.vv v8, v8, v10, v0.t706; CHECK-NEXT: ret707 %v = call <16 x i16> @llvm.vp.xor.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 %evl)708 ret <16 x i16> %v709}710 711define <16 x i16> @vxor_vv_v16i16_unmasked(<16 x i16> %va, <16 x i16> %b, i32 zeroext %evl) {712; CHECK-LABEL: vxor_vv_v16i16_unmasked:713; CHECK: # %bb.0:714; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma715; CHECK-NEXT: vxor.vv v8, v8, v10716; CHECK-NEXT: ret717 %v = call <16 x i16> @llvm.vp.xor.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> splat (i1 true), i32 %evl)718 ret <16 x i16> %v719}720 721define <16 x i16> @vxor_vx_v16i16(<16 x i16> %va, i16 %b, <16 x i1> %m, i32 zeroext %evl) {722; CHECK-LABEL: vxor_vx_v16i16:723; CHECK: # %bb.0:724; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma725; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t726; CHECK-NEXT: ret727 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0728 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer729 %v = call <16 x i16> @llvm.vp.xor.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> %m, i32 %evl)730 ret <16 x i16> %v731}732 733define <16 x i16> @vxor_vx_v16i16_unmasked(<16 x i16> %va, i16 %b, i32 zeroext %evl) {734; CHECK-LABEL: vxor_vx_v16i16_unmasked:735; CHECK: # %bb.0:736; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma737; CHECK-NEXT: vxor.vx v8, v8, a0738; CHECK-NEXT: ret739 %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0740 %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer741 %v = call <16 x i16> @llvm.vp.xor.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> splat (i1 true), i32 %evl)742 ret <16 x i16> %v743}744 745define <16 x i16> @vxor_vi_v16i16(<16 x i16> %va, <16 x i1> %m, i32 zeroext %evl) {746; CHECK-LABEL: vxor_vi_v16i16:747; CHECK: # %bb.0:748; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma749; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t750; CHECK-NEXT: ret751 %v = call <16 x i16> @llvm.vp.xor.v16i16(<16 x i16> %va, <16 x i16> splat (i16 7), <16 x i1> %m, i32 %evl)752 ret <16 x i16> %v753}754 755define <16 x i16> @vxor_vi_v16i16_unmasked(<16 x i16> %va, i32 zeroext %evl) {756; CHECK-LABEL: vxor_vi_v16i16_unmasked:757; CHECK: # %bb.0:758; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma759; CHECK-NEXT: vxor.vi v8, v8, 7760; CHECK-NEXT: ret761 %v = call <16 x i16> @llvm.vp.xor.v16i16(<16 x i16> %va, <16 x i16> splat (i16 7), <16 x i1> splat (i1 true), i32 %evl)762 ret <16 x i16> %v763}764 765define <16 x i16> @vxor_vi_v16i16_1(<16 x i16> %va, <16 x i1> %m, i32 zeroext %evl) {766; CHECK-LABEL: vxor_vi_v16i16_1:767; CHECK: # %bb.0:768; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma769; CHECK-NEXT: vnot.v v8, v8, v0.t770; CHECK-NEXT: ret771 %v = call <16 x i16> @llvm.vp.xor.v16i16(<16 x i16> %va, <16 x i16> splat (i16 -1), <16 x i1> %m, i32 %evl)772 ret <16 x i16> %v773}774 775define <16 x i16> @vxor_vi_v16i16_unmasked_1(<16 x i16> %va, i32 zeroext %evl) {776; CHECK-LABEL: vxor_vi_v16i16_unmasked_1:777; CHECK: # %bb.0:778; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma779; CHECK-NEXT: vnot.v v8, v8780; CHECK-NEXT: ret781 %v = call <16 x i16> @llvm.vp.xor.v16i16(<16 x i16> %va, <16 x i16> splat (i16 -1), <16 x i1> splat (i1 true), i32 %evl)782 ret <16 x i16> %v783}784 785define <2 x i32> @vxor_vv_v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 zeroext %evl) {786; CHECK-LABEL: vxor_vv_v2i32:787; CHECK: # %bb.0:788; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma789; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t790; CHECK-NEXT: ret791 %v = call <2 x i32> @llvm.vp.xor.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 %evl)792 ret <2 x i32> %v793}794 795define <2 x i32> @vxor_vv_v2i32_unmasked(<2 x i32> %va, <2 x i32> %b, i32 zeroext %evl) {796; CHECK-LABEL: vxor_vv_v2i32_unmasked:797; CHECK: # %bb.0:798; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma799; CHECK-NEXT: vxor.vv v8, v8, v9800; CHECK-NEXT: ret801 %v = call <2 x i32> @llvm.vp.xor.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> splat (i1 true), i32 %evl)802 ret <2 x i32> %v803}804 805define <2 x i32> @vxor_vx_v2i32(<2 x i32> %va, i32 %b, <2 x i1> %m, i32 zeroext %evl) {806; CHECK-LABEL: vxor_vx_v2i32:807; CHECK: # %bb.0:808; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma809; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t810; CHECK-NEXT: ret811 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0812 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer813 %v = call <2 x i32> @llvm.vp.xor.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> %m, i32 %evl)814 ret <2 x i32> %v815}816 817define <2 x i32> @vxor_vx_v2i32_unmasked(<2 x i32> %va, i32 %b, i32 zeroext %evl) {818; CHECK-LABEL: vxor_vx_v2i32_unmasked:819; CHECK: # %bb.0:820; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma821; CHECK-NEXT: vxor.vx v8, v8, a0822; CHECK-NEXT: ret823 %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0824 %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer825 %v = call <2 x i32> @llvm.vp.xor.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> splat (i1 true), i32 %evl)826 ret <2 x i32> %v827}828 829define <2 x i32> @vxor_vi_v2i32(<2 x i32> %va, <2 x i1> %m, i32 zeroext %evl) {830; CHECK-LABEL: vxor_vi_v2i32:831; CHECK: # %bb.0:832; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma833; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t834; CHECK-NEXT: ret835 %v = call <2 x i32> @llvm.vp.xor.v2i32(<2 x i32> %va, <2 x i32> splat (i32 7), <2 x i1> %m, i32 %evl)836 ret <2 x i32> %v837}838 839define <2 x i32> @vxor_vi_v2i32_unmasked(<2 x i32> %va, i32 zeroext %evl) {840; CHECK-LABEL: vxor_vi_v2i32_unmasked:841; CHECK: # %bb.0:842; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma843; CHECK-NEXT: vxor.vi v8, v8, 7844; CHECK-NEXT: ret845 %v = call <2 x i32> @llvm.vp.xor.v2i32(<2 x i32> %va, <2 x i32> splat (i32 7), <2 x i1> splat (i1 true), i32 %evl)846 ret <2 x i32> %v847}848 849define <2 x i32> @vxor_vi_v2i32_1(<2 x i32> %va, <2 x i1> %m, i32 zeroext %evl) {850; CHECK-LABEL: vxor_vi_v2i32_1:851; CHECK: # %bb.0:852; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma853; CHECK-NEXT: vnot.v v8, v8, v0.t854; CHECK-NEXT: ret855 %v = call <2 x i32> @llvm.vp.xor.v2i32(<2 x i32> %va, <2 x i32> splat (i32 -1), <2 x i1> %m, i32 %evl)856 ret <2 x i32> %v857}858 859define <2 x i32> @vxor_vi_v2i32_unmasked_1(<2 x i32> %va, i32 zeroext %evl) {860; CHECK-LABEL: vxor_vi_v2i32_unmasked_1:861; CHECK: # %bb.0:862; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma863; CHECK-NEXT: vnot.v v8, v8864; CHECK-NEXT: ret865 %v = call <2 x i32> @llvm.vp.xor.v2i32(<2 x i32> %va, <2 x i32> splat (i32 -1), <2 x i1> splat (i1 true), i32 %evl)866 ret <2 x i32> %v867}868 869define <4 x i32> @vxor_vv_v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 zeroext %evl) {870; CHECK-LABEL: vxor_vv_v4i32:871; CHECK: # %bb.0:872; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma873; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t874; CHECK-NEXT: ret875 %v = call <4 x i32> @llvm.vp.xor.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 %evl)876 ret <4 x i32> %v877}878 879define <4 x i32> @vxor_vv_v4i32_unmasked(<4 x i32> %va, <4 x i32> %b, i32 zeroext %evl) {880; CHECK-LABEL: vxor_vv_v4i32_unmasked:881; CHECK: # %bb.0:882; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma883; CHECK-NEXT: vxor.vv v8, v8, v9884; CHECK-NEXT: ret885 %v = call <4 x i32> @llvm.vp.xor.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> splat (i1 true), i32 %evl)886 ret <4 x i32> %v887}888 889define <4 x i32> @vxor_vx_v4i32(<4 x i32> %va, i32 %b, <4 x i1> %m, i32 zeroext %evl) {890; CHECK-LABEL: vxor_vx_v4i32:891; CHECK: # %bb.0:892; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma893; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t894; CHECK-NEXT: ret895 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0896 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer897 %v = call <4 x i32> @llvm.vp.xor.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> %m, i32 %evl)898 ret <4 x i32> %v899}900 901define <4 x i32> @vxor_vx_v4i32_unmasked(<4 x i32> %va, i32 %b, i32 zeroext %evl) {902; CHECK-LABEL: vxor_vx_v4i32_unmasked:903; CHECK: # %bb.0:904; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma905; CHECK-NEXT: vxor.vx v8, v8, a0906; CHECK-NEXT: ret907 %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0908 %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer909 %v = call <4 x i32> @llvm.vp.xor.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> splat (i1 true), i32 %evl)910 ret <4 x i32> %v911}912 913define <4 x i32> @vxor_vi_v4i32(<4 x i32> %va, <4 x i1> %m, i32 zeroext %evl) {914; CHECK-LABEL: vxor_vi_v4i32:915; CHECK: # %bb.0:916; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma917; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t918; CHECK-NEXT: ret919 %v = call <4 x i32> @llvm.vp.xor.v4i32(<4 x i32> %va, <4 x i32> splat (i32 7), <4 x i1> %m, i32 %evl)920 ret <4 x i32> %v921}922 923define <4 x i32> @vxor_vi_v4i32_unmasked(<4 x i32> %va, i32 zeroext %evl) {924; CHECK-LABEL: vxor_vi_v4i32_unmasked:925; CHECK: # %bb.0:926; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma927; CHECK-NEXT: vxor.vi v8, v8, 7928; CHECK-NEXT: ret929 %v = call <4 x i32> @llvm.vp.xor.v4i32(<4 x i32> %va, <4 x i32> splat (i32 7), <4 x i1> splat (i1 true), i32 %evl)930 ret <4 x i32> %v931}932 933define <4 x i32> @vxor_vi_v4i32_1(<4 x i32> %va, <4 x i1> %m, i32 zeroext %evl) {934; CHECK-LABEL: vxor_vi_v4i32_1:935; CHECK: # %bb.0:936; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma937; CHECK-NEXT: vnot.v v8, v8, v0.t938; CHECK-NEXT: ret939 %v = call <4 x i32> @llvm.vp.xor.v4i32(<4 x i32> %va, <4 x i32> splat (i32 -1), <4 x i1> %m, i32 %evl)940 ret <4 x i32> %v941}942 943define <4 x i32> @vxor_vi_v4i32_unmasked_1(<4 x i32> %va, i32 zeroext %evl) {944; CHECK-LABEL: vxor_vi_v4i32_unmasked_1:945; CHECK: # %bb.0:946; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma947; CHECK-NEXT: vnot.v v8, v8948; CHECK-NEXT: ret949 %v = call <4 x i32> @llvm.vp.xor.v4i32(<4 x i32> %va, <4 x i32> splat (i32 -1), <4 x i1> splat (i1 true), i32 %evl)950 ret <4 x i32> %v951}952 953define <8 x i32> @vxor_vv_v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 zeroext %evl) {954; CHECK-LABEL: vxor_vv_v8i32:955; CHECK: # %bb.0:956; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma957; CHECK-NEXT: vxor.vv v8, v8, v10, v0.t958; CHECK-NEXT: ret959 %v = call <8 x i32> @llvm.vp.xor.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 %evl)960 ret <8 x i32> %v961}962 963define <8 x i32> @vxor_vv_v8i32_unmasked(<8 x i32> %va, <8 x i32> %b, i32 zeroext %evl) {964; CHECK-LABEL: vxor_vv_v8i32_unmasked:965; CHECK: # %bb.0:966; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma967; CHECK-NEXT: vxor.vv v8, v8, v10968; CHECK-NEXT: ret969 %v = call <8 x i32> @llvm.vp.xor.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> splat (i1 true), i32 %evl)970 ret <8 x i32> %v971}972 973define <8 x i32> @vxor_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {974; CHECK-LABEL: vxor_vx_v8i32:975; CHECK: # %bb.0:976; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma977; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t978; CHECK-NEXT: ret979 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0980 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer981 %v = call <8 x i32> @llvm.vp.xor.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 %evl)982 ret <8 x i32> %v983}984 985define <8 x i32> @vxor_vx_v8i32_unmasked(<8 x i32> %va, i32 %b, i32 zeroext %evl) {986; CHECK-LABEL: vxor_vx_v8i32_unmasked:987; CHECK: # %bb.0:988; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma989; CHECK-NEXT: vxor.vx v8, v8, a0990; CHECK-NEXT: ret991 %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0992 %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer993 %v = call <8 x i32> @llvm.vp.xor.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> splat (i1 true), i32 %evl)994 ret <8 x i32> %v995}996 997define <8 x i32> @vxor_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {998; CHECK-LABEL: vxor_vi_v8i32:999; CHECK: # %bb.0:1000; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1001; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t1002; CHECK-NEXT: ret1003 %v = call <8 x i32> @llvm.vp.xor.v8i32(<8 x i32> %va, <8 x i32> splat (i32 7), <8 x i1> %m, i32 %evl)1004 ret <8 x i32> %v1005}1006 1007define <8 x i32> @vxor_vi_v8i32_unmasked(<8 x i32> %va, i32 zeroext %evl) {1008; CHECK-LABEL: vxor_vi_v8i32_unmasked:1009; CHECK: # %bb.0:1010; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1011; CHECK-NEXT: vxor.vi v8, v8, 71012; CHECK-NEXT: ret1013 %v = call <8 x i32> @llvm.vp.xor.v8i32(<8 x i32> %va, <8 x i32> splat (i32 7), <8 x i1> splat (i1 true), i32 %evl)1014 ret <8 x i32> %v1015}1016 1017define <8 x i32> @vxor_vi_v8i32_1(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) {1018; CHECK-LABEL: vxor_vi_v8i32_1:1019; CHECK: # %bb.0:1020; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1021; CHECK-NEXT: vnot.v v8, v8, v0.t1022; CHECK-NEXT: ret1023 %v = call <8 x i32> @llvm.vp.xor.v8i32(<8 x i32> %va, <8 x i32> splat (i32 -1), <8 x i1> %m, i32 %evl)1024 ret <8 x i32> %v1025}1026 1027define <8 x i32> @vxor_vi_v8i32_unmasked_1(<8 x i32> %va, i32 zeroext %evl) {1028; CHECK-LABEL: vxor_vi_v8i32_unmasked_1:1029; CHECK: # %bb.0:1030; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1031; CHECK-NEXT: vnot.v v8, v81032; CHECK-NEXT: ret1033 %v = call <8 x i32> @llvm.vp.xor.v8i32(<8 x i32> %va, <8 x i32> splat (i32 -1), <8 x i1> splat (i1 true), i32 %evl)1034 ret <8 x i32> %v1035}1036 1037define <16 x i32> @vxor_vv_v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 zeroext %evl) {1038; CHECK-LABEL: vxor_vv_v16i32:1039; CHECK: # %bb.0:1040; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1041; CHECK-NEXT: vxor.vv v8, v8, v12, v0.t1042; CHECK-NEXT: ret1043 %v = call <16 x i32> @llvm.vp.xor.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 %evl)1044 ret <16 x i32> %v1045}1046 1047define <16 x i32> @vxor_vv_v16i32_unmasked(<16 x i32> %va, <16 x i32> %b, i32 zeroext %evl) {1048; CHECK-LABEL: vxor_vv_v16i32_unmasked:1049; CHECK: # %bb.0:1050; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1051; CHECK-NEXT: vxor.vv v8, v8, v121052; CHECK-NEXT: ret1053 %v = call <16 x i32> @llvm.vp.xor.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> splat (i1 true), i32 %evl)1054 ret <16 x i32> %v1055}1056 1057define <16 x i32> @vxor_vx_v16i32(<16 x i32> %va, i32 %b, <16 x i1> %m, i32 zeroext %evl) {1058; CHECK-LABEL: vxor_vx_v16i32:1059; CHECK: # %bb.0:1060; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma1061; CHECK-NEXT: vxor.vx v8, v8, a0, v0.t1062; CHECK-NEXT: ret1063 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 01064 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer1065 %v = call <16 x i32> @llvm.vp.xor.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> %m, i32 %evl)1066 ret <16 x i32> %v1067}1068 1069define <16 x i32> @vxor_vx_v16i32_unmasked(<16 x i32> %va, i32 %b, i32 zeroext %evl) {1070; CHECK-LABEL: vxor_vx_v16i32_unmasked:1071; CHECK: # %bb.0:1072; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma1073; CHECK-NEXT: vxor.vx v8, v8, a01074; CHECK-NEXT: ret1075 %elt.head = insertelement <16 x i32> poison, i32 %b, i32 01076 %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer1077 %v = call <16 x i32> @llvm.vp.xor.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> splat (i1 true), i32 %evl)1078 ret <16 x i32> %v1079}1080 1081define <16 x i32> @vxor_vi_v16i32(<16 x i32> %va, <16 x i1> %m, i32 zeroext %evl) {1082; CHECK-LABEL: vxor_vi_v16i32:1083; CHECK: # %bb.0:1084; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1085; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t1086; CHECK-NEXT: ret1087 %v = call <16 x i32> @llvm.vp.xor.v16i32(<16 x i32> %va, <16 x i32> splat (i32 7), <16 x i1> %m, i32 %evl)1088 ret <16 x i32> %v1089}1090 1091define <16 x i32> @vxor_vi_v16i32_unmasked(<16 x i32> %va, i32 zeroext %evl) {1092; CHECK-LABEL: vxor_vi_v16i32_unmasked:1093; CHECK: # %bb.0:1094; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1095; CHECK-NEXT: vxor.vi v8, v8, 71096; CHECK-NEXT: ret1097 %v = call <16 x i32> @llvm.vp.xor.v16i32(<16 x i32> %va, <16 x i32> splat (i32 7), <16 x i1> splat (i1 true), i32 %evl)1098 ret <16 x i32> %v1099}1100 1101define <16 x i32> @vxor_vi_v16i32_1(<16 x i32> %va, <16 x i1> %m, i32 zeroext %evl) {1102; CHECK-LABEL: vxor_vi_v16i32_1:1103; CHECK: # %bb.0:1104; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1105; CHECK-NEXT: vnot.v v8, v8, v0.t1106; CHECK-NEXT: ret1107 %v = call <16 x i32> @llvm.vp.xor.v16i32(<16 x i32> %va, <16 x i32> splat (i32 -1), <16 x i1> %m, i32 %evl)1108 ret <16 x i32> %v1109}1110 1111define <16 x i32> @vxor_vi_v16i32_unmasked_1(<16 x i32> %va, i32 zeroext %evl) {1112; CHECK-LABEL: vxor_vi_v16i32_unmasked_1:1113; CHECK: # %bb.0:1114; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1115; CHECK-NEXT: vnot.v v8, v81116; CHECK-NEXT: ret1117 %v = call <16 x i32> @llvm.vp.xor.v16i32(<16 x i32> %va, <16 x i32> splat (i32 -1), <16 x i1> splat (i1 true), i32 %evl)1118 ret <16 x i32> %v1119}1120 1121define <2 x i64> @vxor_vv_v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 zeroext %evl) {1122; CHECK-LABEL: vxor_vv_v2i64:1123; CHECK: # %bb.0:1124; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1125; CHECK-NEXT: vxor.vv v8, v8, v9, v0.t1126; CHECK-NEXT: ret1127 %v = call <2 x i64> @llvm.vp.xor.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 %evl)1128 ret <2 x i64> %v1129}1130 1131define <2 x i64> @vxor_vv_v2i64_unmasked(<2 x i64> %va, <2 x i64> %b, i32 zeroext %evl) {1132; CHECK-LABEL: vxor_vv_v2i64_unmasked:1133; CHECK: # %bb.0:1134; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1135; CHECK-NEXT: vxor.vv v8, v8, v91136; CHECK-NEXT: ret1137 %v = call <2 x i64> @llvm.vp.xor.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> splat (i1 true), i32 %evl)1138 ret <2 x i64> %v1139}1140 1141define <2 x i64> @vxor_vx_v2i64(<2 x i64> %va, i64 %b, <2 x i1> %m, i32 zeroext %evl) {1142; RV32-LABEL: vxor_vx_v2i64:1143; RV32: # %bb.0:1144; RV32-NEXT: addi sp, sp, -161145; RV32-NEXT: .cfi_def_cfa_offset 161146; RV32-NEXT: sw a0, 8(sp)1147; RV32-NEXT: sw a1, 12(sp)1148; RV32-NEXT: addi a0, sp, 81149; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma1150; RV32-NEXT: vlse64.v v9, (a0), zero1151; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1152; RV32-NEXT: vxor.vv v8, v8, v9, v0.t1153; RV32-NEXT: addi sp, sp, 161154; RV32-NEXT: .cfi_def_cfa_offset 01155; RV32-NEXT: ret1156;1157; RV64-LABEL: vxor_vx_v2i64:1158; RV64: # %bb.0:1159; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1160; RV64-NEXT: vxor.vx v8, v8, a0, v0.t1161; RV64-NEXT: ret1162 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 01163 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer1164 %v = call <2 x i64> @llvm.vp.xor.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> %m, i32 %evl)1165 ret <2 x i64> %v1166}1167 1168define <2 x i64> @vxor_vx_v2i64_unmasked(<2 x i64> %va, i64 %b, i32 zeroext %evl) {1169; RV32-LABEL: vxor_vx_v2i64_unmasked:1170; RV32: # %bb.0:1171; RV32-NEXT: addi sp, sp, -161172; RV32-NEXT: .cfi_def_cfa_offset 161173; RV32-NEXT: sw a0, 8(sp)1174; RV32-NEXT: sw a1, 12(sp)1175; RV32-NEXT: addi a0, sp, 81176; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma1177; RV32-NEXT: vlse64.v v9, (a0), zero1178; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1179; RV32-NEXT: vxor.vv v8, v8, v91180; RV32-NEXT: addi sp, sp, 161181; RV32-NEXT: .cfi_def_cfa_offset 01182; RV32-NEXT: ret1183;1184; RV64-LABEL: vxor_vx_v2i64_unmasked:1185; RV64: # %bb.0:1186; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1187; RV64-NEXT: vxor.vx v8, v8, a01188; RV64-NEXT: ret1189 %elt.head = insertelement <2 x i64> poison, i64 %b, i32 01190 %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer1191 %v = call <2 x i64> @llvm.vp.xor.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> splat (i1 true), i32 %evl)1192 ret <2 x i64> %v1193}1194 1195define <2 x i64> @vxor_vi_v2i64(<2 x i64> %va, <2 x i1> %m, i32 zeroext %evl) {1196; CHECK-LABEL: vxor_vi_v2i64:1197; CHECK: # %bb.0:1198; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1199; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t1200; CHECK-NEXT: ret1201 %v = call <2 x i64> @llvm.vp.xor.v2i64(<2 x i64> %va, <2 x i64> splat (i64 7), <2 x i1> %m, i32 %evl)1202 ret <2 x i64> %v1203}1204 1205define <2 x i64> @vxor_vi_v2i64_unmasked(<2 x i64> %va, i32 zeroext %evl) {1206; CHECK-LABEL: vxor_vi_v2i64_unmasked:1207; CHECK: # %bb.0:1208; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1209; CHECK-NEXT: vxor.vi v8, v8, 71210; CHECK-NEXT: ret1211 %v = call <2 x i64> @llvm.vp.xor.v2i64(<2 x i64> %va, <2 x i64> splat (i64 7), <2 x i1> splat (i1 true), i32 %evl)1212 ret <2 x i64> %v1213}1214 1215define <2 x i64> @vxor_vi_v2i64_1(<2 x i64> %va, <2 x i1> %m, i32 zeroext %evl) {1216; CHECK-LABEL: vxor_vi_v2i64_1:1217; CHECK: # %bb.0:1218; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1219; CHECK-NEXT: vnot.v v8, v8, v0.t1220; CHECK-NEXT: ret1221 %v = call <2 x i64> @llvm.vp.xor.v2i64(<2 x i64> %va, <2 x i64> splat (i64 -1), <2 x i1> %m, i32 %evl)1222 ret <2 x i64> %v1223}1224 1225define <2 x i64> @vxor_vi_v2i64_unmasked_1(<2 x i64> %va, i32 zeroext %evl) {1226; CHECK-LABEL: vxor_vi_v2i64_unmasked_1:1227; CHECK: # %bb.0:1228; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1229; CHECK-NEXT: vnot.v v8, v81230; CHECK-NEXT: ret1231 %v = call <2 x i64> @llvm.vp.xor.v2i64(<2 x i64> %va, <2 x i64> splat (i64 -1), <2 x i1> splat (i1 true), i32 %evl)1232 ret <2 x i64> %v1233}1234 1235define <4 x i64> @vxor_vv_v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 zeroext %evl) {1236; CHECK-LABEL: vxor_vv_v4i64:1237; CHECK: # %bb.0:1238; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1239; CHECK-NEXT: vxor.vv v8, v8, v10, v0.t1240; CHECK-NEXT: ret1241 %v = call <4 x i64> @llvm.vp.xor.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 %evl)1242 ret <4 x i64> %v1243}1244 1245define <4 x i64> @vxor_vv_v4i64_unmasked(<4 x i64> %va, <4 x i64> %b, i32 zeroext %evl) {1246; CHECK-LABEL: vxor_vv_v4i64_unmasked:1247; CHECK: # %bb.0:1248; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1249; CHECK-NEXT: vxor.vv v8, v8, v101250; CHECK-NEXT: ret1251 %v = call <4 x i64> @llvm.vp.xor.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> splat (i1 true), i32 %evl)1252 ret <4 x i64> %v1253}1254 1255define <4 x i64> @vxor_vx_v4i64(<4 x i64> %va, i64 %b, <4 x i1> %m, i32 zeroext %evl) {1256; RV32-LABEL: vxor_vx_v4i64:1257; RV32: # %bb.0:1258; RV32-NEXT: addi sp, sp, -161259; RV32-NEXT: .cfi_def_cfa_offset 161260; RV32-NEXT: sw a0, 8(sp)1261; RV32-NEXT: sw a1, 12(sp)1262; RV32-NEXT: addi a0, sp, 81263; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma1264; RV32-NEXT: vlse64.v v10, (a0), zero1265; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1266; RV32-NEXT: vxor.vv v8, v8, v10, v0.t1267; RV32-NEXT: addi sp, sp, 161268; RV32-NEXT: .cfi_def_cfa_offset 01269; RV32-NEXT: ret1270;1271; RV64-LABEL: vxor_vx_v4i64:1272; RV64: # %bb.0:1273; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1274; RV64-NEXT: vxor.vx v8, v8, a0, v0.t1275; RV64-NEXT: ret1276 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 01277 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer1278 %v = call <4 x i64> @llvm.vp.xor.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> %m, i32 %evl)1279 ret <4 x i64> %v1280}1281 1282define <4 x i64> @vxor_vx_v4i64_unmasked(<4 x i64> %va, i64 %b, i32 zeroext %evl) {1283; RV32-LABEL: vxor_vx_v4i64_unmasked:1284; RV32: # %bb.0:1285; RV32-NEXT: addi sp, sp, -161286; RV32-NEXT: .cfi_def_cfa_offset 161287; RV32-NEXT: sw a0, 8(sp)1288; RV32-NEXT: sw a1, 12(sp)1289; RV32-NEXT: addi a0, sp, 81290; RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma1291; RV32-NEXT: vlse64.v v10, (a0), zero1292; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1293; RV32-NEXT: vxor.vv v8, v8, v101294; RV32-NEXT: addi sp, sp, 161295; RV32-NEXT: .cfi_def_cfa_offset 01296; RV32-NEXT: ret1297;1298; RV64-LABEL: vxor_vx_v4i64_unmasked:1299; RV64: # %bb.0:1300; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1301; RV64-NEXT: vxor.vx v8, v8, a01302; RV64-NEXT: ret1303 %elt.head = insertelement <4 x i64> poison, i64 %b, i32 01304 %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer1305 %v = call <4 x i64> @llvm.vp.xor.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> splat (i1 true), i32 %evl)1306 ret <4 x i64> %v1307}1308 1309define <4 x i64> @vxor_vi_v4i64(<4 x i64> %va, <4 x i1> %m, i32 zeroext %evl) {1310; CHECK-LABEL: vxor_vi_v4i64:1311; CHECK: # %bb.0:1312; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1313; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t1314; CHECK-NEXT: ret1315 %v = call <4 x i64> @llvm.vp.xor.v4i64(<4 x i64> %va, <4 x i64> splat (i64 7), <4 x i1> %m, i32 %evl)1316 ret <4 x i64> %v1317}1318 1319define <4 x i64> @vxor_vi_v4i64_unmasked(<4 x i64> %va, i32 zeroext %evl) {1320; CHECK-LABEL: vxor_vi_v4i64_unmasked:1321; CHECK: # %bb.0:1322; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1323; CHECK-NEXT: vxor.vi v8, v8, 71324; CHECK-NEXT: ret1325 %v = call <4 x i64> @llvm.vp.xor.v4i64(<4 x i64> %va, <4 x i64> splat (i64 7), <4 x i1> splat (i1 true), i32 %evl)1326 ret <4 x i64> %v1327}1328 1329define <4 x i64> @vxor_vi_v4i64_1(<4 x i64> %va, <4 x i1> %m, i32 zeroext %evl) {1330; CHECK-LABEL: vxor_vi_v4i64_1:1331; CHECK: # %bb.0:1332; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1333; CHECK-NEXT: vnot.v v8, v8, v0.t1334; CHECK-NEXT: ret1335 %v = call <4 x i64> @llvm.vp.xor.v4i64(<4 x i64> %va, <4 x i64> splat (i64 -1), <4 x i1> %m, i32 %evl)1336 ret <4 x i64> %v1337}1338 1339define <4 x i64> @vxor_vi_v4i64_unmasked_1(<4 x i64> %va, i32 zeroext %evl) {1340; CHECK-LABEL: vxor_vi_v4i64_unmasked_1:1341; CHECK: # %bb.0:1342; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1343; CHECK-NEXT: vnot.v v8, v81344; CHECK-NEXT: ret1345 %v = call <4 x i64> @llvm.vp.xor.v4i64(<4 x i64> %va, <4 x i64> splat (i64 -1), <4 x i1> splat (i1 true), i32 %evl)1346 ret <4 x i64> %v1347}1348 1349define <8 x i64> @vxor_vv_v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 zeroext %evl) {1350; CHECK-LABEL: vxor_vv_v8i64:1351; CHECK: # %bb.0:1352; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1353; CHECK-NEXT: vxor.vv v8, v8, v12, v0.t1354; CHECK-NEXT: ret1355 %v = call <8 x i64> @llvm.vp.xor.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 %evl)1356 ret <8 x i64> %v1357}1358 1359define <8 x i64> @vxor_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %b, i32 zeroext %evl) {1360; CHECK-LABEL: vxor_vv_v8i64_unmasked:1361; CHECK: # %bb.0:1362; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1363; CHECK-NEXT: vxor.vv v8, v8, v121364; CHECK-NEXT: ret1365 %v = call <8 x i64> @llvm.vp.xor.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> splat (i1 true), i32 %evl)1366 ret <8 x i64> %v1367}1368 1369define <8 x i64> @vxor_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {1370; RV32-LABEL: vxor_vx_v8i64:1371; RV32: # %bb.0:1372; RV32-NEXT: addi sp, sp, -161373; RV32-NEXT: .cfi_def_cfa_offset 161374; RV32-NEXT: sw a0, 8(sp)1375; RV32-NEXT: sw a1, 12(sp)1376; RV32-NEXT: addi a0, sp, 81377; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma1378; RV32-NEXT: vlse64.v v12, (a0), zero1379; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1380; RV32-NEXT: vxor.vv v8, v8, v12, v0.t1381; RV32-NEXT: addi sp, sp, 161382; RV32-NEXT: .cfi_def_cfa_offset 01383; RV32-NEXT: ret1384;1385; RV64-LABEL: vxor_vx_v8i64:1386; RV64: # %bb.0:1387; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1388; RV64-NEXT: vxor.vx v8, v8, a0, v0.t1389; RV64-NEXT: ret1390 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 01391 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1392 %v = call <8 x i64> @llvm.vp.xor.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)1393 ret <8 x i64> %v1394}1395 1396define <8 x i64> @vxor_vx_v8i64_unmasked(<8 x i64> %va, i64 %b, i32 zeroext %evl) {1397; RV32-LABEL: vxor_vx_v8i64_unmasked:1398; RV32: # %bb.0:1399; RV32-NEXT: addi sp, sp, -161400; RV32-NEXT: .cfi_def_cfa_offset 161401; RV32-NEXT: sw a0, 8(sp)1402; RV32-NEXT: sw a1, 12(sp)1403; RV32-NEXT: addi a0, sp, 81404; RV32-NEXT: vsetivli zero, 8, e64, m4, ta, ma1405; RV32-NEXT: vlse64.v v12, (a0), zero1406; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1407; RV32-NEXT: vxor.vv v8, v8, v121408; RV32-NEXT: addi sp, sp, 161409; RV32-NEXT: .cfi_def_cfa_offset 01410; RV32-NEXT: ret1411;1412; RV64-LABEL: vxor_vx_v8i64_unmasked:1413; RV64: # %bb.0:1414; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1415; RV64-NEXT: vxor.vx v8, v8, a01416; RV64-NEXT: ret1417 %elt.head = insertelement <8 x i64> poison, i64 %b, i32 01418 %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer1419 %v = call <8 x i64> @llvm.vp.xor.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> splat (i1 true), i32 %evl)1420 ret <8 x i64> %v1421}1422 1423define <8 x i64> @vxor_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {1424; CHECK-LABEL: vxor_vi_v8i64:1425; CHECK: # %bb.0:1426; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1427; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t1428; CHECK-NEXT: ret1429 %v = call <8 x i64> @llvm.vp.xor.v8i64(<8 x i64> %va, <8 x i64> splat (i64 7), <8 x i1> %m, i32 %evl)1430 ret <8 x i64> %v1431}1432 1433define <8 x i64> @vxor_vi_v8i64_unmasked(<8 x i64> %va, i32 zeroext %evl) {1434; CHECK-LABEL: vxor_vi_v8i64_unmasked:1435; CHECK: # %bb.0:1436; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1437; CHECK-NEXT: vxor.vi v8, v8, 71438; CHECK-NEXT: ret1439 %v = call <8 x i64> @llvm.vp.xor.v8i64(<8 x i64> %va, <8 x i64> splat (i64 7), <8 x i1> splat (i1 true), i32 %evl)1440 ret <8 x i64> %v1441}1442 1443define <8 x i64> @vxor_vi_v8i64_1(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) {1444; CHECK-LABEL: vxor_vi_v8i64_1:1445; CHECK: # %bb.0:1446; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1447; CHECK-NEXT: vnot.v v8, v8, v0.t1448; CHECK-NEXT: ret1449 %v = call <8 x i64> @llvm.vp.xor.v8i64(<8 x i64> %va, <8 x i64> splat (i64 -1), <8 x i1> %m, i32 %evl)1450 ret <8 x i64> %v1451}1452 1453define <8 x i64> @vxor_vi_v8i64_unmasked_1(<8 x i64> %va, i32 zeroext %evl) {1454; CHECK-LABEL: vxor_vi_v8i64_unmasked_1:1455; CHECK: # %bb.0:1456; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1457; CHECK-NEXT: vnot.v v8, v81458; CHECK-NEXT: ret1459 %v = call <8 x i64> @llvm.vp.xor.v8i64(<8 x i64> %va, <8 x i64> splat (i64 -1), <8 x i1> splat (i1 true), i32 %evl)1460 ret <8 x i64> %v1461}1462 1463define <16 x i64> @vxor_vv_v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 zeroext %evl) {1464; CHECK-LABEL: vxor_vv_v16i64:1465; CHECK: # %bb.0:1466; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1467; CHECK-NEXT: vxor.vv v8, v8, v16, v0.t1468; CHECK-NEXT: ret1469 %v = call <16 x i64> @llvm.vp.xor.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 %evl)1470 ret <16 x i64> %v1471}1472 1473define <16 x i64> @vxor_vv_v16i64_unmasked(<16 x i64> %va, <16 x i64> %b, i32 zeroext %evl) {1474; CHECK-LABEL: vxor_vv_v16i64_unmasked:1475; CHECK: # %bb.0:1476; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1477; CHECK-NEXT: vxor.vv v8, v8, v161478; CHECK-NEXT: ret1479 %v = call <16 x i64> @llvm.vp.xor.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> splat (i1 true), i32 %evl)1480 ret <16 x i64> %v1481}1482 1483define <16 x i64> @vxor_vx_v16i64(<16 x i64> %va, i64 %b, <16 x i1> %m, i32 zeroext %evl) {1484; RV32-LABEL: vxor_vx_v16i64:1485; RV32: # %bb.0:1486; RV32-NEXT: addi sp, sp, -161487; RV32-NEXT: .cfi_def_cfa_offset 161488; RV32-NEXT: sw a0, 8(sp)1489; RV32-NEXT: sw a1, 12(sp)1490; RV32-NEXT: addi a0, sp, 81491; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma1492; RV32-NEXT: vlse64.v v16, (a0), zero1493; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1494; RV32-NEXT: vxor.vv v8, v8, v16, v0.t1495; RV32-NEXT: addi sp, sp, 161496; RV32-NEXT: .cfi_def_cfa_offset 01497; RV32-NEXT: ret1498;1499; RV64-LABEL: vxor_vx_v16i64:1500; RV64: # %bb.0:1501; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1502; RV64-NEXT: vxor.vx v8, v8, a0, v0.t1503; RV64-NEXT: ret1504 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 01505 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer1506 %v = call <16 x i64> @llvm.vp.xor.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> %m, i32 %evl)1507 ret <16 x i64> %v1508}1509 1510define <16 x i64> @vxor_vx_v16i64_unmasked(<16 x i64> %va, i64 %b, i32 zeroext %evl) {1511; RV32-LABEL: vxor_vx_v16i64_unmasked:1512; RV32: # %bb.0:1513; RV32-NEXT: addi sp, sp, -161514; RV32-NEXT: .cfi_def_cfa_offset 161515; RV32-NEXT: sw a0, 8(sp)1516; RV32-NEXT: sw a1, 12(sp)1517; RV32-NEXT: addi a0, sp, 81518; RV32-NEXT: vsetivli zero, 16, e64, m8, ta, ma1519; RV32-NEXT: vlse64.v v16, (a0), zero1520; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1521; RV32-NEXT: vxor.vv v8, v8, v161522; RV32-NEXT: addi sp, sp, 161523; RV32-NEXT: .cfi_def_cfa_offset 01524; RV32-NEXT: ret1525;1526; RV64-LABEL: vxor_vx_v16i64_unmasked:1527; RV64: # %bb.0:1528; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1529; RV64-NEXT: vxor.vx v8, v8, a01530; RV64-NEXT: ret1531 %elt.head = insertelement <16 x i64> poison, i64 %b, i32 01532 %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer1533 %v = call <16 x i64> @llvm.vp.xor.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> splat (i1 true), i32 %evl)1534 ret <16 x i64> %v1535}1536 1537define <16 x i64> @vxor_vi_v16i64(<16 x i64> %va, <16 x i1> %m, i32 zeroext %evl) {1538; CHECK-LABEL: vxor_vi_v16i64:1539; CHECK: # %bb.0:1540; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1541; CHECK-NEXT: vxor.vi v8, v8, 7, v0.t1542; CHECK-NEXT: ret1543 %v = call <16 x i64> @llvm.vp.xor.v16i64(<16 x i64> %va, <16 x i64> splat (i64 7), <16 x i1> %m, i32 %evl)1544 ret <16 x i64> %v1545}1546 1547define <16 x i64> @vxor_vi_v16i64_unmasked(<16 x i64> %va, i32 zeroext %evl) {1548; CHECK-LABEL: vxor_vi_v16i64_unmasked:1549; CHECK: # %bb.0:1550; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1551; CHECK-NEXT: vxor.vi v8, v8, 71552; CHECK-NEXT: ret1553 %v = call <16 x i64> @llvm.vp.xor.v16i64(<16 x i64> %va, <16 x i64> splat (i64 7), <16 x i1> splat (i1 true), i32 %evl)1554 ret <16 x i64> %v1555}1556 1557define <16 x i64> @vxor_vi_v16i64_1(<16 x i64> %va, <16 x i1> %m, i32 zeroext %evl) {1558; CHECK-LABEL: vxor_vi_v16i64_1:1559; CHECK: # %bb.0:1560; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1561; CHECK-NEXT: vnot.v v8, v8, v0.t1562; CHECK-NEXT: ret1563 %v = call <16 x i64> @llvm.vp.xor.v16i64(<16 x i64> %va, <16 x i64> splat (i64 -1), <16 x i1> %m, i32 %evl)1564 ret <16 x i64> %v1565}1566 1567define <16 x i64> @vxor_vi_v16i64_unmasked_1(<16 x i64> %va, i32 zeroext %evl) {1568; CHECK-LABEL: vxor_vi_v16i64_unmasked_1:1569; CHECK: # %bb.0:1570; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1571; CHECK-NEXT: vnot.v v8, v81572; CHECK-NEXT: ret1573 %v = call <16 x i64> @llvm.vp.xor.v16i64(<16 x i64> %va, <16 x i64> splat (i64 -1), <16 x i1> splat (i1 true), i32 %evl)1574 ret <16 x i64> %v1575}1576