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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \3; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \4; RUN: --check-prefixes=CHECK,ZVFH,RV32ZVFH5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \6; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \7; RUN: --check-prefixes=CHECK,ZVFH,RV64ZVFH8; RUN: llc -mtriple=riscv32 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \9; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \10; RUN: --check-prefixes=CHECK,ZVFHMIN,RV32ZVFHMIN11; RUN: llc -mtriple=riscv64 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \12; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \13; RUN: --check-prefixes=CHECK,ZVFHMIN,RV64ZVFHMIN14 15define <vscale x 1 x bfloat> @nearbyint_nxv1bf16(<vscale x 1 x bfloat> %x) {16; CHECK-LABEL: nearbyint_nxv1bf16:17; CHECK: # %bb.0:18; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma19; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v820; CHECK-NEXT: lui a0, 30720021; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma22; CHECK-NEXT: vfabs.v v8, v923; CHECK-NEXT: fmv.w.x fa5, a024; CHECK-NEXT: vmflt.vf v0, v8, fa525; CHECK-NEXT: frflags a026; CHECK-NEXT: vfcvt.x.f.v v8, v9, v0.t27; CHECK-NEXT: vfcvt.f.x.v v8, v8, v0.t28; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu29; CHECK-NEXT: vfsgnj.vv v9, v8, v9, v0.t30; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma31; CHECK-NEXT: vfncvtbf16.f.f.w v8, v932; CHECK-NEXT: fsflags a033; CHECK-NEXT: ret34 %a = call <vscale x 1 x bfloat> @llvm.nearbyint.nxv1bf16(<vscale x 1 x bfloat> %x)35 ret <vscale x 1 x bfloat> %a36}37 38define <vscale x 2 x bfloat> @nearbyint_nxv2bf16(<vscale x 2 x bfloat> %x) {39; CHECK-LABEL: nearbyint_nxv2bf16:40; CHECK: # %bb.0:41; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma42; CHECK-NEXT: vfwcvtbf16.f.f.v v9, v843; CHECK-NEXT: lui a0, 30720044; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma45; CHECK-NEXT: vfabs.v v8, v946; CHECK-NEXT: fmv.w.x fa5, a047; CHECK-NEXT: vmflt.vf v0, v8, fa548; CHECK-NEXT: frflags a049; CHECK-NEXT: vfcvt.x.f.v v8, v9, v0.t50; CHECK-NEXT: vfcvt.f.x.v v8, v8, v0.t51; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu52; CHECK-NEXT: vfsgnj.vv v9, v8, v9, v0.t53; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma54; CHECK-NEXT: vfncvtbf16.f.f.w v8, v955; CHECK-NEXT: fsflags a056; CHECK-NEXT: ret57 %a = call <vscale x 2 x bfloat> @llvm.nearbyint.nxv2bf16(<vscale x 2 x bfloat> %x)58 ret <vscale x 2 x bfloat> %a59}60 61define <vscale x 4 x bfloat> @nearbyint_nxv4bf16(<vscale x 4 x bfloat> %x) {62; CHECK-LABEL: nearbyint_nxv4bf16:63; CHECK: # %bb.0:64; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma65; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v866; CHECK-NEXT: lui a0, 30720067; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma68; CHECK-NEXT: vfabs.v v8, v1069; CHECK-NEXT: fmv.w.x fa5, a070; CHECK-NEXT: vmflt.vf v0, v8, fa571; CHECK-NEXT: frflags a072; CHECK-NEXT: vfcvt.x.f.v v8, v10, v0.t73; CHECK-NEXT: vfcvt.f.x.v v8, v8, v0.t74; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu75; CHECK-NEXT: vfsgnj.vv v10, v8, v10, v0.t76; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma77; CHECK-NEXT: vfncvtbf16.f.f.w v8, v1078; CHECK-NEXT: fsflags a079; CHECK-NEXT: ret80 %a = call <vscale x 4 x bfloat> @llvm.nearbyint.nxv4bf16(<vscale x 4 x bfloat> %x)81 ret <vscale x 4 x bfloat> %a82}83 84define <vscale x 8 x bfloat> @nearbyint_nxv8bf16(<vscale x 8 x bfloat> %x) {85; CHECK-LABEL: nearbyint_nxv8bf16:86; CHECK: # %bb.0:87; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma88; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v889; CHECK-NEXT: lui a0, 30720090; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma91; CHECK-NEXT: vfabs.v v8, v1292; CHECK-NEXT: fmv.w.x fa5, a093; CHECK-NEXT: vmflt.vf v0, v8, fa594; CHECK-NEXT: frflags a095; CHECK-NEXT: vfcvt.x.f.v v8, v12, v0.t96; CHECK-NEXT: vfcvt.f.x.v v8, v8, v0.t97; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu98; CHECK-NEXT: vfsgnj.vv v12, v8, v12, v0.t99; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma100; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12101; CHECK-NEXT: fsflags a0102; CHECK-NEXT: ret103 %a = call <vscale x 8 x bfloat> @llvm.nearbyint.nxv8bf16(<vscale x 8 x bfloat> %x)104 ret <vscale x 8 x bfloat> %a105}106 107define <vscale x 16 x bfloat> @nearbyint_nxv16bf16(<vscale x 16 x bfloat> %x) {108; CHECK-LABEL: nearbyint_nxv16bf16:109; CHECK: # %bb.0:110; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma111; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8112; CHECK-NEXT: lui a0, 307200113; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma114; CHECK-NEXT: vfabs.v v8, v16115; CHECK-NEXT: fmv.w.x fa5, a0116; CHECK-NEXT: vmflt.vf v0, v8, fa5117; CHECK-NEXT: frflags a0118; CHECK-NEXT: vfcvt.x.f.v v8, v16, v0.t119; CHECK-NEXT: vfcvt.f.x.v v8, v8, v0.t120; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, mu121; CHECK-NEXT: vfsgnj.vv v16, v8, v16, v0.t122; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma123; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16124; CHECK-NEXT: fsflags a0125; CHECK-NEXT: ret126 %a = call <vscale x 16 x bfloat> @llvm.nearbyint.nxv16bf16(<vscale x 16 x bfloat> %x)127 ret <vscale x 16 x bfloat> %a128}129 130define <vscale x 32 x bfloat> @nearbyint_nxv32bf16(<vscale x 32 x bfloat> %x) {131; CHECK-LABEL: nearbyint_nxv32bf16:132; CHECK: # %bb.0:133; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma134; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8135; CHECK-NEXT: lui a0, 307200136; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma137; CHECK-NEXT: vfabs.v v24, v16138; CHECK-NEXT: fmv.w.x fa5, a0139; CHECK-NEXT: vmflt.vf v0, v24, fa5140; CHECK-NEXT: frflags a0141; CHECK-NEXT: vfcvt.x.f.v v24, v16, v0.t142; CHECK-NEXT: vfcvt.f.x.v v24, v24, v0.t143; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, mu144; CHECK-NEXT: vfsgnj.vv v16, v24, v16, v0.t145; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma146; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v12147; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma148; CHECK-NEXT: vfabs.v v8, v24149; CHECK-NEXT: vmflt.vf v0, v8, fa5150; CHECK-NEXT: fsflags a0151; CHECK-NEXT: frflags a0152; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma153; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16154; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma155; CHECK-NEXT: vfcvt.x.f.v v16, v24, v0.t156; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t157; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, mu158; CHECK-NEXT: vfsgnj.vv v24, v16, v24, v0.t159; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma160; CHECK-NEXT: vfncvtbf16.f.f.w v12, v24161; CHECK-NEXT: fsflags a0162; CHECK-NEXT: ret163 %a = call <vscale x 32 x bfloat> @llvm.nearbyint.nxv32bf16(<vscale x 32 x bfloat> %x)164 ret <vscale x 32 x bfloat> %a165}166 167define <vscale x 1 x half> @nearbyint_nxv1f16(<vscale x 1 x half> %x) {168; ZVFH-LABEL: nearbyint_nxv1f16:169; ZVFH: # %bb.0:170; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma171; ZVFH-NEXT: vfabs.v v9, v8172; ZVFH-NEXT: li a0, 25173; ZVFH-NEXT: slli a0, a0, 10174; ZVFH-NEXT: fmv.h.x fa5, a0175; ZVFH-NEXT: vmflt.vf v0, v9, fa5176; ZVFH-NEXT: frflags a0177; ZVFH-NEXT: vfcvt.x.f.v v9, v8, v0.t178; ZVFH-NEXT: vfcvt.f.x.v v9, v9, v0.t179; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, mu180; ZVFH-NEXT: vfsgnj.vv v8, v9, v8, v0.t181; ZVFH-NEXT: fsflags a0182; ZVFH-NEXT: ret183;184; ZVFHMIN-LABEL: nearbyint_nxv1f16:185; ZVFHMIN: # %bb.0:186; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf4, ta, ma187; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8188; ZVFHMIN-NEXT: lui a0, 307200189; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma190; ZVFHMIN-NEXT: vfabs.v v8, v9191; ZVFHMIN-NEXT: fmv.w.x fa5, a0192; ZVFHMIN-NEXT: vmflt.vf v0, v8, fa5193; ZVFHMIN-NEXT: frflags a0194; ZVFHMIN-NEXT: vfcvt.x.f.v v8, v9, v0.t195; ZVFHMIN-NEXT: vfcvt.f.x.v v8, v8, v0.t196; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, mu197; ZVFHMIN-NEXT: vfsgnj.vv v9, v8, v9, v0.t198; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma199; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9200; ZVFHMIN-NEXT: fsflags a0201; ZVFHMIN-NEXT: ret202 %a = call <vscale x 1 x half> @llvm.nearbyint.nxv1f16(<vscale x 1 x half> %x)203 ret <vscale x 1 x half> %a204}205 206define <vscale x 2 x half> @nearbyint_nxv2f16(<vscale x 2 x half> %x) {207; ZVFH-LABEL: nearbyint_nxv2f16:208; ZVFH: # %bb.0:209; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma210; ZVFH-NEXT: vfabs.v v9, v8211; ZVFH-NEXT: li a0, 25212; ZVFH-NEXT: slli a0, a0, 10213; ZVFH-NEXT: fmv.h.x fa5, a0214; ZVFH-NEXT: vmflt.vf v0, v9, fa5215; ZVFH-NEXT: frflags a0216; ZVFH-NEXT: vfcvt.x.f.v v9, v8, v0.t217; ZVFH-NEXT: vfcvt.f.x.v v9, v9, v0.t218; ZVFH-NEXT: vsetvli zero, zero, e16, mf2, ta, mu219; ZVFH-NEXT: vfsgnj.vv v8, v9, v8, v0.t220; ZVFH-NEXT: fsflags a0221; ZVFH-NEXT: ret222;223; ZVFHMIN-LABEL: nearbyint_nxv2f16:224; ZVFHMIN: # %bb.0:225; ZVFHMIN-NEXT: vsetvli a0, zero, e16, mf2, ta, ma226; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8227; ZVFHMIN-NEXT: lui a0, 307200228; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma229; ZVFHMIN-NEXT: vfabs.v v8, v9230; ZVFHMIN-NEXT: fmv.w.x fa5, a0231; ZVFHMIN-NEXT: vmflt.vf v0, v8, fa5232; ZVFHMIN-NEXT: frflags a0233; ZVFHMIN-NEXT: vfcvt.x.f.v v8, v9, v0.t234; ZVFHMIN-NEXT: vfcvt.f.x.v v8, v8, v0.t235; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, mu236; ZVFHMIN-NEXT: vfsgnj.vv v9, v8, v9, v0.t237; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma238; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9239; ZVFHMIN-NEXT: fsflags a0240; ZVFHMIN-NEXT: ret241 %a = call <vscale x 2 x half> @llvm.nearbyint.nxv2f16(<vscale x 2 x half> %x)242 ret <vscale x 2 x half> %a243}244 245define <vscale x 4 x half> @nearbyint_nxv4f16(<vscale x 4 x half> %x) {246; ZVFH-LABEL: nearbyint_nxv4f16:247; ZVFH: # %bb.0:248; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma249; ZVFH-NEXT: vfabs.v v9, v8250; ZVFH-NEXT: li a0, 25251; ZVFH-NEXT: slli a0, a0, 10252; ZVFH-NEXT: fmv.h.x fa5, a0253; ZVFH-NEXT: vmflt.vf v0, v9, fa5254; ZVFH-NEXT: frflags a0255; ZVFH-NEXT: vfcvt.x.f.v v9, v8, v0.t256; ZVFH-NEXT: vfcvt.f.x.v v9, v9, v0.t257; ZVFH-NEXT: vsetvli zero, zero, e16, m1, ta, mu258; ZVFH-NEXT: vfsgnj.vv v8, v9, v8, v0.t259; ZVFH-NEXT: fsflags a0260; ZVFH-NEXT: ret261;262; ZVFHMIN-LABEL: nearbyint_nxv4f16:263; ZVFHMIN: # %bb.0:264; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m1, ta, ma265; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8266; ZVFHMIN-NEXT: lui a0, 307200267; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma268; ZVFHMIN-NEXT: vfabs.v v8, v10269; ZVFHMIN-NEXT: fmv.w.x fa5, a0270; ZVFHMIN-NEXT: vmflt.vf v0, v8, fa5271; ZVFHMIN-NEXT: frflags a0272; ZVFHMIN-NEXT: vfcvt.x.f.v v8, v10, v0.t273; ZVFHMIN-NEXT: vfcvt.f.x.v v8, v8, v0.t274; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, mu275; ZVFHMIN-NEXT: vfsgnj.vv v10, v8, v10, v0.t276; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma277; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10278; ZVFHMIN-NEXT: fsflags a0279; ZVFHMIN-NEXT: ret280 %a = call <vscale x 4 x half> @llvm.nearbyint.nxv4f16(<vscale x 4 x half> %x)281 ret <vscale x 4 x half> %a282}283 284define <vscale x 8 x half> @nearbyint_nxv8f16(<vscale x 8 x half> %x) {285; ZVFH-LABEL: nearbyint_nxv8f16:286; ZVFH: # %bb.0:287; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma288; ZVFH-NEXT: vfabs.v v10, v8289; ZVFH-NEXT: li a0, 25290; ZVFH-NEXT: slli a0, a0, 10291; ZVFH-NEXT: fmv.h.x fa5, a0292; ZVFH-NEXT: vmflt.vf v0, v10, fa5293; ZVFH-NEXT: frflags a0294; ZVFH-NEXT: vfcvt.x.f.v v10, v8, v0.t295; ZVFH-NEXT: vfcvt.f.x.v v10, v10, v0.t296; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, mu297; ZVFH-NEXT: vfsgnj.vv v8, v10, v8, v0.t298; ZVFH-NEXT: fsflags a0299; ZVFH-NEXT: ret300;301; ZVFHMIN-LABEL: nearbyint_nxv8f16:302; ZVFHMIN: # %bb.0:303; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m2, ta, ma304; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8305; ZVFHMIN-NEXT: lui a0, 307200306; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma307; ZVFHMIN-NEXT: vfabs.v v8, v12308; ZVFHMIN-NEXT: fmv.w.x fa5, a0309; ZVFHMIN-NEXT: vmflt.vf v0, v8, fa5310; ZVFHMIN-NEXT: frflags a0311; ZVFHMIN-NEXT: vfcvt.x.f.v v8, v12, v0.t312; ZVFHMIN-NEXT: vfcvt.f.x.v v8, v8, v0.t313; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, mu314; ZVFHMIN-NEXT: vfsgnj.vv v12, v8, v12, v0.t315; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma316; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12317; ZVFHMIN-NEXT: fsflags a0318; ZVFHMIN-NEXT: ret319 %a = call <vscale x 8 x half> @llvm.nearbyint.nxv8f16(<vscale x 8 x half> %x)320 ret <vscale x 8 x half> %a321}322 323define <vscale x 16 x half> @nearbyint_nxv16f16(<vscale x 16 x half> %x) {324; ZVFH-LABEL: nearbyint_nxv16f16:325; ZVFH: # %bb.0:326; ZVFH-NEXT: vsetvli a0, zero, e16, m4, ta, ma327; ZVFH-NEXT: vfabs.v v12, v8328; ZVFH-NEXT: li a0, 25329; ZVFH-NEXT: slli a0, a0, 10330; ZVFH-NEXT: fmv.h.x fa5, a0331; ZVFH-NEXT: vmflt.vf v0, v12, fa5332; ZVFH-NEXT: frflags a0333; ZVFH-NEXT: vfcvt.x.f.v v12, v8, v0.t334; ZVFH-NEXT: vfcvt.f.x.v v12, v12, v0.t335; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, mu336; ZVFH-NEXT: vfsgnj.vv v8, v12, v8, v0.t337; ZVFH-NEXT: fsflags a0338; ZVFH-NEXT: ret339;340; ZVFHMIN-LABEL: nearbyint_nxv16f16:341; ZVFHMIN: # %bb.0:342; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma343; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8344; ZVFHMIN-NEXT: lui a0, 307200345; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma346; ZVFHMIN-NEXT: vfabs.v v8, v16347; ZVFHMIN-NEXT: fmv.w.x fa5, a0348; ZVFHMIN-NEXT: vmflt.vf v0, v8, fa5349; ZVFHMIN-NEXT: frflags a0350; ZVFHMIN-NEXT: vfcvt.x.f.v v8, v16, v0.t351; ZVFHMIN-NEXT: vfcvt.f.x.v v8, v8, v0.t352; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, mu353; ZVFHMIN-NEXT: vfsgnj.vv v16, v8, v16, v0.t354; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma355; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16356; ZVFHMIN-NEXT: fsflags a0357; ZVFHMIN-NEXT: ret358 %a = call <vscale x 16 x half> @llvm.nearbyint.nxv16f16(<vscale x 16 x half> %x)359 ret <vscale x 16 x half> %a360}361 362define <vscale x 32 x half> @nearbyint_nxv32f16(<vscale x 32 x half> %x) {363; ZVFH-LABEL: nearbyint_nxv32f16:364; ZVFH: # %bb.0:365; ZVFH-NEXT: vsetvli a0, zero, e16, m8, ta, ma366; ZVFH-NEXT: vfabs.v v16, v8367; ZVFH-NEXT: li a0, 25368; ZVFH-NEXT: slli a0, a0, 10369; ZVFH-NEXT: fmv.h.x fa5, a0370; ZVFH-NEXT: vmflt.vf v0, v16, fa5371; ZVFH-NEXT: frflags a0372; ZVFH-NEXT: vfcvt.x.f.v v16, v8, v0.t373; ZVFH-NEXT: vfcvt.f.x.v v16, v16, v0.t374; ZVFH-NEXT: vsetvli zero, zero, e16, m8, ta, mu375; ZVFH-NEXT: vfsgnj.vv v8, v16, v8, v0.t376; ZVFH-NEXT: fsflags a0377; ZVFH-NEXT: ret378;379; ZVFHMIN-LABEL: nearbyint_nxv32f16:380; ZVFHMIN: # %bb.0:381; ZVFHMIN-NEXT: vsetvli a0, zero, e16, m4, ta, ma382; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8383; ZVFHMIN-NEXT: lui a0, 307200384; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma385; ZVFHMIN-NEXT: vfabs.v v24, v16386; ZVFHMIN-NEXT: fmv.w.x fa5, a0387; ZVFHMIN-NEXT: vmflt.vf v0, v24, fa5388; ZVFHMIN-NEXT: frflags a0389; ZVFHMIN-NEXT: vfcvt.x.f.v v24, v16, v0.t390; ZVFHMIN-NEXT: vfcvt.f.x.v v24, v24, v0.t391; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, mu392; ZVFHMIN-NEXT: vfsgnj.vv v16, v24, v16, v0.t393; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma394; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12395; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma396; ZVFHMIN-NEXT: vfabs.v v8, v24397; ZVFHMIN-NEXT: vmflt.vf v0, v8, fa5398; ZVFHMIN-NEXT: fsflags a0399; ZVFHMIN-NEXT: frflags a0400; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma401; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16402; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma403; ZVFHMIN-NEXT: vfcvt.x.f.v v16, v24, v0.t404; ZVFHMIN-NEXT: vfcvt.f.x.v v16, v16, v0.t405; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, mu406; ZVFHMIN-NEXT: vfsgnj.vv v24, v16, v24, v0.t407; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma408; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v24409; ZVFHMIN-NEXT: fsflags a0410; ZVFHMIN-NEXT: ret411 %a = call <vscale x 32 x half> @llvm.nearbyint.nxv32f16(<vscale x 32 x half> %x)412 ret <vscale x 32 x half> %a413}414 415define <vscale x 1 x float> @nearbyint_nxv1f32(<vscale x 1 x float> %x) {416; CHECK-LABEL: nearbyint_nxv1f32:417; CHECK: # %bb.0:418; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma419; CHECK-NEXT: vfabs.v v9, v8420; CHECK-NEXT: lui a0, 307200421; CHECK-NEXT: fmv.w.x fa5, a0422; CHECK-NEXT: vmflt.vf v0, v9, fa5423; CHECK-NEXT: frflags a0424; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t425; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t426; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu427; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t428; CHECK-NEXT: fsflags a0429; CHECK-NEXT: ret430 %a = call <vscale x 1 x float> @llvm.nearbyint.nxv1f32(<vscale x 1 x float> %x)431 ret <vscale x 1 x float> %a432}433 434define <vscale x 2 x float> @nearbyint_nxv2f32(<vscale x 2 x float> %x) {435; CHECK-LABEL: nearbyint_nxv2f32:436; CHECK: # %bb.0:437; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma438; CHECK-NEXT: vfabs.v v9, v8439; CHECK-NEXT: lui a0, 307200440; CHECK-NEXT: fmv.w.x fa5, a0441; CHECK-NEXT: vmflt.vf v0, v9, fa5442; CHECK-NEXT: frflags a0443; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t444; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t445; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu446; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t447; CHECK-NEXT: fsflags a0448; CHECK-NEXT: ret449 %a = call <vscale x 2 x float> @llvm.nearbyint.nxv2f32(<vscale x 2 x float> %x)450 ret <vscale x 2 x float> %a451}452 453define <vscale x 4 x float> @nearbyint_nxv4f32(<vscale x 4 x float> %x) {454; CHECK-LABEL: nearbyint_nxv4f32:455; CHECK: # %bb.0:456; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma457; CHECK-NEXT: vfabs.v v10, v8458; CHECK-NEXT: lui a0, 307200459; CHECK-NEXT: fmv.w.x fa5, a0460; CHECK-NEXT: vmflt.vf v0, v10, fa5461; CHECK-NEXT: frflags a0462; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t463; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t464; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu465; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t466; CHECK-NEXT: fsflags a0467; CHECK-NEXT: ret468 %a = call <vscale x 4 x float> @llvm.nearbyint.nxv4f32(<vscale x 4 x float> %x)469 ret <vscale x 4 x float> %a470}471 472define <vscale x 8 x float> @nearbyint_nxv8f32(<vscale x 8 x float> %x) {473; CHECK-LABEL: nearbyint_nxv8f32:474; CHECK: # %bb.0:475; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma476; CHECK-NEXT: vfabs.v v12, v8477; CHECK-NEXT: lui a0, 307200478; CHECK-NEXT: fmv.w.x fa5, a0479; CHECK-NEXT: vmflt.vf v0, v12, fa5480; CHECK-NEXT: frflags a0481; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t482; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t483; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu484; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t485; CHECK-NEXT: fsflags a0486; CHECK-NEXT: ret487 %a = call <vscale x 8 x float> @llvm.nearbyint.nxv8f32(<vscale x 8 x float> %x)488 ret <vscale x 8 x float> %a489}490 491define <vscale x 16 x float> @nearbyint_nxv16f32(<vscale x 16 x float> %x) {492; CHECK-LABEL: nearbyint_nxv16f32:493; CHECK: # %bb.0:494; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma495; CHECK-NEXT: vfabs.v v16, v8496; CHECK-NEXT: lui a0, 307200497; CHECK-NEXT: fmv.w.x fa5, a0498; CHECK-NEXT: vmflt.vf v0, v16, fa5499; CHECK-NEXT: frflags a0500; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t501; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t502; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, mu503; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t504; CHECK-NEXT: fsflags a0505; CHECK-NEXT: ret506 %a = call <vscale x 16 x float> @llvm.nearbyint.nxv16f32(<vscale x 16 x float> %x)507 ret <vscale x 16 x float> %a508}509 510define <vscale x 1 x double> @nearbyint_nxv1f64(<vscale x 1 x double> %x) {511; RV32ZVFH-LABEL: nearbyint_nxv1f64:512; RV32ZVFH: # %bb.0:513; RV32ZVFH-NEXT: lui a0, %hi(.LCPI17_0)514; RV32ZVFH-NEXT: fld fa5, %lo(.LCPI17_0)(a0)515; RV32ZVFH-NEXT: vsetvli a0, zero, e64, m1, ta, ma516; RV32ZVFH-NEXT: vfabs.v v9, v8517; RV32ZVFH-NEXT: vmflt.vf v0, v9, fa5518; RV32ZVFH-NEXT: frflags a0519; RV32ZVFH-NEXT: vfcvt.x.f.v v9, v8, v0.t520; RV32ZVFH-NEXT: vfcvt.f.x.v v9, v9, v0.t521; RV32ZVFH-NEXT: vsetvli zero, zero, e64, m1, ta, mu522; RV32ZVFH-NEXT: vfsgnj.vv v8, v9, v8, v0.t523; RV32ZVFH-NEXT: fsflags a0524; RV32ZVFH-NEXT: ret525;526; RV64ZVFH-LABEL: nearbyint_nxv1f64:527; RV64ZVFH: # %bb.0:528; RV64ZVFH-NEXT: vsetvli a0, zero, e64, m1, ta, ma529; RV64ZVFH-NEXT: vfabs.v v9, v8530; RV64ZVFH-NEXT: li a0, 1075531; RV64ZVFH-NEXT: slli a0, a0, 52532; RV64ZVFH-NEXT: fmv.d.x fa5, a0533; RV64ZVFH-NEXT: vmflt.vf v0, v9, fa5534; RV64ZVFH-NEXT: frflags a0535; RV64ZVFH-NEXT: vfcvt.x.f.v v9, v8, v0.t536; RV64ZVFH-NEXT: vfcvt.f.x.v v9, v9, v0.t537; RV64ZVFH-NEXT: vsetvli zero, zero, e64, m1, ta, mu538; RV64ZVFH-NEXT: vfsgnj.vv v8, v9, v8, v0.t539; RV64ZVFH-NEXT: fsflags a0540; RV64ZVFH-NEXT: ret541;542; RV32ZVFHMIN-LABEL: nearbyint_nxv1f64:543; RV32ZVFHMIN: # %bb.0:544; RV32ZVFHMIN-NEXT: lui a0, %hi(.LCPI17_0)545; RV32ZVFHMIN-NEXT: fld fa5, %lo(.LCPI17_0)(a0)546; RV32ZVFHMIN-NEXT: vsetvli a0, zero, e64, m1, ta, ma547; RV32ZVFHMIN-NEXT: vfabs.v v9, v8548; RV32ZVFHMIN-NEXT: vmflt.vf v0, v9, fa5549; RV32ZVFHMIN-NEXT: frflags a0550; RV32ZVFHMIN-NEXT: vfcvt.x.f.v v9, v8, v0.t551; RV32ZVFHMIN-NEXT: vfcvt.f.x.v v9, v9, v0.t552; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e64, m1, ta, mu553; RV32ZVFHMIN-NEXT: vfsgnj.vv v8, v9, v8, v0.t554; RV32ZVFHMIN-NEXT: fsflags a0555; RV32ZVFHMIN-NEXT: ret556;557; RV64ZVFHMIN-LABEL: nearbyint_nxv1f64:558; RV64ZVFHMIN: # %bb.0:559; RV64ZVFHMIN-NEXT: vsetvli a0, zero, e64, m1, ta, ma560; RV64ZVFHMIN-NEXT: vfabs.v v9, v8561; RV64ZVFHMIN-NEXT: li a0, 1075562; RV64ZVFHMIN-NEXT: slli a0, a0, 52563; RV64ZVFHMIN-NEXT: fmv.d.x fa5, a0564; RV64ZVFHMIN-NEXT: vmflt.vf v0, v9, fa5565; RV64ZVFHMIN-NEXT: frflags a0566; RV64ZVFHMIN-NEXT: vfcvt.x.f.v v9, v8, v0.t567; RV64ZVFHMIN-NEXT: vfcvt.f.x.v v9, v9, v0.t568; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e64, m1, ta, mu569; RV64ZVFHMIN-NEXT: vfsgnj.vv v8, v9, v8, v0.t570; RV64ZVFHMIN-NEXT: fsflags a0571; RV64ZVFHMIN-NEXT: ret572 %a = call <vscale x 1 x double> @llvm.nearbyint.nxv1f64(<vscale x 1 x double> %x)573 ret <vscale x 1 x double> %a574}575 576define <vscale x 2 x double> @nearbyint_nxv2f64(<vscale x 2 x double> %x) {577; RV32ZVFH-LABEL: nearbyint_nxv2f64:578; RV32ZVFH: # %bb.0:579; RV32ZVFH-NEXT: lui a0, %hi(.LCPI18_0)580; RV32ZVFH-NEXT: fld fa5, %lo(.LCPI18_0)(a0)581; RV32ZVFH-NEXT: vsetvli a0, zero, e64, m2, ta, ma582; RV32ZVFH-NEXT: vfabs.v v10, v8583; RV32ZVFH-NEXT: vmflt.vf v0, v10, fa5584; RV32ZVFH-NEXT: frflags a0585; RV32ZVFH-NEXT: vfcvt.x.f.v v10, v8, v0.t586; RV32ZVFH-NEXT: vfcvt.f.x.v v10, v10, v0.t587; RV32ZVFH-NEXT: vsetvli zero, zero, e64, m2, ta, mu588; RV32ZVFH-NEXT: vfsgnj.vv v8, v10, v8, v0.t589; RV32ZVFH-NEXT: fsflags a0590; RV32ZVFH-NEXT: ret591;592; RV64ZVFH-LABEL: nearbyint_nxv2f64:593; RV64ZVFH: # %bb.0:594; RV64ZVFH-NEXT: vsetvli a0, zero, e64, m2, ta, ma595; RV64ZVFH-NEXT: vfabs.v v10, v8596; RV64ZVFH-NEXT: li a0, 1075597; RV64ZVFH-NEXT: slli a0, a0, 52598; RV64ZVFH-NEXT: fmv.d.x fa5, a0599; RV64ZVFH-NEXT: vmflt.vf v0, v10, fa5600; RV64ZVFH-NEXT: frflags a0601; RV64ZVFH-NEXT: vfcvt.x.f.v v10, v8, v0.t602; RV64ZVFH-NEXT: vfcvt.f.x.v v10, v10, v0.t603; RV64ZVFH-NEXT: vsetvli zero, zero, e64, m2, ta, mu604; RV64ZVFH-NEXT: vfsgnj.vv v8, v10, v8, v0.t605; RV64ZVFH-NEXT: fsflags a0606; RV64ZVFH-NEXT: ret607;608; RV32ZVFHMIN-LABEL: nearbyint_nxv2f64:609; RV32ZVFHMIN: # %bb.0:610; RV32ZVFHMIN-NEXT: lui a0, %hi(.LCPI18_0)611; RV32ZVFHMIN-NEXT: fld fa5, %lo(.LCPI18_0)(a0)612; RV32ZVFHMIN-NEXT: vsetvli a0, zero, e64, m2, ta, ma613; RV32ZVFHMIN-NEXT: vfabs.v v10, v8614; RV32ZVFHMIN-NEXT: vmflt.vf v0, v10, fa5615; RV32ZVFHMIN-NEXT: frflags a0616; RV32ZVFHMIN-NEXT: vfcvt.x.f.v v10, v8, v0.t617; RV32ZVFHMIN-NEXT: vfcvt.f.x.v v10, v10, v0.t618; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e64, m2, ta, mu619; RV32ZVFHMIN-NEXT: vfsgnj.vv v8, v10, v8, v0.t620; RV32ZVFHMIN-NEXT: fsflags a0621; RV32ZVFHMIN-NEXT: ret622;623; RV64ZVFHMIN-LABEL: nearbyint_nxv2f64:624; RV64ZVFHMIN: # %bb.0:625; RV64ZVFHMIN-NEXT: vsetvli a0, zero, e64, m2, ta, ma626; RV64ZVFHMIN-NEXT: vfabs.v v10, v8627; RV64ZVFHMIN-NEXT: li a0, 1075628; RV64ZVFHMIN-NEXT: slli a0, a0, 52629; RV64ZVFHMIN-NEXT: fmv.d.x fa5, a0630; RV64ZVFHMIN-NEXT: vmflt.vf v0, v10, fa5631; RV64ZVFHMIN-NEXT: frflags a0632; RV64ZVFHMIN-NEXT: vfcvt.x.f.v v10, v8, v0.t633; RV64ZVFHMIN-NEXT: vfcvt.f.x.v v10, v10, v0.t634; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e64, m2, ta, mu635; RV64ZVFHMIN-NEXT: vfsgnj.vv v8, v10, v8, v0.t636; RV64ZVFHMIN-NEXT: fsflags a0637; RV64ZVFHMIN-NEXT: ret638 %a = call <vscale x 2 x double> @llvm.nearbyint.nxv2f64(<vscale x 2 x double> %x)639 ret <vscale x 2 x double> %a640}641 642define <vscale x 4 x double> @nearbyint_nxv4f64(<vscale x 4 x double> %x) {643; RV32ZVFH-LABEL: nearbyint_nxv4f64:644; RV32ZVFH: # %bb.0:645; RV32ZVFH-NEXT: lui a0, %hi(.LCPI19_0)646; RV32ZVFH-NEXT: fld fa5, %lo(.LCPI19_0)(a0)647; RV32ZVFH-NEXT: vsetvli a0, zero, e64, m4, ta, ma648; RV32ZVFH-NEXT: vfabs.v v12, v8649; RV32ZVFH-NEXT: vmflt.vf v0, v12, fa5650; RV32ZVFH-NEXT: frflags a0651; RV32ZVFH-NEXT: vfcvt.x.f.v v12, v8, v0.t652; RV32ZVFH-NEXT: vfcvt.f.x.v v12, v12, v0.t653; RV32ZVFH-NEXT: vsetvli zero, zero, e64, m4, ta, mu654; RV32ZVFH-NEXT: vfsgnj.vv v8, v12, v8, v0.t655; RV32ZVFH-NEXT: fsflags a0656; RV32ZVFH-NEXT: ret657;658; RV64ZVFH-LABEL: nearbyint_nxv4f64:659; RV64ZVFH: # %bb.0:660; RV64ZVFH-NEXT: vsetvli a0, zero, e64, m4, ta, ma661; RV64ZVFH-NEXT: vfabs.v v12, v8662; RV64ZVFH-NEXT: li a0, 1075663; RV64ZVFH-NEXT: slli a0, a0, 52664; RV64ZVFH-NEXT: fmv.d.x fa5, a0665; RV64ZVFH-NEXT: vmflt.vf v0, v12, fa5666; RV64ZVFH-NEXT: frflags a0667; RV64ZVFH-NEXT: vfcvt.x.f.v v12, v8, v0.t668; RV64ZVFH-NEXT: vfcvt.f.x.v v12, v12, v0.t669; RV64ZVFH-NEXT: vsetvli zero, zero, e64, m4, ta, mu670; RV64ZVFH-NEXT: vfsgnj.vv v8, v12, v8, v0.t671; RV64ZVFH-NEXT: fsflags a0672; RV64ZVFH-NEXT: ret673;674; RV32ZVFHMIN-LABEL: nearbyint_nxv4f64:675; RV32ZVFHMIN: # %bb.0:676; RV32ZVFHMIN-NEXT: lui a0, %hi(.LCPI19_0)677; RV32ZVFHMIN-NEXT: fld fa5, %lo(.LCPI19_0)(a0)678; RV32ZVFHMIN-NEXT: vsetvli a0, zero, e64, m4, ta, ma679; RV32ZVFHMIN-NEXT: vfabs.v v12, v8680; RV32ZVFHMIN-NEXT: vmflt.vf v0, v12, fa5681; RV32ZVFHMIN-NEXT: frflags a0682; RV32ZVFHMIN-NEXT: vfcvt.x.f.v v12, v8, v0.t683; RV32ZVFHMIN-NEXT: vfcvt.f.x.v v12, v12, v0.t684; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e64, m4, ta, mu685; RV32ZVFHMIN-NEXT: vfsgnj.vv v8, v12, v8, v0.t686; RV32ZVFHMIN-NEXT: fsflags a0687; RV32ZVFHMIN-NEXT: ret688;689; RV64ZVFHMIN-LABEL: nearbyint_nxv4f64:690; RV64ZVFHMIN: # %bb.0:691; RV64ZVFHMIN-NEXT: vsetvli a0, zero, e64, m4, ta, ma692; RV64ZVFHMIN-NEXT: vfabs.v v12, v8693; RV64ZVFHMIN-NEXT: li a0, 1075694; RV64ZVFHMIN-NEXT: slli a0, a0, 52695; RV64ZVFHMIN-NEXT: fmv.d.x fa5, a0696; RV64ZVFHMIN-NEXT: vmflt.vf v0, v12, fa5697; RV64ZVFHMIN-NEXT: frflags a0698; RV64ZVFHMIN-NEXT: vfcvt.x.f.v v12, v8, v0.t699; RV64ZVFHMIN-NEXT: vfcvt.f.x.v v12, v12, v0.t700; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e64, m4, ta, mu701; RV64ZVFHMIN-NEXT: vfsgnj.vv v8, v12, v8, v0.t702; RV64ZVFHMIN-NEXT: fsflags a0703; RV64ZVFHMIN-NEXT: ret704 %a = call <vscale x 4 x double> @llvm.nearbyint.nxv4f64(<vscale x 4 x double> %x)705 ret <vscale x 4 x double> %a706}707 708define <vscale x 8 x double> @nearbyint_nxv8f64(<vscale x 8 x double> %x) {709; RV32ZVFH-LABEL: nearbyint_nxv8f64:710; RV32ZVFH: # %bb.0:711; RV32ZVFH-NEXT: lui a0, %hi(.LCPI20_0)712; RV32ZVFH-NEXT: fld fa5, %lo(.LCPI20_0)(a0)713; RV32ZVFH-NEXT: vsetvli a0, zero, e64, m8, ta, ma714; RV32ZVFH-NEXT: vfabs.v v16, v8715; RV32ZVFH-NEXT: vmflt.vf v0, v16, fa5716; RV32ZVFH-NEXT: frflags a0717; RV32ZVFH-NEXT: vfcvt.x.f.v v16, v8, v0.t718; RV32ZVFH-NEXT: vfcvt.f.x.v v16, v16, v0.t719; RV32ZVFH-NEXT: vsetvli zero, zero, e64, m8, ta, mu720; RV32ZVFH-NEXT: vfsgnj.vv v8, v16, v8, v0.t721; RV32ZVFH-NEXT: fsflags a0722; RV32ZVFH-NEXT: ret723;724; RV64ZVFH-LABEL: nearbyint_nxv8f64:725; RV64ZVFH: # %bb.0:726; RV64ZVFH-NEXT: vsetvli a0, zero, e64, m8, ta, ma727; RV64ZVFH-NEXT: vfabs.v v16, v8728; RV64ZVFH-NEXT: li a0, 1075729; RV64ZVFH-NEXT: slli a0, a0, 52730; RV64ZVFH-NEXT: fmv.d.x fa5, a0731; RV64ZVFH-NEXT: vmflt.vf v0, v16, fa5732; RV64ZVFH-NEXT: frflags a0733; RV64ZVFH-NEXT: vfcvt.x.f.v v16, v8, v0.t734; RV64ZVFH-NEXT: vfcvt.f.x.v v16, v16, v0.t735; RV64ZVFH-NEXT: vsetvli zero, zero, e64, m8, ta, mu736; RV64ZVFH-NEXT: vfsgnj.vv v8, v16, v8, v0.t737; RV64ZVFH-NEXT: fsflags a0738; RV64ZVFH-NEXT: ret739;740; RV32ZVFHMIN-LABEL: nearbyint_nxv8f64:741; RV32ZVFHMIN: # %bb.0:742; RV32ZVFHMIN-NEXT: lui a0, %hi(.LCPI20_0)743; RV32ZVFHMIN-NEXT: fld fa5, %lo(.LCPI20_0)(a0)744; RV32ZVFHMIN-NEXT: vsetvli a0, zero, e64, m8, ta, ma745; RV32ZVFHMIN-NEXT: vfabs.v v16, v8746; RV32ZVFHMIN-NEXT: vmflt.vf v0, v16, fa5747; RV32ZVFHMIN-NEXT: frflags a0748; RV32ZVFHMIN-NEXT: vfcvt.x.f.v v16, v8, v0.t749; RV32ZVFHMIN-NEXT: vfcvt.f.x.v v16, v16, v0.t750; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e64, m8, ta, mu751; RV32ZVFHMIN-NEXT: vfsgnj.vv v8, v16, v8, v0.t752; RV32ZVFHMIN-NEXT: fsflags a0753; RV32ZVFHMIN-NEXT: ret754;755; RV64ZVFHMIN-LABEL: nearbyint_nxv8f64:756; RV64ZVFHMIN: # %bb.0:757; RV64ZVFHMIN-NEXT: vsetvli a0, zero, e64, m8, ta, ma758; RV64ZVFHMIN-NEXT: vfabs.v v16, v8759; RV64ZVFHMIN-NEXT: li a0, 1075760; RV64ZVFHMIN-NEXT: slli a0, a0, 52761; RV64ZVFHMIN-NEXT: fmv.d.x fa5, a0762; RV64ZVFHMIN-NEXT: vmflt.vf v0, v16, fa5763; RV64ZVFHMIN-NEXT: frflags a0764; RV64ZVFHMIN-NEXT: vfcvt.x.f.v v16, v8, v0.t765; RV64ZVFHMIN-NEXT: vfcvt.f.x.v v16, v16, v0.t766; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e64, m8, ta, mu767; RV64ZVFHMIN-NEXT: vfsgnj.vv v8, v16, v8, v0.t768; RV64ZVFHMIN-NEXT: fsflags a0769; RV64ZVFHMIN-NEXT: ret770 %a = call <vscale x 8 x double> @llvm.nearbyint.nxv8f64(<vscale x 8 x double> %x)771 ret <vscale x 8 x double> %a772}773