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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+v -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s3 4; (fadd (fmul x, y), z)) -> (fma x, y, z)5define <vscale x 1 x double> @fma(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 zeroext %vl) {6; CHECK-LABEL: fma:7; CHECK: # %bb.0:8; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma9; CHECK-NEXT: vfmadd.vv v9, v8, v10, v0.t10; CHECK-NEXT: vmv.v.v v8, v911; CHECK-NEXT: ret12 %1 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x i1> %m, i32 %vl)13 %2 = call fast <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %1, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 %vl)14 ret <vscale x 1 x double> %215}16 17; (fadd z, (fmul x, y))) -> (fma x, y, z)18define <vscale x 1 x double> @fma_commute(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 zeroext %vl) {19; CHECK-LABEL: fma_commute:20; CHECK: # %bb.0:21; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma22; CHECK-NEXT: vfmadd.vv v9, v8, v10, v0.t23; CHECK-NEXT: vmv.v.v v8, v924; CHECK-NEXT: ret25 %1 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x i1> %m, i32 %vl)26 %2 = call fast <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %z, <vscale x 1 x double> %1, <vscale x 1 x i1> %m, i32 %vl)27 ret <vscale x 1 x double> %228}29 30; Test operand with true mask31define <vscale x 1 x double> @fma_true(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 zeroext %vl) {32; CHECK-LABEL: fma_true:33; CHECK: # %bb.0:34; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma35; CHECK-NEXT: vfmadd.vv v9, v8, v10, v0.t36; CHECK-NEXT: vmv.v.v v8, v937; CHECK-NEXT: ret38 %1 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x i1> splat (i1 true), i32 %vl)39 %2 = call fast <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %1, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 %vl)40 ret <vscale x 1 x double> %241}42 43; Test operand with normal opcode.44define <vscale x 1 x double> @fma_nonvp(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 zeroext %vl) {45; CHECK-LABEL: fma_nonvp:46; CHECK: # %bb.0:47; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma48; CHECK-NEXT: vfmadd.vv v9, v8, v10, v0.t49; CHECK-NEXT: vmv.v.v v8, v950; CHECK-NEXT: ret51 %1 = fmul fast <vscale x 1 x double> %x, %y52 %2 = call fast <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %1, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 %vl)53 ret <vscale x 1 x double> %254}55 56define <vscale x 1 x double> @fma_reassociate(<vscale x 1 x double> %a, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x double> %d, <vscale x 1 x double> %e, <vscale x 1 x i1> %m, i32 zeroext %vl) {57; CHECK-LABEL: fma_reassociate:58; CHECK: # %bb.0:59; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma60; CHECK-NEXT: vfmadd.vv v11, v10, v12, v0.t61; CHECK-NEXT: vfmadd.vv v9, v8, v11, v0.t62; CHECK-NEXT: vmv.v.v v8, v963; CHECK-NEXT: ret64 %1 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %vl)65 %2 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x double> %d, <vscale x 1 x i1> %m, i32 %vl)66 %3 = call fast <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %1, <vscale x 1 x double> %2, <vscale x 1 x i1> %m, i32 %vl)67 %4 = call fast <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %3, <vscale x 1 x double> %e, <vscale x 1 x i1> %m, i32 %vl)68 ret <vscale x 1 x double> %469}70