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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs -target-abi=lp64d < %s | FileCheck %s3; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs -target-abi=lp64d \4; RUN: -riscv-disable-frm-insert-opt < %s | FileCheck %s --check-prefix=UNOPT5 6; Test only save/restore frm once.7define <vscale x 1 x float> @test(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {8; CHECK-LABEL: test:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: fsrmi a1, 011; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12; CHECK-NEXT: vfadd.vv v8, v8, v913; CHECK-NEXT: vfadd.vv v8, v8, v814; CHECK-NEXT: fsrm a115; CHECK-NEXT: ret16;17; UNOPT-LABEL: test:18; UNOPT: # %bb.0: # %entry19; UNOPT-NEXT: fsrmi a1, 020; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma21; UNOPT-NEXT: vfadd.vv v8, v8, v922; UNOPT-NEXT: fsrm a123; UNOPT-NEXT: fsrmi a0, 024; UNOPT-NEXT: vfadd.vv v8, v8, v825; UNOPT-NEXT: fsrm a026; UNOPT-NEXT: ret27entry:28 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(29 <vscale x 1 x float> poison,30 <vscale x 1 x float> %0,31 <vscale x 1 x float> %1,32 i64 0, i64 %2)33 %b = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(34 <vscale x 1 x float> poison,35 <vscale x 1 x float> %a,36 <vscale x 1 x float> %a,37 i64 0, i64 %2)38 ret <vscale x 1 x float> %b39}40 41; Test only restore frm once.42define <vscale x 1 x float> @test2(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {43; CHECK-LABEL: test2:44; CHECK: # %bb.0: # %entry45; CHECK-NEXT: fsrmi a1, 046; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma47; CHECK-NEXT: vfadd.vv v8, v8, v948; CHECK-NEXT: fsrmi 149; CHECK-NEXT: vfadd.vv v8, v8, v850; CHECK-NEXT: fsrm a151; CHECK-NEXT: ret52;53; UNOPT-LABEL: test2:54; UNOPT: # %bb.0: # %entry55; UNOPT-NEXT: fsrmi a1, 056; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma57; UNOPT-NEXT: vfadd.vv v8, v8, v958; UNOPT-NEXT: fsrm a159; UNOPT-NEXT: fsrmi a0, 160; UNOPT-NEXT: vfadd.vv v8, v8, v861; UNOPT-NEXT: fsrm a062; UNOPT-NEXT: ret63entry:64 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(65 <vscale x 1 x float> poison,66 <vscale x 1 x float> %0,67 <vscale x 1 x float> %1,68 i64 0, i64 %2)69 %b = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(70 <vscale x 1 x float> poison,71 <vscale x 1 x float> %a,72 <vscale x 1 x float> %a,73 i64 1, i64 %2)74 ret <vscale x 1 x float> %b75}76 77declare void @foo()78define <vscale x 1 x float> @just_call(<vscale x 1 x float> %0) nounwind {79; CHECK-LABEL: just_call:80; CHECK: # %bb.0: # %entry81; CHECK-NEXT: addi sp, sp, -4882; CHECK-NEXT: sd ra, 40(sp) # 8-byte Folded Spill83; CHECK-NEXT: csrr a0, vlenb84; CHECK-NEXT: sub sp, sp, a085; CHECK-NEXT: addi a0, sp, 3286; CHECK-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill87; CHECK-NEXT: call foo88; CHECK-NEXT: addi a0, sp, 3289; CHECK-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload90; CHECK-NEXT: csrr a0, vlenb91; CHECK-NEXT: add sp, sp, a092; CHECK-NEXT: ld ra, 40(sp) # 8-byte Folded Reload93; CHECK-NEXT: addi sp, sp, 4894; CHECK-NEXT: ret95;96; UNOPT-LABEL: just_call:97; UNOPT: # %bb.0: # %entry98; UNOPT-NEXT: addi sp, sp, -4899; UNOPT-NEXT: sd ra, 40(sp) # 8-byte Folded Spill100; UNOPT-NEXT: csrr a0, vlenb101; UNOPT-NEXT: sub sp, sp, a0102; UNOPT-NEXT: addi a0, sp, 32103; UNOPT-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill104; UNOPT-NEXT: call foo105; UNOPT-NEXT: addi a0, sp, 32106; UNOPT-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload107; UNOPT-NEXT: csrr a0, vlenb108; UNOPT-NEXT: add sp, sp, a0109; UNOPT-NEXT: ld ra, 40(sp) # 8-byte Folded Reload110; UNOPT-NEXT: addi sp, sp, 48111; UNOPT-NEXT: ret112entry:113 call void @foo()114 ret <vscale x 1 x float> %0115}116 117define <vscale x 1 x float> @before_call1(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {118; CHECK-LABEL: before_call1:119; CHECK: # %bb.0: # %entry120; CHECK-NEXT: addi sp, sp, -48121; CHECK-NEXT: sd ra, 40(sp) # 8-byte Folded Spill122; CHECK-NEXT: csrr a1, vlenb123; CHECK-NEXT: sub sp, sp, a1124; CHECK-NEXT: fsrmi a1, 0125; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma126; CHECK-NEXT: vfadd.vv v8, v8, v9127; CHECK-NEXT: addi a0, sp, 32128; CHECK-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill129; CHECK-NEXT: fsrm a1130; CHECK-NEXT: call foo131; CHECK-NEXT: addi a0, sp, 32132; CHECK-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload133; CHECK-NEXT: csrr a0, vlenb134; CHECK-NEXT: add sp, sp, a0135; CHECK-NEXT: ld ra, 40(sp) # 8-byte Folded Reload136; CHECK-NEXT: addi sp, sp, 48137; CHECK-NEXT: ret138;139; UNOPT-LABEL: before_call1:140; UNOPT: # %bb.0: # %entry141; UNOPT-NEXT: addi sp, sp, -48142; UNOPT-NEXT: sd ra, 40(sp) # 8-byte Folded Spill143; UNOPT-NEXT: csrr a1, vlenb144; UNOPT-NEXT: sub sp, sp, a1145; UNOPT-NEXT: fsrmi a1, 0146; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma147; UNOPT-NEXT: vfadd.vv v8, v8, v9148; UNOPT-NEXT: addi a0, sp, 32149; UNOPT-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill150; UNOPT-NEXT: fsrm a1151; UNOPT-NEXT: call foo152; UNOPT-NEXT: addi a0, sp, 32153; UNOPT-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload154; UNOPT-NEXT: csrr a0, vlenb155; UNOPT-NEXT: add sp, sp, a0156; UNOPT-NEXT: ld ra, 40(sp) # 8-byte Folded Reload157; UNOPT-NEXT: addi sp, sp, 48158; UNOPT-NEXT: ret159entry:160 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(161 <vscale x 1 x float> poison,162 <vscale x 1 x float> %0,163 <vscale x 1 x float> %1,164 i64 0, i64 %2)165 call void @foo()166 ret <vscale x 1 x float> %a167}168 169define <vscale x 1 x float> @before_call2(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {170; CHECK-LABEL: before_call2:171; CHECK: # %bb.0: # %entry172; CHECK-NEXT: addi sp, sp, -48173; CHECK-NEXT: sd ra, 40(sp) # 8-byte Folded Spill174; CHECK-NEXT: csrr a1, vlenb175; CHECK-NEXT: sub sp, sp, a1176; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma177; CHECK-NEXT: vfadd.vv v8, v8, v9178; CHECK-NEXT: addi a0, sp, 32179; CHECK-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill180; CHECK-NEXT: call foo181; CHECK-NEXT: addi a0, sp, 32182; CHECK-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload183; CHECK-NEXT: csrr a0, vlenb184; CHECK-NEXT: add sp, sp, a0185; CHECK-NEXT: ld ra, 40(sp) # 8-byte Folded Reload186; CHECK-NEXT: addi sp, sp, 48187; CHECK-NEXT: ret188;189; UNOPT-LABEL: before_call2:190; UNOPT: # %bb.0: # %entry191; UNOPT-NEXT: addi sp, sp, -48192; UNOPT-NEXT: sd ra, 40(sp) # 8-byte Folded Spill193; UNOPT-NEXT: csrr a1, vlenb194; UNOPT-NEXT: sub sp, sp, a1195; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma196; UNOPT-NEXT: vfadd.vv v8, v8, v9197; UNOPT-NEXT: addi a0, sp, 32198; UNOPT-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill199; UNOPT-NEXT: call foo200; UNOPT-NEXT: addi a0, sp, 32201; UNOPT-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload202; UNOPT-NEXT: csrr a0, vlenb203; UNOPT-NEXT: add sp, sp, a0204; UNOPT-NEXT: ld ra, 40(sp) # 8-byte Folded Reload205; UNOPT-NEXT: addi sp, sp, 48206; UNOPT-NEXT: ret207entry:208 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(209 <vscale x 1 x float> poison,210 <vscale x 1 x float> %0,211 <vscale x 1 x float> %1,212 i64 7, i64 %2)213 call void @foo()214 ret <vscale x 1 x float> %a215}216 217define <vscale x 1 x float> @after_call1(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {218; CHECK-LABEL: after_call1:219; CHECK: # %bb.0: # %entry220; CHECK-NEXT: addi sp, sp, -48221; CHECK-NEXT: sd ra, 40(sp) # 8-byte Folded Spill222; CHECK-NEXT: csrr a1, vlenb223; CHECK-NEXT: sub sp, sp, a1224; CHECK-NEXT: fsrmi a1, 0225; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma226; CHECK-NEXT: vfadd.vv v8, v8, v9227; CHECK-NEXT: addi a0, sp, 32228; CHECK-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill229; CHECK-NEXT: fsrm a1230; CHECK-NEXT: call foo231; CHECK-NEXT: addi a0, sp, 32232; CHECK-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload233; CHECK-NEXT: csrr a0, vlenb234; CHECK-NEXT: add sp, sp, a0235; CHECK-NEXT: ld ra, 40(sp) # 8-byte Folded Reload236; CHECK-NEXT: addi sp, sp, 48237; CHECK-NEXT: ret238;239; UNOPT-LABEL: after_call1:240; UNOPT: # %bb.0: # %entry241; UNOPT-NEXT: addi sp, sp, -48242; UNOPT-NEXT: sd ra, 40(sp) # 8-byte Folded Spill243; UNOPT-NEXT: csrr a1, vlenb244; UNOPT-NEXT: sub sp, sp, a1245; UNOPT-NEXT: fsrmi a1, 0246; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma247; UNOPT-NEXT: vfadd.vv v8, v8, v9248; UNOPT-NEXT: addi a0, sp, 32249; UNOPT-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill250; UNOPT-NEXT: fsrm a1251; UNOPT-NEXT: call foo252; UNOPT-NEXT: addi a0, sp, 32253; UNOPT-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload254; UNOPT-NEXT: csrr a0, vlenb255; UNOPT-NEXT: add sp, sp, a0256; UNOPT-NEXT: ld ra, 40(sp) # 8-byte Folded Reload257; UNOPT-NEXT: addi sp, sp, 48258; UNOPT-NEXT: ret259entry:260 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(261 <vscale x 1 x float> poison,262 <vscale x 1 x float> %0,263 <vscale x 1 x float> %1,264 i64 0, i64 %2)265 call void @foo()266 ret <vscale x 1 x float> %a267}268 269define <vscale x 1 x float> @after_call2(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {270; CHECK-LABEL: after_call2:271; CHECK: # %bb.0: # %entry272; CHECK-NEXT: addi sp, sp, -48273; CHECK-NEXT: sd ra, 40(sp) # 8-byte Folded Spill274; CHECK-NEXT: csrr a1, vlenb275; CHECK-NEXT: sub sp, sp, a1276; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma277; CHECK-NEXT: vfadd.vv v8, v8, v9278; CHECK-NEXT: addi a0, sp, 32279; CHECK-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill280; CHECK-NEXT: call foo281; CHECK-NEXT: addi a0, sp, 32282; CHECK-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload283; CHECK-NEXT: csrr a0, vlenb284; CHECK-NEXT: add sp, sp, a0285; CHECK-NEXT: ld ra, 40(sp) # 8-byte Folded Reload286; CHECK-NEXT: addi sp, sp, 48287; CHECK-NEXT: ret288;289; UNOPT-LABEL: after_call2:290; UNOPT: # %bb.0: # %entry291; UNOPT-NEXT: addi sp, sp, -48292; UNOPT-NEXT: sd ra, 40(sp) # 8-byte Folded Spill293; UNOPT-NEXT: csrr a1, vlenb294; UNOPT-NEXT: sub sp, sp, a1295; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma296; UNOPT-NEXT: vfadd.vv v8, v8, v9297; UNOPT-NEXT: addi a0, sp, 32298; UNOPT-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill299; UNOPT-NEXT: call foo300; UNOPT-NEXT: addi a0, sp, 32301; UNOPT-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload302; UNOPT-NEXT: csrr a0, vlenb303; UNOPT-NEXT: add sp, sp, a0304; UNOPT-NEXT: ld ra, 40(sp) # 8-byte Folded Reload305; UNOPT-NEXT: addi sp, sp, 48306; UNOPT-NEXT: ret307entry:308 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(309 <vscale x 1 x float> poison,310 <vscale x 1 x float> %0,311 <vscale x 1 x float> %1,312 i64 7, i64 %2)313 call void @foo()314 ret <vscale x 1 x float> %a315}316 317define <vscale x 1 x float> @just_asm(<vscale x 1 x float> %0) nounwind {318; CHECK-LABEL: just_asm:319; CHECK: # %bb.0: # %entry320; CHECK-NEXT: #APP321; CHECK-NEXT: #NO_APP322; CHECK-NEXT: ret323;324; UNOPT-LABEL: just_asm:325; UNOPT: # %bb.0: # %entry326; UNOPT-NEXT: #APP327; UNOPT-NEXT: #NO_APP328; UNOPT-NEXT: ret329entry:330 call void asm sideeffect "", ""()331 ret <vscale x 1 x float> %0332}333 334define <vscale x 1 x float> @before_asm1(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {335; CHECK-LABEL: before_asm1:336; CHECK: # %bb.0: # %entry337; CHECK-NEXT: fsrmi a1, 0338; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma339; CHECK-NEXT: vfadd.vv v8, v8, v9340; CHECK-NEXT: fsrm a1341; CHECK-NEXT: #APP342; CHECK-NEXT: #NO_APP343; CHECK-NEXT: ret344;345; UNOPT-LABEL: before_asm1:346; UNOPT: # %bb.0: # %entry347; UNOPT-NEXT: fsrmi a1, 0348; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma349; UNOPT-NEXT: vfadd.vv v8, v8, v9350; UNOPT-NEXT: fsrm a1351; UNOPT-NEXT: #APP352; UNOPT-NEXT: #NO_APP353; UNOPT-NEXT: ret354entry:355 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(356 <vscale x 1 x float> poison,357 <vscale x 1 x float> %0,358 <vscale x 1 x float> %1,359 i64 0, i64 %2)360 call void asm sideeffect "", ""()361 ret <vscale x 1 x float> %a362}363 364define <vscale x 1 x float> @before_asm2(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {365; CHECK-LABEL: before_asm2:366; CHECK: # %bb.0: # %entry367; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma368; CHECK-NEXT: vfadd.vv v8, v8, v9369; CHECK-NEXT: #APP370; CHECK-NEXT: #NO_APP371; CHECK-NEXT: ret372;373; UNOPT-LABEL: before_asm2:374; UNOPT: # %bb.0: # %entry375; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma376; UNOPT-NEXT: vfadd.vv v8, v8, v9377; UNOPT-NEXT: #APP378; UNOPT-NEXT: #NO_APP379; UNOPT-NEXT: ret380entry:381 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(382 <vscale x 1 x float> poison,383 <vscale x 1 x float> %0,384 <vscale x 1 x float> %1,385 i64 7, i64 %2)386 call void asm sideeffect "", ""()387 ret <vscale x 1 x float> %a388}389 390define <vscale x 1 x float> @after_asm1(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {391; CHECK-LABEL: after_asm1:392; CHECK: # %bb.0: # %entry393; CHECK-NEXT: fsrmi a1, 0394; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma395; CHECK-NEXT: vfadd.vv v8, v8, v9396; CHECK-NEXT: fsrm a1397; CHECK-NEXT: #APP398; CHECK-NEXT: #NO_APP399; CHECK-NEXT: ret400;401; UNOPT-LABEL: after_asm1:402; UNOPT: # %bb.0: # %entry403; UNOPT-NEXT: fsrmi a1, 0404; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma405; UNOPT-NEXT: vfadd.vv v8, v8, v9406; UNOPT-NEXT: fsrm a1407; UNOPT-NEXT: #APP408; UNOPT-NEXT: #NO_APP409; UNOPT-NEXT: ret410entry:411 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(412 <vscale x 1 x float> poison,413 <vscale x 1 x float> %0,414 <vscale x 1 x float> %1,415 i64 0, i64 %2)416 call void asm sideeffect "", ""()417 ret <vscale x 1 x float> %a418}419 420define <vscale x 1 x float> @after_asm2(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {421; CHECK-LABEL: after_asm2:422; CHECK: # %bb.0: # %entry423; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma424; CHECK-NEXT: vfadd.vv v8, v8, v9425; CHECK-NEXT: #APP426; CHECK-NEXT: #NO_APP427; CHECK-NEXT: ret428;429; UNOPT-LABEL: after_asm2:430; UNOPT: # %bb.0: # %entry431; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma432; UNOPT-NEXT: vfadd.vv v8, v8, v9433; UNOPT-NEXT: #APP434; UNOPT-NEXT: #NO_APP435; UNOPT-NEXT: ret436entry:437 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(438 <vscale x 1 x float> poison,439 <vscale x 1 x float> %0,440 <vscale x 1 x float> %1,441 i64 7, i64 %2)442 call void asm sideeffect "", ""()443 ret <vscale x 1 x float> %a444}445 446; Test restoring frm before reading frm and doing nothing with following447; dynamic rounding mode operations.448; TODO: The frrm could be elided.449define <vscale x 1 x float> @test5(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2, ptr %p) nounwind {450; CHECK-LABEL: test5:451; CHECK: # %bb.0: # %entry452; CHECK-NEXT: fsrmi a2, 0453; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma454; CHECK-NEXT: vfadd.vv v8, v8, v9455; CHECK-NEXT: lui a0, 66456; CHECK-NEXT: fsrm a2457; CHECK-NEXT: addi a0, a0, 769458; CHECK-NEXT: frrm a2459; CHECK-NEXT: slli a2, a2, 2460; CHECK-NEXT: srl a0, a0, a2461; CHECK-NEXT: andi a0, a0, 7462; CHECK-NEXT: vfadd.vv v8, v8, v8463; CHECK-NEXT: sw a0, 0(a1)464; CHECK-NEXT: ret465;466; UNOPT-LABEL: test5:467; UNOPT: # %bb.0: # %entry468; UNOPT-NEXT: fsrmi a2, 0469; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma470; UNOPT-NEXT: vfadd.vv v8, v8, v9471; UNOPT-NEXT: lui a0, 66472; UNOPT-NEXT: fsrm a2473; UNOPT-NEXT: addi a0, a0, 769474; UNOPT-NEXT: frrm a2475; UNOPT-NEXT: slli a2, a2, 2476; UNOPT-NEXT: srl a0, a0, a2477; UNOPT-NEXT: andi a0, a0, 7478; UNOPT-NEXT: vfadd.vv v8, v8, v8479; UNOPT-NEXT: sw a0, 0(a1)480; UNOPT-NEXT: ret481entry:482 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(483 <vscale x 1 x float> poison,484 <vscale x 1 x float> %0,485 <vscale x 1 x float> %1,486 i64 0, i64 %2)487 %rm = call i32 @llvm.get.rounding()488 store i32 %rm, ptr %p, align 4489 %b = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(490 <vscale x 1 x float> poison,491 <vscale x 1 x float> %a,492 <vscale x 1 x float> %a,493 i64 7, i64 %2)494 ret <vscale x 1 x float> %b495}496 497; Test not set FRM for vfadd with DYN after WriteFRMImm.498define <vscale x 1 x float> @after_fsrm1(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {499; CHECK-LABEL: after_fsrm1:500; CHECK: # %bb.0: # %entry501; CHECK-NEXT: fsrmi 4502; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma503; CHECK-NEXT: vfadd.vv v8, v8, v9504; CHECK-NEXT: ret505;506; UNOPT-LABEL: after_fsrm1:507; UNOPT: # %bb.0: # %entry508; UNOPT-NEXT: fsrmi 4509; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma510; UNOPT-NEXT: vfadd.vv v8, v8, v9511; UNOPT-NEXT: ret512entry:513 call void @llvm.set.rounding(i32 4)514 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(515 <vscale x 1 x float> poison,516 <vscale x 1 x float> %0,517 <vscale x 1 x float> %1,518 i64 7, i64 %2)519 ret <vscale x 1 x float> %a520}521 522; Test not set FRM for vfadd with a known rm after WriteFRMImm with same rm.523define <vscale x 1 x float> @after_fsrm2(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {524; CHECK-LABEL: after_fsrm2:525; CHECK: # %bb.0: # %entry526; CHECK-NEXT: fsrmi 4527; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma528; CHECK-NEXT: vfadd.vv v8, v8, v9529; CHECK-NEXT: ret530;531; UNOPT-LABEL: after_fsrm2:532; UNOPT: # %bb.0: # %entry533; UNOPT-NEXT: fsrmi 4534; UNOPT-NEXT: fsrmi a1, 4535; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma536; UNOPT-NEXT: vfadd.vv v8, v8, v9537; UNOPT-NEXT: fsrm a1538; UNOPT-NEXT: ret539entry:540 call void @llvm.set.rounding(i32 4)541 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(542 <vscale x 1 x float> poison,543 <vscale x 1 x float> %0,544 <vscale x 1 x float> %1,545 i64 4, i64 %2)546 ret <vscale x 1 x float> %a547}548 549; Test not set FRM for vfadd with a known rm after WriteFRMImm with same rm.550define <vscale x 1 x float> @after_fsrm3(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i64 %2) nounwind {551; CHECK-LABEL: after_fsrm3:552; CHECK: # %bb.0: # %entry553; CHECK-NEXT: fsrmi 4554; CHECK-NEXT: fsrmi a1, 3555; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma556; CHECK-NEXT: vfadd.vv v8, v8, v9557; CHECK-NEXT: fsrm a1558; CHECK-NEXT: ret559;560; UNOPT-LABEL: after_fsrm3:561; UNOPT: # %bb.0: # %entry562; UNOPT-NEXT: fsrmi 4563; UNOPT-NEXT: fsrmi a1, 3564; UNOPT-NEXT: vsetvli zero, a0, e32, mf2, ta, ma565; UNOPT-NEXT: vfadd.vv v8, v8, v9566; UNOPT-NEXT: fsrm a1567; UNOPT-NEXT: ret568entry:569 call void @llvm.set.rounding(i32 4)570 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(571 <vscale x 1 x float> poison,572 <vscale x 1 x float> %0,573 <vscale x 1 x float> %1,574 i64 3, i64 %2)575 ret <vscale x 1 x float> %a576}577 578; Test not set FRM for the vfadd after WriteFRM.579define <vscale x 1 x float> @after_fsrm4(<vscale x 1 x float> %0, <vscale x 1 x float> %1, i32 %rm, i64 %2) nounwind {580; CHECK-LABEL: after_fsrm4:581; CHECK: # %bb.0: # %entry582; CHECK-NEXT: slli a0, a0, 32583; CHECK-NEXT: lui a2, 66584; CHECK-NEXT: srli a0, a0, 30585; CHECK-NEXT: addi a2, a2, 769586; CHECK-NEXT: srl a0, a2, a0587; CHECK-NEXT: andi a0, a0, 7588; CHECK-NEXT: fsrm a0589; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma590; CHECK-NEXT: vfadd.vv v8, v8, v9591; CHECK-NEXT: ret592;593; UNOPT-LABEL: after_fsrm4:594; UNOPT: # %bb.0: # %entry595; UNOPT-NEXT: slli a0, a0, 32596; UNOPT-NEXT: lui a2, 66597; UNOPT-NEXT: srli a0, a0, 30598; UNOPT-NEXT: addi a2, a2, 769599; UNOPT-NEXT: srl a0, a2, a0600; UNOPT-NEXT: andi a0, a0, 7601; UNOPT-NEXT: fsrm a0602; UNOPT-NEXT: vsetvli zero, a1, e32, mf2, ta, ma603; UNOPT-NEXT: vfadd.vv v8, v8, v9604; UNOPT-NEXT: ret605entry:606 call void @llvm.set.rounding(i32 %rm)607 %a = call <vscale x 1 x float> @llvm.riscv.vfadd.nxv1f32.nxv1f32(608 <vscale x 1 x float> poison,609 <vscale x 1 x float> %0,610 <vscale x 1 x float> %1,611 i64 7, i64 %2)612 ret <vscale x 1 x float> %a613}614