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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v -target-abi=ilp32d \3; RUN: -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,RV32 %s4; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v -target-abi=lp64d \5; RUN: -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,RV64 %s6 7; This file tests the code generation for `llvm.experimental.constrained.round.*` on scalable vector type.8 9define <vscale x 1 x half> @round_nxv1f16(<vscale x 1 x half> %x) strictfp {10; CHECK-LABEL: round_nxv1f16:11; CHECK: # %bb.0:12; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, mu13; CHECK-NEXT: vmfne.vv v0, v8, v814; CHECK-NEXT: li a0, 2515; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t16; CHECK-NEXT: slli a0, a0, 1017; CHECK-NEXT: vfabs.v v9, v818; CHECK-NEXT: fmv.h.x fa5, a019; CHECK-NEXT: vmflt.vf v0, v9, fa520; CHECK-NEXT: fsrmi a0, 421; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma22; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t23; CHECK-NEXT: fsrm a024; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t25; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu26; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t27; CHECK-NEXT: ret28 %a = call <vscale x 1 x half> @llvm.experimental.constrained.round.nxv1f16(<vscale x 1 x half> %x, metadata !"fpexcept.strict")29 ret <vscale x 1 x half> %a30}31 32define <vscale x 2 x half> @round_nxv2f16(<vscale x 2 x half> %x) strictfp {33; CHECK-LABEL: round_nxv2f16:34; CHECK: # %bb.0:35; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, mu36; CHECK-NEXT: vmfne.vv v0, v8, v837; CHECK-NEXT: li a0, 2538; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t39; CHECK-NEXT: slli a0, a0, 1040; CHECK-NEXT: vfabs.v v9, v841; CHECK-NEXT: fmv.h.x fa5, a042; CHECK-NEXT: vmflt.vf v0, v9, fa543; CHECK-NEXT: fsrmi a0, 444; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma45; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t46; CHECK-NEXT: fsrm a047; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t48; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu49; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t50; CHECK-NEXT: ret51 %a = call <vscale x 2 x half> @llvm.experimental.constrained.round.nxv2f16(<vscale x 2 x half> %x, metadata !"fpexcept.strict")52 ret <vscale x 2 x half> %a53}54 55define <vscale x 4 x half> @round_nxv4f16(<vscale x 4 x half> %x) strictfp {56; CHECK-LABEL: round_nxv4f16:57; CHECK: # %bb.0:58; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, mu59; CHECK-NEXT: vmfne.vv v0, v8, v860; CHECK-NEXT: li a0, 2561; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t62; CHECK-NEXT: slli a0, a0, 1063; CHECK-NEXT: vfabs.v v9, v864; CHECK-NEXT: fmv.h.x fa5, a065; CHECK-NEXT: vmflt.vf v0, v9, fa566; CHECK-NEXT: fsrmi a0, 467; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma68; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t69; CHECK-NEXT: fsrm a070; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t71; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu72; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t73; CHECK-NEXT: ret74 %a = call <vscale x 4 x half> @llvm.experimental.constrained.round.nxv4f16(<vscale x 4 x half> %x, metadata !"fpexcept.strict")75 ret <vscale x 4 x half> %a76}77 78define <vscale x 8 x half> @round_nxv8f16(<vscale x 8 x half> %x) strictfp {79; CHECK-LABEL: round_nxv8f16:80; CHECK: # %bb.0:81; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, mu82; CHECK-NEXT: vmfne.vv v0, v8, v883; CHECK-NEXT: li a0, 2584; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t85; CHECK-NEXT: slli a0, a0, 1086; CHECK-NEXT: vfabs.v v10, v887; CHECK-NEXT: fmv.h.x fa5, a088; CHECK-NEXT: vmflt.vf v0, v10, fa589; CHECK-NEXT: fsrmi a0, 490; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma91; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t92; CHECK-NEXT: fsrm a093; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t94; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu95; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t96; CHECK-NEXT: ret97 %a = call <vscale x 8 x half> @llvm.experimental.constrained.round.nxv8f16(<vscale x 8 x half> %x, metadata !"fpexcept.strict")98 ret <vscale x 8 x half> %a99}100 101define <vscale x 16 x half> @round_nxv16f16(<vscale x 16 x half> %x) strictfp {102; CHECK-LABEL: round_nxv16f16:103; CHECK: # %bb.0:104; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, mu105; CHECK-NEXT: vmfne.vv v0, v8, v8106; CHECK-NEXT: li a0, 25107; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t108; CHECK-NEXT: slli a0, a0, 10109; CHECK-NEXT: vfabs.v v12, v8110; CHECK-NEXT: fmv.h.x fa5, a0111; CHECK-NEXT: vmflt.vf v0, v12, fa5112; CHECK-NEXT: fsrmi a0, 4113; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma114; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t115; CHECK-NEXT: fsrm a0116; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t117; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu118; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t119; CHECK-NEXT: ret120 %a = call <vscale x 16 x half> @llvm.experimental.constrained.round.nxv16f16(<vscale x 16 x half> %x, metadata !"fpexcept.strict")121 ret <vscale x 16 x half> %a122}123 124define <vscale x 32 x half> @round_nxv32f16(<vscale x 32 x half> %x) strictfp {125; CHECK-LABEL: round_nxv32f16:126; CHECK: # %bb.0:127; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, mu128; CHECK-NEXT: vmfne.vv v0, v8, v8129; CHECK-NEXT: li a0, 25130; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t131; CHECK-NEXT: slli a0, a0, 10132; CHECK-NEXT: vfabs.v v16, v8133; CHECK-NEXT: fmv.h.x fa5, a0134; CHECK-NEXT: vmflt.vf v0, v16, fa5135; CHECK-NEXT: fsrmi a0, 4136; CHECK-NEXT: vsetvli zero, zero, e16, m8, ta, ma137; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t138; CHECK-NEXT: fsrm a0139; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t140; CHECK-NEXT: vsetvli zero, zero, e16, m8, ta, mu141; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t142; CHECK-NEXT: ret143 %a = call <vscale x 32 x half> @llvm.experimental.constrained.round.nxv32f16(<vscale x 32 x half> %x, metadata !"fpexcept.strict")144 ret <vscale x 32 x half> %a145}146 147define <vscale x 1 x float> @round_nxv1f32(<vscale x 1 x float> %x) strictfp {148; CHECK-LABEL: round_nxv1f32:149; CHECK: # %bb.0:150; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, mu151; CHECK-NEXT: vmfne.vv v0, v8, v8152; CHECK-NEXT: lui a0, 307200153; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t154; CHECK-NEXT: fmv.w.x fa5, a0155; CHECK-NEXT: vfabs.v v9, v8156; CHECK-NEXT: vmflt.vf v0, v9, fa5157; CHECK-NEXT: fsrmi a0, 4158; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma159; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t160; CHECK-NEXT: fsrm a0161; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t162; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu163; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t164; CHECK-NEXT: ret165 %a = call <vscale x 1 x float> @llvm.experimental.constrained.round.nxv1f32(<vscale x 1 x float> %x, metadata !"fpexcept.strict")166 ret <vscale x 1 x float> %a167}168 169define <vscale x 2 x float> @round_nxv2f32(<vscale x 2 x float> %x) strictfp {170; CHECK-LABEL: round_nxv2f32:171; CHECK: # %bb.0:172; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, mu173; CHECK-NEXT: vmfne.vv v0, v8, v8174; CHECK-NEXT: lui a0, 307200175; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t176; CHECK-NEXT: fmv.w.x fa5, a0177; CHECK-NEXT: vfabs.v v9, v8178; CHECK-NEXT: vmflt.vf v0, v9, fa5179; CHECK-NEXT: fsrmi a0, 4180; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma181; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t182; CHECK-NEXT: fsrm a0183; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t184; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu185; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t186; CHECK-NEXT: ret187 %a = call <vscale x 2 x float> @llvm.experimental.constrained.round.nxv2f32(<vscale x 2 x float> %x, metadata !"fpexcept.strict")188 ret <vscale x 2 x float> %a189}190 191define <vscale x 4 x float> @round_nxv4f32(<vscale x 4 x float> %x) strictfp {192; CHECK-LABEL: round_nxv4f32:193; CHECK: # %bb.0:194; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, mu195; CHECK-NEXT: vmfne.vv v0, v8, v8196; CHECK-NEXT: lui a0, 307200197; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t198; CHECK-NEXT: fmv.w.x fa5, a0199; CHECK-NEXT: vfabs.v v10, v8200; CHECK-NEXT: vmflt.vf v0, v10, fa5201; CHECK-NEXT: fsrmi a0, 4202; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma203; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t204; CHECK-NEXT: fsrm a0205; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t206; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu207; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t208; CHECK-NEXT: ret209 %a = call <vscale x 4 x float> @llvm.experimental.constrained.round.nxv4f32(<vscale x 4 x float> %x, metadata !"fpexcept.strict")210 ret <vscale x 4 x float> %a211}212 213define <vscale x 8 x float> @round_nxv8f32(<vscale x 8 x float> %x) strictfp {214; CHECK-LABEL: round_nxv8f32:215; CHECK: # %bb.0:216; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, mu217; CHECK-NEXT: vmfne.vv v0, v8, v8218; CHECK-NEXT: lui a0, 307200219; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t220; CHECK-NEXT: fmv.w.x fa5, a0221; CHECK-NEXT: vfabs.v v12, v8222; CHECK-NEXT: vmflt.vf v0, v12, fa5223; CHECK-NEXT: fsrmi a0, 4224; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma225; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t226; CHECK-NEXT: fsrm a0227; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t228; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu229; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t230; CHECK-NEXT: ret231 %a = call <vscale x 8 x float> @llvm.experimental.constrained.round.nxv8f32(<vscale x 8 x float> %x, metadata !"fpexcept.strict")232 ret <vscale x 8 x float> %a233}234 235define <vscale x 16 x float> @round_nxv16f32(<vscale x 16 x float> %x) strictfp {236; CHECK-LABEL: round_nxv16f32:237; CHECK: # %bb.0:238; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, mu239; CHECK-NEXT: vmfne.vv v0, v8, v8240; CHECK-NEXT: lui a0, 307200241; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t242; CHECK-NEXT: fmv.w.x fa5, a0243; CHECK-NEXT: vfabs.v v16, v8244; CHECK-NEXT: vmflt.vf v0, v16, fa5245; CHECK-NEXT: fsrmi a0, 4246; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma247; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t248; CHECK-NEXT: fsrm a0249; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t250; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, mu251; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t252; CHECK-NEXT: ret253 %a = call <vscale x 16 x float> @llvm.experimental.constrained.round.nxv16f32(<vscale x 16 x float> %x, metadata !"fpexcept.strict")254 ret <vscale x 16 x float> %a255}256 257define <vscale x 1 x double> @round_nxv1f64(<vscale x 1 x double> %x) strictfp {258; RV32-LABEL: round_nxv1f64:259; RV32: # %bb.0:260; RV32-NEXT: vsetvli a0, zero, e64, m1, ta, mu261; RV32-NEXT: vmfne.vv v0, v8, v8262; RV32-NEXT: lui a0, %hi(.LCPI11_0)263; RV32-NEXT: fld fa5, %lo(.LCPI11_0)(a0)264; RV32-NEXT: vfadd.vv v8, v8, v8, v0.t265; RV32-NEXT: vfabs.v v9, v8266; RV32-NEXT: vmflt.vf v0, v9, fa5267; RV32-NEXT: fsrmi a0, 4268; RV32-NEXT: vsetvli zero, zero, e64, m1, ta, ma269; RV32-NEXT: vfcvt.x.f.v v9, v8, v0.t270; RV32-NEXT: fsrm a0271; RV32-NEXT: vfcvt.f.x.v v9, v9, v0.t272; RV32-NEXT: vsetvli zero, zero, e64, m1, ta, mu273; RV32-NEXT: vfsgnj.vv v8, v9, v8, v0.t274; RV32-NEXT: ret275;276; RV64-LABEL: round_nxv1f64:277; RV64: # %bb.0:278; RV64-NEXT: vsetvli a0, zero, e64, m1, ta, mu279; RV64-NEXT: vmfne.vv v0, v8, v8280; RV64-NEXT: li a0, 1075281; RV64-NEXT: vfadd.vv v8, v8, v8, v0.t282; RV64-NEXT: slli a0, a0, 52283; RV64-NEXT: vfabs.v v9, v8284; RV64-NEXT: fmv.d.x fa5, a0285; RV64-NEXT: vmflt.vf v0, v9, fa5286; RV64-NEXT: fsrmi a0, 4287; RV64-NEXT: vsetvli zero, zero, e64, m1, ta, ma288; RV64-NEXT: vfcvt.x.f.v v9, v8, v0.t289; RV64-NEXT: fsrm a0290; RV64-NEXT: vfcvt.f.x.v v9, v9, v0.t291; RV64-NEXT: vsetvli zero, zero, e64, m1, ta, mu292; RV64-NEXT: vfsgnj.vv v8, v9, v8, v0.t293; RV64-NEXT: ret294 %a = call <vscale x 1 x double> @llvm.experimental.constrained.round.nxv1f64(<vscale x 1 x double> %x, metadata !"fpexcept.strict")295 ret <vscale x 1 x double> %a296}297 298define <vscale x 2 x double> @round_nxv2f64(<vscale x 2 x double> %x) strictfp {299; RV32-LABEL: round_nxv2f64:300; RV32: # %bb.0:301; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu302; RV32-NEXT: vmfne.vv v0, v8, v8303; RV32-NEXT: lui a0, %hi(.LCPI12_0)304; RV32-NEXT: fld fa5, %lo(.LCPI12_0)(a0)305; RV32-NEXT: vfadd.vv v8, v8, v8, v0.t306; RV32-NEXT: vfabs.v v10, v8307; RV32-NEXT: vmflt.vf v0, v10, fa5308; RV32-NEXT: fsrmi a0, 4309; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, ma310; RV32-NEXT: vfcvt.x.f.v v10, v8, v0.t311; RV32-NEXT: fsrm a0312; RV32-NEXT: vfcvt.f.x.v v10, v10, v0.t313; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, mu314; RV32-NEXT: vfsgnj.vv v8, v10, v8, v0.t315; RV32-NEXT: ret316;317; RV64-LABEL: round_nxv2f64:318; RV64: # %bb.0:319; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu320; RV64-NEXT: vmfne.vv v0, v8, v8321; RV64-NEXT: li a0, 1075322; RV64-NEXT: vfadd.vv v8, v8, v8, v0.t323; RV64-NEXT: slli a0, a0, 52324; RV64-NEXT: vfabs.v v10, v8325; RV64-NEXT: fmv.d.x fa5, a0326; RV64-NEXT: vmflt.vf v0, v10, fa5327; RV64-NEXT: fsrmi a0, 4328; RV64-NEXT: vsetvli zero, zero, e64, m2, ta, ma329; RV64-NEXT: vfcvt.x.f.v v10, v8, v0.t330; RV64-NEXT: fsrm a0331; RV64-NEXT: vfcvt.f.x.v v10, v10, v0.t332; RV64-NEXT: vsetvli zero, zero, e64, m2, ta, mu333; RV64-NEXT: vfsgnj.vv v8, v10, v8, v0.t334; RV64-NEXT: ret335 %a = call <vscale x 2 x double> @llvm.experimental.constrained.round.nxv2f64(<vscale x 2 x double> %x, metadata !"fpexcept.strict")336 ret <vscale x 2 x double> %a337}338 339define <vscale x 4 x double> @round_nxv4f64(<vscale x 4 x double> %x) strictfp {340; RV32-LABEL: round_nxv4f64:341; RV32: # %bb.0:342; RV32-NEXT: vsetvli a0, zero, e64, m4, ta, mu343; RV32-NEXT: vmfne.vv v0, v8, v8344; RV32-NEXT: lui a0, %hi(.LCPI13_0)345; RV32-NEXT: fld fa5, %lo(.LCPI13_0)(a0)346; RV32-NEXT: vfadd.vv v8, v8, v8, v0.t347; RV32-NEXT: vfabs.v v12, v8348; RV32-NEXT: vmflt.vf v0, v12, fa5349; RV32-NEXT: fsrmi a0, 4350; RV32-NEXT: vsetvli zero, zero, e64, m4, ta, ma351; RV32-NEXT: vfcvt.x.f.v v12, v8, v0.t352; RV32-NEXT: fsrm a0353; RV32-NEXT: vfcvt.f.x.v v12, v12, v0.t354; RV32-NEXT: vsetvli zero, zero, e64, m4, ta, mu355; RV32-NEXT: vfsgnj.vv v8, v12, v8, v0.t356; RV32-NEXT: ret357;358; RV64-LABEL: round_nxv4f64:359; RV64: # %bb.0:360; RV64-NEXT: vsetvli a0, zero, e64, m4, ta, mu361; RV64-NEXT: vmfne.vv v0, v8, v8362; RV64-NEXT: li a0, 1075363; RV64-NEXT: vfadd.vv v8, v8, v8, v0.t364; RV64-NEXT: slli a0, a0, 52365; RV64-NEXT: vfabs.v v12, v8366; RV64-NEXT: fmv.d.x fa5, a0367; RV64-NEXT: vmflt.vf v0, v12, fa5368; RV64-NEXT: fsrmi a0, 4369; RV64-NEXT: vsetvli zero, zero, e64, m4, ta, ma370; RV64-NEXT: vfcvt.x.f.v v12, v8, v0.t371; RV64-NEXT: fsrm a0372; RV64-NEXT: vfcvt.f.x.v v12, v12, v0.t373; RV64-NEXT: vsetvli zero, zero, e64, m4, ta, mu374; RV64-NEXT: vfsgnj.vv v8, v12, v8, v0.t375; RV64-NEXT: ret376 %a = call <vscale x 4 x double> @llvm.experimental.constrained.round.nxv4f64(<vscale x 4 x double> %x, metadata !"fpexcept.strict")377 ret <vscale x 4 x double> %a378}379 380define <vscale x 8 x double> @round_nxv8f64(<vscale x 8 x double> %x) strictfp {381; RV32-LABEL: round_nxv8f64:382; RV32: # %bb.0:383; RV32-NEXT: vsetvli a0, zero, e64, m8, ta, mu384; RV32-NEXT: vmfne.vv v0, v8, v8385; RV32-NEXT: lui a0, %hi(.LCPI14_0)386; RV32-NEXT: fld fa5, %lo(.LCPI14_0)(a0)387; RV32-NEXT: vfadd.vv v8, v8, v8, v0.t388; RV32-NEXT: vfabs.v v16, v8389; RV32-NEXT: vmflt.vf v0, v16, fa5390; RV32-NEXT: fsrmi a0, 4391; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, ma392; RV32-NEXT: vfcvt.x.f.v v16, v8, v0.t393; RV32-NEXT: fsrm a0394; RV32-NEXT: vfcvt.f.x.v v16, v16, v0.t395; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu396; RV32-NEXT: vfsgnj.vv v8, v16, v8, v0.t397; RV32-NEXT: ret398;399; RV64-LABEL: round_nxv8f64:400; RV64: # %bb.0:401; RV64-NEXT: vsetvli a0, zero, e64, m8, ta, mu402; RV64-NEXT: vmfne.vv v0, v8, v8403; RV64-NEXT: li a0, 1075404; RV64-NEXT: vfadd.vv v8, v8, v8, v0.t405; RV64-NEXT: slli a0, a0, 52406; RV64-NEXT: vfabs.v v16, v8407; RV64-NEXT: fmv.d.x fa5, a0408; RV64-NEXT: vmflt.vf v0, v16, fa5409; RV64-NEXT: fsrmi a0, 4410; RV64-NEXT: vsetvli zero, zero, e64, m8, ta, ma411; RV64-NEXT: vfcvt.x.f.v v16, v8, v0.t412; RV64-NEXT: fsrm a0413; RV64-NEXT: vfcvt.f.x.v v16, v16, v0.t414; RV64-NEXT: vsetvli zero, zero, e64, m8, ta, mu415; RV64-NEXT: vfsgnj.vv v8, v16, v8, v0.t416; RV64-NEXT: ret417 %a = call <vscale x 8 x double> @llvm.experimental.constrained.round.nxv8f64(<vscale x 8 x double> %x, metadata !"fpexcept.strict")418 ret <vscale x 8 x double> %a419}420