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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv64 -mattr=+zve64f,+zvl512b < %s | FileCheck %s3 4; Previously, an incorrect (extract_subvector (extract_subvector X, C), 0) DAG combine crashed5; this snippet.6 7define <8 x i16> @gsm_encode(ptr %p) {8; CHECK-LABEL: gsm_encode:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: vsetivli zero, 19, e16, m1, ta, ma11; CHECK-NEXT: vle16.v v8, (a0)12; CHECK-NEXT: vslidedown.vi v9, v8, 1213; CHECK-NEXT: vmv.x.s a0, v914; CHECK-NEXT: vsetivli zero, 8, e16, mf4, ta, ma15; CHECK-NEXT: vmv.v.i v9, -116; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, ma17; CHECK-NEXT: vslidedown.vi v8, v8, 918; CHECK-NEXT: vmv.x.s a1, v819; CHECK-NEXT: vsetivli zero, 8, e16, mf4, ta, ma20; CHECK-NEXT: vmv.v.i v8, 021; CHECK-NEXT: vslide1down.vx v9, v9, zero22; CHECK-NEXT: vslide1down.vx v8, v8, zero23; CHECK-NEXT: vslide1down.vx v8, v8, zero24; CHECK-NEXT: vslide1down.vx v8, v8, zero25; CHECK-NEXT: vslide1down.vx v8, v8, zero26; CHECK-NEXT: vslide1down.vx v8, v8, a127; CHECK-NEXT: vslide1down.vx v8, v8, a028; CHECK-NEXT: vslidedown.vi v8, v8, 129; CHECK-NEXT: vand.vv v8, v8, v930; CHECK-NEXT: ret31entry:32 %0 = load <19 x i16>, ptr %p, align 233 %1 = shufflevector <19 x i16> zeroinitializer, <19 x i16> %0, <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 28, i32 31, i32 poison, i32 poison>34 %2 = shufflevector <9 x i16> %1, <9 x i16> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 15>35 ret <8 x i16> %236}37