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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=riscv64 -mattr=+v -verify-machineinstrs | FileCheck %s3 4; Use cttz to test if we properly prove never-zero. There is a very5; simple transform from cttz -> cttz_zero_undef if its operand is6; known never zero.7 8; Even without vscale_range, vscale is always guaranteed to be non-zero.9define i32 @vscale_known_nonzero() {10; CHECK-LABEL: vscale_known_nonzero:11; CHECK: # %bb.0:12; CHECK-NEXT: csrr a0, vlenb13; CHECK-NEXT: srli a0, a0, 314; CHECK-NEXT: neg a1, a015; CHECK-NEXT: and a0, a0, a116; CHECK-NEXT: slli a1, a0, 617; CHECK-NEXT: slli a2, a0, 818; CHECK-NEXT: slli a3, a0, 1019; CHECK-NEXT: slli a4, a0, 1220; CHECK-NEXT: add a1, a1, a221; CHECK-NEXT: slli a2, a0, 1622; CHECK-NEXT: sub a3, a3, a423; CHECK-NEXT: slli a4, a0, 1824; CHECK-NEXT: sub a2, a2, a425; CHECK-NEXT: slli a4, a0, 426; CHECK-NEXT: sub a4, a0, a427; CHECK-NEXT: add a1, a4, a128; CHECK-NEXT: slli a4, a0, 1429; CHECK-NEXT: sub a3, a3, a430; CHECK-NEXT: slli a4, a0, 2331; CHECK-NEXT: sub a2, a2, a432; CHECK-NEXT: slli a0, a0, 2733; CHECK-NEXT: add a1, a1, a334; CHECK-NEXT: add a0, a2, a035; CHECK-NEXT: add a0, a1, a036; CHECK-NEXT: srliw a0, a0, 2737; CHECK-NEXT: lui a1, %hi(.LCPI0_0)38; CHECK-NEXT: addi a1, a1, %lo(.LCPI0_0)39; CHECK-NEXT: add a0, a1, a040; CHECK-NEXT: lbu a0, 0(a0)41; CHECK-NEXT: ret42 %x = call i32 @llvm.vscale()43 %r = call i32 @llvm.cttz.i32(i32 %x, i1 false)44 ret i32 %r45}46