732 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \3; RUN: -verify-machineinstrs | FileCheck %s4; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \5; RUN: -verify-machineinstrs | FileCheck %s6 7define <vscale x 1 x i8> @sext_nxv1i1_nxv1i8(<vscale x 1 x i1> %v) {8; CHECK-LABEL: sext_nxv1i1_nxv1i8:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma11; CHECK-NEXT: vmv.v.i v8, 012; CHECK-NEXT: vmerge.vim v8, v8, -1, v013; CHECK-NEXT: ret14 %r = sext <vscale x 1 x i1> %v to <vscale x 1 x i8>15 ret <vscale x 1 x i8> %r16}17 18define <vscale x 1 x i8> @zext_nxv1i1_nxv1i8(<vscale x 1 x i1> %v) {19; CHECK-LABEL: zext_nxv1i1_nxv1i8:20; CHECK: # %bb.0:21; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma22; CHECK-NEXT: vmv.v.i v8, 023; CHECK-NEXT: vmerge.vim v8, v8, 1, v024; CHECK-NEXT: ret25 %r = zext <vscale x 1 x i1> %v to <vscale x 1 x i8>26 ret <vscale x 1 x i8> %r27}28 29define <vscale x 1 x i1> @trunc_nxv1i8_nxv1i1(<vscale x 1 x i8> %v) {30; CHECK-LABEL: trunc_nxv1i8_nxv1i1:31; CHECK: # %bb.0:32; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma33; CHECK-NEXT: vand.vi v8, v8, 134; CHECK-NEXT: vmsne.vi v0, v8, 035; CHECK-NEXT: ret36 %r = trunc <vscale x 1 x i8> %v to <vscale x 1 x i1>37 ret <vscale x 1 x i1> %r38}39 40define <vscale x 2 x i8> @sext_nxv2i1_nxv2i8(<vscale x 2 x i1> %v) {41; CHECK-LABEL: sext_nxv2i1_nxv2i8:42; CHECK: # %bb.0:43; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma44; CHECK-NEXT: vmv.v.i v8, 045; CHECK-NEXT: vmerge.vim v8, v8, -1, v046; CHECK-NEXT: ret47 %r = sext <vscale x 2 x i1> %v to <vscale x 2 x i8>48 ret <vscale x 2 x i8> %r49}50 51define <vscale x 2 x i8> @zext_nxv2i1_nxv2i8(<vscale x 2 x i1> %v) {52; CHECK-LABEL: zext_nxv2i1_nxv2i8:53; CHECK: # %bb.0:54; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma55; CHECK-NEXT: vmv.v.i v8, 056; CHECK-NEXT: vmerge.vim v8, v8, 1, v057; CHECK-NEXT: ret58 %r = zext <vscale x 2 x i1> %v to <vscale x 2 x i8>59 ret <vscale x 2 x i8> %r60}61 62define <vscale x 2 x i1> @trunc_nxv2i8_nxv2i1(<vscale x 2 x i8> %v) {63; CHECK-LABEL: trunc_nxv2i8_nxv2i1:64; CHECK: # %bb.0:65; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma66; CHECK-NEXT: vand.vi v8, v8, 167; CHECK-NEXT: vmsne.vi v0, v8, 068; CHECK-NEXT: ret69 %r = trunc <vscale x 2 x i8> %v to <vscale x 2 x i1>70 ret <vscale x 2 x i1> %r71}72 73define <vscale x 4 x i8> @sext_nxv4i1_nxv4i8(<vscale x 4 x i1> %v) {74; CHECK-LABEL: sext_nxv4i1_nxv4i8:75; CHECK: # %bb.0:76; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma77; CHECK-NEXT: vmv.v.i v8, 078; CHECK-NEXT: vmerge.vim v8, v8, -1, v079; CHECK-NEXT: ret80 %r = sext <vscale x 4 x i1> %v to <vscale x 4 x i8>81 ret <vscale x 4 x i8> %r82}83 84define <vscale x 4 x i8> @zext_nxv4i1_nxv4i8(<vscale x 4 x i1> %v) {85; CHECK-LABEL: zext_nxv4i1_nxv4i8:86; CHECK: # %bb.0:87; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma88; CHECK-NEXT: vmv.v.i v8, 089; CHECK-NEXT: vmerge.vim v8, v8, 1, v090; CHECK-NEXT: ret91 %r = zext <vscale x 4 x i1> %v to <vscale x 4 x i8>92 ret <vscale x 4 x i8> %r93}94 95define <vscale x 4 x i1> @trunc_nxv4i8_nxv4i1(<vscale x 4 x i8> %v) {96; CHECK-LABEL: trunc_nxv4i8_nxv4i1:97; CHECK: # %bb.0:98; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma99; CHECK-NEXT: vand.vi v8, v8, 1100; CHECK-NEXT: vmsne.vi v0, v8, 0101; CHECK-NEXT: ret102 %r = trunc <vscale x 4 x i8> %v to <vscale x 4 x i1>103 ret <vscale x 4 x i1> %r104}105 106define <vscale x 8 x i8> @sext_nxv8i1_nxv8i8(<vscale x 8 x i1> %v) {107; CHECK-LABEL: sext_nxv8i1_nxv8i8:108; CHECK: # %bb.0:109; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma110; CHECK-NEXT: vmv.v.i v8, 0111; CHECK-NEXT: vmerge.vim v8, v8, -1, v0112; CHECK-NEXT: ret113 %r = sext <vscale x 8 x i1> %v to <vscale x 8 x i8>114 ret <vscale x 8 x i8> %r115}116 117define <vscale x 8 x i8> @zext_nxv8i1_nxv8i8(<vscale x 8 x i1> %v) {118; CHECK-LABEL: zext_nxv8i1_nxv8i8:119; CHECK: # %bb.0:120; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma121; CHECK-NEXT: vmv.v.i v8, 0122; CHECK-NEXT: vmerge.vim v8, v8, 1, v0123; CHECK-NEXT: ret124 %r = zext <vscale x 8 x i1> %v to <vscale x 8 x i8>125 ret <vscale x 8 x i8> %r126}127 128define <vscale x 8 x i1> @trunc_nxv8i8_nxv8i1(<vscale x 8 x i8> %v) {129; CHECK-LABEL: trunc_nxv8i8_nxv8i1:130; CHECK: # %bb.0:131; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma132; CHECK-NEXT: vand.vi v8, v8, 1133; CHECK-NEXT: vmsne.vi v0, v8, 0134; CHECK-NEXT: ret135 %r = trunc <vscale x 8 x i8> %v to <vscale x 8 x i1>136 ret <vscale x 8 x i1> %r137}138 139define <vscale x 16 x i8> @sext_nxv16i1_nxv16i8(<vscale x 16 x i1> %v) {140; CHECK-LABEL: sext_nxv16i1_nxv16i8:141; CHECK: # %bb.0:142; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma143; CHECK-NEXT: vmv.v.i v8, 0144; CHECK-NEXT: vmerge.vim v8, v8, -1, v0145; CHECK-NEXT: ret146 %r = sext <vscale x 16 x i1> %v to <vscale x 16 x i8>147 ret <vscale x 16 x i8> %r148}149 150define <vscale x 16 x i8> @zext_nxv16i1_nxv16i8(<vscale x 16 x i1> %v) {151; CHECK-LABEL: zext_nxv16i1_nxv16i8:152; CHECK: # %bb.0:153; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma154; CHECK-NEXT: vmv.v.i v8, 0155; CHECK-NEXT: vmerge.vim v8, v8, 1, v0156; CHECK-NEXT: ret157 %r = zext <vscale x 16 x i1> %v to <vscale x 16 x i8>158 ret <vscale x 16 x i8> %r159}160 161define <vscale x 16 x i1> @trunc_nxv16i8_nxv16i1(<vscale x 16 x i8> %v) {162; CHECK-LABEL: trunc_nxv16i8_nxv16i1:163; CHECK: # %bb.0:164; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma165; CHECK-NEXT: vand.vi v8, v8, 1166; CHECK-NEXT: vmsne.vi v0, v8, 0167; CHECK-NEXT: ret168 %r = trunc <vscale x 16 x i8> %v to <vscale x 16 x i1>169 ret <vscale x 16 x i1> %r170}171 172define <vscale x 32 x i8> @sext_nxv32i1_nxv32i8(<vscale x 32 x i1> %v) {173; CHECK-LABEL: sext_nxv32i1_nxv32i8:174; CHECK: # %bb.0:175; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma176; CHECK-NEXT: vmv.v.i v8, 0177; CHECK-NEXT: vmerge.vim v8, v8, -1, v0178; CHECK-NEXT: ret179 %r = sext <vscale x 32 x i1> %v to <vscale x 32 x i8>180 ret <vscale x 32 x i8> %r181}182 183define <vscale x 32 x i8> @zext_nxv32i1_nxv32i8(<vscale x 32 x i1> %v) {184; CHECK-LABEL: zext_nxv32i1_nxv32i8:185; CHECK: # %bb.0:186; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma187; CHECK-NEXT: vmv.v.i v8, 0188; CHECK-NEXT: vmerge.vim v8, v8, 1, v0189; CHECK-NEXT: ret190 %r = zext <vscale x 32 x i1> %v to <vscale x 32 x i8>191 ret <vscale x 32 x i8> %r192}193 194define <vscale x 32 x i1> @trunc_nxv32i8_nxv32i1(<vscale x 32 x i8> %v) {195; CHECK-LABEL: trunc_nxv32i8_nxv32i1:196; CHECK: # %bb.0:197; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma198; CHECK-NEXT: vand.vi v8, v8, 1199; CHECK-NEXT: vmsne.vi v0, v8, 0200; CHECK-NEXT: ret201 %r = trunc <vscale x 32 x i8> %v to <vscale x 32 x i1>202 ret <vscale x 32 x i1> %r203}204 205define <vscale x 64 x i8> @sext_nxv64i1_nxv64i8(<vscale x 64 x i1> %v) {206; CHECK-LABEL: sext_nxv64i1_nxv64i8:207; CHECK: # %bb.0:208; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma209; CHECK-NEXT: vmv.v.i v8, 0210; CHECK-NEXT: vmerge.vim v8, v8, -1, v0211; CHECK-NEXT: ret212 %r = sext <vscale x 64 x i1> %v to <vscale x 64 x i8>213 ret <vscale x 64 x i8> %r214}215 216define <vscale x 64 x i8> @zext_nxv64i1_nxv64i8(<vscale x 64 x i1> %v) {217; CHECK-LABEL: zext_nxv64i1_nxv64i8:218; CHECK: # %bb.0:219; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma220; CHECK-NEXT: vmv.v.i v8, 0221; CHECK-NEXT: vmerge.vim v8, v8, 1, v0222; CHECK-NEXT: ret223 %r = zext <vscale x 64 x i1> %v to <vscale x 64 x i8>224 ret <vscale x 64 x i8> %r225}226 227define <vscale x 64 x i1> @trunc_nxv64i8_nxv64i1(<vscale x 64 x i8> %v) {228; CHECK-LABEL: trunc_nxv64i8_nxv64i1:229; CHECK: # %bb.0:230; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma231; CHECK-NEXT: vand.vi v8, v8, 1232; CHECK-NEXT: vmsne.vi v0, v8, 0233; CHECK-NEXT: ret234 %r = trunc <vscale x 64 x i8> %v to <vscale x 64 x i1>235 ret <vscale x 64 x i1> %r236}237 238define <vscale x 1 x i16> @sext_nxv1i1_nxv1i16(<vscale x 1 x i1> %v) {239; CHECK-LABEL: sext_nxv1i1_nxv1i16:240; CHECK: # %bb.0:241; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma242; CHECK-NEXT: vmv.v.i v8, 0243; CHECK-NEXT: vmerge.vim v8, v8, -1, v0244; CHECK-NEXT: ret245 %r = sext <vscale x 1 x i1> %v to <vscale x 1 x i16>246 ret <vscale x 1 x i16> %r247}248 249define <vscale x 1 x i16> @zext_nxv1i1_nxv1i16(<vscale x 1 x i1> %v) {250; CHECK-LABEL: zext_nxv1i1_nxv1i16:251; CHECK: # %bb.0:252; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma253; CHECK-NEXT: vmv.v.i v8, 0254; CHECK-NEXT: vmerge.vim v8, v8, 1, v0255; CHECK-NEXT: ret256 %r = zext <vscale x 1 x i1> %v to <vscale x 1 x i16>257 ret <vscale x 1 x i16> %r258}259 260define <vscale x 1 x i1> @trunc_nxv1i16_nxv1i1(<vscale x 1 x i16> %v) {261; CHECK-LABEL: trunc_nxv1i16_nxv1i1:262; CHECK: # %bb.0:263; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma264; CHECK-NEXT: vand.vi v8, v8, 1265; CHECK-NEXT: vmsne.vi v0, v8, 0266; CHECK-NEXT: ret267 %r = trunc <vscale x 1 x i16> %v to <vscale x 1 x i1>268 ret <vscale x 1 x i1> %r269}270 271define <vscale x 2 x i16> @sext_nxv2i1_nxv2i16(<vscale x 2 x i1> %v) {272; CHECK-LABEL: sext_nxv2i1_nxv2i16:273; CHECK: # %bb.0:274; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma275; CHECK-NEXT: vmv.v.i v8, 0276; CHECK-NEXT: vmerge.vim v8, v8, -1, v0277; CHECK-NEXT: ret278 %r = sext <vscale x 2 x i1> %v to <vscale x 2 x i16>279 ret <vscale x 2 x i16> %r280}281 282define <vscale x 2 x i16> @zext_nxv2i1_nxv2i16(<vscale x 2 x i1> %v) {283; CHECK-LABEL: zext_nxv2i1_nxv2i16:284; CHECK: # %bb.0:285; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma286; CHECK-NEXT: vmv.v.i v8, 0287; CHECK-NEXT: vmerge.vim v8, v8, 1, v0288; CHECK-NEXT: ret289 %r = zext <vscale x 2 x i1> %v to <vscale x 2 x i16>290 ret <vscale x 2 x i16> %r291}292 293define <vscale x 2 x i1> @trunc_nxv2i16_nxv2i1(<vscale x 2 x i16> %v) {294; CHECK-LABEL: trunc_nxv2i16_nxv2i1:295; CHECK: # %bb.0:296; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma297; CHECK-NEXT: vand.vi v8, v8, 1298; CHECK-NEXT: vmsne.vi v0, v8, 0299; CHECK-NEXT: ret300 %r = trunc <vscale x 2 x i16> %v to <vscale x 2 x i1>301 ret <vscale x 2 x i1> %r302}303 304define <vscale x 4 x i16> @sext_nxv4i1_nxv4i16(<vscale x 4 x i1> %v) {305; CHECK-LABEL: sext_nxv4i1_nxv4i16:306; CHECK: # %bb.0:307; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma308; CHECK-NEXT: vmv.v.i v8, 0309; CHECK-NEXT: vmerge.vim v8, v8, -1, v0310; CHECK-NEXT: ret311 %r = sext <vscale x 4 x i1> %v to <vscale x 4 x i16>312 ret <vscale x 4 x i16> %r313}314 315define <vscale x 4 x i16> @zext_nxv4i1_nxv4i16(<vscale x 4 x i1> %v) {316; CHECK-LABEL: zext_nxv4i1_nxv4i16:317; CHECK: # %bb.0:318; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma319; CHECK-NEXT: vmv.v.i v8, 0320; CHECK-NEXT: vmerge.vim v8, v8, 1, v0321; CHECK-NEXT: ret322 %r = zext <vscale x 4 x i1> %v to <vscale x 4 x i16>323 ret <vscale x 4 x i16> %r324}325 326define <vscale x 4 x i1> @trunc_nxv4i16_nxv4i1(<vscale x 4 x i16> %v) {327; CHECK-LABEL: trunc_nxv4i16_nxv4i1:328; CHECK: # %bb.0:329; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma330; CHECK-NEXT: vand.vi v8, v8, 1331; CHECK-NEXT: vmsne.vi v0, v8, 0332; CHECK-NEXT: ret333 %r = trunc <vscale x 4 x i16> %v to <vscale x 4 x i1>334 ret <vscale x 4 x i1> %r335}336 337define <vscale x 8 x i16> @sext_nxv8i1_nxv8i16(<vscale x 8 x i1> %v) {338; CHECK-LABEL: sext_nxv8i1_nxv8i16:339; CHECK: # %bb.0:340; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma341; CHECK-NEXT: vmv.v.i v8, 0342; CHECK-NEXT: vmerge.vim v8, v8, -1, v0343; CHECK-NEXT: ret344 %r = sext <vscale x 8 x i1> %v to <vscale x 8 x i16>345 ret <vscale x 8 x i16> %r346}347 348define <vscale x 8 x i16> @zext_nxv8i1_nxv8i16(<vscale x 8 x i1> %v) {349; CHECK-LABEL: zext_nxv8i1_nxv8i16:350; CHECK: # %bb.0:351; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma352; CHECK-NEXT: vmv.v.i v8, 0353; CHECK-NEXT: vmerge.vim v8, v8, 1, v0354; CHECK-NEXT: ret355 %r = zext <vscale x 8 x i1> %v to <vscale x 8 x i16>356 ret <vscale x 8 x i16> %r357}358 359define <vscale x 8 x i1> @trunc_nxv8i16_nxv8i1(<vscale x 8 x i16> %v) {360; CHECK-LABEL: trunc_nxv8i16_nxv8i1:361; CHECK: # %bb.0:362; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma363; CHECK-NEXT: vand.vi v8, v8, 1364; CHECK-NEXT: vmsne.vi v0, v8, 0365; CHECK-NEXT: ret366 %r = trunc <vscale x 8 x i16> %v to <vscale x 8 x i1>367 ret <vscale x 8 x i1> %r368}369 370define <vscale x 16 x i16> @sext_nxv16i1_nxv16i16(<vscale x 16 x i1> %v) {371; CHECK-LABEL: sext_nxv16i1_nxv16i16:372; CHECK: # %bb.0:373; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma374; CHECK-NEXT: vmv.v.i v8, 0375; CHECK-NEXT: vmerge.vim v8, v8, -1, v0376; CHECK-NEXT: ret377 %r = sext <vscale x 16 x i1> %v to <vscale x 16 x i16>378 ret <vscale x 16 x i16> %r379}380 381define <vscale x 16 x i16> @zext_nxv16i1_nxv16i16(<vscale x 16 x i1> %v) {382; CHECK-LABEL: zext_nxv16i1_nxv16i16:383; CHECK: # %bb.0:384; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma385; CHECK-NEXT: vmv.v.i v8, 0386; CHECK-NEXT: vmerge.vim v8, v8, 1, v0387; CHECK-NEXT: ret388 %r = zext <vscale x 16 x i1> %v to <vscale x 16 x i16>389 ret <vscale x 16 x i16> %r390}391 392define <vscale x 16 x i1> @trunc_nxv16i16_nxv16i1(<vscale x 16 x i16> %v) {393; CHECK-LABEL: trunc_nxv16i16_nxv16i1:394; CHECK: # %bb.0:395; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma396; CHECK-NEXT: vand.vi v8, v8, 1397; CHECK-NEXT: vmsne.vi v0, v8, 0398; CHECK-NEXT: ret399 %r = trunc <vscale x 16 x i16> %v to <vscale x 16 x i1>400 ret <vscale x 16 x i1> %r401}402 403define <vscale x 32 x i16> @sext_nxv32i1_nxv32i16(<vscale x 32 x i1> %v) {404; CHECK-LABEL: sext_nxv32i1_nxv32i16:405; CHECK: # %bb.0:406; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma407; CHECK-NEXT: vmv.v.i v8, 0408; CHECK-NEXT: vmerge.vim v8, v8, -1, v0409; CHECK-NEXT: ret410 %r = sext <vscale x 32 x i1> %v to <vscale x 32 x i16>411 ret <vscale x 32 x i16> %r412}413 414define <vscale x 32 x i16> @zext_nxv32i1_nxv32i16(<vscale x 32 x i1> %v) {415; CHECK-LABEL: zext_nxv32i1_nxv32i16:416; CHECK: # %bb.0:417; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma418; CHECK-NEXT: vmv.v.i v8, 0419; CHECK-NEXT: vmerge.vim v8, v8, 1, v0420; CHECK-NEXT: ret421 %r = zext <vscale x 32 x i1> %v to <vscale x 32 x i16>422 ret <vscale x 32 x i16> %r423}424 425define <vscale x 32 x i1> @trunc_nxv32i16_nxv32i1(<vscale x 32 x i16> %v) {426; CHECK-LABEL: trunc_nxv32i16_nxv32i1:427; CHECK: # %bb.0:428; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma429; CHECK-NEXT: vand.vi v8, v8, 1430; CHECK-NEXT: vmsne.vi v0, v8, 0431; CHECK-NEXT: ret432 %r = trunc <vscale x 32 x i16> %v to <vscale x 32 x i1>433 ret <vscale x 32 x i1> %r434}435 436define <vscale x 1 x i32> @sext_nxv1i1_nxv1i32(<vscale x 1 x i1> %v) {437; CHECK-LABEL: sext_nxv1i1_nxv1i32:438; CHECK: # %bb.0:439; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma440; CHECK-NEXT: vmv.v.i v8, 0441; CHECK-NEXT: vmerge.vim v8, v8, -1, v0442; CHECK-NEXT: ret443 %r = sext <vscale x 1 x i1> %v to <vscale x 1 x i32>444 ret <vscale x 1 x i32> %r445}446 447define <vscale x 1 x i32> @zext_nxv1i1_nxv1i32(<vscale x 1 x i1> %v) {448; CHECK-LABEL: zext_nxv1i1_nxv1i32:449; CHECK: # %bb.0:450; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma451; CHECK-NEXT: vmv.v.i v8, 0452; CHECK-NEXT: vmerge.vim v8, v8, 1, v0453; CHECK-NEXT: ret454 %r = zext <vscale x 1 x i1> %v to <vscale x 1 x i32>455 ret <vscale x 1 x i32> %r456}457 458define <vscale x 1 x i1> @trunc_nxv1i32_nxv1i1(<vscale x 1 x i32> %v) {459; CHECK-LABEL: trunc_nxv1i32_nxv1i1:460; CHECK: # %bb.0:461; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma462; CHECK-NEXT: vand.vi v8, v8, 1463; CHECK-NEXT: vmsne.vi v0, v8, 0464; CHECK-NEXT: ret465 %r = trunc <vscale x 1 x i32> %v to <vscale x 1 x i1>466 ret <vscale x 1 x i1> %r467}468 469define <vscale x 2 x i32> @sext_nxv2i1_nxv2i32(<vscale x 2 x i1> %v) {470; CHECK-LABEL: sext_nxv2i1_nxv2i32:471; CHECK: # %bb.0:472; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma473; CHECK-NEXT: vmv.v.i v8, 0474; CHECK-NEXT: vmerge.vim v8, v8, -1, v0475; CHECK-NEXT: ret476 %r = sext <vscale x 2 x i1> %v to <vscale x 2 x i32>477 ret <vscale x 2 x i32> %r478}479 480define <vscale x 2 x i32> @zext_nxv2i1_nxv2i32(<vscale x 2 x i1> %v) {481; CHECK-LABEL: zext_nxv2i1_nxv2i32:482; CHECK: # %bb.0:483; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma484; CHECK-NEXT: vmv.v.i v8, 0485; CHECK-NEXT: vmerge.vim v8, v8, 1, v0486; CHECK-NEXT: ret487 %r = zext <vscale x 2 x i1> %v to <vscale x 2 x i32>488 ret <vscale x 2 x i32> %r489}490 491define <vscale x 2 x i1> @trunc_nxv2i32_nxv2i1(<vscale x 2 x i32> %v) {492; CHECK-LABEL: trunc_nxv2i32_nxv2i1:493; CHECK: # %bb.0:494; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma495; CHECK-NEXT: vand.vi v8, v8, 1496; CHECK-NEXT: vmsne.vi v0, v8, 0497; CHECK-NEXT: ret498 %r = trunc <vscale x 2 x i32> %v to <vscale x 2 x i1>499 ret <vscale x 2 x i1> %r500}501 502define <vscale x 4 x i32> @sext_nxv4i1_nxv4i32(<vscale x 4 x i1> %v) {503; CHECK-LABEL: sext_nxv4i1_nxv4i32:504; CHECK: # %bb.0:505; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma506; CHECK-NEXT: vmv.v.i v8, 0507; CHECK-NEXT: vmerge.vim v8, v8, -1, v0508; CHECK-NEXT: ret509 %r = sext <vscale x 4 x i1> %v to <vscale x 4 x i32>510 ret <vscale x 4 x i32> %r511}512 513define <vscale x 4 x i32> @zext_nxv4i1_nxv4i32(<vscale x 4 x i1> %v) {514; CHECK-LABEL: zext_nxv4i1_nxv4i32:515; CHECK: # %bb.0:516; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma517; CHECK-NEXT: vmv.v.i v8, 0518; CHECK-NEXT: vmerge.vim v8, v8, 1, v0519; CHECK-NEXT: ret520 %r = zext <vscale x 4 x i1> %v to <vscale x 4 x i32>521 ret <vscale x 4 x i32> %r522}523 524define <vscale x 4 x i1> @trunc_nxv4i32_nxv4i1(<vscale x 4 x i32> %v) {525; CHECK-LABEL: trunc_nxv4i32_nxv4i1:526; CHECK: # %bb.0:527; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma528; CHECK-NEXT: vand.vi v8, v8, 1529; CHECK-NEXT: vmsne.vi v0, v8, 0530; CHECK-NEXT: ret531 %r = trunc <vscale x 4 x i32> %v to <vscale x 4 x i1>532 ret <vscale x 4 x i1> %r533}534 535define <vscale x 8 x i32> @sext_nxv8i1_nxv8i32(<vscale x 8 x i1> %v) {536; CHECK-LABEL: sext_nxv8i1_nxv8i32:537; CHECK: # %bb.0:538; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma539; CHECK-NEXT: vmv.v.i v8, 0540; CHECK-NEXT: vmerge.vim v8, v8, -1, v0541; CHECK-NEXT: ret542 %r = sext <vscale x 8 x i1> %v to <vscale x 8 x i32>543 ret <vscale x 8 x i32> %r544}545 546define <vscale x 8 x i32> @zext_nxv8i1_nxv8i32(<vscale x 8 x i1> %v) {547; CHECK-LABEL: zext_nxv8i1_nxv8i32:548; CHECK: # %bb.0:549; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma550; CHECK-NEXT: vmv.v.i v8, 0551; CHECK-NEXT: vmerge.vim v8, v8, 1, v0552; CHECK-NEXT: ret553 %r = zext <vscale x 8 x i1> %v to <vscale x 8 x i32>554 ret <vscale x 8 x i32> %r555}556 557define <vscale x 8 x i1> @trunc_nxv8i32_nxv8i1(<vscale x 8 x i32> %v) {558; CHECK-LABEL: trunc_nxv8i32_nxv8i1:559; CHECK: # %bb.0:560; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma561; CHECK-NEXT: vand.vi v8, v8, 1562; CHECK-NEXT: vmsne.vi v0, v8, 0563; CHECK-NEXT: ret564 %r = trunc <vscale x 8 x i32> %v to <vscale x 8 x i1>565 ret <vscale x 8 x i1> %r566}567 568define <vscale x 16 x i32> @sext_nxv16i1_nxv16i32(<vscale x 16 x i1> %v) {569; CHECK-LABEL: sext_nxv16i1_nxv16i32:570; CHECK: # %bb.0:571; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma572; CHECK-NEXT: vmv.v.i v8, 0573; CHECK-NEXT: vmerge.vim v8, v8, -1, v0574; CHECK-NEXT: ret575 %r = sext <vscale x 16 x i1> %v to <vscale x 16 x i32>576 ret <vscale x 16 x i32> %r577}578 579define <vscale x 16 x i32> @zext_nxv16i1_nxv16i32(<vscale x 16 x i1> %v) {580; CHECK-LABEL: zext_nxv16i1_nxv16i32:581; CHECK: # %bb.0:582; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma583; CHECK-NEXT: vmv.v.i v8, 0584; CHECK-NEXT: vmerge.vim v8, v8, 1, v0585; CHECK-NEXT: ret586 %r = zext <vscale x 16 x i1> %v to <vscale x 16 x i32>587 ret <vscale x 16 x i32> %r588}589 590define <vscale x 16 x i1> @trunc_nxv16i32_nxv16i1(<vscale x 16 x i32> %v) {591; CHECK-LABEL: trunc_nxv16i32_nxv16i1:592; CHECK: # %bb.0:593; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma594; CHECK-NEXT: vand.vi v8, v8, 1595; CHECK-NEXT: vmsne.vi v0, v8, 0596; CHECK-NEXT: ret597 %r = trunc <vscale x 16 x i32> %v to <vscale x 16 x i1>598 ret <vscale x 16 x i1> %r599}600 601define <vscale x 1 x i64> @sext_nxv1i1_nxv1i64(<vscale x 1 x i1> %v) {602; CHECK-LABEL: sext_nxv1i1_nxv1i64:603; CHECK: # %bb.0:604; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma605; CHECK-NEXT: vmv.v.i v8, 0606; CHECK-NEXT: vmerge.vim v8, v8, -1, v0607; CHECK-NEXT: ret608 %r = sext <vscale x 1 x i1> %v to <vscale x 1 x i64>609 ret <vscale x 1 x i64> %r610}611 612define <vscale x 1 x i64> @zext_nxv1i1_nxv1i64(<vscale x 1 x i1> %v) {613; CHECK-LABEL: zext_nxv1i1_nxv1i64:614; CHECK: # %bb.0:615; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma616; CHECK-NEXT: vmv.v.i v8, 0617; CHECK-NEXT: vmerge.vim v8, v8, 1, v0618; CHECK-NEXT: ret619 %r = zext <vscale x 1 x i1> %v to <vscale x 1 x i64>620 ret <vscale x 1 x i64> %r621}622 623define <vscale x 1 x i1> @trunc_nxv1i64_nxv1i1(<vscale x 1 x i64> %v) {624; CHECK-LABEL: trunc_nxv1i64_nxv1i1:625; CHECK: # %bb.0:626; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma627; CHECK-NEXT: vand.vi v8, v8, 1628; CHECK-NEXT: vmsne.vi v0, v8, 0629; CHECK-NEXT: ret630 %r = trunc <vscale x 1 x i64> %v to <vscale x 1 x i1>631 ret <vscale x 1 x i1> %r632}633 634define <vscale x 2 x i64> @sext_nxv2i1_nxv2i64(<vscale x 2 x i1> %v) {635; CHECK-LABEL: sext_nxv2i1_nxv2i64:636; CHECK: # %bb.0:637; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma638; CHECK-NEXT: vmv.v.i v8, 0639; CHECK-NEXT: vmerge.vim v8, v8, -1, v0640; CHECK-NEXT: ret641 %r = sext <vscale x 2 x i1> %v to <vscale x 2 x i64>642 ret <vscale x 2 x i64> %r643}644 645define <vscale x 2 x i64> @zext_nxv2i1_nxv2i64(<vscale x 2 x i1> %v) {646; CHECK-LABEL: zext_nxv2i1_nxv2i64:647; CHECK: # %bb.0:648; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma649; CHECK-NEXT: vmv.v.i v8, 0650; CHECK-NEXT: vmerge.vim v8, v8, 1, v0651; CHECK-NEXT: ret652 %r = zext <vscale x 2 x i1> %v to <vscale x 2 x i64>653 ret <vscale x 2 x i64> %r654}655 656define <vscale x 2 x i1> @trunc_nxv2i64_nxv2i1(<vscale x 2 x i64> %v) {657; CHECK-LABEL: trunc_nxv2i64_nxv2i1:658; CHECK: # %bb.0:659; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma660; CHECK-NEXT: vand.vi v8, v8, 1661; CHECK-NEXT: vmsne.vi v0, v8, 0662; CHECK-NEXT: ret663 %r = trunc <vscale x 2 x i64> %v to <vscale x 2 x i1>664 ret <vscale x 2 x i1> %r665}666 667define <vscale x 4 x i64> @sext_nxv4i1_nxv4i64(<vscale x 4 x i1> %v) {668; CHECK-LABEL: sext_nxv4i1_nxv4i64:669; CHECK: # %bb.0:670; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma671; CHECK-NEXT: vmv.v.i v8, 0672; CHECK-NEXT: vmerge.vim v8, v8, -1, v0673; CHECK-NEXT: ret674 %r = sext <vscale x 4 x i1> %v to <vscale x 4 x i64>675 ret <vscale x 4 x i64> %r676}677 678define <vscale x 4 x i64> @zext_nxv4i1_nxv4i64(<vscale x 4 x i1> %v) {679; CHECK-LABEL: zext_nxv4i1_nxv4i64:680; CHECK: # %bb.0:681; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma682; CHECK-NEXT: vmv.v.i v8, 0683; CHECK-NEXT: vmerge.vim v8, v8, 1, v0684; CHECK-NEXT: ret685 %r = zext <vscale x 4 x i1> %v to <vscale x 4 x i64>686 ret <vscale x 4 x i64> %r687}688 689define <vscale x 4 x i1> @trunc_nxv4i64_nxv4i1(<vscale x 4 x i64> %v) {690; CHECK-LABEL: trunc_nxv4i64_nxv4i1:691; CHECK: # %bb.0:692; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma693; CHECK-NEXT: vand.vi v8, v8, 1694; CHECK-NEXT: vmsne.vi v0, v8, 0695; CHECK-NEXT: ret696 %r = trunc <vscale x 4 x i64> %v to <vscale x 4 x i1>697 ret <vscale x 4 x i1> %r698}699 700define <vscale x 8 x i64> @sext_nxv8i1_nxv8i64(<vscale x 8 x i1> %v) {701; CHECK-LABEL: sext_nxv8i1_nxv8i64:702; CHECK: # %bb.0:703; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma704; CHECK-NEXT: vmv.v.i v8, 0705; CHECK-NEXT: vmerge.vim v8, v8, -1, v0706; CHECK-NEXT: ret707 %r = sext <vscale x 8 x i1> %v to <vscale x 8 x i64>708 ret <vscale x 8 x i64> %r709}710 711define <vscale x 8 x i64> @zext_nxv8i1_nxv8i64(<vscale x 8 x i1> %v) {712; CHECK-LABEL: zext_nxv8i1_nxv8i64:713; CHECK: # %bb.0:714; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma715; CHECK-NEXT: vmv.v.i v8, 0716; CHECK-NEXT: vmerge.vim v8, v8, 1, v0717; CHECK-NEXT: ret718 %r = zext <vscale x 8 x i1> %v to <vscale x 8 x i64>719 ret <vscale x 8 x i64> %r720}721 722define <vscale x 8 x i1> @trunc_nxv8i64_nxv8i1(<vscale x 8 x i64> %v) {723; CHECK-LABEL: trunc_nxv8i64_nxv8i1:724; CHECK: # %bb.0:725; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma726; CHECK-NEXT: vand.vi v8, v8, 1727; CHECK-NEXT: vmsne.vi v0, v8, 0728; CHECK-NEXT: ret729 %r = trunc <vscale x 8 x i64> %v to <vscale x 8 x i1>730 ret <vscale x 8 x i1> %r731}732