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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+m,+v -O2 < %s \3; RUN: | FileCheck %s -check-prefix=RV64IV4 5define <vscale x 64 x i8> @callee(<vscale x 64 x i8> %arg0, <vscale x 64 x i8> %arg1, <vscale x 64 x i8> %arg2) {6; RV64IV-LABEL: callee:7; RV64IV: # %bb.0:8; RV64IV-NEXT: vl8r.v v24, (a0)9; RV64IV-NEXT: li a0, 102410; RV64IV-NEXT: vsetvli zero, a0, e8, m8, tu, ma11; RV64IV-NEXT: vmacc.vv v8, v16, v2412; RV64IV-NEXT: ret13 %ret = call <vscale x 64 x i8> @llvm.riscv.vmacc.nxv64i8.nxv64i8(14 <vscale x 64 x i8> %arg0,15 <vscale x 64 x i8> %arg1,16 <vscale x 64 x i8> %arg2, i64 1024, i64 0)17 ret <vscale x 64 x i8> %ret18}19 20define <vscale x 64 x i8> @caller() {21; RV64IV-LABEL: caller:22; RV64IV: # %bb.0:23; RV64IV-NEXT: addi sp, sp, -8024; RV64IV-NEXT: .cfi_def_cfa_offset 8025; RV64IV-NEXT: sd ra, 72(sp) # 8-byte Folded Spill26; RV64IV-NEXT: sd s0, 64(sp) # 8-byte Folded Spill27; RV64IV-NEXT: .cfi_offset ra, -828; RV64IV-NEXT: .cfi_offset s0, -1629; RV64IV-NEXT: addi s0, sp, 8030; RV64IV-NEXT: .cfi_def_cfa s0, 031; RV64IV-NEXT: csrr a0, vlenb32; RV64IV-NEXT: slli a0, a0, 533; RV64IV-NEXT: sub sp, sp, a034; RV64IV-NEXT: andi sp, sp, -6435; RV64IV-NEXT: csrr a0, vlenb36; RV64IV-NEXT: li a1, 2437; RV64IV-NEXT: mul a0, a0, a138; RV64IV-NEXT: add a0, sp, a039; RV64IV-NEXT: addi a0, a0, 6440; RV64IV-NEXT: vl8r.v v8, (a0)41; RV64IV-NEXT: csrr a0, vlenb42; RV64IV-NEXT: slli a0, a0, 443; RV64IV-NEXT: add a0, sp, a044; RV64IV-NEXT: addi a0, a0, 6445; RV64IV-NEXT: vl8r.v v16, (a0)46; RV64IV-NEXT: csrr a0, vlenb47; RV64IV-NEXT: slli a0, a0, 348; RV64IV-NEXT: add a0, sp, a049; RV64IV-NEXT: addi a0, a0, 6450; RV64IV-NEXT: vl8r.v v24, (a0)51; RV64IV-NEXT: addi a1, sp, 6452; RV64IV-NEXT: addi a0, sp, 6453; RV64IV-NEXT: vs8r.v v24, (a1)54; RV64IV-NEXT: call callee55; RV64IV-NEXT: addi sp, s0, -8056; RV64IV-NEXT: .cfi_def_cfa sp, 8057; RV64IV-NEXT: ld ra, 72(sp) # 8-byte Folded Reload58; RV64IV-NEXT: ld s0, 64(sp) # 8-byte Folded Reload59; RV64IV-NEXT: .cfi_restore ra60; RV64IV-NEXT: .cfi_restore s061; RV64IV-NEXT: addi sp, sp, 8062; RV64IV-NEXT: .cfi_def_cfa_offset 063; RV64IV-NEXT: ret64 %local0 = alloca <vscale x 64 x i8>65 %local1 = alloca <vscale x 64 x i8>66 %local2 = alloca <vscale x 64 x i8>67 %arg0 = load volatile <vscale x 64 x i8>, ptr %local068 %arg1 = load volatile <vscale x 64 x i8>, ptr %local169 %arg2 = load volatile <vscale x 64 x i8>, ptr %local270 %ret = call <vscale x 64 x i8> @callee(<vscale x 64 x i8> %arg0,71 <vscale x 64 x i8> %arg1,72 <vscale x 64 x i8> %arg2)73 ret <vscale x 64 x i8> %ret74}75