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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+m,+d,+zvfh,+zvfbfmin,+v \3; RUN:     -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \4; RUN:     --check-prefixes=CHECK,RV325; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+zvfh,+zvfbfmin,+v \6; RUN:     -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \7; RUN:     --check-prefixes=CHECK,RV648; RUN: llc -mtriple=riscv32 -mattr=+m,+d,+zvfhmin,+zvfbfmin,+v \9; RUN:     -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \10; RUN:     --check-prefixes=CHECK,RV3211; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+zvfhmin,+zvfbfmin,+v \12; RUN:     -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \13; RUN:     --check-prefixes=CHECK,RV6414 15define <vscale x 1 x i8> @mgather_nxv1i8(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i8> %passthru) {16; RV32-LABEL: mgather_nxv1i8:17; RV32:       # %bb.0:18; RV32-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu19; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t20; RV32-NEXT:    vmv1r.v v8, v921; RV32-NEXT:    ret22;23; RV64-LABEL: mgather_nxv1i8:24; RV64:       # %bb.0:25; RV64-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu26; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t27; RV64-NEXT:    vmv1r.v v8, v928; RV64-NEXT:    ret29  %v = call <vscale x 1 x i8> @llvm.masked.gather.nxv1i8.nxv1p0(<vscale x 1 x ptr> %ptrs, i32 1, <vscale x 1 x i1> %m, <vscale x 1 x i8> %passthru)30  ret <vscale x 1 x i8> %v31}32 33define <vscale x 2 x i8> @mgather_nxv2i8(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {34; RV32-LABEL: mgather_nxv2i8:35; RV32:       # %bb.0:36; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu37; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t38; RV32-NEXT:    vmv1r.v v8, v939; RV32-NEXT:    ret40;41; RV64-LABEL: mgather_nxv2i8:42; RV64:       # %bb.0:43; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu44; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t45; RV64-NEXT:    vmv1r.v v8, v1046; RV64-NEXT:    ret47  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)48  ret <vscale x 2 x i8> %v49}50 51define <vscale x 2 x i16> @mgather_nxv2i8_sextload_nxv2i16(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {52; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i16:53; RV32:       # %bb.0:54; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu55; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t56; RV32-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma57; RV32-NEXT:    vsext.vf2 v8, v958; RV32-NEXT:    ret59;60; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i16:61; RV64:       # %bb.0:62; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu63; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t64; RV64-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma65; RV64-NEXT:    vsext.vf2 v8, v1066; RV64-NEXT:    ret67  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)68  %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i16>69  ret <vscale x 2 x i16> %ev70}71 72define <vscale x 2 x i16> @mgather_nxv2i8_zextload_nxv2i16(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {73; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i16:74; RV32:       # %bb.0:75; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu76; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t77; RV32-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma78; RV32-NEXT:    vzext.vf2 v8, v979; RV32-NEXT:    ret80;81; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i16:82; RV64:       # %bb.0:83; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu84; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t85; RV64-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma86; RV64-NEXT:    vzext.vf2 v8, v1087; RV64-NEXT:    ret88  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)89  %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i16>90  ret <vscale x 2 x i16> %ev91}92 93define <vscale x 2 x i32> @mgather_nxv2i8_sextload_nxv2i32(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {94; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i32:95; RV32:       # %bb.0:96; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu97; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t98; RV32-NEXT:    vsetvli zero, zero, e32, m1, ta, ma99; RV32-NEXT:    vsext.vf4 v8, v9100; RV32-NEXT:    ret101;102; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i32:103; RV64:       # %bb.0:104; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu105; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t106; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, ma107; RV64-NEXT:    vsext.vf4 v8, v10108; RV64-NEXT:    ret109  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)110  %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i32>111  ret <vscale x 2 x i32> %ev112}113 114define <vscale x 2 x i32> @mgather_nxv2i8_zextload_nxv2i32(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {115; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i32:116; RV32:       # %bb.0:117; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu118; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t119; RV32-NEXT:    vsetvli zero, zero, e32, m1, ta, ma120; RV32-NEXT:    vzext.vf4 v8, v9121; RV32-NEXT:    ret122;123; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i32:124; RV64:       # %bb.0:125; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu126; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t127; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, ma128; RV64-NEXT:    vzext.vf4 v8, v10129; RV64-NEXT:    ret130  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)131  %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i32>132  ret <vscale x 2 x i32> %ev133}134 135define <vscale x 2 x i64> @mgather_nxv2i8_sextload_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {136; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i64:137; RV32:       # %bb.0:138; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu139; RV32-NEXT:    vmv1r.v v10, v9140; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t141; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, ma142; RV32-NEXT:    vsext.vf8 v8, v10143; RV32-NEXT:    ret144;145; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i64:146; RV64:       # %bb.0:147; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu148; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t149; RV64-NEXT:    vsetvli zero, zero, e64, m2, ta, ma150; RV64-NEXT:    vsext.vf8 v8, v10151; RV64-NEXT:    ret152  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)153  %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i64>154  ret <vscale x 2 x i64> %ev155}156 157define <vscale x 2 x i64> @mgather_nxv2i8_zextload_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {158; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i64:159; RV32:       # %bb.0:160; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu161; RV32-NEXT:    vmv1r.v v10, v9162; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t163; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, ma164; RV32-NEXT:    vzext.vf8 v8, v10165; RV32-NEXT:    ret166;167; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i64:168; RV64:       # %bb.0:169; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu170; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t171; RV64-NEXT:    vsetvli zero, zero, e64, m2, ta, ma172; RV64-NEXT:    vzext.vf8 v8, v10173; RV64-NEXT:    ret174  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)175  %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i64>176  ret <vscale x 2 x i64> %ev177}178 179define <vscale x 4 x i8> @mgather_nxv4i8(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i8> %passthru) {180; RV32-LABEL: mgather_nxv4i8:181; RV32:       # %bb.0:182; RV32-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu183; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t184; RV32-NEXT:    vmv1r.v v8, v10185; RV32-NEXT:    ret186;187; RV64-LABEL: mgather_nxv4i8:188; RV64:       # %bb.0:189; RV64-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu190; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t191; RV64-NEXT:    vmv1r.v v8, v12192; RV64-NEXT:    ret193  %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 1, <vscale x 4 x i1> %m, <vscale x 4 x i8> %passthru)194  ret <vscale x 4 x i8> %v195}196 197define <vscale x 4 x i8> @mgather_truemask_nxv4i8(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i8> %passthru) {198; RV32-LABEL: mgather_truemask_nxv4i8:199; RV32:       # %bb.0:200; RV32-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma201; RV32-NEXT:    vluxei32.v v10, (zero), v8202; RV32-NEXT:    vmv1r.v v8, v10203; RV32-NEXT:    ret204;205; RV64-LABEL: mgather_truemask_nxv4i8:206; RV64:       # %bb.0:207; RV64-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma208; RV64-NEXT:    vluxei64.v v12, (zero), v8209; RV64-NEXT:    vmv1r.v v8, v12210; RV64-NEXT:    ret211  %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 1, <vscale x 4 x i1> splat (i1 1), <vscale x 4 x i8> %passthru)212  ret <vscale x 4 x i8> %v213}214 215define <vscale x 4 x i8> @mgather_falsemask_nxv4i8(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i8> %passthru) {216; RV32-LABEL: mgather_falsemask_nxv4i8:217; RV32:       # %bb.0:218; RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma219; RV32-NEXT:    vmv1r.v v8, v10220; RV32-NEXT:    ret221;222; RV64-LABEL: mgather_falsemask_nxv4i8:223; RV64:       # %bb.0:224; RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma225; RV64-NEXT:    vmv1r.v v8, v12226; RV64-NEXT:    ret227  %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 1, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i8> %passthru)228  ret <vscale x 4 x i8> %v229}230 231define <vscale x 8 x i8> @mgather_nxv8i8(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) {232; RV32-LABEL: mgather_nxv8i8:233; RV32:       # %bb.0:234; RV32-NEXT:    vsetvli a0, zero, e8, m1, ta, mu235; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t236; RV32-NEXT:    vmv.v.v v8, v12237; RV32-NEXT:    ret238;239; RV64-LABEL: mgather_nxv8i8:240; RV64:       # %bb.0:241; RV64-NEXT:    vsetvli a0, zero, e8, m1, ta, mu242; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t243; RV64-NEXT:    vmv.v.v v8, v16244; RV64-NEXT:    ret245  %v = call <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 1, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru)246  ret <vscale x 8 x i8> %v247}248 249define <vscale x 8 x i8> @mgather_baseidx_nxv8i8(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) {250; RV32-LABEL: mgather_baseidx_nxv8i8:251; RV32:       # %bb.0:252; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma253; RV32-NEXT:    vsext.vf4 v12, v8254; RV32-NEXT:    vsetvli zero, zero, e8, m1, ta, mu255; RV32-NEXT:    vluxei32.v v9, (a0), v12, v0.t256; RV32-NEXT:    vmv.v.v v8, v9257; RV32-NEXT:    ret258;259; RV64-LABEL: mgather_baseidx_nxv8i8:260; RV64:       # %bb.0:261; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma262; RV64-NEXT:    vsext.vf8 v16, v8263; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu264; RV64-NEXT:    vluxei64.v v9, (a0), v16, v0.t265; RV64-NEXT:    vmv.v.v v8, v9266; RV64-NEXT:    ret267  %ptrs = getelementptr inbounds i8, ptr %base, <vscale x 8 x i8> %idxs268  %v = call <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 1, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru)269  ret <vscale x 8 x i8> %v270}271 272define <vscale x 1 x i16> @mgather_nxv1i16(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i16> %passthru) {273; RV32-LABEL: mgather_nxv1i16:274; RV32:       # %bb.0:275; RV32-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu276; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t277; RV32-NEXT:    vmv1r.v v8, v9278; RV32-NEXT:    ret279;280; RV64-LABEL: mgather_nxv1i16:281; RV64:       # %bb.0:282; RV64-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu283; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t284; RV64-NEXT:    vmv1r.v v8, v9285; RV64-NEXT:    ret286  %v = call <vscale x 1 x i16> @llvm.masked.gather.nxv1i16.nxv1p0(<vscale x 1 x ptr> %ptrs, i32 2, <vscale x 1 x i1> %m, <vscale x 1 x i16> %passthru)287  ret <vscale x 1 x i16> %v288}289 290define <vscale x 2 x i16> @mgather_nxv2i16(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {291; RV32-LABEL: mgather_nxv2i16:292; RV32:       # %bb.0:293; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu294; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t295; RV32-NEXT:    vmv1r.v v8, v9296; RV32-NEXT:    ret297;298; RV64-LABEL: mgather_nxv2i16:299; RV64:       # %bb.0:300; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu301; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t302; RV64-NEXT:    vmv1r.v v8, v10303; RV64-NEXT:    ret304  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)305  ret <vscale x 2 x i16> %v306}307 308define <vscale x 2 x i32> @mgather_nxv2i16_sextload_nxv2i32(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {309; RV32-LABEL: mgather_nxv2i16_sextload_nxv2i32:310; RV32:       # %bb.0:311; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu312; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t313; RV32-NEXT:    vsetvli zero, zero, e32, m1, ta, ma314; RV32-NEXT:    vsext.vf2 v8, v9315; RV32-NEXT:    ret316;317; RV64-LABEL: mgather_nxv2i16_sextload_nxv2i32:318; RV64:       # %bb.0:319; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu320; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t321; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, ma322; RV64-NEXT:    vsext.vf2 v8, v10323; RV64-NEXT:    ret324  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)325  %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i32>326  ret <vscale x 2 x i32> %ev327}328 329define <vscale x 2 x i32> @mgather_nxv2i16_zextload_nxv2i32(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {330; RV32-LABEL: mgather_nxv2i16_zextload_nxv2i32:331; RV32:       # %bb.0:332; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu333; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t334; RV32-NEXT:    vsetvli zero, zero, e32, m1, ta, ma335; RV32-NEXT:    vzext.vf2 v8, v9336; RV32-NEXT:    ret337;338; RV64-LABEL: mgather_nxv2i16_zextload_nxv2i32:339; RV64:       # %bb.0:340; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu341; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t342; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, ma343; RV64-NEXT:    vzext.vf2 v8, v10344; RV64-NEXT:    ret345  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)346  %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i32>347  ret <vscale x 2 x i32> %ev348}349 350define <vscale x 2 x i64> @mgather_nxv2i16_sextload_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {351; RV32-LABEL: mgather_nxv2i16_sextload_nxv2i64:352; RV32:       # %bb.0:353; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu354; RV32-NEXT:    vmv1r.v v10, v9355; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t356; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, ma357; RV32-NEXT:    vsext.vf4 v8, v10358; RV32-NEXT:    ret359;360; RV64-LABEL: mgather_nxv2i16_sextload_nxv2i64:361; RV64:       # %bb.0:362; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu363; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t364; RV64-NEXT:    vsetvli zero, zero, e64, m2, ta, ma365; RV64-NEXT:    vsext.vf4 v8, v10366; RV64-NEXT:    ret367  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)368  %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i64>369  ret <vscale x 2 x i64> %ev370}371 372define <vscale x 2 x i64> @mgather_nxv2i16_zextload_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {373; RV32-LABEL: mgather_nxv2i16_zextload_nxv2i64:374; RV32:       # %bb.0:375; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu376; RV32-NEXT:    vmv1r.v v10, v9377; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t378; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, ma379; RV32-NEXT:    vzext.vf4 v8, v10380; RV32-NEXT:    ret381;382; RV64-LABEL: mgather_nxv2i16_zextload_nxv2i64:383; RV64:       # %bb.0:384; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu385; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t386; RV64-NEXT:    vsetvli zero, zero, e64, m2, ta, ma387; RV64-NEXT:    vzext.vf4 v8, v10388; RV64-NEXT:    ret389  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)390  %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i64>391  ret <vscale x 2 x i64> %ev392}393 394define <vscale x 4 x i16> @mgather_nxv4i16(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i16> %passthru) {395; RV32-LABEL: mgather_nxv4i16:396; RV32:       # %bb.0:397; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, mu398; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t399; RV32-NEXT:    vmv.v.v v8, v10400; RV32-NEXT:    ret401;402; RV64-LABEL: mgather_nxv4i16:403; RV64:       # %bb.0:404; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, mu405; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t406; RV64-NEXT:    vmv.v.v v8, v12407; RV64-NEXT:    ret408  %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> %m, <vscale x 4 x i16> %passthru)409  ret <vscale x 4 x i16> %v410}411 412define <vscale x 4 x i16> @mgather_truemask_nxv4i16(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i16> %passthru) {413; RV32-LABEL: mgather_truemask_nxv4i16:414; RV32:       # %bb.0:415; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, ma416; RV32-NEXT:    vluxei32.v v10, (zero), v8417; RV32-NEXT:    vmv.v.v v8, v10418; RV32-NEXT:    ret419;420; RV64-LABEL: mgather_truemask_nxv4i16:421; RV64:       # %bb.0:422; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, ma423; RV64-NEXT:    vluxei64.v v12, (zero), v8424; RV64-NEXT:    vmv.v.v v8, v12425; RV64-NEXT:    ret426  %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> splat (i1 1), <vscale x 4 x i16> %passthru)427  ret <vscale x 4 x i16> %v428}429 430define <vscale x 4 x i16> @mgather_falsemask_nxv4i16(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i16> %passthru) {431; RV32-LABEL: mgather_falsemask_nxv4i16:432; RV32:       # %bb.0:433; RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma434; RV32-NEXT:    vmv1r.v v8, v10435; RV32-NEXT:    ret436;437; RV64-LABEL: mgather_falsemask_nxv4i16:438; RV64:       # %bb.0:439; RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma440; RV64-NEXT:    vmv1r.v v8, v12441; RV64-NEXT:    ret442  %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i16> %passthru)443  ret <vscale x 4 x i16> %v444}445 446define <vscale x 8 x i16> @mgather_nxv8i16(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {447; RV32-LABEL: mgather_nxv8i16:448; RV32:       # %bb.0:449; RV32-NEXT:    vsetvli a0, zero, e16, m2, ta, mu450; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t451; RV32-NEXT:    vmv.v.v v8, v12452; RV32-NEXT:    ret453;454; RV64-LABEL: mgather_nxv8i16:455; RV64:       # %bb.0:456; RV64-NEXT:    vsetvli a0, zero, e16, m2, ta, mu457; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t458; RV64-NEXT:    vmv.v.v v8, v16459; RV64-NEXT:    ret460  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)461  ret <vscale x 8 x i16> %v462}463 464define <vscale x 8 x i16> @mgather_baseidx_nxv8i8_nxv8i16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {465; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i16:466; RV32:       # %bb.0:467; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma468; RV32-NEXT:    vsext.vf4 v12, v8469; RV32-NEXT:    vadd.vv v12, v12, v12470; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu471; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t472; RV32-NEXT:    vmv.v.v v8, v10473; RV32-NEXT:    ret474;475; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i16:476; RV64:       # %bb.0:477; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma478; RV64-NEXT:    vsext.vf8 v16, v8479; RV64-NEXT:    vadd.vv v16, v16, v16480; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu481; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t482; RV64-NEXT:    vmv.v.v v8, v10483; RV64-NEXT:    ret484  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i8> %idxs485  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)486  ret <vscale x 8 x i16> %v487}488 489define <vscale x 8 x i16> @mgather_baseidx_sext_nxv8i8_nxv8i16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {490; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i16:491; RV32:       # %bb.0:492; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma493; RV32-NEXT:    vsext.vf4 v12, v8494; RV32-NEXT:    vadd.vv v12, v12, v12495; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu496; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t497; RV32-NEXT:    vmv.v.v v8, v10498; RV32-NEXT:    ret499;500; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i16:501; RV64:       # %bb.0:502; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma503; RV64-NEXT:    vsext.vf8 v16, v8504; RV64-NEXT:    vadd.vv v16, v16, v16505; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu506; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t507; RV64-NEXT:    vmv.v.v v8, v10508; RV64-NEXT:    ret509  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>510  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i16> %eidxs511  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)512  ret <vscale x 8 x i16> %v513}514 515define <vscale x 8 x i16> @mgather_baseidx_zext_nxv8i8_nxv8i16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {516; CHECK-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i16:517; CHECK:       # %bb.0:518; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, ma519; CHECK-NEXT:    vwaddu.vv v12, v8, v8520; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, mu521; CHECK-NEXT:    vluxei16.v v10, (a0), v12, v0.t522; CHECK-NEXT:    vmv.v.v v8, v10523; CHECK-NEXT:    ret524  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>525  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i16> %eidxs526  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)527  ret <vscale x 8 x i16> %v528}529 530define <vscale x 8 x i16> @mgather_baseidx_nxv8i16(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {531; RV32-LABEL: mgather_baseidx_nxv8i16:532; RV32:       # %bb.0:533; RV32-NEXT:    vsetvli a1, zero, e16, m2, ta, mu534; RV32-NEXT:    vwadd.vv v12, v8, v8535; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t536; RV32-NEXT:    vmv.v.v v8, v10537; RV32-NEXT:    ret538;539; RV64-LABEL: mgather_baseidx_nxv8i16:540; RV64:       # %bb.0:541; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma542; RV64-NEXT:    vsext.vf4 v16, v8543; RV64-NEXT:    vadd.vv v16, v16, v16544; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu545; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t546; RV64-NEXT:    vmv.v.v v8, v10547; RV64-NEXT:    ret548  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i16> %idxs549  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)550  ret <vscale x 8 x i16> %v551}552 553define <vscale x 1 x i32> @mgather_nxv1i32(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i32> %passthru) {554; RV32-LABEL: mgather_nxv1i32:555; RV32:       # %bb.0:556; RV32-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu557; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t558; RV32-NEXT:    vmv1r.v v8, v9559; RV32-NEXT:    ret560;561; RV64-LABEL: mgather_nxv1i32:562; RV64:       # %bb.0:563; RV64-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu564; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t565; RV64-NEXT:    vmv1r.v v8, v9566; RV64-NEXT:    ret567  %v = call <vscale x 1 x i32> @llvm.masked.gather.nxv1i32.nxv1p0(<vscale x 1 x ptr> %ptrs, i32 4, <vscale x 1 x i1> %m, <vscale x 1 x i32> %passthru)568  ret <vscale x 1 x i32> %v569}570 571define <vscale x 2 x i32> @mgather_nxv2i32(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) {572; RV32-LABEL: mgather_nxv2i32:573; RV32:       # %bb.0:574; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, mu575; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t576; RV32-NEXT:    vmv.v.v v8, v9577; RV32-NEXT:    ret578;579; RV64-LABEL: mgather_nxv2i32:580; RV64:       # %bb.0:581; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, mu582; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t583; RV64-NEXT:    vmv.v.v v8, v10584; RV64-NEXT:    ret585  %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru)586  ret <vscale x 2 x i32> %v587}588 589define <vscale x 2 x i64> @mgather_nxv2i32_sextload_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) {590; RV32-LABEL: mgather_nxv2i32_sextload_nxv2i64:591; RV32:       # %bb.0:592; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, mu593; RV32-NEXT:    vmv1r.v v10, v9594; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t595; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, ma596; RV32-NEXT:    vsext.vf2 v8, v10597; RV32-NEXT:    ret598;599; RV64-LABEL: mgather_nxv2i32_sextload_nxv2i64:600; RV64:       # %bb.0:601; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, mu602; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t603; RV64-NEXT:    vsetvli zero, zero, e64, m2, ta, ma604; RV64-NEXT:    vsext.vf2 v8, v10605; RV64-NEXT:    ret606  %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru)607  %ev = sext <vscale x 2 x i32> %v to <vscale x 2 x i64>608  ret <vscale x 2 x i64> %ev609}610 611define <vscale x 2 x i64> @mgather_nxv2i32_zextload_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) {612; RV32-LABEL: mgather_nxv2i32_zextload_nxv2i64:613; RV32:       # %bb.0:614; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, mu615; RV32-NEXT:    vmv1r.v v10, v9616; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t617; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, ma618; RV32-NEXT:    vzext.vf2 v8, v10619; RV32-NEXT:    ret620;621; RV64-LABEL: mgather_nxv2i32_zextload_nxv2i64:622; RV64:       # %bb.0:623; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, mu624; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t625; RV64-NEXT:    vsetvli zero, zero, e64, m2, ta, ma626; RV64-NEXT:    vzext.vf2 v8, v10627; RV64-NEXT:    ret628  %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru)629  %ev = zext <vscale x 2 x i32> %v to <vscale x 2 x i64>630  ret <vscale x 2 x i64> %ev631}632 633define <vscale x 4 x i32> @mgather_nxv4i32(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i32> %passthru) {634; RV32-LABEL: mgather_nxv4i32:635; RV32:       # %bb.0:636; RV32-NEXT:    vsetvli a0, zero, e32, m2, ta, mu637; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t638; RV32-NEXT:    vmv.v.v v8, v10639; RV32-NEXT:    ret640;641; RV64-LABEL: mgather_nxv4i32:642; RV64:       # %bb.0:643; RV64-NEXT:    vsetvli a0, zero, e32, m2, ta, mu644; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t645; RV64-NEXT:    vmv.v.v v8, v12646; RV64-NEXT:    ret647  %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 4, <vscale x 4 x i1> %m, <vscale x 4 x i32> %passthru)648  ret <vscale x 4 x i32> %v649}650 651define <vscale x 4 x i32> @mgather_truemask_nxv4i32(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i32> %passthru) {652; RV32-LABEL: mgather_truemask_nxv4i32:653; RV32:       # %bb.0:654; RV32-NEXT:    vsetvli a0, zero, e32, m2, ta, ma655; RV32-NEXT:    vluxei32.v v8, (zero), v8656; RV32-NEXT:    ret657;658; RV64-LABEL: mgather_truemask_nxv4i32:659; RV64:       # %bb.0:660; RV64-NEXT:    vsetvli a0, zero, e32, m2, ta, ma661; RV64-NEXT:    vluxei64.v v12, (zero), v8662; RV64-NEXT:    vmv.v.v v8, v12663; RV64-NEXT:    ret664  %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 4, <vscale x 4 x i1> splat (i1 1), <vscale x 4 x i32> %passthru)665  ret <vscale x 4 x i32> %v666}667 668define <vscale x 4 x i32> @mgather_falsemask_nxv4i32(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i32> %passthru) {669; RV32-LABEL: mgather_falsemask_nxv4i32:670; RV32:       # %bb.0:671; RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma672; RV32-NEXT:    vmv2r.v v8, v10673; RV32-NEXT:    ret674;675; RV64-LABEL: mgather_falsemask_nxv4i32:676; RV64:       # %bb.0:677; RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma678; RV64-NEXT:    vmv2r.v v8, v12679; RV64-NEXT:    ret680  %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 4, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i32> %passthru)681  ret <vscale x 4 x i32> %v682}683 684define <vscale x 8 x i32> @mgather_nxv8i32(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {685; RV32-LABEL: mgather_nxv8i32:686; RV32:       # %bb.0:687; RV32-NEXT:    vsetvli a0, zero, e32, m4, ta, mu688; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t689; RV32-NEXT:    vmv.v.v v8, v12690; RV32-NEXT:    ret691;692; RV64-LABEL: mgather_nxv8i32:693; RV64:       # %bb.0:694; RV64-NEXT:    vsetvli a0, zero, e32, m4, ta, mu695; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t696; RV64-NEXT:    vmv.v.v v8, v16697; RV64-NEXT:    ret698  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)699  ret <vscale x 8 x i32> %v700}701 702define <vscale x 8 x i32> @mgather_baseidx_nxv8i8_nxv8i32(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {703; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i32:704; RV32:       # %bb.0:705; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu706; RV32-NEXT:    vsext.vf4 v16, v8707; RV32-NEXT:    vsll.vi v8, v16, 2708; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t709; RV32-NEXT:    vmv.v.v v8, v12710; RV32-NEXT:    ret711;712; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i32:713; RV64:       # %bb.0:714; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma715; RV64-NEXT:    vsext.vf8 v16, v8716; RV64-NEXT:    vsll.vi v16, v16, 2717; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu718; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t719; RV64-NEXT:    vmv.v.v v8, v12720; RV64-NEXT:    ret721  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i8> %idxs722  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)723  ret <vscale x 8 x i32> %v724}725 726define <vscale x 8 x i32> @mgather_baseidx_sext_nxv8i8_nxv8i32(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {727; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i32:728; RV32:       # %bb.0:729; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu730; RV32-NEXT:    vsext.vf4 v16, v8731; RV32-NEXT:    vsll.vi v8, v16, 2732; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t733; RV32-NEXT:    vmv.v.v v8, v12734; RV32-NEXT:    ret735;736; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i32:737; RV64:       # %bb.0:738; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma739; RV64-NEXT:    vsext.vf8 v16, v8740; RV64-NEXT:    vsll.vi v16, v16, 2741; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu742; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t743; RV64-NEXT:    vmv.v.v v8, v12744; RV64-NEXT:    ret745  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>746  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs747  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)748  ret <vscale x 8 x i32> %v749}750 751define <vscale x 8 x i32> @mgather_baseidx_zext_nxv8i8_nxv8i32(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {752; CHECK-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i32:753; CHECK:       # %bb.0:754; CHECK-NEXT:    li a1, 4755; CHECK-NEXT:    vsetvli a2, zero, e8, m1, ta, ma756; CHECK-NEXT:    vwmulu.vx v10, v8, a1757; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, mu758; CHECK-NEXT:    vluxei16.v v12, (a0), v10, v0.t759; CHECK-NEXT:    vmv.v.v v8, v12760; CHECK-NEXT:    ret761  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>762  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs763  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)764  ret <vscale x 8 x i32> %v765}766 767define <vscale x 8 x i32> @mgather_baseidx_nxv8i16_nxv8i32(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {768; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8i32:769; RV32:       # %bb.0:770; RV32-NEXT:    li a1, 4771; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma772; RV32-NEXT:    vwmulsu.vx v16, v8, a1773; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu774; RV32-NEXT:    vluxei32.v v12, (a0), v16, v0.t775; RV32-NEXT:    vmv.v.v v8, v12776; RV32-NEXT:    ret777;778; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8i32:779; RV64:       # %bb.0:780; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma781; RV64-NEXT:    vsext.vf4 v16, v8782; RV64-NEXT:    vsll.vi v16, v16, 2783; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu784; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t785; RV64-NEXT:    vmv.v.v v8, v12786; RV64-NEXT:    ret787  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i16> %idxs788  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)789  ret <vscale x 8 x i32> %v790}791 792define <vscale x 8 x i32> @mgather_baseidx_sext_nxv8i16_nxv8i32(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {793; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i32:794; RV32:       # %bb.0:795; RV32-NEXT:    li a1, 4796; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma797; RV32-NEXT:    vwmulsu.vx v16, v8, a1798; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu799; RV32-NEXT:    vluxei32.v v12, (a0), v16, v0.t800; RV32-NEXT:    vmv.v.v v8, v12801; RV32-NEXT:    ret802;803; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i32:804; RV64:       # %bb.0:805; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma806; RV64-NEXT:    vsext.vf4 v16, v8807; RV64-NEXT:    vsll.vi v16, v16, 2808; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu809; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t810; RV64-NEXT:    vmv.v.v v8, v12811; RV64-NEXT:    ret812  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>813  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs814  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)815  ret <vscale x 8 x i32> %v816}817 818define <vscale x 8 x i32> @mgather_baseidx_zext_nxv8i16_nxv8i32(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {819; CHECK-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i32:820; CHECK:       # %bb.0:821; CHECK-NEXT:    li a1, 4822; CHECK-NEXT:    vsetvli a2, zero, e16, m2, ta, ma823; CHECK-NEXT:    vwmulu.vx v16, v8, a1824; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, mu825; CHECK-NEXT:    vluxei32.v v12, (a0), v16, v0.t826; CHECK-NEXT:    vmv.v.v v8, v12827; CHECK-NEXT:    ret828  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>829  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs830  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)831  ret <vscale x 8 x i32> %v832}833 834define <vscale x 8 x i32> @mgather_baseidx_nxv8i32(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {835; RV32-LABEL: mgather_baseidx_nxv8i32:836; RV32:       # %bb.0:837; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu838; RV32-NEXT:    vsll.vi v8, v8, 2839; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t840; RV32-NEXT:    vmv.v.v v8, v12841; RV32-NEXT:    ret842;843; RV64-LABEL: mgather_baseidx_nxv8i32:844; RV64:       # %bb.0:845; RV64-NEXT:    li a1, 4846; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, mu847; RV64-NEXT:    vwmulsu.vx v16, v8, a1848; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t849; RV64-NEXT:    vmv.v.v v8, v12850; RV64-NEXT:    ret851  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %idxs852  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)853  ret <vscale x 8 x i32> %v854}855 856define <vscale x 1 x i64> @mgather_nxv1i64(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i64> %passthru) {857; RV32-LABEL: mgather_nxv1i64:858; RV32:       # %bb.0:859; RV32-NEXT:    vsetvli a0, zero, e64, m1, ta, mu860; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t861; RV32-NEXT:    vmv.v.v v8, v9862; RV32-NEXT:    ret863;864; RV64-LABEL: mgather_nxv1i64:865; RV64:       # %bb.0:866; RV64-NEXT:    vsetvli a0, zero, e64, m1, ta, mu867; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t868; RV64-NEXT:    vmv.v.v v8, v9869; RV64-NEXT:    ret870  %v = call <vscale x 1 x i64> @llvm.masked.gather.nxv1i64.nxv1p0(<vscale x 1 x ptr> %ptrs, i32 8, <vscale x 1 x i1> %m, <vscale x 1 x i64> %passthru)871  ret <vscale x 1 x i64> %v872}873 874define <vscale x 2 x i64> @mgather_nxv2i64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i64> %passthru) {875; RV32-LABEL: mgather_nxv2i64:876; RV32:       # %bb.0:877; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, mu878; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t879; RV32-NEXT:    vmv.v.v v8, v10880; RV32-NEXT:    ret881;882; RV64-LABEL: mgather_nxv2i64:883; RV64:       # %bb.0:884; RV64-NEXT:    vsetvli a0, zero, e64, m2, ta, mu885; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t886; RV64-NEXT:    vmv.v.v v8, v10887; RV64-NEXT:    ret888  %v = call <vscale x 2 x i64> @llvm.masked.gather.nxv2i64.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 8, <vscale x 2 x i1> %m, <vscale x 2 x i64> %passthru)889  ret <vscale x 2 x i64> %v890}891 892define <vscale x 4 x i64> @mgather_nxv4i64(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i64> %passthru) {893; RV32-LABEL: mgather_nxv4i64:894; RV32:       # %bb.0:895; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, mu896; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t897; RV32-NEXT:    vmv.v.v v8, v12898; RV32-NEXT:    ret899;900; RV64-LABEL: mgather_nxv4i64:901; RV64:       # %bb.0:902; RV64-NEXT:    vsetvli a0, zero, e64, m4, ta, mu903; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t904; RV64-NEXT:    vmv.v.v v8, v12905; RV64-NEXT:    ret906  %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 8, <vscale x 4 x i1> %m, <vscale x 4 x i64> %passthru)907  ret <vscale x 4 x i64> %v908}909 910define <vscale x 4 x i64> @mgather_truemask_nxv4i64(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i64> %passthru) {911; RV32-LABEL: mgather_truemask_nxv4i64:912; RV32:       # %bb.0:913; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, ma914; RV32-NEXT:    vmv2r.v v12, v8915; RV32-NEXT:    vluxei32.v v8, (zero), v12916; RV32-NEXT:    ret917;918; RV64-LABEL: mgather_truemask_nxv4i64:919; RV64:       # %bb.0:920; RV64-NEXT:    vsetvli a0, zero, e64, m4, ta, ma921; RV64-NEXT:    vluxei64.v v8, (zero), v8922; RV64-NEXT:    ret923  %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 8, <vscale x 4 x i1> splat (i1 1), <vscale x 4 x i64> %passthru)924  ret <vscale x 4 x i64> %v925}926 927define <vscale x 4 x i64> @mgather_falsemask_nxv4i64(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i64> %passthru) {928; CHECK-LABEL: mgather_falsemask_nxv4i64:929; CHECK:       # %bb.0:930; CHECK-NEXT:    vsetivli zero, 1, e8, m1, ta, ma931; CHECK-NEXT:    vmv4r.v v8, v12932; CHECK-NEXT:    ret933  %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 8, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i64> %passthru)934  ret <vscale x 4 x i64> %v935}936 937define <vscale x 8 x i64> @mgather_nxv8i64(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {938; RV32-LABEL: mgather_nxv8i64:939; RV32:       # %bb.0:940; RV32-NEXT:    vsetvli a0, zero, e64, m8, ta, mu941; RV32-NEXT:    vluxei32.v v16, (zero), v8, v0.t942; RV32-NEXT:    vmv.v.v v8, v16943; RV32-NEXT:    ret944;945; RV64-LABEL: mgather_nxv8i64:946; RV64:       # %bb.0:947; RV64-NEXT:    vsetvli a0, zero, e64, m8, ta, mu948; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t949; RV64-NEXT:    vmv.v.v v8, v16950; RV64-NEXT:    ret951  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)952  ret <vscale x 8 x i64> %v953}954 955define <vscale x 8 x i64> @mgather_baseidx_nxv8i8_nxv8i64(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {956; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i64:957; RV32:       # %bb.0:958; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma959; RV32-NEXT:    vsext.vf4 v12, v8960; RV32-NEXT:    vsll.vi v8, v12, 3961; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu962; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t963; RV32-NEXT:    vmv.v.v v8, v16964; RV32-NEXT:    ret965;966; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i64:967; RV64:       # %bb.0:968; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu969; RV64-NEXT:    vsext.vf8 v24, v8970; RV64-NEXT:    vsll.vi v8, v24, 3971; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t972; RV64-NEXT:    vmv.v.v v8, v16973; RV64-NEXT:    ret974  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i8> %idxs975  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)976  ret <vscale x 8 x i64> %v977}978 979define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i8_nxv8i64(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {980; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i64:981; RV32:       # %bb.0:982; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma983; RV32-NEXT:    vsext.vf4 v12, v8984; RV32-NEXT:    vsll.vi v8, v12, 3985; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu986; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t987; RV32-NEXT:    vmv.v.v v8, v16988; RV32-NEXT:    ret989;990; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i64:991; RV64:       # %bb.0:992; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu993; RV64-NEXT:    vsext.vf8 v24, v8994; RV64-NEXT:    vsll.vi v8, v24, 3995; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t996; RV64-NEXT:    vmv.v.v v8, v16997; RV64-NEXT:    ret998  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>999  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1000  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)1001  ret <vscale x 8 x i64> %v1002}1003 1004define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i8_nxv8i64(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {1005; CHECK-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i64:1006; CHECK:       # %bb.0:1007; CHECK-NEXT:    li a1, 81008; CHECK-NEXT:    vsetvli a2, zero, e8, m1, ta, ma1009; CHECK-NEXT:    vwmulu.vx v10, v8, a11010; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu1011; CHECK-NEXT:    vluxei16.v v16, (a0), v10, v0.t1012; CHECK-NEXT:    vmv.v.v v8, v161013; CHECK-NEXT:    ret1014  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>1015  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1016  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)1017  ret <vscale x 8 x i64> %v1018}1019 1020define <vscale x 8 x i64> @mgather_baseidx_nxv8i16_nxv8i64(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {1021; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8i64:1022; RV32:       # %bb.0:1023; RV32-NEXT:    li a1, 81024; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma1025; RV32-NEXT:    vwmulsu.vx v12, v8, a11026; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu1027; RV32-NEXT:    vluxei32.v v16, (a0), v12, v0.t1028; RV32-NEXT:    vmv.v.v v8, v161029; RV32-NEXT:    ret1030;1031; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8i64:1032; RV64:       # %bb.0:1033; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu1034; RV64-NEXT:    vsext.vf4 v24, v81035; RV64-NEXT:    vsll.vi v8, v24, 31036; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t1037; RV64-NEXT:    vmv.v.v v8, v161038; RV64-NEXT:    ret1039  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i16> %idxs1040  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)1041  ret <vscale x 8 x i64> %v1042}1043 1044define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i16_nxv8i64(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {1045; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i64:1046; RV32:       # %bb.0:1047; RV32-NEXT:    li a1, 81048; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma1049; RV32-NEXT:    vwmulsu.vx v12, v8, a11050; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu1051; RV32-NEXT:    vluxei32.v v16, (a0), v12, v0.t1052; RV32-NEXT:    vmv.v.v v8, v161053; RV32-NEXT:    ret1054;1055; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i64:1056; RV64:       # %bb.0:1057; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu1058; RV64-NEXT:    vsext.vf4 v24, v81059; RV64-NEXT:    vsll.vi v8, v24, 31060; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t1061; RV64-NEXT:    vmv.v.v v8, v161062; RV64-NEXT:    ret1063  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>1064  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1065  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)1066  ret <vscale x 8 x i64> %v1067}1068 1069define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i16_nxv8i64(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {1070; CHECK-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i64:1071; CHECK:       # %bb.0:1072; CHECK-NEXT:    li a1, 81073; CHECK-NEXT:    vsetvli a2, zero, e16, m2, ta, ma1074; CHECK-NEXT:    vwmulu.vx v12, v8, a11075; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu1076; CHECK-NEXT:    vluxei32.v v16, (a0), v12, v0.t1077; CHECK-NEXT:    vmv.v.v v8, v161078; CHECK-NEXT:    ret1079  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>1080  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1081  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)1082  ret <vscale x 8 x i64> %v1083}1084 1085define <vscale x 8 x i64> @mgather_baseidx_nxv8i32_nxv8i64(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {1086; RV32-LABEL: mgather_baseidx_nxv8i32_nxv8i64:1087; RV32:       # %bb.0:1088; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1089; RV32-NEXT:    vsll.vi v8, v8, 31090; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu1091; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t1092; RV32-NEXT:    vmv.v.v v8, v161093; RV32-NEXT:    ret1094;1095; RV64-LABEL: mgather_baseidx_nxv8i32_nxv8i64:1096; RV64:       # %bb.0:1097; RV64-NEXT:    li a1, 81098; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma1099; RV64-NEXT:    vwmulsu.vx v24, v8, a11100; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, mu1101; RV64-NEXT:    vluxei64.v v16, (a0), v24, v0.t1102; RV64-NEXT:    vmv.v.v v8, v161103; RV64-NEXT:    ret1104  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i32> %idxs1105  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)1106  ret <vscale x 8 x i64> %v1107}1108 1109define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i32_nxv8i64(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {1110; RV32-LABEL: mgather_baseidx_sext_nxv8i32_nxv8i64:1111; RV32:       # %bb.0:1112; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1113; RV32-NEXT:    vsll.vi v8, v8, 31114; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu1115; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t1116; RV32-NEXT:    vmv.v.v v8, v161117; RV32-NEXT:    ret1118;1119; RV64-LABEL: mgather_baseidx_sext_nxv8i32_nxv8i64:1120; RV64:       # %bb.0:1121; RV64-NEXT:    li a1, 81122; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma1123; RV64-NEXT:    vwmulsu.vx v24, v8, a11124; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, mu1125; RV64-NEXT:    vluxei64.v v16, (a0), v24, v0.t1126; RV64-NEXT:    vmv.v.v v8, v161127; RV64-NEXT:    ret1128  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>1129  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1130  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)1131  ret <vscale x 8 x i64> %v1132}1133 1134define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i32_nxv8i64(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {1135; RV32-LABEL: mgather_baseidx_zext_nxv8i32_nxv8i64:1136; RV32:       # %bb.0:1137; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1138; RV32-NEXT:    vsll.vi v8, v8, 31139; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu1140; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t1141; RV32-NEXT:    vmv.v.v v8, v161142; RV32-NEXT:    ret1143;1144; RV64-LABEL: mgather_baseidx_zext_nxv8i32_nxv8i64:1145; RV64:       # %bb.0:1146; RV64-NEXT:    li a1, 81147; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma1148; RV64-NEXT:    vwmulu.vx v24, v8, a11149; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, mu1150; RV64-NEXT:    vluxei64.v v16, (a0), v24, v0.t1151; RV64-NEXT:    vmv.v.v v8, v161152; RV64-NEXT:    ret1153  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>1154  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs1155  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)1156  ret <vscale x 8 x i64> %v1157}1158 1159define <vscale x 8 x i64> @mgather_baseidx_nxv8i64(ptr %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {1160; RV32-LABEL: mgather_baseidx_nxv8i64:1161; RV32:       # %bb.0:1162; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1163; RV32-NEXT:    vnsrl.wi v24, v8, 01164; RV32-NEXT:    vsll.vi v8, v24, 31165; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu1166; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t1167; RV32-NEXT:    vmv.v.v v8, v161168; RV32-NEXT:    ret1169;1170; RV64-LABEL: mgather_baseidx_nxv8i64:1171; RV64:       # %bb.0:1172; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu1173; RV64-NEXT:    vsll.vi v8, v8, 31174; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t1175; RV64-NEXT:    vmv.v.v v8, v161176; RV64-NEXT:    ret1177  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %idxs1178  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)1179  ret <vscale x 8 x i64> %v1180}1181 1182define void @mgather_nxv16i64(<vscale x 8 x ptr> %ptrs0, <vscale x 8 x ptr> %ptrs1, <vscale x 16 x i1> %m, <vscale x 8 x i64> %passthru0, <vscale x 8 x i64> %passthru1, ptr %out) {1183; RV32-LABEL: mgather_nxv16i64:1184; RV32:       # %bb.0:1185; RV32-NEXT:    vl8re64.v v24, (a0)1186; RV32-NEXT:    csrr a0, vlenb1187; RV32-NEXT:    vsetvli a2, zero, e64, m8, ta, mu1188; RV32-NEXT:    vluxei32.v v16, (zero), v8, v0.t1189; RV32-NEXT:    srli a2, a0, 31190; RV32-NEXT:    vsetvli a3, zero, e8, mf4, ta, ma1191; RV32-NEXT:    vslidedown.vx v0, v0, a21192; RV32-NEXT:    vsetvli a2, zero, e64, m8, ta, mu1193; RV32-NEXT:    vluxei32.v v24, (zero), v12, v0.t1194; RV32-NEXT:    slli a0, a0, 31195; RV32-NEXT:    add a0, a1, a01196; RV32-NEXT:    vs8r.v v24, (a0)1197; RV32-NEXT:    vs8r.v v16, (a1)1198; RV32-NEXT:    ret1199;1200; RV64-LABEL: mgather_nxv16i64:1201; RV64:       # %bb.0:1202; RV64-NEXT:    vl8re64.v v24, (a0)1203; RV64-NEXT:    vsetvli a0, zero, e64, m8, ta, mu1204; RV64-NEXT:    vluxei64.v v24, (zero), v8, v0.t1205; RV64-NEXT:    vl8re64.v v8, (a1)1206; RV64-NEXT:    csrr a0, vlenb1207; RV64-NEXT:    srli a1, a0, 31208; RV64-NEXT:    vsetvli a3, zero, e8, mf4, ta, ma1209; RV64-NEXT:    vslidedown.vx v0, v0, a11210; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu1211; RV64-NEXT:    vluxei64.v v8, (zero), v16, v0.t1212; RV64-NEXT:    slli a0, a0, 31213; RV64-NEXT:    add a0, a2, a01214; RV64-NEXT:    vs8r.v v8, (a0)1215; RV64-NEXT:    vs8r.v v24, (a2)1216; RV64-NEXT:    ret1217  %p0 = call <vscale x 16 x ptr> @llvm.vector.insert.nxv8p0.nxv16p0(<vscale x 16 x ptr> poison, <vscale x 8 x ptr> %ptrs0, i64 0)1218  %p1 = call <vscale x 16 x ptr> @llvm.vector.insert.nxv8p0.nxv16p0(<vscale x 16 x ptr> %p0, <vscale x 8 x ptr> %ptrs1, i64 8)1219 1220  %pt0 = call <vscale x 16 x i64> @llvm.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64> poison, <vscale x 8 x i64> %passthru0, i64 0)1221  %pt1 = call <vscale x 16 x i64> @llvm.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64> %pt0, <vscale x 8 x i64> %passthru1, i64 8)1222 1223  %v = call <vscale x 16 x i64> @llvm.masked.gather.nxv16i64.nxv16p0(<vscale x 16 x ptr> %p1, i32 8, <vscale x 16 x i1> %m, <vscale x 16 x i64> %pt1)1224  store <vscale x 16 x i64> %v, ptr %out1225  ret void1226}1227 1228define <vscale x 1 x bfloat> @mgather_nxv1bf16(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x bfloat> %passthru) {1229; RV32-LABEL: mgather_nxv1bf16:1230; RV32:       # %bb.0:1231; RV32-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu1232; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t1233; RV32-NEXT:    vmv1r.v v8, v91234; RV32-NEXT:    ret1235;1236; RV64-LABEL: mgather_nxv1bf16:1237; RV64:       # %bb.0:1238; RV64-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu1239; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t1240; RV64-NEXT:    vmv1r.v v8, v91241; RV64-NEXT:    ret1242  %v = call <vscale x 1 x bfloat> @llvm.masked.gather.nxv1bf16.nxv1p0(<vscale x 1 x ptr> %ptrs, i32 2, <vscale x 1 x i1> %m, <vscale x 1 x bfloat> %passthru)1243  ret <vscale x 1 x bfloat> %v1244}1245 1246define <vscale x 2 x bfloat> @mgather_nxv2bf16(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x bfloat> %passthru) {1247; RV32-LABEL: mgather_nxv2bf16:1248; RV32:       # %bb.0:1249; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu1250; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t1251; RV32-NEXT:    vmv1r.v v8, v91252; RV32-NEXT:    ret1253;1254; RV64-LABEL: mgather_nxv2bf16:1255; RV64:       # %bb.0:1256; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu1257; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t1258; RV64-NEXT:    vmv1r.v v8, v101259; RV64-NEXT:    ret1260  %v = call <vscale x 2 x bfloat> @llvm.masked.gather.nxv2bf16.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x bfloat> %passthru)1261  ret <vscale x 2 x bfloat> %v1262}1263 1264define <vscale x 4 x bfloat> @mgather_nxv4bf16(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x bfloat> %passthru) {1265; RV32-LABEL: mgather_nxv4bf16:1266; RV32:       # %bb.0:1267; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, mu1268; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t1269; RV32-NEXT:    vmv.v.v v8, v101270; RV32-NEXT:    ret1271;1272; RV64-LABEL: mgather_nxv4bf16:1273; RV64:       # %bb.0:1274; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, mu1275; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t1276; RV64-NEXT:    vmv.v.v v8, v121277; RV64-NEXT:    ret1278  %v = call <vscale x 4 x bfloat> @llvm.masked.gather.nxv4bf16.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> %m, <vscale x 4 x bfloat> %passthru)1279  ret <vscale x 4 x bfloat> %v1280}1281 1282define <vscale x 4 x bfloat> @mgather_truemask_nxv4bf16(<vscale x 4 x ptr> %ptrs, <vscale x 4 x bfloat> %passthru) {1283; RV32-LABEL: mgather_truemask_nxv4bf16:1284; RV32:       # %bb.0:1285; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, ma1286; RV32-NEXT:    vluxei32.v v10, (zero), v81287; RV32-NEXT:    vmv.v.v v8, v101288; RV32-NEXT:    ret1289;1290; RV64-LABEL: mgather_truemask_nxv4bf16:1291; RV64:       # %bb.0:1292; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, ma1293; RV64-NEXT:    vluxei64.v v12, (zero), v81294; RV64-NEXT:    vmv.v.v v8, v121295; RV64-NEXT:    ret1296  %v = call <vscale x 4 x bfloat> @llvm.masked.gather.nxv4bf16.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> splat (i1 1), <vscale x 4 x bfloat> %passthru)1297  ret <vscale x 4 x bfloat> %v1298}1299 1300define <vscale x 4 x bfloat> @mgather_falsemask_nxv4bf16(<vscale x 4 x ptr> %ptrs, <vscale x 4 x bfloat> %passthru) {1301; RV32-LABEL: mgather_falsemask_nxv4bf16:1302; RV32:       # %bb.0:1303; RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma1304; RV32-NEXT:    vmv1r.v v8, v101305; RV32-NEXT:    ret1306;1307; RV64-LABEL: mgather_falsemask_nxv4bf16:1308; RV64:       # %bb.0:1309; RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma1310; RV64-NEXT:    vmv1r.v v8, v121311; RV64-NEXT:    ret1312  %v = call <vscale x 4 x bfloat> @llvm.masked.gather.nxv4bf16.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x bfloat> %passthru)1313  ret <vscale x 4 x bfloat> %v1314}1315 1316define <vscale x 8 x bfloat> @mgather_nxv8bf16(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x bfloat> %passthru) {1317; RV32-LABEL: mgather_nxv8bf16:1318; RV32:       # %bb.0:1319; RV32-NEXT:    vsetvli a0, zero, e16, m2, ta, mu1320; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t1321; RV32-NEXT:    vmv.v.v v8, v121322; RV32-NEXT:    ret1323;1324; RV64-LABEL: mgather_nxv8bf16:1325; RV64:       # %bb.0:1326; RV64-NEXT:    vsetvli a0, zero, e16, m2, ta, mu1327; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t1328; RV64-NEXT:    vmv.v.v v8, v161329; RV64-NEXT:    ret1330  %v = call <vscale x 8 x bfloat> @llvm.masked.gather.nxv8bf16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x bfloat> %passthru)1331  ret <vscale x 8 x bfloat> %v1332}1333 1334define <vscale x 8 x bfloat> @mgather_baseidx_nxv8i8_nxv8bf16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x bfloat> %passthru) {1335; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8bf16:1336; RV32:       # %bb.0:1337; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1338; RV32-NEXT:    vsext.vf4 v12, v81339; RV32-NEXT:    vadd.vv v12, v12, v121340; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu1341; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t1342; RV32-NEXT:    vmv.v.v v8, v101343; RV32-NEXT:    ret1344;1345; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8bf16:1346; RV64:       # %bb.0:1347; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1348; RV64-NEXT:    vsext.vf8 v16, v81349; RV64-NEXT:    vadd.vv v16, v16, v161350; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu1351; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t1352; RV64-NEXT:    vmv.v.v v8, v101353; RV64-NEXT:    ret1354  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i8> %idxs1355  %v = call <vscale x 8 x bfloat> @llvm.masked.gather.nxv8bf16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x bfloat> %passthru)1356  ret <vscale x 8 x bfloat> %v1357}1358 1359define <vscale x 8 x bfloat> @mgather_baseidx_sext_nxv8i8_nxv8bf16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x bfloat> %passthru) {1360; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8bf16:1361; RV32:       # %bb.0:1362; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1363; RV32-NEXT:    vsext.vf4 v12, v81364; RV32-NEXT:    vadd.vv v12, v12, v121365; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu1366; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t1367; RV32-NEXT:    vmv.v.v v8, v101368; RV32-NEXT:    ret1369;1370; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8bf16:1371; RV64:       # %bb.0:1372; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1373; RV64-NEXT:    vsext.vf8 v16, v81374; RV64-NEXT:    vadd.vv v16, v16, v161375; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu1376; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t1377; RV64-NEXT:    vmv.v.v v8, v101378; RV64-NEXT:    ret1379  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1380  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i16> %eidxs1381  %v = call <vscale x 8 x bfloat> @llvm.masked.gather.nxv8bf16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x bfloat> %passthru)1382  ret <vscale x 8 x bfloat> %v1383}1384 1385define <vscale x 8 x bfloat> @mgather_baseidx_zext_nxv8i8_nxv8bf16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x bfloat> %passthru) {1386; CHECK-LABEL: mgather_baseidx_zext_nxv8i8_nxv8bf16:1387; CHECK:       # %bb.0:1388; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, ma1389; CHECK-NEXT:    vwaddu.vv v12, v8, v81390; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, mu1391; CHECK-NEXT:    vluxei16.v v10, (a0), v12, v0.t1392; CHECK-NEXT:    vmv.v.v v8, v101393; CHECK-NEXT:    ret1394  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1395  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i16> %eidxs1396  %v = call <vscale x 8 x bfloat> @llvm.masked.gather.nxv8bf16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x bfloat> %passthru)1397  ret <vscale x 8 x bfloat> %v1398}1399 1400define <vscale x 8 x bfloat> @mgather_baseidx_nxv8bf16(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x bfloat> %passthru) {1401; RV32-LABEL: mgather_baseidx_nxv8bf16:1402; RV32:       # %bb.0:1403; RV32-NEXT:    vsetvli a1, zero, e16, m2, ta, mu1404; RV32-NEXT:    vwadd.vv v12, v8, v81405; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t1406; RV32-NEXT:    vmv.v.v v8, v101407; RV32-NEXT:    ret1408;1409; RV64-LABEL: mgather_baseidx_nxv8bf16:1410; RV64:       # %bb.0:1411; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1412; RV64-NEXT:    vsext.vf4 v16, v81413; RV64-NEXT:    vadd.vv v16, v16, v161414; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu1415; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t1416; RV64-NEXT:    vmv.v.v v8, v101417; RV64-NEXT:    ret1418  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i16> %idxs1419  %v = call <vscale x 8 x bfloat> @llvm.masked.gather.nxv8bf16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x bfloat> %passthru)1420  ret <vscale x 8 x bfloat> %v1421}1422 1423define <vscale x 1 x half> @mgather_nxv1f16(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x half> %passthru) {1424; RV32-LABEL: mgather_nxv1f16:1425; RV32:       # %bb.0:1426; RV32-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu1427; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t1428; RV32-NEXT:    vmv1r.v v8, v91429; RV32-NEXT:    ret1430;1431; RV64-LABEL: mgather_nxv1f16:1432; RV64:       # %bb.0:1433; RV64-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu1434; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t1435; RV64-NEXT:    vmv1r.v v8, v91436; RV64-NEXT:    ret1437  %v = call <vscale x 1 x half> @llvm.masked.gather.nxv1f16.nxv1p0(<vscale x 1 x ptr> %ptrs, i32 2, <vscale x 1 x i1> %m, <vscale x 1 x half> %passthru)1438  ret <vscale x 1 x half> %v1439}1440 1441define <vscale x 2 x half> @mgather_nxv2f16(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x half> %passthru) {1442; RV32-LABEL: mgather_nxv2f16:1443; RV32:       # %bb.0:1444; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu1445; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t1446; RV32-NEXT:    vmv1r.v v8, v91447; RV32-NEXT:    ret1448;1449; RV64-LABEL: mgather_nxv2f16:1450; RV64:       # %bb.0:1451; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu1452; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t1453; RV64-NEXT:    vmv1r.v v8, v101454; RV64-NEXT:    ret1455  %v = call <vscale x 2 x half> @llvm.masked.gather.nxv2f16.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x half> %passthru)1456  ret <vscale x 2 x half> %v1457}1458 1459define <vscale x 4 x half> @mgather_nxv4f16(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x half> %passthru) {1460; RV32-LABEL: mgather_nxv4f16:1461; RV32:       # %bb.0:1462; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, mu1463; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t1464; RV32-NEXT:    vmv.v.v v8, v101465; RV32-NEXT:    ret1466;1467; RV64-LABEL: mgather_nxv4f16:1468; RV64:       # %bb.0:1469; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, mu1470; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t1471; RV64-NEXT:    vmv.v.v v8, v121472; RV64-NEXT:    ret1473  %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> %m, <vscale x 4 x half> %passthru)1474  ret <vscale x 4 x half> %v1475}1476 1477define <vscale x 4 x half> @mgather_truemask_nxv4f16(<vscale x 4 x ptr> %ptrs, <vscale x 4 x half> %passthru) {1478; RV32-LABEL: mgather_truemask_nxv4f16:1479; RV32:       # %bb.0:1480; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, ma1481; RV32-NEXT:    vluxei32.v v10, (zero), v81482; RV32-NEXT:    vmv.v.v v8, v101483; RV32-NEXT:    ret1484;1485; RV64-LABEL: mgather_truemask_nxv4f16:1486; RV64:       # %bb.0:1487; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, ma1488; RV64-NEXT:    vluxei64.v v12, (zero), v81489; RV64-NEXT:    vmv.v.v v8, v121490; RV64-NEXT:    ret1491  %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> splat (i1 1), <vscale x 4 x half> %passthru)1492  ret <vscale x 4 x half> %v1493}1494 1495define <vscale x 4 x half> @mgather_falsemask_nxv4f16(<vscale x 4 x ptr> %ptrs, <vscale x 4 x half> %passthru) {1496; RV32-LABEL: mgather_falsemask_nxv4f16:1497; RV32:       # %bb.0:1498; RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma1499; RV32-NEXT:    vmv1r.v v8, v101500; RV32-NEXT:    ret1501;1502; RV64-LABEL: mgather_falsemask_nxv4f16:1503; RV64:       # %bb.0:1504; RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma1505; RV64-NEXT:    vmv1r.v v8, v121506; RV64-NEXT:    ret1507  %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x half> %passthru)1508  ret <vscale x 4 x half> %v1509}1510 1511define <vscale x 8 x half> @mgather_nxv8f16(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {1512; RV32-LABEL: mgather_nxv8f16:1513; RV32:       # %bb.0:1514; RV32-NEXT:    vsetvli a0, zero, e16, m2, ta, mu1515; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t1516; RV32-NEXT:    vmv.v.v v8, v121517; RV32-NEXT:    ret1518;1519; RV64-LABEL: mgather_nxv8f16:1520; RV64:       # %bb.0:1521; RV64-NEXT:    vsetvli a0, zero, e16, m2, ta, mu1522; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t1523; RV64-NEXT:    vmv.v.v v8, v161524; RV64-NEXT:    ret1525  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)1526  ret <vscale x 8 x half> %v1527}1528 1529define <vscale x 8 x half> @mgather_baseidx_nxv8i8_nxv8f16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {1530; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f16:1531; RV32:       # %bb.0:1532; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1533; RV32-NEXT:    vsext.vf4 v12, v81534; RV32-NEXT:    vadd.vv v12, v12, v121535; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu1536; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t1537; RV32-NEXT:    vmv.v.v v8, v101538; RV32-NEXT:    ret1539;1540; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f16:1541; RV64:       # %bb.0:1542; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1543; RV64-NEXT:    vsext.vf8 v16, v81544; RV64-NEXT:    vadd.vv v16, v16, v161545; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu1546; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t1547; RV64-NEXT:    vmv.v.v v8, v101548; RV64-NEXT:    ret1549  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i8> %idxs1550  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)1551  ret <vscale x 8 x half> %v1552}1553 1554define <vscale x 8 x half> @mgather_baseidx_sext_nxv8i8_nxv8f16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {1555; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f16:1556; RV32:       # %bb.0:1557; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1558; RV32-NEXT:    vsext.vf4 v12, v81559; RV32-NEXT:    vadd.vv v12, v12, v121560; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu1561; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t1562; RV32-NEXT:    vmv.v.v v8, v101563; RV32-NEXT:    ret1564;1565; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f16:1566; RV64:       # %bb.0:1567; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1568; RV64-NEXT:    vsext.vf8 v16, v81569; RV64-NEXT:    vadd.vv v16, v16, v161570; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu1571; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t1572; RV64-NEXT:    vmv.v.v v8, v101573; RV64-NEXT:    ret1574  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1575  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i16> %eidxs1576  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)1577  ret <vscale x 8 x half> %v1578}1579 1580define <vscale x 8 x half> @mgather_baseidx_zext_nxv8i8_nxv8f16(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {1581; CHECK-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f16:1582; CHECK:       # %bb.0:1583; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, ma1584; CHECK-NEXT:    vwaddu.vv v12, v8, v81585; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, mu1586; CHECK-NEXT:    vluxei16.v v10, (a0), v12, v0.t1587; CHECK-NEXT:    vmv.v.v v8, v101588; CHECK-NEXT:    ret1589  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1590  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i16> %eidxs1591  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)1592  ret <vscale x 8 x half> %v1593}1594 1595define <vscale x 8 x half> @mgather_baseidx_nxv8f16(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {1596; RV32-LABEL: mgather_baseidx_nxv8f16:1597; RV32:       # %bb.0:1598; RV32-NEXT:    vsetvli a1, zero, e16, m2, ta, mu1599; RV32-NEXT:    vwadd.vv v12, v8, v81600; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t1601; RV32-NEXT:    vmv.v.v v8, v101602; RV32-NEXT:    ret1603;1604; RV64-LABEL: mgather_baseidx_nxv8f16:1605; RV64:       # %bb.0:1606; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1607; RV64-NEXT:    vsext.vf4 v16, v81608; RV64-NEXT:    vadd.vv v16, v16, v161609; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu1610; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t1611; RV64-NEXT:    vmv.v.v v8, v101612; RV64-NEXT:    ret1613  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i16> %idxs1614  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)1615  ret <vscale x 8 x half> %v1616}1617 1618define <vscale x 1 x float> @mgather_nxv1f32(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x float> %passthru) {1619; RV32-LABEL: mgather_nxv1f32:1620; RV32:       # %bb.0:1621; RV32-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu1622; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t1623; RV32-NEXT:    vmv1r.v v8, v91624; RV32-NEXT:    ret1625;1626; RV64-LABEL: mgather_nxv1f32:1627; RV64:       # %bb.0:1628; RV64-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu1629; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t1630; RV64-NEXT:    vmv1r.v v8, v91631; RV64-NEXT:    ret1632  %v = call <vscale x 1 x float> @llvm.masked.gather.nxv1f32.nxv1p0(<vscale x 1 x ptr> %ptrs, i32 4, <vscale x 1 x i1> %m, <vscale x 1 x float> %passthru)1633  ret <vscale x 1 x float> %v1634}1635 1636define <vscale x 2 x float> @mgather_nxv2f32(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x float> %passthru) {1637; RV32-LABEL: mgather_nxv2f32:1638; RV32:       # %bb.0:1639; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, mu1640; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t1641; RV32-NEXT:    vmv.v.v v8, v91642; RV32-NEXT:    ret1643;1644; RV64-LABEL: mgather_nxv2f32:1645; RV64:       # %bb.0:1646; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, mu1647; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t1648; RV64-NEXT:    vmv.v.v v8, v101649; RV64-NEXT:    ret1650  %v = call <vscale x 2 x float> @llvm.masked.gather.nxv2f32.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x float> %passthru)1651  ret <vscale x 2 x float> %v1652}1653 1654define <vscale x 4 x float> @mgather_nxv4f32(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x float> %passthru) {1655; RV32-LABEL: mgather_nxv4f32:1656; RV32:       # %bb.0:1657; RV32-NEXT:    vsetvli a0, zero, e32, m2, ta, mu1658; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t1659; RV32-NEXT:    vmv.v.v v8, v101660; RV32-NEXT:    ret1661;1662; RV64-LABEL: mgather_nxv4f32:1663; RV64:       # %bb.0:1664; RV64-NEXT:    vsetvli a0, zero, e32, m2, ta, mu1665; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t1666; RV64-NEXT:    vmv.v.v v8, v121667; RV64-NEXT:    ret1668  %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 4, <vscale x 4 x i1> %m, <vscale x 4 x float> %passthru)1669  ret <vscale x 4 x float> %v1670}1671 1672define <vscale x 4 x float> @mgather_truemask_nxv4f32(<vscale x 4 x ptr> %ptrs, <vscale x 4 x float> %passthru) {1673; RV32-LABEL: mgather_truemask_nxv4f32:1674; RV32:       # %bb.0:1675; RV32-NEXT:    vsetvli a0, zero, e32, m2, ta, ma1676; RV32-NEXT:    vluxei32.v v8, (zero), v81677; RV32-NEXT:    ret1678;1679; RV64-LABEL: mgather_truemask_nxv4f32:1680; RV64:       # %bb.0:1681; RV64-NEXT:    vsetvli a0, zero, e32, m2, ta, ma1682; RV64-NEXT:    vluxei64.v v12, (zero), v81683; RV64-NEXT:    vmv.v.v v8, v121684; RV64-NEXT:    ret1685  %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 4, <vscale x 4 x i1> splat (i1 1), <vscale x 4 x float> %passthru)1686  ret <vscale x 4 x float> %v1687}1688 1689define <vscale x 4 x float> @mgather_falsemask_nxv4f32(<vscale x 4 x ptr> %ptrs, <vscale x 4 x float> %passthru) {1690; RV32-LABEL: mgather_falsemask_nxv4f32:1691; RV32:       # %bb.0:1692; RV32-NEXT:    vsetivli zero, 1, e8, m1, ta, ma1693; RV32-NEXT:    vmv2r.v v8, v101694; RV32-NEXT:    ret1695;1696; RV64-LABEL: mgather_falsemask_nxv4f32:1697; RV64:       # %bb.0:1698; RV64-NEXT:    vsetivli zero, 1, e8, m1, ta, ma1699; RV64-NEXT:    vmv2r.v v8, v121700; RV64-NEXT:    ret1701  %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 4, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x float> %passthru)1702  ret <vscale x 4 x float> %v1703}1704 1705define <vscale x 8 x float> @mgather_nxv8f32(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {1706; RV32-LABEL: mgather_nxv8f32:1707; RV32:       # %bb.0:1708; RV32-NEXT:    vsetvli a0, zero, e32, m4, ta, mu1709; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t1710; RV32-NEXT:    vmv.v.v v8, v121711; RV32-NEXT:    ret1712;1713; RV64-LABEL: mgather_nxv8f32:1714; RV64:       # %bb.0:1715; RV64-NEXT:    vsetvli a0, zero, e32, m4, ta, mu1716; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t1717; RV64-NEXT:    vmv.v.v v8, v161718; RV64-NEXT:    ret1719  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)1720  ret <vscale x 8 x float> %v1721}1722 1723define <vscale x 8 x float> @mgather_baseidx_nxv8i8_nxv8f32(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {1724; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f32:1725; RV32:       # %bb.0:1726; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu1727; RV32-NEXT:    vsext.vf4 v16, v81728; RV32-NEXT:    vsll.vi v8, v16, 21729; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t1730; RV32-NEXT:    vmv.v.v v8, v121731; RV32-NEXT:    ret1732;1733; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f32:1734; RV64:       # %bb.0:1735; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1736; RV64-NEXT:    vsext.vf8 v16, v81737; RV64-NEXT:    vsll.vi v16, v16, 21738; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu1739; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t1740; RV64-NEXT:    vmv.v.v v8, v121741; RV64-NEXT:    ret1742  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i8> %idxs1743  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)1744  ret <vscale x 8 x float> %v1745}1746 1747define <vscale x 8 x float> @mgather_baseidx_sext_nxv8i8_nxv8f32(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {1748; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f32:1749; RV32:       # %bb.0:1750; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu1751; RV32-NEXT:    vsext.vf4 v16, v81752; RV32-NEXT:    vsll.vi v8, v16, 21753; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t1754; RV32-NEXT:    vmv.v.v v8, v121755; RV32-NEXT:    ret1756;1757; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f32:1758; RV64:       # %bb.0:1759; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1760; RV64-NEXT:    vsext.vf8 v16, v81761; RV64-NEXT:    vsll.vi v16, v16, 21762; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu1763; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t1764; RV64-NEXT:    vmv.v.v v8, v121765; RV64-NEXT:    ret1766  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>1767  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1768  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)1769  ret <vscale x 8 x float> %v1770}1771 1772define <vscale x 8 x float> @mgather_baseidx_zext_nxv8i8_nxv8f32(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {1773; CHECK-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f32:1774; CHECK:       # %bb.0:1775; CHECK-NEXT:    li a1, 41776; CHECK-NEXT:    vsetvli a2, zero, e8, m1, ta, ma1777; CHECK-NEXT:    vwmulu.vx v10, v8, a11778; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, mu1779; CHECK-NEXT:    vluxei16.v v12, (a0), v10, v0.t1780; CHECK-NEXT:    vmv.v.v v8, v121781; CHECK-NEXT:    ret1782  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>1783  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1784  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)1785  ret <vscale x 8 x float> %v1786}1787 1788define <vscale x 8 x float> @mgather_baseidx_nxv8i16_nxv8f32(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {1789; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8f32:1790; RV32:       # %bb.0:1791; RV32-NEXT:    li a1, 41792; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma1793; RV32-NEXT:    vwmulsu.vx v16, v8, a11794; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu1795; RV32-NEXT:    vluxei32.v v12, (a0), v16, v0.t1796; RV32-NEXT:    vmv.v.v v8, v121797; RV32-NEXT:    ret1798;1799; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8f32:1800; RV64:       # %bb.0:1801; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1802; RV64-NEXT:    vsext.vf4 v16, v81803; RV64-NEXT:    vsll.vi v16, v16, 21804; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu1805; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t1806; RV64-NEXT:    vmv.v.v v8, v121807; RV64-NEXT:    ret1808  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i16> %idxs1809  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)1810  ret <vscale x 8 x float> %v1811}1812 1813define <vscale x 8 x float> @mgather_baseidx_sext_nxv8i16_nxv8f32(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {1814; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f32:1815; RV32:       # %bb.0:1816; RV32-NEXT:    li a1, 41817; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma1818; RV32-NEXT:    vwmulsu.vx v16, v8, a11819; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu1820; RV32-NEXT:    vluxei32.v v12, (a0), v16, v0.t1821; RV32-NEXT:    vmv.v.v v8, v121822; RV32-NEXT:    ret1823;1824; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f32:1825; RV64:       # %bb.0:1826; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1827; RV64-NEXT:    vsext.vf4 v16, v81828; RV64-NEXT:    vsll.vi v16, v16, 21829; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu1830; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t1831; RV64-NEXT:    vmv.v.v v8, v121832; RV64-NEXT:    ret1833  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>1834  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1835  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)1836  ret <vscale x 8 x float> %v1837}1838 1839define <vscale x 8 x float> @mgather_baseidx_zext_nxv8i16_nxv8f32(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {1840; CHECK-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f32:1841; CHECK:       # %bb.0:1842; CHECK-NEXT:    li a1, 41843; CHECK-NEXT:    vsetvli a2, zero, e16, m2, ta, ma1844; CHECK-NEXT:    vwmulu.vx v16, v8, a11845; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, mu1846; CHECK-NEXT:    vluxei32.v v12, (a0), v16, v0.t1847; CHECK-NEXT:    vmv.v.v v8, v121848; CHECK-NEXT:    ret1849  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>1850  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1851  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)1852  ret <vscale x 8 x float> %v1853}1854 1855define <vscale x 8 x float> @mgather_baseidx_nxv8f32(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {1856; RV32-LABEL: mgather_baseidx_nxv8f32:1857; RV32:       # %bb.0:1858; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu1859; RV32-NEXT:    vsll.vi v8, v8, 21860; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t1861; RV32-NEXT:    vmv.v.v v8, v121862; RV32-NEXT:    ret1863;1864; RV64-LABEL: mgather_baseidx_nxv8f32:1865; RV64:       # %bb.0:1866; RV64-NEXT:    li a1, 41867; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, mu1868; RV64-NEXT:    vwmulsu.vx v16, v8, a11869; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t1870; RV64-NEXT:    vmv.v.v v8, v121871; RV64-NEXT:    ret1872  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %idxs1873  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)1874  ret <vscale x 8 x float> %v1875}1876 1877define <vscale x 1 x double> @mgather_nxv1f64(<vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x double> %passthru) {1878; RV32-LABEL: mgather_nxv1f64:1879; RV32:       # %bb.0:1880; RV32-NEXT:    vsetvli a0, zero, e64, m1, ta, mu1881; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t1882; RV32-NEXT:    vmv.v.v v8, v91883; RV32-NEXT:    ret1884;1885; RV64-LABEL: mgather_nxv1f64:1886; RV64:       # %bb.0:1887; RV64-NEXT:    vsetvli a0, zero, e64, m1, ta, mu1888; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t1889; RV64-NEXT:    vmv.v.v v8, v91890; RV64-NEXT:    ret1891  %v = call <vscale x 1 x double> @llvm.masked.gather.nxv1f64.nxv1p0(<vscale x 1 x ptr> %ptrs, i32 8, <vscale x 1 x i1> %m, <vscale x 1 x double> %passthru)1892  ret <vscale x 1 x double> %v1893}1894 1895define <vscale x 2 x double> @mgather_nxv2f64(<vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x double> %passthru) {1896; RV32-LABEL: mgather_nxv2f64:1897; RV32:       # %bb.0:1898; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, mu1899; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t1900; RV32-NEXT:    vmv.v.v v8, v101901; RV32-NEXT:    ret1902;1903; RV64-LABEL: mgather_nxv2f64:1904; RV64:       # %bb.0:1905; RV64-NEXT:    vsetvli a0, zero, e64, m2, ta, mu1906; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t1907; RV64-NEXT:    vmv.v.v v8, v101908; RV64-NEXT:    ret1909  %v = call <vscale x 2 x double> @llvm.masked.gather.nxv2f64.nxv2p0(<vscale x 2 x ptr> %ptrs, i32 8, <vscale x 2 x i1> %m, <vscale x 2 x double> %passthru)1910  ret <vscale x 2 x double> %v1911}1912 1913define <vscale x 4 x double> @mgather_nxv4f64(<vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x double> %passthru) {1914; RV32-LABEL: mgather_nxv4f64:1915; RV32:       # %bb.0:1916; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, mu1917; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t1918; RV32-NEXT:    vmv.v.v v8, v121919; RV32-NEXT:    ret1920;1921; RV64-LABEL: mgather_nxv4f64:1922; RV64:       # %bb.0:1923; RV64-NEXT:    vsetvli a0, zero, e64, m4, ta, mu1924; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t1925; RV64-NEXT:    vmv.v.v v8, v121926; RV64-NEXT:    ret1927  %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 8, <vscale x 4 x i1> %m, <vscale x 4 x double> %passthru)1928  ret <vscale x 4 x double> %v1929}1930 1931define <vscale x 4 x double> @mgather_truemask_nxv4f64(<vscale x 4 x ptr> %ptrs, <vscale x 4 x double> %passthru) {1932; RV32-LABEL: mgather_truemask_nxv4f64:1933; RV32:       # %bb.0:1934; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, ma1935; RV32-NEXT:    vmv2r.v v12, v81936; RV32-NEXT:    vluxei32.v v8, (zero), v121937; RV32-NEXT:    ret1938;1939; RV64-LABEL: mgather_truemask_nxv4f64:1940; RV64:       # %bb.0:1941; RV64-NEXT:    vsetvli a0, zero, e64, m4, ta, ma1942; RV64-NEXT:    vluxei64.v v8, (zero), v81943; RV64-NEXT:    ret1944  %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 8, <vscale x 4 x i1> splat (i1 1), <vscale x 4 x double> %passthru)1945  ret <vscale x 4 x double> %v1946}1947 1948define <vscale x 4 x double> @mgather_falsemask_nxv4f64(<vscale x 4 x ptr> %ptrs, <vscale x 4 x double> %passthru) {1949; CHECK-LABEL: mgather_falsemask_nxv4f64:1950; CHECK:       # %bb.0:1951; CHECK-NEXT:    vsetivli zero, 1, e8, m1, ta, ma1952; CHECK-NEXT:    vmv4r.v v8, v121953; CHECK-NEXT:    ret1954  %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0(<vscale x 4 x ptr> %ptrs, i32 8, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x double> %passthru)1955  ret <vscale x 4 x double> %v1956}1957 1958define <vscale x 8 x double> @mgather_nxv8f64(<vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {1959; RV32-LABEL: mgather_nxv8f64:1960; RV32:       # %bb.0:1961; RV32-NEXT:    vsetvli a0, zero, e64, m8, ta, mu1962; RV32-NEXT:    vluxei32.v v16, (zero), v8, v0.t1963; RV32-NEXT:    vmv.v.v v8, v161964; RV32-NEXT:    ret1965;1966; RV64-LABEL: mgather_nxv8f64:1967; RV64:       # %bb.0:1968; RV64-NEXT:    vsetvli a0, zero, e64, m8, ta, mu1969; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t1970; RV64-NEXT:    vmv.v.v v8, v161971; RV64-NEXT:    ret1972  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)1973  ret <vscale x 8 x double> %v1974}1975 1976define <vscale x 8 x double> @mgather_baseidx_nxv8i8_nxv8f64(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {1977; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f64:1978; RV32:       # %bb.0:1979; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1980; RV32-NEXT:    vsext.vf4 v12, v81981; RV32-NEXT:    vsll.vi v8, v12, 31982; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu1983; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t1984; RV32-NEXT:    vmv.v.v v8, v161985; RV32-NEXT:    ret1986;1987; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f64:1988; RV64:       # %bb.0:1989; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu1990; RV64-NEXT:    vsext.vf8 v24, v81991; RV64-NEXT:    vsll.vi v8, v24, 31992; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t1993; RV64-NEXT:    vmv.v.v v8, v161994; RV64-NEXT:    ret1995  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i8> %idxs1996  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)1997  ret <vscale x 8 x double> %v1998}1999 2000define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i8_nxv8f64(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {2001; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f64:2002; RV32:       # %bb.0:2003; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma2004; RV32-NEXT:    vsext.vf4 v12, v82005; RV32-NEXT:    vsll.vi v8, v12, 32006; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu2007; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t2008; RV32-NEXT:    vmv.v.v v8, v162009; RV32-NEXT:    ret2010;2011; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f64:2012; RV64:       # %bb.0:2013; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu2014; RV64-NEXT:    vsext.vf8 v24, v82015; RV64-NEXT:    vsll.vi v8, v24, 32016; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t2017; RV64-NEXT:    vmv.v.v v8, v162018; RV64-NEXT:    ret2019  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>2020  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2021  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)2022  ret <vscale x 8 x double> %v2023}2024 2025define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i8_nxv8f64(ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {2026; CHECK-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f64:2027; CHECK:       # %bb.0:2028; CHECK-NEXT:    li a1, 82029; CHECK-NEXT:    vsetvli a2, zero, e8, m1, ta, ma2030; CHECK-NEXT:    vwmulu.vx v10, v8, a12031; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu2032; CHECK-NEXT:    vluxei16.v v16, (a0), v10, v0.t2033; CHECK-NEXT:    vmv.v.v v8, v162034; CHECK-NEXT:    ret2035  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>2036  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2037  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)2038  ret <vscale x 8 x double> %v2039}2040 2041define <vscale x 8 x double> @mgather_baseidx_nxv8i16_nxv8f64(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {2042; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8f64:2043; RV32:       # %bb.0:2044; RV32-NEXT:    li a1, 82045; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma2046; RV32-NEXT:    vwmulsu.vx v12, v8, a12047; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu2048; RV32-NEXT:    vluxei32.v v16, (a0), v12, v0.t2049; RV32-NEXT:    vmv.v.v v8, v162050; RV32-NEXT:    ret2051;2052; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8f64:2053; RV64:       # %bb.0:2054; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu2055; RV64-NEXT:    vsext.vf4 v24, v82056; RV64-NEXT:    vsll.vi v8, v24, 32057; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t2058; RV64-NEXT:    vmv.v.v v8, v162059; RV64-NEXT:    ret2060  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i16> %idxs2061  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)2062  ret <vscale x 8 x double> %v2063}2064 2065define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i16_nxv8f64(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {2066; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f64:2067; RV32:       # %bb.0:2068; RV32-NEXT:    li a1, 82069; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma2070; RV32-NEXT:    vwmulsu.vx v12, v8, a12071; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu2072; RV32-NEXT:    vluxei32.v v16, (a0), v12, v0.t2073; RV32-NEXT:    vmv.v.v v8, v162074; RV32-NEXT:    ret2075;2076; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f64:2077; RV64:       # %bb.0:2078; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu2079; RV64-NEXT:    vsext.vf4 v24, v82080; RV64-NEXT:    vsll.vi v8, v24, 32081; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t2082; RV64-NEXT:    vmv.v.v v8, v162083; RV64-NEXT:    ret2084  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>2085  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2086  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)2087  ret <vscale x 8 x double> %v2088}2089 2090define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i16_nxv8f64(ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {2091; CHECK-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f64:2092; CHECK:       # %bb.0:2093; CHECK-NEXT:    li a1, 82094; CHECK-NEXT:    vsetvli a2, zero, e16, m2, ta, ma2095; CHECK-NEXT:    vwmulu.vx v12, v8, a12096; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, mu2097; CHECK-NEXT:    vluxei32.v v16, (a0), v12, v0.t2098; CHECK-NEXT:    vmv.v.v v8, v162099; CHECK-NEXT:    ret2100  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>2101  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2102  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)2103  ret <vscale x 8 x double> %v2104}2105 2106define <vscale x 8 x double> @mgather_baseidx_nxv8i32_nxv8f64(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {2107; RV32-LABEL: mgather_baseidx_nxv8i32_nxv8f64:2108; RV32:       # %bb.0:2109; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma2110; RV32-NEXT:    vsll.vi v8, v8, 32111; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu2112; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t2113; RV32-NEXT:    vmv.v.v v8, v162114; RV32-NEXT:    ret2115;2116; RV64-LABEL: mgather_baseidx_nxv8i32_nxv8f64:2117; RV64:       # %bb.0:2118; RV64-NEXT:    li a1, 82119; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma2120; RV64-NEXT:    vwmulsu.vx v24, v8, a12121; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, mu2122; RV64-NEXT:    vluxei64.v v16, (a0), v24, v0.t2123; RV64-NEXT:    vmv.v.v v8, v162124; RV64-NEXT:    ret2125  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i32> %idxs2126  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)2127  ret <vscale x 8 x double> %v2128}2129 2130define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i32_nxv8f64(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {2131; RV32-LABEL: mgather_baseidx_sext_nxv8i32_nxv8f64:2132; RV32:       # %bb.0:2133; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma2134; RV32-NEXT:    vsll.vi v8, v8, 32135; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu2136; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t2137; RV32-NEXT:    vmv.v.v v8, v162138; RV32-NEXT:    ret2139;2140; RV64-LABEL: mgather_baseidx_sext_nxv8i32_nxv8f64:2141; RV64:       # %bb.0:2142; RV64-NEXT:    li a1, 82143; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma2144; RV64-NEXT:    vwmulsu.vx v24, v8, a12145; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, mu2146; RV64-NEXT:    vluxei64.v v16, (a0), v24, v0.t2147; RV64-NEXT:    vmv.v.v v8, v162148; RV64-NEXT:    ret2149  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>2150  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2151  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)2152  ret <vscale x 8 x double> %v2153}2154 2155define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i32_nxv8f64(ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {2156; RV32-LABEL: mgather_baseidx_zext_nxv8i32_nxv8f64:2157; RV32:       # %bb.0:2158; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma2159; RV32-NEXT:    vsll.vi v8, v8, 32160; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu2161; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t2162; RV32-NEXT:    vmv.v.v v8, v162163; RV32-NEXT:    ret2164;2165; RV64-LABEL: mgather_baseidx_zext_nxv8i32_nxv8f64:2166; RV64:       # %bb.0:2167; RV64-NEXT:    li a1, 82168; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma2169; RV64-NEXT:    vwmulu.vx v24, v8, a12170; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, mu2171; RV64-NEXT:    vluxei64.v v16, (a0), v24, v0.t2172; RV64-NEXT:    vmv.v.v v8, v162173; RV64-NEXT:    ret2174  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>2175  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs2176  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)2177  ret <vscale x 8 x double> %v2178}2179 2180define <vscale x 8 x double> @mgather_baseidx_nxv8f64(ptr %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {2181; RV32-LABEL: mgather_baseidx_nxv8f64:2182; RV32:       # %bb.0:2183; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma2184; RV32-NEXT:    vnsrl.wi v24, v8, 02185; RV32-NEXT:    vsll.vi v8, v24, 32186; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu2187; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t2188; RV32-NEXT:    vmv.v.v v8, v162189; RV32-NEXT:    ret2190;2191; RV64-LABEL: mgather_baseidx_nxv8f64:2192; RV64:       # %bb.0:2193; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu2194; RV64-NEXT:    vsll.vi v8, v8, 32195; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t2196; RV64-NEXT:    vmv.v.v v8, v162197; RV64-NEXT:    ret2198  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %idxs2199  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0(<vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)2200  ret <vscale x 8 x double> %v2201}2202 2203define <vscale x 16 x i8> @mgather_baseidx_nxv16i8(ptr %base, <vscale x 16 x i8> %idxs, <vscale x 16 x i1> %m, <vscale x 16 x i8> %passthru) {2204; RV32-LABEL: mgather_baseidx_nxv16i8:2205; RV32:       # %bb.0:2206; RV32-NEXT:    vsetvli a1, zero, e32, m8, ta, ma2207; RV32-NEXT:    vsext.vf4 v16, v82208; RV32-NEXT:    vsetvli zero, zero, e8, m2, ta, mu2209; RV32-NEXT:    vluxei32.v v10, (a0), v16, v0.t2210; RV32-NEXT:    vmv.v.v v8, v102211; RV32-NEXT:    ret2212;2213; RV64-LABEL: mgather_baseidx_nxv16i8:2214; RV64:       # %bb.0:2215; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma2216; RV64-NEXT:    vsext.vf8 v16, v82217; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu2218; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t2219; RV64-NEXT:    csrr a1, vlenb2220; RV64-NEXT:    srli a1, a1, 32221; RV64-NEXT:    vsetvli a2, zero, e8, mf4, ta, ma2222; RV64-NEXT:    vslidedown.vx v0, v0, a12223; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma2224; RV64-NEXT:    vsext.vf8 v16, v92225; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu2226; RV64-NEXT:    vluxei64.v v11, (a0), v16, v0.t2227; RV64-NEXT:    vmv2r.v v8, v102228; RV64-NEXT:    ret2229  %ptrs = getelementptr inbounds i8, ptr %base, <vscale x 16 x i8> %idxs2230  %v = call <vscale x 16 x i8> @llvm.masked.gather.nxv16i8.nxv16p0(<vscale x 16 x ptr> %ptrs, i32 2, <vscale x 16 x i1> %m, <vscale x 16 x i8> %passthru)2231  ret <vscale x 16 x i8> %v2232}2233 2234define <vscale x 32 x i8> @mgather_baseidx_nxv32i8(ptr %base, <vscale x 32 x i8> %idxs, <vscale x 32 x i1> %m, <vscale x 32 x i8> %passthru) {2235; RV32-LABEL: mgather_baseidx_nxv32i8:2236; RV32:       # %bb.0:2237; RV32-NEXT:    vsetvli a1, zero, e32, m8, ta, ma2238; RV32-NEXT:    vsext.vf4 v16, v82239; RV32-NEXT:    vsetvli zero, zero, e8, m2, ta, mu2240; RV32-NEXT:    vluxei32.v v12, (a0), v16, v0.t2241; RV32-NEXT:    csrr a1, vlenb2242; RV32-NEXT:    srli a1, a1, 22243; RV32-NEXT:    vsetvli a2, zero, e8, mf2, ta, ma2244; RV32-NEXT:    vslidedown.vx v0, v0, a12245; RV32-NEXT:    vsetvli a1, zero, e32, m8, ta, ma2246; RV32-NEXT:    vsext.vf4 v16, v102247; RV32-NEXT:    vsetvli zero, zero, e8, m2, ta, mu2248; RV32-NEXT:    vluxei32.v v14, (a0), v16, v0.t2249; RV32-NEXT:    vmv4r.v v8, v122250; RV32-NEXT:    ret2251;2252; RV64-LABEL: mgather_baseidx_nxv32i8:2253; RV64:       # %bb.0:2254; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma2255; RV64-NEXT:    vmv1r.v v16, v02256; RV64-NEXT:    vsext.vf8 v24, v82257; RV64-NEXT:    csrr a1, vlenb2258; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu2259; RV64-NEXT:    vluxei64.v v12, (a0), v24, v0.t2260; RV64-NEXT:    srli a2, a1, 32261; RV64-NEXT:    vsetvli a3, zero, e8, mf4, ta, ma2262; RV64-NEXT:    vslidedown.vx v0, v0, a22263; RV64-NEXT:    vsetvli a3, zero, e64, m8, ta, ma2264; RV64-NEXT:    vsext.vf8 v24, v92265; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu2266; RV64-NEXT:    vluxei64.v v13, (a0), v24, v0.t2267; RV64-NEXT:    srli a1, a1, 22268; RV64-NEXT:    vsetvli a3, zero, e8, mf2, ta, ma2269; RV64-NEXT:    vslidedown.vx v8, v16, a12270; RV64-NEXT:    vsetvli a1, zero, e8, mf4, ta, ma2271; RV64-NEXT:    vslidedown.vx v0, v8, a22272; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma2273; RV64-NEXT:    vsext.vf8 v16, v112274; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu2275; RV64-NEXT:    vluxei64.v v15, (a0), v16, v0.t2276; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma2277; RV64-NEXT:    vsext.vf8 v16, v102278; RV64-NEXT:    vmv1r.v v0, v82279; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu2280; RV64-NEXT:    vluxei64.v v14, (a0), v16, v0.t2281; RV64-NEXT:    vmv4r.v v8, v122282; RV64-NEXT:    ret2283  %ptrs = getelementptr inbounds i8, ptr %base, <vscale x 32 x i8> %idxs2284  %v = call <vscale x 32 x i8> @llvm.masked.gather.nxv32i8.nxv32p0(<vscale x 32 x ptr> %ptrs, i32 2, <vscale x 32 x i1> %m, <vscale x 32 x i8> %passthru)2285  ret <vscale x 32 x i8> %v2286}2287 2288define <vscale x 1 x i8> @mgather_baseidx_zext_nxv1i1_nxv1i8(ptr %base, <vscale x 1 x i1> %idxs, <vscale x 1 x i1> %m, <vscale x 1 x i8> %passthru) {2289; CHECK-LABEL: mgather_baseidx_zext_nxv1i1_nxv1i8:2290; CHECK:       # %bb.0:2291; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, mu2292; CHECK-NEXT:    vmv.v.i v10, 02293; CHECK-NEXT:    vmerge.vim v10, v10, 1, v02294; CHECK-NEXT:    vmv1r.v v0, v82295; CHECK-NEXT:    vluxei8.v v9, (a0), v10, v0.t2296; CHECK-NEXT:    vmv1r.v v8, v92297; CHECK-NEXT:    ret2298  %eidxs = zext <vscale x 1 x i1> %idxs to <vscale x 1 x i8>2299  %ptrs = getelementptr inbounds i8, ptr %base, <vscale x 1 x i8> %eidxs2300  %v = call <vscale x 1 x i8> @llvm.masked.gather.nxv1i8.nxv1p0(<vscale x 1 x ptr> %ptrs, i32 1, <vscale x 1 x i1> %m, <vscale x 1 x i8> %passthru)2301  ret <vscale x 1 x i8> %v2302}2303 2304define <4 x i32> @scalar_prefix(ptr %base, i32 signext %index, <4 x i32> %vecidx) {2305; RV32-LABEL: scalar_prefix:2306; RV32:       # %bb.0:2307; RV32-NEXT:    slli a1, a1, 102308; RV32-NEXT:    add a0, a0, a12309; RV32-NEXT:    vsetivli zero, 4, e32, m1, ta, ma2310; RV32-NEXT:    vsll.vi v8, v8, 22311; RV32-NEXT:    vluxei32.v v8, (a0), v82312; RV32-NEXT:    ret2313;2314; RV64-LABEL: scalar_prefix:2315; RV64:       # %bb.0:2316; RV64-NEXT:    li a2, 42317; RV64-NEXT:    slli a1, a1, 102318; RV64-NEXT:    vsetivli zero, 4, e32, m1, ta, ma2319; RV64-NEXT:    vwmulsu.vx v10, v8, a22320; RV64-NEXT:    add a0, a0, a12321; RV64-NEXT:    vluxei64.v v8, (a0), v102322; RV64-NEXT:    ret2323  %gep = getelementptr [256 x i32], ptr %base, i32 %index, <4 x i32> %vecidx2324  %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %gep, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> poison)2325  ret <4 x i32> %res2326}2327 2328define <4 x i32> @scalar_prefix_with_splat(ptr %base, i32 %index, <4 x i32> %vecidx) {2329; RV32-LABEL: scalar_prefix_with_splat:2330; RV32:       # %bb.0:2331; RV32-NEXT:    vsetivli zero, 4, e32, m1, ta, ma2332; RV32-NEXT:    vmv.v.x v9, a12333; RV32-NEXT:    vsll.vi v9, v9, 102334; RV32-NEXT:    vadd.vx v9, v9, a02335; RV32-NEXT:    vsll.vi v8, v8, 22336; RV32-NEXT:    vadd.vv v8, v9, v82337; RV32-NEXT:    vluxei32.v v8, (zero), v82338; RV32-NEXT:    ret2339;2340; RV64-LABEL: scalar_prefix_with_splat:2341; RV64:       # %bb.0:2342; RV64-NEXT:    li a2, 10242343; RV64-NEXT:    vsetivli zero, 4, e64, m2, ta, ma2344; RV64-NEXT:    vmv.v.x v10, a02345; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, ma2346; RV64-NEXT:    vmv.v.x v9, a22347; RV64-NEXT:    vwmaccsu.vx v10, a1, v92348; RV64-NEXT:    li a0, 42349; RV64-NEXT:    vwmaccus.vx v10, a0, v82350; RV64-NEXT:    vluxei64.v v8, (zero), v102351; RV64-NEXT:    ret2352  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %index, i32 02353  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer2354 2355  %gep = getelementptr [256 x i32], ptr %base, <4 x i32> %broadcast.splat, <4 x i32> %vecidx2356  %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %gep, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> poison)2357  ret <4 x i32> %res2358}2359 2360define <4 x i32> @scalar_prefix_with_constant_splat(ptr %base, <4 x i32> %vecidx) {2361; RV32-LABEL: scalar_prefix_with_constant_splat:2362; RV32:       # %bb.0:2363; RV32-NEXT:    lui a1, 52364; RV32-NEXT:    add a0, a0, a12365; RV32-NEXT:    vsetivli zero, 4, e32, m1, ta, ma2366; RV32-NEXT:    vsll.vi v8, v8, 22367; RV32-NEXT:    vluxei32.v v8, (a0), v82368; RV32-NEXT:    ret2369;2370; RV64-LABEL: scalar_prefix_with_constant_splat:2371; RV64:       # %bb.0:2372; RV64-NEXT:    li a1, 42373; RV64-NEXT:    vsetivli zero, 4, e32, m1, ta, ma2374; RV64-NEXT:    vwmulsu.vx v10, v8, a12375; RV64-NEXT:    lui a1, 52376; RV64-NEXT:    add a0, a0, a12377; RV64-NEXT:    vluxei64.v v8, (a0), v102378; RV64-NEXT:    ret2379  %gep = getelementptr [256 x i32], ptr %base, <4 x i32> splat (i32 20), <4 x i32> %vecidx2380  %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %gep, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> poison)2381  ret <4 x i32> %res2382}2383 2384define <4 x i32> @reassociate(ptr %base, i32 %index, <4 x i32> %vecidx) {2385; RV32-LABEL: reassociate:2386; RV32:       # %bb.0:2387; RV32-NEXT:    vsetivli zero, 4, e32, m1, ta, ma2388; RV32-NEXT:    vsll.vi v8, v8, 102389; RV32-NEXT:    vmv.v.x v9, a12390; RV32-NEXT:    vadd.vx v8, v8, a02391; RV32-NEXT:    vsll.vi v9, v9, 22392; RV32-NEXT:    vadd.vv v8, v8, v92393; RV32-NEXT:    vluxei32.v v8, (zero), v82394; RV32-NEXT:    ret2395;2396; RV64-LABEL: reassociate:2397; RV64:       # %bb.0:2398; RV64-NEXT:    vsetivli zero, 4, e64, m2, ta, ma2399; RV64-NEXT:    vmv.v.x v10, a02400; RV64-NEXT:    li a0, 10242401; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, ma2402; RV64-NEXT:    vwmaccus.vx v10, a0, v82403; RV64-NEXT:    vmv.v.i v8, 42404; RV64-NEXT:    vwmaccsu.vx v10, a1, v82405; RV64-NEXT:    vluxei64.v v8, (zero), v102406; RV64-NEXT:    ret2407  %gep = getelementptr [256 x i32], ptr %base, <4 x i32> %vecidx, i32 %index2408  %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %gep, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> poison)2409  ret <4 x i32> %res2410}2411 2412define <4 x i32> @reassociate_with_splat(ptr %base, i32 %index, <4 x i32> %vecidx) {2413; RV32-LABEL: reassociate_with_splat:2414; RV32:       # %bb.0:2415; RV32-NEXT:    vsetivli zero, 4, e32, m1, ta, ma2416; RV32-NEXT:    vmv.v.x v9, a12417; RV32-NEXT:    vsll.vi v8, v8, 102418; RV32-NEXT:    vadd.vx v8, v8, a02419; RV32-NEXT:    vsll.vi v9, v9, 22420; RV32-NEXT:    vadd.vv v8, v8, v92421; RV32-NEXT:    vluxei32.v v8, (zero), v82422; RV32-NEXT:    ret2423;2424; RV64-LABEL: reassociate_with_splat:2425; RV64:       # %bb.0:2426; RV64-NEXT:    vsetivli zero, 4, e64, m2, ta, ma2427; RV64-NEXT:    vmv.v.x v10, a02428; RV64-NEXT:    li a0, 10242429; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, ma2430; RV64-NEXT:    vwmaccus.vx v10, a0, v82431; RV64-NEXT:    vmv.v.i v8, 42432; RV64-NEXT:    vwmaccsu.vx v10, a1, v82433; RV64-NEXT:    vluxei64.v v8, (zero), v102434; RV64-NEXT:    ret2435  %broadcast.splatinsert = insertelement <4 x i32> poison, i32 %index, i32 02436  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> poison, <4 x i32> zeroinitializer2437 2438  %gep = getelementptr [256 x i32], ptr %base, <4 x i32> %vecidx, <4 x i32> %broadcast.splat2439  %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %gep, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> poison)2440  ret <4 x i32> %res2441}2442 2443define <4 x i32> @reassociate_with_constant_splat(ptr %base, i32 %index, <4 x i32> %vecidx) {2444; RV32-LABEL: reassociate_with_constant_splat:2445; RV32:       # %bb.0:2446; RV32-NEXT:    vsetivli zero, 4, e32, m1, ta, ma2447; RV32-NEXT:    vsll.vi v8, v8, 102448; RV32-NEXT:    addi a0, a0, 802449; RV32-NEXT:    vluxei32.v v8, (a0), v82450; RV32-NEXT:    ret2451;2452; RV64-LABEL: reassociate_with_constant_splat:2453; RV64:       # %bb.0:2454; RV64-NEXT:    li a1, 10242455; RV64-NEXT:    vsetivli zero, 4, e32, m1, ta, ma2456; RV64-NEXT:    vwmulsu.vx v10, v8, a12457; RV64-NEXT:    addi a0, a0, 802458; RV64-NEXT:    vluxei64.v v8, (a0), v102459; RV64-NEXT:    ret2460  %gep = getelementptr [256 x i32], ptr %base, <4 x i32> %vecidx, <4 x i32> splat (i32 20)2461  %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %gep, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> poison)2462  ret <4 x i32> %res2463}2464 2465define <4 x i32> @diagonal(ptr %base, <4 x i64> %vecidx) {2466; RV32-LABEL: diagonal:2467; RV32:       # %bb.0:2468; RV32-NEXT:    vsetivli zero, 4, e32, m1, ta, ma2469; RV32-NEXT:    vnsrl.wi v10, v8, 02470; RV32-NEXT:    vsll.vi v8, v10, 102471; RV32-NEXT:    vadd.vx v8, v8, a02472; RV32-NEXT:    vsll.vi v9, v10, 22473; RV32-NEXT:    vadd.vv v8, v8, v92474; RV32-NEXT:    vluxei32.v v8, (zero), v82475; RV32-NEXT:    ret2476;2477; RV64-LABEL: diagonal:2478; RV64:       # %bb.0:2479; RV64-NEXT:    vsetivli zero, 4, e64, m2, ta, ma2480; RV64-NEXT:    vsll.vi v10, v8, 102481; RV64-NEXT:    vadd.vx v10, v10, a02482; RV64-NEXT:    vsll.vi v8, v8, 22483; RV64-NEXT:    vadd.vv v10, v10, v82484; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, ma2485; RV64-NEXT:    vluxei64.v v8, (zero), v102486; RV64-NEXT:    ret2487  %gep = getelementptr inbounds nuw [256 x [256 x float]], ptr %base, i64 0, <4 x i64> %vecidx, <4 x i64> %vecidx2488  %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %gep, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> poison)2489  ret <4 x i32> %res2490}2491 2492define <4 x i32> @diagonal_i32(ptr %base, <4 x i32> %vecidx) {2493; RV32-LABEL: diagonal_i32:2494; RV32:       # %bb.0:2495; RV32-NEXT:    vsetivli zero, 4, e32, m1, ta, ma2496; RV32-NEXT:    vsll.vi v9, v8, 102497; RV32-NEXT:    vadd.vx v9, v9, a02498; RV32-NEXT:    vsll.vi v8, v8, 22499; RV32-NEXT:    vadd.vv v8, v9, v82500; RV32-NEXT:    vluxei32.v v8, (zero), v82501; RV32-NEXT:    ret2502;2503; RV64-LABEL: diagonal_i32:2504; RV64:       # %bb.0:2505; RV64-NEXT:    vsetivli zero, 4, e64, m2, ta, ma2506; RV64-NEXT:    vsext.vf2 v10, v82507; RV64-NEXT:    vsll.vi v8, v10, 102508; RV64-NEXT:    vadd.vx v8, v8, a02509; RV64-NEXT:    vsll.vi v10, v10, 22510; RV64-NEXT:    vadd.vv v10, v8, v102511; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, ma2512; RV64-NEXT:    vluxei64.v v8, (zero), v102513; RV64-NEXT:    ret2514  %gep = getelementptr inbounds nuw [256 x [256 x float]], ptr %base, i64 0, <4 x i32> %vecidx, <4 x i32> %vecidx2515  %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %gep, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> poison)2516  ret <4 x i32> %res2517}2518 2519