brintos / llvm-project-archived public Read only

1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+m,+d,+zvfh,+zvfbfmin,+v \3; RUN:     -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \4; RUN:     --check-prefixes=CHECK,RV325; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+zvfh,+zvfbfmin,+v \6; RUN:     -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \7; RUN:     --check-prefixes=CHECK,RV648; RUN: llc -mtriple=riscv32 -mattr=+m,+d,+zvfhmin,+zvfbfmin,+v \9; RUN:     -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \10; RUN:     --check-prefixes=CHECK,RV3211; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+zvfhmin,+zvfbfmin,+v \12; RUN:     -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \13; RUN:     --check-prefixes=CHECK,RV6414 15define void @mscatter_nxv1i8(<vscale x 1 x i8> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m) {16; RV32-LABEL: mscatter_nxv1i8:17; RV32:       # %bb.0:18; RV32-NEXT:    vsetvli a0, zero, e8, mf8, ta, ma19; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t20; RV32-NEXT:    ret21;22; RV64-LABEL: mscatter_nxv1i8:23; RV64:       # %bb.0:24; RV64-NEXT:    vsetvli a0, zero, e8, mf8, ta, ma25; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t26; RV64-NEXT:    ret27  call void @llvm.masked.scatter.nxv1i8.nxv1p0(<vscale x 1 x i8> %val, <vscale x 1 x ptr> %ptrs, i32 1, <vscale x 1 x i1> %m)28  ret void29}30 31define void @mscatter_nxv2i8(<vscale x 2 x i8> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {32; RV32-LABEL: mscatter_nxv2i8:33; RV32:       # %bb.0:34; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma35; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t36; RV32-NEXT:    ret37;38; RV64-LABEL: mscatter_nxv2i8:39; RV64:       # %bb.0:40; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma41; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t42; RV64-NEXT:    ret43  call void @llvm.masked.scatter.nxv2i8.nxv2p0(<vscale x 2 x i8> %val, <vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %m)44  ret void45}46 47define void @mscatter_nxv2i16_truncstore_nxv2i8(<vscale x 2 x i16> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {48; RV32-LABEL: mscatter_nxv2i16_truncstore_nxv2i8:49; RV32:       # %bb.0:50; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma51; RV32-NEXT:    vnsrl.wi v8, v8, 052; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t53; RV32-NEXT:    ret54;55; RV64-LABEL: mscatter_nxv2i16_truncstore_nxv2i8:56; RV64:       # %bb.0:57; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma58; RV64-NEXT:    vnsrl.wi v8, v8, 059; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t60; RV64-NEXT:    ret61  %tval = trunc <vscale x 2 x i16> %val to <vscale x 2 x i8>62  call void @llvm.masked.scatter.nxv2i8.nxv2p0(<vscale x 2 x i8> %tval, <vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %m)63  ret void64}65 66define void @mscatter_nxv2i32_truncstore_nxv2i8(<vscale x 2 x i32> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {67; RV32-LABEL: mscatter_nxv2i32_truncstore_nxv2i8:68; RV32:       # %bb.0:69; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma70; RV32-NEXT:    vnsrl.wi v8, v8, 071; RV32-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma72; RV32-NEXT:    vnsrl.wi v8, v8, 073; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t74; RV32-NEXT:    ret75;76; RV64-LABEL: mscatter_nxv2i32_truncstore_nxv2i8:77; RV64:       # %bb.0:78; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma79; RV64-NEXT:    vnsrl.wi v8, v8, 080; RV64-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma81; RV64-NEXT:    vnsrl.wi v8, v8, 082; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t83; RV64-NEXT:    ret84  %tval = trunc <vscale x 2 x i32> %val to <vscale x 2 x i8>85  call void @llvm.masked.scatter.nxv2i8.nxv2p0(<vscale x 2 x i8> %tval, <vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %m)86  ret void87}88 89define void @mscatter_nxv2i64_truncstore_nxv2i8(<vscale x 2 x i64> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {90; RV32-LABEL: mscatter_nxv2i64_truncstore_nxv2i8:91; RV32:       # %bb.0:92; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, ma93; RV32-NEXT:    vnsrl.wi v11, v8, 094; RV32-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma95; RV32-NEXT:    vnsrl.wi v8, v11, 096; RV32-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma97; RV32-NEXT:    vnsrl.wi v8, v8, 098; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t99; RV32-NEXT:    ret100;101; RV64-LABEL: mscatter_nxv2i64_truncstore_nxv2i8:102; RV64:       # %bb.0:103; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, ma104; RV64-NEXT:    vnsrl.wi v12, v8, 0105; RV64-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma106; RV64-NEXT:    vnsrl.wi v8, v12, 0107; RV64-NEXT:    vsetvli zero, zero, e8, mf4, ta, ma108; RV64-NEXT:    vnsrl.wi v8, v8, 0109; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t110; RV64-NEXT:    ret111  %tval = trunc <vscale x 2 x i64> %val to <vscale x 2 x i8>112  call void @llvm.masked.scatter.nxv2i8.nxv2p0(<vscale x 2 x i8> %tval, <vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %m)113  ret void114}115 116define void @mscatter_nxv4i8(<vscale x 4 x i8> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m) {117; RV32-LABEL: mscatter_nxv4i8:118; RV32:       # %bb.0:119; RV32-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma120; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t121; RV32-NEXT:    ret122;123; RV64-LABEL: mscatter_nxv4i8:124; RV64:       # %bb.0:125; RV64-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma126; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t127; RV64-NEXT:    ret128  call void @llvm.masked.scatter.nxv4i8.nxv4p0(<vscale x 4 x i8> %val, <vscale x 4 x ptr> %ptrs, i32 1, <vscale x 4 x i1> %m)129  ret void130}131 132define void @mscatter_truemask_nxv4i8(<vscale x 4 x i8> %val, <vscale x 4 x ptr> %ptrs) {133; RV32-LABEL: mscatter_truemask_nxv4i8:134; RV32:       # %bb.0:135; RV32-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma136; RV32-NEXT:    vsoxei32.v v8, (zero), v10137; RV32-NEXT:    ret138;139; RV64-LABEL: mscatter_truemask_nxv4i8:140; RV64:       # %bb.0:141; RV64-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma142; RV64-NEXT:    vsoxei64.v v8, (zero), v12143; RV64-NEXT:    ret144  call void @llvm.masked.scatter.nxv4i8.nxv4p0(<vscale x 4 x i8> %val, <vscale x 4 x ptr> %ptrs, i32 1, <vscale x 4 x i1> splat (i1 1))145  ret void146}147 148define void @mscatter_falsemask_nxv4i8(<vscale x 4 x i8> %val, <vscale x 4 x ptr> %ptrs) {149; CHECK-LABEL: mscatter_falsemask_nxv4i8:150; CHECK:       # %bb.0:151; CHECK-NEXT:    ret152  call void @llvm.masked.scatter.nxv4i8.nxv4p0(<vscale x 4 x i8> %val, <vscale x 4 x ptr> %ptrs, i32 1, <vscale x 4 x i1> zeroinitializer)153  ret void154}155 156define void @mscatter_nxv8i8(<vscale x 8 x i8> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m) {157; RV32-LABEL: mscatter_nxv8i8:158; RV32:       # %bb.0:159; RV32-NEXT:    vsetvli a0, zero, e8, m1, ta, ma160; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t161; RV32-NEXT:    ret162;163; RV64-LABEL: mscatter_nxv8i8:164; RV64:       # %bb.0:165; RV64-NEXT:    vsetvli a0, zero, e8, m1, ta, ma166; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t167; RV64-NEXT:    ret168  call void @llvm.masked.scatter.nxv8i8.nxv8p0(<vscale x 8 x i8> %val, <vscale x 8 x ptr> %ptrs, i32 1, <vscale x 8 x i1> %m)169  ret void170}171 172define void @mscatter_baseidx_nxv8i8(<vscale x 8 x i8> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {173; RV32-LABEL: mscatter_baseidx_nxv8i8:174; RV32:       # %bb.0:175; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma176; RV32-NEXT:    vsext.vf4 v12, v9177; RV32-NEXT:    vsetvli zero, zero, e8, m1, ta, ma178; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t179; RV32-NEXT:    ret180;181; RV64-LABEL: mscatter_baseidx_nxv8i8:182; RV64:       # %bb.0:183; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma184; RV64-NEXT:    vsext.vf8 v16, v9185; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, ma186; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t187; RV64-NEXT:    ret188  %ptrs = getelementptr inbounds i8, ptr %base, <vscale x 8 x i8> %idxs189  call void @llvm.masked.scatter.nxv8i8.nxv8p0(<vscale x 8 x i8> %val, <vscale x 8 x ptr> %ptrs, i32 1, <vscale x 8 x i1> %m)190  ret void191}192 193define void @mscatter_nxv1i16(<vscale x 1 x i16> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m) {194; RV32-LABEL: mscatter_nxv1i16:195; RV32:       # %bb.0:196; RV32-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma197; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t198; RV32-NEXT:    ret199;200; RV64-LABEL: mscatter_nxv1i16:201; RV64:       # %bb.0:202; RV64-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma203; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t204; RV64-NEXT:    ret205  call void @llvm.masked.scatter.nxv1i16.nxv1p0(<vscale x 1 x i16> %val, <vscale x 1 x ptr> %ptrs, i32 2, <vscale x 1 x i1> %m)206  ret void207}208 209define void @mscatter_nxv2i16(<vscale x 2 x i16> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {210; RV32-LABEL: mscatter_nxv2i16:211; RV32:       # %bb.0:212; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma213; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t214; RV32-NEXT:    ret215;216; RV64-LABEL: mscatter_nxv2i16:217; RV64:       # %bb.0:218; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma219; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t220; RV64-NEXT:    ret221  call void @llvm.masked.scatter.nxv2i16.nxv2p0(<vscale x 2 x i16> %val, <vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %m)222  ret void223}224 225define void @mscatter_nxv2i32_truncstore_nxv2i16(<vscale x 2 x i32> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {226; RV32-LABEL: mscatter_nxv2i32_truncstore_nxv2i16:227; RV32:       # %bb.0:228; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma229; RV32-NEXT:    vnsrl.wi v8, v8, 0230; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t231; RV32-NEXT:    ret232;233; RV64-LABEL: mscatter_nxv2i32_truncstore_nxv2i16:234; RV64:       # %bb.0:235; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma236; RV64-NEXT:    vnsrl.wi v8, v8, 0237; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t238; RV64-NEXT:    ret239  %tval = trunc <vscale x 2 x i32> %val to <vscale x 2 x i16>240  call void @llvm.masked.scatter.nxv2i16.nxv2p0(<vscale x 2 x i16> %tval, <vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %m)241  ret void242}243 244define void @mscatter_nxv2i64_truncstore_nxv2i16(<vscale x 2 x i64> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {245; RV32-LABEL: mscatter_nxv2i64_truncstore_nxv2i16:246; RV32:       # %bb.0:247; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, ma248; RV32-NEXT:    vnsrl.wi v11, v8, 0249; RV32-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma250; RV32-NEXT:    vnsrl.wi v8, v11, 0251; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t252; RV32-NEXT:    ret253;254; RV64-LABEL: mscatter_nxv2i64_truncstore_nxv2i16:255; RV64:       # %bb.0:256; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, ma257; RV64-NEXT:    vnsrl.wi v12, v8, 0258; RV64-NEXT:    vsetvli zero, zero, e16, mf2, ta, ma259; RV64-NEXT:    vnsrl.wi v8, v12, 0260; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t261; RV64-NEXT:    ret262  %tval = trunc <vscale x 2 x i64> %val to <vscale x 2 x i16>263  call void @llvm.masked.scatter.nxv2i16.nxv2p0(<vscale x 2 x i16> %tval, <vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %m)264  ret void265}266 267define void @mscatter_nxv4i16(<vscale x 4 x i16> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m) {268; RV32-LABEL: mscatter_nxv4i16:269; RV32:       # %bb.0:270; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, ma271; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t272; RV32-NEXT:    ret273;274; RV64-LABEL: mscatter_nxv4i16:275; RV64:       # %bb.0:276; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, ma277; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t278; RV64-NEXT:    ret279  call void @llvm.masked.scatter.nxv4i16.nxv4p0(<vscale x 4 x i16> %val, <vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> %m)280  ret void281}282 283define void @mscatter_truemask_nxv4i16(<vscale x 4 x i16> %val, <vscale x 4 x ptr> %ptrs) {284; RV32-LABEL: mscatter_truemask_nxv4i16:285; RV32:       # %bb.0:286; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, ma287; RV32-NEXT:    vsoxei32.v v8, (zero), v10288; RV32-NEXT:    ret289;290; RV64-LABEL: mscatter_truemask_nxv4i16:291; RV64:       # %bb.0:292; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, ma293; RV64-NEXT:    vsoxei64.v v8, (zero), v12294; RV64-NEXT:    ret295  call void @llvm.masked.scatter.nxv4i16.nxv4p0(<vscale x 4 x i16> %val, <vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> splat (i1 1))296  ret void297}298 299define void @mscatter_falsemask_nxv4i16(<vscale x 4 x i16> %val, <vscale x 4 x ptr> %ptrs) {300; CHECK-LABEL: mscatter_falsemask_nxv4i16:301; CHECK:       # %bb.0:302; CHECK-NEXT:    ret303  call void @llvm.masked.scatter.nxv4i16.nxv4p0(<vscale x 4 x i16> %val, <vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer)304  ret void305}306 307define void @mscatter_nxv8i16(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m) {308; RV32-LABEL: mscatter_nxv8i16:309; RV32:       # %bb.0:310; RV32-NEXT:    vsetvli a0, zero, e16, m2, ta, ma311; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t312; RV32-NEXT:    ret313;314; RV64-LABEL: mscatter_nxv8i16:315; RV64:       # %bb.0:316; RV64-NEXT:    vsetvli a0, zero, e16, m2, ta, ma317; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t318; RV64-NEXT:    ret319  call void @llvm.masked.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)320  ret void321}322 323define void @mscatter_baseidx_nxv8i8_nxv8i16(<vscale x 8 x i16> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {324; RV32-LABEL: mscatter_baseidx_nxv8i8_nxv8i16:325; RV32:       # %bb.0:326; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma327; RV32-NEXT:    vsext.vf4 v12, v10328; RV32-NEXT:    vadd.vv v12, v12, v12329; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma330; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t331; RV32-NEXT:    ret332;333; RV64-LABEL: mscatter_baseidx_nxv8i8_nxv8i16:334; RV64:       # %bb.0:335; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma336; RV64-NEXT:    vsext.vf8 v16, v10337; RV64-NEXT:    vadd.vv v16, v16, v16338; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma339; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t340; RV64-NEXT:    ret341  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i8> %idxs342  call void @llvm.masked.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)343  ret void344}345 346define void @mscatter_baseidx_sext_nxv8i8_nxv8i16(<vscale x 8 x i16> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {347; RV32-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8i16:348; RV32:       # %bb.0:349; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma350; RV32-NEXT:    vsext.vf4 v12, v10351; RV32-NEXT:    vadd.vv v12, v12, v12352; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma353; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t354; RV32-NEXT:    ret355;356; RV64-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8i16:357; RV64:       # %bb.0:358; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma359; RV64-NEXT:    vsext.vf8 v16, v10360; RV64-NEXT:    vadd.vv v16, v16, v16361; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma362; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t363; RV64-NEXT:    ret364  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>365  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i16> %eidxs366  call void @llvm.masked.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)367  ret void368}369 370define void @mscatter_baseidx_zext_nxv8i8_nxv8i16(<vscale x 8 x i16> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {371; CHECK-LABEL: mscatter_baseidx_zext_nxv8i8_nxv8i16:372; CHECK:       # %bb.0:373; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, ma374; CHECK-NEXT:    vwaddu.vv v12, v10, v10375; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma376; CHECK-NEXT:    vsoxei16.v v8, (a0), v12, v0.t377; CHECK-NEXT:    ret378  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>379  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i16> %eidxs380  call void @llvm.masked.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)381  ret void382}383 384define void @mscatter_baseidx_nxv8i16(<vscale x 8 x i16> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {385; RV32-LABEL: mscatter_baseidx_nxv8i16:386; RV32:       # %bb.0:387; RV32-NEXT:    vsetvli a1, zero, e16, m2, ta, ma388; RV32-NEXT:    vwadd.vv v12, v10, v10389; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t390; RV32-NEXT:    ret391;392; RV64-LABEL: mscatter_baseidx_nxv8i16:393; RV64:       # %bb.0:394; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma395; RV64-NEXT:    vsext.vf4 v16, v10396; RV64-NEXT:    vadd.vv v16, v16, v16397; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma398; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t399; RV64-NEXT:    ret400  %ptrs = getelementptr inbounds i16, ptr %base, <vscale x 8 x i16> %idxs401  call void @llvm.masked.scatter.nxv8i16.nxv8p0(<vscale x 8 x i16> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)402  ret void403}404 405define void @mscatter_nxv1i32(<vscale x 1 x i32> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m) {406; RV32-LABEL: mscatter_nxv1i32:407; RV32:       # %bb.0:408; RV32-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma409; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t410; RV32-NEXT:    ret411;412; RV64-LABEL: mscatter_nxv1i32:413; RV64:       # %bb.0:414; RV64-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma415; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t416; RV64-NEXT:    ret417  call void @llvm.masked.scatter.nxv1i32.nxv1p0(<vscale x 1 x i32> %val, <vscale x 1 x ptr> %ptrs, i32 4, <vscale x 1 x i1> %m)418  ret void419}420 421define void @mscatter_nxv2i32(<vscale x 2 x i32> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {422; RV32-LABEL: mscatter_nxv2i32:423; RV32:       # %bb.0:424; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, ma425; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t426; RV32-NEXT:    ret427;428; RV64-LABEL: mscatter_nxv2i32:429; RV64:       # %bb.0:430; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, ma431; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t432; RV64-NEXT:    ret433  call void @llvm.masked.scatter.nxv2i32.nxv2p0(<vscale x 2 x i32> %val, <vscale x 2 x ptr> %ptrs, i32 4, <vscale x 2 x i1> %m)434  ret void435}436 437define void @mscatter_nxv2i64_truncstore_nxv2i32(<vscale x 2 x i64> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {438; RV32-LABEL: mscatter_nxv2i64_truncstore_nxv2i32:439; RV32:       # %bb.0:440; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, ma441; RV32-NEXT:    vnsrl.wi v11, v8, 0442; RV32-NEXT:    vsoxei32.v v11, (zero), v10, v0.t443; RV32-NEXT:    ret444;445; RV64-LABEL: mscatter_nxv2i64_truncstore_nxv2i32:446; RV64:       # %bb.0:447; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, ma448; RV64-NEXT:    vnsrl.wi v12, v8, 0449; RV64-NEXT:    vsoxei64.v v12, (zero), v10, v0.t450; RV64-NEXT:    ret451  %tval = trunc <vscale x 2 x i64> %val to <vscale x 2 x i32>452  call void @llvm.masked.scatter.nxv2i32.nxv2p0(<vscale x 2 x i32> %tval, <vscale x 2 x ptr> %ptrs, i32 4, <vscale x 2 x i1> %m)453  ret void454}455 456define void @mscatter_nxv4i32(<vscale x 4 x i32> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m) {457; RV32-LABEL: mscatter_nxv4i32:458; RV32:       # %bb.0:459; RV32-NEXT:    vsetvli a0, zero, e32, m2, ta, ma460; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t461; RV32-NEXT:    ret462;463; RV64-LABEL: mscatter_nxv4i32:464; RV64:       # %bb.0:465; RV64-NEXT:    vsetvli a0, zero, e32, m2, ta, ma466; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t467; RV64-NEXT:    ret468  call void @llvm.masked.scatter.nxv4i32.nxv4p0(<vscale x 4 x i32> %val, <vscale x 4 x ptr> %ptrs, i32 4, <vscale x 4 x i1> %m)469  ret void470}471 472define void @mscatter_truemask_nxv4i32(<vscale x 4 x i32> %val, <vscale x 4 x ptr> %ptrs) {473; RV32-LABEL: mscatter_truemask_nxv4i32:474; RV32:       # %bb.0:475; RV32-NEXT:    vsetvli a0, zero, e32, m2, ta, ma476; RV32-NEXT:    vsoxei32.v v8, (zero), v10477; RV32-NEXT:    ret478;479; RV64-LABEL: mscatter_truemask_nxv4i32:480; RV64:       # %bb.0:481; RV64-NEXT:    vsetvli a0, zero, e32, m2, ta, ma482; RV64-NEXT:    vsoxei64.v v8, (zero), v12483; RV64-NEXT:    ret484  call void @llvm.masked.scatter.nxv4i32.nxv4p0(<vscale x 4 x i32> %val, <vscale x 4 x ptr> %ptrs, i32 4, <vscale x 4 x i1> splat (i1 1))485  ret void486}487 488define void @mscatter_falsemask_nxv4i32(<vscale x 4 x i32> %val, <vscale x 4 x ptr> %ptrs) {489; CHECK-LABEL: mscatter_falsemask_nxv4i32:490; CHECK:       # %bb.0:491; CHECK-NEXT:    ret492  call void @llvm.masked.scatter.nxv4i32.nxv4p0(<vscale x 4 x i32> %val, <vscale x 4 x ptr> %ptrs, i32 4, <vscale x 4 x i1> zeroinitializer)493  ret void494}495 496define void @mscatter_nxv8i32(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m) {497; RV32-LABEL: mscatter_nxv8i32:498; RV32:       # %bb.0:499; RV32-NEXT:    vsetvli a0, zero, e32, m4, ta, ma500; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t501; RV32-NEXT:    ret502;503; RV64-LABEL: mscatter_nxv8i32:504; RV64:       # %bb.0:505; RV64-NEXT:    vsetvli a0, zero, e32, m4, ta, ma506; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t507; RV64-NEXT:    ret508  call void @llvm.masked.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)509  ret void510}511 512define void @mscatter_baseidx_nxv8i8_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {513; RV32-LABEL: mscatter_baseidx_nxv8i8_nxv8i32:514; RV32:       # %bb.0:515; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma516; RV32-NEXT:    vsext.vf4 v16, v12517; RV32-NEXT:    vsll.vi v12, v16, 2518; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t519; RV32-NEXT:    ret520;521; RV64-LABEL: mscatter_baseidx_nxv8i8_nxv8i32:522; RV64:       # %bb.0:523; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma524; RV64-NEXT:    vsext.vf8 v16, v12525; RV64-NEXT:    vsll.vi v16, v16, 2526; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma527; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t528; RV64-NEXT:    ret529  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i8> %idxs530  call void @llvm.masked.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)531  ret void532}533 534define void @mscatter_baseidx_sext_nxv8i8_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {535; RV32-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8i32:536; RV32:       # %bb.0:537; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma538; RV32-NEXT:    vsext.vf4 v16, v12539; RV32-NEXT:    vsll.vi v12, v16, 2540; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t541; RV32-NEXT:    ret542;543; RV64-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8i32:544; RV64:       # %bb.0:545; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma546; RV64-NEXT:    vsext.vf8 v16, v12547; RV64-NEXT:    vsll.vi v16, v16, 2548; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma549; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t550; RV64-NEXT:    ret551  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>552  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs553  call void @llvm.masked.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)554  ret void555}556 557define void @mscatter_baseidx_zext_nxv8i8_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {558; CHECK-LABEL: mscatter_baseidx_zext_nxv8i8_nxv8i32:559; CHECK:       # %bb.0:560; CHECK-NEXT:    li a1, 4561; CHECK-NEXT:    vsetvli a2, zero, e8, m1, ta, ma562; CHECK-NEXT:    vwmulu.vx v14, v12, a1563; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma564; CHECK-NEXT:    vsoxei16.v v8, (a0), v14, v0.t565; CHECK-NEXT:    ret566  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>567  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs568  call void @llvm.masked.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)569  ret void570}571 572define void @mscatter_baseidx_nxv8i16_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {573; RV32-LABEL: mscatter_baseidx_nxv8i16_nxv8i32:574; RV32:       # %bb.0:575; RV32-NEXT:    li a1, 4576; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma577; RV32-NEXT:    vwmulsu.vx v16, v12, a1578; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma579; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t580; RV32-NEXT:    ret581;582; RV64-LABEL: mscatter_baseidx_nxv8i16_nxv8i32:583; RV64:       # %bb.0:584; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma585; RV64-NEXT:    vsext.vf4 v16, v12586; RV64-NEXT:    vsll.vi v16, v16, 2587; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma588; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t589; RV64-NEXT:    ret590  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i16> %idxs591  call void @llvm.masked.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)592  ret void593}594 595define void @mscatter_baseidx_sext_nxv8i16_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {596; RV32-LABEL: mscatter_baseidx_sext_nxv8i16_nxv8i32:597; RV32:       # %bb.0:598; RV32-NEXT:    li a1, 4599; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma600; RV32-NEXT:    vwmulsu.vx v16, v12, a1601; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma602; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t603; RV32-NEXT:    ret604;605; RV64-LABEL: mscatter_baseidx_sext_nxv8i16_nxv8i32:606; RV64:       # %bb.0:607; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma608; RV64-NEXT:    vsext.vf4 v16, v12609; RV64-NEXT:    vsll.vi v16, v16, 2610; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma611; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t612; RV64-NEXT:    ret613  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>614  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs615  call void @llvm.masked.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)616  ret void617}618 619define void @mscatter_baseidx_zext_nxv8i16_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {620; CHECK-LABEL: mscatter_baseidx_zext_nxv8i16_nxv8i32:621; CHECK:       # %bb.0:622; CHECK-NEXT:    li a1, 4623; CHECK-NEXT:    vsetvli a2, zero, e16, m2, ta, ma624; CHECK-NEXT:    vwmulu.vx v16, v12, a1625; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma626; CHECK-NEXT:    vsoxei32.v v8, (a0), v16, v0.t627; CHECK-NEXT:    ret628  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>629  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %eidxs630  call void @llvm.masked.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)631  ret void632}633 634define void @mscatter_baseidx_nxv8i32(<vscale x 8 x i32> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m) {635; RV32-LABEL: mscatter_baseidx_nxv8i32:636; RV32:       # %bb.0:637; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma638; RV32-NEXT:    vsll.vi v12, v12, 2639; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t640; RV32-NEXT:    ret641;642; RV64-LABEL: mscatter_baseidx_nxv8i32:643; RV64:       # %bb.0:644; RV64-NEXT:    li a1, 4645; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma646; RV64-NEXT:    vwmulsu.vx v16, v12, a1647; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t648; RV64-NEXT:    ret649  %ptrs = getelementptr inbounds i32, ptr %base, <vscale x 8 x i32> %idxs650  call void @llvm.masked.scatter.nxv8i32.nxv8p0(<vscale x 8 x i32> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)651  ret void652}653 654define void @mscatter_nxv1i64(<vscale x 1 x i64> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m) {655; RV32-LABEL: mscatter_nxv1i64:656; RV32:       # %bb.0:657; RV32-NEXT:    vsetvli a0, zero, e64, m1, ta, ma658; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t659; RV32-NEXT:    ret660;661; RV64-LABEL: mscatter_nxv1i64:662; RV64:       # %bb.0:663; RV64-NEXT:    vsetvli a0, zero, e64, m1, ta, ma664; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t665; RV64-NEXT:    ret666  call void @llvm.masked.scatter.nxv1i64.nxv1p0(<vscale x 1 x i64> %val, <vscale x 1 x ptr> %ptrs, i32 8, <vscale x 1 x i1> %m)667  ret void668}669 670define void @mscatter_nxv2i64(<vscale x 2 x i64> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {671; RV32-LABEL: mscatter_nxv2i64:672; RV32:       # %bb.0:673; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, ma674; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t675; RV32-NEXT:    ret676;677; RV64-LABEL: mscatter_nxv2i64:678; RV64:       # %bb.0:679; RV64-NEXT:    vsetvli a0, zero, e64, m2, ta, ma680; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t681; RV64-NEXT:    ret682  call void @llvm.masked.scatter.nxv2i64.nxv2p0(<vscale x 2 x i64> %val, <vscale x 2 x ptr> %ptrs, i32 8, <vscale x 2 x i1> %m)683  ret void684}685 686define void @mscatter_nxv4i64(<vscale x 4 x i64> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m) {687; RV32-LABEL: mscatter_nxv4i64:688; RV32:       # %bb.0:689; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, ma690; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t691; RV32-NEXT:    ret692;693; RV64-LABEL: mscatter_nxv4i64:694; RV64:       # %bb.0:695; RV64-NEXT:    vsetvli a0, zero, e64, m4, ta, ma696; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t697; RV64-NEXT:    ret698  call void @llvm.masked.scatter.nxv4i64.nxv4p0(<vscale x 4 x i64> %val, <vscale x 4 x ptr> %ptrs, i32 8, <vscale x 4 x i1> %m)699  ret void700}701 702define void @mscatter_truemask_nxv4i64(<vscale x 4 x i64> %val, <vscale x 4 x ptr> %ptrs) {703; RV32-LABEL: mscatter_truemask_nxv4i64:704; RV32:       # %bb.0:705; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, ma706; RV32-NEXT:    vsoxei32.v v8, (zero), v12707; RV32-NEXT:    ret708;709; RV64-LABEL: mscatter_truemask_nxv4i64:710; RV64:       # %bb.0:711; RV64-NEXT:    vsetvli a0, zero, e64, m4, ta, ma712; RV64-NEXT:    vsoxei64.v v8, (zero), v12713; RV64-NEXT:    ret714  call void @llvm.masked.scatter.nxv4i64.nxv4p0(<vscale x 4 x i64> %val, <vscale x 4 x ptr> %ptrs, i32 8, <vscale x 4 x i1> splat (i1 1))715  ret void716}717 718define void @mscatter_falsemask_nxv4i64(<vscale x 4 x i64> %val, <vscale x 4 x ptr> %ptrs) {719; CHECK-LABEL: mscatter_falsemask_nxv4i64:720; CHECK:       # %bb.0:721; CHECK-NEXT:    ret722  call void @llvm.masked.scatter.nxv4i64.nxv4p0(<vscale x 4 x i64> %val, <vscale x 4 x ptr> %ptrs, i32 8, <vscale x 4 x i1> zeroinitializer)723  ret void724}725 726define void @mscatter_nxv8i64(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m) {727; RV32-LABEL: mscatter_nxv8i64:728; RV32:       # %bb.0:729; RV32-NEXT:    vsetvli a0, zero, e64, m8, ta, ma730; RV32-NEXT:    vsoxei32.v v8, (zero), v16, v0.t731; RV32-NEXT:    ret732;733; RV64-LABEL: mscatter_nxv8i64:734; RV64:       # %bb.0:735; RV64-NEXT:    vsetvli a0, zero, e64, m8, ta, ma736; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t737; RV64-NEXT:    ret738  call void @llvm.masked.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)739  ret void740}741 742define void @mscatter_baseidx_nxv8i8_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {743; RV32-LABEL: mscatter_baseidx_nxv8i8_nxv8i64:744; RV32:       # %bb.0:745; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma746; RV32-NEXT:    vsext.vf4 v20, v16747; RV32-NEXT:    vsll.vi v16, v20, 3748; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma749; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t750; RV32-NEXT:    ret751;752; RV64-LABEL: mscatter_baseidx_nxv8i8_nxv8i64:753; RV64:       # %bb.0:754; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma755; RV64-NEXT:    vsext.vf8 v24, v16756; RV64-NEXT:    vsll.vi v16, v24, 3757; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t758; RV64-NEXT:    ret759  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i8> %idxs760  call void @llvm.masked.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)761  ret void762}763 764define void @mscatter_baseidx_sext_nxv8i8_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {765; RV32-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8i64:766; RV32:       # %bb.0:767; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma768; RV32-NEXT:    vsext.vf4 v20, v16769; RV32-NEXT:    vsll.vi v16, v20, 3770; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma771; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t772; RV32-NEXT:    ret773;774; RV64-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8i64:775; RV64:       # %bb.0:776; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma777; RV64-NEXT:    vsext.vf8 v24, v16778; RV64-NEXT:    vsll.vi v16, v24, 3779; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t780; RV64-NEXT:    ret781  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>782  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs783  call void @llvm.masked.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)784  ret void785}786 787define void @mscatter_baseidx_zext_nxv8i8_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {788; CHECK-LABEL: mscatter_baseidx_zext_nxv8i8_nxv8i64:789; CHECK:       # %bb.0:790; CHECK-NEXT:    li a1, 8791; CHECK-NEXT:    vsetvli a2, zero, e8, m1, ta, ma792; CHECK-NEXT:    vwmulu.vx v18, v16, a1793; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, ma794; CHECK-NEXT:    vsoxei16.v v8, (a0), v18, v0.t795; CHECK-NEXT:    ret796  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>797  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs798  call void @llvm.masked.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)799  ret void800}801 802define void @mscatter_baseidx_nxv8i16_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {803; RV32-LABEL: mscatter_baseidx_nxv8i16_nxv8i64:804; RV32:       # %bb.0:805; RV32-NEXT:    li a1, 8806; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma807; RV32-NEXT:    vwmulsu.vx v20, v16, a1808; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma809; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t810; RV32-NEXT:    ret811;812; RV64-LABEL: mscatter_baseidx_nxv8i16_nxv8i64:813; RV64:       # %bb.0:814; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma815; RV64-NEXT:    vsext.vf4 v24, v16816; RV64-NEXT:    vsll.vi v16, v24, 3817; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t818; RV64-NEXT:    ret819  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i16> %idxs820  call void @llvm.masked.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)821  ret void822}823 824define void @mscatter_baseidx_sext_nxv8i16_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {825; RV32-LABEL: mscatter_baseidx_sext_nxv8i16_nxv8i64:826; RV32:       # %bb.0:827; RV32-NEXT:    li a1, 8828; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma829; RV32-NEXT:    vwmulsu.vx v20, v16, a1830; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma831; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t832; RV32-NEXT:    ret833;834; RV64-LABEL: mscatter_baseidx_sext_nxv8i16_nxv8i64:835; RV64:       # %bb.0:836; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma837; RV64-NEXT:    vsext.vf4 v24, v16838; RV64-NEXT:    vsll.vi v16, v24, 3839; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t840; RV64-NEXT:    ret841  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>842  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs843  call void @llvm.masked.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)844  ret void845}846 847define void @mscatter_baseidx_zext_nxv8i16_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {848; CHECK-LABEL: mscatter_baseidx_zext_nxv8i16_nxv8i64:849; CHECK:       # %bb.0:850; CHECK-NEXT:    li a1, 8851; CHECK-NEXT:    vsetvli a2, zero, e16, m2, ta, ma852; CHECK-NEXT:    vwmulu.vx v20, v16, a1853; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, ma854; CHECK-NEXT:    vsoxei32.v v8, (a0), v20, v0.t855; CHECK-NEXT:    ret856  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>857  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs858  call void @llvm.masked.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)859  ret void860}861 862define void @mscatter_baseidx_nxv8i32_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m) {863; RV32-LABEL: mscatter_baseidx_nxv8i32_nxv8i64:864; RV32:       # %bb.0:865; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma866; RV32-NEXT:    vsll.vi v16, v16, 3867; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma868; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t869; RV32-NEXT:    ret870;871; RV64-LABEL: mscatter_baseidx_nxv8i32_nxv8i64:872; RV64:       # %bb.0:873; RV64-NEXT:    li a1, 8874; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma875; RV64-NEXT:    vwmulsu.vx v24, v16, a1876; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma877; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t878; RV64-NEXT:    ret879  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i32> %idxs880  call void @llvm.masked.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)881  ret void882}883 884define void @mscatter_baseidx_sext_nxv8i32_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m) {885; RV32-LABEL: mscatter_baseidx_sext_nxv8i32_nxv8i64:886; RV32:       # %bb.0:887; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma888; RV32-NEXT:    vsll.vi v16, v16, 3889; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma890; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t891; RV32-NEXT:    ret892;893; RV64-LABEL: mscatter_baseidx_sext_nxv8i32_nxv8i64:894; RV64:       # %bb.0:895; RV64-NEXT:    li a1, 8896; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma897; RV64-NEXT:    vwmulsu.vx v24, v16, a1898; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma899; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t900; RV64-NEXT:    ret901  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>902  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs903  call void @llvm.masked.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)904  ret void905}906 907define void @mscatter_baseidx_zext_nxv8i32_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m) {908; RV32-LABEL: mscatter_baseidx_zext_nxv8i32_nxv8i64:909; RV32:       # %bb.0:910; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma911; RV32-NEXT:    vsll.vi v16, v16, 3912; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma913; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t914; RV32-NEXT:    ret915;916; RV64-LABEL: mscatter_baseidx_zext_nxv8i32_nxv8i64:917; RV64:       # %bb.0:918; RV64-NEXT:    li a1, 8919; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma920; RV64-NEXT:    vwmulu.vx v24, v16, a1921; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma922; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t923; RV64-NEXT:    ret924  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>925  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %eidxs926  call void @llvm.masked.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)927  ret void928}929 930define void @mscatter_baseidx_nxv8i64(<vscale x 8 x i64> %val, ptr %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m) {931; RV32-LABEL: mscatter_baseidx_nxv8i64:932; RV32:       # %bb.0:933; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma934; RV32-NEXT:    vnsrl.wi v24, v16, 0935; RV32-NEXT:    vsll.vi v16, v24, 3936; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma937; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t938; RV32-NEXT:    ret939;940; RV64-LABEL: mscatter_baseidx_nxv8i64:941; RV64:       # %bb.0:942; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma943; RV64-NEXT:    vsll.vi v16, v16, 3944; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t945; RV64-NEXT:    ret946  %ptrs = getelementptr inbounds i64, ptr %base, <vscale x 8 x i64> %idxs947  call void @llvm.masked.scatter.nxv8i64.nxv8p0(<vscale x 8 x i64> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)948  ret void949}950 951define void @mscatter_nxv1bf16(<vscale x 1 x bfloat> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m) {952; RV32-LABEL: mscatter_nxv1bf16:953; RV32:       # %bb.0:954; RV32-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma955; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t956; RV32-NEXT:    ret957;958; RV64-LABEL: mscatter_nxv1bf16:959; RV64:       # %bb.0:960; RV64-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma961; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t962; RV64-NEXT:    ret963  call void @llvm.masked.scatter.nxv1bf16.nxv1p0(<vscale x 1 x bfloat> %val, <vscale x 1 x ptr> %ptrs, i32 2, <vscale x 1 x i1> %m)964  ret void965}966 967define void @mscatter_nxv2bf16(<vscale x 2 x bfloat> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {968; RV32-LABEL: mscatter_nxv2bf16:969; RV32:       # %bb.0:970; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma971; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t972; RV32-NEXT:    ret973;974; RV64-LABEL: mscatter_nxv2bf16:975; RV64:       # %bb.0:976; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma977; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t978; RV64-NEXT:    ret979  call void @llvm.masked.scatter.nxv2bf16.nxv2p0(<vscale x 2 x bfloat> %val, <vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %m)980  ret void981}982 983define void @mscatter_nxv4bf16(<vscale x 4 x bfloat> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m) {984; RV32-LABEL: mscatter_nxv4bf16:985; RV32:       # %bb.0:986; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, ma987; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t988; RV32-NEXT:    ret989;990; RV64-LABEL: mscatter_nxv4bf16:991; RV64:       # %bb.0:992; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, ma993; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t994; RV64-NEXT:    ret995  call void @llvm.masked.scatter.nxv4bf16.nxv4p0(<vscale x 4 x bfloat> %val, <vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> %m)996  ret void997}998 999define void @mscatter_truemask_nxv4bf16(<vscale x 4 x bfloat> %val, <vscale x 4 x ptr> %ptrs) {1000; RV32-LABEL: mscatter_truemask_nxv4bf16:1001; RV32:       # %bb.0:1002; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, ma1003; RV32-NEXT:    vsoxei32.v v8, (zero), v101004; RV32-NEXT:    ret1005;1006; RV64-LABEL: mscatter_truemask_nxv4bf16:1007; RV64:       # %bb.0:1008; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, ma1009; RV64-NEXT:    vsoxei64.v v8, (zero), v121010; RV64-NEXT:    ret1011  call void @llvm.masked.scatter.nxv4bf16.nxv4p0(<vscale x 4 x bfloat> %val, <vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> splat (i1 1))1012  ret void1013}1014 1015define void @mscatter_falsemask_nxv4bf16(<vscale x 4 x bfloat> %val, <vscale x 4 x ptr> %ptrs) {1016; CHECK-LABEL: mscatter_falsemask_nxv4bf16:1017; CHECK:       # %bb.0:1018; CHECK-NEXT:    ret1019  call void @llvm.masked.scatter.nxv4bf16.nxv4p0(<vscale x 4 x bfloat> %val, <vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer)1020  ret void1021}1022 1023define void @mscatter_nxv8bf16(<vscale x 8 x bfloat> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m) {1024; RV32-LABEL: mscatter_nxv8bf16:1025; RV32:       # %bb.0:1026; RV32-NEXT:    vsetvli a0, zero, e16, m2, ta, ma1027; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t1028; RV32-NEXT:    ret1029;1030; RV64-LABEL: mscatter_nxv8bf16:1031; RV64:       # %bb.0:1032; RV64-NEXT:    vsetvli a0, zero, e16, m2, ta, ma1033; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t1034; RV64-NEXT:    ret1035  call void @llvm.masked.scatter.nxv8bf16.nxv8p0(<vscale x 8 x bfloat> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)1036  ret void1037}1038 1039define void @mscatter_baseidx_nxv8i8_nxv8bf16(<vscale x 8 x bfloat> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {1040; RV32-LABEL: mscatter_baseidx_nxv8i8_nxv8bf16:1041; RV32:       # %bb.0:1042; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1043; RV32-NEXT:    vsext.vf4 v12, v101044; RV32-NEXT:    vadd.vv v12, v12, v121045; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1046; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1047; RV32-NEXT:    ret1048;1049; RV64-LABEL: mscatter_baseidx_nxv8i8_nxv8bf16:1050; RV64:       # %bb.0:1051; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1052; RV64-NEXT:    vsext.vf8 v16, v101053; RV64-NEXT:    vadd.vv v16, v16, v161054; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1055; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1056; RV64-NEXT:    ret1057  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i8> %idxs1058  call void @llvm.masked.scatter.nxv8bf16.nxv8p0(<vscale x 8 x bfloat> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)1059  ret void1060}1061 1062define void @mscatter_baseidx_sext_nxv8i8_nxv8bf16(<vscale x 8 x bfloat> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {1063; RV32-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8bf16:1064; RV32:       # %bb.0:1065; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1066; RV32-NEXT:    vsext.vf4 v12, v101067; RV32-NEXT:    vadd.vv v12, v12, v121068; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1069; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1070; RV32-NEXT:    ret1071;1072; RV64-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8bf16:1073; RV64:       # %bb.0:1074; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1075; RV64-NEXT:    vsext.vf8 v16, v101076; RV64-NEXT:    vadd.vv v16, v16, v161077; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1078; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1079; RV64-NEXT:    ret1080  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1081  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i16> %eidxs1082  call void @llvm.masked.scatter.nxv8bf16.nxv8p0(<vscale x 8 x bfloat> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)1083  ret void1084}1085 1086define void @mscatter_baseidx_zext_nxv8i8_nxv8bf16(<vscale x 8 x bfloat> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {1087; CHECK-LABEL: mscatter_baseidx_zext_nxv8i8_nxv8bf16:1088; CHECK:       # %bb.0:1089; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, ma1090; CHECK-NEXT:    vwaddu.vv v12, v10, v101091; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1092; CHECK-NEXT:    vsoxei16.v v8, (a0), v12, v0.t1093; CHECK-NEXT:    ret1094  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1095  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i16> %eidxs1096  call void @llvm.masked.scatter.nxv8bf16.nxv8p0(<vscale x 8 x bfloat> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)1097  ret void1098}1099 1100define void @mscatter_baseidx_nxv8bf16(<vscale x 8 x bfloat> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {1101; RV32-LABEL: mscatter_baseidx_nxv8bf16:1102; RV32:       # %bb.0:1103; RV32-NEXT:    vsetvli a1, zero, e16, m2, ta, ma1104; RV32-NEXT:    vwadd.vv v12, v10, v101105; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1106; RV32-NEXT:    ret1107;1108; RV64-LABEL: mscatter_baseidx_nxv8bf16:1109; RV64:       # %bb.0:1110; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1111; RV64-NEXT:    vsext.vf4 v16, v101112; RV64-NEXT:    vadd.vv v16, v16, v161113; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1114; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1115; RV64-NEXT:    ret1116  %ptrs = getelementptr inbounds bfloat, ptr %base, <vscale x 8 x i16> %idxs1117  call void @llvm.masked.scatter.nxv8bf16.nxv8p0(<vscale x 8 x bfloat> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)1118  ret void1119}1120 1121define void @mscatter_nxv1f16(<vscale x 1 x half> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m) {1122; RV32-LABEL: mscatter_nxv1f16:1123; RV32:       # %bb.0:1124; RV32-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma1125; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t1126; RV32-NEXT:    ret1127;1128; RV64-LABEL: mscatter_nxv1f16:1129; RV64:       # %bb.0:1130; RV64-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma1131; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t1132; RV64-NEXT:    ret1133  call void @llvm.masked.scatter.nxv1f16.nxv1p0(<vscale x 1 x half> %val, <vscale x 1 x ptr> %ptrs, i32 2, <vscale x 1 x i1> %m)1134  ret void1135}1136 1137define void @mscatter_nxv2f16(<vscale x 2 x half> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {1138; RV32-LABEL: mscatter_nxv2f16:1139; RV32:       # %bb.0:1140; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma1141; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t1142; RV32-NEXT:    ret1143;1144; RV64-LABEL: mscatter_nxv2f16:1145; RV64:       # %bb.0:1146; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma1147; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t1148; RV64-NEXT:    ret1149  call void @llvm.masked.scatter.nxv2f16.nxv2p0(<vscale x 2 x half> %val, <vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %m)1150  ret void1151}1152 1153define void @mscatter_nxv4f16(<vscale x 4 x half> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m) {1154; RV32-LABEL: mscatter_nxv4f16:1155; RV32:       # %bb.0:1156; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, ma1157; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t1158; RV32-NEXT:    ret1159;1160; RV64-LABEL: mscatter_nxv4f16:1161; RV64:       # %bb.0:1162; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, ma1163; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t1164; RV64-NEXT:    ret1165  call void @llvm.masked.scatter.nxv4f16.nxv4p0(<vscale x 4 x half> %val, <vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> %m)1166  ret void1167}1168 1169define void @mscatter_truemask_nxv4f16(<vscale x 4 x half> %val, <vscale x 4 x ptr> %ptrs) {1170; RV32-LABEL: mscatter_truemask_nxv4f16:1171; RV32:       # %bb.0:1172; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, ma1173; RV32-NEXT:    vsoxei32.v v8, (zero), v101174; RV32-NEXT:    ret1175;1176; RV64-LABEL: mscatter_truemask_nxv4f16:1177; RV64:       # %bb.0:1178; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, ma1179; RV64-NEXT:    vsoxei64.v v8, (zero), v121180; RV64-NEXT:    ret1181  call void @llvm.masked.scatter.nxv4f16.nxv4p0(<vscale x 4 x half> %val, <vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> splat (i1 1))1182  ret void1183}1184 1185define void @mscatter_falsemask_nxv4f16(<vscale x 4 x half> %val, <vscale x 4 x ptr> %ptrs) {1186; CHECK-LABEL: mscatter_falsemask_nxv4f16:1187; CHECK:       # %bb.0:1188; CHECK-NEXT:    ret1189  call void @llvm.masked.scatter.nxv4f16.nxv4p0(<vscale x 4 x half> %val, <vscale x 4 x ptr> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer)1190  ret void1191}1192 1193define void @mscatter_nxv8f16(<vscale x 8 x half> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m) {1194; RV32-LABEL: mscatter_nxv8f16:1195; RV32:       # %bb.0:1196; RV32-NEXT:    vsetvli a0, zero, e16, m2, ta, ma1197; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t1198; RV32-NEXT:    ret1199;1200; RV64-LABEL: mscatter_nxv8f16:1201; RV64:       # %bb.0:1202; RV64-NEXT:    vsetvli a0, zero, e16, m2, ta, ma1203; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t1204; RV64-NEXT:    ret1205  call void @llvm.masked.scatter.nxv8f16.nxv8p0(<vscale x 8 x half> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)1206  ret void1207}1208 1209define void @mscatter_baseidx_nxv8i8_nxv8f16(<vscale x 8 x half> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {1210; RV32-LABEL: mscatter_baseidx_nxv8i8_nxv8f16:1211; RV32:       # %bb.0:1212; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1213; RV32-NEXT:    vsext.vf4 v12, v101214; RV32-NEXT:    vadd.vv v12, v12, v121215; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1216; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1217; RV32-NEXT:    ret1218;1219; RV64-LABEL: mscatter_baseidx_nxv8i8_nxv8f16:1220; RV64:       # %bb.0:1221; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1222; RV64-NEXT:    vsext.vf8 v16, v101223; RV64-NEXT:    vadd.vv v16, v16, v161224; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1225; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1226; RV64-NEXT:    ret1227  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i8> %idxs1228  call void @llvm.masked.scatter.nxv8f16.nxv8p0(<vscale x 8 x half> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)1229  ret void1230}1231 1232define void @mscatter_baseidx_sext_nxv8i8_nxv8f16(<vscale x 8 x half> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {1233; RV32-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8f16:1234; RV32:       # %bb.0:1235; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1236; RV32-NEXT:    vsext.vf4 v12, v101237; RV32-NEXT:    vadd.vv v12, v12, v121238; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1239; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1240; RV32-NEXT:    ret1241;1242; RV64-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8f16:1243; RV64:       # %bb.0:1244; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1245; RV64-NEXT:    vsext.vf8 v16, v101246; RV64-NEXT:    vadd.vv v16, v16, v161247; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1248; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1249; RV64-NEXT:    ret1250  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1251  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i16> %eidxs1252  call void @llvm.masked.scatter.nxv8f16.nxv8p0(<vscale x 8 x half> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)1253  ret void1254}1255 1256define void @mscatter_baseidx_zext_nxv8i8_nxv8f16(<vscale x 8 x half> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {1257; CHECK-LABEL: mscatter_baseidx_zext_nxv8i8_nxv8f16:1258; CHECK:       # %bb.0:1259; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, ma1260; CHECK-NEXT:    vwaddu.vv v12, v10, v101261; CHECK-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1262; CHECK-NEXT:    vsoxei16.v v8, (a0), v12, v0.t1263; CHECK-NEXT:    ret1264  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>1265  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i16> %eidxs1266  call void @llvm.masked.scatter.nxv8f16.nxv8p0(<vscale x 8 x half> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)1267  ret void1268}1269 1270define void @mscatter_baseidx_nxv8f16(<vscale x 8 x half> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {1271; RV32-LABEL: mscatter_baseidx_nxv8f16:1272; RV32:       # %bb.0:1273; RV32-NEXT:    vsetvli a1, zero, e16, m2, ta, ma1274; RV32-NEXT:    vwadd.vv v12, v10, v101275; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1276; RV32-NEXT:    ret1277;1278; RV64-LABEL: mscatter_baseidx_nxv8f16:1279; RV64:       # %bb.0:1280; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1281; RV64-NEXT:    vsext.vf4 v16, v101282; RV64-NEXT:    vadd.vv v16, v16, v161283; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, ma1284; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1285; RV64-NEXT:    ret1286  %ptrs = getelementptr inbounds half, ptr %base, <vscale x 8 x i16> %idxs1287  call void @llvm.masked.scatter.nxv8f16.nxv8p0(<vscale x 8 x half> %val, <vscale x 8 x ptr> %ptrs, i32 2, <vscale x 8 x i1> %m)1288  ret void1289}1290 1291define void @mscatter_nxv1f32(<vscale x 1 x float> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m) {1292; RV32-LABEL: mscatter_nxv1f32:1293; RV32:       # %bb.0:1294; RV32-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma1295; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t1296; RV32-NEXT:    ret1297;1298; RV64-LABEL: mscatter_nxv1f32:1299; RV64:       # %bb.0:1300; RV64-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma1301; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t1302; RV64-NEXT:    ret1303  call void @llvm.masked.scatter.nxv1f32.nxv1p0(<vscale x 1 x float> %val, <vscale x 1 x ptr> %ptrs, i32 4, <vscale x 1 x i1> %m)1304  ret void1305}1306 1307define void @mscatter_nxv2f32(<vscale x 2 x float> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {1308; RV32-LABEL: mscatter_nxv2f32:1309; RV32:       # %bb.0:1310; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, ma1311; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t1312; RV32-NEXT:    ret1313;1314; RV64-LABEL: mscatter_nxv2f32:1315; RV64:       # %bb.0:1316; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, ma1317; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t1318; RV64-NEXT:    ret1319  call void @llvm.masked.scatter.nxv2f32.nxv2p0(<vscale x 2 x float> %val, <vscale x 2 x ptr> %ptrs, i32 4, <vscale x 2 x i1> %m)1320  ret void1321}1322 1323define void @mscatter_nxv4f32(<vscale x 4 x float> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m) {1324; RV32-LABEL: mscatter_nxv4f32:1325; RV32:       # %bb.0:1326; RV32-NEXT:    vsetvli a0, zero, e32, m2, ta, ma1327; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t1328; RV32-NEXT:    ret1329;1330; RV64-LABEL: mscatter_nxv4f32:1331; RV64:       # %bb.0:1332; RV64-NEXT:    vsetvli a0, zero, e32, m2, ta, ma1333; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t1334; RV64-NEXT:    ret1335  call void @llvm.masked.scatter.nxv4f32.nxv4p0(<vscale x 4 x float> %val, <vscale x 4 x ptr> %ptrs, i32 4, <vscale x 4 x i1> %m)1336  ret void1337}1338 1339define void @mscatter_truemask_nxv4f32(<vscale x 4 x float> %val, <vscale x 4 x ptr> %ptrs) {1340; RV32-LABEL: mscatter_truemask_nxv4f32:1341; RV32:       # %bb.0:1342; RV32-NEXT:    vsetvli a0, zero, e32, m2, ta, ma1343; RV32-NEXT:    vsoxei32.v v8, (zero), v101344; RV32-NEXT:    ret1345;1346; RV64-LABEL: mscatter_truemask_nxv4f32:1347; RV64:       # %bb.0:1348; RV64-NEXT:    vsetvli a0, zero, e32, m2, ta, ma1349; RV64-NEXT:    vsoxei64.v v8, (zero), v121350; RV64-NEXT:    ret1351  call void @llvm.masked.scatter.nxv4f32.nxv4p0(<vscale x 4 x float> %val, <vscale x 4 x ptr> %ptrs, i32 4, <vscale x 4 x i1> splat (i1 1))1352  ret void1353}1354 1355define void @mscatter_falsemask_nxv4f32(<vscale x 4 x float> %val, <vscale x 4 x ptr> %ptrs) {1356; CHECK-LABEL: mscatter_falsemask_nxv4f32:1357; CHECK:       # %bb.0:1358; CHECK-NEXT:    ret1359  call void @llvm.masked.scatter.nxv4f32.nxv4p0(<vscale x 4 x float> %val, <vscale x 4 x ptr> %ptrs, i32 4, <vscale x 4 x i1> zeroinitializer)1360  ret void1361}1362 1363define void @mscatter_nxv8f32(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m) {1364; RV32-LABEL: mscatter_nxv8f32:1365; RV32:       # %bb.0:1366; RV32-NEXT:    vsetvli a0, zero, e32, m4, ta, ma1367; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t1368; RV32-NEXT:    ret1369;1370; RV64-LABEL: mscatter_nxv8f32:1371; RV64:       # %bb.0:1372; RV64-NEXT:    vsetvli a0, zero, e32, m4, ta, ma1373; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t1374; RV64-NEXT:    ret1375  call void @llvm.masked.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)1376  ret void1377}1378 1379define void @mscatter_baseidx_nxv8i8_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {1380; RV32-LABEL: mscatter_baseidx_nxv8i8_nxv8f32:1381; RV32:       # %bb.0:1382; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1383; RV32-NEXT:    vsext.vf4 v16, v121384; RV32-NEXT:    vsll.vi v12, v16, 21385; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1386; RV32-NEXT:    ret1387;1388; RV64-LABEL: mscatter_baseidx_nxv8i8_nxv8f32:1389; RV64:       # %bb.0:1390; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1391; RV64-NEXT:    vsext.vf8 v16, v121392; RV64-NEXT:    vsll.vi v16, v16, 21393; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1394; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1395; RV64-NEXT:    ret1396  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i8> %idxs1397  call void @llvm.masked.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)1398  ret void1399}1400 1401define void @mscatter_baseidx_sext_nxv8i8_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {1402; RV32-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8f32:1403; RV32:       # %bb.0:1404; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1405; RV32-NEXT:    vsext.vf4 v16, v121406; RV32-NEXT:    vsll.vi v12, v16, 21407; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1408; RV32-NEXT:    ret1409;1410; RV64-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8f32:1411; RV64:       # %bb.0:1412; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1413; RV64-NEXT:    vsext.vf8 v16, v121414; RV64-NEXT:    vsll.vi v16, v16, 21415; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1416; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1417; RV64-NEXT:    ret1418  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>1419  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1420  call void @llvm.masked.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)1421  ret void1422}1423 1424define void @mscatter_baseidx_zext_nxv8i8_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {1425; CHECK-LABEL: mscatter_baseidx_zext_nxv8i8_nxv8f32:1426; CHECK:       # %bb.0:1427; CHECK-NEXT:    li a1, 41428; CHECK-NEXT:    vsetvli a2, zero, e8, m1, ta, ma1429; CHECK-NEXT:    vwmulu.vx v14, v12, a11430; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1431; CHECK-NEXT:    vsoxei16.v v8, (a0), v14, v0.t1432; CHECK-NEXT:    ret1433  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>1434  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1435  call void @llvm.masked.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)1436  ret void1437}1438 1439define void @mscatter_baseidx_nxv8i16_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {1440; RV32-LABEL: mscatter_baseidx_nxv8i16_nxv8f32:1441; RV32:       # %bb.0:1442; RV32-NEXT:    li a1, 41443; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma1444; RV32-NEXT:    vwmulsu.vx v16, v12, a11445; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1446; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1447; RV32-NEXT:    ret1448;1449; RV64-LABEL: mscatter_baseidx_nxv8i16_nxv8f32:1450; RV64:       # %bb.0:1451; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1452; RV64-NEXT:    vsext.vf4 v16, v121453; RV64-NEXT:    vsll.vi v16, v16, 21454; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1455; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1456; RV64-NEXT:    ret1457  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i16> %idxs1458  call void @llvm.masked.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)1459  ret void1460}1461 1462define void @mscatter_baseidx_sext_nxv8i16_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {1463; RV32-LABEL: mscatter_baseidx_sext_nxv8i16_nxv8f32:1464; RV32:       # %bb.0:1465; RV32-NEXT:    li a1, 41466; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma1467; RV32-NEXT:    vwmulsu.vx v16, v12, a11468; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1469; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1470; RV32-NEXT:    ret1471;1472; RV64-LABEL: mscatter_baseidx_sext_nxv8i16_nxv8f32:1473; RV64:       # %bb.0:1474; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1475; RV64-NEXT:    vsext.vf4 v16, v121476; RV64-NEXT:    vsll.vi v16, v16, 21477; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1478; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1479; RV64-NEXT:    ret1480  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>1481  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1482  call void @llvm.masked.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)1483  ret void1484}1485 1486define void @mscatter_baseidx_zext_nxv8i16_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {1487; CHECK-LABEL: mscatter_baseidx_zext_nxv8i16_nxv8f32:1488; CHECK:       # %bb.0:1489; CHECK-NEXT:    li a1, 41490; CHECK-NEXT:    vsetvli a2, zero, e16, m2, ta, ma1491; CHECK-NEXT:    vwmulu.vx v16, v12, a11492; CHECK-NEXT:    vsetvli zero, zero, e32, m4, ta, ma1493; CHECK-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1494; CHECK-NEXT:    ret1495  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>1496  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %eidxs1497  call void @llvm.masked.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)1498  ret void1499}1500 1501define void @mscatter_baseidx_nxv8f32(<vscale x 8 x float> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m) {1502; RV32-LABEL: mscatter_baseidx_nxv8f32:1503; RV32:       # %bb.0:1504; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1505; RV32-NEXT:    vsll.vi v12, v12, 21506; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t1507; RV32-NEXT:    ret1508;1509; RV64-LABEL: mscatter_baseidx_nxv8f32:1510; RV64:       # %bb.0:1511; RV64-NEXT:    li a1, 41512; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma1513; RV64-NEXT:    vwmulsu.vx v16, v12, a11514; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1515; RV64-NEXT:    ret1516  %ptrs = getelementptr inbounds float, ptr %base, <vscale x 8 x i32> %idxs1517  call void @llvm.masked.scatter.nxv8f32.nxv8p0(<vscale x 8 x float> %val, <vscale x 8 x ptr> %ptrs, i32 4, <vscale x 8 x i1> %m)1518  ret void1519}1520 1521define void @mscatter_nxv1f64(<vscale x 1 x double> %val, <vscale x 1 x ptr> %ptrs, <vscale x 1 x i1> %m) {1522; RV32-LABEL: mscatter_nxv1f64:1523; RV32:       # %bb.0:1524; RV32-NEXT:    vsetvli a0, zero, e64, m1, ta, ma1525; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t1526; RV32-NEXT:    ret1527;1528; RV64-LABEL: mscatter_nxv1f64:1529; RV64:       # %bb.0:1530; RV64-NEXT:    vsetvli a0, zero, e64, m1, ta, ma1531; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t1532; RV64-NEXT:    ret1533  call void @llvm.masked.scatter.nxv1f64.nxv1p0(<vscale x 1 x double> %val, <vscale x 1 x ptr> %ptrs, i32 8, <vscale x 1 x i1> %m)1534  ret void1535}1536 1537define void @mscatter_nxv2f64(<vscale x 2 x double> %val, <vscale x 2 x ptr> %ptrs, <vscale x 2 x i1> %m) {1538; RV32-LABEL: mscatter_nxv2f64:1539; RV32:       # %bb.0:1540; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, ma1541; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t1542; RV32-NEXT:    ret1543;1544; RV64-LABEL: mscatter_nxv2f64:1545; RV64:       # %bb.0:1546; RV64-NEXT:    vsetvli a0, zero, e64, m2, ta, ma1547; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t1548; RV64-NEXT:    ret1549  call void @llvm.masked.scatter.nxv2f64.nxv2p0(<vscale x 2 x double> %val, <vscale x 2 x ptr> %ptrs, i32 8, <vscale x 2 x i1> %m)1550  ret void1551}1552 1553define void @mscatter_nxv4f64(<vscale x 4 x double> %val, <vscale x 4 x ptr> %ptrs, <vscale x 4 x i1> %m) {1554; RV32-LABEL: mscatter_nxv4f64:1555; RV32:       # %bb.0:1556; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, ma1557; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t1558; RV32-NEXT:    ret1559;1560; RV64-LABEL: mscatter_nxv4f64:1561; RV64:       # %bb.0:1562; RV64-NEXT:    vsetvli a0, zero, e64, m4, ta, ma1563; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t1564; RV64-NEXT:    ret1565  call void @llvm.masked.scatter.nxv4f64.nxv4p0(<vscale x 4 x double> %val, <vscale x 4 x ptr> %ptrs, i32 8, <vscale x 4 x i1> %m)1566  ret void1567}1568 1569define void @mscatter_truemask_nxv4f64(<vscale x 4 x double> %val, <vscale x 4 x ptr> %ptrs) {1570; RV32-LABEL: mscatter_truemask_nxv4f64:1571; RV32:       # %bb.0:1572; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, ma1573; RV32-NEXT:    vsoxei32.v v8, (zero), v121574; RV32-NEXT:    ret1575;1576; RV64-LABEL: mscatter_truemask_nxv4f64:1577; RV64:       # %bb.0:1578; RV64-NEXT:    vsetvli a0, zero, e64, m4, ta, ma1579; RV64-NEXT:    vsoxei64.v v8, (zero), v121580; RV64-NEXT:    ret1581  call void @llvm.masked.scatter.nxv4f64.nxv4p0(<vscale x 4 x double> %val, <vscale x 4 x ptr> %ptrs, i32 8, <vscale x 4 x i1> splat (i1 1))1582  ret void1583}1584 1585define void @mscatter_falsemask_nxv4f64(<vscale x 4 x double> %val, <vscale x 4 x ptr> %ptrs) {1586; CHECK-LABEL: mscatter_falsemask_nxv4f64:1587; CHECK:       # %bb.0:1588; CHECK-NEXT:    ret1589  call void @llvm.masked.scatter.nxv4f64.nxv4p0(<vscale x 4 x double> %val, <vscale x 4 x ptr> %ptrs, i32 8, <vscale x 4 x i1> zeroinitializer)1590  ret void1591}1592 1593define void @mscatter_nxv8f64(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, <vscale x 8 x i1> %m) {1594; RV32-LABEL: mscatter_nxv8f64:1595; RV32:       # %bb.0:1596; RV32-NEXT:    vsetvli a0, zero, e64, m8, ta, ma1597; RV32-NEXT:    vsoxei32.v v8, (zero), v16, v0.t1598; RV32-NEXT:    ret1599;1600; RV64-LABEL: mscatter_nxv8f64:1601; RV64:       # %bb.0:1602; RV64-NEXT:    vsetvli a0, zero, e64, m8, ta, ma1603; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t1604; RV64-NEXT:    ret1605  call void @llvm.masked.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)1606  ret void1607}1608 1609define void @mscatter_baseidx_nxv8i8_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {1610; RV32-LABEL: mscatter_baseidx_nxv8i8_nxv8f64:1611; RV32:       # %bb.0:1612; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1613; RV32-NEXT:    vsext.vf4 v20, v161614; RV32-NEXT:    vsll.vi v16, v20, 31615; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1616; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1617; RV32-NEXT:    ret1618;1619; RV64-LABEL: mscatter_baseidx_nxv8i8_nxv8f64:1620; RV64:       # %bb.0:1621; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1622; RV64-NEXT:    vsext.vf8 v24, v161623; RV64-NEXT:    vsll.vi v16, v24, 31624; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1625; RV64-NEXT:    ret1626  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i8> %idxs1627  call void @llvm.masked.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)1628  ret void1629}1630 1631define void @mscatter_baseidx_sext_nxv8i8_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {1632; RV32-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8f64:1633; RV32:       # %bb.0:1634; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1635; RV32-NEXT:    vsext.vf4 v20, v161636; RV32-NEXT:    vsll.vi v16, v20, 31637; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1638; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1639; RV32-NEXT:    ret1640;1641; RV64-LABEL: mscatter_baseidx_sext_nxv8i8_nxv8f64:1642; RV64:       # %bb.0:1643; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1644; RV64-NEXT:    vsext.vf8 v24, v161645; RV64-NEXT:    vsll.vi v16, v24, 31646; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1647; RV64-NEXT:    ret1648  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>1649  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs1650  call void @llvm.masked.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)1651  ret void1652}1653 1654define void @mscatter_baseidx_zext_nxv8i8_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m) {1655; CHECK-LABEL: mscatter_baseidx_zext_nxv8i8_nxv8f64:1656; CHECK:       # %bb.0:1657; CHECK-NEXT:    li a1, 81658; CHECK-NEXT:    vsetvli a2, zero, e8, m1, ta, ma1659; CHECK-NEXT:    vwmulu.vx v18, v16, a11660; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1661; CHECK-NEXT:    vsoxei16.v v8, (a0), v18, v0.t1662; CHECK-NEXT:    ret1663  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>1664  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs1665  call void @llvm.masked.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)1666  ret void1667}1668 1669define void @mscatter_baseidx_nxv8i16_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {1670; RV32-LABEL: mscatter_baseidx_nxv8i16_nxv8f64:1671; RV32:       # %bb.0:1672; RV32-NEXT:    li a1, 81673; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma1674; RV32-NEXT:    vwmulsu.vx v20, v16, a11675; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1676; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t1677; RV32-NEXT:    ret1678;1679; RV64-LABEL: mscatter_baseidx_nxv8i16_nxv8f64:1680; RV64:       # %bb.0:1681; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1682; RV64-NEXT:    vsext.vf4 v24, v161683; RV64-NEXT:    vsll.vi v16, v24, 31684; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1685; RV64-NEXT:    ret1686  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i16> %idxs1687  call void @llvm.masked.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)1688  ret void1689}1690 1691define void @mscatter_baseidx_sext_nxv8i16_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {1692; RV32-LABEL: mscatter_baseidx_sext_nxv8i16_nxv8f64:1693; RV32:       # %bb.0:1694; RV32-NEXT:    li a1, 81695; RV32-NEXT:    vsetvli a2, zero, e16, m2, ta, ma1696; RV32-NEXT:    vwmulsu.vx v20, v16, a11697; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1698; RV32-NEXT:    vsoxei32.v v8, (a0), v20, v0.t1699; RV32-NEXT:    ret1700;1701; RV64-LABEL: mscatter_baseidx_sext_nxv8i16_nxv8f64:1702; RV64:       # %bb.0:1703; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1704; RV64-NEXT:    vsext.vf4 v24, v161705; RV64-NEXT:    vsll.vi v16, v24, 31706; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1707; RV64-NEXT:    ret1708  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>1709  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs1710  call void @llvm.masked.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)1711  ret void1712}1713 1714define void @mscatter_baseidx_zext_nxv8i16_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m) {1715; CHECK-LABEL: mscatter_baseidx_zext_nxv8i16_nxv8f64:1716; CHECK:       # %bb.0:1717; CHECK-NEXT:    li a1, 81718; CHECK-NEXT:    vsetvli a2, zero, e16, m2, ta, ma1719; CHECK-NEXT:    vwmulu.vx v20, v16, a11720; CHECK-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1721; CHECK-NEXT:    vsoxei32.v v8, (a0), v20, v0.t1722; CHECK-NEXT:    ret1723  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>1724  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs1725  call void @llvm.masked.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)1726  ret void1727}1728 1729define void @mscatter_baseidx_nxv8i32_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m) {1730; RV32-LABEL: mscatter_baseidx_nxv8i32_nxv8f64:1731; RV32:       # %bb.0:1732; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1733; RV32-NEXT:    vsll.vi v16, v16, 31734; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1735; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1736; RV32-NEXT:    ret1737;1738; RV64-LABEL: mscatter_baseidx_nxv8i32_nxv8f64:1739; RV64:       # %bb.0:1740; RV64-NEXT:    li a1, 81741; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma1742; RV64-NEXT:    vwmulsu.vx v24, v16, a11743; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1744; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t1745; RV64-NEXT:    ret1746  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i32> %idxs1747  call void @llvm.masked.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)1748  ret void1749}1750 1751define void @mscatter_baseidx_sext_nxv8i32_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m) {1752; RV32-LABEL: mscatter_baseidx_sext_nxv8i32_nxv8f64:1753; RV32:       # %bb.0:1754; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1755; RV32-NEXT:    vsll.vi v16, v16, 31756; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1757; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1758; RV32-NEXT:    ret1759;1760; RV64-LABEL: mscatter_baseidx_sext_nxv8i32_nxv8f64:1761; RV64:       # %bb.0:1762; RV64-NEXT:    li a1, 81763; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma1764; RV64-NEXT:    vwmulsu.vx v24, v16, a11765; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1766; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t1767; RV64-NEXT:    ret1768  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>1769  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs1770  call void @llvm.masked.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)1771  ret void1772}1773 1774define void @mscatter_baseidx_zext_nxv8i32_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m) {1775; RV32-LABEL: mscatter_baseidx_zext_nxv8i32_nxv8f64:1776; RV32:       # %bb.0:1777; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1778; RV32-NEXT:    vsll.vi v16, v16, 31779; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1780; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1781; RV32-NEXT:    ret1782;1783; RV64-LABEL: mscatter_baseidx_zext_nxv8i32_nxv8f64:1784; RV64:       # %bb.0:1785; RV64-NEXT:    li a1, 81786; RV64-NEXT:    vsetvli a2, zero, e32, m4, ta, ma1787; RV64-NEXT:    vwmulu.vx v24, v16, a11788; RV64-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1789; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t1790; RV64-NEXT:    ret1791  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>1792  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %eidxs1793  call void @llvm.masked.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)1794  ret void1795}1796 1797define void @mscatter_baseidx_nxv8f64(<vscale x 8 x double> %val, ptr %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m) {1798; RV32-LABEL: mscatter_baseidx_nxv8f64:1799; RV32:       # %bb.0:1800; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, ma1801; RV32-NEXT:    vnsrl.wi v24, v16, 01802; RV32-NEXT:    vsll.vi v16, v24, 31803; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, ma1804; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t1805; RV32-NEXT:    ret1806;1807; RV64-LABEL: mscatter_baseidx_nxv8f64:1808; RV64:       # %bb.0:1809; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1810; RV64-NEXT:    vsll.vi v16, v16, 31811; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t1812; RV64-NEXT:    ret1813  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 8 x i64> %idxs1814  call void @llvm.masked.scatter.nxv8f64.nxv8p0(<vscale x 8 x double> %val, <vscale x 8 x ptr> %ptrs, i32 8, <vscale x 8 x i1> %m)1815  ret void1816}1817 1818define void @mscatter_nxv16f64(<vscale x 8 x double> %val0, <vscale x 8 x double> %val1, <vscale x 8 x ptr> %ptrs0, <vscale x 8 x ptr> %ptrs1, <vscale x 16 x i1> %m) {1819; RV32-LABEL: mscatter_nxv16f64:1820; RV32:       # %bb.0:1821; RV32-NEXT:    vl4re32.v v24, (a0)1822; RV32-NEXT:    vl4re32.v v28, (a1)1823; RV32-NEXT:    csrr a0, vlenb1824; RV32-NEXT:    srli a0, a0, 31825; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1826; RV32-NEXT:    vsoxei32.v v8, (zero), v24, v0.t1827; RV32-NEXT:    vsetvli a1, zero, e8, mf4, ta, ma1828; RV32-NEXT:    vslidedown.vx v0, v0, a01829; RV32-NEXT:    vsetvli a0, zero, e64, m8, ta, ma1830; RV32-NEXT:    vsoxei32.v v16, (zero), v28, v0.t1831; RV32-NEXT:    ret1832;1833; RV64-LABEL: mscatter_nxv16f64:1834; RV64:       # %bb.0:1835; RV64-NEXT:    addi sp, sp, -161836; RV64-NEXT:    .cfi_def_cfa_offset 161837; RV64-NEXT:    csrr a2, vlenb1838; RV64-NEXT:    slli a2, a2, 41839; RV64-NEXT:    sub sp, sp, a21840; RV64-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb1841; RV64-NEXT:    addi a2, sp, 161842; RV64-NEXT:    vs8r.v v8, (a2) # vscale x 64-byte Folded Spill1843; RV64-NEXT:    vl8re64.v v8, (a0)1844; RV64-NEXT:    vl8re64.v v24, (a1)1845; RV64-NEXT:    csrr a0, vlenb1846; RV64-NEXT:    slli a0, a0, 31847; RV64-NEXT:    add a0, sp, a01848; RV64-NEXT:    addi a0, a0, 161849; RV64-NEXT:    vs8r.v v24, (a0) # vscale x 64-byte Folded Spill1850; RV64-NEXT:    addi a0, sp, 161851; RV64-NEXT:    vl8r.v v24, (a0) # vscale x 64-byte Folded Reload1852; RV64-NEXT:    vsetvli a0, zero, e64, m8, ta, ma1853; RV64-NEXT:    vsoxei64.v v24, (zero), v8, v0.t1854; RV64-NEXT:    csrr a0, vlenb1855; RV64-NEXT:    srli a0, a0, 31856; RV64-NEXT:    vsetvli a1, zero, e8, mf4, ta, ma1857; RV64-NEXT:    vslidedown.vx v0, v0, a01858; RV64-NEXT:    csrr a0, vlenb1859; RV64-NEXT:    slli a0, a0, 31860; RV64-NEXT:    add a0, sp, a01861; RV64-NEXT:    addi a0, a0, 161862; RV64-NEXT:    vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1863; RV64-NEXT:    vsetvli a0, zero, e64, m8, ta, ma1864; RV64-NEXT:    vsoxei64.v v16, (zero), v8, v0.t1865; RV64-NEXT:    csrr a0, vlenb1866; RV64-NEXT:    slli a0, a0, 41867; RV64-NEXT:    add sp, sp, a01868; RV64-NEXT:    .cfi_def_cfa sp, 161869; RV64-NEXT:    addi sp, sp, 161870; RV64-NEXT:    .cfi_def_cfa_offset 01871; RV64-NEXT:    ret1872  %p0 = call <vscale x 16 x ptr> @llvm.vector.insert.nxv8p0.nxv16p0(<vscale x 16 x ptr> poison, <vscale x 8 x ptr> %ptrs0, i64 0)1873  %p1 = call <vscale x 16 x ptr> @llvm.vector.insert.nxv8p0.nxv16p0(<vscale x 16 x ptr> %p0, <vscale x 8 x ptr> %ptrs1, i64 8)1874  %v0 = call <vscale x 16 x double> @llvm.vector.insert.nxv8f64.nxv16f64(<vscale x 16 x double> poison, <vscale x 8 x double> %val0, i64 0)1875  %v1 = call <vscale x 16 x double> @llvm.vector.insert.nxv8f64.nxv16f64(<vscale x 16 x double> %v0, <vscale x 8 x double> %val1, i64 8)1876  call void @llvm.masked.scatter.nxv16f64.nxv16p0(<vscale x 16 x double> %v1, <vscale x 16 x ptr> %p1, i32 8, <vscale x 16 x i1> %m)1877  ret void1878}1879 1880define void @mscatter_baseidx_nxv16i8_nxv16f64(<vscale x 8 x double> %val0, <vscale x 8 x double> %val1, ptr %base, <vscale x 16 x i8> %idxs, <vscale x 16 x i1> %m) {1881; RV32-LABEL: mscatter_baseidx_nxv16i8_nxv16f64:1882; RV32:       # %bb.0:1883; RV32-NEXT:    vl2r.v v6, (a1)1884; RV32-NEXT:    csrr a1, vlenb1885; RV32-NEXT:    srli a1, a1, 31886; RV32-NEXT:    vsetvli a2, zero, e32, m8, ta, ma1887; RV32-NEXT:    vsext.vf4 v24, v61888; RV32-NEXT:    vsll.vi v24, v24, 31889; RV32-NEXT:    vsetvli a2, zero, e64, m8, ta, ma1890; RV32-NEXT:    vsoxei32.v v8, (a0), v24, v0.t1891; RV32-NEXT:    vsetvli a2, zero, e8, mf4, ta, ma1892; RV32-NEXT:    vslidedown.vx v0, v0, a11893; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1894; RV32-NEXT:    vsoxei32.v v16, (a0), v28, v0.t1895; RV32-NEXT:    ret1896;1897; RV64-LABEL: mscatter_baseidx_nxv16i8_nxv16f64:1898; RV64:       # %bb.0:1899; RV64-NEXT:    vl2r.v v6, (a1)1900; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1901; RV64-NEXT:    vsext.vf8 v24, v61902; RV64-NEXT:    vsll.vi v24, v24, 31903; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t1904; RV64-NEXT:    csrr a1, vlenb1905; RV64-NEXT:    srli a1, a1, 31906; RV64-NEXT:    vsext.vf8 v8, v71907; RV64-NEXT:    vsetvli a2, zero, e8, mf4, ta, ma1908; RV64-NEXT:    vslidedown.vx v0, v0, a11909; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1910; RV64-NEXT:    vsll.vi v8, v8, 31911; RV64-NEXT:    vsoxei64.v v16, (a0), v8, v0.t1912; RV64-NEXT:    ret1913  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 16 x i8> %idxs1914  %v0 = call <vscale x 16 x double> @llvm.vector.insert.nxv8f64.nxv16f64(<vscale x 16 x double> poison, <vscale x 8 x double> %val0, i64 0)1915  %v1 = call <vscale x 16 x double> @llvm.vector.insert.nxv8f64.nxv16f64(<vscale x 16 x double> %v0, <vscale x 8 x double> %val1, i64 8)1916  call void @llvm.masked.scatter.nxv16f64.nxv16p0(<vscale x 16 x double> %v1, <vscale x 16 x ptr> %ptrs, i32 8, <vscale x 16 x i1> %m)1917  ret void1918}1919 1920define void @mscatter_baseidx_nxv16i16_nxv16f64(<vscale x 8 x double> %val0, <vscale x 8 x double> %val1, ptr %base, <vscale x 16 x i16> %idxs, <vscale x 16 x i1> %m) {1921; RV32-LABEL: mscatter_baseidx_nxv16i16_nxv16f64:1922; RV32:       # %bb.0:1923; RV32-NEXT:    vl4re16.v v4, (a1)1924; RV32-NEXT:    li a1, 81925; RV32-NEXT:    vsetvli a2, zero, e16, m4, ta, ma1926; RV32-NEXT:    vwmulsu.vx v24, v4, a11927; RV32-NEXT:    csrr a1, vlenb1928; RV32-NEXT:    srli a1, a1, 31929; RV32-NEXT:    vsetvli a2, zero, e64, m8, ta, ma1930; RV32-NEXT:    vsoxei32.v v8, (a0), v24, v0.t1931; RV32-NEXT:    vsetvli a2, zero, e8, mf4, ta, ma1932; RV32-NEXT:    vslidedown.vx v0, v0, a11933; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1934; RV32-NEXT:    vsoxei32.v v16, (a0), v28, v0.t1935; RV32-NEXT:    ret1936;1937; RV64-LABEL: mscatter_baseidx_nxv16i16_nxv16f64:1938; RV64:       # %bb.0:1939; RV64-NEXT:    vl4re16.v v4, (a1)1940; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1941; RV64-NEXT:    vsext.vf4 v24, v41942; RV64-NEXT:    vsll.vi v24, v24, 31943; RV64-NEXT:    vsoxei64.v v8, (a0), v24, v0.t1944; RV64-NEXT:    csrr a1, vlenb1945; RV64-NEXT:    srli a1, a1, 31946; RV64-NEXT:    vsext.vf4 v8, v61947; RV64-NEXT:    vsetvli a2, zero, e8, mf4, ta, ma1948; RV64-NEXT:    vslidedown.vx v0, v0, a11949; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma1950; RV64-NEXT:    vsll.vi v8, v8, 31951; RV64-NEXT:    vsoxei64.v v16, (a0), v8, v0.t1952; RV64-NEXT:    ret1953  %ptrs = getelementptr inbounds double, ptr %base, <vscale x 16 x i16> %idxs1954  %v0 = call <vscale x 16 x double> @llvm.vector.insert.nxv8f64.nxv16f64(<vscale x 16 x double> poison, <vscale x 8 x double> %val0, i64 0)1955  %v1 = call <vscale x 16 x double> @llvm.vector.insert.nxv8f64.nxv16f64(<vscale x 16 x double> %v0, <vscale x 8 x double> %val1, i64 8)1956  call void @llvm.masked.scatter.nxv16f64.nxv16p0(<vscale x 16 x double> %v1, <vscale x 16 x ptr> %ptrs, i32 8, <vscale x 16 x i1> %m)1957  ret void1958}1959 1960define void @mscatter_baseidx_zext_nxv1i1_nxv1i8(<vscale x 1 x i8> %val, ptr %base, <vscale x 1 x i1> %idxs, <vscale x 1 x i1> %m) {1961; CHECK-LABEL: mscatter_baseidx_zext_nxv1i1_nxv1i8:1962; CHECK:       # %bb.0:1963; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, ma1964; CHECK-NEXT:    vmv.v.i v10, 01965; CHECK-NEXT:    vmerge.vim v10, v10, 1, v01966; CHECK-NEXT:    vmv1r.v v0, v91967; CHECK-NEXT:    vsoxei8.v v8, (a0), v10, v0.t1968; CHECK-NEXT:    ret1969  %eidxs = zext <vscale x 1 x i1> %idxs to <vscale x 1 x i8>1970  %ptrs = getelementptr inbounds i8, ptr %base, <vscale x 1 x i8> %eidxs1971  call void @llvm.masked.scatter.nxv1i8.nxv1p0(<vscale x 1 x i8> %val, <vscale x 1 x ptr> %ptrs, i32 1, <vscale x 1 x i1> %m)1972  ret void1973}1974