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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+v < %s | FileCheck %s -check-prefix=CHECK-RV64V3; RUN: llc -mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+v < %s | FileCheck %s -check-prefix=CHECK-RV32V4; RUN: llc -mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+v,+c < %s | FileCheck %s -check-prefix=CHECK-RV64VC5; RUN: llc -mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+v,+c < %s | FileCheck %s -check-prefix=CHECK-RV32VC6 7 8define <16 x i8> @test_nontemporal_vp_load_v16i8_P1(ptr %p, i32 zeroext %vl) {9; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v16i8_P1:10; CHECK-RV64V: # %bb.0:11; CHECK-RV64V-NEXT: vsetvli zero, a1, e8, m1, ta, ma12; CHECK-RV64V-NEXT: ntl.p113; CHECK-RV64V-NEXT: vle8.v v8, (a0)14; CHECK-RV64V-NEXT: ret15;16; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v16i8_P1:17; CHECK-RV32V: # %bb.0:18; CHECK-RV32V-NEXT: vsetvli zero, a1, e8, m1, ta, ma19; CHECK-RV32V-NEXT: ntl.p120; CHECK-RV32V-NEXT: vle8.v v8, (a0)21; CHECK-RV32V-NEXT: ret22;23; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v16i8_P1:24; CHECK-RV64VC: # %bb.0:25; CHECK-RV64VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma26; CHECK-RV64VC-NEXT: c.ntl.p127; CHECK-RV64VC-NEXT: vle8.v v8, (a0)28; CHECK-RV64VC-NEXT: ret29;30; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v16i8_P1:31; CHECK-RV32VC: # %bb.0:32; CHECK-RV32VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma33; CHECK-RV32VC-NEXT: c.ntl.p134; CHECK-RV32VC-NEXT: vle8.v v8, (a0)35; CHECK-RV32VC-NEXT: ret36 %x = call <16 x i8> @llvm.vp.load.v16i8.p0(ptr %p, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !137 ret <16 x i8> %x38}39 40 41define <16 x i8> @test_nontemporal_vp_load_v16i8_PALL(ptr %p, i32 zeroext %vl) {42; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v16i8_PALL:43; CHECK-RV64V: # %bb.0:44; CHECK-RV64V-NEXT: vsetvli zero, a1, e8, m1, ta, ma45; CHECK-RV64V-NEXT: ntl.pall46; CHECK-RV64V-NEXT: vle8.v v8, (a0)47; CHECK-RV64V-NEXT: ret48;49; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v16i8_PALL:50; CHECK-RV32V: # %bb.0:51; CHECK-RV32V-NEXT: vsetvli zero, a1, e8, m1, ta, ma52; CHECK-RV32V-NEXT: ntl.pall53; CHECK-RV32V-NEXT: vle8.v v8, (a0)54; CHECK-RV32V-NEXT: ret55;56; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v16i8_PALL:57; CHECK-RV64VC: # %bb.0:58; CHECK-RV64VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma59; CHECK-RV64VC-NEXT: c.ntl.pall60; CHECK-RV64VC-NEXT: vle8.v v8, (a0)61; CHECK-RV64VC-NEXT: ret62;63; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v16i8_PALL:64; CHECK-RV32VC: # %bb.0:65; CHECK-RV32VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma66; CHECK-RV32VC-NEXT: c.ntl.pall67; CHECK-RV32VC-NEXT: vle8.v v8, (a0)68; CHECK-RV32VC-NEXT: ret69 %x = call <16 x i8> @llvm.vp.load.v16i8.p0(ptr %p, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !270 ret <16 x i8> %x71}72 73 74define <16 x i8> @test_nontemporal_vp_load_v16i8_S1(ptr %p, i32 zeroext %vl) {75; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v16i8_S1:76; CHECK-RV64V: # %bb.0:77; CHECK-RV64V-NEXT: vsetvli zero, a1, e8, m1, ta, ma78; CHECK-RV64V-NEXT: ntl.s179; CHECK-RV64V-NEXT: vle8.v v8, (a0)80; CHECK-RV64V-NEXT: ret81;82; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v16i8_S1:83; CHECK-RV32V: # %bb.0:84; CHECK-RV32V-NEXT: vsetvli zero, a1, e8, m1, ta, ma85; CHECK-RV32V-NEXT: ntl.s186; CHECK-RV32V-NEXT: vle8.v v8, (a0)87; CHECK-RV32V-NEXT: ret88;89; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v16i8_S1:90; CHECK-RV64VC: # %bb.0:91; CHECK-RV64VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma92; CHECK-RV64VC-NEXT: c.ntl.s193; CHECK-RV64VC-NEXT: vle8.v v8, (a0)94; CHECK-RV64VC-NEXT: ret95;96; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v16i8_S1:97; CHECK-RV32VC: # %bb.0:98; CHECK-RV32VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma99; CHECK-RV32VC-NEXT: c.ntl.s1100; CHECK-RV32VC-NEXT: vle8.v v8, (a0)101; CHECK-RV32VC-NEXT: ret102 %x = call <16 x i8> @llvm.vp.load.v16i8.p0(ptr %p, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !3103 ret <16 x i8> %x104}105 106 107define <16 x i8> @test_nontemporal_vp_load_v16i8_ALL(ptr %p, i32 zeroext %vl) {108; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v16i8_ALL:109; CHECK-RV64V: # %bb.0:110; CHECK-RV64V-NEXT: vsetvli zero, a1, e8, m1, ta, ma111; CHECK-RV64V-NEXT: ntl.all112; CHECK-RV64V-NEXT: vle8.v v8, (a0)113; CHECK-RV64V-NEXT: ret114;115; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v16i8_ALL:116; CHECK-RV32V: # %bb.0:117; CHECK-RV32V-NEXT: vsetvli zero, a1, e8, m1, ta, ma118; CHECK-RV32V-NEXT: ntl.all119; CHECK-RV32V-NEXT: vle8.v v8, (a0)120; CHECK-RV32V-NEXT: ret121;122; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v16i8_ALL:123; CHECK-RV64VC: # %bb.0:124; CHECK-RV64VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma125; CHECK-RV64VC-NEXT: c.ntl.all126; CHECK-RV64VC-NEXT: vle8.v v8, (a0)127; CHECK-RV64VC-NEXT: ret128;129; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v16i8_ALL:130; CHECK-RV32VC: # %bb.0:131; CHECK-RV32VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma132; CHECK-RV32VC-NEXT: c.ntl.all133; CHECK-RV32VC-NEXT: vle8.v v8, (a0)134; CHECK-RV32VC-NEXT: ret135 %x = call <16 x i8> @llvm.vp.load.v16i8.p0(ptr %p, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !4136 ret <16 x i8> %x137}138 139define <16 x i8> @test_nontemporal_vp_load_v16i8_DEFAULT(ptr %p, i32 zeroext %vl) {140; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v16i8_DEFAULT:141; CHECK-RV64V: # %bb.0:142; CHECK-RV64V-NEXT: vsetvli zero, a1, e8, m1, ta, ma143; CHECK-RV64V-NEXT: ntl.all144; CHECK-RV64V-NEXT: vle8.v v8, (a0)145; CHECK-RV64V-NEXT: ret146;147; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v16i8_DEFAULT:148; CHECK-RV32V: # %bb.0:149; CHECK-RV32V-NEXT: vsetvli zero, a1, e8, m1, ta, ma150; CHECK-RV32V-NEXT: ntl.all151; CHECK-RV32V-NEXT: vle8.v v8, (a0)152; CHECK-RV32V-NEXT: ret153;154; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v16i8_DEFAULT:155; CHECK-RV64VC: # %bb.0:156; CHECK-RV64VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma157; CHECK-RV64VC-NEXT: c.ntl.all158; CHECK-RV64VC-NEXT: vle8.v v8, (a0)159; CHECK-RV64VC-NEXT: ret160;161; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v16i8_DEFAULT:162; CHECK-RV32VC: # %bb.0:163; CHECK-RV32VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma164; CHECK-RV32VC-NEXT: c.ntl.all165; CHECK-RV32VC-NEXT: vle8.v v8, (a0)166; CHECK-RV32VC-NEXT: ret167 %x = call <16 x i8> @llvm.vp.load.v16i8.p0(ptr %p, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0168 ret <16 x i8> %x169}170 171 172define void @test_nontemporal_vp_store_v16i8_P1(<16 x i8> %val, ptr %p, i32 zeroext %vl) {173; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v16i8_P1:174; CHECK-RV64V: # %bb.0:175; CHECK-RV64V-NEXT: vsetvli zero, a1, e8, m1, ta, ma176; CHECK-RV64V-NEXT: ntl.p1177; CHECK-RV64V-NEXT: vse8.v v8, (a0)178; CHECK-RV64V-NEXT: ret179;180; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v16i8_P1:181; CHECK-RV32V: # %bb.0:182; CHECK-RV32V-NEXT: vsetvli zero, a1, e8, m1, ta, ma183; CHECK-RV32V-NEXT: ntl.p1184; CHECK-RV32V-NEXT: vse8.v v8, (a0)185; CHECK-RV32V-NEXT: ret186;187; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v16i8_P1:188; CHECK-RV64VC: # %bb.0:189; CHECK-RV64VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma190; CHECK-RV64VC-NEXT: c.ntl.p1191; CHECK-RV64VC-NEXT: vse8.v v8, (a0)192; CHECK-RV64VC-NEXT: ret193;194; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v16i8_P1:195; CHECK-RV32VC: # %bb.0:196; CHECK-RV32VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma197; CHECK-RV32VC-NEXT: c.ntl.p1198; CHECK-RV32VC-NEXT: vse8.v v8, (a0)199; CHECK-RV32VC-NEXT: ret200 call void @llvm.vp.store.v16i8.p0(<16 x i8> %val, ptr %p, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !1201 ret void202}203 204 205define void @test_nontemporal_vp_store_v16i8_PALL(<16 x i8> %val, ptr %p, i32 zeroext %vl) {206; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v16i8_PALL:207; CHECK-RV64V: # %bb.0:208; CHECK-RV64V-NEXT: vsetvli zero, a1, e8, m1, ta, ma209; CHECK-RV64V-NEXT: ntl.pall210; CHECK-RV64V-NEXT: vse8.v v8, (a0)211; CHECK-RV64V-NEXT: ret212;213; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v16i8_PALL:214; CHECK-RV32V: # %bb.0:215; CHECK-RV32V-NEXT: vsetvli zero, a1, e8, m1, ta, ma216; CHECK-RV32V-NEXT: ntl.pall217; CHECK-RV32V-NEXT: vse8.v v8, (a0)218; CHECK-RV32V-NEXT: ret219;220; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v16i8_PALL:221; CHECK-RV64VC: # %bb.0:222; CHECK-RV64VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma223; CHECK-RV64VC-NEXT: c.ntl.pall224; CHECK-RV64VC-NEXT: vse8.v v8, (a0)225; CHECK-RV64VC-NEXT: ret226;227; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v16i8_PALL:228; CHECK-RV32VC: # %bb.0:229; CHECK-RV32VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma230; CHECK-RV32VC-NEXT: c.ntl.pall231; CHECK-RV32VC-NEXT: vse8.v v8, (a0)232; CHECK-RV32VC-NEXT: ret233 call void @llvm.vp.store.v16i8.p0(<16 x i8> %val, ptr %p, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !2234 ret void235}236 237 238define void @test_nontemporal_vp_store_v16i8_S1(<16 x i8> %val, ptr %p, i32 zeroext %vl) {239; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v16i8_S1:240; CHECK-RV64V: # %bb.0:241; CHECK-RV64V-NEXT: vsetvli zero, a1, e8, m1, ta, ma242; CHECK-RV64V-NEXT: ntl.s1243; CHECK-RV64V-NEXT: vse8.v v8, (a0)244; CHECK-RV64V-NEXT: ret245;246; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v16i8_S1:247; CHECK-RV32V: # %bb.0:248; CHECK-RV32V-NEXT: vsetvli zero, a1, e8, m1, ta, ma249; CHECK-RV32V-NEXT: ntl.s1250; CHECK-RV32V-NEXT: vse8.v v8, (a0)251; CHECK-RV32V-NEXT: ret252;253; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v16i8_S1:254; CHECK-RV64VC: # %bb.0:255; CHECK-RV64VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma256; CHECK-RV64VC-NEXT: c.ntl.s1257; CHECK-RV64VC-NEXT: vse8.v v8, (a0)258; CHECK-RV64VC-NEXT: ret259;260; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v16i8_S1:261; CHECK-RV32VC: # %bb.0:262; CHECK-RV32VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma263; CHECK-RV32VC-NEXT: c.ntl.s1264; CHECK-RV32VC-NEXT: vse8.v v8, (a0)265; CHECK-RV32VC-NEXT: ret266 call void @llvm.vp.store.v16i8.p0(<16 x i8> %val, ptr %p, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !3267 ret void268}269 270 271define void @test_nontemporal_vp_store_v16i8_ALL(<16 x i8> %val, ptr %p, i32 zeroext %vl) {272; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v16i8_ALL:273; CHECK-RV64V: # %bb.0:274; CHECK-RV64V-NEXT: vsetvli zero, a1, e8, m1, ta, ma275; CHECK-RV64V-NEXT: ntl.all276; CHECK-RV64V-NEXT: vse8.v v8, (a0)277; CHECK-RV64V-NEXT: ret278;279; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v16i8_ALL:280; CHECK-RV32V: # %bb.0:281; CHECK-RV32V-NEXT: vsetvli zero, a1, e8, m1, ta, ma282; CHECK-RV32V-NEXT: ntl.all283; CHECK-RV32V-NEXT: vse8.v v8, (a0)284; CHECK-RV32V-NEXT: ret285;286; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v16i8_ALL:287; CHECK-RV64VC: # %bb.0:288; CHECK-RV64VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma289; CHECK-RV64VC-NEXT: c.ntl.all290; CHECK-RV64VC-NEXT: vse8.v v8, (a0)291; CHECK-RV64VC-NEXT: ret292;293; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v16i8_ALL:294; CHECK-RV32VC: # %bb.0:295; CHECK-RV32VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma296; CHECK-RV32VC-NEXT: c.ntl.all297; CHECK-RV32VC-NEXT: vse8.v v8, (a0)298; CHECK-RV32VC-NEXT: ret299 call void @llvm.vp.store.v16i8.p0(<16 x i8> %val, ptr %p, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !4300 ret void301}302 303define void @test_nontemporal_vp_store_v16i8_DEFAULT(<16 x i8> %val, ptr %p, i32 zeroext %vl) {304; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v16i8_DEFAULT:305; CHECK-RV64V: # %bb.0:306; CHECK-RV64V-NEXT: vsetvli zero, a1, e8, m1, ta, ma307; CHECK-RV64V-NEXT: ntl.all308; CHECK-RV64V-NEXT: vse8.v v8, (a0)309; CHECK-RV64V-NEXT: ret310;311; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v16i8_DEFAULT:312; CHECK-RV32V: # %bb.0:313; CHECK-RV32V-NEXT: vsetvli zero, a1, e8, m1, ta, ma314; CHECK-RV32V-NEXT: ntl.all315; CHECK-RV32V-NEXT: vse8.v v8, (a0)316; CHECK-RV32V-NEXT: ret317;318; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v16i8_DEFAULT:319; CHECK-RV64VC: # %bb.0:320; CHECK-RV64VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma321; CHECK-RV64VC-NEXT: c.ntl.all322; CHECK-RV64VC-NEXT: vse8.v v8, (a0)323; CHECK-RV64VC-NEXT: ret324;325; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v16i8_DEFAULT:326; CHECK-RV32VC: # %bb.0:327; CHECK-RV32VC-NEXT: vsetvli zero, a1, e8, m1, ta, ma328; CHECK-RV32VC-NEXT: c.ntl.all329; CHECK-RV32VC-NEXT: vse8.v v8, (a0)330; CHECK-RV32VC-NEXT: ret331 call void @llvm.vp.store.v16i8.p0(<16 x i8> %val, ptr %p, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0332 ret void333}334 335 336define <16 x i8> @test_nontemporal_vp_gather_v16i8_P1(<16 x ptr> %ptrs, i32 zeroext %vl) {337; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v16i8_P1:338; CHECK-RV64V: # %bb.0:339; CHECK-RV64V-NEXT: vsetvli zero, a0, e8, m1, ta, ma340; CHECK-RV64V-NEXT: ntl.p1341; CHECK-RV64V-NEXT: vluxei64.v v16, (zero), v8342; CHECK-RV64V-NEXT: vmv.v.v v8, v16343; CHECK-RV64V-NEXT: ret344;345; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v16i8_P1:346; CHECK-RV32V: # %bb.0:347; CHECK-RV32V-NEXT: vsetvli zero, a0, e8, m1, ta, ma348; CHECK-RV32V-NEXT: ntl.p1349; CHECK-RV32V-NEXT: vluxei32.v v12, (zero), v8350; CHECK-RV32V-NEXT: vmv.v.v v8, v12351; CHECK-RV32V-NEXT: ret352;353; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v16i8_P1:354; CHECK-RV64VC: # %bb.0:355; CHECK-RV64VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma356; CHECK-RV64VC-NEXT: c.ntl.p1357; CHECK-RV64VC-NEXT: vluxei64.v v16, (zero), v8358; CHECK-RV64VC-NEXT: vmv.v.v v8, v16359; CHECK-RV64VC-NEXT: ret360;361; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v16i8_P1:362; CHECK-RV32VC: # %bb.0:363; CHECK-RV32VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma364; CHECK-RV32VC-NEXT: c.ntl.p1365; CHECK-RV32VC-NEXT: vluxei32.v v12, (zero), v8366; CHECK-RV32VC-NEXT: vmv.v.v v8, v12367; CHECK-RV32VC-NEXT: ret368 %x = call <16 x i8> @llvm.vp.gather.v16i8.v16p0(<16 x ptr> %ptrs, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !1369 ret <16 x i8> %x370}371 372 373define <16 x i8> @test_nontemporal_vp_gather_v16i8_PALL(<16 x ptr> %ptrs, i32 zeroext %vl) {374; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v16i8_PALL:375; CHECK-RV64V: # %bb.0:376; CHECK-RV64V-NEXT: vsetvli zero, a0, e8, m1, ta, ma377; CHECK-RV64V-NEXT: ntl.pall378; CHECK-RV64V-NEXT: vluxei64.v v16, (zero), v8379; CHECK-RV64V-NEXT: vmv.v.v v8, v16380; CHECK-RV64V-NEXT: ret381;382; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v16i8_PALL:383; CHECK-RV32V: # %bb.0:384; CHECK-RV32V-NEXT: vsetvli zero, a0, e8, m1, ta, ma385; CHECK-RV32V-NEXT: ntl.pall386; CHECK-RV32V-NEXT: vluxei32.v v12, (zero), v8387; CHECK-RV32V-NEXT: vmv.v.v v8, v12388; CHECK-RV32V-NEXT: ret389;390; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v16i8_PALL:391; CHECK-RV64VC: # %bb.0:392; CHECK-RV64VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma393; CHECK-RV64VC-NEXT: c.ntl.pall394; CHECK-RV64VC-NEXT: vluxei64.v v16, (zero), v8395; CHECK-RV64VC-NEXT: vmv.v.v v8, v16396; CHECK-RV64VC-NEXT: ret397;398; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v16i8_PALL:399; CHECK-RV32VC: # %bb.0:400; CHECK-RV32VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma401; CHECK-RV32VC-NEXT: c.ntl.pall402; CHECK-RV32VC-NEXT: vluxei32.v v12, (zero), v8403; CHECK-RV32VC-NEXT: vmv.v.v v8, v12404; CHECK-RV32VC-NEXT: ret405 %x = call <16 x i8> @llvm.vp.gather.v16i8.v16p0(<16 x ptr> %ptrs, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !2406 ret <16 x i8> %x407}408 409 410define <16 x i8> @test_nontemporal_vp_gather_v16i8_S1(<16 x ptr> %ptrs, i32 zeroext %vl) {411; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v16i8_S1:412; CHECK-RV64V: # %bb.0:413; CHECK-RV64V-NEXT: vsetvli zero, a0, e8, m1, ta, ma414; CHECK-RV64V-NEXT: ntl.s1415; CHECK-RV64V-NEXT: vluxei64.v v16, (zero), v8416; CHECK-RV64V-NEXT: vmv.v.v v8, v16417; CHECK-RV64V-NEXT: ret418;419; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v16i8_S1:420; CHECK-RV32V: # %bb.0:421; CHECK-RV32V-NEXT: vsetvli zero, a0, e8, m1, ta, ma422; CHECK-RV32V-NEXT: ntl.s1423; CHECK-RV32V-NEXT: vluxei32.v v12, (zero), v8424; CHECK-RV32V-NEXT: vmv.v.v v8, v12425; CHECK-RV32V-NEXT: ret426;427; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v16i8_S1:428; CHECK-RV64VC: # %bb.0:429; CHECK-RV64VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma430; CHECK-RV64VC-NEXT: c.ntl.s1431; CHECK-RV64VC-NEXT: vluxei64.v v16, (zero), v8432; CHECK-RV64VC-NEXT: vmv.v.v v8, v16433; CHECK-RV64VC-NEXT: ret434;435; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v16i8_S1:436; CHECK-RV32VC: # %bb.0:437; CHECK-RV32VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma438; CHECK-RV32VC-NEXT: c.ntl.s1439; CHECK-RV32VC-NEXT: vluxei32.v v12, (zero), v8440; CHECK-RV32VC-NEXT: vmv.v.v v8, v12441; CHECK-RV32VC-NEXT: ret442 %x = call <16 x i8> @llvm.vp.gather.v16i8.v16p0(<16 x ptr> %ptrs, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !3443 ret <16 x i8> %x444}445 446 447define <16 x i8> @test_nontemporal_vp_gather_v16i8_ALL(<16 x ptr> %ptrs, i32 zeroext %vl) {448; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v16i8_ALL:449; CHECK-RV64V: # %bb.0:450; CHECK-RV64V-NEXT: vsetvli zero, a0, e8, m1, ta, ma451; CHECK-RV64V-NEXT: ntl.all452; CHECK-RV64V-NEXT: vluxei64.v v16, (zero), v8453; CHECK-RV64V-NEXT: vmv.v.v v8, v16454; CHECK-RV64V-NEXT: ret455;456; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v16i8_ALL:457; CHECK-RV32V: # %bb.0:458; CHECK-RV32V-NEXT: vsetvli zero, a0, e8, m1, ta, ma459; CHECK-RV32V-NEXT: ntl.all460; CHECK-RV32V-NEXT: vluxei32.v v12, (zero), v8461; CHECK-RV32V-NEXT: vmv.v.v v8, v12462; CHECK-RV32V-NEXT: ret463;464; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v16i8_ALL:465; CHECK-RV64VC: # %bb.0:466; CHECK-RV64VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma467; CHECK-RV64VC-NEXT: c.ntl.all468; CHECK-RV64VC-NEXT: vluxei64.v v16, (zero), v8469; CHECK-RV64VC-NEXT: vmv.v.v v8, v16470; CHECK-RV64VC-NEXT: ret471;472; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v16i8_ALL:473; CHECK-RV32VC: # %bb.0:474; CHECK-RV32VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma475; CHECK-RV32VC-NEXT: c.ntl.all476; CHECK-RV32VC-NEXT: vluxei32.v v12, (zero), v8477; CHECK-RV32VC-NEXT: vmv.v.v v8, v12478; CHECK-RV32VC-NEXT: ret479 %x = call <16 x i8> @llvm.vp.gather.v16i8.v16p0(<16 x ptr> %ptrs, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !4480 ret <16 x i8> %x481}482 483define <16 x i8> @test_nontemporal_vp_gather_v16i8_DEFAULT(<16 x ptr> %ptrs, i32 zeroext %vl) {484; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v16i8_DEFAULT:485; CHECK-RV64V: # %bb.0:486; CHECK-RV64V-NEXT: vsetvli zero, a0, e8, m1, ta, ma487; CHECK-RV64V-NEXT: ntl.all488; CHECK-RV64V-NEXT: vluxei64.v v16, (zero), v8489; CHECK-RV64V-NEXT: vmv.v.v v8, v16490; CHECK-RV64V-NEXT: ret491;492; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v16i8_DEFAULT:493; CHECK-RV32V: # %bb.0:494; CHECK-RV32V-NEXT: vsetvli zero, a0, e8, m1, ta, ma495; CHECK-RV32V-NEXT: ntl.all496; CHECK-RV32V-NEXT: vluxei32.v v12, (zero), v8497; CHECK-RV32V-NEXT: vmv.v.v v8, v12498; CHECK-RV32V-NEXT: ret499;500; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v16i8_DEFAULT:501; CHECK-RV64VC: # %bb.0:502; CHECK-RV64VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma503; CHECK-RV64VC-NEXT: c.ntl.all504; CHECK-RV64VC-NEXT: vluxei64.v v16, (zero), v8505; CHECK-RV64VC-NEXT: vmv.v.v v8, v16506; CHECK-RV64VC-NEXT: ret507;508; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v16i8_DEFAULT:509; CHECK-RV32VC: # %bb.0:510; CHECK-RV32VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma511; CHECK-RV32VC-NEXT: c.ntl.all512; CHECK-RV32VC-NEXT: vluxei32.v v12, (zero), v8513; CHECK-RV32VC-NEXT: vmv.v.v v8, v12514; CHECK-RV32VC-NEXT: ret515 %x = call <16 x i8> @llvm.vp.gather.v16i8.v16p0(<16 x ptr> %ptrs, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0516 ret <16 x i8> %x517}518 519 520define void @test_nontemporal_vp_scatter_v16i8_P1(<16 x i8> %val, <16 x ptr> %ptrs, i32 zeroext %vl) {521; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v16i8_P1:522; CHECK-RV64V: # %bb.0:523; CHECK-RV64V-NEXT: vsetvli zero, a0, e8, m1, ta, ma524; CHECK-RV64V-NEXT: ntl.p1525; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v16526; CHECK-RV64V-NEXT: ret527;528; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v16i8_P1:529; CHECK-RV32V: # %bb.0:530; CHECK-RV32V-NEXT: vsetvli zero, a0, e8, m1, ta, ma531; CHECK-RV32V-NEXT: ntl.p1532; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v12533; CHECK-RV32V-NEXT: ret534;535; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v16i8_P1:536; CHECK-RV64VC: # %bb.0:537; CHECK-RV64VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma538; CHECK-RV64VC-NEXT: c.ntl.p1539; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v16540; CHECK-RV64VC-NEXT: ret541;542; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v16i8_P1:543; CHECK-RV32VC: # %bb.0:544; CHECK-RV32VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma545; CHECK-RV32VC-NEXT: c.ntl.p1546; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v12547; CHECK-RV32VC-NEXT: ret548 call void @llvm.vp.scatter.v16i8.v16p0(<16 x i8> %val, <16 x ptr> %ptrs, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !1549 ret void550}551 552 553define void @test_nontemporal_vp_scatter_v16i8_PALL(<16 x i8> %val, <16 x ptr> %ptrs, i32 zeroext %vl) {554; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v16i8_PALL:555; CHECK-RV64V: # %bb.0:556; CHECK-RV64V-NEXT: vsetvli zero, a0, e8, m1, ta, ma557; CHECK-RV64V-NEXT: ntl.pall558; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v16559; CHECK-RV64V-NEXT: ret560;561; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v16i8_PALL:562; CHECK-RV32V: # %bb.0:563; CHECK-RV32V-NEXT: vsetvli zero, a0, e8, m1, ta, ma564; CHECK-RV32V-NEXT: ntl.pall565; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v12566; CHECK-RV32V-NEXT: ret567;568; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v16i8_PALL:569; CHECK-RV64VC: # %bb.0:570; CHECK-RV64VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma571; CHECK-RV64VC-NEXT: c.ntl.pall572; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v16573; CHECK-RV64VC-NEXT: ret574;575; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v16i8_PALL:576; CHECK-RV32VC: # %bb.0:577; CHECK-RV32VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma578; CHECK-RV32VC-NEXT: c.ntl.pall579; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v12580; CHECK-RV32VC-NEXT: ret581 call void @llvm.vp.scatter.v16i8.v16p0(<16 x i8> %val, <16 x ptr> %ptrs, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !2582 ret void583}584 585 586define void @test_nontemporal_vp_scatter_v16i8_S1(<16 x i8> %val, <16 x ptr> %ptrs, i32 zeroext %vl) {587; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v16i8_S1:588; CHECK-RV64V: # %bb.0:589; CHECK-RV64V-NEXT: vsetvli zero, a0, e8, m1, ta, ma590; CHECK-RV64V-NEXT: ntl.s1591; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v16592; CHECK-RV64V-NEXT: ret593;594; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v16i8_S1:595; CHECK-RV32V: # %bb.0:596; CHECK-RV32V-NEXT: vsetvli zero, a0, e8, m1, ta, ma597; CHECK-RV32V-NEXT: ntl.s1598; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v12599; CHECK-RV32V-NEXT: ret600;601; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v16i8_S1:602; CHECK-RV64VC: # %bb.0:603; CHECK-RV64VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma604; CHECK-RV64VC-NEXT: c.ntl.s1605; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v16606; CHECK-RV64VC-NEXT: ret607;608; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v16i8_S1:609; CHECK-RV32VC: # %bb.0:610; CHECK-RV32VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma611; CHECK-RV32VC-NEXT: c.ntl.s1612; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v12613; CHECK-RV32VC-NEXT: ret614 call void @llvm.vp.scatter.v16i8.v16p0(<16 x i8> %val, <16 x ptr> %ptrs, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !3615 ret void616}617 618 619define void @test_nontemporal_vp_scatter_v16i8_ALL(<16 x i8> %val, <16 x ptr> %ptrs, i32 zeroext %vl) {620; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v16i8_ALL:621; CHECK-RV64V: # %bb.0:622; CHECK-RV64V-NEXT: vsetvli zero, a0, e8, m1, ta, ma623; CHECK-RV64V-NEXT: ntl.all624; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v16625; CHECK-RV64V-NEXT: ret626;627; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v16i8_ALL:628; CHECK-RV32V: # %bb.0:629; CHECK-RV32V-NEXT: vsetvli zero, a0, e8, m1, ta, ma630; CHECK-RV32V-NEXT: ntl.all631; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v12632; CHECK-RV32V-NEXT: ret633;634; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v16i8_ALL:635; CHECK-RV64VC: # %bb.0:636; CHECK-RV64VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma637; CHECK-RV64VC-NEXT: c.ntl.all638; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v16639; CHECK-RV64VC-NEXT: ret640;641; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v16i8_ALL:642; CHECK-RV32VC: # %bb.0:643; CHECK-RV32VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma644; CHECK-RV32VC-NEXT: c.ntl.all645; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v12646; CHECK-RV32VC-NEXT: ret647 call void @llvm.vp.scatter.v16i8.v16p0(<16 x i8> %val, <16 x ptr> %ptrs, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !4648 ret void649}650 651define void @test_nontemporal_vp_scatter_v16i8_DEFAULT(<16 x i8> %val, <16 x ptr> %ptrs, i32 zeroext %vl) {652; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v16i8_DEFAULT:653; CHECK-RV64V: # %bb.0:654; CHECK-RV64V-NEXT: vsetvli zero, a0, e8, m1, ta, ma655; CHECK-RV64V-NEXT: ntl.all656; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v16657; CHECK-RV64V-NEXT: ret658;659; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v16i8_DEFAULT:660; CHECK-RV32V: # %bb.0:661; CHECK-RV32V-NEXT: vsetvli zero, a0, e8, m1, ta, ma662; CHECK-RV32V-NEXT: ntl.all663; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v12664; CHECK-RV32V-NEXT: ret665;666; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v16i8_DEFAULT:667; CHECK-RV64VC: # %bb.0:668; CHECK-RV64VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma669; CHECK-RV64VC-NEXT: c.ntl.all670; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v16671; CHECK-RV64VC-NEXT: ret672;673; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v16i8_DEFAULT:674; CHECK-RV32VC: # %bb.0:675; CHECK-RV32VC-NEXT: vsetvli zero, a0, e8, m1, ta, ma676; CHECK-RV32VC-NEXT: c.ntl.all677; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v12678; CHECK-RV32VC-NEXT: ret679 call void @llvm.vp.scatter.v16i8.v16p0(<16 x i8> %val, <16 x ptr> %ptrs, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0680 ret void681}682 683 684define <16 x i8> @test_nontemporal_vp_strided.load_v16i8_P1(ptr %p, i64 %stride, i32 zeroext %vl) {685; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v16i8_P1:686; CHECK-RV64V: # %bb.0:687; CHECK-RV64V-NEXT: vsetvli zero, a2, e8, m1, ta, ma688; CHECK-RV64V-NEXT: ntl.p1689; CHECK-RV64V-NEXT: vlse8.v v8, (a0), a1690; CHECK-RV64V-NEXT: ret691;692; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v16i8_P1:693; CHECK-RV32V: # %bb.0:694; CHECK-RV32V-NEXT: vsetvli zero, a3, e8, m1, ta, ma695; CHECK-RV32V-NEXT: ntl.p1696; CHECK-RV32V-NEXT: vlse8.v v8, (a0), a1697; CHECK-RV32V-NEXT: ret698;699; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v16i8_P1:700; CHECK-RV64VC: # %bb.0:701; CHECK-RV64VC-NEXT: vsetvli zero, a2, e8, m1, ta, ma702; CHECK-RV64VC-NEXT: c.ntl.p1703; CHECK-RV64VC-NEXT: vlse8.v v8, (a0), a1704; CHECK-RV64VC-NEXT: ret705;706; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v16i8_P1:707; CHECK-RV32VC: # %bb.0:708; CHECK-RV32VC-NEXT: vsetvli zero, a3, e8, m1, ta, ma709; CHECK-RV32VC-NEXT: c.ntl.p1710; CHECK-RV32VC-NEXT: vlse8.v v8, (a0), a1711; CHECK-RV32VC-NEXT: ret712 %x = call <16 x i8> @llvm.experimental.vp.strided.load.v16i8.i64(ptr %p, i64 %stride, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !1713 ret <16 x i8> %x714}715 716 717define <16 x i8> @test_nontemporal_vp_strided.load_v16i8_PALL(ptr %p, i64 %stride, i32 zeroext %vl) {718; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v16i8_PALL:719; CHECK-RV64V: # %bb.0:720; CHECK-RV64V-NEXT: vsetvli zero, a2, e8, m1, ta, ma721; CHECK-RV64V-NEXT: ntl.pall722; CHECK-RV64V-NEXT: vlse8.v v8, (a0), a1723; CHECK-RV64V-NEXT: ret724;725; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v16i8_PALL:726; CHECK-RV32V: # %bb.0:727; CHECK-RV32V-NEXT: vsetvli zero, a3, e8, m1, ta, ma728; CHECK-RV32V-NEXT: ntl.pall729; CHECK-RV32V-NEXT: vlse8.v v8, (a0), a1730; CHECK-RV32V-NEXT: ret731;732; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v16i8_PALL:733; CHECK-RV64VC: # %bb.0:734; CHECK-RV64VC-NEXT: vsetvli zero, a2, e8, m1, ta, ma735; CHECK-RV64VC-NEXT: c.ntl.pall736; CHECK-RV64VC-NEXT: vlse8.v v8, (a0), a1737; CHECK-RV64VC-NEXT: ret738;739; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v16i8_PALL:740; CHECK-RV32VC: # %bb.0:741; CHECK-RV32VC-NEXT: vsetvli zero, a3, e8, m1, ta, ma742; CHECK-RV32VC-NEXT: c.ntl.pall743; CHECK-RV32VC-NEXT: vlse8.v v8, (a0), a1744; CHECK-RV32VC-NEXT: ret745 %x = call <16 x i8> @llvm.experimental.vp.strided.load.v16i8.i64(ptr %p, i64 %stride, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !2746 ret <16 x i8> %x747}748 749 750define <16 x i8> @test_nontemporal_vp_strided.load_v16i8_S1(ptr %p, i64 %stride, i32 zeroext %vl) {751; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v16i8_S1:752; CHECK-RV64V: # %bb.0:753; CHECK-RV64V-NEXT: vsetvli zero, a2, e8, m1, ta, ma754; CHECK-RV64V-NEXT: ntl.s1755; CHECK-RV64V-NEXT: vlse8.v v8, (a0), a1756; CHECK-RV64V-NEXT: ret757;758; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v16i8_S1:759; CHECK-RV32V: # %bb.0:760; CHECK-RV32V-NEXT: vsetvli zero, a3, e8, m1, ta, ma761; CHECK-RV32V-NEXT: ntl.s1762; CHECK-RV32V-NEXT: vlse8.v v8, (a0), a1763; CHECK-RV32V-NEXT: ret764;765; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v16i8_S1:766; CHECK-RV64VC: # %bb.0:767; CHECK-RV64VC-NEXT: vsetvli zero, a2, e8, m1, ta, ma768; CHECK-RV64VC-NEXT: c.ntl.s1769; CHECK-RV64VC-NEXT: vlse8.v v8, (a0), a1770; CHECK-RV64VC-NEXT: ret771;772; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v16i8_S1:773; CHECK-RV32VC: # %bb.0:774; CHECK-RV32VC-NEXT: vsetvli zero, a3, e8, m1, ta, ma775; CHECK-RV32VC-NEXT: c.ntl.s1776; CHECK-RV32VC-NEXT: vlse8.v v8, (a0), a1777; CHECK-RV32VC-NEXT: ret778 %x = call <16 x i8> @llvm.experimental.vp.strided.load.v16i8.i64(ptr %p, i64 %stride, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !3779 ret <16 x i8> %x780}781 782 783define <16 x i8> @test_nontemporal_vp_strided.load_v16i8_ALL(ptr %p, i64 %stride, i32 zeroext %vl) {784; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v16i8_ALL:785; CHECK-RV64V: # %bb.0:786; CHECK-RV64V-NEXT: vsetvli zero, a2, e8, m1, ta, ma787; CHECK-RV64V-NEXT: ntl.all788; CHECK-RV64V-NEXT: vlse8.v v8, (a0), a1789; CHECK-RV64V-NEXT: ret790;791; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v16i8_ALL:792; CHECK-RV32V: # %bb.0:793; CHECK-RV32V-NEXT: vsetvli zero, a3, e8, m1, ta, ma794; CHECK-RV32V-NEXT: ntl.all795; CHECK-RV32V-NEXT: vlse8.v v8, (a0), a1796; CHECK-RV32V-NEXT: ret797;798; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v16i8_ALL:799; CHECK-RV64VC: # %bb.0:800; CHECK-RV64VC-NEXT: vsetvli zero, a2, e8, m1, ta, ma801; CHECK-RV64VC-NEXT: c.ntl.all802; CHECK-RV64VC-NEXT: vlse8.v v8, (a0), a1803; CHECK-RV64VC-NEXT: ret804;805; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v16i8_ALL:806; CHECK-RV32VC: # %bb.0:807; CHECK-RV32VC-NEXT: vsetvli zero, a3, e8, m1, ta, ma808; CHECK-RV32VC-NEXT: c.ntl.all809; CHECK-RV32VC-NEXT: vlse8.v v8, (a0), a1810; CHECK-RV32VC-NEXT: ret811 %x = call <16 x i8> @llvm.experimental.vp.strided.load.v16i8.i64(ptr %p, i64 %stride, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !4812 ret <16 x i8> %x813}814 815define <16 x i8> @test_nontemporal_vp_strided.load_v16i8_DEFAULT(ptr %p, i64 %stride, i32 zeroext %vl) {816; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v16i8_DEFAULT:817; CHECK-RV64V: # %bb.0:818; CHECK-RV64V-NEXT: vsetvli zero, a2, e8, m1, ta, ma819; CHECK-RV64V-NEXT: ntl.all820; CHECK-RV64V-NEXT: vlse8.v v8, (a0), a1821; CHECK-RV64V-NEXT: ret822;823; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v16i8_DEFAULT:824; CHECK-RV32V: # %bb.0:825; CHECK-RV32V-NEXT: vsetvli zero, a3, e8, m1, ta, ma826; CHECK-RV32V-NEXT: ntl.all827; CHECK-RV32V-NEXT: vlse8.v v8, (a0), a1828; CHECK-RV32V-NEXT: ret829;830; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v16i8_DEFAULT:831; CHECK-RV64VC: # %bb.0:832; CHECK-RV64VC-NEXT: vsetvli zero, a2, e8, m1, ta, ma833; CHECK-RV64VC-NEXT: c.ntl.all834; CHECK-RV64VC-NEXT: vlse8.v v8, (a0), a1835; CHECK-RV64VC-NEXT: ret836;837; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v16i8_DEFAULT:838; CHECK-RV32VC: # %bb.0:839; CHECK-RV32VC-NEXT: vsetvli zero, a3, e8, m1, ta, ma840; CHECK-RV32VC-NEXT: c.ntl.all841; CHECK-RV32VC-NEXT: vlse8.v v8, (a0), a1842; CHECK-RV32VC-NEXT: ret843 %x = call <16 x i8> @llvm.experimental.vp.strided.load.v16i8.i64(ptr %p, i64 %stride, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0844 ret <16 x i8> %x845}846 847 848define void @test_nontemporal_vp_strided.store_v16i8_P1(<16 x i8> %val, ptr %p, i64 %stride, i32 zeroext %vl) {849; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v16i8_P1:850; CHECK-RV64V: # %bb.0:851; CHECK-RV64V-NEXT: vsetvli zero, a2, e8, m1, ta, ma852; CHECK-RV64V-NEXT: ntl.p1853; CHECK-RV64V-NEXT: vsse8.v v8, (a0), a1854; CHECK-RV64V-NEXT: ret855;856; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v16i8_P1:857; CHECK-RV32V: # %bb.0:858; CHECK-RV32V-NEXT: vsetvli zero, a3, e8, m1, ta, ma859; CHECK-RV32V-NEXT: ntl.p1860; CHECK-RV32V-NEXT: vsse8.v v8, (a0), a1861; CHECK-RV32V-NEXT: ret862;863; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v16i8_P1:864; CHECK-RV64VC: # %bb.0:865; CHECK-RV64VC-NEXT: vsetvli zero, a2, e8, m1, ta, ma866; CHECK-RV64VC-NEXT: c.ntl.p1867; CHECK-RV64VC-NEXT: vsse8.v v8, (a0), a1868; CHECK-RV64VC-NEXT: ret869;870; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v16i8_P1:871; CHECK-RV32VC: # %bb.0:872; CHECK-RV32VC-NEXT: vsetvli zero, a3, e8, m1, ta, ma873; CHECK-RV32VC-NEXT: c.ntl.p1874; CHECK-RV32VC-NEXT: vsse8.v v8, (a0), a1875; CHECK-RV32VC-NEXT: ret876 call void @llvm.experimental.vp.strided.store.v16i8.i64(<16 x i8> %val, ptr %p, i64 %stride, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !1877 ret void878}879 880 881define void @test_nontemporal_vp_strided.store_v16i8_PALL(<16 x i8> %val, ptr %p, i64 %stride, i32 zeroext %vl) {882; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v16i8_PALL:883; CHECK-RV64V: # %bb.0:884; CHECK-RV64V-NEXT: vsetvli zero, a2, e8, m1, ta, ma885; CHECK-RV64V-NEXT: ntl.pall886; CHECK-RV64V-NEXT: vsse8.v v8, (a0), a1887; CHECK-RV64V-NEXT: ret888;889; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v16i8_PALL:890; CHECK-RV32V: # %bb.0:891; CHECK-RV32V-NEXT: vsetvli zero, a3, e8, m1, ta, ma892; CHECK-RV32V-NEXT: ntl.pall893; CHECK-RV32V-NEXT: vsse8.v v8, (a0), a1894; CHECK-RV32V-NEXT: ret895;896; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v16i8_PALL:897; CHECK-RV64VC: # %bb.0:898; CHECK-RV64VC-NEXT: vsetvli zero, a2, e8, m1, ta, ma899; CHECK-RV64VC-NEXT: c.ntl.pall900; CHECK-RV64VC-NEXT: vsse8.v v8, (a0), a1901; CHECK-RV64VC-NEXT: ret902;903; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v16i8_PALL:904; CHECK-RV32VC: # %bb.0:905; CHECK-RV32VC-NEXT: vsetvli zero, a3, e8, m1, ta, ma906; CHECK-RV32VC-NEXT: c.ntl.pall907; CHECK-RV32VC-NEXT: vsse8.v v8, (a0), a1908; CHECK-RV32VC-NEXT: ret909 call void @llvm.experimental.vp.strided.store.v16i8.i64(<16 x i8> %val, ptr %p, i64 %stride, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !2910 ret void911}912 913 914define void @test_nontemporal_vp_strided.store_v16i8_S1(<16 x i8> %val, ptr %p, i64 %stride, i32 zeroext %vl) {915; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v16i8_S1:916; CHECK-RV64V: # %bb.0:917; CHECK-RV64V-NEXT: vsetvli zero, a2, e8, m1, ta, ma918; CHECK-RV64V-NEXT: ntl.s1919; CHECK-RV64V-NEXT: vsse8.v v8, (a0), a1920; CHECK-RV64V-NEXT: ret921;922; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v16i8_S1:923; CHECK-RV32V: # %bb.0:924; CHECK-RV32V-NEXT: vsetvli zero, a3, e8, m1, ta, ma925; CHECK-RV32V-NEXT: ntl.s1926; CHECK-RV32V-NEXT: vsse8.v v8, (a0), a1927; CHECK-RV32V-NEXT: ret928;929; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v16i8_S1:930; CHECK-RV64VC: # %bb.0:931; CHECK-RV64VC-NEXT: vsetvli zero, a2, e8, m1, ta, ma932; CHECK-RV64VC-NEXT: c.ntl.s1933; CHECK-RV64VC-NEXT: vsse8.v v8, (a0), a1934; CHECK-RV64VC-NEXT: ret935;936; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v16i8_S1:937; CHECK-RV32VC: # %bb.0:938; CHECK-RV32VC-NEXT: vsetvli zero, a3, e8, m1, ta, ma939; CHECK-RV32VC-NEXT: c.ntl.s1940; CHECK-RV32VC-NEXT: vsse8.v v8, (a0), a1941; CHECK-RV32VC-NEXT: ret942 call void @llvm.experimental.vp.strided.store.v16i8.i64(<16 x i8> %val, ptr %p, i64 %stride, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !3943 ret void944}945 946 947define void @test_nontemporal_vp_strided.store_v16i8_ALL(<16 x i8> %val, ptr %p, i64 %stride, i32 zeroext %vl) {948; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v16i8_ALL:949; CHECK-RV64V: # %bb.0:950; CHECK-RV64V-NEXT: vsetvli zero, a2, e8, m1, ta, ma951; CHECK-RV64V-NEXT: ntl.all952; CHECK-RV64V-NEXT: vsse8.v v8, (a0), a1953; CHECK-RV64V-NEXT: ret954;955; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v16i8_ALL:956; CHECK-RV32V: # %bb.0:957; CHECK-RV32V-NEXT: vsetvli zero, a3, e8, m1, ta, ma958; CHECK-RV32V-NEXT: ntl.all959; CHECK-RV32V-NEXT: vsse8.v v8, (a0), a1960; CHECK-RV32V-NEXT: ret961;962; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v16i8_ALL:963; CHECK-RV64VC: # %bb.0:964; CHECK-RV64VC-NEXT: vsetvli zero, a2, e8, m1, ta, ma965; CHECK-RV64VC-NEXT: c.ntl.all966; CHECK-RV64VC-NEXT: vsse8.v v8, (a0), a1967; CHECK-RV64VC-NEXT: ret968;969; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v16i8_ALL:970; CHECK-RV32VC: # %bb.0:971; CHECK-RV32VC-NEXT: vsetvli zero, a3, e8, m1, ta, ma972; CHECK-RV32VC-NEXT: c.ntl.all973; CHECK-RV32VC-NEXT: vsse8.v v8, (a0), a1974; CHECK-RV32VC-NEXT: ret975 call void @llvm.experimental.vp.strided.store.v16i8.i64(<16 x i8> %val, ptr %p, i64 %stride, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !4976 ret void977}978 979define void @test_nontemporal_vp_strided.store_v16i8_DEFAULT(<16 x i8> %val, ptr %p, i64 %stride, i32 zeroext %vl) {980; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v16i8_DEFAULT:981; CHECK-RV64V: # %bb.0:982; CHECK-RV64V-NEXT: vsetvli zero, a2, e8, m1, ta, ma983; CHECK-RV64V-NEXT: ntl.all984; CHECK-RV64V-NEXT: vsse8.v v8, (a0), a1985; CHECK-RV64V-NEXT: ret986;987; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v16i8_DEFAULT:988; CHECK-RV32V: # %bb.0:989; CHECK-RV32V-NEXT: vsetvli zero, a3, e8, m1, ta, ma990; CHECK-RV32V-NEXT: ntl.all991; CHECK-RV32V-NEXT: vsse8.v v8, (a0), a1992; CHECK-RV32V-NEXT: ret993;994; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v16i8_DEFAULT:995; CHECK-RV64VC: # %bb.0:996; CHECK-RV64VC-NEXT: vsetvli zero, a2, e8, m1, ta, ma997; CHECK-RV64VC-NEXT: c.ntl.all998; CHECK-RV64VC-NEXT: vsse8.v v8, (a0), a1999; CHECK-RV64VC-NEXT: ret1000;1001; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v16i8_DEFAULT:1002; CHECK-RV32VC: # %bb.0:1003; CHECK-RV32VC-NEXT: vsetvli zero, a3, e8, m1, ta, ma1004; CHECK-RV32VC-NEXT: c.ntl.all1005; CHECK-RV32VC-NEXT: vsse8.v v8, (a0), a11006; CHECK-RV32VC-NEXT: ret1007 call void @llvm.experimental.vp.strided.store.v16i8.i64(<16 x i8> %val, ptr %p, i64 %stride, <16 x i1> splat(i1 true), i32 %vl), !nontemporal !01008 ret void1009}1010 1011 1012define <8 x i16> @test_nontemporal_vp_load_v8i16_P1(ptr %p, i32 zeroext %vl) {1013; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v8i16_P1:1014; CHECK-RV64V: # %bb.0:1015; CHECK-RV64V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1016; CHECK-RV64V-NEXT: ntl.p11017; CHECK-RV64V-NEXT: vle16.v v8, (a0)1018; CHECK-RV64V-NEXT: ret1019;1020; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v8i16_P1:1021; CHECK-RV32V: # %bb.0:1022; CHECK-RV32V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1023; CHECK-RV32V-NEXT: ntl.p11024; CHECK-RV32V-NEXT: vle16.v v8, (a0)1025; CHECK-RV32V-NEXT: ret1026;1027; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v8i16_P1:1028; CHECK-RV64VC: # %bb.0:1029; CHECK-RV64VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1030; CHECK-RV64VC-NEXT: c.ntl.p11031; CHECK-RV64VC-NEXT: vle16.v v8, (a0)1032; CHECK-RV64VC-NEXT: ret1033;1034; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v8i16_P1:1035; CHECK-RV32VC: # %bb.0:1036; CHECK-RV32VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1037; CHECK-RV32VC-NEXT: c.ntl.p11038; CHECK-RV32VC-NEXT: vle16.v v8, (a0)1039; CHECK-RV32VC-NEXT: ret1040 %x = call <8 x i16> @llvm.vp.load.v8i16.p0(ptr %p, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !11041 ret <8 x i16> %x1042}1043 1044 1045define <8 x i16> @test_nontemporal_vp_load_v8i16_PALL(ptr %p, i32 zeroext %vl) {1046; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v8i16_PALL:1047; CHECK-RV64V: # %bb.0:1048; CHECK-RV64V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1049; CHECK-RV64V-NEXT: ntl.pall1050; CHECK-RV64V-NEXT: vle16.v v8, (a0)1051; CHECK-RV64V-NEXT: ret1052;1053; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v8i16_PALL:1054; CHECK-RV32V: # %bb.0:1055; CHECK-RV32V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1056; CHECK-RV32V-NEXT: ntl.pall1057; CHECK-RV32V-NEXT: vle16.v v8, (a0)1058; CHECK-RV32V-NEXT: ret1059;1060; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v8i16_PALL:1061; CHECK-RV64VC: # %bb.0:1062; CHECK-RV64VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1063; CHECK-RV64VC-NEXT: c.ntl.pall1064; CHECK-RV64VC-NEXT: vle16.v v8, (a0)1065; CHECK-RV64VC-NEXT: ret1066;1067; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v8i16_PALL:1068; CHECK-RV32VC: # %bb.0:1069; CHECK-RV32VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1070; CHECK-RV32VC-NEXT: c.ntl.pall1071; CHECK-RV32VC-NEXT: vle16.v v8, (a0)1072; CHECK-RV32VC-NEXT: ret1073 %x = call <8 x i16> @llvm.vp.load.v8i16.p0(ptr %p, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !21074 ret <8 x i16> %x1075}1076 1077 1078define <8 x i16> @test_nontemporal_vp_load_v8i16_S1(ptr %p, i32 zeroext %vl) {1079; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v8i16_S1:1080; CHECK-RV64V: # %bb.0:1081; CHECK-RV64V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1082; CHECK-RV64V-NEXT: ntl.s11083; CHECK-RV64V-NEXT: vle16.v v8, (a0)1084; CHECK-RV64V-NEXT: ret1085;1086; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v8i16_S1:1087; CHECK-RV32V: # %bb.0:1088; CHECK-RV32V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1089; CHECK-RV32V-NEXT: ntl.s11090; CHECK-RV32V-NEXT: vle16.v v8, (a0)1091; CHECK-RV32V-NEXT: ret1092;1093; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v8i16_S1:1094; CHECK-RV64VC: # %bb.0:1095; CHECK-RV64VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1096; CHECK-RV64VC-NEXT: c.ntl.s11097; CHECK-RV64VC-NEXT: vle16.v v8, (a0)1098; CHECK-RV64VC-NEXT: ret1099;1100; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v8i16_S1:1101; CHECK-RV32VC: # %bb.0:1102; CHECK-RV32VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1103; CHECK-RV32VC-NEXT: c.ntl.s11104; CHECK-RV32VC-NEXT: vle16.v v8, (a0)1105; CHECK-RV32VC-NEXT: ret1106 %x = call <8 x i16> @llvm.vp.load.v8i16.p0(ptr %p, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !31107 ret <8 x i16> %x1108}1109 1110 1111define <8 x i16> @test_nontemporal_vp_load_v8i16_ALL(ptr %p, i32 zeroext %vl) {1112; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v8i16_ALL:1113; CHECK-RV64V: # %bb.0:1114; CHECK-RV64V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1115; CHECK-RV64V-NEXT: ntl.all1116; CHECK-RV64V-NEXT: vle16.v v8, (a0)1117; CHECK-RV64V-NEXT: ret1118;1119; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v8i16_ALL:1120; CHECK-RV32V: # %bb.0:1121; CHECK-RV32V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1122; CHECK-RV32V-NEXT: ntl.all1123; CHECK-RV32V-NEXT: vle16.v v8, (a0)1124; CHECK-RV32V-NEXT: ret1125;1126; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v8i16_ALL:1127; CHECK-RV64VC: # %bb.0:1128; CHECK-RV64VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1129; CHECK-RV64VC-NEXT: c.ntl.all1130; CHECK-RV64VC-NEXT: vle16.v v8, (a0)1131; CHECK-RV64VC-NEXT: ret1132;1133; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v8i16_ALL:1134; CHECK-RV32VC: # %bb.0:1135; CHECK-RV32VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1136; CHECK-RV32VC-NEXT: c.ntl.all1137; CHECK-RV32VC-NEXT: vle16.v v8, (a0)1138; CHECK-RV32VC-NEXT: ret1139 %x = call <8 x i16> @llvm.vp.load.v8i16.p0(ptr %p, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !41140 ret <8 x i16> %x1141}1142 1143define <8 x i16> @test_nontemporal_vp_load_v8i16_DEFAULT(ptr %p, i32 zeroext %vl) {1144; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v8i16_DEFAULT:1145; CHECK-RV64V: # %bb.0:1146; CHECK-RV64V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1147; CHECK-RV64V-NEXT: ntl.all1148; CHECK-RV64V-NEXT: vle16.v v8, (a0)1149; CHECK-RV64V-NEXT: ret1150;1151; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v8i16_DEFAULT:1152; CHECK-RV32V: # %bb.0:1153; CHECK-RV32V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1154; CHECK-RV32V-NEXT: ntl.all1155; CHECK-RV32V-NEXT: vle16.v v8, (a0)1156; CHECK-RV32V-NEXT: ret1157;1158; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v8i16_DEFAULT:1159; CHECK-RV64VC: # %bb.0:1160; CHECK-RV64VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1161; CHECK-RV64VC-NEXT: c.ntl.all1162; CHECK-RV64VC-NEXT: vle16.v v8, (a0)1163; CHECK-RV64VC-NEXT: ret1164;1165; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v8i16_DEFAULT:1166; CHECK-RV32VC: # %bb.0:1167; CHECK-RV32VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1168; CHECK-RV32VC-NEXT: c.ntl.all1169; CHECK-RV32VC-NEXT: vle16.v v8, (a0)1170; CHECK-RV32VC-NEXT: ret1171 %x = call <8 x i16> @llvm.vp.load.v8i16.p0(ptr %p, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !01172 ret <8 x i16> %x1173}1174 1175 1176define void @test_nontemporal_vp_store_v8i16_P1(<8 x i16> %val, ptr %p, i32 zeroext %vl) {1177; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v8i16_P1:1178; CHECK-RV64V: # %bb.0:1179; CHECK-RV64V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1180; CHECK-RV64V-NEXT: ntl.p11181; CHECK-RV64V-NEXT: vse16.v v8, (a0)1182; CHECK-RV64V-NEXT: ret1183;1184; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v8i16_P1:1185; CHECK-RV32V: # %bb.0:1186; CHECK-RV32V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1187; CHECK-RV32V-NEXT: ntl.p11188; CHECK-RV32V-NEXT: vse16.v v8, (a0)1189; CHECK-RV32V-NEXT: ret1190;1191; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v8i16_P1:1192; CHECK-RV64VC: # %bb.0:1193; CHECK-RV64VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1194; CHECK-RV64VC-NEXT: c.ntl.p11195; CHECK-RV64VC-NEXT: vse16.v v8, (a0)1196; CHECK-RV64VC-NEXT: ret1197;1198; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v8i16_P1:1199; CHECK-RV32VC: # %bb.0:1200; CHECK-RV32VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1201; CHECK-RV32VC-NEXT: c.ntl.p11202; CHECK-RV32VC-NEXT: vse16.v v8, (a0)1203; CHECK-RV32VC-NEXT: ret1204 call void @llvm.vp.store.v8i16.p0(<8 x i16> %val, ptr %p, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !11205 ret void1206}1207 1208 1209define void @test_nontemporal_vp_store_v8i16_PALL(<8 x i16> %val, ptr %p, i32 zeroext %vl) {1210; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v8i16_PALL:1211; CHECK-RV64V: # %bb.0:1212; CHECK-RV64V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1213; CHECK-RV64V-NEXT: ntl.pall1214; CHECK-RV64V-NEXT: vse16.v v8, (a0)1215; CHECK-RV64V-NEXT: ret1216;1217; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v8i16_PALL:1218; CHECK-RV32V: # %bb.0:1219; CHECK-RV32V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1220; CHECK-RV32V-NEXT: ntl.pall1221; CHECK-RV32V-NEXT: vse16.v v8, (a0)1222; CHECK-RV32V-NEXT: ret1223;1224; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v8i16_PALL:1225; CHECK-RV64VC: # %bb.0:1226; CHECK-RV64VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1227; CHECK-RV64VC-NEXT: c.ntl.pall1228; CHECK-RV64VC-NEXT: vse16.v v8, (a0)1229; CHECK-RV64VC-NEXT: ret1230;1231; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v8i16_PALL:1232; CHECK-RV32VC: # %bb.0:1233; CHECK-RV32VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1234; CHECK-RV32VC-NEXT: c.ntl.pall1235; CHECK-RV32VC-NEXT: vse16.v v8, (a0)1236; CHECK-RV32VC-NEXT: ret1237 call void @llvm.vp.store.v8i16.p0(<8 x i16> %val, ptr %p, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !21238 ret void1239}1240 1241 1242define void @test_nontemporal_vp_store_v8i16_S1(<8 x i16> %val, ptr %p, i32 zeroext %vl) {1243; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v8i16_S1:1244; CHECK-RV64V: # %bb.0:1245; CHECK-RV64V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1246; CHECK-RV64V-NEXT: ntl.s11247; CHECK-RV64V-NEXT: vse16.v v8, (a0)1248; CHECK-RV64V-NEXT: ret1249;1250; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v8i16_S1:1251; CHECK-RV32V: # %bb.0:1252; CHECK-RV32V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1253; CHECK-RV32V-NEXT: ntl.s11254; CHECK-RV32V-NEXT: vse16.v v8, (a0)1255; CHECK-RV32V-NEXT: ret1256;1257; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v8i16_S1:1258; CHECK-RV64VC: # %bb.0:1259; CHECK-RV64VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1260; CHECK-RV64VC-NEXT: c.ntl.s11261; CHECK-RV64VC-NEXT: vse16.v v8, (a0)1262; CHECK-RV64VC-NEXT: ret1263;1264; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v8i16_S1:1265; CHECK-RV32VC: # %bb.0:1266; CHECK-RV32VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1267; CHECK-RV32VC-NEXT: c.ntl.s11268; CHECK-RV32VC-NEXT: vse16.v v8, (a0)1269; CHECK-RV32VC-NEXT: ret1270 call void @llvm.vp.store.v8i16.p0(<8 x i16> %val, ptr %p, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !31271 ret void1272}1273 1274 1275define void @test_nontemporal_vp_store_v8i16_ALL(<8 x i16> %val, ptr %p, i32 zeroext %vl) {1276; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v8i16_ALL:1277; CHECK-RV64V: # %bb.0:1278; CHECK-RV64V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1279; CHECK-RV64V-NEXT: ntl.all1280; CHECK-RV64V-NEXT: vse16.v v8, (a0)1281; CHECK-RV64V-NEXT: ret1282;1283; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v8i16_ALL:1284; CHECK-RV32V: # %bb.0:1285; CHECK-RV32V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1286; CHECK-RV32V-NEXT: ntl.all1287; CHECK-RV32V-NEXT: vse16.v v8, (a0)1288; CHECK-RV32V-NEXT: ret1289;1290; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v8i16_ALL:1291; CHECK-RV64VC: # %bb.0:1292; CHECK-RV64VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1293; CHECK-RV64VC-NEXT: c.ntl.all1294; CHECK-RV64VC-NEXT: vse16.v v8, (a0)1295; CHECK-RV64VC-NEXT: ret1296;1297; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v8i16_ALL:1298; CHECK-RV32VC: # %bb.0:1299; CHECK-RV32VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1300; CHECK-RV32VC-NEXT: c.ntl.all1301; CHECK-RV32VC-NEXT: vse16.v v8, (a0)1302; CHECK-RV32VC-NEXT: ret1303 call void @llvm.vp.store.v8i16.p0(<8 x i16> %val, ptr %p, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !41304 ret void1305}1306 1307define void @test_nontemporal_vp_store_v8i16_DEFAULT(<8 x i16> %val, ptr %p, i32 zeroext %vl) {1308; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v8i16_DEFAULT:1309; CHECK-RV64V: # %bb.0:1310; CHECK-RV64V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1311; CHECK-RV64V-NEXT: ntl.all1312; CHECK-RV64V-NEXT: vse16.v v8, (a0)1313; CHECK-RV64V-NEXT: ret1314;1315; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v8i16_DEFAULT:1316; CHECK-RV32V: # %bb.0:1317; CHECK-RV32V-NEXT: vsetvli zero, a1, e16, m1, ta, ma1318; CHECK-RV32V-NEXT: ntl.all1319; CHECK-RV32V-NEXT: vse16.v v8, (a0)1320; CHECK-RV32V-NEXT: ret1321;1322; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v8i16_DEFAULT:1323; CHECK-RV64VC: # %bb.0:1324; CHECK-RV64VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1325; CHECK-RV64VC-NEXT: c.ntl.all1326; CHECK-RV64VC-NEXT: vse16.v v8, (a0)1327; CHECK-RV64VC-NEXT: ret1328;1329; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v8i16_DEFAULT:1330; CHECK-RV32VC: # %bb.0:1331; CHECK-RV32VC-NEXT: vsetvli zero, a1, e16, m1, ta, ma1332; CHECK-RV32VC-NEXT: c.ntl.all1333; CHECK-RV32VC-NEXT: vse16.v v8, (a0)1334; CHECK-RV32VC-NEXT: ret1335 call void @llvm.vp.store.v8i16.p0(<8 x i16> %val, ptr %p, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !01336 ret void1337}1338 1339 1340define <8 x i16> @test_nontemporal_vp_gather_v8i16_P1(<8 x ptr> %ptrs, i32 zeroext %vl) {1341; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v8i16_P1:1342; CHECK-RV64V: # %bb.0:1343; CHECK-RV64V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1344; CHECK-RV64V-NEXT: ntl.p11345; CHECK-RV64V-NEXT: vluxei64.v v12, (zero), v81346; CHECK-RV64V-NEXT: vmv.v.v v8, v121347; CHECK-RV64V-NEXT: ret1348;1349; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v8i16_P1:1350; CHECK-RV32V: # %bb.0:1351; CHECK-RV32V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1352; CHECK-RV32V-NEXT: ntl.p11353; CHECK-RV32V-NEXT: vluxei32.v v10, (zero), v81354; CHECK-RV32V-NEXT: vmv.v.v v8, v101355; CHECK-RV32V-NEXT: ret1356;1357; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v8i16_P1:1358; CHECK-RV64VC: # %bb.0:1359; CHECK-RV64VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1360; CHECK-RV64VC-NEXT: c.ntl.p11361; CHECK-RV64VC-NEXT: vluxei64.v v12, (zero), v81362; CHECK-RV64VC-NEXT: vmv.v.v v8, v121363; CHECK-RV64VC-NEXT: ret1364;1365; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v8i16_P1:1366; CHECK-RV32VC: # %bb.0:1367; CHECK-RV32VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1368; CHECK-RV32VC-NEXT: c.ntl.p11369; CHECK-RV32VC-NEXT: vluxei32.v v10, (zero), v81370; CHECK-RV32VC-NEXT: vmv.v.v v8, v101371; CHECK-RV32VC-NEXT: ret1372 %x = call <8 x i16> @llvm.vp.gather.v8i16.v8p0(<8 x ptr> %ptrs, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !11373 ret <8 x i16> %x1374}1375 1376 1377define <8 x i16> @test_nontemporal_vp_gather_v8i16_PALL(<8 x ptr> %ptrs, i32 zeroext %vl) {1378; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v8i16_PALL:1379; CHECK-RV64V: # %bb.0:1380; CHECK-RV64V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1381; CHECK-RV64V-NEXT: ntl.pall1382; CHECK-RV64V-NEXT: vluxei64.v v12, (zero), v81383; CHECK-RV64V-NEXT: vmv.v.v v8, v121384; CHECK-RV64V-NEXT: ret1385;1386; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v8i16_PALL:1387; CHECK-RV32V: # %bb.0:1388; CHECK-RV32V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1389; CHECK-RV32V-NEXT: ntl.pall1390; CHECK-RV32V-NEXT: vluxei32.v v10, (zero), v81391; CHECK-RV32V-NEXT: vmv.v.v v8, v101392; CHECK-RV32V-NEXT: ret1393;1394; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v8i16_PALL:1395; CHECK-RV64VC: # %bb.0:1396; CHECK-RV64VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1397; CHECK-RV64VC-NEXT: c.ntl.pall1398; CHECK-RV64VC-NEXT: vluxei64.v v12, (zero), v81399; CHECK-RV64VC-NEXT: vmv.v.v v8, v121400; CHECK-RV64VC-NEXT: ret1401;1402; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v8i16_PALL:1403; CHECK-RV32VC: # %bb.0:1404; CHECK-RV32VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1405; CHECK-RV32VC-NEXT: c.ntl.pall1406; CHECK-RV32VC-NEXT: vluxei32.v v10, (zero), v81407; CHECK-RV32VC-NEXT: vmv.v.v v8, v101408; CHECK-RV32VC-NEXT: ret1409 %x = call <8 x i16> @llvm.vp.gather.v8i16.v8p0(<8 x ptr> %ptrs, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !21410 ret <8 x i16> %x1411}1412 1413 1414define <8 x i16> @test_nontemporal_vp_gather_v8i16_S1(<8 x ptr> %ptrs, i32 zeroext %vl) {1415; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v8i16_S1:1416; CHECK-RV64V: # %bb.0:1417; CHECK-RV64V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1418; CHECK-RV64V-NEXT: ntl.s11419; CHECK-RV64V-NEXT: vluxei64.v v12, (zero), v81420; CHECK-RV64V-NEXT: vmv.v.v v8, v121421; CHECK-RV64V-NEXT: ret1422;1423; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v8i16_S1:1424; CHECK-RV32V: # %bb.0:1425; CHECK-RV32V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1426; CHECK-RV32V-NEXT: ntl.s11427; CHECK-RV32V-NEXT: vluxei32.v v10, (zero), v81428; CHECK-RV32V-NEXT: vmv.v.v v8, v101429; CHECK-RV32V-NEXT: ret1430;1431; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v8i16_S1:1432; CHECK-RV64VC: # %bb.0:1433; CHECK-RV64VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1434; CHECK-RV64VC-NEXT: c.ntl.s11435; CHECK-RV64VC-NEXT: vluxei64.v v12, (zero), v81436; CHECK-RV64VC-NEXT: vmv.v.v v8, v121437; CHECK-RV64VC-NEXT: ret1438;1439; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v8i16_S1:1440; CHECK-RV32VC: # %bb.0:1441; CHECK-RV32VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1442; CHECK-RV32VC-NEXT: c.ntl.s11443; CHECK-RV32VC-NEXT: vluxei32.v v10, (zero), v81444; CHECK-RV32VC-NEXT: vmv.v.v v8, v101445; CHECK-RV32VC-NEXT: ret1446 %x = call <8 x i16> @llvm.vp.gather.v8i16.v8p0(<8 x ptr> %ptrs, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !31447 ret <8 x i16> %x1448}1449 1450 1451define <8 x i16> @test_nontemporal_vp_gather_v8i16_ALL(<8 x ptr> %ptrs, i32 zeroext %vl) {1452; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v8i16_ALL:1453; CHECK-RV64V: # %bb.0:1454; CHECK-RV64V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1455; CHECK-RV64V-NEXT: ntl.all1456; CHECK-RV64V-NEXT: vluxei64.v v12, (zero), v81457; CHECK-RV64V-NEXT: vmv.v.v v8, v121458; CHECK-RV64V-NEXT: ret1459;1460; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v8i16_ALL:1461; CHECK-RV32V: # %bb.0:1462; CHECK-RV32V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1463; CHECK-RV32V-NEXT: ntl.all1464; CHECK-RV32V-NEXT: vluxei32.v v10, (zero), v81465; CHECK-RV32V-NEXT: vmv.v.v v8, v101466; CHECK-RV32V-NEXT: ret1467;1468; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v8i16_ALL:1469; CHECK-RV64VC: # %bb.0:1470; CHECK-RV64VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1471; CHECK-RV64VC-NEXT: c.ntl.all1472; CHECK-RV64VC-NEXT: vluxei64.v v12, (zero), v81473; CHECK-RV64VC-NEXT: vmv.v.v v8, v121474; CHECK-RV64VC-NEXT: ret1475;1476; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v8i16_ALL:1477; CHECK-RV32VC: # %bb.0:1478; CHECK-RV32VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1479; CHECK-RV32VC-NEXT: c.ntl.all1480; CHECK-RV32VC-NEXT: vluxei32.v v10, (zero), v81481; CHECK-RV32VC-NEXT: vmv.v.v v8, v101482; CHECK-RV32VC-NEXT: ret1483 %x = call <8 x i16> @llvm.vp.gather.v8i16.v8p0(<8 x ptr> %ptrs, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !41484 ret <8 x i16> %x1485}1486 1487define <8 x i16> @test_nontemporal_vp_gather_v8i16_DEFAULT(<8 x ptr> %ptrs, i32 zeroext %vl) {1488; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v8i16_DEFAULT:1489; CHECK-RV64V: # %bb.0:1490; CHECK-RV64V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1491; CHECK-RV64V-NEXT: ntl.all1492; CHECK-RV64V-NEXT: vluxei64.v v12, (zero), v81493; CHECK-RV64V-NEXT: vmv.v.v v8, v121494; CHECK-RV64V-NEXT: ret1495;1496; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v8i16_DEFAULT:1497; CHECK-RV32V: # %bb.0:1498; CHECK-RV32V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1499; CHECK-RV32V-NEXT: ntl.all1500; CHECK-RV32V-NEXT: vluxei32.v v10, (zero), v81501; CHECK-RV32V-NEXT: vmv.v.v v8, v101502; CHECK-RV32V-NEXT: ret1503;1504; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v8i16_DEFAULT:1505; CHECK-RV64VC: # %bb.0:1506; CHECK-RV64VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1507; CHECK-RV64VC-NEXT: c.ntl.all1508; CHECK-RV64VC-NEXT: vluxei64.v v12, (zero), v81509; CHECK-RV64VC-NEXT: vmv.v.v v8, v121510; CHECK-RV64VC-NEXT: ret1511;1512; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v8i16_DEFAULT:1513; CHECK-RV32VC: # %bb.0:1514; CHECK-RV32VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1515; CHECK-RV32VC-NEXT: c.ntl.all1516; CHECK-RV32VC-NEXT: vluxei32.v v10, (zero), v81517; CHECK-RV32VC-NEXT: vmv.v.v v8, v101518; CHECK-RV32VC-NEXT: ret1519 %x = call <8 x i16> @llvm.vp.gather.v8i16.v8p0(<8 x ptr> %ptrs, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !01520 ret <8 x i16> %x1521}1522 1523 1524define void @test_nontemporal_vp_scatter_v8i16_P1(<8 x i16> %val, <8 x ptr> %ptrs, i32 zeroext %vl) {1525; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v8i16_P1:1526; CHECK-RV64V: # %bb.0:1527; CHECK-RV64V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1528; CHECK-RV64V-NEXT: ntl.p11529; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v121530; CHECK-RV64V-NEXT: ret1531;1532; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v8i16_P1:1533; CHECK-RV32V: # %bb.0:1534; CHECK-RV32V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1535; CHECK-RV32V-NEXT: ntl.p11536; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v101537; CHECK-RV32V-NEXT: ret1538;1539; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v8i16_P1:1540; CHECK-RV64VC: # %bb.0:1541; CHECK-RV64VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1542; CHECK-RV64VC-NEXT: c.ntl.p11543; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v121544; CHECK-RV64VC-NEXT: ret1545;1546; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v8i16_P1:1547; CHECK-RV32VC: # %bb.0:1548; CHECK-RV32VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1549; CHECK-RV32VC-NEXT: c.ntl.p11550; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v101551; CHECK-RV32VC-NEXT: ret1552 call void @llvm.vp.scatter.v8i16.v8p0(<8 x i16> %val, <8 x ptr> %ptrs, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !11553 ret void1554}1555 1556 1557define void @test_nontemporal_vp_scatter_v8i16_PALL(<8 x i16> %val, <8 x ptr> %ptrs, i32 zeroext %vl) {1558; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v8i16_PALL:1559; CHECK-RV64V: # %bb.0:1560; CHECK-RV64V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1561; CHECK-RV64V-NEXT: ntl.pall1562; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v121563; CHECK-RV64V-NEXT: ret1564;1565; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v8i16_PALL:1566; CHECK-RV32V: # %bb.0:1567; CHECK-RV32V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1568; CHECK-RV32V-NEXT: ntl.pall1569; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v101570; CHECK-RV32V-NEXT: ret1571;1572; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v8i16_PALL:1573; CHECK-RV64VC: # %bb.0:1574; CHECK-RV64VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1575; CHECK-RV64VC-NEXT: c.ntl.pall1576; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v121577; CHECK-RV64VC-NEXT: ret1578;1579; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v8i16_PALL:1580; CHECK-RV32VC: # %bb.0:1581; CHECK-RV32VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1582; CHECK-RV32VC-NEXT: c.ntl.pall1583; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v101584; CHECK-RV32VC-NEXT: ret1585 call void @llvm.vp.scatter.v8i16.v8p0(<8 x i16> %val, <8 x ptr> %ptrs, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !21586 ret void1587}1588 1589 1590define void @test_nontemporal_vp_scatter_v8i16_S1(<8 x i16> %val, <8 x ptr> %ptrs, i32 zeroext %vl) {1591; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v8i16_S1:1592; CHECK-RV64V: # %bb.0:1593; CHECK-RV64V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1594; CHECK-RV64V-NEXT: ntl.s11595; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v121596; CHECK-RV64V-NEXT: ret1597;1598; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v8i16_S1:1599; CHECK-RV32V: # %bb.0:1600; CHECK-RV32V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1601; CHECK-RV32V-NEXT: ntl.s11602; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v101603; CHECK-RV32V-NEXT: ret1604;1605; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v8i16_S1:1606; CHECK-RV64VC: # %bb.0:1607; CHECK-RV64VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1608; CHECK-RV64VC-NEXT: c.ntl.s11609; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v121610; CHECK-RV64VC-NEXT: ret1611;1612; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v8i16_S1:1613; CHECK-RV32VC: # %bb.0:1614; CHECK-RV32VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1615; CHECK-RV32VC-NEXT: c.ntl.s11616; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v101617; CHECK-RV32VC-NEXT: ret1618 call void @llvm.vp.scatter.v8i16.v8p0(<8 x i16> %val, <8 x ptr> %ptrs, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !31619 ret void1620}1621 1622 1623define void @test_nontemporal_vp_scatter_v8i16_ALL(<8 x i16> %val, <8 x ptr> %ptrs, i32 zeroext %vl) {1624; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v8i16_ALL:1625; CHECK-RV64V: # %bb.0:1626; CHECK-RV64V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1627; CHECK-RV64V-NEXT: ntl.all1628; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v121629; CHECK-RV64V-NEXT: ret1630;1631; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v8i16_ALL:1632; CHECK-RV32V: # %bb.0:1633; CHECK-RV32V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1634; CHECK-RV32V-NEXT: ntl.all1635; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v101636; CHECK-RV32V-NEXT: ret1637;1638; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v8i16_ALL:1639; CHECK-RV64VC: # %bb.0:1640; CHECK-RV64VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1641; CHECK-RV64VC-NEXT: c.ntl.all1642; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v121643; CHECK-RV64VC-NEXT: ret1644;1645; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v8i16_ALL:1646; CHECK-RV32VC: # %bb.0:1647; CHECK-RV32VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1648; CHECK-RV32VC-NEXT: c.ntl.all1649; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v101650; CHECK-RV32VC-NEXT: ret1651 call void @llvm.vp.scatter.v8i16.v8p0(<8 x i16> %val, <8 x ptr> %ptrs, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !41652 ret void1653}1654 1655define void @test_nontemporal_vp_scatter_v8i16_DEFAULT(<8 x i16> %val, <8 x ptr> %ptrs, i32 zeroext %vl) {1656; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v8i16_DEFAULT:1657; CHECK-RV64V: # %bb.0:1658; CHECK-RV64V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1659; CHECK-RV64V-NEXT: ntl.all1660; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v121661; CHECK-RV64V-NEXT: ret1662;1663; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v8i16_DEFAULT:1664; CHECK-RV32V: # %bb.0:1665; CHECK-RV32V-NEXT: vsetvli zero, a0, e16, m1, ta, ma1666; CHECK-RV32V-NEXT: ntl.all1667; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v101668; CHECK-RV32V-NEXT: ret1669;1670; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v8i16_DEFAULT:1671; CHECK-RV64VC: # %bb.0:1672; CHECK-RV64VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1673; CHECK-RV64VC-NEXT: c.ntl.all1674; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v121675; CHECK-RV64VC-NEXT: ret1676;1677; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v8i16_DEFAULT:1678; CHECK-RV32VC: # %bb.0:1679; CHECK-RV32VC-NEXT: vsetvli zero, a0, e16, m1, ta, ma1680; CHECK-RV32VC-NEXT: c.ntl.all1681; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v101682; CHECK-RV32VC-NEXT: ret1683 call void @llvm.vp.scatter.v8i16.v8p0(<8 x i16> %val, <8 x ptr> %ptrs, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !01684 ret void1685}1686 1687 1688define <8 x i16> @test_nontemporal_vp_strided.load_v8i16_P1(ptr %p, i64 %stride, i32 zeroext %vl) {1689; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v8i16_P1:1690; CHECK-RV64V: # %bb.0:1691; CHECK-RV64V-NEXT: vsetvli zero, a2, e16, m1, ta, ma1692; CHECK-RV64V-NEXT: ntl.p11693; CHECK-RV64V-NEXT: vlse16.v v8, (a0), a11694; CHECK-RV64V-NEXT: ret1695;1696; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v8i16_P1:1697; CHECK-RV32V: # %bb.0:1698; CHECK-RV32V-NEXT: vsetvli zero, a3, e16, m1, ta, ma1699; CHECK-RV32V-NEXT: ntl.p11700; CHECK-RV32V-NEXT: vlse16.v v8, (a0), a11701; CHECK-RV32V-NEXT: ret1702;1703; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v8i16_P1:1704; CHECK-RV64VC: # %bb.0:1705; CHECK-RV64VC-NEXT: vsetvli zero, a2, e16, m1, ta, ma1706; CHECK-RV64VC-NEXT: c.ntl.p11707; CHECK-RV64VC-NEXT: vlse16.v v8, (a0), a11708; CHECK-RV64VC-NEXT: ret1709;1710; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v8i16_P1:1711; CHECK-RV32VC: # %bb.0:1712; CHECK-RV32VC-NEXT: vsetvli zero, a3, e16, m1, ta, ma1713; CHECK-RV32VC-NEXT: c.ntl.p11714; CHECK-RV32VC-NEXT: vlse16.v v8, (a0), a11715; CHECK-RV32VC-NEXT: ret1716 %x = call <8 x i16> @llvm.experimental.vp.strided.load.v8i16.i64(ptr %p, i64 %stride, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !11717 ret <8 x i16> %x1718}1719 1720 1721define <8 x i16> @test_nontemporal_vp_strided.load_v8i16_PALL(ptr %p, i64 %stride, i32 zeroext %vl) {1722; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v8i16_PALL:1723; CHECK-RV64V: # %bb.0:1724; CHECK-RV64V-NEXT: vsetvli zero, a2, e16, m1, ta, ma1725; CHECK-RV64V-NEXT: ntl.pall1726; CHECK-RV64V-NEXT: vlse16.v v8, (a0), a11727; CHECK-RV64V-NEXT: ret1728;1729; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v8i16_PALL:1730; CHECK-RV32V: # %bb.0:1731; CHECK-RV32V-NEXT: vsetvli zero, a3, e16, m1, ta, ma1732; CHECK-RV32V-NEXT: ntl.pall1733; CHECK-RV32V-NEXT: vlse16.v v8, (a0), a11734; CHECK-RV32V-NEXT: ret1735;1736; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v8i16_PALL:1737; CHECK-RV64VC: # %bb.0:1738; CHECK-RV64VC-NEXT: vsetvli zero, a2, e16, m1, ta, ma1739; CHECK-RV64VC-NEXT: c.ntl.pall1740; CHECK-RV64VC-NEXT: vlse16.v v8, (a0), a11741; CHECK-RV64VC-NEXT: ret1742;1743; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v8i16_PALL:1744; CHECK-RV32VC: # %bb.0:1745; CHECK-RV32VC-NEXT: vsetvli zero, a3, e16, m1, ta, ma1746; CHECK-RV32VC-NEXT: c.ntl.pall1747; CHECK-RV32VC-NEXT: vlse16.v v8, (a0), a11748; CHECK-RV32VC-NEXT: ret1749 %x = call <8 x i16> @llvm.experimental.vp.strided.load.v8i16.i64(ptr %p, i64 %stride, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !21750 ret <8 x i16> %x1751}1752 1753 1754define <8 x i16> @test_nontemporal_vp_strided.load_v8i16_S1(ptr %p, i64 %stride, i32 zeroext %vl) {1755; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v8i16_S1:1756; CHECK-RV64V: # %bb.0:1757; CHECK-RV64V-NEXT: vsetvli zero, a2, e16, m1, ta, ma1758; CHECK-RV64V-NEXT: ntl.s11759; CHECK-RV64V-NEXT: vlse16.v v8, (a0), a11760; CHECK-RV64V-NEXT: ret1761;1762; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v8i16_S1:1763; CHECK-RV32V: # %bb.0:1764; CHECK-RV32V-NEXT: vsetvli zero, a3, e16, m1, ta, ma1765; CHECK-RV32V-NEXT: ntl.s11766; CHECK-RV32V-NEXT: vlse16.v v8, (a0), a11767; CHECK-RV32V-NEXT: ret1768;1769; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v8i16_S1:1770; CHECK-RV64VC: # %bb.0:1771; CHECK-RV64VC-NEXT: vsetvli zero, a2, e16, m1, ta, ma1772; CHECK-RV64VC-NEXT: c.ntl.s11773; CHECK-RV64VC-NEXT: vlse16.v v8, (a0), a11774; CHECK-RV64VC-NEXT: ret1775;1776; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v8i16_S1:1777; CHECK-RV32VC: # %bb.0:1778; CHECK-RV32VC-NEXT: vsetvli zero, a3, e16, m1, ta, ma1779; CHECK-RV32VC-NEXT: c.ntl.s11780; CHECK-RV32VC-NEXT: vlse16.v v8, (a0), a11781; CHECK-RV32VC-NEXT: ret1782 %x = call <8 x i16> @llvm.experimental.vp.strided.load.v8i16.i64(ptr %p, i64 %stride, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !31783 ret <8 x i16> %x1784}1785 1786 1787define <8 x i16> @test_nontemporal_vp_strided.load_v8i16_ALL(ptr %p, i64 %stride, i32 zeroext %vl) {1788; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v8i16_ALL:1789; CHECK-RV64V: # %bb.0:1790; CHECK-RV64V-NEXT: vsetvli zero, a2, e16, m1, ta, ma1791; CHECK-RV64V-NEXT: ntl.all1792; CHECK-RV64V-NEXT: vlse16.v v8, (a0), a11793; CHECK-RV64V-NEXT: ret1794;1795; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v8i16_ALL:1796; CHECK-RV32V: # %bb.0:1797; CHECK-RV32V-NEXT: vsetvli zero, a3, e16, m1, ta, ma1798; CHECK-RV32V-NEXT: ntl.all1799; CHECK-RV32V-NEXT: vlse16.v v8, (a0), a11800; CHECK-RV32V-NEXT: ret1801;1802; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v8i16_ALL:1803; CHECK-RV64VC: # %bb.0:1804; CHECK-RV64VC-NEXT: vsetvli zero, a2, e16, m1, ta, ma1805; CHECK-RV64VC-NEXT: c.ntl.all1806; CHECK-RV64VC-NEXT: vlse16.v v8, (a0), a11807; CHECK-RV64VC-NEXT: ret1808;1809; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v8i16_ALL:1810; CHECK-RV32VC: # %bb.0:1811; CHECK-RV32VC-NEXT: vsetvli zero, a3, e16, m1, ta, ma1812; CHECK-RV32VC-NEXT: c.ntl.all1813; CHECK-RV32VC-NEXT: vlse16.v v8, (a0), a11814; CHECK-RV32VC-NEXT: ret1815 %x = call <8 x i16> @llvm.experimental.vp.strided.load.v8i16.i64(ptr %p, i64 %stride, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !41816 ret <8 x i16> %x1817}1818 1819define <8 x i16> @test_nontemporal_vp_strided.load_v8i16_DEFAULT(ptr %p, i64 %stride, i32 zeroext %vl) {1820; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v8i16_DEFAULT:1821; CHECK-RV64V: # %bb.0:1822; CHECK-RV64V-NEXT: vsetvli zero, a2, e16, m1, ta, ma1823; CHECK-RV64V-NEXT: ntl.all1824; CHECK-RV64V-NEXT: vlse16.v v8, (a0), a11825; CHECK-RV64V-NEXT: ret1826;1827; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v8i16_DEFAULT:1828; CHECK-RV32V: # %bb.0:1829; CHECK-RV32V-NEXT: vsetvli zero, a3, e16, m1, ta, ma1830; CHECK-RV32V-NEXT: ntl.all1831; CHECK-RV32V-NEXT: vlse16.v v8, (a0), a11832; CHECK-RV32V-NEXT: ret1833;1834; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v8i16_DEFAULT:1835; CHECK-RV64VC: # %bb.0:1836; CHECK-RV64VC-NEXT: vsetvli zero, a2, e16, m1, ta, ma1837; CHECK-RV64VC-NEXT: c.ntl.all1838; CHECK-RV64VC-NEXT: vlse16.v v8, (a0), a11839; CHECK-RV64VC-NEXT: ret1840;1841; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v8i16_DEFAULT:1842; CHECK-RV32VC: # %bb.0:1843; CHECK-RV32VC-NEXT: vsetvli zero, a3, e16, m1, ta, ma1844; CHECK-RV32VC-NEXT: c.ntl.all1845; CHECK-RV32VC-NEXT: vlse16.v v8, (a0), a11846; CHECK-RV32VC-NEXT: ret1847 %x = call <8 x i16> @llvm.experimental.vp.strided.load.v8i16.i64(ptr %p, i64 %stride, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !01848 ret <8 x i16> %x1849}1850 1851 1852define void @test_nontemporal_vp_strided.store_v8i16_P1(<8 x i16> %val, ptr %p, i64 %stride, i32 zeroext %vl) {1853; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v8i16_P1:1854; CHECK-RV64V: # %bb.0:1855; CHECK-RV64V-NEXT: vsetvli zero, a2, e16, m1, ta, ma1856; CHECK-RV64V-NEXT: ntl.p11857; CHECK-RV64V-NEXT: vsse16.v v8, (a0), a11858; CHECK-RV64V-NEXT: ret1859;1860; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v8i16_P1:1861; CHECK-RV32V: # %bb.0:1862; CHECK-RV32V-NEXT: vsetvli zero, a3, e16, m1, ta, ma1863; CHECK-RV32V-NEXT: ntl.p11864; CHECK-RV32V-NEXT: vsse16.v v8, (a0), a11865; CHECK-RV32V-NEXT: ret1866;1867; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v8i16_P1:1868; CHECK-RV64VC: # %bb.0:1869; CHECK-RV64VC-NEXT: vsetvli zero, a2, e16, m1, ta, ma1870; CHECK-RV64VC-NEXT: c.ntl.p11871; CHECK-RV64VC-NEXT: vsse16.v v8, (a0), a11872; CHECK-RV64VC-NEXT: ret1873;1874; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v8i16_P1:1875; CHECK-RV32VC: # %bb.0:1876; CHECK-RV32VC-NEXT: vsetvli zero, a3, e16, m1, ta, ma1877; CHECK-RV32VC-NEXT: c.ntl.p11878; CHECK-RV32VC-NEXT: vsse16.v v8, (a0), a11879; CHECK-RV32VC-NEXT: ret1880 call void @llvm.experimental.vp.strided.store.v8i16.i64(<8 x i16> %val, ptr %p, i64 %stride, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !11881 ret void1882}1883 1884 1885define void @test_nontemporal_vp_strided.store_v8i16_PALL(<8 x i16> %val, ptr %p, i64 %stride, i32 zeroext %vl) {1886; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v8i16_PALL:1887; CHECK-RV64V: # %bb.0:1888; CHECK-RV64V-NEXT: vsetvli zero, a2, e16, m1, ta, ma1889; CHECK-RV64V-NEXT: ntl.pall1890; CHECK-RV64V-NEXT: vsse16.v v8, (a0), a11891; CHECK-RV64V-NEXT: ret1892;1893; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v8i16_PALL:1894; CHECK-RV32V: # %bb.0:1895; CHECK-RV32V-NEXT: vsetvli zero, a3, e16, m1, ta, ma1896; CHECK-RV32V-NEXT: ntl.pall1897; CHECK-RV32V-NEXT: vsse16.v v8, (a0), a11898; CHECK-RV32V-NEXT: ret1899;1900; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v8i16_PALL:1901; CHECK-RV64VC: # %bb.0:1902; CHECK-RV64VC-NEXT: vsetvli zero, a2, e16, m1, ta, ma1903; CHECK-RV64VC-NEXT: c.ntl.pall1904; CHECK-RV64VC-NEXT: vsse16.v v8, (a0), a11905; CHECK-RV64VC-NEXT: ret1906;1907; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v8i16_PALL:1908; CHECK-RV32VC: # %bb.0:1909; CHECK-RV32VC-NEXT: vsetvli zero, a3, e16, m1, ta, ma1910; CHECK-RV32VC-NEXT: c.ntl.pall1911; CHECK-RV32VC-NEXT: vsse16.v v8, (a0), a11912; CHECK-RV32VC-NEXT: ret1913 call void @llvm.experimental.vp.strided.store.v8i16.i64(<8 x i16> %val, ptr %p, i64 %stride, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !21914 ret void1915}1916 1917 1918define void @test_nontemporal_vp_strided.store_v8i16_S1(<8 x i16> %val, ptr %p, i64 %stride, i32 zeroext %vl) {1919; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v8i16_S1:1920; CHECK-RV64V: # %bb.0:1921; CHECK-RV64V-NEXT: vsetvli zero, a2, e16, m1, ta, ma1922; CHECK-RV64V-NEXT: ntl.s11923; CHECK-RV64V-NEXT: vsse16.v v8, (a0), a11924; CHECK-RV64V-NEXT: ret1925;1926; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v8i16_S1:1927; CHECK-RV32V: # %bb.0:1928; CHECK-RV32V-NEXT: vsetvli zero, a3, e16, m1, ta, ma1929; CHECK-RV32V-NEXT: ntl.s11930; CHECK-RV32V-NEXT: vsse16.v v8, (a0), a11931; CHECK-RV32V-NEXT: ret1932;1933; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v8i16_S1:1934; CHECK-RV64VC: # %bb.0:1935; CHECK-RV64VC-NEXT: vsetvli zero, a2, e16, m1, ta, ma1936; CHECK-RV64VC-NEXT: c.ntl.s11937; CHECK-RV64VC-NEXT: vsse16.v v8, (a0), a11938; CHECK-RV64VC-NEXT: ret1939;1940; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v8i16_S1:1941; CHECK-RV32VC: # %bb.0:1942; CHECK-RV32VC-NEXT: vsetvli zero, a3, e16, m1, ta, ma1943; CHECK-RV32VC-NEXT: c.ntl.s11944; CHECK-RV32VC-NEXT: vsse16.v v8, (a0), a11945; CHECK-RV32VC-NEXT: ret1946 call void @llvm.experimental.vp.strided.store.v8i16.i64(<8 x i16> %val, ptr %p, i64 %stride, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !31947 ret void1948}1949 1950 1951define void @test_nontemporal_vp_strided.store_v8i16_ALL(<8 x i16> %val, ptr %p, i64 %stride, i32 zeroext %vl) {1952; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v8i16_ALL:1953; CHECK-RV64V: # %bb.0:1954; CHECK-RV64V-NEXT: vsetvli zero, a2, e16, m1, ta, ma1955; CHECK-RV64V-NEXT: ntl.all1956; CHECK-RV64V-NEXT: vsse16.v v8, (a0), a11957; CHECK-RV64V-NEXT: ret1958;1959; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v8i16_ALL:1960; CHECK-RV32V: # %bb.0:1961; CHECK-RV32V-NEXT: vsetvli zero, a3, e16, m1, ta, ma1962; CHECK-RV32V-NEXT: ntl.all1963; CHECK-RV32V-NEXT: vsse16.v v8, (a0), a11964; CHECK-RV32V-NEXT: ret1965;1966; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v8i16_ALL:1967; CHECK-RV64VC: # %bb.0:1968; CHECK-RV64VC-NEXT: vsetvli zero, a2, e16, m1, ta, ma1969; CHECK-RV64VC-NEXT: c.ntl.all1970; CHECK-RV64VC-NEXT: vsse16.v v8, (a0), a11971; CHECK-RV64VC-NEXT: ret1972;1973; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v8i16_ALL:1974; CHECK-RV32VC: # %bb.0:1975; CHECK-RV32VC-NEXT: vsetvli zero, a3, e16, m1, ta, ma1976; CHECK-RV32VC-NEXT: c.ntl.all1977; CHECK-RV32VC-NEXT: vsse16.v v8, (a0), a11978; CHECK-RV32VC-NEXT: ret1979 call void @llvm.experimental.vp.strided.store.v8i16.i64(<8 x i16> %val, ptr %p, i64 %stride, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !41980 ret void1981}1982 1983define void @test_nontemporal_vp_strided.store_v8i16_DEFAULT(<8 x i16> %val, ptr %p, i64 %stride, i32 zeroext %vl) {1984; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v8i16_DEFAULT:1985; CHECK-RV64V: # %bb.0:1986; CHECK-RV64V-NEXT: vsetvli zero, a2, e16, m1, ta, ma1987; CHECK-RV64V-NEXT: ntl.all1988; CHECK-RV64V-NEXT: vsse16.v v8, (a0), a11989; CHECK-RV64V-NEXT: ret1990;1991; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v8i16_DEFAULT:1992; CHECK-RV32V: # %bb.0:1993; CHECK-RV32V-NEXT: vsetvli zero, a3, e16, m1, ta, ma1994; CHECK-RV32V-NEXT: ntl.all1995; CHECK-RV32V-NEXT: vsse16.v v8, (a0), a11996; CHECK-RV32V-NEXT: ret1997;1998; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v8i16_DEFAULT:1999; CHECK-RV64VC: # %bb.0:2000; CHECK-RV64VC-NEXT: vsetvli zero, a2, e16, m1, ta, ma2001; CHECK-RV64VC-NEXT: c.ntl.all2002; CHECK-RV64VC-NEXT: vsse16.v v8, (a0), a12003; CHECK-RV64VC-NEXT: ret2004;2005; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v8i16_DEFAULT:2006; CHECK-RV32VC: # %bb.0:2007; CHECK-RV32VC-NEXT: vsetvli zero, a3, e16, m1, ta, ma2008; CHECK-RV32VC-NEXT: c.ntl.all2009; CHECK-RV32VC-NEXT: vsse16.v v8, (a0), a12010; CHECK-RV32VC-NEXT: ret2011 call void @llvm.experimental.vp.strided.store.v8i16.i64(<8 x i16> %val, ptr %p, i64 %stride, <8 x i1> splat(i1 true), i32 %vl), !nontemporal !02012 ret void2013}2014 2015 2016define <4 x i32> @test_nontemporal_vp_load_v4i32_P1(ptr %p, i32 zeroext %vl) {2017; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v4i32_P1:2018; CHECK-RV64V: # %bb.0:2019; CHECK-RV64V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2020; CHECK-RV64V-NEXT: ntl.p12021; CHECK-RV64V-NEXT: vle32.v v8, (a0)2022; CHECK-RV64V-NEXT: ret2023;2024; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v4i32_P1:2025; CHECK-RV32V: # %bb.0:2026; CHECK-RV32V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2027; CHECK-RV32V-NEXT: ntl.p12028; CHECK-RV32V-NEXT: vle32.v v8, (a0)2029; CHECK-RV32V-NEXT: ret2030;2031; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v4i32_P1:2032; CHECK-RV64VC: # %bb.0:2033; CHECK-RV64VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2034; CHECK-RV64VC-NEXT: c.ntl.p12035; CHECK-RV64VC-NEXT: vle32.v v8, (a0)2036; CHECK-RV64VC-NEXT: ret2037;2038; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v4i32_P1:2039; CHECK-RV32VC: # %bb.0:2040; CHECK-RV32VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2041; CHECK-RV32VC-NEXT: c.ntl.p12042; CHECK-RV32VC-NEXT: vle32.v v8, (a0)2043; CHECK-RV32VC-NEXT: ret2044 %x = call <4 x i32> @llvm.vp.load.v4i32.p0(ptr %p, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !12045 ret <4 x i32> %x2046}2047 2048 2049define <4 x i32> @test_nontemporal_vp_load_v4i32_PALL(ptr %p, i32 zeroext %vl) {2050; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v4i32_PALL:2051; CHECK-RV64V: # %bb.0:2052; CHECK-RV64V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2053; CHECK-RV64V-NEXT: ntl.pall2054; CHECK-RV64V-NEXT: vle32.v v8, (a0)2055; CHECK-RV64V-NEXT: ret2056;2057; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v4i32_PALL:2058; CHECK-RV32V: # %bb.0:2059; CHECK-RV32V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2060; CHECK-RV32V-NEXT: ntl.pall2061; CHECK-RV32V-NEXT: vle32.v v8, (a0)2062; CHECK-RV32V-NEXT: ret2063;2064; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v4i32_PALL:2065; CHECK-RV64VC: # %bb.0:2066; CHECK-RV64VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2067; CHECK-RV64VC-NEXT: c.ntl.pall2068; CHECK-RV64VC-NEXT: vle32.v v8, (a0)2069; CHECK-RV64VC-NEXT: ret2070;2071; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v4i32_PALL:2072; CHECK-RV32VC: # %bb.0:2073; CHECK-RV32VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2074; CHECK-RV32VC-NEXT: c.ntl.pall2075; CHECK-RV32VC-NEXT: vle32.v v8, (a0)2076; CHECK-RV32VC-NEXT: ret2077 %x = call <4 x i32> @llvm.vp.load.v4i32.p0(ptr %p, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !22078 ret <4 x i32> %x2079}2080 2081 2082define <4 x i32> @test_nontemporal_vp_load_v4i32_S1(ptr %p, i32 zeroext %vl) {2083; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v4i32_S1:2084; CHECK-RV64V: # %bb.0:2085; CHECK-RV64V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2086; CHECK-RV64V-NEXT: ntl.s12087; CHECK-RV64V-NEXT: vle32.v v8, (a0)2088; CHECK-RV64V-NEXT: ret2089;2090; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v4i32_S1:2091; CHECK-RV32V: # %bb.0:2092; CHECK-RV32V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2093; CHECK-RV32V-NEXT: ntl.s12094; CHECK-RV32V-NEXT: vle32.v v8, (a0)2095; CHECK-RV32V-NEXT: ret2096;2097; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v4i32_S1:2098; CHECK-RV64VC: # %bb.0:2099; CHECK-RV64VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2100; CHECK-RV64VC-NEXT: c.ntl.s12101; CHECK-RV64VC-NEXT: vle32.v v8, (a0)2102; CHECK-RV64VC-NEXT: ret2103;2104; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v4i32_S1:2105; CHECK-RV32VC: # %bb.0:2106; CHECK-RV32VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2107; CHECK-RV32VC-NEXT: c.ntl.s12108; CHECK-RV32VC-NEXT: vle32.v v8, (a0)2109; CHECK-RV32VC-NEXT: ret2110 %x = call <4 x i32> @llvm.vp.load.v4i32.p0(ptr %p, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !32111 ret <4 x i32> %x2112}2113 2114 2115define <4 x i32> @test_nontemporal_vp_load_v4i32_ALL(ptr %p, i32 zeroext %vl) {2116; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v4i32_ALL:2117; CHECK-RV64V: # %bb.0:2118; CHECK-RV64V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2119; CHECK-RV64V-NEXT: ntl.all2120; CHECK-RV64V-NEXT: vle32.v v8, (a0)2121; CHECK-RV64V-NEXT: ret2122;2123; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v4i32_ALL:2124; CHECK-RV32V: # %bb.0:2125; CHECK-RV32V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2126; CHECK-RV32V-NEXT: ntl.all2127; CHECK-RV32V-NEXT: vle32.v v8, (a0)2128; CHECK-RV32V-NEXT: ret2129;2130; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v4i32_ALL:2131; CHECK-RV64VC: # %bb.0:2132; CHECK-RV64VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2133; CHECK-RV64VC-NEXT: c.ntl.all2134; CHECK-RV64VC-NEXT: vle32.v v8, (a0)2135; CHECK-RV64VC-NEXT: ret2136;2137; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v4i32_ALL:2138; CHECK-RV32VC: # %bb.0:2139; CHECK-RV32VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2140; CHECK-RV32VC-NEXT: c.ntl.all2141; CHECK-RV32VC-NEXT: vle32.v v8, (a0)2142; CHECK-RV32VC-NEXT: ret2143 %x = call <4 x i32> @llvm.vp.load.v4i32.p0(ptr %p, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !42144 ret <4 x i32> %x2145}2146 2147define <4 x i32> @test_nontemporal_vp_load_v4i32_DEFAULT(ptr %p, i32 zeroext %vl) {2148; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v4i32_DEFAULT:2149; CHECK-RV64V: # %bb.0:2150; CHECK-RV64V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2151; CHECK-RV64V-NEXT: ntl.all2152; CHECK-RV64V-NEXT: vle32.v v8, (a0)2153; CHECK-RV64V-NEXT: ret2154;2155; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v4i32_DEFAULT:2156; CHECK-RV32V: # %bb.0:2157; CHECK-RV32V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2158; CHECK-RV32V-NEXT: ntl.all2159; CHECK-RV32V-NEXT: vle32.v v8, (a0)2160; CHECK-RV32V-NEXT: ret2161;2162; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v4i32_DEFAULT:2163; CHECK-RV64VC: # %bb.0:2164; CHECK-RV64VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2165; CHECK-RV64VC-NEXT: c.ntl.all2166; CHECK-RV64VC-NEXT: vle32.v v8, (a0)2167; CHECK-RV64VC-NEXT: ret2168;2169; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v4i32_DEFAULT:2170; CHECK-RV32VC: # %bb.0:2171; CHECK-RV32VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2172; CHECK-RV32VC-NEXT: c.ntl.all2173; CHECK-RV32VC-NEXT: vle32.v v8, (a0)2174; CHECK-RV32VC-NEXT: ret2175 %x = call <4 x i32> @llvm.vp.load.v4i32.p0(ptr %p, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !02176 ret <4 x i32> %x2177}2178 2179 2180define void @test_nontemporal_vp_store_v4i32_P1(<4 x i32> %val, ptr %p, i32 zeroext %vl) {2181; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v4i32_P1:2182; CHECK-RV64V: # %bb.0:2183; CHECK-RV64V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2184; CHECK-RV64V-NEXT: ntl.p12185; CHECK-RV64V-NEXT: vse32.v v8, (a0)2186; CHECK-RV64V-NEXT: ret2187;2188; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v4i32_P1:2189; CHECK-RV32V: # %bb.0:2190; CHECK-RV32V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2191; CHECK-RV32V-NEXT: ntl.p12192; CHECK-RV32V-NEXT: vse32.v v8, (a0)2193; CHECK-RV32V-NEXT: ret2194;2195; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v4i32_P1:2196; CHECK-RV64VC: # %bb.0:2197; CHECK-RV64VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2198; CHECK-RV64VC-NEXT: c.ntl.p12199; CHECK-RV64VC-NEXT: vse32.v v8, (a0)2200; CHECK-RV64VC-NEXT: ret2201;2202; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v4i32_P1:2203; CHECK-RV32VC: # %bb.0:2204; CHECK-RV32VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2205; CHECK-RV32VC-NEXT: c.ntl.p12206; CHECK-RV32VC-NEXT: vse32.v v8, (a0)2207; CHECK-RV32VC-NEXT: ret2208 call void @llvm.vp.store.v4i32.p0(<4 x i32> %val, ptr %p, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !12209 ret void2210}2211 2212 2213define void @test_nontemporal_vp_store_v4i32_PALL(<4 x i32> %val, ptr %p, i32 zeroext %vl) {2214; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v4i32_PALL:2215; CHECK-RV64V: # %bb.0:2216; CHECK-RV64V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2217; CHECK-RV64V-NEXT: ntl.pall2218; CHECK-RV64V-NEXT: vse32.v v8, (a0)2219; CHECK-RV64V-NEXT: ret2220;2221; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v4i32_PALL:2222; CHECK-RV32V: # %bb.0:2223; CHECK-RV32V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2224; CHECK-RV32V-NEXT: ntl.pall2225; CHECK-RV32V-NEXT: vse32.v v8, (a0)2226; CHECK-RV32V-NEXT: ret2227;2228; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v4i32_PALL:2229; CHECK-RV64VC: # %bb.0:2230; CHECK-RV64VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2231; CHECK-RV64VC-NEXT: c.ntl.pall2232; CHECK-RV64VC-NEXT: vse32.v v8, (a0)2233; CHECK-RV64VC-NEXT: ret2234;2235; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v4i32_PALL:2236; CHECK-RV32VC: # %bb.0:2237; CHECK-RV32VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2238; CHECK-RV32VC-NEXT: c.ntl.pall2239; CHECK-RV32VC-NEXT: vse32.v v8, (a0)2240; CHECK-RV32VC-NEXT: ret2241 call void @llvm.vp.store.v4i32.p0(<4 x i32> %val, ptr %p, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !22242 ret void2243}2244 2245 2246define void @test_nontemporal_vp_store_v4i32_S1(<4 x i32> %val, ptr %p, i32 zeroext %vl) {2247; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v4i32_S1:2248; CHECK-RV64V: # %bb.0:2249; CHECK-RV64V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2250; CHECK-RV64V-NEXT: ntl.s12251; CHECK-RV64V-NEXT: vse32.v v8, (a0)2252; CHECK-RV64V-NEXT: ret2253;2254; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v4i32_S1:2255; CHECK-RV32V: # %bb.0:2256; CHECK-RV32V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2257; CHECK-RV32V-NEXT: ntl.s12258; CHECK-RV32V-NEXT: vse32.v v8, (a0)2259; CHECK-RV32V-NEXT: ret2260;2261; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v4i32_S1:2262; CHECK-RV64VC: # %bb.0:2263; CHECK-RV64VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2264; CHECK-RV64VC-NEXT: c.ntl.s12265; CHECK-RV64VC-NEXT: vse32.v v8, (a0)2266; CHECK-RV64VC-NEXT: ret2267;2268; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v4i32_S1:2269; CHECK-RV32VC: # %bb.0:2270; CHECK-RV32VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2271; CHECK-RV32VC-NEXT: c.ntl.s12272; CHECK-RV32VC-NEXT: vse32.v v8, (a0)2273; CHECK-RV32VC-NEXT: ret2274 call void @llvm.vp.store.v4i32.p0(<4 x i32> %val, ptr %p, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !32275 ret void2276}2277 2278 2279define void @test_nontemporal_vp_store_v4i32_ALL(<4 x i32> %val, ptr %p, i32 zeroext %vl) {2280; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v4i32_ALL:2281; CHECK-RV64V: # %bb.0:2282; CHECK-RV64V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2283; CHECK-RV64V-NEXT: ntl.all2284; CHECK-RV64V-NEXT: vse32.v v8, (a0)2285; CHECK-RV64V-NEXT: ret2286;2287; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v4i32_ALL:2288; CHECK-RV32V: # %bb.0:2289; CHECK-RV32V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2290; CHECK-RV32V-NEXT: ntl.all2291; CHECK-RV32V-NEXT: vse32.v v8, (a0)2292; CHECK-RV32V-NEXT: ret2293;2294; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v4i32_ALL:2295; CHECK-RV64VC: # %bb.0:2296; CHECK-RV64VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2297; CHECK-RV64VC-NEXT: c.ntl.all2298; CHECK-RV64VC-NEXT: vse32.v v8, (a0)2299; CHECK-RV64VC-NEXT: ret2300;2301; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v4i32_ALL:2302; CHECK-RV32VC: # %bb.0:2303; CHECK-RV32VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2304; CHECK-RV32VC-NEXT: c.ntl.all2305; CHECK-RV32VC-NEXT: vse32.v v8, (a0)2306; CHECK-RV32VC-NEXT: ret2307 call void @llvm.vp.store.v4i32.p0(<4 x i32> %val, ptr %p, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !42308 ret void2309}2310 2311define void @test_nontemporal_vp_store_v4i32_DEFAULT(<4 x i32> %val, ptr %p, i32 zeroext %vl) {2312; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v4i32_DEFAULT:2313; CHECK-RV64V: # %bb.0:2314; CHECK-RV64V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2315; CHECK-RV64V-NEXT: ntl.all2316; CHECK-RV64V-NEXT: vse32.v v8, (a0)2317; CHECK-RV64V-NEXT: ret2318;2319; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v4i32_DEFAULT:2320; CHECK-RV32V: # %bb.0:2321; CHECK-RV32V-NEXT: vsetvli zero, a1, e32, m1, ta, ma2322; CHECK-RV32V-NEXT: ntl.all2323; CHECK-RV32V-NEXT: vse32.v v8, (a0)2324; CHECK-RV32V-NEXT: ret2325;2326; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v4i32_DEFAULT:2327; CHECK-RV64VC: # %bb.0:2328; CHECK-RV64VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2329; CHECK-RV64VC-NEXT: c.ntl.all2330; CHECK-RV64VC-NEXT: vse32.v v8, (a0)2331; CHECK-RV64VC-NEXT: ret2332;2333; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v4i32_DEFAULT:2334; CHECK-RV32VC: # %bb.0:2335; CHECK-RV32VC-NEXT: vsetvli zero, a1, e32, m1, ta, ma2336; CHECK-RV32VC-NEXT: c.ntl.all2337; CHECK-RV32VC-NEXT: vse32.v v8, (a0)2338; CHECK-RV32VC-NEXT: ret2339 call void @llvm.vp.store.v4i32.p0(<4 x i32> %val, ptr %p, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !02340 ret void2341}2342 2343 2344define <4 x i32> @test_nontemporal_vp_gather_v4i32_P1(<4 x ptr> %ptrs, i32 zeroext %vl) {2345; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v4i32_P1:2346; CHECK-RV64V: # %bb.0:2347; CHECK-RV64V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2348; CHECK-RV64V-NEXT: ntl.p12349; CHECK-RV64V-NEXT: vluxei64.v v10, (zero), v82350; CHECK-RV64V-NEXT: vmv.v.v v8, v102351; CHECK-RV64V-NEXT: ret2352;2353; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v4i32_P1:2354; CHECK-RV32V: # %bb.0:2355; CHECK-RV32V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2356; CHECK-RV32V-NEXT: ntl.p12357; CHECK-RV32V-NEXT: vluxei32.v v8, (zero), v82358; CHECK-RV32V-NEXT: ret2359;2360; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v4i32_P1:2361; CHECK-RV64VC: # %bb.0:2362; CHECK-RV64VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2363; CHECK-RV64VC-NEXT: c.ntl.p12364; CHECK-RV64VC-NEXT: vluxei64.v v10, (zero), v82365; CHECK-RV64VC-NEXT: vmv.v.v v8, v102366; CHECK-RV64VC-NEXT: ret2367;2368; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v4i32_P1:2369; CHECK-RV32VC: # %bb.0:2370; CHECK-RV32VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2371; CHECK-RV32VC-NEXT: c.ntl.p12372; CHECK-RV32VC-NEXT: vluxei32.v v8, (zero), v82373; CHECK-RV32VC-NEXT: ret2374 %x = call <4 x i32> @llvm.vp.gather.v4i32.v4p0(<4 x ptr> %ptrs, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !12375 ret <4 x i32> %x2376}2377 2378 2379define <4 x i32> @test_nontemporal_vp_gather_v4i32_PALL(<4 x ptr> %ptrs, i32 zeroext %vl) {2380; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v4i32_PALL:2381; CHECK-RV64V: # %bb.0:2382; CHECK-RV64V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2383; CHECK-RV64V-NEXT: ntl.pall2384; CHECK-RV64V-NEXT: vluxei64.v v10, (zero), v82385; CHECK-RV64V-NEXT: vmv.v.v v8, v102386; CHECK-RV64V-NEXT: ret2387;2388; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v4i32_PALL:2389; CHECK-RV32V: # %bb.0:2390; CHECK-RV32V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2391; CHECK-RV32V-NEXT: ntl.pall2392; CHECK-RV32V-NEXT: vluxei32.v v8, (zero), v82393; CHECK-RV32V-NEXT: ret2394;2395; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v4i32_PALL:2396; CHECK-RV64VC: # %bb.0:2397; CHECK-RV64VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2398; CHECK-RV64VC-NEXT: c.ntl.pall2399; CHECK-RV64VC-NEXT: vluxei64.v v10, (zero), v82400; CHECK-RV64VC-NEXT: vmv.v.v v8, v102401; CHECK-RV64VC-NEXT: ret2402;2403; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v4i32_PALL:2404; CHECK-RV32VC: # %bb.0:2405; CHECK-RV32VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2406; CHECK-RV32VC-NEXT: c.ntl.pall2407; CHECK-RV32VC-NEXT: vluxei32.v v8, (zero), v82408; CHECK-RV32VC-NEXT: ret2409 %x = call <4 x i32> @llvm.vp.gather.v4i32.v4p0(<4 x ptr> %ptrs, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !22410 ret <4 x i32> %x2411}2412 2413 2414define <4 x i32> @test_nontemporal_vp_gather_v4i32_S1(<4 x ptr> %ptrs, i32 zeroext %vl) {2415; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v4i32_S1:2416; CHECK-RV64V: # %bb.0:2417; CHECK-RV64V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2418; CHECK-RV64V-NEXT: ntl.s12419; CHECK-RV64V-NEXT: vluxei64.v v10, (zero), v82420; CHECK-RV64V-NEXT: vmv.v.v v8, v102421; CHECK-RV64V-NEXT: ret2422;2423; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v4i32_S1:2424; CHECK-RV32V: # %bb.0:2425; CHECK-RV32V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2426; CHECK-RV32V-NEXT: ntl.s12427; CHECK-RV32V-NEXT: vluxei32.v v8, (zero), v82428; CHECK-RV32V-NEXT: ret2429;2430; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v4i32_S1:2431; CHECK-RV64VC: # %bb.0:2432; CHECK-RV64VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2433; CHECK-RV64VC-NEXT: c.ntl.s12434; CHECK-RV64VC-NEXT: vluxei64.v v10, (zero), v82435; CHECK-RV64VC-NEXT: vmv.v.v v8, v102436; CHECK-RV64VC-NEXT: ret2437;2438; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v4i32_S1:2439; CHECK-RV32VC: # %bb.0:2440; CHECK-RV32VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2441; CHECK-RV32VC-NEXT: c.ntl.s12442; CHECK-RV32VC-NEXT: vluxei32.v v8, (zero), v82443; CHECK-RV32VC-NEXT: ret2444 %x = call <4 x i32> @llvm.vp.gather.v4i32.v4p0(<4 x ptr> %ptrs, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !32445 ret <4 x i32> %x2446}2447 2448 2449define <4 x i32> @test_nontemporal_vp_gather_v4i32_ALL(<4 x ptr> %ptrs, i32 zeroext %vl) {2450; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v4i32_ALL:2451; CHECK-RV64V: # %bb.0:2452; CHECK-RV64V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2453; CHECK-RV64V-NEXT: ntl.all2454; CHECK-RV64V-NEXT: vluxei64.v v10, (zero), v82455; CHECK-RV64V-NEXT: vmv.v.v v8, v102456; CHECK-RV64V-NEXT: ret2457;2458; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v4i32_ALL:2459; CHECK-RV32V: # %bb.0:2460; CHECK-RV32V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2461; CHECK-RV32V-NEXT: ntl.all2462; CHECK-RV32V-NEXT: vluxei32.v v8, (zero), v82463; CHECK-RV32V-NEXT: ret2464;2465; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v4i32_ALL:2466; CHECK-RV64VC: # %bb.0:2467; CHECK-RV64VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2468; CHECK-RV64VC-NEXT: c.ntl.all2469; CHECK-RV64VC-NEXT: vluxei64.v v10, (zero), v82470; CHECK-RV64VC-NEXT: vmv.v.v v8, v102471; CHECK-RV64VC-NEXT: ret2472;2473; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v4i32_ALL:2474; CHECK-RV32VC: # %bb.0:2475; CHECK-RV32VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2476; CHECK-RV32VC-NEXT: c.ntl.all2477; CHECK-RV32VC-NEXT: vluxei32.v v8, (zero), v82478; CHECK-RV32VC-NEXT: ret2479 %x = call <4 x i32> @llvm.vp.gather.v4i32.v4p0(<4 x ptr> %ptrs, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !42480 ret <4 x i32> %x2481}2482 2483define <4 x i32> @test_nontemporal_vp_gather_v4i32_DEFAULT(<4 x ptr> %ptrs, i32 zeroext %vl) {2484; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v4i32_DEFAULT:2485; CHECK-RV64V: # %bb.0:2486; CHECK-RV64V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2487; CHECK-RV64V-NEXT: ntl.all2488; CHECK-RV64V-NEXT: vluxei64.v v10, (zero), v82489; CHECK-RV64V-NEXT: vmv.v.v v8, v102490; CHECK-RV64V-NEXT: ret2491;2492; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v4i32_DEFAULT:2493; CHECK-RV32V: # %bb.0:2494; CHECK-RV32V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2495; CHECK-RV32V-NEXT: ntl.all2496; CHECK-RV32V-NEXT: vluxei32.v v8, (zero), v82497; CHECK-RV32V-NEXT: ret2498;2499; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v4i32_DEFAULT:2500; CHECK-RV64VC: # %bb.0:2501; CHECK-RV64VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2502; CHECK-RV64VC-NEXT: c.ntl.all2503; CHECK-RV64VC-NEXT: vluxei64.v v10, (zero), v82504; CHECK-RV64VC-NEXT: vmv.v.v v8, v102505; CHECK-RV64VC-NEXT: ret2506;2507; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v4i32_DEFAULT:2508; CHECK-RV32VC: # %bb.0:2509; CHECK-RV32VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2510; CHECK-RV32VC-NEXT: c.ntl.all2511; CHECK-RV32VC-NEXT: vluxei32.v v8, (zero), v82512; CHECK-RV32VC-NEXT: ret2513 %x = call <4 x i32> @llvm.vp.gather.v4i32.v4p0(<4 x ptr> %ptrs, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !02514 ret <4 x i32> %x2515}2516 2517 2518define void @test_nontemporal_vp_scatter_v4i32_P1(<4 x i32> %val, <4 x ptr> %ptrs, i32 zeroext %vl) {2519; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v4i32_P1:2520; CHECK-RV64V: # %bb.0:2521; CHECK-RV64V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2522; CHECK-RV64V-NEXT: ntl.p12523; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v102524; CHECK-RV64V-NEXT: ret2525;2526; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v4i32_P1:2527; CHECK-RV32V: # %bb.0:2528; CHECK-RV32V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2529; CHECK-RV32V-NEXT: ntl.p12530; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v92531; CHECK-RV32V-NEXT: ret2532;2533; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v4i32_P1:2534; CHECK-RV64VC: # %bb.0:2535; CHECK-RV64VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2536; CHECK-RV64VC-NEXT: c.ntl.p12537; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v102538; CHECK-RV64VC-NEXT: ret2539;2540; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v4i32_P1:2541; CHECK-RV32VC: # %bb.0:2542; CHECK-RV32VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2543; CHECK-RV32VC-NEXT: c.ntl.p12544; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v92545; CHECK-RV32VC-NEXT: ret2546 call void @llvm.vp.scatter.v4i32.v4p0(<4 x i32> %val, <4 x ptr> %ptrs, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !12547 ret void2548}2549 2550 2551define void @test_nontemporal_vp_scatter_v4i32_PALL(<4 x i32> %val, <4 x ptr> %ptrs, i32 zeroext %vl) {2552; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v4i32_PALL:2553; CHECK-RV64V: # %bb.0:2554; CHECK-RV64V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2555; CHECK-RV64V-NEXT: ntl.pall2556; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v102557; CHECK-RV64V-NEXT: ret2558;2559; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v4i32_PALL:2560; CHECK-RV32V: # %bb.0:2561; CHECK-RV32V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2562; CHECK-RV32V-NEXT: ntl.pall2563; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v92564; CHECK-RV32V-NEXT: ret2565;2566; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v4i32_PALL:2567; CHECK-RV64VC: # %bb.0:2568; CHECK-RV64VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2569; CHECK-RV64VC-NEXT: c.ntl.pall2570; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v102571; CHECK-RV64VC-NEXT: ret2572;2573; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v4i32_PALL:2574; CHECK-RV32VC: # %bb.0:2575; CHECK-RV32VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2576; CHECK-RV32VC-NEXT: c.ntl.pall2577; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v92578; CHECK-RV32VC-NEXT: ret2579 call void @llvm.vp.scatter.v4i32.v4p0(<4 x i32> %val, <4 x ptr> %ptrs, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !22580 ret void2581}2582 2583 2584define void @test_nontemporal_vp_scatter_v4i32_S1(<4 x i32> %val, <4 x ptr> %ptrs, i32 zeroext %vl) {2585; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v4i32_S1:2586; CHECK-RV64V: # %bb.0:2587; CHECK-RV64V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2588; CHECK-RV64V-NEXT: ntl.s12589; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v102590; CHECK-RV64V-NEXT: ret2591;2592; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v4i32_S1:2593; CHECK-RV32V: # %bb.0:2594; CHECK-RV32V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2595; CHECK-RV32V-NEXT: ntl.s12596; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v92597; CHECK-RV32V-NEXT: ret2598;2599; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v4i32_S1:2600; CHECK-RV64VC: # %bb.0:2601; CHECK-RV64VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2602; CHECK-RV64VC-NEXT: c.ntl.s12603; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v102604; CHECK-RV64VC-NEXT: ret2605;2606; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v4i32_S1:2607; CHECK-RV32VC: # %bb.0:2608; CHECK-RV32VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2609; CHECK-RV32VC-NEXT: c.ntl.s12610; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v92611; CHECK-RV32VC-NEXT: ret2612 call void @llvm.vp.scatter.v4i32.v4p0(<4 x i32> %val, <4 x ptr> %ptrs, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !32613 ret void2614}2615 2616 2617define void @test_nontemporal_vp_scatter_v4i32_ALL(<4 x i32> %val, <4 x ptr> %ptrs, i32 zeroext %vl) {2618; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v4i32_ALL:2619; CHECK-RV64V: # %bb.0:2620; CHECK-RV64V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2621; CHECK-RV64V-NEXT: ntl.all2622; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v102623; CHECK-RV64V-NEXT: ret2624;2625; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v4i32_ALL:2626; CHECK-RV32V: # %bb.0:2627; CHECK-RV32V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2628; CHECK-RV32V-NEXT: ntl.all2629; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v92630; CHECK-RV32V-NEXT: ret2631;2632; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v4i32_ALL:2633; CHECK-RV64VC: # %bb.0:2634; CHECK-RV64VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2635; CHECK-RV64VC-NEXT: c.ntl.all2636; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v102637; CHECK-RV64VC-NEXT: ret2638;2639; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v4i32_ALL:2640; CHECK-RV32VC: # %bb.0:2641; CHECK-RV32VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2642; CHECK-RV32VC-NEXT: c.ntl.all2643; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v92644; CHECK-RV32VC-NEXT: ret2645 call void @llvm.vp.scatter.v4i32.v4p0(<4 x i32> %val, <4 x ptr> %ptrs, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !42646 ret void2647}2648 2649define void @test_nontemporal_vp_scatter_v4i32_DEFAULT(<4 x i32> %val, <4 x ptr> %ptrs, i32 zeroext %vl) {2650; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v4i32_DEFAULT:2651; CHECK-RV64V: # %bb.0:2652; CHECK-RV64V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2653; CHECK-RV64V-NEXT: ntl.all2654; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v102655; CHECK-RV64V-NEXT: ret2656;2657; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v4i32_DEFAULT:2658; CHECK-RV32V: # %bb.0:2659; CHECK-RV32V-NEXT: vsetvli zero, a0, e32, m1, ta, ma2660; CHECK-RV32V-NEXT: ntl.all2661; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v92662; CHECK-RV32V-NEXT: ret2663;2664; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v4i32_DEFAULT:2665; CHECK-RV64VC: # %bb.0:2666; CHECK-RV64VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2667; CHECK-RV64VC-NEXT: c.ntl.all2668; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v102669; CHECK-RV64VC-NEXT: ret2670;2671; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v4i32_DEFAULT:2672; CHECK-RV32VC: # %bb.0:2673; CHECK-RV32VC-NEXT: vsetvli zero, a0, e32, m1, ta, ma2674; CHECK-RV32VC-NEXT: c.ntl.all2675; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v92676; CHECK-RV32VC-NEXT: ret2677 call void @llvm.vp.scatter.v4i32.v4p0(<4 x i32> %val, <4 x ptr> %ptrs, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !02678 ret void2679}2680 2681 2682define <4 x i32> @test_nontemporal_vp_strided.load_v4i32_P1(ptr %p, i64 %stride, i32 zeroext %vl) {2683; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v4i32_P1:2684; CHECK-RV64V: # %bb.0:2685; CHECK-RV64V-NEXT: vsetvli zero, a2, e32, m1, ta, ma2686; CHECK-RV64V-NEXT: ntl.p12687; CHECK-RV64V-NEXT: vlse32.v v8, (a0), a12688; CHECK-RV64V-NEXT: ret2689;2690; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v4i32_P1:2691; CHECK-RV32V: # %bb.0:2692; CHECK-RV32V-NEXT: vsetvli zero, a3, e32, m1, ta, ma2693; CHECK-RV32V-NEXT: ntl.p12694; CHECK-RV32V-NEXT: vlse32.v v8, (a0), a12695; CHECK-RV32V-NEXT: ret2696;2697; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v4i32_P1:2698; CHECK-RV64VC: # %bb.0:2699; CHECK-RV64VC-NEXT: vsetvli zero, a2, e32, m1, ta, ma2700; CHECK-RV64VC-NEXT: c.ntl.p12701; CHECK-RV64VC-NEXT: vlse32.v v8, (a0), a12702; CHECK-RV64VC-NEXT: ret2703;2704; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v4i32_P1:2705; CHECK-RV32VC: # %bb.0:2706; CHECK-RV32VC-NEXT: vsetvli zero, a3, e32, m1, ta, ma2707; CHECK-RV32VC-NEXT: c.ntl.p12708; CHECK-RV32VC-NEXT: vlse32.v v8, (a0), a12709; CHECK-RV32VC-NEXT: ret2710 %x = call <4 x i32> @llvm.experimental.vp.strided.load.v4i32.i64(ptr %p, i64 %stride, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !12711 ret <4 x i32> %x2712}2713 2714 2715define <4 x i32> @test_nontemporal_vp_strided.load_v4i32_PALL(ptr %p, i64 %stride, i32 zeroext %vl) {2716; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v4i32_PALL:2717; CHECK-RV64V: # %bb.0:2718; CHECK-RV64V-NEXT: vsetvli zero, a2, e32, m1, ta, ma2719; CHECK-RV64V-NEXT: ntl.pall2720; CHECK-RV64V-NEXT: vlse32.v v8, (a0), a12721; CHECK-RV64V-NEXT: ret2722;2723; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v4i32_PALL:2724; CHECK-RV32V: # %bb.0:2725; CHECK-RV32V-NEXT: vsetvli zero, a3, e32, m1, ta, ma2726; CHECK-RV32V-NEXT: ntl.pall2727; CHECK-RV32V-NEXT: vlse32.v v8, (a0), a12728; CHECK-RV32V-NEXT: ret2729;2730; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v4i32_PALL:2731; CHECK-RV64VC: # %bb.0:2732; CHECK-RV64VC-NEXT: vsetvli zero, a2, e32, m1, ta, ma2733; CHECK-RV64VC-NEXT: c.ntl.pall2734; CHECK-RV64VC-NEXT: vlse32.v v8, (a0), a12735; CHECK-RV64VC-NEXT: ret2736;2737; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v4i32_PALL:2738; CHECK-RV32VC: # %bb.0:2739; CHECK-RV32VC-NEXT: vsetvli zero, a3, e32, m1, ta, ma2740; CHECK-RV32VC-NEXT: c.ntl.pall2741; CHECK-RV32VC-NEXT: vlse32.v v8, (a0), a12742; CHECK-RV32VC-NEXT: ret2743 %x = call <4 x i32> @llvm.experimental.vp.strided.load.v4i32.i64(ptr %p, i64 %stride, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !22744 ret <4 x i32> %x2745}2746 2747 2748define <4 x i32> @test_nontemporal_vp_strided.load_v4i32_S1(ptr %p, i64 %stride, i32 zeroext %vl) {2749; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v4i32_S1:2750; CHECK-RV64V: # %bb.0:2751; CHECK-RV64V-NEXT: vsetvli zero, a2, e32, m1, ta, ma2752; CHECK-RV64V-NEXT: ntl.s12753; CHECK-RV64V-NEXT: vlse32.v v8, (a0), a12754; CHECK-RV64V-NEXT: ret2755;2756; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v4i32_S1:2757; CHECK-RV32V: # %bb.0:2758; CHECK-RV32V-NEXT: vsetvli zero, a3, e32, m1, ta, ma2759; CHECK-RV32V-NEXT: ntl.s12760; CHECK-RV32V-NEXT: vlse32.v v8, (a0), a12761; CHECK-RV32V-NEXT: ret2762;2763; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v4i32_S1:2764; CHECK-RV64VC: # %bb.0:2765; CHECK-RV64VC-NEXT: vsetvli zero, a2, e32, m1, ta, ma2766; CHECK-RV64VC-NEXT: c.ntl.s12767; CHECK-RV64VC-NEXT: vlse32.v v8, (a0), a12768; CHECK-RV64VC-NEXT: ret2769;2770; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v4i32_S1:2771; CHECK-RV32VC: # %bb.0:2772; CHECK-RV32VC-NEXT: vsetvli zero, a3, e32, m1, ta, ma2773; CHECK-RV32VC-NEXT: c.ntl.s12774; CHECK-RV32VC-NEXT: vlse32.v v8, (a0), a12775; CHECK-RV32VC-NEXT: ret2776 %x = call <4 x i32> @llvm.experimental.vp.strided.load.v4i32.i64(ptr %p, i64 %stride, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !32777 ret <4 x i32> %x2778}2779 2780 2781define <4 x i32> @test_nontemporal_vp_strided.load_v4i32_ALL(ptr %p, i64 %stride, i32 zeroext %vl) {2782; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v4i32_ALL:2783; CHECK-RV64V: # %bb.0:2784; CHECK-RV64V-NEXT: vsetvli zero, a2, e32, m1, ta, ma2785; CHECK-RV64V-NEXT: ntl.all2786; CHECK-RV64V-NEXT: vlse32.v v8, (a0), a12787; CHECK-RV64V-NEXT: ret2788;2789; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v4i32_ALL:2790; CHECK-RV32V: # %bb.0:2791; CHECK-RV32V-NEXT: vsetvli zero, a3, e32, m1, ta, ma2792; CHECK-RV32V-NEXT: ntl.all2793; CHECK-RV32V-NEXT: vlse32.v v8, (a0), a12794; CHECK-RV32V-NEXT: ret2795;2796; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v4i32_ALL:2797; CHECK-RV64VC: # %bb.0:2798; CHECK-RV64VC-NEXT: vsetvli zero, a2, e32, m1, ta, ma2799; CHECK-RV64VC-NEXT: c.ntl.all2800; CHECK-RV64VC-NEXT: vlse32.v v8, (a0), a12801; CHECK-RV64VC-NEXT: ret2802;2803; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v4i32_ALL:2804; CHECK-RV32VC: # %bb.0:2805; CHECK-RV32VC-NEXT: vsetvli zero, a3, e32, m1, ta, ma2806; CHECK-RV32VC-NEXT: c.ntl.all2807; CHECK-RV32VC-NEXT: vlse32.v v8, (a0), a12808; CHECK-RV32VC-NEXT: ret2809 %x = call <4 x i32> @llvm.experimental.vp.strided.load.v4i32.i64(ptr %p, i64 %stride, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !42810 ret <4 x i32> %x2811}2812 2813define <4 x i32> @test_nontemporal_vp_strided.load_v4i32_DEFAULT(ptr %p, i64 %stride, i32 zeroext %vl) {2814; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v4i32_DEFAULT:2815; CHECK-RV64V: # %bb.0:2816; CHECK-RV64V-NEXT: vsetvli zero, a2, e32, m1, ta, ma2817; CHECK-RV64V-NEXT: ntl.all2818; CHECK-RV64V-NEXT: vlse32.v v8, (a0), a12819; CHECK-RV64V-NEXT: ret2820;2821; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v4i32_DEFAULT:2822; CHECK-RV32V: # %bb.0:2823; CHECK-RV32V-NEXT: vsetvli zero, a3, e32, m1, ta, ma2824; CHECK-RV32V-NEXT: ntl.all2825; CHECK-RV32V-NEXT: vlse32.v v8, (a0), a12826; CHECK-RV32V-NEXT: ret2827;2828; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v4i32_DEFAULT:2829; CHECK-RV64VC: # %bb.0:2830; CHECK-RV64VC-NEXT: vsetvli zero, a2, e32, m1, ta, ma2831; CHECK-RV64VC-NEXT: c.ntl.all2832; CHECK-RV64VC-NEXT: vlse32.v v8, (a0), a12833; CHECK-RV64VC-NEXT: ret2834;2835; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v4i32_DEFAULT:2836; CHECK-RV32VC: # %bb.0:2837; CHECK-RV32VC-NEXT: vsetvli zero, a3, e32, m1, ta, ma2838; CHECK-RV32VC-NEXT: c.ntl.all2839; CHECK-RV32VC-NEXT: vlse32.v v8, (a0), a12840; CHECK-RV32VC-NEXT: ret2841 %x = call <4 x i32> @llvm.experimental.vp.strided.load.v4i32.i64(ptr %p, i64 %stride, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !02842 ret <4 x i32> %x2843}2844 2845 2846define void @test_nontemporal_vp_strided.store_v4i32_P1(<4 x i32> %val, ptr %p, i64 %stride, i32 zeroext %vl) {2847; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v4i32_P1:2848; CHECK-RV64V: # %bb.0:2849; CHECK-RV64V-NEXT: vsetvli zero, a2, e32, m1, ta, ma2850; CHECK-RV64V-NEXT: ntl.p12851; CHECK-RV64V-NEXT: vsse32.v v8, (a0), a12852; CHECK-RV64V-NEXT: ret2853;2854; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v4i32_P1:2855; CHECK-RV32V: # %bb.0:2856; CHECK-RV32V-NEXT: vsetvli zero, a3, e32, m1, ta, ma2857; CHECK-RV32V-NEXT: ntl.p12858; CHECK-RV32V-NEXT: vsse32.v v8, (a0), a12859; CHECK-RV32V-NEXT: ret2860;2861; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v4i32_P1:2862; CHECK-RV64VC: # %bb.0:2863; CHECK-RV64VC-NEXT: vsetvli zero, a2, e32, m1, ta, ma2864; CHECK-RV64VC-NEXT: c.ntl.p12865; CHECK-RV64VC-NEXT: vsse32.v v8, (a0), a12866; CHECK-RV64VC-NEXT: ret2867;2868; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v4i32_P1:2869; CHECK-RV32VC: # %bb.0:2870; CHECK-RV32VC-NEXT: vsetvli zero, a3, e32, m1, ta, ma2871; CHECK-RV32VC-NEXT: c.ntl.p12872; CHECK-RV32VC-NEXT: vsse32.v v8, (a0), a12873; CHECK-RV32VC-NEXT: ret2874 call void @llvm.experimental.vp.strided.store.v4i32.i64(<4 x i32> %val, ptr %p, i64 %stride, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !12875 ret void2876}2877 2878 2879define void @test_nontemporal_vp_strided.store_v4i32_PALL(<4 x i32> %val, ptr %p, i64 %stride, i32 zeroext %vl) {2880; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v4i32_PALL:2881; CHECK-RV64V: # %bb.0:2882; CHECK-RV64V-NEXT: vsetvli zero, a2, e32, m1, ta, ma2883; CHECK-RV64V-NEXT: ntl.pall2884; CHECK-RV64V-NEXT: vsse32.v v8, (a0), a12885; CHECK-RV64V-NEXT: ret2886;2887; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v4i32_PALL:2888; CHECK-RV32V: # %bb.0:2889; CHECK-RV32V-NEXT: vsetvli zero, a3, e32, m1, ta, ma2890; CHECK-RV32V-NEXT: ntl.pall2891; CHECK-RV32V-NEXT: vsse32.v v8, (a0), a12892; CHECK-RV32V-NEXT: ret2893;2894; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v4i32_PALL:2895; CHECK-RV64VC: # %bb.0:2896; CHECK-RV64VC-NEXT: vsetvli zero, a2, e32, m1, ta, ma2897; CHECK-RV64VC-NEXT: c.ntl.pall2898; CHECK-RV64VC-NEXT: vsse32.v v8, (a0), a12899; CHECK-RV64VC-NEXT: ret2900;2901; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v4i32_PALL:2902; CHECK-RV32VC: # %bb.0:2903; CHECK-RV32VC-NEXT: vsetvli zero, a3, e32, m1, ta, ma2904; CHECK-RV32VC-NEXT: c.ntl.pall2905; CHECK-RV32VC-NEXT: vsse32.v v8, (a0), a12906; CHECK-RV32VC-NEXT: ret2907 call void @llvm.experimental.vp.strided.store.v4i32.i64(<4 x i32> %val, ptr %p, i64 %stride, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !22908 ret void2909}2910 2911 2912define void @test_nontemporal_vp_strided.store_v4i32_S1(<4 x i32> %val, ptr %p, i64 %stride, i32 zeroext %vl) {2913; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v4i32_S1:2914; CHECK-RV64V: # %bb.0:2915; CHECK-RV64V-NEXT: vsetvli zero, a2, e32, m1, ta, ma2916; CHECK-RV64V-NEXT: ntl.s12917; CHECK-RV64V-NEXT: vsse32.v v8, (a0), a12918; CHECK-RV64V-NEXT: ret2919;2920; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v4i32_S1:2921; CHECK-RV32V: # %bb.0:2922; CHECK-RV32V-NEXT: vsetvli zero, a3, e32, m1, ta, ma2923; CHECK-RV32V-NEXT: ntl.s12924; CHECK-RV32V-NEXT: vsse32.v v8, (a0), a12925; CHECK-RV32V-NEXT: ret2926;2927; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v4i32_S1:2928; CHECK-RV64VC: # %bb.0:2929; CHECK-RV64VC-NEXT: vsetvli zero, a2, e32, m1, ta, ma2930; CHECK-RV64VC-NEXT: c.ntl.s12931; CHECK-RV64VC-NEXT: vsse32.v v8, (a0), a12932; CHECK-RV64VC-NEXT: ret2933;2934; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v4i32_S1:2935; CHECK-RV32VC: # %bb.0:2936; CHECK-RV32VC-NEXT: vsetvli zero, a3, e32, m1, ta, ma2937; CHECK-RV32VC-NEXT: c.ntl.s12938; CHECK-RV32VC-NEXT: vsse32.v v8, (a0), a12939; CHECK-RV32VC-NEXT: ret2940 call void @llvm.experimental.vp.strided.store.v4i32.i64(<4 x i32> %val, ptr %p, i64 %stride, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !32941 ret void2942}2943 2944 2945define void @test_nontemporal_vp_strided.store_v4i32_ALL(<4 x i32> %val, ptr %p, i64 %stride, i32 zeroext %vl) {2946; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v4i32_ALL:2947; CHECK-RV64V: # %bb.0:2948; CHECK-RV64V-NEXT: vsetvli zero, a2, e32, m1, ta, ma2949; CHECK-RV64V-NEXT: ntl.all2950; CHECK-RV64V-NEXT: vsse32.v v8, (a0), a12951; CHECK-RV64V-NEXT: ret2952;2953; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v4i32_ALL:2954; CHECK-RV32V: # %bb.0:2955; CHECK-RV32V-NEXT: vsetvli zero, a3, e32, m1, ta, ma2956; CHECK-RV32V-NEXT: ntl.all2957; CHECK-RV32V-NEXT: vsse32.v v8, (a0), a12958; CHECK-RV32V-NEXT: ret2959;2960; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v4i32_ALL:2961; CHECK-RV64VC: # %bb.0:2962; CHECK-RV64VC-NEXT: vsetvli zero, a2, e32, m1, ta, ma2963; CHECK-RV64VC-NEXT: c.ntl.all2964; CHECK-RV64VC-NEXT: vsse32.v v8, (a0), a12965; CHECK-RV64VC-NEXT: ret2966;2967; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v4i32_ALL:2968; CHECK-RV32VC: # %bb.0:2969; CHECK-RV32VC-NEXT: vsetvli zero, a3, e32, m1, ta, ma2970; CHECK-RV32VC-NEXT: c.ntl.all2971; CHECK-RV32VC-NEXT: vsse32.v v8, (a0), a12972; CHECK-RV32VC-NEXT: ret2973 call void @llvm.experimental.vp.strided.store.v4i32.i64(<4 x i32> %val, ptr %p, i64 %stride, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !42974 ret void2975}2976 2977define void @test_nontemporal_vp_strided.store_v4i32_DEFAULT(<4 x i32> %val, ptr %p, i64 %stride, i32 zeroext %vl) {2978; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v4i32_DEFAULT:2979; CHECK-RV64V: # %bb.0:2980; CHECK-RV64V-NEXT: vsetvli zero, a2, e32, m1, ta, ma2981; CHECK-RV64V-NEXT: ntl.all2982; CHECK-RV64V-NEXT: vsse32.v v8, (a0), a12983; CHECK-RV64V-NEXT: ret2984;2985; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v4i32_DEFAULT:2986; CHECK-RV32V: # %bb.0:2987; CHECK-RV32V-NEXT: vsetvli zero, a3, e32, m1, ta, ma2988; CHECK-RV32V-NEXT: ntl.all2989; CHECK-RV32V-NEXT: vsse32.v v8, (a0), a12990; CHECK-RV32V-NEXT: ret2991;2992; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v4i32_DEFAULT:2993; CHECK-RV64VC: # %bb.0:2994; CHECK-RV64VC-NEXT: vsetvli zero, a2, e32, m1, ta, ma2995; CHECK-RV64VC-NEXT: c.ntl.all2996; CHECK-RV64VC-NEXT: vsse32.v v8, (a0), a12997; CHECK-RV64VC-NEXT: ret2998;2999; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v4i32_DEFAULT:3000; CHECK-RV32VC: # %bb.0:3001; CHECK-RV32VC-NEXT: vsetvli zero, a3, e32, m1, ta, ma3002; CHECK-RV32VC-NEXT: c.ntl.all3003; CHECK-RV32VC-NEXT: vsse32.v v8, (a0), a13004; CHECK-RV32VC-NEXT: ret3005 call void @llvm.experimental.vp.strided.store.v4i32.i64(<4 x i32> %val, ptr %p, i64 %stride, <4 x i1> splat(i1 true), i32 %vl), !nontemporal !03006 ret void3007}3008 3009 3010define <2 x i64> @test_nontemporal_vp_load_v2i64_P1(ptr %p, i32 zeroext %vl) {3011; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v2i64_P1:3012; CHECK-RV64V: # %bb.0:3013; CHECK-RV64V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3014; CHECK-RV64V-NEXT: ntl.p13015; CHECK-RV64V-NEXT: vle64.v v8, (a0)3016; CHECK-RV64V-NEXT: ret3017;3018; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v2i64_P1:3019; CHECK-RV32V: # %bb.0:3020; CHECK-RV32V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3021; CHECK-RV32V-NEXT: ntl.p13022; CHECK-RV32V-NEXT: vle64.v v8, (a0)3023; CHECK-RV32V-NEXT: ret3024;3025; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v2i64_P1:3026; CHECK-RV64VC: # %bb.0:3027; CHECK-RV64VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3028; CHECK-RV64VC-NEXT: c.ntl.p13029; CHECK-RV64VC-NEXT: vle64.v v8, (a0)3030; CHECK-RV64VC-NEXT: ret3031;3032; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v2i64_P1:3033; CHECK-RV32VC: # %bb.0:3034; CHECK-RV32VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3035; CHECK-RV32VC-NEXT: c.ntl.p13036; CHECK-RV32VC-NEXT: vle64.v v8, (a0)3037; CHECK-RV32VC-NEXT: ret3038 %x = call <2 x i64> @llvm.vp.load.v2i64.p0(ptr %p, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !13039 ret <2 x i64> %x3040}3041 3042 3043define <2 x i64> @test_nontemporal_vp_load_v2i64_PALL(ptr %p, i32 zeroext %vl) {3044; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v2i64_PALL:3045; CHECK-RV64V: # %bb.0:3046; CHECK-RV64V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3047; CHECK-RV64V-NEXT: ntl.pall3048; CHECK-RV64V-NEXT: vle64.v v8, (a0)3049; CHECK-RV64V-NEXT: ret3050;3051; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v2i64_PALL:3052; CHECK-RV32V: # %bb.0:3053; CHECK-RV32V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3054; CHECK-RV32V-NEXT: ntl.pall3055; CHECK-RV32V-NEXT: vle64.v v8, (a0)3056; CHECK-RV32V-NEXT: ret3057;3058; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v2i64_PALL:3059; CHECK-RV64VC: # %bb.0:3060; CHECK-RV64VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3061; CHECK-RV64VC-NEXT: c.ntl.pall3062; CHECK-RV64VC-NEXT: vle64.v v8, (a0)3063; CHECK-RV64VC-NEXT: ret3064;3065; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v2i64_PALL:3066; CHECK-RV32VC: # %bb.0:3067; CHECK-RV32VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3068; CHECK-RV32VC-NEXT: c.ntl.pall3069; CHECK-RV32VC-NEXT: vle64.v v8, (a0)3070; CHECK-RV32VC-NEXT: ret3071 %x = call <2 x i64> @llvm.vp.load.v2i64.p0(ptr %p, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !23072 ret <2 x i64> %x3073}3074 3075 3076define <2 x i64> @test_nontemporal_vp_load_v2i64_S1(ptr %p, i32 zeroext %vl) {3077; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v2i64_S1:3078; CHECK-RV64V: # %bb.0:3079; CHECK-RV64V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3080; CHECK-RV64V-NEXT: ntl.s13081; CHECK-RV64V-NEXT: vle64.v v8, (a0)3082; CHECK-RV64V-NEXT: ret3083;3084; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v2i64_S1:3085; CHECK-RV32V: # %bb.0:3086; CHECK-RV32V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3087; CHECK-RV32V-NEXT: ntl.s13088; CHECK-RV32V-NEXT: vle64.v v8, (a0)3089; CHECK-RV32V-NEXT: ret3090;3091; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v2i64_S1:3092; CHECK-RV64VC: # %bb.0:3093; CHECK-RV64VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3094; CHECK-RV64VC-NEXT: c.ntl.s13095; CHECK-RV64VC-NEXT: vle64.v v8, (a0)3096; CHECK-RV64VC-NEXT: ret3097;3098; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v2i64_S1:3099; CHECK-RV32VC: # %bb.0:3100; CHECK-RV32VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3101; CHECK-RV32VC-NEXT: c.ntl.s13102; CHECK-RV32VC-NEXT: vle64.v v8, (a0)3103; CHECK-RV32VC-NEXT: ret3104 %x = call <2 x i64> @llvm.vp.load.v2i64.p0(ptr %p, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !33105 ret <2 x i64> %x3106}3107 3108 3109define <2 x i64> @test_nontemporal_vp_load_v2i64_ALL(ptr %p, i32 zeroext %vl) {3110; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v2i64_ALL:3111; CHECK-RV64V: # %bb.0:3112; CHECK-RV64V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3113; CHECK-RV64V-NEXT: ntl.all3114; CHECK-RV64V-NEXT: vle64.v v8, (a0)3115; CHECK-RV64V-NEXT: ret3116;3117; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v2i64_ALL:3118; CHECK-RV32V: # %bb.0:3119; CHECK-RV32V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3120; CHECK-RV32V-NEXT: ntl.all3121; CHECK-RV32V-NEXT: vle64.v v8, (a0)3122; CHECK-RV32V-NEXT: ret3123;3124; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v2i64_ALL:3125; CHECK-RV64VC: # %bb.0:3126; CHECK-RV64VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3127; CHECK-RV64VC-NEXT: c.ntl.all3128; CHECK-RV64VC-NEXT: vle64.v v8, (a0)3129; CHECK-RV64VC-NEXT: ret3130;3131; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v2i64_ALL:3132; CHECK-RV32VC: # %bb.0:3133; CHECK-RV32VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3134; CHECK-RV32VC-NEXT: c.ntl.all3135; CHECK-RV32VC-NEXT: vle64.v v8, (a0)3136; CHECK-RV32VC-NEXT: ret3137 %x = call <2 x i64> @llvm.vp.load.v2i64.p0(ptr %p, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !43138 ret <2 x i64> %x3139}3140 3141define <2 x i64> @test_nontemporal_vp_load_v2i64_DEFAULT(ptr %p, i32 zeroext %vl) {3142; CHECK-RV64V-LABEL: test_nontemporal_vp_load_v2i64_DEFAULT:3143; CHECK-RV64V: # %bb.0:3144; CHECK-RV64V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3145; CHECK-RV64V-NEXT: ntl.all3146; CHECK-RV64V-NEXT: vle64.v v8, (a0)3147; CHECK-RV64V-NEXT: ret3148;3149; CHECK-RV32V-LABEL: test_nontemporal_vp_load_v2i64_DEFAULT:3150; CHECK-RV32V: # %bb.0:3151; CHECK-RV32V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3152; CHECK-RV32V-NEXT: ntl.all3153; CHECK-RV32V-NEXT: vle64.v v8, (a0)3154; CHECK-RV32V-NEXT: ret3155;3156; CHECK-RV64VC-LABEL: test_nontemporal_vp_load_v2i64_DEFAULT:3157; CHECK-RV64VC: # %bb.0:3158; CHECK-RV64VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3159; CHECK-RV64VC-NEXT: c.ntl.all3160; CHECK-RV64VC-NEXT: vle64.v v8, (a0)3161; CHECK-RV64VC-NEXT: ret3162;3163; CHECK-RV32VC-LABEL: test_nontemporal_vp_load_v2i64_DEFAULT:3164; CHECK-RV32VC: # %bb.0:3165; CHECK-RV32VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3166; CHECK-RV32VC-NEXT: c.ntl.all3167; CHECK-RV32VC-NEXT: vle64.v v8, (a0)3168; CHECK-RV32VC-NEXT: ret3169 %x = call <2 x i64> @llvm.vp.load.v2i64.p0(ptr %p, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !03170 ret <2 x i64> %x3171}3172 3173 3174define void @test_nontemporal_vp_store_v2i64_P1(<2 x i64> %val, ptr %p, i32 zeroext %vl) {3175; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v2i64_P1:3176; CHECK-RV64V: # %bb.0:3177; CHECK-RV64V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3178; CHECK-RV64V-NEXT: ntl.p13179; CHECK-RV64V-NEXT: vse64.v v8, (a0)3180; CHECK-RV64V-NEXT: ret3181;3182; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v2i64_P1:3183; CHECK-RV32V: # %bb.0:3184; CHECK-RV32V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3185; CHECK-RV32V-NEXT: ntl.p13186; CHECK-RV32V-NEXT: vse64.v v8, (a0)3187; CHECK-RV32V-NEXT: ret3188;3189; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v2i64_P1:3190; CHECK-RV64VC: # %bb.0:3191; CHECK-RV64VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3192; CHECK-RV64VC-NEXT: c.ntl.p13193; CHECK-RV64VC-NEXT: vse64.v v8, (a0)3194; CHECK-RV64VC-NEXT: ret3195;3196; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v2i64_P1:3197; CHECK-RV32VC: # %bb.0:3198; CHECK-RV32VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3199; CHECK-RV32VC-NEXT: c.ntl.p13200; CHECK-RV32VC-NEXT: vse64.v v8, (a0)3201; CHECK-RV32VC-NEXT: ret3202 call void @llvm.vp.store.v2i64.p0(<2 x i64> %val, ptr %p, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !13203 ret void3204}3205 3206 3207define void @test_nontemporal_vp_store_v2i64_PALL(<2 x i64> %val, ptr %p, i32 zeroext %vl) {3208; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v2i64_PALL:3209; CHECK-RV64V: # %bb.0:3210; CHECK-RV64V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3211; CHECK-RV64V-NEXT: ntl.pall3212; CHECK-RV64V-NEXT: vse64.v v8, (a0)3213; CHECK-RV64V-NEXT: ret3214;3215; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v2i64_PALL:3216; CHECK-RV32V: # %bb.0:3217; CHECK-RV32V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3218; CHECK-RV32V-NEXT: ntl.pall3219; CHECK-RV32V-NEXT: vse64.v v8, (a0)3220; CHECK-RV32V-NEXT: ret3221;3222; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v2i64_PALL:3223; CHECK-RV64VC: # %bb.0:3224; CHECK-RV64VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3225; CHECK-RV64VC-NEXT: c.ntl.pall3226; CHECK-RV64VC-NEXT: vse64.v v8, (a0)3227; CHECK-RV64VC-NEXT: ret3228;3229; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v2i64_PALL:3230; CHECK-RV32VC: # %bb.0:3231; CHECK-RV32VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3232; CHECK-RV32VC-NEXT: c.ntl.pall3233; CHECK-RV32VC-NEXT: vse64.v v8, (a0)3234; CHECK-RV32VC-NEXT: ret3235 call void @llvm.vp.store.v2i64.p0(<2 x i64> %val, ptr %p, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !23236 ret void3237}3238 3239 3240define void @test_nontemporal_vp_store_v2i64_S1(<2 x i64> %val, ptr %p, i32 zeroext %vl) {3241; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v2i64_S1:3242; CHECK-RV64V: # %bb.0:3243; CHECK-RV64V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3244; CHECK-RV64V-NEXT: ntl.s13245; CHECK-RV64V-NEXT: vse64.v v8, (a0)3246; CHECK-RV64V-NEXT: ret3247;3248; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v2i64_S1:3249; CHECK-RV32V: # %bb.0:3250; CHECK-RV32V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3251; CHECK-RV32V-NEXT: ntl.s13252; CHECK-RV32V-NEXT: vse64.v v8, (a0)3253; CHECK-RV32V-NEXT: ret3254;3255; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v2i64_S1:3256; CHECK-RV64VC: # %bb.0:3257; CHECK-RV64VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3258; CHECK-RV64VC-NEXT: c.ntl.s13259; CHECK-RV64VC-NEXT: vse64.v v8, (a0)3260; CHECK-RV64VC-NEXT: ret3261;3262; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v2i64_S1:3263; CHECK-RV32VC: # %bb.0:3264; CHECK-RV32VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3265; CHECK-RV32VC-NEXT: c.ntl.s13266; CHECK-RV32VC-NEXT: vse64.v v8, (a0)3267; CHECK-RV32VC-NEXT: ret3268 call void @llvm.vp.store.v2i64.p0(<2 x i64> %val, ptr %p, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !33269 ret void3270}3271 3272 3273define void @test_nontemporal_vp_store_v2i64_ALL(<2 x i64> %val, ptr %p, i32 zeroext %vl) {3274; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v2i64_ALL:3275; CHECK-RV64V: # %bb.0:3276; CHECK-RV64V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3277; CHECK-RV64V-NEXT: ntl.all3278; CHECK-RV64V-NEXT: vse64.v v8, (a0)3279; CHECK-RV64V-NEXT: ret3280;3281; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v2i64_ALL:3282; CHECK-RV32V: # %bb.0:3283; CHECK-RV32V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3284; CHECK-RV32V-NEXT: ntl.all3285; CHECK-RV32V-NEXT: vse64.v v8, (a0)3286; CHECK-RV32V-NEXT: ret3287;3288; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v2i64_ALL:3289; CHECK-RV64VC: # %bb.0:3290; CHECK-RV64VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3291; CHECK-RV64VC-NEXT: c.ntl.all3292; CHECK-RV64VC-NEXT: vse64.v v8, (a0)3293; CHECK-RV64VC-NEXT: ret3294;3295; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v2i64_ALL:3296; CHECK-RV32VC: # %bb.0:3297; CHECK-RV32VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3298; CHECK-RV32VC-NEXT: c.ntl.all3299; CHECK-RV32VC-NEXT: vse64.v v8, (a0)3300; CHECK-RV32VC-NEXT: ret3301 call void @llvm.vp.store.v2i64.p0(<2 x i64> %val, ptr %p, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !43302 ret void3303}3304 3305define void @test_nontemporal_vp_store_v2i64_DEFAULT(<2 x i64> %val, ptr %p, i32 zeroext %vl) {3306; CHECK-RV64V-LABEL: test_nontemporal_vp_store_v2i64_DEFAULT:3307; CHECK-RV64V: # %bb.0:3308; CHECK-RV64V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3309; CHECK-RV64V-NEXT: ntl.all3310; CHECK-RV64V-NEXT: vse64.v v8, (a0)3311; CHECK-RV64V-NEXT: ret3312;3313; CHECK-RV32V-LABEL: test_nontemporal_vp_store_v2i64_DEFAULT:3314; CHECK-RV32V: # %bb.0:3315; CHECK-RV32V-NEXT: vsetvli zero, a1, e64, m1, ta, ma3316; CHECK-RV32V-NEXT: ntl.all3317; CHECK-RV32V-NEXT: vse64.v v8, (a0)3318; CHECK-RV32V-NEXT: ret3319;3320; CHECK-RV64VC-LABEL: test_nontemporal_vp_store_v2i64_DEFAULT:3321; CHECK-RV64VC: # %bb.0:3322; CHECK-RV64VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3323; CHECK-RV64VC-NEXT: c.ntl.all3324; CHECK-RV64VC-NEXT: vse64.v v8, (a0)3325; CHECK-RV64VC-NEXT: ret3326;3327; CHECK-RV32VC-LABEL: test_nontemporal_vp_store_v2i64_DEFAULT:3328; CHECK-RV32VC: # %bb.0:3329; CHECK-RV32VC-NEXT: vsetvli zero, a1, e64, m1, ta, ma3330; CHECK-RV32VC-NEXT: c.ntl.all3331; CHECK-RV32VC-NEXT: vse64.v v8, (a0)3332; CHECK-RV32VC-NEXT: ret3333 call void @llvm.vp.store.v2i64.p0(<2 x i64> %val, ptr %p, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !03334 ret void3335}3336 3337 3338define <2 x i64> @test_nontemporal_vp_gather_v2i64_P1(<2 x ptr> %ptrs, i32 zeroext %vl) {3339; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v2i64_P1:3340; CHECK-RV64V: # %bb.0:3341; CHECK-RV64V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3342; CHECK-RV64V-NEXT: ntl.p13343; CHECK-RV64V-NEXT: vluxei64.v v8, (zero), v83344; CHECK-RV64V-NEXT: ret3345;3346; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v2i64_P1:3347; CHECK-RV32V: # %bb.0:3348; CHECK-RV32V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3349; CHECK-RV32V-NEXT: ntl.p13350; CHECK-RV32V-NEXT: vluxei32.v v9, (zero), v83351; CHECK-RV32V-NEXT: vmv.v.v v8, v93352; CHECK-RV32V-NEXT: ret3353;3354; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v2i64_P1:3355; CHECK-RV64VC: # %bb.0:3356; CHECK-RV64VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3357; CHECK-RV64VC-NEXT: c.ntl.p13358; CHECK-RV64VC-NEXT: vluxei64.v v8, (zero), v83359; CHECK-RV64VC-NEXT: ret3360;3361; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v2i64_P1:3362; CHECK-RV32VC: # %bb.0:3363; CHECK-RV32VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3364; CHECK-RV32VC-NEXT: c.ntl.p13365; CHECK-RV32VC-NEXT: vluxei32.v v9, (zero), v83366; CHECK-RV32VC-NEXT: vmv.v.v v8, v93367; CHECK-RV32VC-NEXT: ret3368 %x = call <2 x i64> @llvm.vp.gather.v2i64.v2p0(<2 x ptr> %ptrs, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !13369 ret <2 x i64> %x3370}3371 3372 3373define <2 x i64> @test_nontemporal_vp_gather_v2i64_PALL(<2 x ptr> %ptrs, i32 zeroext %vl) {3374; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v2i64_PALL:3375; CHECK-RV64V: # %bb.0:3376; CHECK-RV64V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3377; CHECK-RV64V-NEXT: ntl.pall3378; CHECK-RV64V-NEXT: vluxei64.v v8, (zero), v83379; CHECK-RV64V-NEXT: ret3380;3381; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v2i64_PALL:3382; CHECK-RV32V: # %bb.0:3383; CHECK-RV32V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3384; CHECK-RV32V-NEXT: ntl.pall3385; CHECK-RV32V-NEXT: vluxei32.v v9, (zero), v83386; CHECK-RV32V-NEXT: vmv.v.v v8, v93387; CHECK-RV32V-NEXT: ret3388;3389; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v2i64_PALL:3390; CHECK-RV64VC: # %bb.0:3391; CHECK-RV64VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3392; CHECK-RV64VC-NEXT: c.ntl.pall3393; CHECK-RV64VC-NEXT: vluxei64.v v8, (zero), v83394; CHECK-RV64VC-NEXT: ret3395;3396; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v2i64_PALL:3397; CHECK-RV32VC: # %bb.0:3398; CHECK-RV32VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3399; CHECK-RV32VC-NEXT: c.ntl.pall3400; CHECK-RV32VC-NEXT: vluxei32.v v9, (zero), v83401; CHECK-RV32VC-NEXT: vmv.v.v v8, v93402; CHECK-RV32VC-NEXT: ret3403 %x = call <2 x i64> @llvm.vp.gather.v2i64.v2p0(<2 x ptr> %ptrs, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !23404 ret <2 x i64> %x3405}3406 3407 3408define <2 x i64> @test_nontemporal_vp_gather_v2i64_S1(<2 x ptr> %ptrs, i32 zeroext %vl) {3409; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v2i64_S1:3410; CHECK-RV64V: # %bb.0:3411; CHECK-RV64V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3412; CHECK-RV64V-NEXT: ntl.s13413; CHECK-RV64V-NEXT: vluxei64.v v8, (zero), v83414; CHECK-RV64V-NEXT: ret3415;3416; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v2i64_S1:3417; CHECK-RV32V: # %bb.0:3418; CHECK-RV32V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3419; CHECK-RV32V-NEXT: ntl.s13420; CHECK-RV32V-NEXT: vluxei32.v v9, (zero), v83421; CHECK-RV32V-NEXT: vmv.v.v v8, v93422; CHECK-RV32V-NEXT: ret3423;3424; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v2i64_S1:3425; CHECK-RV64VC: # %bb.0:3426; CHECK-RV64VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3427; CHECK-RV64VC-NEXT: c.ntl.s13428; CHECK-RV64VC-NEXT: vluxei64.v v8, (zero), v83429; CHECK-RV64VC-NEXT: ret3430;3431; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v2i64_S1:3432; CHECK-RV32VC: # %bb.0:3433; CHECK-RV32VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3434; CHECK-RV32VC-NEXT: c.ntl.s13435; CHECK-RV32VC-NEXT: vluxei32.v v9, (zero), v83436; CHECK-RV32VC-NEXT: vmv.v.v v8, v93437; CHECK-RV32VC-NEXT: ret3438 %x = call <2 x i64> @llvm.vp.gather.v2i64.v2p0(<2 x ptr> %ptrs, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !33439 ret <2 x i64> %x3440}3441 3442 3443define <2 x i64> @test_nontemporal_vp_gather_v2i64_ALL(<2 x ptr> %ptrs, i32 zeroext %vl) {3444; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v2i64_ALL:3445; CHECK-RV64V: # %bb.0:3446; CHECK-RV64V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3447; CHECK-RV64V-NEXT: ntl.all3448; CHECK-RV64V-NEXT: vluxei64.v v8, (zero), v83449; CHECK-RV64V-NEXT: ret3450;3451; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v2i64_ALL:3452; CHECK-RV32V: # %bb.0:3453; CHECK-RV32V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3454; CHECK-RV32V-NEXT: ntl.all3455; CHECK-RV32V-NEXT: vluxei32.v v9, (zero), v83456; CHECK-RV32V-NEXT: vmv.v.v v8, v93457; CHECK-RV32V-NEXT: ret3458;3459; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v2i64_ALL:3460; CHECK-RV64VC: # %bb.0:3461; CHECK-RV64VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3462; CHECK-RV64VC-NEXT: c.ntl.all3463; CHECK-RV64VC-NEXT: vluxei64.v v8, (zero), v83464; CHECK-RV64VC-NEXT: ret3465;3466; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v2i64_ALL:3467; CHECK-RV32VC: # %bb.0:3468; CHECK-RV32VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3469; CHECK-RV32VC-NEXT: c.ntl.all3470; CHECK-RV32VC-NEXT: vluxei32.v v9, (zero), v83471; CHECK-RV32VC-NEXT: vmv.v.v v8, v93472; CHECK-RV32VC-NEXT: ret3473 %x = call <2 x i64> @llvm.vp.gather.v2i64.v2p0(<2 x ptr> %ptrs, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !43474 ret <2 x i64> %x3475}3476 3477define <2 x i64> @test_nontemporal_vp_gather_v2i64_DEFAULT(<2 x ptr> %ptrs, i32 zeroext %vl) {3478; CHECK-RV64V-LABEL: test_nontemporal_vp_gather_v2i64_DEFAULT:3479; CHECK-RV64V: # %bb.0:3480; CHECK-RV64V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3481; CHECK-RV64V-NEXT: ntl.all3482; CHECK-RV64V-NEXT: vluxei64.v v8, (zero), v83483; CHECK-RV64V-NEXT: ret3484;3485; CHECK-RV32V-LABEL: test_nontemporal_vp_gather_v2i64_DEFAULT:3486; CHECK-RV32V: # %bb.0:3487; CHECK-RV32V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3488; CHECK-RV32V-NEXT: ntl.all3489; CHECK-RV32V-NEXT: vluxei32.v v9, (zero), v83490; CHECK-RV32V-NEXT: vmv.v.v v8, v93491; CHECK-RV32V-NEXT: ret3492;3493; CHECK-RV64VC-LABEL: test_nontemporal_vp_gather_v2i64_DEFAULT:3494; CHECK-RV64VC: # %bb.0:3495; CHECK-RV64VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3496; CHECK-RV64VC-NEXT: c.ntl.all3497; CHECK-RV64VC-NEXT: vluxei64.v v8, (zero), v83498; CHECK-RV64VC-NEXT: ret3499;3500; CHECK-RV32VC-LABEL: test_nontemporal_vp_gather_v2i64_DEFAULT:3501; CHECK-RV32VC: # %bb.0:3502; CHECK-RV32VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3503; CHECK-RV32VC-NEXT: c.ntl.all3504; CHECK-RV32VC-NEXT: vluxei32.v v9, (zero), v83505; CHECK-RV32VC-NEXT: vmv.v.v v8, v93506; CHECK-RV32VC-NEXT: ret3507 %x = call <2 x i64> @llvm.vp.gather.v2i64.v2p0(<2 x ptr> %ptrs, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !03508 ret <2 x i64> %x3509}3510 3511 3512define void @test_nontemporal_vp_scatter_v2i64_P1(<2 x i64> %val, <2 x ptr> %ptrs, i32 zeroext %vl) {3513; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v2i64_P1:3514; CHECK-RV64V: # %bb.0:3515; CHECK-RV64V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3516; CHECK-RV64V-NEXT: ntl.p13517; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v93518; CHECK-RV64V-NEXT: ret3519;3520; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v2i64_P1:3521; CHECK-RV32V: # %bb.0:3522; CHECK-RV32V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3523; CHECK-RV32V-NEXT: ntl.p13524; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v93525; CHECK-RV32V-NEXT: ret3526;3527; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v2i64_P1:3528; CHECK-RV64VC: # %bb.0:3529; CHECK-RV64VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3530; CHECK-RV64VC-NEXT: c.ntl.p13531; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v93532; CHECK-RV64VC-NEXT: ret3533;3534; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v2i64_P1:3535; CHECK-RV32VC: # %bb.0:3536; CHECK-RV32VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3537; CHECK-RV32VC-NEXT: c.ntl.p13538; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v93539; CHECK-RV32VC-NEXT: ret3540 call void @llvm.vp.scatter.v2i64.v2p0(<2 x i64> %val, <2 x ptr> %ptrs, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !13541 ret void3542}3543 3544 3545define void @test_nontemporal_vp_scatter_v2i64_PALL(<2 x i64> %val, <2 x ptr> %ptrs, i32 zeroext %vl) {3546; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v2i64_PALL:3547; CHECK-RV64V: # %bb.0:3548; CHECK-RV64V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3549; CHECK-RV64V-NEXT: ntl.pall3550; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v93551; CHECK-RV64V-NEXT: ret3552;3553; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v2i64_PALL:3554; CHECK-RV32V: # %bb.0:3555; CHECK-RV32V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3556; CHECK-RV32V-NEXT: ntl.pall3557; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v93558; CHECK-RV32V-NEXT: ret3559;3560; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v2i64_PALL:3561; CHECK-RV64VC: # %bb.0:3562; CHECK-RV64VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3563; CHECK-RV64VC-NEXT: c.ntl.pall3564; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v93565; CHECK-RV64VC-NEXT: ret3566;3567; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v2i64_PALL:3568; CHECK-RV32VC: # %bb.0:3569; CHECK-RV32VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3570; CHECK-RV32VC-NEXT: c.ntl.pall3571; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v93572; CHECK-RV32VC-NEXT: ret3573 call void @llvm.vp.scatter.v2i64.v2p0(<2 x i64> %val, <2 x ptr> %ptrs, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !23574 ret void3575}3576 3577 3578define void @test_nontemporal_vp_scatter_v2i64_S1(<2 x i64> %val, <2 x ptr> %ptrs, i32 zeroext %vl) {3579; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v2i64_S1:3580; CHECK-RV64V: # %bb.0:3581; CHECK-RV64V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3582; CHECK-RV64V-NEXT: ntl.s13583; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v93584; CHECK-RV64V-NEXT: ret3585;3586; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v2i64_S1:3587; CHECK-RV32V: # %bb.0:3588; CHECK-RV32V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3589; CHECK-RV32V-NEXT: ntl.s13590; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v93591; CHECK-RV32V-NEXT: ret3592;3593; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v2i64_S1:3594; CHECK-RV64VC: # %bb.0:3595; CHECK-RV64VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3596; CHECK-RV64VC-NEXT: c.ntl.s13597; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v93598; CHECK-RV64VC-NEXT: ret3599;3600; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v2i64_S1:3601; CHECK-RV32VC: # %bb.0:3602; CHECK-RV32VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3603; CHECK-RV32VC-NEXT: c.ntl.s13604; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v93605; CHECK-RV32VC-NEXT: ret3606 call void @llvm.vp.scatter.v2i64.v2p0(<2 x i64> %val, <2 x ptr> %ptrs, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !33607 ret void3608}3609 3610 3611define void @test_nontemporal_vp_scatter_v2i64_ALL(<2 x i64> %val, <2 x ptr> %ptrs, i32 zeroext %vl) {3612; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v2i64_ALL:3613; CHECK-RV64V: # %bb.0:3614; CHECK-RV64V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3615; CHECK-RV64V-NEXT: ntl.all3616; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v93617; CHECK-RV64V-NEXT: ret3618;3619; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v2i64_ALL:3620; CHECK-RV32V: # %bb.0:3621; CHECK-RV32V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3622; CHECK-RV32V-NEXT: ntl.all3623; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v93624; CHECK-RV32V-NEXT: ret3625;3626; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v2i64_ALL:3627; CHECK-RV64VC: # %bb.0:3628; CHECK-RV64VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3629; CHECK-RV64VC-NEXT: c.ntl.all3630; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v93631; CHECK-RV64VC-NEXT: ret3632;3633; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v2i64_ALL:3634; CHECK-RV32VC: # %bb.0:3635; CHECK-RV32VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3636; CHECK-RV32VC-NEXT: c.ntl.all3637; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v93638; CHECK-RV32VC-NEXT: ret3639 call void @llvm.vp.scatter.v2i64.v2p0(<2 x i64> %val, <2 x ptr> %ptrs, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !43640 ret void3641}3642 3643define void @test_nontemporal_vp_scatter_v2i64_DEFAULT(<2 x i64> %val, <2 x ptr> %ptrs, i32 zeroext %vl) {3644; CHECK-RV64V-LABEL: test_nontemporal_vp_scatter_v2i64_DEFAULT:3645; CHECK-RV64V: # %bb.0:3646; CHECK-RV64V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3647; CHECK-RV64V-NEXT: ntl.all3648; CHECK-RV64V-NEXT: vsoxei64.v v8, (zero), v93649; CHECK-RV64V-NEXT: ret3650;3651; CHECK-RV32V-LABEL: test_nontemporal_vp_scatter_v2i64_DEFAULT:3652; CHECK-RV32V: # %bb.0:3653; CHECK-RV32V-NEXT: vsetvli zero, a0, e64, m1, ta, ma3654; CHECK-RV32V-NEXT: ntl.all3655; CHECK-RV32V-NEXT: vsoxei32.v v8, (zero), v93656; CHECK-RV32V-NEXT: ret3657;3658; CHECK-RV64VC-LABEL: test_nontemporal_vp_scatter_v2i64_DEFAULT:3659; CHECK-RV64VC: # %bb.0:3660; CHECK-RV64VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3661; CHECK-RV64VC-NEXT: c.ntl.all3662; CHECK-RV64VC-NEXT: vsoxei64.v v8, (zero), v93663; CHECK-RV64VC-NEXT: ret3664;3665; CHECK-RV32VC-LABEL: test_nontemporal_vp_scatter_v2i64_DEFAULT:3666; CHECK-RV32VC: # %bb.0:3667; CHECK-RV32VC-NEXT: vsetvli zero, a0, e64, m1, ta, ma3668; CHECK-RV32VC-NEXT: c.ntl.all3669; CHECK-RV32VC-NEXT: vsoxei32.v v8, (zero), v93670; CHECK-RV32VC-NEXT: ret3671 call void @llvm.vp.scatter.v2i64.v2p0(<2 x i64> %val, <2 x ptr> %ptrs, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !03672 ret void3673}3674 3675 3676define <2 x i64> @test_nontemporal_vp_strided.load_v2i64_P1(ptr %p, i64 %stride, i32 zeroext %vl) {3677; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v2i64_P1:3678; CHECK-RV64V: # %bb.0:3679; CHECK-RV64V-NEXT: vsetvli zero, a2, e64, m1, ta, ma3680; CHECK-RV64V-NEXT: ntl.p13681; CHECK-RV64V-NEXT: vlse64.v v8, (a0), a13682; CHECK-RV64V-NEXT: ret3683;3684; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v2i64_P1:3685; CHECK-RV32V: # %bb.0:3686; CHECK-RV32V-NEXT: vsetvli zero, a3, e64, m1, ta, ma3687; CHECK-RV32V-NEXT: ntl.p13688; CHECK-RV32V-NEXT: vlse64.v v8, (a0), a13689; CHECK-RV32V-NEXT: ret3690;3691; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v2i64_P1:3692; CHECK-RV64VC: # %bb.0:3693; CHECK-RV64VC-NEXT: vsetvli zero, a2, e64, m1, ta, ma3694; CHECK-RV64VC-NEXT: c.ntl.p13695; CHECK-RV64VC-NEXT: vlse64.v v8, (a0), a13696; CHECK-RV64VC-NEXT: ret3697;3698; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v2i64_P1:3699; CHECK-RV32VC: # %bb.0:3700; CHECK-RV32VC-NEXT: vsetvli zero, a3, e64, m1, ta, ma3701; CHECK-RV32VC-NEXT: c.ntl.p13702; CHECK-RV32VC-NEXT: vlse64.v v8, (a0), a13703; CHECK-RV32VC-NEXT: ret3704 %x = call <2 x i64> @llvm.experimental.vp.strided.load.v2i64.i64(ptr %p, i64 %stride, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !13705 ret <2 x i64> %x3706}3707 3708 3709define <2 x i64> @test_nontemporal_vp_strided.load_v2i64_PALL(ptr %p, i64 %stride, i32 zeroext %vl) {3710; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v2i64_PALL:3711; CHECK-RV64V: # %bb.0:3712; CHECK-RV64V-NEXT: vsetvli zero, a2, e64, m1, ta, ma3713; CHECK-RV64V-NEXT: ntl.pall3714; CHECK-RV64V-NEXT: vlse64.v v8, (a0), a13715; CHECK-RV64V-NEXT: ret3716;3717; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v2i64_PALL:3718; CHECK-RV32V: # %bb.0:3719; CHECK-RV32V-NEXT: vsetvli zero, a3, e64, m1, ta, ma3720; CHECK-RV32V-NEXT: ntl.pall3721; CHECK-RV32V-NEXT: vlse64.v v8, (a0), a13722; CHECK-RV32V-NEXT: ret3723;3724; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v2i64_PALL:3725; CHECK-RV64VC: # %bb.0:3726; CHECK-RV64VC-NEXT: vsetvli zero, a2, e64, m1, ta, ma3727; CHECK-RV64VC-NEXT: c.ntl.pall3728; CHECK-RV64VC-NEXT: vlse64.v v8, (a0), a13729; CHECK-RV64VC-NEXT: ret3730;3731; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v2i64_PALL:3732; CHECK-RV32VC: # %bb.0:3733; CHECK-RV32VC-NEXT: vsetvli zero, a3, e64, m1, ta, ma3734; CHECK-RV32VC-NEXT: c.ntl.pall3735; CHECK-RV32VC-NEXT: vlse64.v v8, (a0), a13736; CHECK-RV32VC-NEXT: ret3737 %x = call <2 x i64> @llvm.experimental.vp.strided.load.v2i64.i64(ptr %p, i64 %stride, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !23738 ret <2 x i64> %x3739}3740 3741 3742define <2 x i64> @test_nontemporal_vp_strided.load_v2i64_S1(ptr %p, i64 %stride, i32 zeroext %vl) {3743; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v2i64_S1:3744; CHECK-RV64V: # %bb.0:3745; CHECK-RV64V-NEXT: vsetvli zero, a2, e64, m1, ta, ma3746; CHECK-RV64V-NEXT: ntl.s13747; CHECK-RV64V-NEXT: vlse64.v v8, (a0), a13748; CHECK-RV64V-NEXT: ret3749;3750; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v2i64_S1:3751; CHECK-RV32V: # %bb.0:3752; CHECK-RV32V-NEXT: vsetvli zero, a3, e64, m1, ta, ma3753; CHECK-RV32V-NEXT: ntl.s13754; CHECK-RV32V-NEXT: vlse64.v v8, (a0), a13755; CHECK-RV32V-NEXT: ret3756;3757; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v2i64_S1:3758; CHECK-RV64VC: # %bb.0:3759; CHECK-RV64VC-NEXT: vsetvli zero, a2, e64, m1, ta, ma3760; CHECK-RV64VC-NEXT: c.ntl.s13761; CHECK-RV64VC-NEXT: vlse64.v v8, (a0), a13762; CHECK-RV64VC-NEXT: ret3763;3764; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v2i64_S1:3765; CHECK-RV32VC: # %bb.0:3766; CHECK-RV32VC-NEXT: vsetvli zero, a3, e64, m1, ta, ma3767; CHECK-RV32VC-NEXT: c.ntl.s13768; CHECK-RV32VC-NEXT: vlse64.v v8, (a0), a13769; CHECK-RV32VC-NEXT: ret3770 %x = call <2 x i64> @llvm.experimental.vp.strided.load.v2i64.i64(ptr %p, i64 %stride, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !33771 ret <2 x i64> %x3772}3773 3774 3775define <2 x i64> @test_nontemporal_vp_strided.load_v2i64_ALL(ptr %p, i64 %stride, i32 zeroext %vl) {3776; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v2i64_ALL:3777; CHECK-RV64V: # %bb.0:3778; CHECK-RV64V-NEXT: vsetvli zero, a2, e64, m1, ta, ma3779; CHECK-RV64V-NEXT: ntl.all3780; CHECK-RV64V-NEXT: vlse64.v v8, (a0), a13781; CHECK-RV64V-NEXT: ret3782;3783; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v2i64_ALL:3784; CHECK-RV32V: # %bb.0:3785; CHECK-RV32V-NEXT: vsetvli zero, a3, e64, m1, ta, ma3786; CHECK-RV32V-NEXT: ntl.all3787; CHECK-RV32V-NEXT: vlse64.v v8, (a0), a13788; CHECK-RV32V-NEXT: ret3789;3790; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v2i64_ALL:3791; CHECK-RV64VC: # %bb.0:3792; CHECK-RV64VC-NEXT: vsetvli zero, a2, e64, m1, ta, ma3793; CHECK-RV64VC-NEXT: c.ntl.all3794; CHECK-RV64VC-NEXT: vlse64.v v8, (a0), a13795; CHECK-RV64VC-NEXT: ret3796;3797; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v2i64_ALL:3798; CHECK-RV32VC: # %bb.0:3799; CHECK-RV32VC-NEXT: vsetvli zero, a3, e64, m1, ta, ma3800; CHECK-RV32VC-NEXT: c.ntl.all3801; CHECK-RV32VC-NEXT: vlse64.v v8, (a0), a13802; CHECK-RV32VC-NEXT: ret3803 %x = call <2 x i64> @llvm.experimental.vp.strided.load.v2i64.i64(ptr %p, i64 %stride, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !43804 ret <2 x i64> %x3805}3806 3807define <2 x i64> @test_nontemporal_vp_strided.load_v2i64_DEFAULT(ptr %p, i64 %stride, i32 zeroext %vl) {3808; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.load_v2i64_DEFAULT:3809; CHECK-RV64V: # %bb.0:3810; CHECK-RV64V-NEXT: vsetvli zero, a2, e64, m1, ta, ma3811; CHECK-RV64V-NEXT: ntl.all3812; CHECK-RV64V-NEXT: vlse64.v v8, (a0), a13813; CHECK-RV64V-NEXT: ret3814;3815; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.load_v2i64_DEFAULT:3816; CHECK-RV32V: # %bb.0:3817; CHECK-RV32V-NEXT: vsetvli zero, a3, e64, m1, ta, ma3818; CHECK-RV32V-NEXT: ntl.all3819; CHECK-RV32V-NEXT: vlse64.v v8, (a0), a13820; CHECK-RV32V-NEXT: ret3821;3822; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.load_v2i64_DEFAULT:3823; CHECK-RV64VC: # %bb.0:3824; CHECK-RV64VC-NEXT: vsetvli zero, a2, e64, m1, ta, ma3825; CHECK-RV64VC-NEXT: c.ntl.all3826; CHECK-RV64VC-NEXT: vlse64.v v8, (a0), a13827; CHECK-RV64VC-NEXT: ret3828;3829; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.load_v2i64_DEFAULT:3830; CHECK-RV32VC: # %bb.0:3831; CHECK-RV32VC-NEXT: vsetvli zero, a3, e64, m1, ta, ma3832; CHECK-RV32VC-NEXT: c.ntl.all3833; CHECK-RV32VC-NEXT: vlse64.v v8, (a0), a13834; CHECK-RV32VC-NEXT: ret3835 %x = call <2 x i64> @llvm.experimental.vp.strided.load.v2i64.i64(ptr %p, i64 %stride, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !03836 ret <2 x i64> %x3837}3838 3839 3840define void @test_nontemporal_vp_strided.store_v2i64_P1(<2 x i64> %val, ptr %p, i64 %stride, i32 zeroext %vl) {3841; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v2i64_P1:3842; CHECK-RV64V: # %bb.0:3843; CHECK-RV64V-NEXT: vsetvli zero, a2, e64, m1, ta, ma3844; CHECK-RV64V-NEXT: ntl.p13845; CHECK-RV64V-NEXT: vsse64.v v8, (a0), a13846; CHECK-RV64V-NEXT: ret3847;3848; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v2i64_P1:3849; CHECK-RV32V: # %bb.0:3850; CHECK-RV32V-NEXT: vsetvli zero, a3, e64, m1, ta, ma3851; CHECK-RV32V-NEXT: ntl.p13852; CHECK-RV32V-NEXT: vsse64.v v8, (a0), a13853; CHECK-RV32V-NEXT: ret3854;3855; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v2i64_P1:3856; CHECK-RV64VC: # %bb.0:3857; CHECK-RV64VC-NEXT: vsetvli zero, a2, e64, m1, ta, ma3858; CHECK-RV64VC-NEXT: c.ntl.p13859; CHECK-RV64VC-NEXT: vsse64.v v8, (a0), a13860; CHECK-RV64VC-NEXT: ret3861;3862; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v2i64_P1:3863; CHECK-RV32VC: # %bb.0:3864; CHECK-RV32VC-NEXT: vsetvli zero, a3, e64, m1, ta, ma3865; CHECK-RV32VC-NEXT: c.ntl.p13866; CHECK-RV32VC-NEXT: vsse64.v v8, (a0), a13867; CHECK-RV32VC-NEXT: ret3868 call void @llvm.experimental.vp.strided.store.v2i64.i64(<2 x i64> %val, ptr %p, i64 %stride, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !13869 ret void3870}3871 3872 3873define void @test_nontemporal_vp_strided.store_v2i64_PALL(<2 x i64> %val, ptr %p, i64 %stride, i32 zeroext %vl) {3874; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v2i64_PALL:3875; CHECK-RV64V: # %bb.0:3876; CHECK-RV64V-NEXT: vsetvli zero, a2, e64, m1, ta, ma3877; CHECK-RV64V-NEXT: ntl.pall3878; CHECK-RV64V-NEXT: vsse64.v v8, (a0), a13879; CHECK-RV64V-NEXT: ret3880;3881; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v2i64_PALL:3882; CHECK-RV32V: # %bb.0:3883; CHECK-RV32V-NEXT: vsetvli zero, a3, e64, m1, ta, ma3884; CHECK-RV32V-NEXT: ntl.pall3885; CHECK-RV32V-NEXT: vsse64.v v8, (a0), a13886; CHECK-RV32V-NEXT: ret3887;3888; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v2i64_PALL:3889; CHECK-RV64VC: # %bb.0:3890; CHECK-RV64VC-NEXT: vsetvli zero, a2, e64, m1, ta, ma3891; CHECK-RV64VC-NEXT: c.ntl.pall3892; CHECK-RV64VC-NEXT: vsse64.v v8, (a0), a13893; CHECK-RV64VC-NEXT: ret3894;3895; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v2i64_PALL:3896; CHECK-RV32VC: # %bb.0:3897; CHECK-RV32VC-NEXT: vsetvli zero, a3, e64, m1, ta, ma3898; CHECK-RV32VC-NEXT: c.ntl.pall3899; CHECK-RV32VC-NEXT: vsse64.v v8, (a0), a13900; CHECK-RV32VC-NEXT: ret3901 call void @llvm.experimental.vp.strided.store.v2i64.i64(<2 x i64> %val, ptr %p, i64 %stride, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !23902 ret void3903}3904 3905 3906define void @test_nontemporal_vp_strided.store_v2i64_S1(<2 x i64> %val, ptr %p, i64 %stride, i32 zeroext %vl) {3907; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v2i64_S1:3908; CHECK-RV64V: # %bb.0:3909; CHECK-RV64V-NEXT: vsetvli zero, a2, e64, m1, ta, ma3910; CHECK-RV64V-NEXT: ntl.s13911; CHECK-RV64V-NEXT: vsse64.v v8, (a0), a13912; CHECK-RV64V-NEXT: ret3913;3914; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v2i64_S1:3915; CHECK-RV32V: # %bb.0:3916; CHECK-RV32V-NEXT: vsetvli zero, a3, e64, m1, ta, ma3917; CHECK-RV32V-NEXT: ntl.s13918; CHECK-RV32V-NEXT: vsse64.v v8, (a0), a13919; CHECK-RV32V-NEXT: ret3920;3921; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v2i64_S1:3922; CHECK-RV64VC: # %bb.0:3923; CHECK-RV64VC-NEXT: vsetvli zero, a2, e64, m1, ta, ma3924; CHECK-RV64VC-NEXT: c.ntl.s13925; CHECK-RV64VC-NEXT: vsse64.v v8, (a0), a13926; CHECK-RV64VC-NEXT: ret3927;3928; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v2i64_S1:3929; CHECK-RV32VC: # %bb.0:3930; CHECK-RV32VC-NEXT: vsetvli zero, a3, e64, m1, ta, ma3931; CHECK-RV32VC-NEXT: c.ntl.s13932; CHECK-RV32VC-NEXT: vsse64.v v8, (a0), a13933; CHECK-RV32VC-NEXT: ret3934 call void @llvm.experimental.vp.strided.store.v2i64.i64(<2 x i64> %val, ptr %p, i64 %stride, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !33935 ret void3936}3937 3938 3939define void @test_nontemporal_vp_strided.store_v2i64_ALL(<2 x i64> %val, ptr %p, i64 %stride, i32 zeroext %vl) {3940; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v2i64_ALL:3941; CHECK-RV64V: # %bb.0:3942; CHECK-RV64V-NEXT: vsetvli zero, a2, e64, m1, ta, ma3943; CHECK-RV64V-NEXT: ntl.all3944; CHECK-RV64V-NEXT: vsse64.v v8, (a0), a13945; CHECK-RV64V-NEXT: ret3946;3947; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v2i64_ALL:3948; CHECK-RV32V: # %bb.0:3949; CHECK-RV32V-NEXT: vsetvli zero, a3, e64, m1, ta, ma3950; CHECK-RV32V-NEXT: ntl.all3951; CHECK-RV32V-NEXT: vsse64.v v8, (a0), a13952; CHECK-RV32V-NEXT: ret3953;3954; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v2i64_ALL:3955; CHECK-RV64VC: # %bb.0:3956; CHECK-RV64VC-NEXT: vsetvli zero, a2, e64, m1, ta, ma3957; CHECK-RV64VC-NEXT: c.ntl.all3958; CHECK-RV64VC-NEXT: vsse64.v v8, (a0), a13959; CHECK-RV64VC-NEXT: ret3960;3961; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v2i64_ALL:3962; CHECK-RV32VC: # %bb.0:3963; CHECK-RV32VC-NEXT: vsetvli zero, a3, e64, m1, ta, ma3964; CHECK-RV32VC-NEXT: c.ntl.all3965; CHECK-RV32VC-NEXT: vsse64.v v8, (a0), a13966; CHECK-RV32VC-NEXT: ret3967 call void @llvm.experimental.vp.strided.store.v2i64.i64(<2 x i64> %val, ptr %p, i64 %stride, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !0, !riscv-nontemporal-domain !43968 ret void3969}3970 3971define void @test_nontemporal_vp_strided.store_v2i64_DEFAULT(<2 x i64> %val, ptr %p, i64 %stride, i32 zeroext %vl) {3972; CHECK-RV64V-LABEL: test_nontemporal_vp_strided.store_v2i64_DEFAULT:3973; CHECK-RV64V: # %bb.0:3974; CHECK-RV64V-NEXT: vsetvli zero, a2, e64, m1, ta, ma3975; CHECK-RV64V-NEXT: ntl.all3976; CHECK-RV64V-NEXT: vsse64.v v8, (a0), a13977; CHECK-RV64V-NEXT: ret3978;3979; CHECK-RV32V-LABEL: test_nontemporal_vp_strided.store_v2i64_DEFAULT:3980; CHECK-RV32V: # %bb.0:3981; CHECK-RV32V-NEXT: vsetvli zero, a3, e64, m1, ta, ma3982; CHECK-RV32V-NEXT: ntl.all3983; CHECK-RV32V-NEXT: vsse64.v v8, (a0), a13984; CHECK-RV32V-NEXT: ret3985;3986; CHECK-RV64VC-LABEL: test_nontemporal_vp_strided.store_v2i64_DEFAULT:3987; CHECK-RV64VC: # %bb.0:3988; CHECK-RV64VC-NEXT: vsetvli zero, a2, e64, m1, ta, ma3989; CHECK-RV64VC-NEXT: c.ntl.all3990; CHECK-RV64VC-NEXT: vsse64.v v8, (a0), a13991; CHECK-RV64VC-NEXT: ret3992;3993; CHECK-RV32VC-LABEL: test_nontemporal_vp_strided.store_v2i64_DEFAULT:3994; CHECK-RV32VC: # %bb.0:3995; CHECK-RV32VC-NEXT: vsetvli zero, a3, e64, m1, ta, ma3996; CHECK-RV32VC-NEXT: c.ntl.all3997; CHECK-RV32VC-NEXT: vsse64.v v8, (a0), a13998; CHECK-RV32VC-NEXT: ret3999 call void @llvm.experimental.vp.strided.store.v2i64.i64(<2 x i64> %val, ptr %p, i64 %stride, <2 x i1> splat(i1 true), i32 %vl), !nontemporal !04000 ret void4001}4002 4003 4004!0 = !{i32 1}4005!1 = !{i32 2}4006!2 = !{i32 3}4007!3 = !{i32 4}4008!4 = !{i32 5}4009 4010