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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+v | FileCheck %s3 4define <vscale x 4 x i16> @test_mulhs_promote(<vscale x 4 x i16> %broadcast.splatinsert, <vscale x 4 x i1> %0, <vscale x 4 x i1> %1) {5; CHECK-LABEL: test_mulhs_promote:6; CHECK: # %bb.0: # %entry7; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma8; CHECK-NEXT: vrgather.vi v9, v8, 09; CHECK-NEXT: lui a0, 510; CHECK-NEXT: addi a0, a0, 136611; CHECK-NEXT: vmulh.vx v8, v9, a012; CHECK-NEXT: vsrl.vi v10, v8, 1513; CHECK-NEXT: vadd.vv v8, v8, v1014; CHECK-NEXT: li a0, 315; CHECK-NEXT: vnmsub.vx v8, a0, v916; CHECK-NEXT: ret17entry:18 %broadcast.splat = shufflevector <vscale x 4 x i16> %broadcast.splatinsert, <vscale x 4 x i16> zeroinitializer, <vscale x 4 x i32> zeroinitializer19 %2 = srem <vscale x 4 x i16> %broadcast.splat, shufflevector (<vscale x 4 x i16> insertelement (<vscale x 4 x i16> poison, i16 3, i64 0), <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer)20 ret <vscale x 4 x i16> %221}22 23define <vscale x 4 x i16> @test_mulhu_promote(<vscale x 4 x i16> %broadcast.splatinsert, <vscale x 4 x i1> %0, <vscale x 4 x i1> %1) {24; CHECK-LABEL: test_mulhu_promote:25; CHECK: # %bb.0: # %entry26; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma27; CHECK-NEXT: vrgather.vi v9, v8, 028; CHECK-NEXT: lui a0, 104857129; CHECK-NEXT: addi a0, a0, -136530; CHECK-NEXT: vmulhu.vx v8, v9, a031; CHECK-NEXT: vsrl.vi v8, v8, 132; CHECK-NEXT: li a0, 333; CHECK-NEXT: vnmsub.vx v8, a0, v934; CHECK-NEXT: ret35entry:36 %broadcast.splat = shufflevector <vscale x 4 x i16> %broadcast.splatinsert, <vscale x 4 x i16> zeroinitializer, <vscale x 4 x i32> zeroinitializer37 %2 = urem <vscale x 4 x i16> %broadcast.splat, shufflevector (<vscale x 4 x i16> insertelement (<vscale x 4 x i16> poison, i16 3, i64 0), <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer)38 ret <vscale x 4 x i16> %239}40 41define <vscale x 4 x i64> @test_mulhs_expand(<vscale x 4 x i64> %broadcast.splatinsert, <vscale x 4 x i1> %0, <vscale x 4 x i1> %1) {42; CHECK-LABEL: test_mulhs_expand:43; CHECK: # %bb.0: # %entry44; CHECK-NEXT: addi sp, sp, -1645; CHECK-NEXT: .cfi_def_cfa_offset 1646; CHECK-NEXT: lui a0, 34952547; CHECK-NEXT: addi a1, sp, 848; CHECK-NEXT: addi a2, a0, 136549; CHECK-NEXT: addi a0, a0, 136650; CHECK-NEXT: sw a0, 8(sp)51; CHECK-NEXT: sw a2, 12(sp)52; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma53; CHECK-NEXT: vlse64.v v12, (a1), zero54; CHECK-NEXT: vrgather.vi v16, v8, 055; CHECK-NEXT: li a0, 6356; CHECK-NEXT: vmulh.vv v8, v16, v1257; CHECK-NEXT: vsrl.vx v12, v8, a058; CHECK-NEXT: vadd.vv v8, v8, v1259; CHECK-NEXT: li a0, 360; CHECK-NEXT: vnmsub.vx v8, a0, v1661; CHECK-NEXT: addi sp, sp, 1662; CHECK-NEXT: .cfi_def_cfa_offset 063; CHECK-NEXT: ret64entry:65 %broadcast.splat = shufflevector <vscale x 4 x i64> %broadcast.splatinsert, <vscale x 4 x i64> zeroinitializer, <vscale x 4 x i32> zeroinitializer66 %2 = srem <vscale x 4 x i64> %broadcast.splat, shufflevector (<vscale x 4 x i64> insertelement (<vscale x 4 x i64> poison, i64 3, i64 0), <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer)67 ret <vscale x 4 x i64> %268}69 70define <vscale x 4 x i64> @test_mulhu_expand(<vscale x 4 x i64> %broadcast.splatinsert, <vscale x 4 x i1> %0, <vscale x 4 x i1> %1) {71; CHECK-LABEL: test_mulhu_expand:72; CHECK: # %bb.0: # %entry73; CHECK-NEXT: addi sp, sp, -1674; CHECK-NEXT: .cfi_def_cfa_offset 1675; CHECK-NEXT: lui a0, 69905176; CHECK-NEXT: addi a1, sp, 877; CHECK-NEXT: addi a2, a0, -136678; CHECK-NEXT: addi a0, a0, -136579; CHECK-NEXT: sw a0, 8(sp)80; CHECK-NEXT: sw a2, 12(sp)81; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma82; CHECK-NEXT: vlse64.v v12, (a1), zero83; CHECK-NEXT: vrgather.vi v16, v8, 084; CHECK-NEXT: vmulhu.vv v8, v16, v1285; CHECK-NEXT: vsrl.vi v8, v8, 186; CHECK-NEXT: li a0, 387; CHECK-NEXT: vnmsub.vx v8, a0, v1688; CHECK-NEXT: addi sp, sp, 1689; CHECK-NEXT: .cfi_def_cfa_offset 090; CHECK-NEXT: ret91entry:92 %broadcast.splat = shufflevector <vscale x 4 x i64> %broadcast.splatinsert, <vscale x 4 x i64> zeroinitializer, <vscale x 4 x i32> zeroinitializer93 %2 = urem <vscale x 4 x i64> %broadcast.splat, shufflevector (<vscale x 4 x i64> insertelement (<vscale x 4 x i64> poison, i64 3, i64 0), <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer)94 ret <vscale x 4 x i64> %295}96