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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc < %s -mtriple=riscv64-unknown-linux-gnu -mattr=+v | FileCheck %s3 4define i32 @main() vscale_range(2,2) {5; CHECK-LABEL: main:6; CHECK: # %bb.0: # %vector.body7; CHECK-NEXT: lui a0, 10403688; CHECK-NEXT: addi a0, a0, -1449; CHECK-NEXT: vl2re16.v v8, (a0)10; CHECK-NEXT: vs2r.v v8, (zero)11; CHECK-NEXT: li a0, 012; CHECK-NEXT: ret13vector.body:14 %0 = load <16 x i16>, ptr getelementptr ([3 x [23 x [23 x i16]]], ptr null, i64 -10593, i64 1, i64 22, i64 0), align 1615 store <16 x i16> %0, ptr null, align 216 %wide.load = load <vscale x 8 x i16>, ptr getelementptr ([3 x [23 x [23 x i16]]], ptr null, i64 -10593, i64 1, i64 22, i64 0), align 1617 store <vscale x 8 x i16> %wide.load, ptr null, align 218 ret i32 019}20