595 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -mattr=+m -O0 < %s \3; RUN: | FileCheck --check-prefix=SPILL-O0 %s4; RUN: llc -mtriple=riscv32 -mattr=+v -mattr=+m -O2 < %s \5; RUN: | FileCheck --check-prefix=SPILL-O2 %s6; RUN: llc -mtriple=riscv32 -mattr=+v -riscv-v-vector-bits-max=128 -O2 < %s \7; RUN: | FileCheck --check-prefix=SPILL-O2-VLEN128 %s8; RUN: llc -mtriple=riscv32 -mattr=+v,+m,+prefer-vsetvli-over-read-vlenb -O0 < %s \9; RUN: | FileCheck --check-prefix=SPILL-O0-VSETVLI %s10; RUN: llc -mtriple=riscv32 -mattr=+v,+m,+prefer-vsetvli-over-read-vlenb -O2 < %s \11; RUN: | FileCheck --check-prefix=SPILL-O2-VSETVLI %s12 13define <vscale x 1 x i32> @spill_zvlsseg_nxv1i32(ptr %base, i32 %vl) nounwind {14; SPILL-O0-LABEL: spill_zvlsseg_nxv1i32:15; SPILL-O0: # %bb.0: # %entry16; SPILL-O0-NEXT: addi sp, sp, -1617; SPILL-O0-NEXT: csrr a2, vlenb18; SPILL-O0-NEXT: sub sp, sp, a219; SPILL-O0-NEXT: # implicit-def: $v8_v920; SPILL-O0-NEXT: vsetvli zero, a1, e32, mf2, tu, ma21; SPILL-O0-NEXT: vlseg2e32.v v8, (a0)22; SPILL-O0-NEXT: vsetvli zero, a1, e32, mf2, tu, ma23; SPILL-O0-NEXT: vmv1r.v v8, v924; SPILL-O0-NEXT: addi a0, sp, 1625; SPILL-O0-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill26; SPILL-O0-NEXT: #APP27; SPILL-O0-NEXT: #NO_APP28; SPILL-O0-NEXT: addi a0, sp, 1629; SPILL-O0-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload30; SPILL-O0-NEXT: csrr a0, vlenb31; SPILL-O0-NEXT: add sp, sp, a032; SPILL-O0-NEXT: addi sp, sp, 1633; SPILL-O0-NEXT: ret34;35; SPILL-O2-LABEL: spill_zvlsseg_nxv1i32:36; SPILL-O2: # %bb.0: # %entry37; SPILL-O2-NEXT: addi sp, sp, -1638; SPILL-O2-NEXT: csrr a2, vlenb39; SPILL-O2-NEXT: slli a2, a2, 140; SPILL-O2-NEXT: sub sp, sp, a241; SPILL-O2-NEXT: vsetvli zero, a1, e32, mf2, ta, ma42; SPILL-O2-NEXT: vlseg2e32.v v8, (a0)43; SPILL-O2-NEXT: addi a0, sp, 1644; SPILL-O2-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill45; SPILL-O2-NEXT: #APP46; SPILL-O2-NEXT: #NO_APP47; SPILL-O2-NEXT: vl1r.v v7, (a0) # vscale x 8-byte Folded Reload48; SPILL-O2-NEXT: csrr a1, vlenb49; SPILL-O2-NEXT: add a0, a0, a150; SPILL-O2-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload51; SPILL-O2-NEXT: csrr a0, vlenb52; SPILL-O2-NEXT: slli a0, a0, 153; SPILL-O2-NEXT: add sp, sp, a054; SPILL-O2-NEXT: addi sp, sp, 1655; SPILL-O2-NEXT: ret56;57; SPILL-O2-VLEN128-LABEL: spill_zvlsseg_nxv1i32:58; SPILL-O2-VLEN128: # %bb.0: # %entry59; SPILL-O2-VLEN128-NEXT: addi sp, sp, -1660; SPILL-O2-VLEN128-NEXT: addi sp, sp, -3261; SPILL-O2-VLEN128-NEXT: vsetvli zero, a1, e32, mf2, ta, ma62; SPILL-O2-VLEN128-NEXT: vlseg2e32.v v8, (a0)63; SPILL-O2-VLEN128-NEXT: addi a0, sp, 1664; SPILL-O2-VLEN128-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill65; SPILL-O2-VLEN128-NEXT: #APP66; SPILL-O2-VLEN128-NEXT: #NO_APP67; SPILL-O2-VLEN128-NEXT: vl1r.v v7, (a0) # vscale x 8-byte Folded Reload68; SPILL-O2-VLEN128-NEXT: li a1, 1669; SPILL-O2-VLEN128-NEXT: add a0, a0, a170; SPILL-O2-VLEN128-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload71; SPILL-O2-VLEN128-NEXT: addi sp, sp, 3272; SPILL-O2-VLEN128-NEXT: addi sp, sp, 1673; SPILL-O2-VLEN128-NEXT: ret74;75; SPILL-O0-VSETVLI-LABEL: spill_zvlsseg_nxv1i32:76; SPILL-O0-VSETVLI: # %bb.0: # %entry77; SPILL-O0-VSETVLI-NEXT: addi sp, sp, -1678; SPILL-O0-VSETVLI-NEXT: vsetvli a2, zero, e8, m1, ta, ma79; SPILL-O0-VSETVLI-NEXT: sub sp, sp, a280; SPILL-O0-VSETVLI-NEXT: # implicit-def: $v8_v981; SPILL-O0-VSETVLI-NEXT: vsetvli zero, a1, e32, mf2, tu, ma82; SPILL-O0-VSETVLI-NEXT: vlseg2e32.v v8, (a0)83; SPILL-O0-VSETVLI-NEXT: vsetvli zero, a1, e32, mf2, tu, ma84; SPILL-O0-VSETVLI-NEXT: vmv1r.v v8, v985; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 1686; SPILL-O0-VSETVLI-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill87; SPILL-O0-VSETVLI-NEXT: #APP88; SPILL-O0-VSETVLI-NEXT: #NO_APP89; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 1690; SPILL-O0-VSETVLI-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload91; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m1, ta, ma92; SPILL-O0-VSETVLI-NEXT: add sp, sp, a093; SPILL-O0-VSETVLI-NEXT: addi sp, sp, 1694; SPILL-O0-VSETVLI-NEXT: ret95;96; SPILL-O2-VSETVLI-LABEL: spill_zvlsseg_nxv1i32:97; SPILL-O2-VSETVLI: # %bb.0: # %entry98; SPILL-O2-VSETVLI-NEXT: addi sp, sp, -1699; SPILL-O2-VSETVLI-NEXT: vsetvli a2, zero, e8, m2, ta, ma100; SPILL-O2-VSETVLI-NEXT: sub sp, sp, a2101; SPILL-O2-VSETVLI-NEXT: vsetvli zero, a1, e32, mf2, ta, ma102; SPILL-O2-VSETVLI-NEXT: vlseg2e32.v v8, (a0)103; SPILL-O2-VSETVLI-NEXT: addi a0, sp, 16104; SPILL-O2-VSETVLI-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill105; SPILL-O2-VSETVLI-NEXT: #APP106; SPILL-O2-VSETVLI-NEXT: #NO_APP107; SPILL-O2-VSETVLI-NEXT: vl1r.v v7, (a0) # vscale x 8-byte Folded Reload108; SPILL-O2-VSETVLI-NEXT: csrr a1, vlenb109; SPILL-O2-VSETVLI-NEXT: add a0, a0, a1110; SPILL-O2-VSETVLI-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload111; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m2, ta, ma112; SPILL-O2-VSETVLI-NEXT: add sp, sp, a0113; SPILL-O2-VSETVLI-NEXT: addi sp, sp, 16114; SPILL-O2-VSETVLI-NEXT: ret115entry:116 %0 = tail call target("riscv.vector.tuple", <vscale x 4 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) poison, ptr %base, i32 %vl, i32 5)117 call void asm sideeffect "",118 "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()119 %1 = call <vscale x 1 x i32> @llvm.riscv.tuple.extract.nxv1i32.triscv.vector.tuple_nxv4i8_2t(target("riscv.vector.tuple", <vscale x 4 x i8>, 2) %0, i32 1)120 ret <vscale x 1 x i32> %1121}122 123define <vscale x 2 x i32> @spill_zvlsseg_nxv2i32(ptr %base, i32 %vl) nounwind {124; SPILL-O0-LABEL: spill_zvlsseg_nxv2i32:125; SPILL-O0: # %bb.0: # %entry126; SPILL-O0-NEXT: addi sp, sp, -16127; SPILL-O0-NEXT: csrr a2, vlenb128; SPILL-O0-NEXT: sub sp, sp, a2129; SPILL-O0-NEXT: # implicit-def: $v8_v9130; SPILL-O0-NEXT: vsetvli zero, a1, e32, m1, tu, ma131; SPILL-O0-NEXT: vlseg2e32.v v8, (a0)132; SPILL-O0-NEXT: vsetvli zero, a1, e32, m1, tu, ma133; SPILL-O0-NEXT: vmv1r.v v8, v9134; SPILL-O0-NEXT: addi a0, sp, 16135; SPILL-O0-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill136; SPILL-O0-NEXT: #APP137; SPILL-O0-NEXT: #NO_APP138; SPILL-O0-NEXT: addi a0, sp, 16139; SPILL-O0-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload140; SPILL-O0-NEXT: csrr a0, vlenb141; SPILL-O0-NEXT: add sp, sp, a0142; SPILL-O0-NEXT: addi sp, sp, 16143; SPILL-O0-NEXT: ret144;145; SPILL-O2-LABEL: spill_zvlsseg_nxv2i32:146; SPILL-O2: # %bb.0: # %entry147; SPILL-O2-NEXT: addi sp, sp, -16148; SPILL-O2-NEXT: csrr a2, vlenb149; SPILL-O2-NEXT: slli a2, a2, 1150; SPILL-O2-NEXT: sub sp, sp, a2151; SPILL-O2-NEXT: vsetvli zero, a1, e32, m1, ta, ma152; SPILL-O2-NEXT: vlseg2e32.v v8, (a0)153; SPILL-O2-NEXT: addi a0, sp, 16154; SPILL-O2-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill155; SPILL-O2-NEXT: #APP156; SPILL-O2-NEXT: #NO_APP157; SPILL-O2-NEXT: vl1r.v v7, (a0) # vscale x 8-byte Folded Reload158; SPILL-O2-NEXT: csrr a1, vlenb159; SPILL-O2-NEXT: add a0, a0, a1160; SPILL-O2-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload161; SPILL-O2-NEXT: csrr a0, vlenb162; SPILL-O2-NEXT: slli a0, a0, 1163; SPILL-O2-NEXT: add sp, sp, a0164; SPILL-O2-NEXT: addi sp, sp, 16165; SPILL-O2-NEXT: ret166;167; SPILL-O2-VLEN128-LABEL: spill_zvlsseg_nxv2i32:168; SPILL-O2-VLEN128: # %bb.0: # %entry169; SPILL-O2-VLEN128-NEXT: addi sp, sp, -16170; SPILL-O2-VLEN128-NEXT: addi sp, sp, -32171; SPILL-O2-VLEN128-NEXT: vsetvli zero, a1, e32, m1, ta, ma172; SPILL-O2-VLEN128-NEXT: vlseg2e32.v v8, (a0)173; SPILL-O2-VLEN128-NEXT: addi a0, sp, 16174; SPILL-O2-VLEN128-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill175; SPILL-O2-VLEN128-NEXT: #APP176; SPILL-O2-VLEN128-NEXT: #NO_APP177; SPILL-O2-VLEN128-NEXT: vl1r.v v7, (a0) # vscale x 8-byte Folded Reload178; SPILL-O2-VLEN128-NEXT: li a1, 16179; SPILL-O2-VLEN128-NEXT: add a0, a0, a1180; SPILL-O2-VLEN128-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload181; SPILL-O2-VLEN128-NEXT: addi sp, sp, 32182; SPILL-O2-VLEN128-NEXT: addi sp, sp, 16183; SPILL-O2-VLEN128-NEXT: ret184;185; SPILL-O0-VSETVLI-LABEL: spill_zvlsseg_nxv2i32:186; SPILL-O0-VSETVLI: # %bb.0: # %entry187; SPILL-O0-VSETVLI-NEXT: addi sp, sp, -16188; SPILL-O0-VSETVLI-NEXT: vsetvli a2, zero, e8, m1, ta, ma189; SPILL-O0-VSETVLI-NEXT: sub sp, sp, a2190; SPILL-O0-VSETVLI-NEXT: # implicit-def: $v8_v9191; SPILL-O0-VSETVLI-NEXT: vsetvli zero, a1, e32, m1, tu, ma192; SPILL-O0-VSETVLI-NEXT: vlseg2e32.v v8, (a0)193; SPILL-O0-VSETVLI-NEXT: vsetvli zero, a1, e32, m1, tu, ma194; SPILL-O0-VSETVLI-NEXT: vmv1r.v v8, v9195; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16196; SPILL-O0-VSETVLI-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill197; SPILL-O0-VSETVLI-NEXT: #APP198; SPILL-O0-VSETVLI-NEXT: #NO_APP199; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16200; SPILL-O0-VSETVLI-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload201; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m1, ta, ma202; SPILL-O0-VSETVLI-NEXT: add sp, sp, a0203; SPILL-O0-VSETVLI-NEXT: addi sp, sp, 16204; SPILL-O0-VSETVLI-NEXT: ret205;206; SPILL-O2-VSETVLI-LABEL: spill_zvlsseg_nxv2i32:207; SPILL-O2-VSETVLI: # %bb.0: # %entry208; SPILL-O2-VSETVLI-NEXT: addi sp, sp, -16209; SPILL-O2-VSETVLI-NEXT: vsetvli a2, zero, e8, m2, ta, ma210; SPILL-O2-VSETVLI-NEXT: sub sp, sp, a2211; SPILL-O2-VSETVLI-NEXT: vsetvli zero, a1, e32, m1, ta, ma212; SPILL-O2-VSETVLI-NEXT: vlseg2e32.v v8, (a0)213; SPILL-O2-VSETVLI-NEXT: addi a0, sp, 16214; SPILL-O2-VSETVLI-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill215; SPILL-O2-VSETVLI-NEXT: #APP216; SPILL-O2-VSETVLI-NEXT: #NO_APP217; SPILL-O2-VSETVLI-NEXT: vl1r.v v7, (a0) # vscale x 8-byte Folded Reload218; SPILL-O2-VSETVLI-NEXT: csrr a1, vlenb219; SPILL-O2-VSETVLI-NEXT: add a0, a0, a1220; SPILL-O2-VSETVLI-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload221; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m2, ta, ma222; SPILL-O2-VSETVLI-NEXT: add sp, sp, a0223; SPILL-O2-VSETVLI-NEXT: addi sp, sp, 16224; SPILL-O2-VSETVLI-NEXT: ret225entry:226 %0 = tail call target("riscv.vector.tuple", <vscale x 8 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) poison, ptr %base, i32 %vl, i32 5)227 call void asm sideeffect "",228 "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()229 %1 = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_2t(target("riscv.vector.tuple", <vscale x 8 x i8>, 2) %0, i32 1)230 ret <vscale x 2 x i32> %1231}232 233define <vscale x 4 x i32> @spill_zvlsseg_nxv4i32(ptr %base, i32 %vl) nounwind {234; SPILL-O0-LABEL: spill_zvlsseg_nxv4i32:235; SPILL-O0: # %bb.0: # %entry236; SPILL-O0-NEXT: addi sp, sp, -16237; SPILL-O0-NEXT: csrr a2, vlenb238; SPILL-O0-NEXT: slli a2, a2, 1239; SPILL-O0-NEXT: sub sp, sp, a2240; SPILL-O0-NEXT: # implicit-def: $v8m2_v10m2241; SPILL-O0-NEXT: vsetvli zero, a1, e32, m2, tu, ma242; SPILL-O0-NEXT: vlseg2e32.v v8, (a0)243; SPILL-O0-NEXT: vsetvli zero, a1, e32, m2, tu, ma244; SPILL-O0-NEXT: vmv2r.v v8, v10245; SPILL-O0-NEXT: addi a0, sp, 16246; SPILL-O0-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill247; SPILL-O0-NEXT: #APP248; SPILL-O0-NEXT: #NO_APP249; SPILL-O0-NEXT: addi a0, sp, 16250; SPILL-O0-NEXT: vl2r.v v8, (a0) # vscale x 16-byte Folded Reload251; SPILL-O0-NEXT: csrr a0, vlenb252; SPILL-O0-NEXT: slli a0, a0, 1253; SPILL-O0-NEXT: add sp, sp, a0254; SPILL-O0-NEXT: addi sp, sp, 16255; SPILL-O0-NEXT: ret256;257; SPILL-O2-LABEL: spill_zvlsseg_nxv4i32:258; SPILL-O2: # %bb.0: # %entry259; SPILL-O2-NEXT: addi sp, sp, -16260; SPILL-O2-NEXT: csrr a2, vlenb261; SPILL-O2-NEXT: slli a2, a2, 2262; SPILL-O2-NEXT: sub sp, sp, a2263; SPILL-O2-NEXT: vsetvli zero, a1, e32, m2, ta, ma264; SPILL-O2-NEXT: vlseg2e32.v v8, (a0)265; SPILL-O2-NEXT: addi a0, sp, 16266; SPILL-O2-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill267; SPILL-O2-NEXT: #APP268; SPILL-O2-NEXT: #NO_APP269; SPILL-O2-NEXT: vl2r.v v6, (a0) # vscale x 16-byte Folded Reload270; SPILL-O2-NEXT: csrr a1, vlenb271; SPILL-O2-NEXT: slli a1, a1, 1272; SPILL-O2-NEXT: add a0, a0, a1273; SPILL-O2-NEXT: vl2r.v v8, (a0) # vscale x 16-byte Folded Reload274; SPILL-O2-NEXT: csrr a0, vlenb275; SPILL-O2-NEXT: slli a0, a0, 2276; SPILL-O2-NEXT: add sp, sp, a0277; SPILL-O2-NEXT: addi sp, sp, 16278; SPILL-O2-NEXT: ret279;280; SPILL-O2-VLEN128-LABEL: spill_zvlsseg_nxv4i32:281; SPILL-O2-VLEN128: # %bb.0: # %entry282; SPILL-O2-VLEN128-NEXT: addi sp, sp, -16283; SPILL-O2-VLEN128-NEXT: addi sp, sp, -64284; SPILL-O2-VLEN128-NEXT: vsetvli zero, a1, e32, m2, ta, ma285; SPILL-O2-VLEN128-NEXT: vlseg2e32.v v8, (a0)286; SPILL-O2-VLEN128-NEXT: addi a0, sp, 16287; SPILL-O2-VLEN128-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill288; SPILL-O2-VLEN128-NEXT: #APP289; SPILL-O2-VLEN128-NEXT: #NO_APP290; SPILL-O2-VLEN128-NEXT: vl2r.v v6, (a0) # vscale x 16-byte Folded Reload291; SPILL-O2-VLEN128-NEXT: li a1, 32292; SPILL-O2-VLEN128-NEXT: add a0, a0, a1293; SPILL-O2-VLEN128-NEXT: vl2r.v v8, (a0) # vscale x 16-byte Folded Reload294; SPILL-O2-VLEN128-NEXT: addi sp, sp, 64295; SPILL-O2-VLEN128-NEXT: addi sp, sp, 16296; SPILL-O2-VLEN128-NEXT: ret297;298; SPILL-O0-VSETVLI-LABEL: spill_zvlsseg_nxv4i32:299; SPILL-O0-VSETVLI: # %bb.0: # %entry300; SPILL-O0-VSETVLI-NEXT: addi sp, sp, -16301; SPILL-O0-VSETVLI-NEXT: vsetvli a2, zero, e8, m2, ta, ma302; SPILL-O0-VSETVLI-NEXT: sub sp, sp, a2303; SPILL-O0-VSETVLI-NEXT: # implicit-def: $v8m2_v10m2304; SPILL-O0-VSETVLI-NEXT: vsetvli zero, a1, e32, m2, tu, ma305; SPILL-O0-VSETVLI-NEXT: vlseg2e32.v v8, (a0)306; SPILL-O0-VSETVLI-NEXT: vsetvli zero, a1, e32, m2, tu, ma307; SPILL-O0-VSETVLI-NEXT: vmv2r.v v8, v10308; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16309; SPILL-O0-VSETVLI-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill310; SPILL-O0-VSETVLI-NEXT: #APP311; SPILL-O0-VSETVLI-NEXT: #NO_APP312; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16313; SPILL-O0-VSETVLI-NEXT: vl2r.v v8, (a0) # vscale x 16-byte Folded Reload314; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m2, ta, ma315; SPILL-O0-VSETVLI-NEXT: add sp, sp, a0316; SPILL-O0-VSETVLI-NEXT: addi sp, sp, 16317; SPILL-O0-VSETVLI-NEXT: ret318;319; SPILL-O2-VSETVLI-LABEL: spill_zvlsseg_nxv4i32:320; SPILL-O2-VSETVLI: # %bb.0: # %entry321; SPILL-O2-VSETVLI-NEXT: addi sp, sp, -16322; SPILL-O2-VSETVLI-NEXT: vsetvli a2, zero, e8, m4, ta, ma323; SPILL-O2-VSETVLI-NEXT: sub sp, sp, a2324; SPILL-O2-VSETVLI-NEXT: vsetvli zero, a1, e32, m2, ta, ma325; SPILL-O2-VSETVLI-NEXT: vlseg2e32.v v8, (a0)326; SPILL-O2-VSETVLI-NEXT: addi a0, sp, 16327; SPILL-O2-VSETVLI-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill328; SPILL-O2-VSETVLI-NEXT: #APP329; SPILL-O2-VSETVLI-NEXT: #NO_APP330; SPILL-O2-VSETVLI-NEXT: vl2r.v v6, (a0) # vscale x 16-byte Folded Reload331; SPILL-O2-VSETVLI-NEXT: csrr a1, vlenb332; SPILL-O2-VSETVLI-NEXT: slli a1, a1, 1333; SPILL-O2-VSETVLI-NEXT: add a0, a0, a1334; SPILL-O2-VSETVLI-NEXT: vl2r.v v8, (a0) # vscale x 16-byte Folded Reload335; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m4, ta, ma336; SPILL-O2-VSETVLI-NEXT: add sp, sp, a0337; SPILL-O2-VSETVLI-NEXT: addi sp, sp, 16338; SPILL-O2-VSETVLI-NEXT: ret339entry:340 %0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison, ptr %base, i32 %vl, i32 5)341 call void asm sideeffect "",342 "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()343 %1 = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %0, i32 1)344 ret <vscale x 4 x i32> %1345}346 347define <vscale x 8 x i32> @spill_zvlsseg_nxv8i32(ptr %base, i32 %vl) nounwind {348; SPILL-O0-LABEL: spill_zvlsseg_nxv8i32:349; SPILL-O0: # %bb.0: # %entry350; SPILL-O0-NEXT: addi sp, sp, -16351; SPILL-O0-NEXT: csrr a2, vlenb352; SPILL-O0-NEXT: slli a2, a2, 2353; SPILL-O0-NEXT: sub sp, sp, a2354; SPILL-O0-NEXT: # implicit-def: $v8m4_v12m4355; SPILL-O0-NEXT: vsetvli zero, a1, e32, m4, tu, ma356; SPILL-O0-NEXT: vlseg2e32.v v8, (a0)357; SPILL-O0-NEXT: vsetvli zero, a1, e32, m4, tu, ma358; SPILL-O0-NEXT: vmv4r.v v8, v12359; SPILL-O0-NEXT: addi a0, sp, 16360; SPILL-O0-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill361; SPILL-O0-NEXT: #APP362; SPILL-O0-NEXT: #NO_APP363; SPILL-O0-NEXT: addi a0, sp, 16364; SPILL-O0-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload365; SPILL-O0-NEXT: csrr a0, vlenb366; SPILL-O0-NEXT: slli a0, a0, 2367; SPILL-O0-NEXT: add sp, sp, a0368; SPILL-O0-NEXT: addi sp, sp, 16369; SPILL-O0-NEXT: ret370;371; SPILL-O2-LABEL: spill_zvlsseg_nxv8i32:372; SPILL-O2: # %bb.0: # %entry373; SPILL-O2-NEXT: addi sp, sp, -16374; SPILL-O2-NEXT: csrr a2, vlenb375; SPILL-O2-NEXT: slli a2, a2, 3376; SPILL-O2-NEXT: sub sp, sp, a2377; SPILL-O2-NEXT: vsetvli zero, a1, e32, m4, ta, ma378; SPILL-O2-NEXT: vlseg2e32.v v8, (a0)379; SPILL-O2-NEXT: addi a0, sp, 16380; SPILL-O2-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill381; SPILL-O2-NEXT: #APP382; SPILL-O2-NEXT: #NO_APP383; SPILL-O2-NEXT: vl4r.v v4, (a0) # vscale x 32-byte Folded Reload384; SPILL-O2-NEXT: csrr a1, vlenb385; SPILL-O2-NEXT: slli a1, a1, 2386; SPILL-O2-NEXT: add a0, a0, a1387; SPILL-O2-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload388; SPILL-O2-NEXT: csrr a0, vlenb389; SPILL-O2-NEXT: slli a0, a0, 3390; SPILL-O2-NEXT: add sp, sp, a0391; SPILL-O2-NEXT: addi sp, sp, 16392; SPILL-O2-NEXT: ret393;394; SPILL-O2-VLEN128-LABEL: spill_zvlsseg_nxv8i32:395; SPILL-O2-VLEN128: # %bb.0: # %entry396; SPILL-O2-VLEN128-NEXT: addi sp, sp, -16397; SPILL-O2-VLEN128-NEXT: addi sp, sp, -128398; SPILL-O2-VLEN128-NEXT: vsetvli zero, a1, e32, m4, ta, ma399; SPILL-O2-VLEN128-NEXT: vlseg2e32.v v8, (a0)400; SPILL-O2-VLEN128-NEXT: addi a0, sp, 16401; SPILL-O2-VLEN128-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill402; SPILL-O2-VLEN128-NEXT: #APP403; SPILL-O2-VLEN128-NEXT: #NO_APP404; SPILL-O2-VLEN128-NEXT: vl4r.v v4, (a0) # vscale x 32-byte Folded Reload405; SPILL-O2-VLEN128-NEXT: li a1, 64406; SPILL-O2-VLEN128-NEXT: add a0, a0, a1407; SPILL-O2-VLEN128-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload408; SPILL-O2-VLEN128-NEXT: addi sp, sp, 128409; SPILL-O2-VLEN128-NEXT: addi sp, sp, 16410; SPILL-O2-VLEN128-NEXT: ret411;412; SPILL-O0-VSETVLI-LABEL: spill_zvlsseg_nxv8i32:413; SPILL-O0-VSETVLI: # %bb.0: # %entry414; SPILL-O0-VSETVLI-NEXT: addi sp, sp, -16415; SPILL-O0-VSETVLI-NEXT: vsetvli a2, zero, e8, m4, ta, ma416; SPILL-O0-VSETVLI-NEXT: sub sp, sp, a2417; SPILL-O0-VSETVLI-NEXT: # implicit-def: $v8m4_v12m4418; SPILL-O0-VSETVLI-NEXT: vsetvli zero, a1, e32, m4, tu, ma419; SPILL-O0-VSETVLI-NEXT: vlseg2e32.v v8, (a0)420; SPILL-O0-VSETVLI-NEXT: vsetvli zero, a1, e32, m4, tu, ma421; SPILL-O0-VSETVLI-NEXT: vmv4r.v v8, v12422; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16423; SPILL-O0-VSETVLI-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill424; SPILL-O0-VSETVLI-NEXT: #APP425; SPILL-O0-VSETVLI-NEXT: #NO_APP426; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16427; SPILL-O0-VSETVLI-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload428; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m4, ta, ma429; SPILL-O0-VSETVLI-NEXT: add sp, sp, a0430; SPILL-O0-VSETVLI-NEXT: addi sp, sp, 16431; SPILL-O0-VSETVLI-NEXT: ret432;433; SPILL-O2-VSETVLI-LABEL: spill_zvlsseg_nxv8i32:434; SPILL-O2-VSETVLI: # %bb.0: # %entry435; SPILL-O2-VSETVLI-NEXT: addi sp, sp, -16436; SPILL-O2-VSETVLI-NEXT: vsetvli a2, zero, e8, m8, ta, ma437; SPILL-O2-VSETVLI-NEXT: sub sp, sp, a2438; SPILL-O2-VSETVLI-NEXT: vsetvli zero, a1, e32, m4, ta, ma439; SPILL-O2-VSETVLI-NEXT: vlseg2e32.v v8, (a0)440; SPILL-O2-VSETVLI-NEXT: addi a0, sp, 16441; SPILL-O2-VSETVLI-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill442; SPILL-O2-VSETVLI-NEXT: #APP443; SPILL-O2-VSETVLI-NEXT: #NO_APP444; SPILL-O2-VSETVLI-NEXT: vl4r.v v4, (a0) # vscale x 32-byte Folded Reload445; SPILL-O2-VSETVLI-NEXT: csrr a1, vlenb446; SPILL-O2-VSETVLI-NEXT: slli a1, a1, 2447; SPILL-O2-VSETVLI-NEXT: add a0, a0, a1448; SPILL-O2-VSETVLI-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload449; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m8, ta, ma450; SPILL-O2-VSETVLI-NEXT: add sp, sp, a0451; SPILL-O2-VSETVLI-NEXT: addi sp, sp, 16452; SPILL-O2-VSETVLI-NEXT: ret453entry:454 %0 = tail call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr %base, i32 %vl, i32 5)455 call void asm sideeffect "",456 "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()457 %1 = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) %0, i32 1)458 ret <vscale x 8 x i32> %1459}460 461define <vscale x 4 x i32> @spill_zvlsseg3_nxv4i32(ptr %base, i32 %vl) nounwind {462; SPILL-O0-LABEL: spill_zvlsseg3_nxv4i32:463; SPILL-O0: # %bb.0: # %entry464; SPILL-O0-NEXT: addi sp, sp, -16465; SPILL-O0-NEXT: csrr a2, vlenb466; SPILL-O0-NEXT: slli a2, a2, 1467; SPILL-O0-NEXT: sub sp, sp, a2468; SPILL-O0-NEXT: # implicit-def: $v8m2_v10m2_v12m2469; SPILL-O0-NEXT: vsetvli zero, a1, e32, m2, tu, ma470; SPILL-O0-NEXT: vlseg3e32.v v8, (a0)471; SPILL-O0-NEXT: vsetvli zero, a1, e32, m2, tu, ma472; SPILL-O0-NEXT: vmv2r.v v8, v10473; SPILL-O0-NEXT: addi a0, sp, 16474; SPILL-O0-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill475; SPILL-O0-NEXT: #APP476; SPILL-O0-NEXT: #NO_APP477; SPILL-O0-NEXT: addi a0, sp, 16478; SPILL-O0-NEXT: vl2r.v v8, (a0) # vscale x 16-byte Folded Reload479; SPILL-O0-NEXT: csrr a0, vlenb480; SPILL-O0-NEXT: slli a0, a0, 1481; SPILL-O0-NEXT: add sp, sp, a0482; SPILL-O0-NEXT: addi sp, sp, 16483; SPILL-O0-NEXT: ret484;485; SPILL-O2-LABEL: spill_zvlsseg3_nxv4i32:486; SPILL-O2: # %bb.0: # %entry487; SPILL-O2-NEXT: addi sp, sp, -16488; SPILL-O2-NEXT: csrr a2, vlenb489; SPILL-O2-NEXT: li a3, 6490; SPILL-O2-NEXT: mul a2, a2, a3491; SPILL-O2-NEXT: sub sp, sp, a2492; SPILL-O2-NEXT: vsetvli zero, a1, e32, m2, ta, ma493; SPILL-O2-NEXT: vlseg3e32.v v8, (a0)494; SPILL-O2-NEXT: addi a0, sp, 16495; SPILL-O2-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill496; SPILL-O2-NEXT: csrr a1, vlenb497; SPILL-O2-NEXT: slli a1, a1, 2498; SPILL-O2-NEXT: add a0, a0, a1499; SPILL-O2-NEXT: vs2r.v v12, (a0) # vscale x 16-byte Folded Spill500; SPILL-O2-NEXT: #APP501; SPILL-O2-NEXT: #NO_APP502; SPILL-O2-NEXT: addi a0, sp, 16503; SPILL-O2-NEXT: vl2r.v v6, (a0) # vscale x 16-byte Folded Reload504; SPILL-O2-NEXT: csrr a1, vlenb505; SPILL-O2-NEXT: slli a1, a1, 1506; SPILL-O2-NEXT: add a0, a0, a1507; SPILL-O2-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload508; SPILL-O2-NEXT: csrr a0, vlenb509; SPILL-O2-NEXT: li a1, 6510; SPILL-O2-NEXT: mul a0, a0, a1511; SPILL-O2-NEXT: add sp, sp, a0512; SPILL-O2-NEXT: addi sp, sp, 16513; SPILL-O2-NEXT: ret514;515; SPILL-O2-VLEN128-LABEL: spill_zvlsseg3_nxv4i32:516; SPILL-O2-VLEN128: # %bb.0: # %entry517; SPILL-O2-VLEN128-NEXT: addi sp, sp, -16518; SPILL-O2-VLEN128-NEXT: addi sp, sp, -96519; SPILL-O2-VLEN128-NEXT: vsetvli zero, a1, e32, m2, ta, ma520; SPILL-O2-VLEN128-NEXT: vlseg3e32.v v8, (a0)521; SPILL-O2-VLEN128-NEXT: addi a0, sp, 16522; SPILL-O2-VLEN128-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill523; SPILL-O2-VLEN128-NEXT: li a1, 64524; SPILL-O2-VLEN128-NEXT: add a0, a0, a1525; SPILL-O2-VLEN128-NEXT: vs2r.v v12, (a0) # vscale x 16-byte Folded Spill526; SPILL-O2-VLEN128-NEXT: #APP527; SPILL-O2-VLEN128-NEXT: #NO_APP528; SPILL-O2-VLEN128-NEXT: addi a0, sp, 16529; SPILL-O2-VLEN128-NEXT: vl2r.v v6, (a0) # vscale x 16-byte Folded Reload530; SPILL-O2-VLEN128-NEXT: li a1, 32531; SPILL-O2-VLEN128-NEXT: add a0, a0, a1532; SPILL-O2-VLEN128-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload533; SPILL-O2-VLEN128-NEXT: addi sp, sp, 96534; SPILL-O2-VLEN128-NEXT: addi sp, sp, 16535; SPILL-O2-VLEN128-NEXT: ret536;537; SPILL-O0-VSETVLI-LABEL: spill_zvlsseg3_nxv4i32:538; SPILL-O0-VSETVLI: # %bb.0: # %entry539; SPILL-O0-VSETVLI-NEXT: addi sp, sp, -16540; SPILL-O0-VSETVLI-NEXT: vsetvli a2, zero, e8, m2, ta, ma541; SPILL-O0-VSETVLI-NEXT: sub sp, sp, a2542; SPILL-O0-VSETVLI-NEXT: # implicit-def: $v8m2_v10m2_v12m2543; SPILL-O0-VSETVLI-NEXT: vsetvli zero, a1, e32, m2, tu, ma544; SPILL-O0-VSETVLI-NEXT: vlseg3e32.v v8, (a0)545; SPILL-O0-VSETVLI-NEXT: vsetvli zero, a1, e32, m2, tu, ma546; SPILL-O0-VSETVLI-NEXT: vmv2r.v v8, v10547; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16548; SPILL-O0-VSETVLI-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill549; SPILL-O0-VSETVLI-NEXT: #APP550; SPILL-O0-VSETVLI-NEXT: #NO_APP551; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16552; SPILL-O0-VSETVLI-NEXT: vl2r.v v8, (a0) # vscale x 16-byte Folded Reload553; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m2, ta, ma554; SPILL-O0-VSETVLI-NEXT: add sp, sp, a0555; SPILL-O0-VSETVLI-NEXT: addi sp, sp, 16556; SPILL-O0-VSETVLI-NEXT: ret557;558; SPILL-O2-VSETVLI-LABEL: spill_zvlsseg3_nxv4i32:559; SPILL-O2-VSETVLI: # %bb.0: # %entry560; SPILL-O2-VSETVLI-NEXT: addi sp, sp, -16561; SPILL-O2-VSETVLI-NEXT: vsetvli a2, zero, e8, m1, ta, ma562; SPILL-O2-VSETVLI-NEXT: li a3, 6563; SPILL-O2-VSETVLI-NEXT: mul a2, a2, a3564; SPILL-O2-VSETVLI-NEXT: sub sp, sp, a2565; SPILL-O2-VSETVLI-NEXT: vsetvli zero, a1, e32, m2, ta, ma566; SPILL-O2-VSETVLI-NEXT: vlseg3e32.v v8, (a0)567; SPILL-O2-VSETVLI-NEXT: addi a0, sp, 16568; SPILL-O2-VSETVLI-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill569; SPILL-O2-VSETVLI-NEXT: csrr a1, vlenb570; SPILL-O2-VSETVLI-NEXT: slli a1, a1, 2571; SPILL-O2-VSETVLI-NEXT: add a0, a0, a1572; SPILL-O2-VSETVLI-NEXT: vs2r.v v12, (a0) # vscale x 16-byte Folded Spill573; SPILL-O2-VSETVLI-NEXT: #APP574; SPILL-O2-VSETVLI-NEXT: #NO_APP575; SPILL-O2-VSETVLI-NEXT: addi a0, sp, 16576; SPILL-O2-VSETVLI-NEXT: vl2r.v v6, (a0) # vscale x 16-byte Folded Reload577; SPILL-O2-VSETVLI-NEXT: csrr a1, vlenb578; SPILL-O2-VSETVLI-NEXT: slli a1, a1, 1579; SPILL-O2-VSETVLI-NEXT: add a0, a0, a1580; SPILL-O2-VSETVLI-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload581; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m1, ta, ma582; SPILL-O2-VSETVLI-NEXT: li a1, 6583; SPILL-O2-VSETVLI-NEXT: mul a0, a0, a1584; SPILL-O2-VSETVLI-NEXT: add sp, sp, a0585; SPILL-O2-VSETVLI-NEXT: addi sp, sp, 16586; SPILL-O2-VSETVLI-NEXT: ret587entry:588 %0 = tail call target("riscv.vector.tuple", <vscale x 16 x i8>, 3) @llvm.riscv.vlseg3.triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) poison, ptr %base, i32 %vl, i32 5)589 call void asm sideeffect "",590 "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()591 %1 = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_3t(target("riscv.vector.tuple", <vscale x 16 x i8>, 3) %0, i32 1)592 ret <vscale x 4 x i32> %1593}594 595