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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+v -O0 < %s \3; RUN: | FileCheck --check-prefix=SPILL-O0 %s4; RUN: llc -mtriple=riscv64 -mattr=+v -O2 < %s \5; RUN: | FileCheck --check-prefix=SPILL-O2 %s6; RUN: llc -mtriple=riscv64 -mattr=+v,+d -mattr=+d -riscv-v-vector-bits-max=128 -O2 < %s \7; RUN: | FileCheck --check-prefix=SPILL-O2-VLEN128 %s8; RUN: llc -mtriple=riscv64 -mattr=+v,+prefer-vsetvli-over-read-vlenb -O0 < %s \9; RUN: | FileCheck --check-prefix=SPILL-O0-VSETVLI %s10; RUN: llc -mtriple=riscv64 -mattr=+v,+prefer-vsetvli-over-read-vlenb -O2 < %s \11; RUN: | FileCheck --check-prefix=SPILL-O2-VSETVLI %s12 13define <vscale x 1 x i64> @spill_lmul_1(<vscale x 1 x i64> %va) nounwind {14; SPILL-O0-LABEL: spill_lmul_1:15; SPILL-O0: # %bb.0: # %entry16; SPILL-O0-NEXT: addi sp, sp, -1617; SPILL-O0-NEXT: csrr a0, vlenb18; SPILL-O0-NEXT: sub sp, sp, a019; SPILL-O0-NEXT: addi a0, sp, 1620; SPILL-O0-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill21; SPILL-O0-NEXT: #APP22; SPILL-O0-NEXT: #NO_APP23; SPILL-O0-NEXT: addi a0, sp, 1624; SPILL-O0-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload25; SPILL-O0-NEXT: csrr a0, vlenb26; SPILL-O0-NEXT: add sp, sp, a027; SPILL-O0-NEXT: addi sp, sp, 1628; SPILL-O0-NEXT: ret29;30; SPILL-O2-LABEL: spill_lmul_1:31; SPILL-O2: # %bb.0: # %entry32; SPILL-O2-NEXT: addi sp, sp, -1633; SPILL-O2-NEXT: csrr a0, vlenb34; SPILL-O2-NEXT: sub sp, sp, a035; SPILL-O2-NEXT: addi a0, sp, 1636; SPILL-O2-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill37; SPILL-O2-NEXT: #APP38; SPILL-O2-NEXT: #NO_APP39; SPILL-O2-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload40; SPILL-O2-NEXT: csrr a0, vlenb41; SPILL-O2-NEXT: add sp, sp, a042; SPILL-O2-NEXT: addi sp, sp, 1643; SPILL-O2-NEXT: ret44;45; SPILL-O2-VLEN128-LABEL: spill_lmul_1:46; SPILL-O2-VLEN128: # %bb.0: # %entry47; SPILL-O2-VLEN128-NEXT: addi sp, sp, -1648; SPILL-O2-VLEN128-NEXT: addi sp, sp, -1649; SPILL-O2-VLEN128-NEXT: addi a0, sp, 1650; SPILL-O2-VLEN128-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill51; SPILL-O2-VLEN128-NEXT: #APP52; SPILL-O2-VLEN128-NEXT: #NO_APP53; SPILL-O2-VLEN128-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload54; SPILL-O2-VLEN128-NEXT: addi sp, sp, 1655; SPILL-O2-VLEN128-NEXT: addi sp, sp, 1656; SPILL-O2-VLEN128-NEXT: ret57;58; SPILL-O0-VSETVLI-LABEL: spill_lmul_1:59; SPILL-O0-VSETVLI: # %bb.0: # %entry60; SPILL-O0-VSETVLI-NEXT: addi sp, sp, -1661; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m1, ta, ma62; SPILL-O0-VSETVLI-NEXT: sub sp, sp, a063; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 1664; SPILL-O0-VSETVLI-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill65; SPILL-O0-VSETVLI-NEXT: #APP66; SPILL-O0-VSETVLI-NEXT: #NO_APP67; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 1668; SPILL-O0-VSETVLI-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload69; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m1, ta, ma70; SPILL-O0-VSETVLI-NEXT: add sp, sp, a071; SPILL-O0-VSETVLI-NEXT: addi sp, sp, 1672; SPILL-O0-VSETVLI-NEXT: ret73;74; SPILL-O2-VSETVLI-LABEL: spill_lmul_1:75; SPILL-O2-VSETVLI: # %bb.0: # %entry76; SPILL-O2-VSETVLI-NEXT: addi sp, sp, -1677; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m1, ta, ma78; SPILL-O2-VSETVLI-NEXT: sub sp, sp, a079; SPILL-O2-VSETVLI-NEXT: addi a0, sp, 1680; SPILL-O2-VSETVLI-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill81; SPILL-O2-VSETVLI-NEXT: #APP82; SPILL-O2-VSETVLI-NEXT: #NO_APP83; SPILL-O2-VSETVLI-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload84; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m1, ta, ma85; SPILL-O2-VSETVLI-NEXT: add sp, sp, a086; SPILL-O2-VSETVLI-NEXT: addi sp, sp, 1687; SPILL-O2-VSETVLI-NEXT: ret88entry:89 call void asm sideeffect "",90 "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()91 92 ret <vscale x 1 x i64> %va93}94 95define <vscale x 2 x i64> @spill_lmul_2(<vscale x 2 x i64> %va) nounwind {96; SPILL-O0-LABEL: spill_lmul_2:97; SPILL-O0: # %bb.0: # %entry98; SPILL-O0-NEXT: addi sp, sp, -1699; SPILL-O0-NEXT: csrr a0, vlenb100; SPILL-O0-NEXT: slli a0, a0, 1101; SPILL-O0-NEXT: sub sp, sp, a0102; SPILL-O0-NEXT: addi a0, sp, 16103; SPILL-O0-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill104; SPILL-O0-NEXT: #APP105; SPILL-O0-NEXT: #NO_APP106; SPILL-O0-NEXT: addi a0, sp, 16107; SPILL-O0-NEXT: vl2r.v v8, (a0) # vscale x 16-byte Folded Reload108; SPILL-O0-NEXT: csrr a0, vlenb109; SPILL-O0-NEXT: slli a0, a0, 1110; SPILL-O0-NEXT: add sp, sp, a0111; SPILL-O0-NEXT: addi sp, sp, 16112; SPILL-O0-NEXT: ret113;114; SPILL-O2-LABEL: spill_lmul_2:115; SPILL-O2: # %bb.0: # %entry116; SPILL-O2-NEXT: addi sp, sp, -16117; SPILL-O2-NEXT: csrr a0, vlenb118; SPILL-O2-NEXT: slli a0, a0, 1119; SPILL-O2-NEXT: sub sp, sp, a0120; SPILL-O2-NEXT: addi a0, sp, 16121; SPILL-O2-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill122; SPILL-O2-NEXT: #APP123; SPILL-O2-NEXT: #NO_APP124; SPILL-O2-NEXT: vl2r.v v8, (a0) # vscale x 16-byte Folded Reload125; SPILL-O2-NEXT: csrr a0, vlenb126; SPILL-O2-NEXT: slli a0, a0, 1127; SPILL-O2-NEXT: add sp, sp, a0128; SPILL-O2-NEXT: addi sp, sp, 16129; SPILL-O2-NEXT: ret130;131; SPILL-O2-VLEN128-LABEL: spill_lmul_2:132; SPILL-O2-VLEN128: # %bb.0: # %entry133; SPILL-O2-VLEN128-NEXT: addi sp, sp, -16134; SPILL-O2-VLEN128-NEXT: addi sp, sp, -32135; SPILL-O2-VLEN128-NEXT: addi a0, sp, 16136; SPILL-O2-VLEN128-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill137; SPILL-O2-VLEN128-NEXT: #APP138; SPILL-O2-VLEN128-NEXT: #NO_APP139; SPILL-O2-VLEN128-NEXT: vl2r.v v8, (a0) # vscale x 16-byte Folded Reload140; SPILL-O2-VLEN128-NEXT: addi sp, sp, 32141; SPILL-O2-VLEN128-NEXT: addi sp, sp, 16142; SPILL-O2-VLEN128-NEXT: ret143;144; SPILL-O0-VSETVLI-LABEL: spill_lmul_2:145; SPILL-O0-VSETVLI: # %bb.0: # %entry146; SPILL-O0-VSETVLI-NEXT: addi sp, sp, -16147; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m2, ta, ma148; SPILL-O0-VSETVLI-NEXT: sub sp, sp, a0149; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16150; SPILL-O0-VSETVLI-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill151; SPILL-O0-VSETVLI-NEXT: #APP152; SPILL-O0-VSETVLI-NEXT: #NO_APP153; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16154; SPILL-O0-VSETVLI-NEXT: vl2r.v v8, (a0) # vscale x 16-byte Folded Reload155; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m2, ta, ma156; SPILL-O0-VSETVLI-NEXT: add sp, sp, a0157; SPILL-O0-VSETVLI-NEXT: addi sp, sp, 16158; SPILL-O0-VSETVLI-NEXT: ret159;160; SPILL-O2-VSETVLI-LABEL: spill_lmul_2:161; SPILL-O2-VSETVLI: # %bb.0: # %entry162; SPILL-O2-VSETVLI-NEXT: addi sp, sp, -16163; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m2, ta, ma164; SPILL-O2-VSETVLI-NEXT: sub sp, sp, a0165; SPILL-O2-VSETVLI-NEXT: addi a0, sp, 16166; SPILL-O2-VSETVLI-NEXT: vs2r.v v8, (a0) # vscale x 16-byte Folded Spill167; SPILL-O2-VSETVLI-NEXT: #APP168; SPILL-O2-VSETVLI-NEXT: #NO_APP169; SPILL-O2-VSETVLI-NEXT: vl2r.v v8, (a0) # vscale x 16-byte Folded Reload170; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m2, ta, ma171; SPILL-O2-VSETVLI-NEXT: add sp, sp, a0172; SPILL-O2-VSETVLI-NEXT: addi sp, sp, 16173; SPILL-O2-VSETVLI-NEXT: ret174entry:175 call void asm sideeffect "",176 "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()177 178 ret <vscale x 2 x i64> %va179}180 181define <vscale x 4 x i64> @spill_lmul_4(<vscale x 4 x i64> %va) nounwind {182; SPILL-O0-LABEL: spill_lmul_4:183; SPILL-O0: # %bb.0: # %entry184; SPILL-O0-NEXT: addi sp, sp, -16185; SPILL-O0-NEXT: csrr a0, vlenb186; SPILL-O0-NEXT: slli a0, a0, 2187; SPILL-O0-NEXT: sub sp, sp, a0188; SPILL-O0-NEXT: addi a0, sp, 16189; SPILL-O0-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill190; SPILL-O0-NEXT: #APP191; SPILL-O0-NEXT: #NO_APP192; SPILL-O0-NEXT: addi a0, sp, 16193; SPILL-O0-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload194; SPILL-O0-NEXT: csrr a0, vlenb195; SPILL-O0-NEXT: slli a0, a0, 2196; SPILL-O0-NEXT: add sp, sp, a0197; SPILL-O0-NEXT: addi sp, sp, 16198; SPILL-O0-NEXT: ret199;200; SPILL-O2-LABEL: spill_lmul_4:201; SPILL-O2: # %bb.0: # %entry202; SPILL-O2-NEXT: addi sp, sp, -16203; SPILL-O2-NEXT: csrr a0, vlenb204; SPILL-O2-NEXT: slli a0, a0, 2205; SPILL-O2-NEXT: sub sp, sp, a0206; SPILL-O2-NEXT: addi a0, sp, 16207; SPILL-O2-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill208; SPILL-O2-NEXT: #APP209; SPILL-O2-NEXT: #NO_APP210; SPILL-O2-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload211; SPILL-O2-NEXT: csrr a0, vlenb212; SPILL-O2-NEXT: slli a0, a0, 2213; SPILL-O2-NEXT: add sp, sp, a0214; SPILL-O2-NEXT: addi sp, sp, 16215; SPILL-O2-NEXT: ret216;217; SPILL-O2-VLEN128-LABEL: spill_lmul_4:218; SPILL-O2-VLEN128: # %bb.0: # %entry219; SPILL-O2-VLEN128-NEXT: addi sp, sp, -16220; SPILL-O2-VLEN128-NEXT: addi sp, sp, -64221; SPILL-O2-VLEN128-NEXT: addi a0, sp, 16222; SPILL-O2-VLEN128-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill223; SPILL-O2-VLEN128-NEXT: #APP224; SPILL-O2-VLEN128-NEXT: #NO_APP225; SPILL-O2-VLEN128-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload226; SPILL-O2-VLEN128-NEXT: addi sp, sp, 64227; SPILL-O2-VLEN128-NEXT: addi sp, sp, 16228; SPILL-O2-VLEN128-NEXT: ret229;230; SPILL-O0-VSETVLI-LABEL: spill_lmul_4:231; SPILL-O0-VSETVLI: # %bb.0: # %entry232; SPILL-O0-VSETVLI-NEXT: addi sp, sp, -16233; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m4, ta, ma234; SPILL-O0-VSETVLI-NEXT: sub sp, sp, a0235; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16236; SPILL-O0-VSETVLI-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill237; SPILL-O0-VSETVLI-NEXT: #APP238; SPILL-O0-VSETVLI-NEXT: #NO_APP239; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16240; SPILL-O0-VSETVLI-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload241; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m4, ta, ma242; SPILL-O0-VSETVLI-NEXT: add sp, sp, a0243; SPILL-O0-VSETVLI-NEXT: addi sp, sp, 16244; SPILL-O0-VSETVLI-NEXT: ret245;246; SPILL-O2-VSETVLI-LABEL: spill_lmul_4:247; SPILL-O2-VSETVLI: # %bb.0: # %entry248; SPILL-O2-VSETVLI-NEXT: addi sp, sp, -16249; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m4, ta, ma250; SPILL-O2-VSETVLI-NEXT: sub sp, sp, a0251; SPILL-O2-VSETVLI-NEXT: addi a0, sp, 16252; SPILL-O2-VSETVLI-NEXT: vs4r.v v8, (a0) # vscale x 32-byte Folded Spill253; SPILL-O2-VSETVLI-NEXT: #APP254; SPILL-O2-VSETVLI-NEXT: #NO_APP255; SPILL-O2-VSETVLI-NEXT: vl4r.v v8, (a0) # vscale x 32-byte Folded Reload256; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m4, ta, ma257; SPILL-O2-VSETVLI-NEXT: add sp, sp, a0258; SPILL-O2-VSETVLI-NEXT: addi sp, sp, 16259; SPILL-O2-VSETVLI-NEXT: ret260entry:261 call void asm sideeffect "",262 "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()263 264 ret <vscale x 4 x i64> %va265}266 267define <vscale x 8 x i64> @spill_lmul_8(<vscale x 8 x i64> %va) nounwind {268; SPILL-O0-LABEL: spill_lmul_8:269; SPILL-O0: # %bb.0: # %entry270; SPILL-O0-NEXT: addi sp, sp, -16271; SPILL-O0-NEXT: csrr a0, vlenb272; SPILL-O0-NEXT: slli a0, a0, 3273; SPILL-O0-NEXT: sub sp, sp, a0274; SPILL-O0-NEXT: addi a0, sp, 16275; SPILL-O0-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill276; SPILL-O0-NEXT: #APP277; SPILL-O0-NEXT: #NO_APP278; SPILL-O0-NEXT: addi a0, sp, 16279; SPILL-O0-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload280; SPILL-O0-NEXT: csrr a0, vlenb281; SPILL-O0-NEXT: slli a0, a0, 3282; SPILL-O0-NEXT: add sp, sp, a0283; SPILL-O0-NEXT: addi sp, sp, 16284; SPILL-O0-NEXT: ret285;286; SPILL-O2-LABEL: spill_lmul_8:287; SPILL-O2: # %bb.0: # %entry288; SPILL-O2-NEXT: addi sp, sp, -16289; SPILL-O2-NEXT: csrr a0, vlenb290; SPILL-O2-NEXT: slli a0, a0, 3291; SPILL-O2-NEXT: sub sp, sp, a0292; SPILL-O2-NEXT: addi a0, sp, 16293; SPILL-O2-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill294; SPILL-O2-NEXT: #APP295; SPILL-O2-NEXT: #NO_APP296; SPILL-O2-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload297; SPILL-O2-NEXT: csrr a0, vlenb298; SPILL-O2-NEXT: slli a0, a0, 3299; SPILL-O2-NEXT: add sp, sp, a0300; SPILL-O2-NEXT: addi sp, sp, 16301; SPILL-O2-NEXT: ret302;303; SPILL-O2-VLEN128-LABEL: spill_lmul_8:304; SPILL-O2-VLEN128: # %bb.0: # %entry305; SPILL-O2-VLEN128-NEXT: addi sp, sp, -16306; SPILL-O2-VLEN128-NEXT: addi sp, sp, -128307; SPILL-O2-VLEN128-NEXT: addi a0, sp, 16308; SPILL-O2-VLEN128-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill309; SPILL-O2-VLEN128-NEXT: #APP310; SPILL-O2-VLEN128-NEXT: #NO_APP311; SPILL-O2-VLEN128-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload312; SPILL-O2-VLEN128-NEXT: addi sp, sp, 128313; SPILL-O2-VLEN128-NEXT: addi sp, sp, 16314; SPILL-O2-VLEN128-NEXT: ret315;316; SPILL-O0-VSETVLI-LABEL: spill_lmul_8:317; SPILL-O0-VSETVLI: # %bb.0: # %entry318; SPILL-O0-VSETVLI-NEXT: addi sp, sp, -16319; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m8, ta, ma320; SPILL-O0-VSETVLI-NEXT: sub sp, sp, a0321; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16322; SPILL-O0-VSETVLI-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill323; SPILL-O0-VSETVLI-NEXT: #APP324; SPILL-O0-VSETVLI-NEXT: #NO_APP325; SPILL-O0-VSETVLI-NEXT: addi a0, sp, 16326; SPILL-O0-VSETVLI-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload327; SPILL-O0-VSETVLI-NEXT: vsetvli a0, zero, e8, m8, ta, ma328; SPILL-O0-VSETVLI-NEXT: add sp, sp, a0329; SPILL-O0-VSETVLI-NEXT: addi sp, sp, 16330; SPILL-O0-VSETVLI-NEXT: ret331;332; SPILL-O2-VSETVLI-LABEL: spill_lmul_8:333; SPILL-O2-VSETVLI: # %bb.0: # %entry334; SPILL-O2-VSETVLI-NEXT: addi sp, sp, -16335; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m8, ta, ma336; SPILL-O2-VSETVLI-NEXT: sub sp, sp, a0337; SPILL-O2-VSETVLI-NEXT: addi a0, sp, 16338; SPILL-O2-VSETVLI-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill339; SPILL-O2-VSETVLI-NEXT: #APP340; SPILL-O2-VSETVLI-NEXT: #NO_APP341; SPILL-O2-VSETVLI-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload342; SPILL-O2-VSETVLI-NEXT: vsetvli a0, zero, e8, m8, ta, ma343; SPILL-O2-VSETVLI-NEXT: add sp, sp, a0344; SPILL-O2-VSETVLI-NEXT: addi sp, sp, 16345; SPILL-O2-VSETVLI-NEXT: ret346entry:347 call void asm sideeffect "",348 "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()349 350 ret <vscale x 8 x i64> %va351}352