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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=riscv64 -mattr=+v -verify-machineinstrs | FileCheck %s3 4define <vscale x 1 x i8> @vpmerge_mf8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %y, i32 zeroext %vl) {5; CHECK-LABEL: vpmerge_mf8:6; CHECK: # %bb.0:7; CHECK-NEXT: vsetvli zero, a0, e8, mf8, tu, ma8; CHECK-NEXT: vmv.v.v v8, v99; CHECK-NEXT: ret10 %1 = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> splat (i1 -1), <vscale x 1 x i8> %y, <vscale x 1 x i8> %x, i32 %vl)11 ret <vscale x 1 x i8> %112}13 14define <vscale x 2 x i8> @vpmerge_mf4(<vscale x 2 x i8> %x, <vscale x 2 x i8> %y, i32 zeroext %vl) {15; CHECK-LABEL: vpmerge_mf4:16; CHECK: # %bb.0:17; CHECK-NEXT: vsetvli zero, a0, e8, mf4, tu, ma18; CHECK-NEXT: vmv.v.v v8, v919; CHECK-NEXT: ret20 %1 = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> splat (i1 -1), <vscale x 2 x i8> %y, <vscale x 2 x i8> %x, i32 %vl)21 ret <vscale x 2 x i8> %122}23 24define <vscale x 4 x i8> @vpmerge_mf2(<vscale x 4 x i8> %x, <vscale x 4 x i8> %y, i32 zeroext %vl) {25; CHECK-LABEL: vpmerge_mf2:26; CHECK: # %bb.0:27; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma28; CHECK-NEXT: vmv.v.v v8, v929; CHECK-NEXT: ret30 %1 = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> splat (i1 -1), <vscale x 4 x i8> %y, <vscale x 4 x i8> %x, i32 %vl)31 ret <vscale x 4 x i8> %132}33 34define <vscale x 8 x i8> @vpmerge_m1(<vscale x 8 x i8> %x, <vscale x 8 x i8> %y, i32 zeroext %vl) {35; CHECK-LABEL: vpmerge_m1:36; CHECK: # %bb.0:37; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma38; CHECK-NEXT: vmv.v.v v8, v939; CHECK-NEXT: ret40 %1 = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i8> %y, <vscale x 8 x i8> %x, i32 %vl)41 ret <vscale x 8 x i8> %142}43 44define <vscale x 8 x i16> @vpmerge_m2(<vscale x 8 x i16> %x, <vscale x 8 x i16> %y, i32 zeroext %vl) {45; CHECK-LABEL: vpmerge_m2:46; CHECK: # %bb.0:47; CHECK-NEXT: vsetvli zero, a0, e16, m2, tu, ma48; CHECK-NEXT: vmv.v.v v8, v1049; CHECK-NEXT: ret50 %1 = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i16> %y, <vscale x 8 x i16> %x, i32 %vl)51 ret <vscale x 8 x i16> %152}53 54define <vscale x 8 x i32> @vpmerge_m4(<vscale x 8 x i32> %x, <vscale x 8 x i32> %y, i32 zeroext %vl) {55; CHECK-LABEL: vpmerge_m4:56; CHECK: # %bb.0:57; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma58; CHECK-NEXT: vmv.v.v v8, v1259; CHECK-NEXT: ret60 %1 = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i32> %y, <vscale x 8 x i32> %x, i32 %vl)61 ret <vscale x 8 x i32> %162}63 64define <vscale x 8 x i64> @vpmerge_m8(<vscale x 8 x i64> %x, <vscale x 8 x i64> %y, i32 zeroext %vl) {65; CHECK-LABEL: vpmerge_m8:66; CHECK: # %bb.0:67; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma68; CHECK-NEXT: vmv.v.v v8, v1669; CHECK-NEXT: ret70 %1 = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> splat (i1 -1), <vscale x 8 x i64> %y, <vscale x 8 x i64> %x, i32 %vl)71 ret <vscale x 8 x i64> %172}73 74; Shouldn't be converted because vmerge adds back in elements from false past avl that would be lost if we converted to vmv.v.v75define <vscale x 2 x i32> @preserve_false(ptr %p, <vscale x 2 x i32> %pt, <vscale x 2 x i32> %false, <vscale x 2 x i1> %mask, i64 %avl1, i64 %avl2) {76; CHECK-LABEL: preserve_false:77; CHECK: # %bb.0:78; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma79; CHECK-NEXT: vmv1r.v v10, v980; CHECK-NEXT: vle32.v v10, (a0), v0.t81; CHECK-NEXT: vsetvli zero, a2, e32, m1, tu, ma82; CHECK-NEXT: vmerge.vvm v8, v9, v10, v083; CHECK-NEXT: ret84 %true = call <vscale x 2 x i32> @llvm.riscv.vle.mask(<vscale x 2 x i32> %false, ptr %p, <vscale x 2 x i1> %mask, i64 %avl1, i64 3)85 %res = call <vscale x 2 x i32> @llvm.riscv.vmerge(<vscale x 2 x i32> %pt, <vscale x 2 x i32> %false, <vscale x 2 x i32> %true, <vscale x 2 x i1> %mask, i64 %avl2)86 ret <vscale x 2 x i32> %res87}88 89; Can fold this because its avl is known to be <= than true, so no elements from false need to be introduced past avl.90define <vscale x 2 x i32> @preserve_false_avl_known_le(ptr %p, <vscale x 2 x i32> %pt, <vscale x 2 x i32> %false, <vscale x 2 x i1> %mask) {91; CHECK-LABEL: preserve_false_avl_known_le:92; CHECK: # %bb.0:93; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma94; CHECK-NEXT: vle32.v v9, (a0), v0.t95; CHECK-NEXT: vsetvli zero, zero, e32, m1, tu, ma96; CHECK-NEXT: vmv.v.v v8, v997; CHECK-NEXT: ret98 %true = call <vscale x 2 x i32> @llvm.riscv.vle.mask(<vscale x 2 x i32> %false, ptr %p, <vscale x 2 x i1> %mask, i64 2, i64 3)99 %res = call <vscale x 2 x i32> @llvm.riscv.vmerge(<vscale x 2 x i32> %pt, <vscale x 2 x i32> %false, <vscale x 2 x i32> %true, <vscale x 2 x i1> %mask, i64 1)100 ret <vscale x 2 x i32> %res101}102