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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+zve64x -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=RV32,RV32-ZVE644; RUN: llc -mtriple=riscv64 -mattr=+zve64x -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=RV64,RV64-ZVE646; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \7; RUN: | FileCheck %s --check-prefixes=RV32,RV32-V8; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \9; RUN: | FileCheck %s --check-prefixes=RV64,RV64-V10 11define ptr @scalar_stack_align16() nounwind {12; RV32-ZVE64-LABEL: scalar_stack_align16:13; RV32-ZVE64: # %bb.0:14; RV32-ZVE64-NEXT: addi sp, sp, -4815; RV32-ZVE64-NEXT: sw ra, 44(sp) # 4-byte Folded Spill16; RV32-ZVE64-NEXT: csrr a0, vlenb17; RV32-ZVE64-NEXT: slli a0, a0, 118; RV32-ZVE64-NEXT: sub sp, sp, a019; RV32-ZVE64-NEXT: addi a0, sp, 3220; RV32-ZVE64-NEXT: call extern21; RV32-ZVE64-NEXT: addi a0, sp, 1622; RV32-ZVE64-NEXT: csrr a1, vlenb23; RV32-ZVE64-NEXT: slli a1, a1, 124; RV32-ZVE64-NEXT: add sp, sp, a125; RV32-ZVE64-NEXT: lw ra, 44(sp) # 4-byte Folded Reload26; RV32-ZVE64-NEXT: addi sp, sp, 4827; RV32-ZVE64-NEXT: ret28;29; RV64-ZVE64-LABEL: scalar_stack_align16:30; RV64-ZVE64: # %bb.0:31; RV64-ZVE64-NEXT: addi sp, sp, -4832; RV64-ZVE64-NEXT: sd ra, 40(sp) # 8-byte Folded Spill33; RV64-ZVE64-NEXT: csrr a0, vlenb34; RV64-ZVE64-NEXT: slli a0, a0, 135; RV64-ZVE64-NEXT: sub sp, sp, a036; RV64-ZVE64-NEXT: addi a0, sp, 3237; RV64-ZVE64-NEXT: call extern38; RV64-ZVE64-NEXT: addi a0, sp, 1639; RV64-ZVE64-NEXT: csrr a1, vlenb40; RV64-ZVE64-NEXT: slli a1, a1, 141; RV64-ZVE64-NEXT: add sp, sp, a142; RV64-ZVE64-NEXT: ld ra, 40(sp) # 8-byte Folded Reload43; RV64-ZVE64-NEXT: addi sp, sp, 4844; RV64-ZVE64-NEXT: ret45;46; RV32-V-LABEL: scalar_stack_align16:47; RV32-V: # %bb.0:48; RV32-V-NEXT: addi sp, sp, -4849; RV32-V-NEXT: sw ra, 44(sp) # 4-byte Folded Spill50; RV32-V-NEXT: csrr a0, vlenb51; RV32-V-NEXT: sub sp, sp, a052; RV32-V-NEXT: addi a0, sp, 3253; RV32-V-NEXT: call extern54; RV32-V-NEXT: addi a0, sp, 1655; RV32-V-NEXT: csrr a1, vlenb56; RV32-V-NEXT: add sp, sp, a157; RV32-V-NEXT: lw ra, 44(sp) # 4-byte Folded Reload58; RV32-V-NEXT: addi sp, sp, 4859; RV32-V-NEXT: ret60;61; RV64-V-LABEL: scalar_stack_align16:62; RV64-V: # %bb.0:63; RV64-V-NEXT: addi sp, sp, -4864; RV64-V-NEXT: sd ra, 40(sp) # 8-byte Folded Spill65; RV64-V-NEXT: csrr a0, vlenb66; RV64-V-NEXT: sub sp, sp, a067; RV64-V-NEXT: addi a0, sp, 3268; RV64-V-NEXT: call extern69; RV64-V-NEXT: addi a0, sp, 1670; RV64-V-NEXT: csrr a1, vlenb71; RV64-V-NEXT: add sp, sp, a172; RV64-V-NEXT: ld ra, 40(sp) # 8-byte Folded Reload73; RV64-V-NEXT: addi sp, sp, 4874; RV64-V-NEXT: ret75 %a = alloca <vscale x 2 x i32>76 %c = alloca i64, align 1677 call void @extern(ptr %a)78 ret ptr %c79}80 81declare void @extern(ptr)82;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:83; RV32: {{.*}}84; RV64: {{.*}}85