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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK4; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK6 7define <vscale x 1 x i1> @icmp_eq_vv_nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {8; CHECK-LABEL: icmp_eq_vv_nxv1i1:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma11; CHECK-NEXT: vmxnor.mm v0, v0, v812; CHECK-NEXT: ret13 %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)14 ret <vscale x 1 x i1> %v15}16 17define <vscale x 2 x i1> @icmp_eq_vv_nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {18; CHECK-LABEL: icmp_eq_vv_nxv2i1:19; CHECK: # %bb.0:20; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma21; CHECK-NEXT: vmxnor.mm v0, v0, v822; CHECK-NEXT: ret23 %v = call <vscale x 2 x i1> @llvm.vp.icmp.nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, metadata !"eq", <vscale x 2 x i1> %m, i32 %evl)24 ret <vscale x 2 x i1> %v25}26 27define <vscale x 4 x i1> @icmp_eq_vv_nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {28; CHECK-LABEL: icmp_eq_vv_nxv4i1:29; CHECK: # %bb.0:30; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma31; CHECK-NEXT: vmxnor.mm v0, v0, v832; CHECK-NEXT: ret33 %v = call <vscale x 4 x i1> @llvm.vp.icmp.nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, metadata !"eq", <vscale x 4 x i1> %m, i32 %evl)34 ret <vscale x 4 x i1> %v35}36 37define <vscale x 8 x i1> @icmp_eq_vv_nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {38; CHECK-LABEL: icmp_eq_vv_nxv8i1:39; CHECK: # %bb.0:40; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma41; CHECK-NEXT: vmxnor.mm v0, v0, v842; CHECK-NEXT: ret43 %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)44 ret <vscale x 8 x i1> %v45}46 47define <vscale x 16 x i1> @icmp_eq_vv_nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {48; CHECK-LABEL: icmp_eq_vv_nxv16i1:49; CHECK: # %bb.0:50; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma51; CHECK-NEXT: vmxnor.mm v0, v0, v852; CHECK-NEXT: ret53 %v = call <vscale x 16 x i1> @llvm.vp.icmp.nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, metadata !"eq", <vscale x 16 x i1> %m, i32 %evl)54 ret <vscale x 16 x i1> %v55}56 57define <vscale x 32 x i1> @icmp_eq_vv_nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {58; CHECK-LABEL: icmp_eq_vv_nxv32i1:59; CHECK: # %bb.0:60; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma61; CHECK-NEXT: vmxnor.mm v0, v0, v862; CHECK-NEXT: ret63 %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, metadata !"eq", <vscale x 32 x i1> %m, i32 %evl)64 ret <vscale x 32 x i1> %v65}66 67define <vscale x 64 x i1> @icmp_eq_vv_nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {68; CHECK-LABEL: icmp_eq_vv_nxv64i1:69; CHECK: # %bb.0:70; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma71; CHECK-NEXT: vmxnor.mm v0, v0, v872; CHECK-NEXT: ret73 %v = call <vscale x 64 x i1> @llvm.vp.icmp.nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, metadata !"eq", <vscale x 64 x i1> %m, i32 %evl)74 ret <vscale x 64 x i1> %v75}76 77define <vscale x 1 x i1> @icmp_ne_vv_nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {78; CHECK-LABEL: icmp_ne_vv_nxv1i1:79; CHECK: # %bb.0:80; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma81; CHECK-NEXT: vmxor.mm v0, v0, v882; CHECK-NEXT: ret83 %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)84 ret <vscale x 1 x i1> %v85}86 87define <vscale x 2 x i1> @icmp_ne_vv_nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {88; CHECK-LABEL: icmp_ne_vv_nxv2i1:89; CHECK: # %bb.0:90; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma91; CHECK-NEXT: vmxor.mm v0, v0, v892; CHECK-NEXT: ret93 %v = call <vscale x 2 x i1> @llvm.vp.icmp.nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, metadata !"ne", <vscale x 2 x i1> %m, i32 %evl)94 ret <vscale x 2 x i1> %v95}96 97define <vscale x 4 x i1> @icmp_ne_vv_nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {98; CHECK-LABEL: icmp_ne_vv_nxv4i1:99; CHECK: # %bb.0:100; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma101; CHECK-NEXT: vmxor.mm v0, v0, v8102; CHECK-NEXT: ret103 %v = call <vscale x 4 x i1> @llvm.vp.icmp.nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, metadata !"ne", <vscale x 4 x i1> %m, i32 %evl)104 ret <vscale x 4 x i1> %v105}106 107define <vscale x 8 x i1> @icmp_ne_vv_nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {108; CHECK-LABEL: icmp_ne_vv_nxv8i1:109; CHECK: # %bb.0:110; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma111; CHECK-NEXT: vmxor.mm v0, v0, v8112; CHECK-NEXT: ret113 %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)114 ret <vscale x 8 x i1> %v115}116 117define <vscale x 16 x i1> @icmp_ne_vv_nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {118; CHECK-LABEL: icmp_ne_vv_nxv16i1:119; CHECK: # %bb.0:120; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma121; CHECK-NEXT: vmxor.mm v0, v0, v8122; CHECK-NEXT: ret123 %v = call <vscale x 16 x i1> @llvm.vp.icmp.nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, metadata !"ne", <vscale x 16 x i1> %m, i32 %evl)124 ret <vscale x 16 x i1> %v125}126 127define <vscale x 32 x i1> @icmp_ne_vv_nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {128; CHECK-LABEL: icmp_ne_vv_nxv32i1:129; CHECK: # %bb.0:130; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma131; CHECK-NEXT: vmxor.mm v0, v0, v8132; CHECK-NEXT: ret133 %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, metadata !"ne", <vscale x 32 x i1> %m, i32 %evl)134 ret <vscale x 32 x i1> %v135}136 137define <vscale x 64 x i1> @icmp_ne_vv_nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {138; CHECK-LABEL: icmp_ne_vv_nxv64i1:139; CHECK: # %bb.0:140; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma141; CHECK-NEXT: vmxor.mm v0, v0, v8142; CHECK-NEXT: ret143 %v = call <vscale x 64 x i1> @llvm.vp.icmp.nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, metadata !"ne", <vscale x 64 x i1> %m, i32 %evl)144 ret <vscale x 64 x i1> %v145}146 147define <vscale x 1 x i1> @icmp_slt_vv_nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {148; CHECK-LABEL: icmp_slt_vv_nxv1i1:149; CHECK: # %bb.0:150; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma151; CHECK-NEXT: vmandn.mm v0, v0, v8152; CHECK-NEXT: ret153 %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)154 ret <vscale x 1 x i1> %v155}156 157define <vscale x 2 x i1> @icmp_slt_vv_nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {158; CHECK-LABEL: icmp_slt_vv_nxv2i1:159; CHECK: # %bb.0:160; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma161; CHECK-NEXT: vmandn.mm v0, v0, v8162; CHECK-NEXT: ret163 %v = call <vscale x 2 x i1> @llvm.vp.icmp.nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, metadata !"slt", <vscale x 2 x i1> %m, i32 %evl)164 ret <vscale x 2 x i1> %v165}166 167define <vscale x 4 x i1> @icmp_slt_vv_nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {168; CHECK-LABEL: icmp_slt_vv_nxv4i1:169; CHECK: # %bb.0:170; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma171; CHECK-NEXT: vmandn.mm v0, v0, v8172; CHECK-NEXT: ret173 %v = call <vscale x 4 x i1> @llvm.vp.icmp.nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, metadata !"slt", <vscale x 4 x i1> %m, i32 %evl)174 ret <vscale x 4 x i1> %v175}176 177define <vscale x 8 x i1> @icmp_slt_vv_nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {178; CHECK-LABEL: icmp_slt_vv_nxv8i1:179; CHECK: # %bb.0:180; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma181; CHECK-NEXT: vmandn.mm v0, v0, v8182; CHECK-NEXT: ret183 %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)184 ret <vscale x 8 x i1> %v185}186 187define <vscale x 16 x i1> @icmp_slt_vv_nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {188; CHECK-LABEL: icmp_slt_vv_nxv16i1:189; CHECK: # %bb.0:190; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma191; CHECK-NEXT: vmandn.mm v0, v0, v8192; CHECK-NEXT: ret193 %v = call <vscale x 16 x i1> @llvm.vp.icmp.nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, metadata !"slt", <vscale x 16 x i1> %m, i32 %evl)194 ret <vscale x 16 x i1> %v195}196 197define <vscale x 32 x i1> @icmp_slt_vv_nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {198; CHECK-LABEL: icmp_slt_vv_nxv32i1:199; CHECK: # %bb.0:200; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma201; CHECK-NEXT: vmandn.mm v0, v0, v8202; CHECK-NEXT: ret203 %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, metadata !"slt", <vscale x 32 x i1> %m, i32 %evl)204 ret <vscale x 32 x i1> %v205}206 207define <vscale x 64 x i1> @icmp_slt_vv_nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {208; CHECK-LABEL: icmp_slt_vv_nxv64i1:209; CHECK: # %bb.0:210; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma211; CHECK-NEXT: vmandn.mm v0, v0, v8212; CHECK-NEXT: ret213 %v = call <vscale x 64 x i1> @llvm.vp.icmp.nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, metadata !"slt", <vscale x 64 x i1> %m, i32 %evl)214 ret <vscale x 64 x i1> %v215}216 217define <vscale x 1 x i1> @icmp_ult_vv_nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {218; CHECK-LABEL: icmp_ult_vv_nxv1i1:219; CHECK: # %bb.0:220; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma221; CHECK-NEXT: vmandn.mm v0, v8, v0222; CHECK-NEXT: ret223 %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)224 ret <vscale x 1 x i1> %v225}226 227define <vscale x 2 x i1> @icmp_ult_vv_nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {228; CHECK-LABEL: icmp_ult_vv_nxv2i1:229; CHECK: # %bb.0:230; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma231; CHECK-NEXT: vmandn.mm v0, v8, v0232; CHECK-NEXT: ret233 %v = call <vscale x 2 x i1> @llvm.vp.icmp.nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, metadata !"ult", <vscale x 2 x i1> %m, i32 %evl)234 ret <vscale x 2 x i1> %v235}236 237define <vscale x 4 x i1> @icmp_ult_vv_nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {238; CHECK-LABEL: icmp_ult_vv_nxv4i1:239; CHECK: # %bb.0:240; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma241; CHECK-NEXT: vmandn.mm v0, v8, v0242; CHECK-NEXT: ret243 %v = call <vscale x 4 x i1> @llvm.vp.icmp.nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, metadata !"ult", <vscale x 4 x i1> %m, i32 %evl)244 ret <vscale x 4 x i1> %v245}246 247define <vscale x 8 x i1> @icmp_ult_vv_nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {248; CHECK-LABEL: icmp_ult_vv_nxv8i1:249; CHECK: # %bb.0:250; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma251; CHECK-NEXT: vmandn.mm v0, v8, v0252; CHECK-NEXT: ret253 %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)254 ret <vscale x 8 x i1> %v255}256 257define <vscale x 16 x i1> @icmp_ult_vv_nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {258; CHECK-LABEL: icmp_ult_vv_nxv16i1:259; CHECK: # %bb.0:260; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma261; CHECK-NEXT: vmandn.mm v0, v8, v0262; CHECK-NEXT: ret263 %v = call <vscale x 16 x i1> @llvm.vp.icmp.nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, metadata !"ult", <vscale x 16 x i1> %m, i32 %evl)264 ret <vscale x 16 x i1> %v265}266 267define <vscale x 32 x i1> @icmp_ult_vv_nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {268; CHECK-LABEL: icmp_ult_vv_nxv32i1:269; CHECK: # %bb.0:270; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma271; CHECK-NEXT: vmandn.mm v0, v8, v0272; CHECK-NEXT: ret273 %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, metadata !"ult", <vscale x 32 x i1> %m, i32 %evl)274 ret <vscale x 32 x i1> %v275}276 277define <vscale x 64 x i1> @icmp_ult_vv_nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {278; CHECK-LABEL: icmp_ult_vv_nxv64i1:279; CHECK: # %bb.0:280; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma281; CHECK-NEXT: vmandn.mm v0, v8, v0282; CHECK-NEXT: ret283 %v = call <vscale x 64 x i1> @llvm.vp.icmp.nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, metadata !"ult", <vscale x 64 x i1> %m, i32 %evl)284 ret <vscale x 64 x i1> %v285}286 287define <vscale x 1 x i1> @icmp_sgt_vv_nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {288; CHECK-LABEL: icmp_sgt_vv_nxv1i1:289; CHECK: # %bb.0:290; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma291; CHECK-NEXT: vmandn.mm v0, v8, v0292; CHECK-NEXT: ret293 %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)294 ret <vscale x 1 x i1> %v295}296 297define <vscale x 2 x i1> @icmp_sgt_vv_nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {298; CHECK-LABEL: icmp_sgt_vv_nxv2i1:299; CHECK: # %bb.0:300; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma301; CHECK-NEXT: vmandn.mm v0, v8, v0302; CHECK-NEXT: ret303 %v = call <vscale x 2 x i1> @llvm.vp.icmp.nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, metadata !"sgt", <vscale x 2 x i1> %m, i32 %evl)304 ret <vscale x 2 x i1> %v305}306 307define <vscale x 4 x i1> @icmp_sgt_vv_nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {308; CHECK-LABEL: icmp_sgt_vv_nxv4i1:309; CHECK: # %bb.0:310; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma311; CHECK-NEXT: vmandn.mm v0, v8, v0312; CHECK-NEXT: ret313 %v = call <vscale x 4 x i1> @llvm.vp.icmp.nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, metadata !"sgt", <vscale x 4 x i1> %m, i32 %evl)314 ret <vscale x 4 x i1> %v315}316 317define <vscale x 8 x i1> @icmp_sgt_vv_nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {318; CHECK-LABEL: icmp_sgt_vv_nxv8i1:319; CHECK: # %bb.0:320; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma321; CHECK-NEXT: vmandn.mm v0, v8, v0322; CHECK-NEXT: ret323 %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)324 ret <vscale x 8 x i1> %v325}326 327define <vscale x 16 x i1> @icmp_sgt_vv_nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {328; CHECK-LABEL: icmp_sgt_vv_nxv16i1:329; CHECK: # %bb.0:330; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma331; CHECK-NEXT: vmandn.mm v0, v8, v0332; CHECK-NEXT: ret333 %v = call <vscale x 16 x i1> @llvm.vp.icmp.nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, metadata !"sgt", <vscale x 16 x i1> %m, i32 %evl)334 ret <vscale x 16 x i1> %v335}336 337define <vscale x 32 x i1> @icmp_sgt_vv_nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {338; CHECK-LABEL: icmp_sgt_vv_nxv32i1:339; CHECK: # %bb.0:340; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma341; CHECK-NEXT: vmandn.mm v0, v8, v0342; CHECK-NEXT: ret343 %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, metadata !"sgt", <vscale x 32 x i1> %m, i32 %evl)344 ret <vscale x 32 x i1> %v345}346 347define <vscale x 64 x i1> @icmp_sgt_vv_nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {348; CHECK-LABEL: icmp_sgt_vv_nxv64i1:349; CHECK: # %bb.0:350; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma351; CHECK-NEXT: vmandn.mm v0, v8, v0352; CHECK-NEXT: ret353 %v = call <vscale x 64 x i1> @llvm.vp.icmp.nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, metadata !"sgt", <vscale x 64 x i1> %m, i32 %evl)354 ret <vscale x 64 x i1> %v355}356 357define <vscale x 1 x i1> @icmp_ugt_vv_nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {358; CHECK-LABEL: icmp_ugt_vv_nxv1i1:359; CHECK: # %bb.0:360; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma361; CHECK-NEXT: vmandn.mm v0, v0, v8362; CHECK-NEXT: ret363 %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)364 ret <vscale x 1 x i1> %v365}366 367define <vscale x 2 x i1> @icmp_ugt_vv_nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {368; CHECK-LABEL: icmp_ugt_vv_nxv2i1:369; CHECK: # %bb.0:370; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma371; CHECK-NEXT: vmandn.mm v0, v0, v8372; CHECK-NEXT: ret373 %v = call <vscale x 2 x i1> @llvm.vp.icmp.nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, metadata !"ugt", <vscale x 2 x i1> %m, i32 %evl)374 ret <vscale x 2 x i1> %v375}376 377define <vscale x 4 x i1> @icmp_ugt_vv_nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {378; CHECK-LABEL: icmp_ugt_vv_nxv4i1:379; CHECK: # %bb.0:380; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma381; CHECK-NEXT: vmandn.mm v0, v0, v8382; CHECK-NEXT: ret383 %v = call <vscale x 4 x i1> @llvm.vp.icmp.nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, metadata !"ugt", <vscale x 4 x i1> %m, i32 %evl)384 ret <vscale x 4 x i1> %v385}386 387define <vscale x 8 x i1> @icmp_ugt_vv_nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {388; CHECK-LABEL: icmp_ugt_vv_nxv8i1:389; CHECK: # %bb.0:390; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma391; CHECK-NEXT: vmandn.mm v0, v0, v8392; CHECK-NEXT: ret393 %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)394 ret <vscale x 8 x i1> %v395}396 397define <vscale x 16 x i1> @icmp_ugt_vv_nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {398; CHECK-LABEL: icmp_ugt_vv_nxv16i1:399; CHECK: # %bb.0:400; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma401; CHECK-NEXT: vmandn.mm v0, v0, v8402; CHECK-NEXT: ret403 %v = call <vscale x 16 x i1> @llvm.vp.icmp.nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, metadata !"ugt", <vscale x 16 x i1> %m, i32 %evl)404 ret <vscale x 16 x i1> %v405}406 407define <vscale x 32 x i1> @icmp_ugt_vv_nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {408; CHECK-LABEL: icmp_ugt_vv_nxv32i1:409; CHECK: # %bb.0:410; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma411; CHECK-NEXT: vmandn.mm v0, v0, v8412; CHECK-NEXT: ret413 %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, metadata !"ugt", <vscale x 32 x i1> %m, i32 %evl)414 ret <vscale x 32 x i1> %v415}416 417define <vscale x 64 x i1> @icmp_ugt_vv_nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {418; CHECK-LABEL: icmp_ugt_vv_nxv64i1:419; CHECK: # %bb.0:420; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma421; CHECK-NEXT: vmandn.mm v0, v0, v8422; CHECK-NEXT: ret423 %v = call <vscale x 64 x i1> @llvm.vp.icmp.nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, metadata !"ugt", <vscale x 64 x i1> %m, i32 %evl)424 ret <vscale x 64 x i1> %v425}426 427define <vscale x 1 x i1> @icmp_sle_vv_nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {428; CHECK-LABEL: icmp_sle_vv_nxv1i1:429; CHECK: # %bb.0:430; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma431; CHECK-NEXT: vmxnor.mm v0, v8, v0432; CHECK-NEXT: ret433 %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)434 ret <vscale x 1 x i1> %v435}436 437define <vscale x 2 x i1> @icmp_sle_vv_nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {438; CHECK-LABEL: icmp_sle_vv_nxv2i1:439; CHECK: # %bb.0:440; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma441; CHECK-NEXT: vmxnor.mm v0, v8, v0442; CHECK-NEXT: ret443 %v = call <vscale x 2 x i1> @llvm.vp.icmp.nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, metadata !"sle", <vscale x 2 x i1> %m, i32 %evl)444 ret <vscale x 2 x i1> %v445}446 447define <vscale x 4 x i1> @icmp_sle_vv_nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {448; CHECK-LABEL: icmp_sle_vv_nxv4i1:449; CHECK: # %bb.0:450; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma451; CHECK-NEXT: vmxnor.mm v0, v8, v0452; CHECK-NEXT: ret453 %v = call <vscale x 4 x i1> @llvm.vp.icmp.nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, metadata !"sle", <vscale x 4 x i1> %m, i32 %evl)454 ret <vscale x 4 x i1> %v455}456 457define <vscale x 8 x i1> @icmp_sle_vv_nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {458; CHECK-LABEL: icmp_sle_vv_nxv8i1:459; CHECK: # %bb.0:460; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma461; CHECK-NEXT: vmxnor.mm v0, v8, v0462; CHECK-NEXT: ret463 %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)464 ret <vscale x 8 x i1> %v465}466 467define <vscale x 16 x i1> @icmp_sle_vv_nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {468; CHECK-LABEL: icmp_sle_vv_nxv16i1:469; CHECK: # %bb.0:470; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma471; CHECK-NEXT: vmxnor.mm v0, v8, v0472; CHECK-NEXT: ret473 %v = call <vscale x 16 x i1> @llvm.vp.icmp.nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, metadata !"sle", <vscale x 16 x i1> %m, i32 %evl)474 ret <vscale x 16 x i1> %v475}476 477define <vscale x 32 x i1> @icmp_sle_vv_nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {478; CHECK-LABEL: icmp_sle_vv_nxv32i1:479; CHECK: # %bb.0:480; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma481; CHECK-NEXT: vmxnor.mm v0, v8, v0482; CHECK-NEXT: ret483 %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, metadata !"sle", <vscale x 32 x i1> %m, i32 %evl)484 ret <vscale x 32 x i1> %v485}486 487define <vscale x 64 x i1> @icmp_sle_vv_nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {488; CHECK-LABEL: icmp_sle_vv_nxv64i1:489; CHECK: # %bb.0:490; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma491; CHECK-NEXT: vmxnor.mm v0, v8, v0492; CHECK-NEXT: ret493 %v = call <vscale x 64 x i1> @llvm.vp.icmp.nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, metadata !"sle", <vscale x 64 x i1> %m, i32 %evl)494 ret <vscale x 64 x i1> %v495}496 497define <vscale x 1 x i1> @icmp_ule_vv_nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {498; CHECK-LABEL: icmp_ule_vv_nxv1i1:499; CHECK: # %bb.0:500; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma501; CHECK-NEXT: vmxnor.mm v0, v0, v8502; CHECK-NEXT: ret503 %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, metadata !"ule", <vscale x 1 x i1> %m, i32 %evl)504 ret <vscale x 1 x i1> %v505}506 507define <vscale x 2 x i1> @icmp_ule_vv_nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {508; CHECK-LABEL: icmp_ule_vv_nxv2i1:509; CHECK: # %bb.0:510; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma511; CHECK-NEXT: vmxnor.mm v0, v0, v8512; CHECK-NEXT: ret513 %v = call <vscale x 2 x i1> @llvm.vp.icmp.nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, metadata !"ule", <vscale x 2 x i1> %m, i32 %evl)514 ret <vscale x 2 x i1> %v515}516 517define <vscale x 4 x i1> @icmp_ule_vv_nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {518; CHECK-LABEL: icmp_ule_vv_nxv4i1:519; CHECK: # %bb.0:520; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma521; CHECK-NEXT: vmxnor.mm v0, v0, v8522; CHECK-NEXT: ret523 %v = call <vscale x 4 x i1> @llvm.vp.icmp.nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, metadata !"ule", <vscale x 4 x i1> %m, i32 %evl)524 ret <vscale x 4 x i1> %v525}526 527define <vscale x 8 x i1> @icmp_ule_vv_nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {528; CHECK-LABEL: icmp_ule_vv_nxv8i1:529; CHECK: # %bb.0:530; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma531; CHECK-NEXT: vmxnor.mm v0, v0, v8532; CHECK-NEXT: ret533 %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, metadata !"ule", <vscale x 8 x i1> %m, i32 %evl)534 ret <vscale x 8 x i1> %v535}536 537define <vscale x 16 x i1> @icmp_ule_vv_nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {538; CHECK-LABEL: icmp_ule_vv_nxv16i1:539; CHECK: # %bb.0:540; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma541; CHECK-NEXT: vmxnor.mm v0, v0, v8542; CHECK-NEXT: ret543 %v = call <vscale x 16 x i1> @llvm.vp.icmp.nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, metadata !"ule", <vscale x 16 x i1> %m, i32 %evl)544 ret <vscale x 16 x i1> %v545}546 547define <vscale x 32 x i1> @icmp_ule_vv_nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {548; CHECK-LABEL: icmp_ule_vv_nxv32i1:549; CHECK: # %bb.0:550; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma551; CHECK-NEXT: vmxnor.mm v0, v0, v8552; CHECK-NEXT: ret553 %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, metadata !"ule", <vscale x 32 x i1> %m, i32 %evl)554 ret <vscale x 32 x i1> %v555}556 557define <vscale x 64 x i1> @icmp_ule_vv_nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {558; CHECK-LABEL: icmp_ule_vv_nxv64i1:559; CHECK: # %bb.0:560; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma561; CHECK-NEXT: vmxnor.mm v0, v0, v8562; CHECK-NEXT: ret563 %v = call <vscale x 64 x i1> @llvm.vp.icmp.nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, metadata !"ule", <vscale x 64 x i1> %m, i32 %evl)564 ret <vscale x 64 x i1> %v565}566 567define <vscale x 1 x i1> @icmp_sge_vv_nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {568; CHECK-LABEL: icmp_sge_vv_nxv1i1:569; CHECK: # %bb.0:570; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma571; CHECK-NEXT: vmxnor.mm v0, v0, v8572; CHECK-NEXT: ret573 %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)574 ret <vscale x 1 x i1> %v575}576 577define <vscale x 2 x i1> @icmp_sge_vv_nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {578; CHECK-LABEL: icmp_sge_vv_nxv2i1:579; CHECK: # %bb.0:580; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma581; CHECK-NEXT: vmxnor.mm v0, v0, v8582; CHECK-NEXT: ret583 %v = call <vscale x 2 x i1> @llvm.vp.icmp.nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, metadata !"sge", <vscale x 2 x i1> %m, i32 %evl)584 ret <vscale x 2 x i1> %v585}586 587define <vscale x 4 x i1> @icmp_sge_vv_nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {588; CHECK-LABEL: icmp_sge_vv_nxv4i1:589; CHECK: # %bb.0:590; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma591; CHECK-NEXT: vmxnor.mm v0, v0, v8592; CHECK-NEXT: ret593 %v = call <vscale x 4 x i1> @llvm.vp.icmp.nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, metadata !"sge", <vscale x 4 x i1> %m, i32 %evl)594 ret <vscale x 4 x i1> %v595}596 597define <vscale x 8 x i1> @icmp_sge_vv_nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {598; CHECK-LABEL: icmp_sge_vv_nxv8i1:599; CHECK: # %bb.0:600; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma601; CHECK-NEXT: vmxnor.mm v0, v0, v8602; CHECK-NEXT: ret603 %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)604 ret <vscale x 8 x i1> %v605}606 607define <vscale x 16 x i1> @icmp_sge_vv_nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {608; CHECK-LABEL: icmp_sge_vv_nxv16i1:609; CHECK: # %bb.0:610; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma611; CHECK-NEXT: vmxnor.mm v0, v0, v8612; CHECK-NEXT: ret613 %v = call <vscale x 16 x i1> @llvm.vp.icmp.nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, metadata !"sge", <vscale x 16 x i1> %m, i32 %evl)614 ret <vscale x 16 x i1> %v615}616 617define <vscale x 32 x i1> @icmp_sge_vv_nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {618; CHECK-LABEL: icmp_sge_vv_nxv32i1:619; CHECK: # %bb.0:620; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma621; CHECK-NEXT: vmxnor.mm v0, v0, v8622; CHECK-NEXT: ret623 %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, metadata !"sge", <vscale x 32 x i1> %m, i32 %evl)624 ret <vscale x 32 x i1> %v625}626 627define <vscale x 64 x i1> @icmp_sge_vv_nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {628; CHECK-LABEL: icmp_sge_vv_nxv64i1:629; CHECK: # %bb.0:630; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma631; CHECK-NEXT: vmxnor.mm v0, v0, v8632; CHECK-NEXT: ret633 %v = call <vscale x 64 x i1> @llvm.vp.icmp.nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, metadata !"sge", <vscale x 64 x i1> %m, i32 %evl)634 ret <vscale x 64 x i1> %v635}636 637define <vscale x 1 x i1> @icmp_uge_vv_nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {638; CHECK-LABEL: icmp_uge_vv_nxv1i1:639; CHECK: # %bb.0:640; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma641; CHECK-NEXT: vmxnor.mm v0, v8, v0642; CHECK-NEXT: ret643 %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)644 ret <vscale x 1 x i1> %v645}646 647define <vscale x 2 x i1> @icmp_uge_vv_nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {648; CHECK-LABEL: icmp_uge_vv_nxv2i1:649; CHECK: # %bb.0:650; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma651; CHECK-NEXT: vmxnor.mm v0, v8, v0652; CHECK-NEXT: ret653 %v = call <vscale x 2 x i1> @llvm.vp.icmp.nxv2i1(<vscale x 2 x i1> %va, <vscale x 2 x i1> %vb, metadata !"uge", <vscale x 2 x i1> %m, i32 %evl)654 ret <vscale x 2 x i1> %v655}656 657define <vscale x 4 x i1> @icmp_uge_vv_nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {658; CHECK-LABEL: icmp_uge_vv_nxv4i1:659; CHECK: # %bb.0:660; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma661; CHECK-NEXT: vmxnor.mm v0, v8, v0662; CHECK-NEXT: ret663 %v = call <vscale x 4 x i1> @llvm.vp.icmp.nxv4i1(<vscale x 4 x i1> %va, <vscale x 4 x i1> %vb, metadata !"uge", <vscale x 4 x i1> %m, i32 %evl)664 ret <vscale x 4 x i1> %v665}666 667define <vscale x 8 x i1> @icmp_uge_vv_nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {668; CHECK-LABEL: icmp_uge_vv_nxv8i1:669; CHECK: # %bb.0:670; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma671; CHECK-NEXT: vmxnor.mm v0, v8, v0672; CHECK-NEXT: ret673 %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i1(<vscale x 8 x i1> %va, <vscale x 8 x i1> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)674 ret <vscale x 8 x i1> %v675}676 677define <vscale x 16 x i1> @icmp_uge_vv_nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {678; CHECK-LABEL: icmp_uge_vv_nxv16i1:679; CHECK: # %bb.0:680; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma681; CHECK-NEXT: vmxnor.mm v0, v8, v0682; CHECK-NEXT: ret683 %v = call <vscale x 16 x i1> @llvm.vp.icmp.nxv16i1(<vscale x 16 x i1> %va, <vscale x 16 x i1> %vb, metadata !"uge", <vscale x 16 x i1> %m, i32 %evl)684 ret <vscale x 16 x i1> %v685}686 687define <vscale x 32 x i1> @icmp_uge_vv_nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {688; CHECK-LABEL: icmp_uge_vv_nxv32i1:689; CHECK: # %bb.0:690; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma691; CHECK-NEXT: vmxnor.mm v0, v8, v0692; CHECK-NEXT: ret693 %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i1(<vscale x 32 x i1> %va, <vscale x 32 x i1> %vb, metadata !"uge", <vscale x 32 x i1> %m, i32 %evl)694 ret <vscale x 32 x i1> %v695}696 697define <vscale x 64 x i1> @icmp_uge_vv_nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {698; CHECK-LABEL: icmp_uge_vv_nxv64i1:699; CHECK: # %bb.0:700; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma701; CHECK-NEXT: vmxnor.mm v0, v8, v0702; CHECK-NEXT: ret703 %v = call <vscale x 64 x i1> @llvm.vp.icmp.nxv64i1(<vscale x 64 x i1> %va, <vscale x 64 x i1> %vb, metadata !"uge", <vscale x 64 x i1> %m, i32 %evl)704 ret <vscale x 64 x i1> %v705}706