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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v,+m -verify-machineinstrs < %s \3; RUN:   | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v,+m -verify-machineinstrs < %s \5; RUN:   | FileCheck %s --check-prefixes=CHECK,RV646 7; FIXME: We're missing canonicalizations of ISD::VP_SETCC equivalent to those8; for ISD::SETCC, e.g., splats aren't moved to the RHS.9 10define <vscale x 1 x i1> @icmp_eq_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {11; CHECK-LABEL: icmp_eq_vv_nxv1i8:12; CHECK:       # %bb.0:13; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma14; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t15; CHECK-NEXT:    ret16  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)17  ret <vscale x 1 x i1> %v18}19 20define <vscale x 1 x i1> @icmp_eq_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {21; CHECK-LABEL: icmp_eq_vx_nxv1i8:22; CHECK:       # %bb.0:23; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma24; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t25; CHECK-NEXT:    ret26  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 027  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer28  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)29  ret <vscale x 1 x i1> %v30}31 32define <vscale x 1 x i1> @icmp_eq_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {33; CHECK-LABEL: icmp_eq_vx_swap_nxv1i8:34; CHECK:       # %bb.0:35; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma36; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t37; CHECK-NEXT:    ret38  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 039  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer40  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)41  ret <vscale x 1 x i1> %v42}43 44define <vscale x 1 x i1> @icmp_eq_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {45; CHECK-LABEL: icmp_eq_vi_nxv1i8:46; CHECK:       # %bb.0:47; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma48; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t49; CHECK-NEXT:    ret50  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)51  ret <vscale x 1 x i1> %v52}53 54define <vscale x 1 x i1> @icmp_eq_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {55; CHECK-LABEL: icmp_eq_vi_swap_nxv1i8:56; CHECK:       # %bb.0:57; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma58; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t59; CHECK-NEXT:    ret60  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)61  ret <vscale x 1 x i1> %v62}63 64define <vscale x 1 x i1> @icmp_ne_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {65; CHECK-LABEL: icmp_ne_vv_nxv1i8:66; CHECK:       # %bb.0:67; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma68; CHECK-NEXT:    vmsne.vv v0, v8, v9, v0.t69; CHECK-NEXT:    ret70  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)71  ret <vscale x 1 x i1> %v72}73 74define <vscale x 1 x i1> @icmp_ne_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {75; CHECK-LABEL: icmp_ne_vx_nxv1i8:76; CHECK:       # %bb.0:77; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma78; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t79; CHECK-NEXT:    ret80  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 081  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer82  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)83  ret <vscale x 1 x i1> %v84}85 86define <vscale x 1 x i1> @icmp_ne_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {87; CHECK-LABEL: icmp_ne_vx_swap_nxv1i8:88; CHECK:       # %bb.0:89; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma90; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t91; CHECK-NEXT:    ret92  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 093  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer94  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)95  ret <vscale x 1 x i1> %v96}97 98define <vscale x 1 x i1> @icmp_ne_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {99; CHECK-LABEL: icmp_ne_vi_nxv1i8:100; CHECK:       # %bb.0:101; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma102; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t103; CHECK-NEXT:    ret104  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)105  ret <vscale x 1 x i1> %v106}107 108define <vscale x 1 x i1> @icmp_ne_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {109; CHECK-LABEL: icmp_ne_vi_swap_nxv1i8:110; CHECK:       # %bb.0:111; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma112; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t113; CHECK-NEXT:    ret114  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)115  ret <vscale x 1 x i1> %v116}117 118define <vscale x 1 x i1> @icmp_ugt_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {119; CHECK-LABEL: icmp_ugt_vv_nxv1i8:120; CHECK:       # %bb.0:121; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma122; CHECK-NEXT:    vmsltu.vv v0, v9, v8, v0.t123; CHECK-NEXT:    ret124  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)125  ret <vscale x 1 x i1> %v126}127 128define <vscale x 1 x i1> @icmp_ugt_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {129; CHECK-LABEL: icmp_ugt_vx_nxv1i8:130; CHECK:       # %bb.0:131; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma132; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t133; CHECK-NEXT:    ret134  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0135  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer136  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)137  ret <vscale x 1 x i1> %v138}139 140define <vscale x 1 x i1> @icmp_ugt_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {141; CHECK-LABEL: icmp_ugt_vx_swap_nxv1i8:142; CHECK:       # %bb.0:143; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma144; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t145; CHECK-NEXT:    ret146  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0147  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer148  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)149  ret <vscale x 1 x i1> %v150}151 152define <vscale x 1 x i1> @icmp_ugt_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {153; CHECK-LABEL: icmp_ugt_vi_nxv1i8:154; CHECK:       # %bb.0:155; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma156; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t157; CHECK-NEXT:    ret158  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)159  ret <vscale x 1 x i1> %v160}161 162define <vscale x 1 x i1> @icmp_ugt_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {163; CHECK-LABEL: icmp_ugt_vi_swap_nxv1i8:164; CHECK:       # %bb.0:165; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma166; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t167; CHECK-NEXT:    ret168  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)169  ret <vscale x 1 x i1> %v170}171 172define <vscale x 1 x i1> @icmp_uge_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {173; CHECK-LABEL: icmp_uge_vv_nxv1i8:174; CHECK:       # %bb.0:175; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma176; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t177; CHECK-NEXT:    ret178  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)179  ret <vscale x 1 x i1> %v180}181 182define <vscale x 1 x i1> @icmp_uge_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {183; CHECK-LABEL: icmp_uge_vx_nxv1i8:184; CHECK:       # %bb.0:185; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma186; CHECK-NEXT:    vmv.v.x v9, a0187; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t188; CHECK-NEXT:    ret189  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0190  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer191  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)192  ret <vscale x 1 x i1> %v193}194 195define <vscale x 1 x i1> @icmp_uge_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {196; CHECK-LABEL: icmp_uge_vx_swap_nxv1i8:197; CHECK:       # %bb.0:198; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma199; CHECK-NEXT:    vmsleu.vx v0, v8, a0, v0.t200; CHECK-NEXT:    ret201  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0202  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer203  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)204  ret <vscale x 1 x i1> %v205}206 207define <vscale x 1 x i1> @icmp_uge_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {208; CHECK-LABEL: icmp_uge_vi_nxv1i8:209; CHECK:       # %bb.0:210; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma211; CHECK-NEXT:    vmsgtu.vi v0, v8, 3, v0.t212; CHECK-NEXT:    ret213  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)214  ret <vscale x 1 x i1> %v215}216 217define <vscale x 1 x i1> @icmp_uge_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {218; CHECK-LABEL: icmp_uge_vi_swap_nxv1i8:219; CHECK:       # %bb.0:220; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma221; CHECK-NEXT:    vmsleu.vi v0, v8, 4, v0.t222; CHECK-NEXT:    ret223  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)224  ret <vscale x 1 x i1> %v225}226 227define <vscale x 1 x i1> @icmp_ult_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {228; CHECK-LABEL: icmp_ult_vv_nxv1i8:229; CHECK:       # %bb.0:230; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma231; CHECK-NEXT:    vmsltu.vv v0, v8, v9, v0.t232; CHECK-NEXT:    ret233  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)234  ret <vscale x 1 x i1> %v235}236 237define <vscale x 1 x i1> @icmp_ult_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {238; CHECK-LABEL: icmp_ult_vx_nxv1i8:239; CHECK:       # %bb.0:240; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma241; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t242; CHECK-NEXT:    ret243  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0244  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer245  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)246  ret <vscale x 1 x i1> %v247}248 249define <vscale x 1 x i1> @icmp_ult_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {250; CHECK-LABEL: icmp_ult_vx_swap_nxv1i8:251; CHECK:       # %bb.0:252; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma253; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t254; CHECK-NEXT:    ret255  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0256  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer257  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)258  ret <vscale x 1 x i1> %v259}260 261define <vscale x 1 x i1> @icmp_ult_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {262; CHECK-LABEL: icmp_ult_vi_nxv1i8:263; CHECK:       # %bb.0:264; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma265; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t266; CHECK-NEXT:    ret267  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)268  ret <vscale x 1 x i1> %v269}270 271define <vscale x 1 x i1> @icmp_ult_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {272; CHECK-LABEL: icmp_ult_vi_swap_nxv1i8:273; CHECK:       # %bb.0:274; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma275; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t276; CHECK-NEXT:    ret277  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)278  ret <vscale x 1 x i1> %v279}280 281define <vscale x 1 x i1> @icmp_sgt_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {282; CHECK-LABEL: icmp_sgt_vv_nxv1i8:283; CHECK:       # %bb.0:284; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma285; CHECK-NEXT:    vmslt.vv v0, v9, v8, v0.t286; CHECK-NEXT:    ret287  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)288  ret <vscale x 1 x i1> %v289}290 291define <vscale x 1 x i1> @icmp_sgt_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {292; CHECK-LABEL: icmp_sgt_vx_nxv1i8:293; CHECK:       # %bb.0:294; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma295; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t296; CHECK-NEXT:    ret297  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0298  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer299  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)300  ret <vscale x 1 x i1> %v301}302 303define <vscale x 1 x i1> @icmp_sgt_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {304; CHECK-LABEL: icmp_sgt_vx_swap_nxv1i8:305; CHECK:       # %bb.0:306; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma307; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t308; CHECK-NEXT:    ret309  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0310  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer311  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)312  ret <vscale x 1 x i1> %v313}314 315define <vscale x 1 x i1> @icmp_sgt_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {316; CHECK-LABEL: icmp_sgt_vi_nxv1i8:317; CHECK:       # %bb.0:318; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma319; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t320; CHECK-NEXT:    ret321  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)322  ret <vscale x 1 x i1> %v323}324 325define <vscale x 1 x i1> @icmp_sgt_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {326; CHECK-LABEL: icmp_sgt_vi_swap_nxv1i8:327; CHECK:       # %bb.0:328; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma329; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t330; CHECK-NEXT:    ret331  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)332  ret <vscale x 1 x i1> %v333}334 335define <vscale x 1 x i1> @icmp_sge_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {336; CHECK-LABEL: icmp_sge_vv_nxv1i8:337; CHECK:       # %bb.0:338; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma339; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t340; CHECK-NEXT:    ret341  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)342  ret <vscale x 1 x i1> %v343}344 345define <vscale x 1 x i1> @icmp_sge_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {346; CHECK-LABEL: icmp_sge_vx_nxv1i8:347; CHECK:       # %bb.0:348; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma349; CHECK-NEXT:    vmv.v.x v9, a0350; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t351; CHECK-NEXT:    ret352  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0353  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer354  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)355  ret <vscale x 1 x i1> %v356}357 358define <vscale x 1 x i1> @icmp_sge_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {359; CHECK-LABEL: icmp_sge_vx_swap_nxv1i8:360; CHECK:       # %bb.0:361; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma362; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t363; CHECK-NEXT:    ret364  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0365  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer366  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)367  ret <vscale x 1 x i1> %v368}369 370define <vscale x 1 x i1> @icmp_sge_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {371; CHECK-LABEL: icmp_sge_vi_nxv1i8:372; CHECK:       # %bb.0:373; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma374; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t375; CHECK-NEXT:    ret376  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)377  ret <vscale x 1 x i1> %v378}379 380define <vscale x 1 x i1> @icmp_sge_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {381; CHECK-LABEL: icmp_sge_vi_swap_nxv1i8:382; CHECK:       # %bb.0:383; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma384; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t385; CHECK-NEXT:    ret386  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)387  ret <vscale x 1 x i1> %v388}389 390define <vscale x 1 x i1> @icmp_slt_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {391; CHECK-LABEL: icmp_slt_vv_nxv1i8:392; CHECK:       # %bb.0:393; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma394; CHECK-NEXT:    vmslt.vv v0, v8, v9, v0.t395; CHECK-NEXT:    ret396  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)397  ret <vscale x 1 x i1> %v398}399 400define <vscale x 1 x i1> @icmp_slt_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {401; CHECK-LABEL: icmp_slt_vx_nxv1i8:402; CHECK:       # %bb.0:403; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma404; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t405; CHECK-NEXT:    ret406  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0407  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer408  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)409  ret <vscale x 1 x i1> %v410}411 412define <vscale x 1 x i1> @icmp_slt_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {413; CHECK-LABEL: icmp_slt_vx_swap_nxv1i8:414; CHECK:       # %bb.0:415; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma416; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t417; CHECK-NEXT:    ret418  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0419  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer420  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)421  ret <vscale x 1 x i1> %v422}423 424define <vscale x 1 x i1> @icmp_slt_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {425; CHECK-LABEL: icmp_slt_vi_nxv1i8:426; CHECK:       # %bb.0:427; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma428; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t429; CHECK-NEXT:    ret430  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)431  ret <vscale x 1 x i1> %v432}433 434define <vscale x 1 x i1> @icmp_slt_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {435; CHECK-LABEL: icmp_slt_vi_swap_nxv1i8:436; CHECK:       # %bb.0:437; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma438; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t439; CHECK-NEXT:    ret440  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)441  ret <vscale x 1 x i1> %v442}443 444define <vscale x 1 x i1> @icmp_sle_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {445; CHECK-LABEL: icmp_sle_vv_nxv1i8:446; CHECK:       # %bb.0:447; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma448; CHECK-NEXT:    vmsle.vv v0, v8, v9, v0.t449; CHECK-NEXT:    ret450  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)451  ret <vscale x 1 x i1> %v452}453 454define <vscale x 1 x i1> @icmp_sle_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {455; CHECK-LABEL: icmp_sle_vx_nxv1i8:456; CHECK:       # %bb.0:457; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma458; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t459; CHECK-NEXT:    ret460  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0461  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer462  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)463  ret <vscale x 1 x i1> %v464}465 466define <vscale x 1 x i1> @icmp_sle_vx_swap_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {467; CHECK-LABEL: icmp_sle_vx_swap_nxv1i8:468; CHECK:       # %bb.0:469; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma470; CHECK-NEXT:    vmv.v.x v9, a0471; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t472; CHECK-NEXT:    ret473  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0474  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer475  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i8> %va, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)476  ret <vscale x 1 x i1> %v477}478 479define <vscale x 1 x i1> @icmp_sle_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {480; CHECK-LABEL: icmp_sle_vi_nxv1i8:481; CHECK:       # %bb.0:482; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma483; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t484; CHECK-NEXT:    ret485  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)486  ret <vscale x 1 x i1> %v487}488 489define <vscale x 1 x i1> @icmp_sle_vi_swap_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {490; CHECK-LABEL: icmp_sle_vi_swap_nxv1i8:491; CHECK:       # %bb.0:492; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma493; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t494; CHECK-NEXT:    ret495  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i8(<vscale x 1 x i8> splat (i8 4), <vscale x 1 x i8> %va, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)496  ret <vscale x 1 x i1> %v497}498 499define <vscale x 3 x i1> @icmp_eq_vv_nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, <vscale x 3 x i1> %m, i32 zeroext %evl) {500; CHECK-LABEL: icmp_eq_vv_nxv3i8:501; CHECK:       # %bb.0:502; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma503; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t504; CHECK-NEXT:    ret505  %v = call <vscale x 3 x i1> @llvm.vp.icmp.nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, metadata !"eq", <vscale x 3 x i1> %m, i32 %evl)506  ret <vscale x 3 x i1> %v507}508 509define <vscale x 3 x i1> @icmp_eq_vx_nxv3i8(<vscale x 3 x i8> %va, i8 %b, <vscale x 3 x i1> %m, i32 zeroext %evl) {510; CHECK-LABEL: icmp_eq_vx_nxv3i8:511; CHECK:       # %bb.0:512; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma513; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t514; CHECK-NEXT:    ret515  %elt.head = insertelement <vscale x 3 x i8> poison, i8 %b, i32 0516  %vb = shufflevector <vscale x 3 x i8> %elt.head, <vscale x 3 x i8> poison, <vscale x 3 x i32> zeroinitializer517  %v = call <vscale x 3 x i1> @llvm.vp.icmp.nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, metadata !"eq", <vscale x 3 x i1> %m, i32 %evl)518  ret <vscale x 3 x i1> %v519}520 521define <vscale x 3 x i1> @icmp_eq_vx_swap_nxv3i8(<vscale x 3 x i8> %va, i8 %b, <vscale x 3 x i1> %m, i32 zeroext %evl) {522; CHECK-LABEL: icmp_eq_vx_swap_nxv3i8:523; CHECK:       # %bb.0:524; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma525; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t526; CHECK-NEXT:    ret527  %elt.head = insertelement <vscale x 3 x i8> poison, i8 %b, i32 0528  %vb = shufflevector <vscale x 3 x i8> %elt.head, <vscale x 3 x i8> poison, <vscale x 3 x i32> zeroinitializer529  %v = call <vscale x 3 x i1> @llvm.vp.icmp.nxv3i8(<vscale x 3 x i8> %vb, <vscale x 3 x i8> %va, metadata !"eq", <vscale x 3 x i1> %m, i32 %evl)530  ret <vscale x 3 x i1> %v531}532 533define <vscale x 8 x i1> @icmp_eq_vv_nxv8i7(<vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {534; CHECK-LABEL: icmp_eq_vv_nxv8i7:535; CHECK:       # %bb.0:536; CHECK-NEXT:    li a1, 127537; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma538; CHECK-NEXT:    vand.vx v9, v9, a1539; CHECK-NEXT:    vand.vx v8, v8, a1540; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t541; CHECK-NEXT:    ret542  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i7(<vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)543  ret <vscale x 8 x i1> %v544}545 546define <vscale x 8 x i1> @icmp_eq_vx_nxv8i7(<vscale x 8 x i7> %va, i7 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {547; CHECK-LABEL: icmp_eq_vx_nxv8i7:548; CHECK:       # %bb.0:549; CHECK-NEXT:    li a2, 127550; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma551; CHECK-NEXT:    vmv.v.x v9, a0552; CHECK-NEXT:    vand.vx v8, v8, a2553; CHECK-NEXT:    vand.vx v9, v9, a2554; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t555; CHECK-NEXT:    ret556  %elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 0557  %vb = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer558  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i7(<vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)559  ret <vscale x 8 x i1> %v560}561 562define <vscale x 8 x i1> @icmp_eq_vx_swap_nxv8i7(<vscale x 8 x i7> %va, i7 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {563; CHECK-LABEL: icmp_eq_vx_swap_nxv8i7:564; CHECK:       # %bb.0:565; CHECK-NEXT:    li a2, 127566; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma567; CHECK-NEXT:    vmv.v.x v9, a0568; CHECK-NEXT:    vand.vx v8, v8, a2569; CHECK-NEXT:    vand.vx v9, v9, a2570; CHECK-NEXT:    vmseq.vv v0, v9, v8, v0.t571; CHECK-NEXT:    ret572  %elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 0573  %vb = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer574  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i7(<vscale x 8 x i7> %vb, <vscale x 8 x i7> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)575  ret <vscale x 8 x i1> %v576}577 578define <vscale x 8 x i1> @icmp_eq_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {579; CHECK-LABEL: icmp_eq_vv_nxv8i8:580; CHECK:       # %bb.0:581; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma582; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t583; CHECK-NEXT:    ret584  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)585  ret <vscale x 8 x i1> %v586}587 588define <vscale x 8 x i1> @icmp_eq_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {589; CHECK-LABEL: icmp_eq_vx_nxv8i8:590; CHECK:       # %bb.0:591; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma592; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t593; CHECK-NEXT:    ret594  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0595  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer596  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)597  ret <vscale x 8 x i1> %v598}599 600define <vscale x 8 x i1> @icmp_eq_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {601; CHECK-LABEL: icmp_eq_vx_swap_nxv8i8:602; CHECK:       # %bb.0:603; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma604; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t605; CHECK-NEXT:    ret606  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0607  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer608  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)609  ret <vscale x 8 x i1> %v610}611 612define <vscale x 8 x i1> @icmp_eq_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {613; CHECK-LABEL: icmp_eq_vi_nxv8i8:614; CHECK:       # %bb.0:615; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma616; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t617; CHECK-NEXT:    ret618  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)619  ret <vscale x 8 x i1> %v620}621 622define <vscale x 8 x i1> @icmp_eq_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {623; CHECK-LABEL: icmp_eq_vi_swap_nxv8i8:624; CHECK:       # %bb.0:625; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma626; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t627; CHECK-NEXT:    ret628  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)629  ret <vscale x 8 x i1> %v630}631 632define <vscale x 8 x i1> @icmp_ne_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {633; CHECK-LABEL: icmp_ne_vv_nxv8i8:634; CHECK:       # %bb.0:635; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma636; CHECK-NEXT:    vmsne.vv v0, v8, v9, v0.t637; CHECK-NEXT:    ret638  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)639  ret <vscale x 8 x i1> %v640}641 642define <vscale x 8 x i1> @icmp_ne_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {643; CHECK-LABEL: icmp_ne_vx_nxv8i8:644; CHECK:       # %bb.0:645; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma646; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t647; CHECK-NEXT:    ret648  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0649  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer650  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)651  ret <vscale x 8 x i1> %v652}653 654define <vscale x 8 x i1> @icmp_ne_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {655; CHECK-LABEL: icmp_ne_vx_swap_nxv8i8:656; CHECK:       # %bb.0:657; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma658; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t659; CHECK-NEXT:    ret660  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0661  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer662  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)663  ret <vscale x 8 x i1> %v664}665 666define <vscale x 8 x i1> @icmp_ne_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {667; CHECK-LABEL: icmp_ne_vi_nxv8i8:668; CHECK:       # %bb.0:669; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma670; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t671; CHECK-NEXT:    ret672  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)673  ret <vscale x 8 x i1> %v674}675 676define <vscale x 8 x i1> @icmp_ne_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {677; CHECK-LABEL: icmp_ne_vi_swap_nxv8i8:678; CHECK:       # %bb.0:679; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma680; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t681; CHECK-NEXT:    ret682  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)683  ret <vscale x 8 x i1> %v684}685 686define <vscale x 8 x i1> @icmp_ugt_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {687; CHECK-LABEL: icmp_ugt_vv_nxv8i8:688; CHECK:       # %bb.0:689; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma690; CHECK-NEXT:    vmsltu.vv v0, v9, v8, v0.t691; CHECK-NEXT:    ret692  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)693  ret <vscale x 8 x i1> %v694}695 696define <vscale x 8 x i1> @icmp_ugt_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {697; CHECK-LABEL: icmp_ugt_vx_nxv8i8:698; CHECK:       # %bb.0:699; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma700; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t701; CHECK-NEXT:    ret702  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0703  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer704  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)705  ret <vscale x 8 x i1> %v706}707 708define <vscale x 8 x i1> @icmp_ugt_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {709; CHECK-LABEL: icmp_ugt_vx_swap_nxv8i8:710; CHECK:       # %bb.0:711; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma712; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t713; CHECK-NEXT:    ret714  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0715  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer716  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)717  ret <vscale x 8 x i1> %v718}719 720define <vscale x 8 x i1> @icmp_ugt_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {721; CHECK-LABEL: icmp_ugt_vi_nxv8i8:722; CHECK:       # %bb.0:723; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma724; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t725; CHECK-NEXT:    ret726  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)727  ret <vscale x 8 x i1> %v728}729 730define <vscale x 8 x i1> @icmp_ugt_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {731; CHECK-LABEL: icmp_ugt_vi_swap_nxv8i8:732; CHECK:       # %bb.0:733; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma734; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t735; CHECK-NEXT:    ret736  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)737  ret <vscale x 8 x i1> %v738}739 740define <vscale x 8 x i1> @icmp_uge_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {741; CHECK-LABEL: icmp_uge_vv_nxv8i8:742; CHECK:       # %bb.0:743; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma744; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t745; CHECK-NEXT:    ret746  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)747  ret <vscale x 8 x i1> %v748}749 750define <vscale x 8 x i1> @icmp_uge_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {751; CHECK-LABEL: icmp_uge_vx_nxv8i8:752; CHECK:       # %bb.0:753; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma754; CHECK-NEXT:    vmv.v.x v9, a0755; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t756; CHECK-NEXT:    ret757  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0758  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer759  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)760  ret <vscale x 8 x i1> %v761}762 763define <vscale x 8 x i1> @icmp_uge_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {764; CHECK-LABEL: icmp_uge_vx_swap_nxv8i8:765; CHECK:       # %bb.0:766; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma767; CHECK-NEXT:    vmsleu.vx v0, v8, a0, v0.t768; CHECK-NEXT:    ret769  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0770  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer771  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)772  ret <vscale x 8 x i1> %v773}774 775define <vscale x 8 x i1> @icmp_uge_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {776; CHECK-LABEL: icmp_uge_vi_nxv8i8:777; CHECK:       # %bb.0:778; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma779; CHECK-NEXT:    vmsgtu.vi v0, v8, 3, v0.t780; CHECK-NEXT:    ret781  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)782  ret <vscale x 8 x i1> %v783}784 785define <vscale x 8 x i1> @icmp_uge_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {786; CHECK-LABEL: icmp_uge_vi_swap_nxv8i8:787; CHECK:       # %bb.0:788; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma789; CHECK-NEXT:    vmsleu.vi v0, v8, 4, v0.t790; CHECK-NEXT:    ret791  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)792  ret <vscale x 8 x i1> %v793}794 795define <vscale x 8 x i1> @icmp_ult_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {796; CHECK-LABEL: icmp_ult_vv_nxv8i8:797; CHECK:       # %bb.0:798; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma799; CHECK-NEXT:    vmsltu.vv v0, v8, v9, v0.t800; CHECK-NEXT:    ret801  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)802  ret <vscale x 8 x i1> %v803}804 805define <vscale x 8 x i1> @icmp_ult_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {806; CHECK-LABEL: icmp_ult_vx_nxv8i8:807; CHECK:       # %bb.0:808; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma809; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t810; CHECK-NEXT:    ret811  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0812  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer813  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)814  ret <vscale x 8 x i1> %v815}816 817define <vscale x 8 x i1> @icmp_ult_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {818; CHECK-LABEL: icmp_ult_vx_swap_nxv8i8:819; CHECK:       # %bb.0:820; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma821; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t822; CHECK-NEXT:    ret823  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0824  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer825  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)826  ret <vscale x 8 x i1> %v827}828 829define <vscale x 8 x i1> @icmp_ult_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {830; CHECK-LABEL: icmp_ult_vi_nxv8i8:831; CHECK:       # %bb.0:832; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma833; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t834; CHECK-NEXT:    ret835  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)836  ret <vscale x 8 x i1> %v837}838 839define <vscale x 8 x i1> @icmp_ult_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {840; CHECK-LABEL: icmp_ult_vi_swap_nxv8i8:841; CHECK:       # %bb.0:842; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma843; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t844; CHECK-NEXT:    ret845  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)846  ret <vscale x 8 x i1> %v847}848 849define <vscale x 8 x i1> @icmp_sgt_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {850; CHECK-LABEL: icmp_sgt_vv_nxv8i8:851; CHECK:       # %bb.0:852; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma853; CHECK-NEXT:    vmslt.vv v0, v9, v8, v0.t854; CHECK-NEXT:    ret855  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)856  ret <vscale x 8 x i1> %v857}858 859define <vscale x 8 x i1> @icmp_sgt_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {860; CHECK-LABEL: icmp_sgt_vx_nxv8i8:861; CHECK:       # %bb.0:862; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma863; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t864; CHECK-NEXT:    ret865  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0866  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer867  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)868  ret <vscale x 8 x i1> %v869}870 871define <vscale x 8 x i1> @icmp_sgt_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {872; CHECK-LABEL: icmp_sgt_vx_swap_nxv8i8:873; CHECK:       # %bb.0:874; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma875; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t876; CHECK-NEXT:    ret877  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0878  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer879  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)880  ret <vscale x 8 x i1> %v881}882 883define <vscale x 8 x i1> @icmp_sgt_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {884; CHECK-LABEL: icmp_sgt_vi_nxv8i8:885; CHECK:       # %bb.0:886; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma887; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t888; CHECK-NEXT:    ret889  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)890  ret <vscale x 8 x i1> %v891}892 893define <vscale x 8 x i1> @icmp_sgt_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {894; CHECK-LABEL: icmp_sgt_vi_swap_nxv8i8:895; CHECK:       # %bb.0:896; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma897; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t898; CHECK-NEXT:    ret899  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)900  ret <vscale x 8 x i1> %v901}902 903define <vscale x 8 x i1> @icmp_sge_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {904; CHECK-LABEL: icmp_sge_vv_nxv8i8:905; CHECK:       # %bb.0:906; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma907; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t908; CHECK-NEXT:    ret909  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)910  ret <vscale x 8 x i1> %v911}912 913define <vscale x 8 x i1> @icmp_sge_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {914; CHECK-LABEL: icmp_sge_vx_nxv8i8:915; CHECK:       # %bb.0:916; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma917; CHECK-NEXT:    vmv.v.x v9, a0918; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t919; CHECK-NEXT:    ret920  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0921  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer922  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)923  ret <vscale x 8 x i1> %v924}925 926define <vscale x 8 x i1> @icmp_sge_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {927; CHECK-LABEL: icmp_sge_vx_swap_nxv8i8:928; CHECK:       # %bb.0:929; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma930; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t931; CHECK-NEXT:    ret932  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0933  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer934  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)935  ret <vscale x 8 x i1> %v936}937 938define <vscale x 8 x i1> @icmp_sge_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {939; CHECK-LABEL: icmp_sge_vi_nxv8i8:940; CHECK:       # %bb.0:941; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma942; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t943; CHECK-NEXT:    ret944  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)945  ret <vscale x 8 x i1> %v946}947 948define <vscale x 8 x i1> @icmp_sge_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {949; CHECK-LABEL: icmp_sge_vi_swap_nxv8i8:950; CHECK:       # %bb.0:951; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma952; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t953; CHECK-NEXT:    ret954  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)955  ret <vscale x 8 x i1> %v956}957 958define <vscale x 8 x i1> @icmp_slt_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {959; CHECK-LABEL: icmp_slt_vv_nxv8i8:960; CHECK:       # %bb.0:961; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma962; CHECK-NEXT:    vmslt.vv v0, v8, v9, v0.t963; CHECK-NEXT:    ret964  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)965  ret <vscale x 8 x i1> %v966}967 968define <vscale x 8 x i1> @icmp_slt_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {969; CHECK-LABEL: icmp_slt_vx_nxv8i8:970; CHECK:       # %bb.0:971; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma972; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t973; CHECK-NEXT:    ret974  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0975  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer976  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)977  ret <vscale x 8 x i1> %v978}979 980define <vscale x 8 x i1> @icmp_slt_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {981; CHECK-LABEL: icmp_slt_vx_swap_nxv8i8:982; CHECK:       # %bb.0:983; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma984; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t985; CHECK-NEXT:    ret986  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0987  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer988  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)989  ret <vscale x 8 x i1> %v990}991 992define <vscale x 8 x i1> @icmp_slt_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {993; CHECK-LABEL: icmp_slt_vi_nxv8i8:994; CHECK:       # %bb.0:995; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma996; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t997; CHECK-NEXT:    ret998  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)999  ret <vscale x 8 x i1> %v1000}1001 1002define <vscale x 8 x i1> @icmp_slt_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1003; CHECK-LABEL: icmp_slt_vi_swap_nxv8i8:1004; CHECK:       # %bb.0:1005; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma1006; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t1007; CHECK-NEXT:    ret1008  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)1009  ret <vscale x 8 x i1> %v1010}1011 1012define <vscale x 8 x i1> @icmp_sle_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {1013; CHECK-LABEL: icmp_sle_vv_nxv8i8:1014; CHECK:       # %bb.0:1015; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma1016; CHECK-NEXT:    vmsle.vv v0, v8, v9, v0.t1017; CHECK-NEXT:    ret1018  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)1019  ret <vscale x 8 x i1> %v1020}1021 1022define <vscale x 8 x i1> @icmp_sle_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1023; CHECK-LABEL: icmp_sle_vx_nxv8i8:1024; CHECK:       # %bb.0:1025; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1026; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t1027; CHECK-NEXT:    ret1028  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 01029  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer1030  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)1031  ret <vscale x 8 x i1> %v1032}1033 1034define <vscale x 8 x i1> @icmp_sle_vx_swap_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1035; CHECK-LABEL: icmp_sle_vx_swap_nxv8i8:1036; CHECK:       # %bb.0:1037; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma1038; CHECK-NEXT:    vmv.v.x v9, a01039; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t1040; CHECK-NEXT:    ret1041  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 01042  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer1043  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i8> %va, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)1044  ret <vscale x 8 x i1> %v1045}1046 1047define <vscale x 8 x i1> @icmp_sle_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1048; CHECK-LABEL: icmp_sle_vi_nxv8i8:1049; CHECK:       # %bb.0:1050; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma1051; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t1052; CHECK-NEXT:    ret1053  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)1054  ret <vscale x 8 x i1> %v1055}1056 1057define <vscale x 8 x i1> @icmp_sle_vi_swap_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1058; CHECK-LABEL: icmp_sle_vi_swap_nxv8i8:1059; CHECK:       # %bb.0:1060; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma1061; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t1062; CHECK-NEXT:    ret1063  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i8(<vscale x 8 x i8> splat (i8 4), <vscale x 8 x i8> %va, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)1064  ret <vscale x 8 x i1> %v1065}1066 1067define <vscale x 128 x i1> @icmp_eq_vv_nxv128i8(<vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, <vscale x 128 x i1> %m, i32 zeroext %evl) {1068; CHECK-LABEL: icmp_eq_vv_nxv128i8:1069; CHECK:       # %bb.0:1070; CHECK-NEXT:    addi sp, sp, -161071; CHECK-NEXT:    .cfi_def_cfa_offset 161072; CHECK-NEXT:    csrr a1, vlenb1073; CHECK-NEXT:    slli a1, a1, 31074; CHECK-NEXT:    sub sp, sp, a11075; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1076; CHECK-NEXT:    vsetvli a1, zero, e8, m8, ta, ma1077; CHECK-NEXT:    vmv1r.v v7, v01078; CHECK-NEXT:    addi a1, sp, 161079; CHECK-NEXT:    vs8r.v v8, (a1) # vscale x 64-byte Folded Spill1080; CHECK-NEXT:    csrr a1, vlenb1081; CHECK-NEXT:    vlm.v v0, (a2)1082; CHECK-NEXT:    slli a1, a1, 31083; CHECK-NEXT:    add a2, a0, a11084; CHECK-NEXT:    sub a4, a3, a11085; CHECK-NEXT:    vl8r.v v24, (a2)1086; CHECK-NEXT:    sltu a2, a3, a41087; CHECK-NEXT:    vl8r.v v8, (a0)1088; CHECK-NEXT:    addi a2, a2, -11089; CHECK-NEXT:    and a2, a2, a41090; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma1091; CHECK-NEXT:    vmseq.vv v6, v16, v24, v0.t1092; CHECK-NEXT:    bltu a3, a1, .LBB96_21093; CHECK-NEXT:  # %bb.1:1094; CHECK-NEXT:    mv a3, a11095; CHECK-NEXT:  .LBB96_2:1096; CHECK-NEXT:    vmv1r.v v0, v71097; CHECK-NEXT:    addi a0, sp, 161098; CHECK-NEXT:    vl8r.v v24, (a0) # vscale x 64-byte Folded Reload1099; CHECK-NEXT:    vsetvli zero, a3, e8, m8, ta, ma1100; CHECK-NEXT:    vmseq.vv v16, v24, v8, v0.t1101; CHECK-NEXT:    vmv1r.v v0, v161102; CHECK-NEXT:    vmv1r.v v8, v61103; CHECK-NEXT:    csrr a0, vlenb1104; CHECK-NEXT:    slli a0, a0, 31105; CHECK-NEXT:    add sp, sp, a01106; CHECK-NEXT:    .cfi_def_cfa sp, 161107; CHECK-NEXT:    addi sp, sp, 161108; CHECK-NEXT:    .cfi_def_cfa_offset 01109; CHECK-NEXT:    ret1110  %v = call <vscale x 128 x i1> @llvm.vp.icmp.nxv128i8(<vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, metadata !"eq", <vscale x 128 x i1> %m, i32 %evl)1111  ret <vscale x 128 x i1> %v1112}1113 1114define <vscale x 128 x i1> @icmp_eq_vx_nxv128i8(<vscale x 128 x i8> %va, i8 %b, <vscale x 128 x i1> %m, i32 zeroext %evl) {1115; CHECK-LABEL: icmp_eq_vx_nxv128i8:1116; CHECK:       # %bb.0:1117; CHECK-NEXT:    vsetvli a3, zero, e8, m8, ta, ma1118; CHECK-NEXT:    vmv1r.v v24, v01119; CHECK-NEXT:    vlm.v v0, (a1)1120; CHECK-NEXT:    csrr a1, vlenb1121; CHECK-NEXT:    slli a1, a1, 31122; CHECK-NEXT:    sub a3, a2, a11123; CHECK-NEXT:    sltu a4, a2, a31124; CHECK-NEXT:    addi a4, a4, -11125; CHECK-NEXT:    and a3, a4, a31126; CHECK-NEXT:    vsetvli zero, a3, e8, m8, ta, ma1127; CHECK-NEXT:    vmseq.vx v25, v16, a0, v0.t1128; CHECK-NEXT:    bltu a2, a1, .LBB97_21129; CHECK-NEXT:  # %bb.1:1130; CHECK-NEXT:    mv a2, a11131; CHECK-NEXT:  .LBB97_2:1132; CHECK-NEXT:    vmv1r.v v0, v241133; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma1134; CHECK-NEXT:    vmseq.vx v16, v8, a0, v0.t1135; CHECK-NEXT:    vmv1r.v v0, v161136; CHECK-NEXT:    vmv1r.v v8, v251137; CHECK-NEXT:    ret1138  %elt.head = insertelement <vscale x 128 x i8> poison, i8 %b, i8 01139  %vb = shufflevector <vscale x 128 x i8> %elt.head, <vscale x 128 x i8> poison, <vscale x 128 x i32> zeroinitializer1140  %v = call <vscale x 128 x i1> @llvm.vp.icmp.nxv128i8(<vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, metadata !"eq", <vscale x 128 x i1> %m, i32 %evl)1141  ret <vscale x 128 x i1> %v1142}1143 1144define <vscale x 128 x i1> @icmp_eq_vx_swap_nxv128i8(<vscale x 128 x i8> %va, i8 %b, <vscale x 128 x i1> %m, i32 zeroext %evl) {1145; CHECK-LABEL: icmp_eq_vx_swap_nxv128i8:1146; CHECK:       # %bb.0:1147; CHECK-NEXT:    vsetvli a3, zero, e8, m8, ta, ma1148; CHECK-NEXT:    vmv1r.v v24, v01149; CHECK-NEXT:    vlm.v v0, (a1)1150; CHECK-NEXT:    csrr a1, vlenb1151; CHECK-NEXT:    slli a1, a1, 31152; CHECK-NEXT:    sub a3, a2, a11153; CHECK-NEXT:    sltu a4, a2, a31154; CHECK-NEXT:    addi a4, a4, -11155; CHECK-NEXT:    and a3, a4, a31156; CHECK-NEXT:    vsetvli zero, a3, e8, m8, ta, ma1157; CHECK-NEXT:    vmseq.vx v25, v16, a0, v0.t1158; CHECK-NEXT:    bltu a2, a1, .LBB98_21159; CHECK-NEXT:  # %bb.1:1160; CHECK-NEXT:    mv a2, a11161; CHECK-NEXT:  .LBB98_2:1162; CHECK-NEXT:    vmv1r.v v0, v241163; CHECK-NEXT:    vsetvli zero, a2, e8, m8, ta, ma1164; CHECK-NEXT:    vmseq.vx v16, v8, a0, v0.t1165; CHECK-NEXT:    vmv1r.v v0, v161166; CHECK-NEXT:    vmv1r.v v8, v251167; CHECK-NEXT:    ret1168  %elt.head = insertelement <vscale x 128 x i8> poison, i8 %b, i8 01169  %vb = shufflevector <vscale x 128 x i8> %elt.head, <vscale x 128 x i8> poison, <vscale x 128 x i32> zeroinitializer1170  %v = call <vscale x 128 x i1> @llvm.vp.icmp.nxv128i8(<vscale x 128 x i8> %vb, <vscale x 128 x i8> %va, metadata !"eq", <vscale x 128 x i1> %m, i32 %evl)1171  ret <vscale x 128 x i1> %v1172}1173 1174define <vscale x 1 x i1> @icmp_eq_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {1175; CHECK-LABEL: icmp_eq_vv_nxv1i32:1176; CHECK:       # %bb.0:1177; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1178; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t1179; CHECK-NEXT:    ret1180  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)1181  ret <vscale x 1 x i1> %v1182}1183 1184define <vscale x 1 x i1> @icmp_eq_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1185; CHECK-LABEL: icmp_eq_vx_nxv1i32:1186; CHECK:       # %bb.0:1187; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1188; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t1189; CHECK-NEXT:    ret1190  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01191  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1192  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)1193  ret <vscale x 1 x i1> %v1194}1195 1196define <vscale x 1 x i1> @icmp_eq_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1197; CHECK-LABEL: icmp_eq_vx_swap_nxv1i32:1198; CHECK:       # %bb.0:1199; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1200; CHECK-NEXT:    vmseq.vx v0, v8, a0, v0.t1201; CHECK-NEXT:    ret1202  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01203  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1204  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)1205  ret <vscale x 1 x i1> %v1206}1207 1208define <vscale x 1 x i1> @icmp_eq_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1209; CHECK-LABEL: icmp_eq_vi_nxv1i32:1210; CHECK:       # %bb.0:1211; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1212; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t1213; CHECK-NEXT:    ret1214  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)1215  ret <vscale x 1 x i1> %v1216}1217 1218define <vscale x 1 x i1> @icmp_eq_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1219; CHECK-LABEL: icmp_eq_vi_swap_nxv1i32:1220; CHECK:       # %bb.0:1221; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1222; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t1223; CHECK-NEXT:    ret1224  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)1225  ret <vscale x 1 x i1> %v1226}1227 1228define <vscale x 1 x i1> @icmp_ne_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {1229; CHECK-LABEL: icmp_ne_vv_nxv1i32:1230; CHECK:       # %bb.0:1231; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1232; CHECK-NEXT:    vmsne.vv v0, v8, v9, v0.t1233; CHECK-NEXT:    ret1234  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)1235  ret <vscale x 1 x i1> %v1236}1237 1238define <vscale x 1 x i1> @icmp_ne_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1239; CHECK-LABEL: icmp_ne_vx_nxv1i32:1240; CHECK:       # %bb.0:1241; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1242; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t1243; CHECK-NEXT:    ret1244  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01245  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1246  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)1247  ret <vscale x 1 x i1> %v1248}1249 1250define <vscale x 1 x i1> @icmp_ne_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1251; CHECK-LABEL: icmp_ne_vx_swap_nxv1i32:1252; CHECK:       # %bb.0:1253; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1254; CHECK-NEXT:    vmsne.vx v0, v8, a0, v0.t1255; CHECK-NEXT:    ret1256  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01257  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1258  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)1259  ret <vscale x 1 x i1> %v1260}1261 1262define <vscale x 1 x i1> @icmp_ne_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1263; CHECK-LABEL: icmp_ne_vi_nxv1i32:1264; CHECK:       # %bb.0:1265; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1266; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t1267; CHECK-NEXT:    ret1268  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)1269  ret <vscale x 1 x i1> %v1270}1271 1272define <vscale x 1 x i1> @icmp_ne_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1273; CHECK-LABEL: icmp_ne_vi_swap_nxv1i32:1274; CHECK:       # %bb.0:1275; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1276; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t1277; CHECK-NEXT:    ret1278  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)1279  ret <vscale x 1 x i1> %v1280}1281 1282define <vscale x 1 x i1> @icmp_ugt_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {1283; CHECK-LABEL: icmp_ugt_vv_nxv1i32:1284; CHECK:       # %bb.0:1285; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1286; CHECK-NEXT:    vmsltu.vv v0, v9, v8, v0.t1287; CHECK-NEXT:    ret1288  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)1289  ret <vscale x 1 x i1> %v1290}1291 1292define <vscale x 1 x i1> @icmp_ugt_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1293; CHECK-LABEL: icmp_ugt_vx_nxv1i32:1294; CHECK:       # %bb.0:1295; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1296; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t1297; CHECK-NEXT:    ret1298  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01299  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1300  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)1301  ret <vscale x 1 x i1> %v1302}1303 1304define <vscale x 1 x i1> @icmp_ugt_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1305; CHECK-LABEL: icmp_ugt_vx_swap_nxv1i32:1306; CHECK:       # %bb.0:1307; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1308; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t1309; CHECK-NEXT:    ret1310  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01311  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1312  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)1313  ret <vscale x 1 x i1> %v1314}1315 1316define <vscale x 1 x i1> @icmp_ugt_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1317; CHECK-LABEL: icmp_ugt_vi_nxv1i32:1318; CHECK:       # %bb.0:1319; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1320; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t1321; CHECK-NEXT:    ret1322  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)1323  ret <vscale x 1 x i1> %v1324}1325 1326define <vscale x 1 x i1> @icmp_ugt_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1327; CHECK-LABEL: icmp_ugt_vi_swap_nxv1i32:1328; CHECK:       # %bb.0:1329; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1330; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t1331; CHECK-NEXT:    ret1332  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)1333  ret <vscale x 1 x i1> %v1334}1335 1336define <vscale x 1 x i1> @icmp_uge_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {1337; CHECK-LABEL: icmp_uge_vv_nxv1i32:1338; CHECK:       # %bb.0:1339; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1340; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t1341; CHECK-NEXT:    ret1342  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)1343  ret <vscale x 1 x i1> %v1344}1345 1346define <vscale x 1 x i1> @icmp_uge_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1347; CHECK-LABEL: icmp_uge_vx_nxv1i32:1348; CHECK:       # %bb.0:1349; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1350; CHECK-NEXT:    vmv.v.x v9, a01351; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t1352; CHECK-NEXT:    ret1353  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01354  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1355  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)1356  ret <vscale x 1 x i1> %v1357}1358 1359define <vscale x 1 x i1> @icmp_uge_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1360; CHECK-LABEL: icmp_uge_vx_swap_nxv1i32:1361; CHECK:       # %bb.0:1362; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1363; CHECK-NEXT:    vmsleu.vx v0, v8, a0, v0.t1364; CHECK-NEXT:    ret1365  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01366  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1367  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)1368  ret <vscale x 1 x i1> %v1369}1370 1371define <vscale x 1 x i1> @icmp_uge_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1372; CHECK-LABEL: icmp_uge_vi_nxv1i32:1373; CHECK:       # %bb.0:1374; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1375; CHECK-NEXT:    vmsgtu.vi v0, v8, 3, v0.t1376; CHECK-NEXT:    ret1377  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)1378  ret <vscale x 1 x i1> %v1379}1380 1381define <vscale x 1 x i1> @icmp_uge_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1382; CHECK-LABEL: icmp_uge_vi_swap_nxv1i32:1383; CHECK:       # %bb.0:1384; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1385; CHECK-NEXT:    vmsleu.vi v0, v8, 4, v0.t1386; CHECK-NEXT:    ret1387  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)1388  ret <vscale x 1 x i1> %v1389}1390 1391define <vscale x 1 x i1> @icmp_ult_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {1392; CHECK-LABEL: icmp_ult_vv_nxv1i32:1393; CHECK:       # %bb.0:1394; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1395; CHECK-NEXT:    vmsltu.vv v0, v8, v9, v0.t1396; CHECK-NEXT:    ret1397  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)1398  ret <vscale x 1 x i1> %v1399}1400 1401define <vscale x 1 x i1> @icmp_ult_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1402; CHECK-LABEL: icmp_ult_vx_nxv1i32:1403; CHECK:       # %bb.0:1404; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1405; CHECK-NEXT:    vmsltu.vx v0, v8, a0, v0.t1406; CHECK-NEXT:    ret1407  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01408  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1409  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)1410  ret <vscale x 1 x i1> %v1411}1412 1413define <vscale x 1 x i1> @icmp_ult_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1414; CHECK-LABEL: icmp_ult_vx_swap_nxv1i32:1415; CHECK:       # %bb.0:1416; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1417; CHECK-NEXT:    vmsgtu.vx v0, v8, a0, v0.t1418; CHECK-NEXT:    ret1419  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01420  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1421  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)1422  ret <vscale x 1 x i1> %v1423}1424 1425define <vscale x 1 x i1> @icmp_ult_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1426; CHECK-LABEL: icmp_ult_vi_nxv1i32:1427; CHECK:       # %bb.0:1428; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1429; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t1430; CHECK-NEXT:    ret1431  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)1432  ret <vscale x 1 x i1> %v1433}1434 1435define <vscale x 1 x i1> @icmp_ult_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1436; CHECK-LABEL: icmp_ult_vi_swap_nxv1i32:1437; CHECK:       # %bb.0:1438; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1439; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t1440; CHECK-NEXT:    ret1441  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)1442  ret <vscale x 1 x i1> %v1443}1444 1445define <vscale x 1 x i1> @icmp_sgt_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {1446; CHECK-LABEL: icmp_sgt_vv_nxv1i32:1447; CHECK:       # %bb.0:1448; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1449; CHECK-NEXT:    vmslt.vv v0, v9, v8, v0.t1450; CHECK-NEXT:    ret1451  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)1452  ret <vscale x 1 x i1> %v1453}1454 1455define <vscale x 1 x i1> @icmp_sgt_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1456; CHECK-LABEL: icmp_sgt_vx_nxv1i32:1457; CHECK:       # %bb.0:1458; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1459; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t1460; CHECK-NEXT:    ret1461  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01462  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1463  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)1464  ret <vscale x 1 x i1> %v1465}1466 1467define <vscale x 1 x i1> @icmp_sgt_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1468; CHECK-LABEL: icmp_sgt_vx_swap_nxv1i32:1469; CHECK:       # %bb.0:1470; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1471; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t1472; CHECK-NEXT:    ret1473  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01474  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1475  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)1476  ret <vscale x 1 x i1> %v1477}1478 1479define <vscale x 1 x i1> @icmp_sgt_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1480; CHECK-LABEL: icmp_sgt_vi_nxv1i32:1481; CHECK:       # %bb.0:1482; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1483; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t1484; CHECK-NEXT:    ret1485  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)1486  ret <vscale x 1 x i1> %v1487}1488 1489define <vscale x 1 x i1> @icmp_sgt_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1490; CHECK-LABEL: icmp_sgt_vi_swap_nxv1i32:1491; CHECK:       # %bb.0:1492; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1493; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t1494; CHECK-NEXT:    ret1495  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)1496  ret <vscale x 1 x i1> %v1497}1498 1499define <vscale x 1 x i1> @icmp_sge_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {1500; CHECK-LABEL: icmp_sge_vv_nxv1i32:1501; CHECK:       # %bb.0:1502; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1503; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t1504; CHECK-NEXT:    ret1505  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)1506  ret <vscale x 1 x i1> %v1507}1508 1509define <vscale x 1 x i1> @icmp_sge_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1510; CHECK-LABEL: icmp_sge_vx_nxv1i32:1511; CHECK:       # %bb.0:1512; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1513; CHECK-NEXT:    vmv.v.x v9, a01514; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t1515; CHECK-NEXT:    ret1516  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01517  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1518  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)1519  ret <vscale x 1 x i1> %v1520}1521 1522define <vscale x 1 x i1> @icmp_sge_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1523; CHECK-LABEL: icmp_sge_vx_swap_nxv1i32:1524; CHECK:       # %bb.0:1525; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1526; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t1527; CHECK-NEXT:    ret1528  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01529  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1530  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)1531  ret <vscale x 1 x i1> %v1532}1533 1534define <vscale x 1 x i1> @icmp_sge_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1535; CHECK-LABEL: icmp_sge_vi_nxv1i32:1536; CHECK:       # %bb.0:1537; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1538; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t1539; CHECK-NEXT:    ret1540  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)1541  ret <vscale x 1 x i1> %v1542}1543 1544define <vscale x 1 x i1> @icmp_sge_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1545; CHECK-LABEL: icmp_sge_vi_swap_nxv1i32:1546; CHECK:       # %bb.0:1547; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1548; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t1549; CHECK-NEXT:    ret1550  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)1551  ret <vscale x 1 x i1> %v1552}1553 1554define <vscale x 1 x i1> @icmp_slt_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {1555; CHECK-LABEL: icmp_slt_vv_nxv1i32:1556; CHECK:       # %bb.0:1557; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1558; CHECK-NEXT:    vmslt.vv v0, v8, v9, v0.t1559; CHECK-NEXT:    ret1560  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)1561  ret <vscale x 1 x i1> %v1562}1563 1564define <vscale x 1 x i1> @icmp_slt_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1565; CHECK-LABEL: icmp_slt_vx_nxv1i32:1566; CHECK:       # %bb.0:1567; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1568; CHECK-NEXT:    vmslt.vx v0, v8, a0, v0.t1569; CHECK-NEXT:    ret1570  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01571  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1572  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)1573  ret <vscale x 1 x i1> %v1574}1575 1576define <vscale x 1 x i1> @icmp_slt_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1577; CHECK-LABEL: icmp_slt_vx_swap_nxv1i32:1578; CHECK:       # %bb.0:1579; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1580; CHECK-NEXT:    vmsgt.vx v0, v8, a0, v0.t1581; CHECK-NEXT:    ret1582  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01583  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1584  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)1585  ret <vscale x 1 x i1> %v1586}1587 1588define <vscale x 1 x i1> @icmp_slt_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1589; CHECK-LABEL: icmp_slt_vi_nxv1i32:1590; CHECK:       # %bb.0:1591; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1592; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t1593; CHECK-NEXT:    ret1594  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)1595  ret <vscale x 1 x i1> %v1596}1597 1598define <vscale x 1 x i1> @icmp_slt_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1599; CHECK-LABEL: icmp_slt_vi_swap_nxv1i32:1600; CHECK:       # %bb.0:1601; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1602; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t1603; CHECK-NEXT:    ret1604  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)1605  ret <vscale x 1 x i1> %v1606}1607 1608define <vscale x 1 x i1> @icmp_sle_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {1609; CHECK-LABEL: icmp_sle_vv_nxv1i32:1610; CHECK:       # %bb.0:1611; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1612; CHECK-NEXT:    vmsle.vv v0, v8, v9, v0.t1613; CHECK-NEXT:    ret1614  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)1615  ret <vscale x 1 x i1> %v1616}1617 1618define <vscale x 1 x i1> @icmp_sle_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1619; CHECK-LABEL: icmp_sle_vx_nxv1i32:1620; CHECK:       # %bb.0:1621; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1622; CHECK-NEXT:    vmsle.vx v0, v8, a0, v0.t1623; CHECK-NEXT:    ret1624  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01625  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1626  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)1627  ret <vscale x 1 x i1> %v1628}1629 1630define <vscale x 1 x i1> @icmp_sle_vx_swap_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1631; CHECK-LABEL: icmp_sle_vx_swap_nxv1i32:1632; CHECK:       # %bb.0:1633; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma1634; CHECK-NEXT:    vmv.v.x v9, a01635; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t1636; CHECK-NEXT:    ret1637  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 01638  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer1639  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i32> %va, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)1640  ret <vscale x 1 x i1> %v1641}1642 1643define <vscale x 1 x i1> @icmp_sle_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1644; CHECK-LABEL: icmp_sle_vi_nxv1i32:1645; CHECK:       # %bb.0:1646; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1647; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t1648; CHECK-NEXT:    ret1649  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)1650  ret <vscale x 1 x i1> %v1651}1652 1653define <vscale x 1 x i1> @icmp_sle_vi_swap_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1654; CHECK-LABEL: icmp_sle_vi_swap_nxv1i32:1655; CHECK:       # %bb.0:1656; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma1657; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t1658; CHECK-NEXT:    ret1659  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i32(<vscale x 1 x i32> splat (i32 4), <vscale x 1 x i32> %va, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)1660  ret <vscale x 1 x i1> %v1661}1662 1663define <vscale x 8 x i1> @icmp_eq_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {1664; CHECK-LABEL: icmp_eq_vv_nxv8i32:1665; CHECK:       # %bb.0:1666; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1667; CHECK-NEXT:    vmseq.vv v16, v8, v12, v0.t1668; CHECK-NEXT:    vmv1r.v v0, v161669; CHECK-NEXT:    ret1670  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)1671  ret <vscale x 8 x i1> %v1672}1673 1674define <vscale x 8 x i1> @icmp_eq_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1675; CHECK-LABEL: icmp_eq_vx_nxv8i32:1676; CHECK:       # %bb.0:1677; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1678; CHECK-NEXT:    vmseq.vx v12, v8, a0, v0.t1679; CHECK-NEXT:    vmv1r.v v0, v121680; CHECK-NEXT:    ret1681  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01682  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1683  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)1684  ret <vscale x 8 x i1> %v1685}1686 1687define <vscale x 8 x i1> @icmp_eq_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1688; CHECK-LABEL: icmp_eq_vx_swap_nxv8i32:1689; CHECK:       # %bb.0:1690; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1691; CHECK-NEXT:    vmseq.vx v12, v8, a0, v0.t1692; CHECK-NEXT:    vmv1r.v v0, v121693; CHECK-NEXT:    ret1694  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01695  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1696  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)1697  ret <vscale x 8 x i1> %v1698}1699 1700define <vscale x 8 x i1> @icmp_eq_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1701; CHECK-LABEL: icmp_eq_vi_nxv8i32:1702; CHECK:       # %bb.0:1703; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1704; CHECK-NEXT:    vmseq.vi v12, v8, 4, v0.t1705; CHECK-NEXT:    vmv1r.v v0, v121706; CHECK-NEXT:    ret1707  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)1708  ret <vscale x 8 x i1> %v1709}1710 1711define <vscale x 8 x i1> @icmp_eq_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1712; CHECK-LABEL: icmp_eq_vi_swap_nxv8i32:1713; CHECK:       # %bb.0:1714; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1715; CHECK-NEXT:    vmseq.vi v12, v8, 4, v0.t1716; CHECK-NEXT:    vmv1r.v v0, v121717; CHECK-NEXT:    ret1718  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)1719  ret <vscale x 8 x i1> %v1720}1721 1722define <vscale x 8 x i1> @icmp_ne_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {1723; CHECK-LABEL: icmp_ne_vv_nxv8i32:1724; CHECK:       # %bb.0:1725; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1726; CHECK-NEXT:    vmsne.vv v16, v8, v12, v0.t1727; CHECK-NEXT:    vmv1r.v v0, v161728; CHECK-NEXT:    ret1729  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)1730  ret <vscale x 8 x i1> %v1731}1732 1733define <vscale x 8 x i1> @icmp_ne_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1734; CHECK-LABEL: icmp_ne_vx_nxv8i32:1735; CHECK:       # %bb.0:1736; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1737; CHECK-NEXT:    vmsne.vx v12, v8, a0, v0.t1738; CHECK-NEXT:    vmv1r.v v0, v121739; CHECK-NEXT:    ret1740  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01741  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1742  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)1743  ret <vscale x 8 x i1> %v1744}1745 1746define <vscale x 8 x i1> @icmp_ne_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1747; CHECK-LABEL: icmp_ne_vx_swap_nxv8i32:1748; CHECK:       # %bb.0:1749; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1750; CHECK-NEXT:    vmsne.vx v12, v8, a0, v0.t1751; CHECK-NEXT:    vmv1r.v v0, v121752; CHECK-NEXT:    ret1753  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01754  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1755  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)1756  ret <vscale x 8 x i1> %v1757}1758 1759define <vscale x 8 x i1> @icmp_ne_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1760; CHECK-LABEL: icmp_ne_vi_nxv8i32:1761; CHECK:       # %bb.0:1762; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1763; CHECK-NEXT:    vmsne.vi v12, v8, 4, v0.t1764; CHECK-NEXT:    vmv1r.v v0, v121765; CHECK-NEXT:    ret1766  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)1767  ret <vscale x 8 x i1> %v1768}1769 1770define <vscale x 8 x i1> @icmp_ne_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1771; CHECK-LABEL: icmp_ne_vi_swap_nxv8i32:1772; CHECK:       # %bb.0:1773; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1774; CHECK-NEXT:    vmsne.vi v12, v8, 4, v0.t1775; CHECK-NEXT:    vmv1r.v v0, v121776; CHECK-NEXT:    ret1777  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)1778  ret <vscale x 8 x i1> %v1779}1780 1781define <vscale x 8 x i1> @icmp_ugt_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {1782; CHECK-LABEL: icmp_ugt_vv_nxv8i32:1783; CHECK:       # %bb.0:1784; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1785; CHECK-NEXT:    vmsltu.vv v16, v12, v8, v0.t1786; CHECK-NEXT:    vmv1r.v v0, v161787; CHECK-NEXT:    ret1788  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)1789  ret <vscale x 8 x i1> %v1790}1791 1792define <vscale x 8 x i1> @icmp_ugt_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1793; CHECK-LABEL: icmp_ugt_vx_nxv8i32:1794; CHECK:       # %bb.0:1795; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1796; CHECK-NEXT:    vmsgtu.vx v12, v8, a0, v0.t1797; CHECK-NEXT:    vmv1r.v v0, v121798; CHECK-NEXT:    ret1799  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01800  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1801  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)1802  ret <vscale x 8 x i1> %v1803}1804 1805define <vscale x 8 x i1> @icmp_ugt_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1806; CHECK-LABEL: icmp_ugt_vx_swap_nxv8i32:1807; CHECK:       # %bb.0:1808; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1809; CHECK-NEXT:    vmsltu.vx v12, v8, a0, v0.t1810; CHECK-NEXT:    vmv1r.v v0, v121811; CHECK-NEXT:    ret1812  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01813  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1814  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)1815  ret <vscale x 8 x i1> %v1816}1817 1818define <vscale x 8 x i1> @icmp_ugt_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1819; CHECK-LABEL: icmp_ugt_vi_nxv8i32:1820; CHECK:       # %bb.0:1821; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1822; CHECK-NEXT:    vmsgtu.vi v12, v8, 4, v0.t1823; CHECK-NEXT:    vmv1r.v v0, v121824; CHECK-NEXT:    ret1825  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)1826  ret <vscale x 8 x i1> %v1827}1828 1829define <vscale x 8 x i1> @icmp_ugt_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1830; CHECK-LABEL: icmp_ugt_vi_swap_nxv8i32:1831; CHECK:       # %bb.0:1832; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1833; CHECK-NEXT:    vmsleu.vi v12, v8, 3, v0.t1834; CHECK-NEXT:    vmv1r.v v0, v121835; CHECK-NEXT:    ret1836  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)1837  ret <vscale x 8 x i1> %v1838}1839 1840define <vscale x 8 x i1> @icmp_uge_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {1841; CHECK-LABEL: icmp_uge_vv_nxv8i32:1842; CHECK:       # %bb.0:1843; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1844; CHECK-NEXT:    vmsleu.vv v16, v12, v8, v0.t1845; CHECK-NEXT:    vmv1r.v v0, v161846; CHECK-NEXT:    ret1847  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)1848  ret <vscale x 8 x i1> %v1849}1850 1851define <vscale x 8 x i1> @icmp_uge_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1852; CHECK-LABEL: icmp_uge_vx_nxv8i32:1853; CHECK:       # %bb.0:1854; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1855; CHECK-NEXT:    vmv.v.x v16, a01856; CHECK-NEXT:    vmsleu.vv v12, v16, v8, v0.t1857; CHECK-NEXT:    vmv1r.v v0, v121858; CHECK-NEXT:    ret1859  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01860  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1861  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)1862  ret <vscale x 8 x i1> %v1863}1864 1865define <vscale x 8 x i1> @icmp_uge_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1866; CHECK-LABEL: icmp_uge_vx_swap_nxv8i32:1867; CHECK:       # %bb.0:1868; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1869; CHECK-NEXT:    vmsleu.vx v12, v8, a0, v0.t1870; CHECK-NEXT:    vmv1r.v v0, v121871; CHECK-NEXT:    ret1872  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01873  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1874  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)1875  ret <vscale x 8 x i1> %v1876}1877 1878define <vscale x 8 x i1> @icmp_uge_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1879; CHECK-LABEL: icmp_uge_vi_nxv8i32:1880; CHECK:       # %bb.0:1881; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1882; CHECK-NEXT:    vmsgtu.vi v12, v8, 3, v0.t1883; CHECK-NEXT:    vmv1r.v v0, v121884; CHECK-NEXT:    ret1885  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)1886  ret <vscale x 8 x i1> %v1887}1888 1889define <vscale x 8 x i1> @icmp_uge_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1890; CHECK-LABEL: icmp_uge_vi_swap_nxv8i32:1891; CHECK:       # %bb.0:1892; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1893; CHECK-NEXT:    vmsleu.vi v12, v8, 4, v0.t1894; CHECK-NEXT:    vmv1r.v v0, v121895; CHECK-NEXT:    ret1896  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)1897  ret <vscale x 8 x i1> %v1898}1899 1900define <vscale x 8 x i1> @icmp_ult_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {1901; CHECK-LABEL: icmp_ult_vv_nxv8i32:1902; CHECK:       # %bb.0:1903; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1904; CHECK-NEXT:    vmsltu.vv v16, v8, v12, v0.t1905; CHECK-NEXT:    vmv1r.v v0, v161906; CHECK-NEXT:    ret1907  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)1908  ret <vscale x 8 x i1> %v1909}1910 1911define <vscale x 8 x i1> @icmp_ult_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1912; CHECK-LABEL: icmp_ult_vx_nxv8i32:1913; CHECK:       # %bb.0:1914; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1915; CHECK-NEXT:    vmsltu.vx v12, v8, a0, v0.t1916; CHECK-NEXT:    vmv1r.v v0, v121917; CHECK-NEXT:    ret1918  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01919  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1920  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)1921  ret <vscale x 8 x i1> %v1922}1923 1924define <vscale x 8 x i1> @icmp_ult_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1925; CHECK-LABEL: icmp_ult_vx_swap_nxv8i32:1926; CHECK:       # %bb.0:1927; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1928; CHECK-NEXT:    vmsgtu.vx v12, v8, a0, v0.t1929; CHECK-NEXT:    vmv1r.v v0, v121930; CHECK-NEXT:    ret1931  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01932  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1933  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)1934  ret <vscale x 8 x i1> %v1935}1936 1937define <vscale x 8 x i1> @icmp_ult_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1938; CHECK-LABEL: icmp_ult_vi_nxv8i32:1939; CHECK:       # %bb.0:1940; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1941; CHECK-NEXT:    vmsleu.vi v12, v8, 3, v0.t1942; CHECK-NEXT:    vmv1r.v v0, v121943; CHECK-NEXT:    ret1944  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)1945  ret <vscale x 8 x i1> %v1946}1947 1948define <vscale x 8 x i1> @icmp_ult_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1949; CHECK-LABEL: icmp_ult_vi_swap_nxv8i32:1950; CHECK:       # %bb.0:1951; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1952; CHECK-NEXT:    vmsgtu.vi v12, v8, 4, v0.t1953; CHECK-NEXT:    vmv1r.v v0, v121954; CHECK-NEXT:    ret1955  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)1956  ret <vscale x 8 x i1> %v1957}1958 1959define <vscale x 8 x i1> @icmp_sgt_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {1960; CHECK-LABEL: icmp_sgt_vv_nxv8i32:1961; CHECK:       # %bb.0:1962; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma1963; CHECK-NEXT:    vmslt.vv v16, v12, v8, v0.t1964; CHECK-NEXT:    vmv1r.v v0, v161965; CHECK-NEXT:    ret1966  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)1967  ret <vscale x 8 x i1> %v1968}1969 1970define <vscale x 8 x i1> @icmp_sgt_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1971; CHECK-LABEL: icmp_sgt_vx_nxv8i32:1972; CHECK:       # %bb.0:1973; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1974; CHECK-NEXT:    vmsgt.vx v12, v8, a0, v0.t1975; CHECK-NEXT:    vmv1r.v v0, v121976; CHECK-NEXT:    ret1977  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01978  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1979  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)1980  ret <vscale x 8 x i1> %v1981}1982 1983define <vscale x 8 x i1> @icmp_sgt_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1984; CHECK-LABEL: icmp_sgt_vx_swap_nxv8i32:1985; CHECK:       # %bb.0:1986; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma1987; CHECK-NEXT:    vmslt.vx v12, v8, a0, v0.t1988; CHECK-NEXT:    vmv1r.v v0, v121989; CHECK-NEXT:    ret1990  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01991  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1992  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)1993  ret <vscale x 8 x i1> %v1994}1995 1996define <vscale x 8 x i1> @icmp_sgt_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1997; CHECK-LABEL: icmp_sgt_vi_nxv8i32:1998; CHECK:       # %bb.0:1999; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma2000; CHECK-NEXT:    vmsgt.vi v12, v8, 4, v0.t2001; CHECK-NEXT:    vmv1r.v v0, v122002; CHECK-NEXT:    ret2003  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)2004  ret <vscale x 8 x i1> %v2005}2006 2007define <vscale x 8 x i1> @icmp_sgt_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {2008; CHECK-LABEL: icmp_sgt_vi_swap_nxv8i32:2009; CHECK:       # %bb.0:2010; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma2011; CHECK-NEXT:    vmsle.vi v12, v8, 3, v0.t2012; CHECK-NEXT:    vmv1r.v v0, v122013; CHECK-NEXT:    ret2014  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)2015  ret <vscale x 8 x i1> %v2016}2017 2018define <vscale x 8 x i1> @icmp_sge_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {2019; CHECK-LABEL: icmp_sge_vv_nxv8i32:2020; CHECK:       # %bb.0:2021; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma2022; CHECK-NEXT:    vmsle.vv v16, v12, v8, v0.t2023; CHECK-NEXT:    vmv1r.v v0, v162024; CHECK-NEXT:    ret2025  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)2026  ret <vscale x 8 x i1> %v2027}2028 2029define <vscale x 8 x i1> @icmp_sge_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {2030; CHECK-LABEL: icmp_sge_vx_nxv8i32:2031; CHECK:       # %bb.0:2032; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2033; CHECK-NEXT:    vmv.v.x v16, a02034; CHECK-NEXT:    vmsle.vv v12, v16, v8, v0.t2035; CHECK-NEXT:    vmv1r.v v0, v122036; CHECK-NEXT:    ret2037  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 02038  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer2039  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)2040  ret <vscale x 8 x i1> %v2041}2042 2043define <vscale x 8 x i1> @icmp_sge_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {2044; CHECK-LABEL: icmp_sge_vx_swap_nxv8i32:2045; CHECK:       # %bb.0:2046; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2047; CHECK-NEXT:    vmsle.vx v12, v8, a0, v0.t2048; CHECK-NEXT:    vmv1r.v v0, v122049; CHECK-NEXT:    ret2050  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 02051  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer2052  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)2053  ret <vscale x 8 x i1> %v2054}2055 2056define <vscale x 8 x i1> @icmp_sge_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {2057; CHECK-LABEL: icmp_sge_vi_nxv8i32:2058; CHECK:       # %bb.0:2059; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma2060; CHECK-NEXT:    vmsgt.vi v12, v8, 3, v0.t2061; CHECK-NEXT:    vmv1r.v v0, v122062; CHECK-NEXT:    ret2063  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)2064  ret <vscale x 8 x i1> %v2065}2066 2067define <vscale x 8 x i1> @icmp_sge_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {2068; CHECK-LABEL: icmp_sge_vi_swap_nxv8i32:2069; CHECK:       # %bb.0:2070; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma2071; CHECK-NEXT:    vmsle.vi v12, v8, 4, v0.t2072; CHECK-NEXT:    vmv1r.v v0, v122073; CHECK-NEXT:    ret2074  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)2075  ret <vscale x 8 x i1> %v2076}2077 2078define <vscale x 8 x i1> @icmp_slt_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {2079; CHECK-LABEL: icmp_slt_vv_nxv8i32:2080; CHECK:       # %bb.0:2081; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma2082; CHECK-NEXT:    vmslt.vv v16, v8, v12, v0.t2083; CHECK-NEXT:    vmv1r.v v0, v162084; CHECK-NEXT:    ret2085  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)2086  ret <vscale x 8 x i1> %v2087}2088 2089define <vscale x 8 x i1> @icmp_slt_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {2090; CHECK-LABEL: icmp_slt_vx_nxv8i32:2091; CHECK:       # %bb.0:2092; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2093; CHECK-NEXT:    vmslt.vx v12, v8, a0, v0.t2094; CHECK-NEXT:    vmv1r.v v0, v122095; CHECK-NEXT:    ret2096  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 02097  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer2098  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)2099  ret <vscale x 8 x i1> %v2100}2101 2102define <vscale x 8 x i1> @icmp_slt_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {2103; CHECK-LABEL: icmp_slt_vx_swap_nxv8i32:2104; CHECK:       # %bb.0:2105; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2106; CHECK-NEXT:    vmsgt.vx v12, v8, a0, v0.t2107; CHECK-NEXT:    vmv1r.v v0, v122108; CHECK-NEXT:    ret2109  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 02110  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer2111  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)2112  ret <vscale x 8 x i1> %v2113}2114 2115define <vscale x 8 x i1> @icmp_slt_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {2116; CHECK-LABEL: icmp_slt_vi_nxv8i32:2117; CHECK:       # %bb.0:2118; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma2119; CHECK-NEXT:    vmsle.vi v12, v8, 3, v0.t2120; CHECK-NEXT:    vmv1r.v v0, v122121; CHECK-NEXT:    ret2122  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)2123  ret <vscale x 8 x i1> %v2124}2125 2126define <vscale x 8 x i1> @icmp_slt_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {2127; CHECK-LABEL: icmp_slt_vi_swap_nxv8i32:2128; CHECK:       # %bb.0:2129; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma2130; CHECK-NEXT:    vmsgt.vi v12, v8, 4, v0.t2131; CHECK-NEXT:    vmv1r.v v0, v122132; CHECK-NEXT:    ret2133  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)2134  ret <vscale x 8 x i1> %v2135}2136 2137define <vscale x 8 x i1> @icmp_sle_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {2138; CHECK-LABEL: icmp_sle_vv_nxv8i32:2139; CHECK:       # %bb.0:2140; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma2141; CHECK-NEXT:    vmsle.vv v16, v8, v12, v0.t2142; CHECK-NEXT:    vmv1r.v v0, v162143; CHECK-NEXT:    ret2144  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)2145  ret <vscale x 8 x i1> %v2146}2147 2148define <vscale x 8 x i1> @icmp_sle_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {2149; CHECK-LABEL: icmp_sle_vx_nxv8i32:2150; CHECK:       # %bb.0:2151; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2152; CHECK-NEXT:    vmsle.vx v12, v8, a0, v0.t2153; CHECK-NEXT:    vmv1r.v v0, v122154; CHECK-NEXT:    ret2155  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 02156  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer2157  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)2158  ret <vscale x 8 x i1> %v2159}2160 2161define <vscale x 8 x i1> @icmp_sle_vx_swap_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {2162; CHECK-LABEL: icmp_sle_vx_swap_nxv8i32:2163; CHECK:       # %bb.0:2164; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma2165; CHECK-NEXT:    vmv.v.x v16, a02166; CHECK-NEXT:    vmsle.vv v12, v16, v8, v0.t2167; CHECK-NEXT:    vmv1r.v v0, v122168; CHECK-NEXT:    ret2169  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 02170  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer2171  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i32> %va, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)2172  ret <vscale x 8 x i1> %v2173}2174 2175define <vscale x 8 x i1> @icmp_sle_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {2176; CHECK-LABEL: icmp_sle_vi_nxv8i32:2177; CHECK:       # %bb.0:2178; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma2179; CHECK-NEXT:    vmsle.vi v12, v8, 4, v0.t2180; CHECK-NEXT:    vmv1r.v v0, v122181; CHECK-NEXT:    ret2182  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)2183  ret <vscale x 8 x i1> %v2184}2185 2186define <vscale x 8 x i1> @icmp_sle_vi_swap_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {2187; CHECK-LABEL: icmp_sle_vi_swap_nxv8i32:2188; CHECK:       # %bb.0:2189; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma2190; CHECK-NEXT:    vmsgt.vi v12, v8, 3, v0.t2191; CHECK-NEXT:    vmv1r.v v0, v122192; CHECK-NEXT:    ret2193  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i32(<vscale x 8 x i32> splat (i32 4), <vscale x 8 x i32> %va, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)2194  ret <vscale x 8 x i1> %v2195}2196 2197define <vscale x 32 x i1> @icmp_eq_vv_nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i32> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {2198; CHECK-LABEL: icmp_eq_vv_nxv32i32:2199; CHECK:       # %bb.0:2200; CHECK-NEXT:    addi sp, sp, -162201; CHECK-NEXT:    .cfi_def_cfa_offset 162202; CHECK-NEXT:    csrr a1, vlenb2203; CHECK-NEXT:    slli a1, a1, 32204; CHECK-NEXT:    sub sp, sp, a12205; CHECK-NEXT:    .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb2206; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, ma2207; CHECK-NEXT:    vmv1r.v v7, v02208; CHECK-NEXT:    addi a1, sp, 162209; CHECK-NEXT:    vs8r.v v8, (a1) # vscale x 64-byte Folded Spill2210; CHECK-NEXT:    csrr a3, vlenb2211; CHECK-NEXT:    srli a1, a3, 22212; CHECK-NEXT:    slli a4, a3, 32213; CHECK-NEXT:    slli a3, a3, 12214; CHECK-NEXT:    add a4, a0, a42215; CHECK-NEXT:    sub a5, a2, a32216; CHECK-NEXT:    vl8re32.v v24, (a4)2217; CHECK-NEXT:    sltu a4, a2, a52218; CHECK-NEXT:    addi a4, a4, -12219; CHECK-NEXT:    vl8re32.v v8, (a0)2220; CHECK-NEXT:    vslidedown.vx v0, v0, a12221; CHECK-NEXT:    and a4, a4, a52222; CHECK-NEXT:    vsetvli zero, a4, e32, m8, ta, ma2223; CHECK-NEXT:    vmseq.vv v6, v16, v24, v0.t2224; CHECK-NEXT:    bltu a2, a3, .LBB189_22225; CHECK-NEXT:  # %bb.1:2226; CHECK-NEXT:    mv a2, a32227; CHECK-NEXT:  .LBB189_2:2228; CHECK-NEXT:    vmv1r.v v0, v72229; CHECK-NEXT:    addi a0, sp, 162230; CHECK-NEXT:    vl8r.v v24, (a0) # vscale x 64-byte Folded Reload2231; CHECK-NEXT:    vsetvli zero, a2, e32, m8, ta, ma2232; CHECK-NEXT:    vmseq.vv v16, v24, v8, v0.t2233; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma2234; CHECK-NEXT:    vslideup.vx v16, v6, a12235; CHECK-NEXT:    vmv1r.v v0, v162236; CHECK-NEXT:    csrr a0, vlenb2237; CHECK-NEXT:    slli a0, a0, 32238; CHECK-NEXT:    add sp, sp, a02239; CHECK-NEXT:    .cfi_def_cfa sp, 162240; CHECK-NEXT:    addi sp, sp, 162241; CHECK-NEXT:    .cfi_def_cfa_offset 02242; CHECK-NEXT:    ret2243  %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i32> %vb, metadata !"eq", <vscale x 32 x i1> %m, i32 %evl)2244  ret <vscale x 32 x i1> %v2245}2246 2247define <vscale x 32 x i1> @icmp_eq_vx_nxv32i32(<vscale x 32 x i32> %va, i32 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {2248; CHECK-LABEL: icmp_eq_vx_nxv32i32:2249; CHECK:       # %bb.0:2250; CHECK-NEXT:    vsetvli a2, zero, e8, mf2, ta, ma2251; CHECK-NEXT:    vmv1r.v v24, v02252; CHECK-NEXT:    csrr a3, vlenb2253; CHECK-NEXT:    srli a2, a3, 22254; CHECK-NEXT:    slli a3, a3, 12255; CHECK-NEXT:    vslidedown.vx v0, v0, a22256; CHECK-NEXT:    sub a4, a1, a32257; CHECK-NEXT:    sltu a5, a1, a42258; CHECK-NEXT:    addi a5, a5, -12259; CHECK-NEXT:    and a4, a5, a42260; CHECK-NEXT:    vsetvli zero, a4, e32, m8, ta, ma2261; CHECK-NEXT:    vmseq.vx v25, v16, a0, v0.t2262; CHECK-NEXT:    bltu a1, a3, .LBB190_22263; CHECK-NEXT:  # %bb.1:2264; CHECK-NEXT:    mv a1, a32265; CHECK-NEXT:  .LBB190_2:2266; CHECK-NEXT:    vmv1r.v v0, v242267; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma2268; CHECK-NEXT:    vmseq.vx v16, v8, a0, v0.t2269; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma2270; CHECK-NEXT:    vslideup.vx v16, v25, a22271; CHECK-NEXT:    vmv1r.v v0, v162272; CHECK-NEXT:    ret2273  %elt.head = insertelement <vscale x 32 x i32> poison, i32 %b, i32 02274  %vb = shufflevector <vscale x 32 x i32> %elt.head, <vscale x 32 x i32> poison, <vscale x 32 x i32> zeroinitializer2275  %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i32(<vscale x 32 x i32> %va, <vscale x 32 x i32> %vb, metadata !"eq", <vscale x 32 x i1> %m, i32 %evl)2276  ret <vscale x 32 x i1> %v2277}2278 2279define <vscale x 32 x i1> @icmp_eq_vx_swap_nxv32i32(<vscale x 32 x i32> %va, i32 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {2280; CHECK-LABEL: icmp_eq_vx_swap_nxv32i32:2281; CHECK:       # %bb.0:2282; CHECK-NEXT:    vsetvli a2, zero, e8, mf2, ta, ma2283; CHECK-NEXT:    vmv1r.v v24, v02284; CHECK-NEXT:    csrr a3, vlenb2285; CHECK-NEXT:    srli a2, a3, 22286; CHECK-NEXT:    slli a3, a3, 12287; CHECK-NEXT:    vslidedown.vx v0, v0, a22288; CHECK-NEXT:    sub a4, a1, a32289; CHECK-NEXT:    sltu a5, a1, a42290; CHECK-NEXT:    addi a5, a5, -12291; CHECK-NEXT:    and a4, a5, a42292; CHECK-NEXT:    vsetvli zero, a4, e32, m8, ta, ma2293; CHECK-NEXT:    vmseq.vx v25, v16, a0, v0.t2294; CHECK-NEXT:    bltu a1, a3, .LBB191_22295; CHECK-NEXT:  # %bb.1:2296; CHECK-NEXT:    mv a1, a32297; CHECK-NEXT:  .LBB191_2:2298; CHECK-NEXT:    vmv1r.v v0, v242299; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, ma2300; CHECK-NEXT:    vmseq.vx v16, v8, a0, v0.t2301; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma2302; CHECK-NEXT:    vslideup.vx v16, v25, a22303; CHECK-NEXT:    vmv1r.v v0, v162304; CHECK-NEXT:    ret2305  %elt.head = insertelement <vscale x 32 x i32> poison, i32 %b, i32 02306  %vb = shufflevector <vscale x 32 x i32> %elt.head, <vscale x 32 x i32> poison, <vscale x 32 x i32> zeroinitializer2307  %v = call <vscale x 32 x i1> @llvm.vp.icmp.nxv32i32(<vscale x 32 x i32> %vb, <vscale x 32 x i32> %va, metadata !"eq", <vscale x 32 x i1> %m, i32 %evl)2308  ret <vscale x 32 x i1> %v2309}2310 2311define <vscale x 1 x i1> @icmp_eq_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {2312; CHECK-LABEL: icmp_eq_vv_nxv1i64:2313; CHECK:       # %bb.0:2314; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2315; CHECK-NEXT:    vmseq.vv v0, v8, v9, v0.t2316; CHECK-NEXT:    ret2317  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)2318  ret <vscale x 1 x i1> %v2319}2320 2321define <vscale x 1 x i1> @icmp_eq_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2322; RV32-LABEL: icmp_eq_vx_nxv1i64:2323; RV32:       # %bb.0:2324; RV32-NEXT:    addi sp, sp, -162325; RV32-NEXT:    .cfi_def_cfa_offset 162326; RV32-NEXT:    sw a0, 8(sp)2327; RV32-NEXT:    sw a1, 12(sp)2328; RV32-NEXT:    addi a0, sp, 82329; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2330; RV32-NEXT:    vlse64.v v9, (a0), zero2331; RV32-NEXT:    vmseq.vv v0, v8, v9, v0.t2332; RV32-NEXT:    addi sp, sp, 162333; RV32-NEXT:    .cfi_def_cfa_offset 02334; RV32-NEXT:    ret2335;2336; RV64-LABEL: icmp_eq_vx_nxv1i64:2337; RV64:       # %bb.0:2338; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2339; RV64-NEXT:    vmseq.vx v0, v8, a0, v0.t2340; RV64-NEXT:    ret2341  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02342  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2343  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)2344  ret <vscale x 1 x i1> %v2345}2346 2347define <vscale x 1 x i1> @icmp_eq_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2348; RV32-LABEL: icmp_eq_vx_swap_nxv1i64:2349; RV32:       # %bb.0:2350; RV32-NEXT:    addi sp, sp, -162351; RV32-NEXT:    .cfi_def_cfa_offset 162352; RV32-NEXT:    sw a0, 8(sp)2353; RV32-NEXT:    sw a1, 12(sp)2354; RV32-NEXT:    addi a0, sp, 82355; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2356; RV32-NEXT:    vlse64.v v9, (a0), zero2357; RV32-NEXT:    vmseq.vv v0, v9, v8, v0.t2358; RV32-NEXT:    addi sp, sp, 162359; RV32-NEXT:    .cfi_def_cfa_offset 02360; RV32-NEXT:    ret2361;2362; RV64-LABEL: icmp_eq_vx_swap_nxv1i64:2363; RV64:       # %bb.0:2364; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2365; RV64-NEXT:    vmseq.vx v0, v8, a0, v0.t2366; RV64-NEXT:    ret2367  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02368  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2369  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)2370  ret <vscale x 1 x i1> %v2371}2372 2373define <vscale x 1 x i1> @icmp_eq_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2374; CHECK-LABEL: icmp_eq_vi_nxv1i64:2375; CHECK:       # %bb.0:2376; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2377; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t2378; CHECK-NEXT:    ret2379  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)2380  ret <vscale x 1 x i1> %v2381}2382 2383define <vscale x 1 x i1> @icmp_eq_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2384; CHECK-LABEL: icmp_eq_vi_swap_nxv1i64:2385; CHECK:       # %bb.0:2386; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2387; CHECK-NEXT:    vmseq.vi v0, v8, 4, v0.t2388; CHECK-NEXT:    ret2389  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"eq", <vscale x 1 x i1> %m, i32 %evl)2390  ret <vscale x 1 x i1> %v2391}2392 2393define <vscale x 1 x i1> @icmp_ne_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {2394; CHECK-LABEL: icmp_ne_vv_nxv1i64:2395; CHECK:       # %bb.0:2396; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2397; CHECK-NEXT:    vmsne.vv v0, v8, v9, v0.t2398; CHECK-NEXT:    ret2399  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)2400  ret <vscale x 1 x i1> %v2401}2402 2403define <vscale x 1 x i1> @icmp_ne_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2404; RV32-LABEL: icmp_ne_vx_nxv1i64:2405; RV32:       # %bb.0:2406; RV32-NEXT:    addi sp, sp, -162407; RV32-NEXT:    .cfi_def_cfa_offset 162408; RV32-NEXT:    sw a0, 8(sp)2409; RV32-NEXT:    sw a1, 12(sp)2410; RV32-NEXT:    addi a0, sp, 82411; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2412; RV32-NEXT:    vlse64.v v9, (a0), zero2413; RV32-NEXT:    vmsne.vv v0, v8, v9, v0.t2414; RV32-NEXT:    addi sp, sp, 162415; RV32-NEXT:    .cfi_def_cfa_offset 02416; RV32-NEXT:    ret2417;2418; RV64-LABEL: icmp_ne_vx_nxv1i64:2419; RV64:       # %bb.0:2420; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2421; RV64-NEXT:    vmsne.vx v0, v8, a0, v0.t2422; RV64-NEXT:    ret2423  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02424  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2425  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)2426  ret <vscale x 1 x i1> %v2427}2428 2429define <vscale x 1 x i1> @icmp_ne_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2430; RV32-LABEL: icmp_ne_vx_swap_nxv1i64:2431; RV32:       # %bb.0:2432; RV32-NEXT:    addi sp, sp, -162433; RV32-NEXT:    .cfi_def_cfa_offset 162434; RV32-NEXT:    sw a0, 8(sp)2435; RV32-NEXT:    sw a1, 12(sp)2436; RV32-NEXT:    addi a0, sp, 82437; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2438; RV32-NEXT:    vlse64.v v9, (a0), zero2439; RV32-NEXT:    vmsne.vv v0, v9, v8, v0.t2440; RV32-NEXT:    addi sp, sp, 162441; RV32-NEXT:    .cfi_def_cfa_offset 02442; RV32-NEXT:    ret2443;2444; RV64-LABEL: icmp_ne_vx_swap_nxv1i64:2445; RV64:       # %bb.0:2446; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2447; RV64-NEXT:    vmsne.vx v0, v8, a0, v0.t2448; RV64-NEXT:    ret2449  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02450  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2451  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)2452  ret <vscale x 1 x i1> %v2453}2454 2455define <vscale x 1 x i1> @icmp_ne_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2456; CHECK-LABEL: icmp_ne_vi_nxv1i64:2457; CHECK:       # %bb.0:2458; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2459; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t2460; CHECK-NEXT:    ret2461  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)2462  ret <vscale x 1 x i1> %v2463}2464 2465define <vscale x 1 x i1> @icmp_ne_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2466; CHECK-LABEL: icmp_ne_vi_swap_nxv1i64:2467; CHECK:       # %bb.0:2468; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2469; CHECK-NEXT:    vmsne.vi v0, v8, 4, v0.t2470; CHECK-NEXT:    ret2471  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"ne", <vscale x 1 x i1> %m, i32 %evl)2472  ret <vscale x 1 x i1> %v2473}2474 2475define <vscale x 1 x i1> @icmp_ugt_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {2476; CHECK-LABEL: icmp_ugt_vv_nxv1i64:2477; CHECK:       # %bb.0:2478; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2479; CHECK-NEXT:    vmsltu.vv v0, v9, v8, v0.t2480; CHECK-NEXT:    ret2481  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)2482  ret <vscale x 1 x i1> %v2483}2484 2485define <vscale x 1 x i1> @icmp_ugt_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2486; RV32-LABEL: icmp_ugt_vx_nxv1i64:2487; RV32:       # %bb.0:2488; RV32-NEXT:    addi sp, sp, -162489; RV32-NEXT:    .cfi_def_cfa_offset 162490; RV32-NEXT:    sw a0, 8(sp)2491; RV32-NEXT:    sw a1, 12(sp)2492; RV32-NEXT:    addi a0, sp, 82493; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2494; RV32-NEXT:    vlse64.v v9, (a0), zero2495; RV32-NEXT:    vmsltu.vv v0, v9, v8, v0.t2496; RV32-NEXT:    addi sp, sp, 162497; RV32-NEXT:    .cfi_def_cfa_offset 02498; RV32-NEXT:    ret2499;2500; RV64-LABEL: icmp_ugt_vx_nxv1i64:2501; RV64:       # %bb.0:2502; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2503; RV64-NEXT:    vmsgtu.vx v0, v8, a0, v0.t2504; RV64-NEXT:    ret2505  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02506  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2507  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)2508  ret <vscale x 1 x i1> %v2509}2510 2511define <vscale x 1 x i1> @icmp_ugt_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2512; RV32-LABEL: icmp_ugt_vx_swap_nxv1i64:2513; RV32:       # %bb.0:2514; RV32-NEXT:    addi sp, sp, -162515; RV32-NEXT:    .cfi_def_cfa_offset 162516; RV32-NEXT:    sw a0, 8(sp)2517; RV32-NEXT:    sw a1, 12(sp)2518; RV32-NEXT:    addi a0, sp, 82519; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2520; RV32-NEXT:    vlse64.v v9, (a0), zero2521; RV32-NEXT:    vmsltu.vv v0, v8, v9, v0.t2522; RV32-NEXT:    addi sp, sp, 162523; RV32-NEXT:    .cfi_def_cfa_offset 02524; RV32-NEXT:    ret2525;2526; RV64-LABEL: icmp_ugt_vx_swap_nxv1i64:2527; RV64:       # %bb.0:2528; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2529; RV64-NEXT:    vmsltu.vx v0, v8, a0, v0.t2530; RV64-NEXT:    ret2531  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02532  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2533  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)2534  ret <vscale x 1 x i1> %v2535}2536 2537define <vscale x 1 x i1> @icmp_ugt_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2538; CHECK-LABEL: icmp_ugt_vi_nxv1i64:2539; CHECK:       # %bb.0:2540; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2541; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t2542; CHECK-NEXT:    ret2543  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)2544  ret <vscale x 1 x i1> %v2545}2546 2547define <vscale x 1 x i1> @icmp_ugt_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2548; CHECK-LABEL: icmp_ugt_vi_swap_nxv1i64:2549; CHECK:       # %bb.0:2550; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2551; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t2552; CHECK-NEXT:    ret2553  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"ugt", <vscale x 1 x i1> %m, i32 %evl)2554  ret <vscale x 1 x i1> %v2555}2556 2557define <vscale x 1 x i1> @icmp_uge_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {2558; CHECK-LABEL: icmp_uge_vv_nxv1i64:2559; CHECK:       # %bb.0:2560; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2561; CHECK-NEXT:    vmsleu.vv v0, v9, v8, v0.t2562; CHECK-NEXT:    ret2563  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)2564  ret <vscale x 1 x i1> %v2565}2566 2567define <vscale x 1 x i1> @icmp_uge_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2568; RV32-LABEL: icmp_uge_vx_nxv1i64:2569; RV32:       # %bb.0:2570; RV32-NEXT:    addi sp, sp, -162571; RV32-NEXT:    .cfi_def_cfa_offset 162572; RV32-NEXT:    sw a0, 8(sp)2573; RV32-NEXT:    sw a1, 12(sp)2574; RV32-NEXT:    addi a0, sp, 82575; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2576; RV32-NEXT:    vlse64.v v9, (a0), zero2577; RV32-NEXT:    vmsleu.vv v0, v9, v8, v0.t2578; RV32-NEXT:    addi sp, sp, 162579; RV32-NEXT:    .cfi_def_cfa_offset 02580; RV32-NEXT:    ret2581;2582; RV64-LABEL: icmp_uge_vx_nxv1i64:2583; RV64:       # %bb.0:2584; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2585; RV64-NEXT:    vmv.v.x v9, a02586; RV64-NEXT:    vmsleu.vv v0, v9, v8, v0.t2587; RV64-NEXT:    ret2588  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02589  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2590  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)2591  ret <vscale x 1 x i1> %v2592}2593 2594define <vscale x 1 x i1> @icmp_uge_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2595; RV32-LABEL: icmp_uge_vx_swap_nxv1i64:2596; RV32:       # %bb.0:2597; RV32-NEXT:    addi sp, sp, -162598; RV32-NEXT:    .cfi_def_cfa_offset 162599; RV32-NEXT:    sw a0, 8(sp)2600; RV32-NEXT:    sw a1, 12(sp)2601; RV32-NEXT:    addi a0, sp, 82602; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2603; RV32-NEXT:    vlse64.v v9, (a0), zero2604; RV32-NEXT:    vmsleu.vv v0, v8, v9, v0.t2605; RV32-NEXT:    addi sp, sp, 162606; RV32-NEXT:    .cfi_def_cfa_offset 02607; RV32-NEXT:    ret2608;2609; RV64-LABEL: icmp_uge_vx_swap_nxv1i64:2610; RV64:       # %bb.0:2611; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2612; RV64-NEXT:    vmsleu.vx v0, v8, a0, v0.t2613; RV64-NEXT:    ret2614  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02615  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2616  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)2617  ret <vscale x 1 x i1> %v2618}2619 2620define <vscale x 1 x i1> @icmp_uge_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2621; CHECK-LABEL: icmp_uge_vi_nxv1i64:2622; CHECK:       # %bb.0:2623; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2624; CHECK-NEXT:    vmsgtu.vi v0, v8, 3, v0.t2625; CHECK-NEXT:    ret2626  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)2627  ret <vscale x 1 x i1> %v2628}2629 2630define <vscale x 1 x i1> @icmp_uge_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2631; CHECK-LABEL: icmp_uge_vi_swap_nxv1i64:2632; CHECK:       # %bb.0:2633; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2634; CHECK-NEXT:    vmsleu.vi v0, v8, 4, v0.t2635; CHECK-NEXT:    ret2636  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"uge", <vscale x 1 x i1> %m, i32 %evl)2637  ret <vscale x 1 x i1> %v2638}2639 2640define <vscale x 1 x i1> @icmp_ult_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {2641; CHECK-LABEL: icmp_ult_vv_nxv1i64:2642; CHECK:       # %bb.0:2643; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2644; CHECK-NEXT:    vmsltu.vv v0, v8, v9, v0.t2645; CHECK-NEXT:    ret2646  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)2647  ret <vscale x 1 x i1> %v2648}2649 2650define <vscale x 1 x i1> @icmp_ult_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2651; RV32-LABEL: icmp_ult_vx_nxv1i64:2652; RV32:       # %bb.0:2653; RV32-NEXT:    addi sp, sp, -162654; RV32-NEXT:    .cfi_def_cfa_offset 162655; RV32-NEXT:    sw a0, 8(sp)2656; RV32-NEXT:    sw a1, 12(sp)2657; RV32-NEXT:    addi a0, sp, 82658; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2659; RV32-NEXT:    vlse64.v v9, (a0), zero2660; RV32-NEXT:    vmsltu.vv v0, v8, v9, v0.t2661; RV32-NEXT:    addi sp, sp, 162662; RV32-NEXT:    .cfi_def_cfa_offset 02663; RV32-NEXT:    ret2664;2665; RV64-LABEL: icmp_ult_vx_nxv1i64:2666; RV64:       # %bb.0:2667; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2668; RV64-NEXT:    vmsltu.vx v0, v8, a0, v0.t2669; RV64-NEXT:    ret2670  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02671  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2672  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)2673  ret <vscale x 1 x i1> %v2674}2675 2676define <vscale x 1 x i1> @icmp_ult_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2677; RV32-LABEL: icmp_ult_vx_swap_nxv1i64:2678; RV32:       # %bb.0:2679; RV32-NEXT:    addi sp, sp, -162680; RV32-NEXT:    .cfi_def_cfa_offset 162681; RV32-NEXT:    sw a0, 8(sp)2682; RV32-NEXT:    sw a1, 12(sp)2683; RV32-NEXT:    addi a0, sp, 82684; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2685; RV32-NEXT:    vlse64.v v9, (a0), zero2686; RV32-NEXT:    vmsltu.vv v0, v9, v8, v0.t2687; RV32-NEXT:    addi sp, sp, 162688; RV32-NEXT:    .cfi_def_cfa_offset 02689; RV32-NEXT:    ret2690;2691; RV64-LABEL: icmp_ult_vx_swap_nxv1i64:2692; RV64:       # %bb.0:2693; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2694; RV64-NEXT:    vmsgtu.vx v0, v8, a0, v0.t2695; RV64-NEXT:    ret2696  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02697  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2698  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)2699  ret <vscale x 1 x i1> %v2700}2701 2702define <vscale x 1 x i1> @icmp_ult_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2703; CHECK-LABEL: icmp_ult_vi_nxv1i64:2704; CHECK:       # %bb.0:2705; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2706; CHECK-NEXT:    vmsleu.vi v0, v8, 3, v0.t2707; CHECK-NEXT:    ret2708  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)2709  ret <vscale x 1 x i1> %v2710}2711 2712define <vscale x 1 x i1> @icmp_ult_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2713; CHECK-LABEL: icmp_ult_vi_swap_nxv1i64:2714; CHECK:       # %bb.0:2715; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2716; CHECK-NEXT:    vmsgtu.vi v0, v8, 4, v0.t2717; CHECK-NEXT:    ret2718  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"ult", <vscale x 1 x i1> %m, i32 %evl)2719  ret <vscale x 1 x i1> %v2720}2721 2722define <vscale x 1 x i1> @icmp_sgt_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {2723; CHECK-LABEL: icmp_sgt_vv_nxv1i64:2724; CHECK:       # %bb.0:2725; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2726; CHECK-NEXT:    vmslt.vv v0, v9, v8, v0.t2727; CHECK-NEXT:    ret2728  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)2729  ret <vscale x 1 x i1> %v2730}2731 2732define <vscale x 1 x i1> @icmp_sgt_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2733; RV32-LABEL: icmp_sgt_vx_nxv1i64:2734; RV32:       # %bb.0:2735; RV32-NEXT:    addi sp, sp, -162736; RV32-NEXT:    .cfi_def_cfa_offset 162737; RV32-NEXT:    sw a0, 8(sp)2738; RV32-NEXT:    sw a1, 12(sp)2739; RV32-NEXT:    addi a0, sp, 82740; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2741; RV32-NEXT:    vlse64.v v9, (a0), zero2742; RV32-NEXT:    vmslt.vv v0, v9, v8, v0.t2743; RV32-NEXT:    addi sp, sp, 162744; RV32-NEXT:    .cfi_def_cfa_offset 02745; RV32-NEXT:    ret2746;2747; RV64-LABEL: icmp_sgt_vx_nxv1i64:2748; RV64:       # %bb.0:2749; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2750; RV64-NEXT:    vmsgt.vx v0, v8, a0, v0.t2751; RV64-NEXT:    ret2752  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02753  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2754  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)2755  ret <vscale x 1 x i1> %v2756}2757 2758define <vscale x 1 x i1> @icmp_sgt_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2759; RV32-LABEL: icmp_sgt_vx_swap_nxv1i64:2760; RV32:       # %bb.0:2761; RV32-NEXT:    addi sp, sp, -162762; RV32-NEXT:    .cfi_def_cfa_offset 162763; RV32-NEXT:    sw a0, 8(sp)2764; RV32-NEXT:    sw a1, 12(sp)2765; RV32-NEXT:    addi a0, sp, 82766; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2767; RV32-NEXT:    vlse64.v v9, (a0), zero2768; RV32-NEXT:    vmslt.vv v0, v8, v9, v0.t2769; RV32-NEXT:    addi sp, sp, 162770; RV32-NEXT:    .cfi_def_cfa_offset 02771; RV32-NEXT:    ret2772;2773; RV64-LABEL: icmp_sgt_vx_swap_nxv1i64:2774; RV64:       # %bb.0:2775; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2776; RV64-NEXT:    vmslt.vx v0, v8, a0, v0.t2777; RV64-NEXT:    ret2778  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02779  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2780  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)2781  ret <vscale x 1 x i1> %v2782}2783 2784define <vscale x 1 x i1> @icmp_sgt_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2785; CHECK-LABEL: icmp_sgt_vi_nxv1i64:2786; CHECK:       # %bb.0:2787; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2788; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t2789; CHECK-NEXT:    ret2790  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)2791  ret <vscale x 1 x i1> %v2792}2793 2794define <vscale x 1 x i1> @icmp_sgt_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2795; CHECK-LABEL: icmp_sgt_vi_swap_nxv1i64:2796; CHECK:       # %bb.0:2797; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2798; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t2799; CHECK-NEXT:    ret2800  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"sgt", <vscale x 1 x i1> %m, i32 %evl)2801  ret <vscale x 1 x i1> %v2802}2803 2804define <vscale x 1 x i1> @icmp_sge_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {2805; CHECK-LABEL: icmp_sge_vv_nxv1i64:2806; CHECK:       # %bb.0:2807; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2808; CHECK-NEXT:    vmsle.vv v0, v9, v8, v0.t2809; CHECK-NEXT:    ret2810  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)2811  ret <vscale x 1 x i1> %v2812}2813 2814define <vscale x 1 x i1> @icmp_sge_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2815; RV32-LABEL: icmp_sge_vx_nxv1i64:2816; RV32:       # %bb.0:2817; RV32-NEXT:    addi sp, sp, -162818; RV32-NEXT:    .cfi_def_cfa_offset 162819; RV32-NEXT:    sw a0, 8(sp)2820; RV32-NEXT:    sw a1, 12(sp)2821; RV32-NEXT:    addi a0, sp, 82822; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2823; RV32-NEXT:    vlse64.v v9, (a0), zero2824; RV32-NEXT:    vmsle.vv v0, v9, v8, v0.t2825; RV32-NEXT:    addi sp, sp, 162826; RV32-NEXT:    .cfi_def_cfa_offset 02827; RV32-NEXT:    ret2828;2829; RV64-LABEL: icmp_sge_vx_nxv1i64:2830; RV64:       # %bb.0:2831; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2832; RV64-NEXT:    vmv.v.x v9, a02833; RV64-NEXT:    vmsle.vv v0, v9, v8, v0.t2834; RV64-NEXT:    ret2835  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02836  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2837  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)2838  ret <vscale x 1 x i1> %v2839}2840 2841define <vscale x 1 x i1> @icmp_sge_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2842; RV32-LABEL: icmp_sge_vx_swap_nxv1i64:2843; RV32:       # %bb.0:2844; RV32-NEXT:    addi sp, sp, -162845; RV32-NEXT:    .cfi_def_cfa_offset 162846; RV32-NEXT:    sw a0, 8(sp)2847; RV32-NEXT:    sw a1, 12(sp)2848; RV32-NEXT:    addi a0, sp, 82849; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2850; RV32-NEXT:    vlse64.v v9, (a0), zero2851; RV32-NEXT:    vmsle.vv v0, v8, v9, v0.t2852; RV32-NEXT:    addi sp, sp, 162853; RV32-NEXT:    .cfi_def_cfa_offset 02854; RV32-NEXT:    ret2855;2856; RV64-LABEL: icmp_sge_vx_swap_nxv1i64:2857; RV64:       # %bb.0:2858; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2859; RV64-NEXT:    vmsle.vx v0, v8, a0, v0.t2860; RV64-NEXT:    ret2861  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02862  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2863  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)2864  ret <vscale x 1 x i1> %v2865}2866 2867define <vscale x 1 x i1> @icmp_sge_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2868; CHECK-LABEL: icmp_sge_vi_nxv1i64:2869; CHECK:       # %bb.0:2870; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2871; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t2872; CHECK-NEXT:    ret2873  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)2874  ret <vscale x 1 x i1> %v2875}2876 2877define <vscale x 1 x i1> @icmp_sge_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2878; CHECK-LABEL: icmp_sge_vi_swap_nxv1i64:2879; CHECK:       # %bb.0:2880; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2881; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t2882; CHECK-NEXT:    ret2883  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"sge", <vscale x 1 x i1> %m, i32 %evl)2884  ret <vscale x 1 x i1> %v2885}2886 2887define <vscale x 1 x i1> @icmp_slt_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {2888; CHECK-LABEL: icmp_slt_vv_nxv1i64:2889; CHECK:       # %bb.0:2890; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2891; CHECK-NEXT:    vmslt.vv v0, v8, v9, v0.t2892; CHECK-NEXT:    ret2893  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)2894  ret <vscale x 1 x i1> %v2895}2896 2897define <vscale x 1 x i1> @icmp_slt_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2898; RV32-LABEL: icmp_slt_vx_nxv1i64:2899; RV32:       # %bb.0:2900; RV32-NEXT:    addi sp, sp, -162901; RV32-NEXT:    .cfi_def_cfa_offset 162902; RV32-NEXT:    sw a0, 8(sp)2903; RV32-NEXT:    sw a1, 12(sp)2904; RV32-NEXT:    addi a0, sp, 82905; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2906; RV32-NEXT:    vlse64.v v9, (a0), zero2907; RV32-NEXT:    vmslt.vv v0, v8, v9, v0.t2908; RV32-NEXT:    addi sp, sp, 162909; RV32-NEXT:    .cfi_def_cfa_offset 02910; RV32-NEXT:    ret2911;2912; RV64-LABEL: icmp_slt_vx_nxv1i64:2913; RV64:       # %bb.0:2914; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2915; RV64-NEXT:    vmslt.vx v0, v8, a0, v0.t2916; RV64-NEXT:    ret2917  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02918  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2919  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)2920  ret <vscale x 1 x i1> %v2921}2922 2923define <vscale x 1 x i1> @icmp_slt_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2924; RV32-LABEL: icmp_slt_vx_swap_nxv1i64:2925; RV32:       # %bb.0:2926; RV32-NEXT:    addi sp, sp, -162927; RV32-NEXT:    .cfi_def_cfa_offset 162928; RV32-NEXT:    sw a0, 8(sp)2929; RV32-NEXT:    sw a1, 12(sp)2930; RV32-NEXT:    addi a0, sp, 82931; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2932; RV32-NEXT:    vlse64.v v9, (a0), zero2933; RV32-NEXT:    vmslt.vv v0, v9, v8, v0.t2934; RV32-NEXT:    addi sp, sp, 162935; RV32-NEXT:    .cfi_def_cfa_offset 02936; RV32-NEXT:    ret2937;2938; RV64-LABEL: icmp_slt_vx_swap_nxv1i64:2939; RV64:       # %bb.0:2940; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2941; RV64-NEXT:    vmsgt.vx v0, v8, a0, v0.t2942; RV64-NEXT:    ret2943  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 02944  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer2945  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)2946  ret <vscale x 1 x i1> %v2947}2948 2949define <vscale x 1 x i1> @icmp_slt_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2950; CHECK-LABEL: icmp_slt_vi_nxv1i64:2951; CHECK:       # %bb.0:2952; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2953; CHECK-NEXT:    vmsle.vi v0, v8, 3, v0.t2954; CHECK-NEXT:    ret2955  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)2956  ret <vscale x 1 x i1> %v2957}2958 2959define <vscale x 1 x i1> @icmp_slt_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {2960; CHECK-LABEL: icmp_slt_vi_swap_nxv1i64:2961; CHECK:       # %bb.0:2962; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2963; CHECK-NEXT:    vmsgt.vi v0, v8, 4, v0.t2964; CHECK-NEXT:    ret2965  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"slt", <vscale x 1 x i1> %m, i32 %evl)2966  ret <vscale x 1 x i1> %v2967}2968 2969define <vscale x 1 x i1> @icmp_sle_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {2970; CHECK-LABEL: icmp_sle_vv_nxv1i64:2971; CHECK:       # %bb.0:2972; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma2973; CHECK-NEXT:    vmsle.vv v0, v8, v9, v0.t2974; CHECK-NEXT:    ret2975  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)2976  ret <vscale x 1 x i1> %v2977}2978 2979define <vscale x 1 x i1> @icmp_sle_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2980; RV32-LABEL: icmp_sle_vx_nxv1i64:2981; RV32:       # %bb.0:2982; RV32-NEXT:    addi sp, sp, -162983; RV32-NEXT:    .cfi_def_cfa_offset 162984; RV32-NEXT:    sw a0, 8(sp)2985; RV32-NEXT:    sw a1, 12(sp)2986; RV32-NEXT:    addi a0, sp, 82987; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma2988; RV32-NEXT:    vlse64.v v9, (a0), zero2989; RV32-NEXT:    vmsle.vv v0, v8, v9, v0.t2990; RV32-NEXT:    addi sp, sp, 162991; RV32-NEXT:    .cfi_def_cfa_offset 02992; RV32-NEXT:    ret2993;2994; RV64-LABEL: icmp_sle_vx_nxv1i64:2995; RV64:       # %bb.0:2996; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma2997; RV64-NEXT:    vmsle.vx v0, v8, a0, v0.t2998; RV64-NEXT:    ret2999  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 03000  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer3001  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)3002  ret <vscale x 1 x i1> %v3003}3004 3005define <vscale x 1 x i1> @icmp_sle_vx_swap_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {3006; RV32-LABEL: icmp_sle_vx_swap_nxv1i64:3007; RV32:       # %bb.0:3008; RV32-NEXT:    addi sp, sp, -163009; RV32-NEXT:    .cfi_def_cfa_offset 163010; RV32-NEXT:    sw a0, 8(sp)3011; RV32-NEXT:    sw a1, 12(sp)3012; RV32-NEXT:    addi a0, sp, 83013; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma3014; RV32-NEXT:    vlse64.v v9, (a0), zero3015; RV32-NEXT:    vmsle.vv v0, v9, v8, v0.t3016; RV32-NEXT:    addi sp, sp, 163017; RV32-NEXT:    .cfi_def_cfa_offset 03018; RV32-NEXT:    ret3019;3020; RV64-LABEL: icmp_sle_vx_swap_nxv1i64:3021; RV64:       # %bb.0:3022; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma3023; RV64-NEXT:    vmv.v.x v9, a03024; RV64-NEXT:    vmsle.vv v0, v9, v8, v0.t3025; RV64-NEXT:    ret3026  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 03027  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer3028  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i64> %va, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)3029  ret <vscale x 1 x i1> %v3030}3031 3032define <vscale x 1 x i1> @icmp_sle_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {3033; CHECK-LABEL: icmp_sle_vi_nxv1i64:3034; CHECK:       # %bb.0:3035; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma3036; CHECK-NEXT:    vmsle.vi v0, v8, 4, v0.t3037; CHECK-NEXT:    ret3038  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)3039  ret <vscale x 1 x i1> %v3040}3041 3042define <vscale x 1 x i1> @icmp_sle_vi_swap_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {3043; CHECK-LABEL: icmp_sle_vi_swap_nxv1i64:3044; CHECK:       # %bb.0:3045; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma3046; CHECK-NEXT:    vmsgt.vi v0, v8, 3, v0.t3047; CHECK-NEXT:    ret3048  %v = call <vscale x 1 x i1> @llvm.vp.icmp.nxv1i64(<vscale x 1 x i64> splat (i64 4), <vscale x 1 x i64> %va, metadata !"sle", <vscale x 1 x i1> %m, i32 %evl)3049  ret <vscale x 1 x i1> %v3050}3051 3052define <vscale x 8 x i1> @icmp_eq_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {3053; CHECK-LABEL: icmp_eq_vv_nxv8i64:3054; CHECK:       # %bb.0:3055; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3056; CHECK-NEXT:    vmseq.vv v24, v8, v16, v0.t3057; CHECK-NEXT:    vmv1r.v v0, v243058; CHECK-NEXT:    ret3059  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)3060  ret <vscale x 8 x i1> %v3061}3062 3063define <vscale x 8 x i1> @icmp_eq_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3064; RV32-LABEL: icmp_eq_vx_nxv8i64:3065; RV32:       # %bb.0:3066; RV32-NEXT:    addi sp, sp, -163067; RV32-NEXT:    .cfi_def_cfa_offset 163068; RV32-NEXT:    sw a0, 8(sp)3069; RV32-NEXT:    sw a1, 12(sp)3070; RV32-NEXT:    addi a0, sp, 83071; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3072; RV32-NEXT:    vlse64.v v24, (a0), zero3073; RV32-NEXT:    vmseq.vv v16, v8, v24, v0.t3074; RV32-NEXT:    vmv1r.v v0, v163075; RV32-NEXT:    addi sp, sp, 163076; RV32-NEXT:    .cfi_def_cfa_offset 03077; RV32-NEXT:    ret3078;3079; RV64-LABEL: icmp_eq_vx_nxv8i64:3080; RV64:       # %bb.0:3081; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3082; RV64-NEXT:    vmseq.vx v16, v8, a0, v0.t3083; RV64-NEXT:    vmv1r.v v0, v163084; RV64-NEXT:    ret3085  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03086  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3087  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)3088  ret <vscale x 8 x i1> %v3089}3090 3091define <vscale x 8 x i1> @icmp_eq_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3092; RV32-LABEL: icmp_eq_vx_swap_nxv8i64:3093; RV32:       # %bb.0:3094; RV32-NEXT:    addi sp, sp, -163095; RV32-NEXT:    .cfi_def_cfa_offset 163096; RV32-NEXT:    sw a0, 8(sp)3097; RV32-NEXT:    sw a1, 12(sp)3098; RV32-NEXT:    addi a0, sp, 83099; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3100; RV32-NEXT:    vlse64.v v24, (a0), zero3101; RV32-NEXT:    vmseq.vv v16, v24, v8, v0.t3102; RV32-NEXT:    vmv1r.v v0, v163103; RV32-NEXT:    addi sp, sp, 163104; RV32-NEXT:    .cfi_def_cfa_offset 03105; RV32-NEXT:    ret3106;3107; RV64-LABEL: icmp_eq_vx_swap_nxv8i64:3108; RV64:       # %bb.0:3109; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3110; RV64-NEXT:    vmseq.vx v16, v8, a0, v0.t3111; RV64-NEXT:    vmv1r.v v0, v163112; RV64-NEXT:    ret3113  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03114  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3115  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)3116  ret <vscale x 8 x i1> %v3117}3118 3119define <vscale x 8 x i1> @icmp_eq_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3120; CHECK-LABEL: icmp_eq_vi_nxv8i64:3121; CHECK:       # %bb.0:3122; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3123; CHECK-NEXT:    vmseq.vi v16, v8, 4, v0.t3124; CHECK-NEXT:    vmv1r.v v0, v163125; CHECK-NEXT:    ret3126  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)3127  ret <vscale x 8 x i1> %v3128}3129 3130define <vscale x 8 x i1> @icmp_eq_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3131; CHECK-LABEL: icmp_eq_vi_swap_nxv8i64:3132; CHECK:       # %bb.0:3133; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3134; CHECK-NEXT:    vmseq.vi v16, v8, 4, v0.t3135; CHECK-NEXT:    vmv1r.v v0, v163136; CHECK-NEXT:    ret3137  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"eq", <vscale x 8 x i1> %m, i32 %evl)3138  ret <vscale x 8 x i1> %v3139}3140 3141define <vscale x 8 x i1> @icmp_ne_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {3142; CHECK-LABEL: icmp_ne_vv_nxv8i64:3143; CHECK:       # %bb.0:3144; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3145; CHECK-NEXT:    vmsne.vv v24, v8, v16, v0.t3146; CHECK-NEXT:    vmv1r.v v0, v243147; CHECK-NEXT:    ret3148  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)3149  ret <vscale x 8 x i1> %v3150}3151 3152define <vscale x 8 x i1> @icmp_ne_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3153; RV32-LABEL: icmp_ne_vx_nxv8i64:3154; RV32:       # %bb.0:3155; RV32-NEXT:    addi sp, sp, -163156; RV32-NEXT:    .cfi_def_cfa_offset 163157; RV32-NEXT:    sw a0, 8(sp)3158; RV32-NEXT:    sw a1, 12(sp)3159; RV32-NEXT:    addi a0, sp, 83160; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3161; RV32-NEXT:    vlse64.v v24, (a0), zero3162; RV32-NEXT:    vmsne.vv v16, v8, v24, v0.t3163; RV32-NEXT:    vmv1r.v v0, v163164; RV32-NEXT:    addi sp, sp, 163165; RV32-NEXT:    .cfi_def_cfa_offset 03166; RV32-NEXT:    ret3167;3168; RV64-LABEL: icmp_ne_vx_nxv8i64:3169; RV64:       # %bb.0:3170; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3171; RV64-NEXT:    vmsne.vx v16, v8, a0, v0.t3172; RV64-NEXT:    vmv1r.v v0, v163173; RV64-NEXT:    ret3174  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03175  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3176  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)3177  ret <vscale x 8 x i1> %v3178}3179 3180define <vscale x 8 x i1> @icmp_ne_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3181; RV32-LABEL: icmp_ne_vx_swap_nxv8i64:3182; RV32:       # %bb.0:3183; RV32-NEXT:    addi sp, sp, -163184; RV32-NEXT:    .cfi_def_cfa_offset 163185; RV32-NEXT:    sw a0, 8(sp)3186; RV32-NEXT:    sw a1, 12(sp)3187; RV32-NEXT:    addi a0, sp, 83188; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3189; RV32-NEXT:    vlse64.v v24, (a0), zero3190; RV32-NEXT:    vmsne.vv v16, v24, v8, v0.t3191; RV32-NEXT:    vmv1r.v v0, v163192; RV32-NEXT:    addi sp, sp, 163193; RV32-NEXT:    .cfi_def_cfa_offset 03194; RV32-NEXT:    ret3195;3196; RV64-LABEL: icmp_ne_vx_swap_nxv8i64:3197; RV64:       # %bb.0:3198; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3199; RV64-NEXT:    vmsne.vx v16, v8, a0, v0.t3200; RV64-NEXT:    vmv1r.v v0, v163201; RV64-NEXT:    ret3202  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03203  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3204  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)3205  ret <vscale x 8 x i1> %v3206}3207 3208define <vscale x 8 x i1> @icmp_ne_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3209; CHECK-LABEL: icmp_ne_vi_nxv8i64:3210; CHECK:       # %bb.0:3211; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3212; CHECK-NEXT:    vmsne.vi v16, v8, 4, v0.t3213; CHECK-NEXT:    vmv1r.v v0, v163214; CHECK-NEXT:    ret3215  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)3216  ret <vscale x 8 x i1> %v3217}3218 3219define <vscale x 8 x i1> @icmp_ne_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3220; CHECK-LABEL: icmp_ne_vi_swap_nxv8i64:3221; CHECK:       # %bb.0:3222; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3223; CHECK-NEXT:    vmsne.vi v16, v8, 4, v0.t3224; CHECK-NEXT:    vmv1r.v v0, v163225; CHECK-NEXT:    ret3226  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"ne", <vscale x 8 x i1> %m, i32 %evl)3227  ret <vscale x 8 x i1> %v3228}3229 3230define <vscale x 8 x i1> @icmp_ugt_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {3231; CHECK-LABEL: icmp_ugt_vv_nxv8i64:3232; CHECK:       # %bb.0:3233; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3234; CHECK-NEXT:    vmsltu.vv v24, v16, v8, v0.t3235; CHECK-NEXT:    vmv1r.v v0, v243236; CHECK-NEXT:    ret3237  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)3238  ret <vscale x 8 x i1> %v3239}3240 3241define <vscale x 8 x i1> @icmp_ugt_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3242; RV32-LABEL: icmp_ugt_vx_nxv8i64:3243; RV32:       # %bb.0:3244; RV32-NEXT:    addi sp, sp, -163245; RV32-NEXT:    .cfi_def_cfa_offset 163246; RV32-NEXT:    sw a0, 8(sp)3247; RV32-NEXT:    sw a1, 12(sp)3248; RV32-NEXT:    addi a0, sp, 83249; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3250; RV32-NEXT:    vlse64.v v24, (a0), zero3251; RV32-NEXT:    vmsltu.vv v16, v24, v8, v0.t3252; RV32-NEXT:    vmv1r.v v0, v163253; RV32-NEXT:    addi sp, sp, 163254; RV32-NEXT:    .cfi_def_cfa_offset 03255; RV32-NEXT:    ret3256;3257; RV64-LABEL: icmp_ugt_vx_nxv8i64:3258; RV64:       # %bb.0:3259; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3260; RV64-NEXT:    vmsgtu.vx v16, v8, a0, v0.t3261; RV64-NEXT:    vmv1r.v v0, v163262; RV64-NEXT:    ret3263  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03264  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3265  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)3266  ret <vscale x 8 x i1> %v3267}3268 3269define <vscale x 8 x i1> @icmp_ugt_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3270; RV32-LABEL: icmp_ugt_vx_swap_nxv8i64:3271; RV32:       # %bb.0:3272; RV32-NEXT:    addi sp, sp, -163273; RV32-NEXT:    .cfi_def_cfa_offset 163274; RV32-NEXT:    sw a0, 8(sp)3275; RV32-NEXT:    sw a1, 12(sp)3276; RV32-NEXT:    addi a0, sp, 83277; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3278; RV32-NEXT:    vlse64.v v24, (a0), zero3279; RV32-NEXT:    vmsltu.vv v16, v8, v24, v0.t3280; RV32-NEXT:    vmv1r.v v0, v163281; RV32-NEXT:    addi sp, sp, 163282; RV32-NEXT:    .cfi_def_cfa_offset 03283; RV32-NEXT:    ret3284;3285; RV64-LABEL: icmp_ugt_vx_swap_nxv8i64:3286; RV64:       # %bb.0:3287; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3288; RV64-NEXT:    vmsltu.vx v16, v8, a0, v0.t3289; RV64-NEXT:    vmv1r.v v0, v163290; RV64-NEXT:    ret3291  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03292  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3293  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)3294  ret <vscale x 8 x i1> %v3295}3296 3297define <vscale x 8 x i1> @icmp_ugt_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3298; CHECK-LABEL: icmp_ugt_vi_nxv8i64:3299; CHECK:       # %bb.0:3300; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3301; CHECK-NEXT:    vmsgtu.vi v16, v8, 4, v0.t3302; CHECK-NEXT:    vmv1r.v v0, v163303; CHECK-NEXT:    ret3304  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)3305  ret <vscale x 8 x i1> %v3306}3307 3308define <vscale x 8 x i1> @icmp_ugt_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3309; CHECK-LABEL: icmp_ugt_vi_swap_nxv8i64:3310; CHECK:       # %bb.0:3311; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3312; CHECK-NEXT:    vmsleu.vi v16, v8, 3, v0.t3313; CHECK-NEXT:    vmv1r.v v0, v163314; CHECK-NEXT:    ret3315  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"ugt", <vscale x 8 x i1> %m, i32 %evl)3316  ret <vscale x 8 x i1> %v3317}3318 3319define <vscale x 8 x i1> @icmp_uge_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {3320; CHECK-LABEL: icmp_uge_vv_nxv8i64:3321; CHECK:       # %bb.0:3322; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3323; CHECK-NEXT:    vmsleu.vv v24, v16, v8, v0.t3324; CHECK-NEXT:    vmv1r.v v0, v243325; CHECK-NEXT:    ret3326  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)3327  ret <vscale x 8 x i1> %v3328}3329 3330define <vscale x 8 x i1> @icmp_uge_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3331; RV32-LABEL: icmp_uge_vx_nxv8i64:3332; RV32:       # %bb.0:3333; RV32-NEXT:    addi sp, sp, -163334; RV32-NEXT:    .cfi_def_cfa_offset 163335; RV32-NEXT:    sw a0, 8(sp)3336; RV32-NEXT:    sw a1, 12(sp)3337; RV32-NEXT:    addi a0, sp, 83338; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3339; RV32-NEXT:    vlse64.v v24, (a0), zero3340; RV32-NEXT:    vmsleu.vv v16, v24, v8, v0.t3341; RV32-NEXT:    vmv1r.v v0, v163342; RV32-NEXT:    addi sp, sp, 163343; RV32-NEXT:    .cfi_def_cfa_offset 03344; RV32-NEXT:    ret3345;3346; RV64-LABEL: icmp_uge_vx_nxv8i64:3347; RV64:       # %bb.0:3348; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3349; RV64-NEXT:    vmv.v.x v24, a03350; RV64-NEXT:    vmsleu.vv v16, v24, v8, v0.t3351; RV64-NEXT:    vmv1r.v v0, v163352; RV64-NEXT:    ret3353  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03354  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3355  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)3356  ret <vscale x 8 x i1> %v3357}3358 3359define <vscale x 8 x i1> @icmp_uge_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3360; RV32-LABEL: icmp_uge_vx_swap_nxv8i64:3361; RV32:       # %bb.0:3362; RV32-NEXT:    addi sp, sp, -163363; RV32-NEXT:    .cfi_def_cfa_offset 163364; RV32-NEXT:    sw a0, 8(sp)3365; RV32-NEXT:    sw a1, 12(sp)3366; RV32-NEXT:    addi a0, sp, 83367; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3368; RV32-NEXT:    vlse64.v v24, (a0), zero3369; RV32-NEXT:    vmsleu.vv v16, v8, v24, v0.t3370; RV32-NEXT:    vmv1r.v v0, v163371; RV32-NEXT:    addi sp, sp, 163372; RV32-NEXT:    .cfi_def_cfa_offset 03373; RV32-NEXT:    ret3374;3375; RV64-LABEL: icmp_uge_vx_swap_nxv8i64:3376; RV64:       # %bb.0:3377; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3378; RV64-NEXT:    vmsleu.vx v16, v8, a0, v0.t3379; RV64-NEXT:    vmv1r.v v0, v163380; RV64-NEXT:    ret3381  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03382  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3383  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)3384  ret <vscale x 8 x i1> %v3385}3386 3387define <vscale x 8 x i1> @icmp_uge_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3388; CHECK-LABEL: icmp_uge_vi_nxv8i64:3389; CHECK:       # %bb.0:3390; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3391; CHECK-NEXT:    vmsgtu.vi v16, v8, 3, v0.t3392; CHECK-NEXT:    vmv1r.v v0, v163393; CHECK-NEXT:    ret3394  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)3395  ret <vscale x 8 x i1> %v3396}3397 3398define <vscale x 8 x i1> @icmp_uge_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3399; CHECK-LABEL: icmp_uge_vi_swap_nxv8i64:3400; CHECK:       # %bb.0:3401; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3402; CHECK-NEXT:    vmsleu.vi v16, v8, 4, v0.t3403; CHECK-NEXT:    vmv1r.v v0, v163404; CHECK-NEXT:    ret3405  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"uge", <vscale x 8 x i1> %m, i32 %evl)3406  ret <vscale x 8 x i1> %v3407}3408 3409define <vscale x 8 x i1> @icmp_ult_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {3410; CHECK-LABEL: icmp_ult_vv_nxv8i64:3411; CHECK:       # %bb.0:3412; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3413; CHECK-NEXT:    vmsltu.vv v24, v8, v16, v0.t3414; CHECK-NEXT:    vmv1r.v v0, v243415; CHECK-NEXT:    ret3416  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)3417  ret <vscale x 8 x i1> %v3418}3419 3420define <vscale x 8 x i1> @icmp_ult_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3421; RV32-LABEL: icmp_ult_vx_nxv8i64:3422; RV32:       # %bb.0:3423; RV32-NEXT:    addi sp, sp, -163424; RV32-NEXT:    .cfi_def_cfa_offset 163425; RV32-NEXT:    sw a0, 8(sp)3426; RV32-NEXT:    sw a1, 12(sp)3427; RV32-NEXT:    addi a0, sp, 83428; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3429; RV32-NEXT:    vlse64.v v24, (a0), zero3430; RV32-NEXT:    vmsltu.vv v16, v8, v24, v0.t3431; RV32-NEXT:    vmv1r.v v0, v163432; RV32-NEXT:    addi sp, sp, 163433; RV32-NEXT:    .cfi_def_cfa_offset 03434; RV32-NEXT:    ret3435;3436; RV64-LABEL: icmp_ult_vx_nxv8i64:3437; RV64:       # %bb.0:3438; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3439; RV64-NEXT:    vmsltu.vx v16, v8, a0, v0.t3440; RV64-NEXT:    vmv1r.v v0, v163441; RV64-NEXT:    ret3442  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03443  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3444  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)3445  ret <vscale x 8 x i1> %v3446}3447 3448define <vscale x 8 x i1> @icmp_ult_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3449; RV32-LABEL: icmp_ult_vx_swap_nxv8i64:3450; RV32:       # %bb.0:3451; RV32-NEXT:    addi sp, sp, -163452; RV32-NEXT:    .cfi_def_cfa_offset 163453; RV32-NEXT:    sw a0, 8(sp)3454; RV32-NEXT:    sw a1, 12(sp)3455; RV32-NEXT:    addi a0, sp, 83456; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3457; RV32-NEXT:    vlse64.v v24, (a0), zero3458; RV32-NEXT:    vmsltu.vv v16, v24, v8, v0.t3459; RV32-NEXT:    vmv1r.v v0, v163460; RV32-NEXT:    addi sp, sp, 163461; RV32-NEXT:    .cfi_def_cfa_offset 03462; RV32-NEXT:    ret3463;3464; RV64-LABEL: icmp_ult_vx_swap_nxv8i64:3465; RV64:       # %bb.0:3466; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3467; RV64-NEXT:    vmsgtu.vx v16, v8, a0, v0.t3468; RV64-NEXT:    vmv1r.v v0, v163469; RV64-NEXT:    ret3470  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03471  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3472  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)3473  ret <vscale x 8 x i1> %v3474}3475 3476define <vscale x 8 x i1> @icmp_ult_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3477; CHECK-LABEL: icmp_ult_vi_nxv8i64:3478; CHECK:       # %bb.0:3479; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3480; CHECK-NEXT:    vmsleu.vi v16, v8, 3, v0.t3481; CHECK-NEXT:    vmv1r.v v0, v163482; CHECK-NEXT:    ret3483  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)3484  ret <vscale x 8 x i1> %v3485}3486 3487define <vscale x 8 x i1> @icmp_ult_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3488; CHECK-LABEL: icmp_ult_vi_swap_nxv8i64:3489; CHECK:       # %bb.0:3490; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3491; CHECK-NEXT:    vmsgtu.vi v16, v8, 4, v0.t3492; CHECK-NEXT:    vmv1r.v v0, v163493; CHECK-NEXT:    ret3494  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"ult", <vscale x 8 x i1> %m, i32 %evl)3495  ret <vscale x 8 x i1> %v3496}3497 3498define <vscale x 8 x i1> @icmp_sgt_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {3499; CHECK-LABEL: icmp_sgt_vv_nxv8i64:3500; CHECK:       # %bb.0:3501; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3502; CHECK-NEXT:    vmslt.vv v24, v16, v8, v0.t3503; CHECK-NEXT:    vmv1r.v v0, v243504; CHECK-NEXT:    ret3505  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)3506  ret <vscale x 8 x i1> %v3507}3508 3509define <vscale x 8 x i1> @icmp_sgt_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3510; RV32-LABEL: icmp_sgt_vx_nxv8i64:3511; RV32:       # %bb.0:3512; RV32-NEXT:    addi sp, sp, -163513; RV32-NEXT:    .cfi_def_cfa_offset 163514; RV32-NEXT:    sw a0, 8(sp)3515; RV32-NEXT:    sw a1, 12(sp)3516; RV32-NEXT:    addi a0, sp, 83517; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3518; RV32-NEXT:    vlse64.v v24, (a0), zero3519; RV32-NEXT:    vmslt.vv v16, v24, v8, v0.t3520; RV32-NEXT:    vmv1r.v v0, v163521; RV32-NEXT:    addi sp, sp, 163522; RV32-NEXT:    .cfi_def_cfa_offset 03523; RV32-NEXT:    ret3524;3525; RV64-LABEL: icmp_sgt_vx_nxv8i64:3526; RV64:       # %bb.0:3527; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3528; RV64-NEXT:    vmsgt.vx v16, v8, a0, v0.t3529; RV64-NEXT:    vmv1r.v v0, v163530; RV64-NEXT:    ret3531  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03532  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3533  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)3534  ret <vscale x 8 x i1> %v3535}3536 3537define <vscale x 8 x i1> @icmp_sgt_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3538; RV32-LABEL: icmp_sgt_vx_swap_nxv8i64:3539; RV32:       # %bb.0:3540; RV32-NEXT:    addi sp, sp, -163541; RV32-NEXT:    .cfi_def_cfa_offset 163542; RV32-NEXT:    sw a0, 8(sp)3543; RV32-NEXT:    sw a1, 12(sp)3544; RV32-NEXT:    addi a0, sp, 83545; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3546; RV32-NEXT:    vlse64.v v24, (a0), zero3547; RV32-NEXT:    vmslt.vv v16, v8, v24, v0.t3548; RV32-NEXT:    vmv1r.v v0, v163549; RV32-NEXT:    addi sp, sp, 163550; RV32-NEXT:    .cfi_def_cfa_offset 03551; RV32-NEXT:    ret3552;3553; RV64-LABEL: icmp_sgt_vx_swap_nxv8i64:3554; RV64:       # %bb.0:3555; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3556; RV64-NEXT:    vmslt.vx v16, v8, a0, v0.t3557; RV64-NEXT:    vmv1r.v v0, v163558; RV64-NEXT:    ret3559  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03560  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3561  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)3562  ret <vscale x 8 x i1> %v3563}3564 3565define <vscale x 8 x i1> @icmp_sgt_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3566; CHECK-LABEL: icmp_sgt_vi_nxv8i64:3567; CHECK:       # %bb.0:3568; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3569; CHECK-NEXT:    vmsgt.vi v16, v8, 4, v0.t3570; CHECK-NEXT:    vmv1r.v v0, v163571; CHECK-NEXT:    ret3572  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)3573  ret <vscale x 8 x i1> %v3574}3575 3576define <vscale x 8 x i1> @icmp_sgt_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3577; CHECK-LABEL: icmp_sgt_vi_swap_nxv8i64:3578; CHECK:       # %bb.0:3579; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3580; CHECK-NEXT:    vmsle.vi v16, v8, 3, v0.t3581; CHECK-NEXT:    vmv1r.v v0, v163582; CHECK-NEXT:    ret3583  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"sgt", <vscale x 8 x i1> %m, i32 %evl)3584  ret <vscale x 8 x i1> %v3585}3586 3587define <vscale x 8 x i1> @icmp_sge_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {3588; CHECK-LABEL: icmp_sge_vv_nxv8i64:3589; CHECK:       # %bb.0:3590; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3591; CHECK-NEXT:    vmsle.vv v24, v16, v8, v0.t3592; CHECK-NEXT:    vmv1r.v v0, v243593; CHECK-NEXT:    ret3594  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)3595  ret <vscale x 8 x i1> %v3596}3597 3598define <vscale x 8 x i1> @icmp_sge_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3599; RV32-LABEL: icmp_sge_vx_nxv8i64:3600; RV32:       # %bb.0:3601; RV32-NEXT:    addi sp, sp, -163602; RV32-NEXT:    .cfi_def_cfa_offset 163603; RV32-NEXT:    sw a0, 8(sp)3604; RV32-NEXT:    sw a1, 12(sp)3605; RV32-NEXT:    addi a0, sp, 83606; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3607; RV32-NEXT:    vlse64.v v24, (a0), zero3608; RV32-NEXT:    vmsle.vv v16, v24, v8, v0.t3609; RV32-NEXT:    vmv1r.v v0, v163610; RV32-NEXT:    addi sp, sp, 163611; RV32-NEXT:    .cfi_def_cfa_offset 03612; RV32-NEXT:    ret3613;3614; RV64-LABEL: icmp_sge_vx_nxv8i64:3615; RV64:       # %bb.0:3616; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3617; RV64-NEXT:    vmv.v.x v24, a03618; RV64-NEXT:    vmsle.vv v16, v24, v8, v0.t3619; RV64-NEXT:    vmv1r.v v0, v163620; RV64-NEXT:    ret3621  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03622  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3623  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)3624  ret <vscale x 8 x i1> %v3625}3626 3627define <vscale x 8 x i1> @icmp_sge_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3628; RV32-LABEL: icmp_sge_vx_swap_nxv8i64:3629; RV32:       # %bb.0:3630; RV32-NEXT:    addi sp, sp, -163631; RV32-NEXT:    .cfi_def_cfa_offset 163632; RV32-NEXT:    sw a0, 8(sp)3633; RV32-NEXT:    sw a1, 12(sp)3634; RV32-NEXT:    addi a0, sp, 83635; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3636; RV32-NEXT:    vlse64.v v24, (a0), zero3637; RV32-NEXT:    vmsle.vv v16, v8, v24, v0.t3638; RV32-NEXT:    vmv1r.v v0, v163639; RV32-NEXT:    addi sp, sp, 163640; RV32-NEXT:    .cfi_def_cfa_offset 03641; RV32-NEXT:    ret3642;3643; RV64-LABEL: icmp_sge_vx_swap_nxv8i64:3644; RV64:       # %bb.0:3645; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3646; RV64-NEXT:    vmsle.vx v16, v8, a0, v0.t3647; RV64-NEXT:    vmv1r.v v0, v163648; RV64-NEXT:    ret3649  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03650  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3651  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)3652  ret <vscale x 8 x i1> %v3653}3654 3655define <vscale x 8 x i1> @icmp_sge_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3656; CHECK-LABEL: icmp_sge_vi_nxv8i64:3657; CHECK:       # %bb.0:3658; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3659; CHECK-NEXT:    vmsgt.vi v16, v8, 3, v0.t3660; CHECK-NEXT:    vmv1r.v v0, v163661; CHECK-NEXT:    ret3662  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)3663  ret <vscale x 8 x i1> %v3664}3665 3666define <vscale x 8 x i1> @icmp_sge_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3667; CHECK-LABEL: icmp_sge_vi_swap_nxv8i64:3668; CHECK:       # %bb.0:3669; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3670; CHECK-NEXT:    vmsle.vi v16, v8, 4, v0.t3671; CHECK-NEXT:    vmv1r.v v0, v163672; CHECK-NEXT:    ret3673  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"sge", <vscale x 8 x i1> %m, i32 %evl)3674  ret <vscale x 8 x i1> %v3675}3676 3677define <vscale x 8 x i1> @icmp_slt_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {3678; CHECK-LABEL: icmp_slt_vv_nxv8i64:3679; CHECK:       # %bb.0:3680; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3681; CHECK-NEXT:    vmslt.vv v24, v8, v16, v0.t3682; CHECK-NEXT:    vmv1r.v v0, v243683; CHECK-NEXT:    ret3684  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)3685  ret <vscale x 8 x i1> %v3686}3687 3688define <vscale x 8 x i1> @icmp_slt_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3689; RV32-LABEL: icmp_slt_vx_nxv8i64:3690; RV32:       # %bb.0:3691; RV32-NEXT:    addi sp, sp, -163692; RV32-NEXT:    .cfi_def_cfa_offset 163693; RV32-NEXT:    sw a0, 8(sp)3694; RV32-NEXT:    sw a1, 12(sp)3695; RV32-NEXT:    addi a0, sp, 83696; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3697; RV32-NEXT:    vlse64.v v24, (a0), zero3698; RV32-NEXT:    vmslt.vv v16, v8, v24, v0.t3699; RV32-NEXT:    vmv1r.v v0, v163700; RV32-NEXT:    addi sp, sp, 163701; RV32-NEXT:    .cfi_def_cfa_offset 03702; RV32-NEXT:    ret3703;3704; RV64-LABEL: icmp_slt_vx_nxv8i64:3705; RV64:       # %bb.0:3706; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3707; RV64-NEXT:    vmslt.vx v16, v8, a0, v0.t3708; RV64-NEXT:    vmv1r.v v0, v163709; RV64-NEXT:    ret3710  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03711  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3712  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)3713  ret <vscale x 8 x i1> %v3714}3715 3716define <vscale x 8 x i1> @icmp_slt_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3717; RV32-LABEL: icmp_slt_vx_swap_nxv8i64:3718; RV32:       # %bb.0:3719; RV32-NEXT:    addi sp, sp, -163720; RV32-NEXT:    .cfi_def_cfa_offset 163721; RV32-NEXT:    sw a0, 8(sp)3722; RV32-NEXT:    sw a1, 12(sp)3723; RV32-NEXT:    addi a0, sp, 83724; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3725; RV32-NEXT:    vlse64.v v24, (a0), zero3726; RV32-NEXT:    vmslt.vv v16, v24, v8, v0.t3727; RV32-NEXT:    vmv1r.v v0, v163728; RV32-NEXT:    addi sp, sp, 163729; RV32-NEXT:    .cfi_def_cfa_offset 03730; RV32-NEXT:    ret3731;3732; RV64-LABEL: icmp_slt_vx_swap_nxv8i64:3733; RV64:       # %bb.0:3734; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3735; RV64-NEXT:    vmsgt.vx v16, v8, a0, v0.t3736; RV64-NEXT:    vmv1r.v v0, v163737; RV64-NEXT:    ret3738  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03739  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3740  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)3741  ret <vscale x 8 x i1> %v3742}3743 3744define <vscale x 8 x i1> @icmp_slt_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3745; CHECK-LABEL: icmp_slt_vi_nxv8i64:3746; CHECK:       # %bb.0:3747; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3748; CHECK-NEXT:    vmsle.vi v16, v8, 3, v0.t3749; CHECK-NEXT:    vmv1r.v v0, v163750; CHECK-NEXT:    ret3751  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)3752  ret <vscale x 8 x i1> %v3753}3754 3755define <vscale x 8 x i1> @icmp_slt_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3756; CHECK-LABEL: icmp_slt_vi_swap_nxv8i64:3757; CHECK:       # %bb.0:3758; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3759; CHECK-NEXT:    vmsgt.vi v16, v8, 4, v0.t3760; CHECK-NEXT:    vmv1r.v v0, v163761; CHECK-NEXT:    ret3762  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"slt", <vscale x 8 x i1> %m, i32 %evl)3763  ret <vscale x 8 x i1> %v3764}3765 3766define <vscale x 8 x i1> @icmp_sle_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {3767; CHECK-LABEL: icmp_sle_vv_nxv8i64:3768; CHECK:       # %bb.0:3769; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3770; CHECK-NEXT:    vmsle.vv v24, v8, v16, v0.t3771; CHECK-NEXT:    vmv1r.v v0, v243772; CHECK-NEXT:    ret3773  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)3774  ret <vscale x 8 x i1> %v3775}3776 3777define <vscale x 8 x i1> @icmp_sle_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3778; RV32-LABEL: icmp_sle_vx_nxv8i64:3779; RV32:       # %bb.0:3780; RV32-NEXT:    addi sp, sp, -163781; RV32-NEXT:    .cfi_def_cfa_offset 163782; RV32-NEXT:    sw a0, 8(sp)3783; RV32-NEXT:    sw a1, 12(sp)3784; RV32-NEXT:    addi a0, sp, 83785; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3786; RV32-NEXT:    vlse64.v v24, (a0), zero3787; RV32-NEXT:    vmsle.vv v16, v8, v24, v0.t3788; RV32-NEXT:    vmv1r.v v0, v163789; RV32-NEXT:    addi sp, sp, 163790; RV32-NEXT:    .cfi_def_cfa_offset 03791; RV32-NEXT:    ret3792;3793; RV64-LABEL: icmp_sle_vx_nxv8i64:3794; RV64:       # %bb.0:3795; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3796; RV64-NEXT:    vmsle.vx v16, v8, a0, v0.t3797; RV64-NEXT:    vmv1r.v v0, v163798; RV64-NEXT:    ret3799  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03800  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3801  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)3802  ret <vscale x 8 x i1> %v3803}3804 3805define <vscale x 8 x i1> @icmp_sle_vx_swap_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3806; RV32-LABEL: icmp_sle_vx_swap_nxv8i64:3807; RV32:       # %bb.0:3808; RV32-NEXT:    addi sp, sp, -163809; RV32-NEXT:    .cfi_def_cfa_offset 163810; RV32-NEXT:    sw a0, 8(sp)3811; RV32-NEXT:    sw a1, 12(sp)3812; RV32-NEXT:    addi a0, sp, 83813; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma3814; RV32-NEXT:    vlse64.v v24, (a0), zero3815; RV32-NEXT:    vmsle.vv v16, v24, v8, v0.t3816; RV32-NEXT:    vmv1r.v v0, v163817; RV32-NEXT:    addi sp, sp, 163818; RV32-NEXT:    .cfi_def_cfa_offset 03819; RV32-NEXT:    ret3820;3821; RV64-LABEL: icmp_sle_vx_swap_nxv8i64:3822; RV64:       # %bb.0:3823; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma3824; RV64-NEXT:    vmv.v.x v24, a03825; RV64-NEXT:    vmsle.vv v16, v24, v8, v0.t3826; RV64-NEXT:    vmv1r.v v0, v163827; RV64-NEXT:    ret3828  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 03829  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer3830  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i64> %va, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)3831  ret <vscale x 8 x i1> %v3832}3833 3834define <vscale x 8 x i1> @icmp_sle_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3835; CHECK-LABEL: icmp_sle_vi_nxv8i64:3836; CHECK:       # %bb.0:3837; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3838; CHECK-NEXT:    vmsle.vi v16, v8, 4, v0.t3839; CHECK-NEXT:    vmv1r.v v0, v163840; CHECK-NEXT:    ret3841  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)3842  ret <vscale x 8 x i1> %v3843}3844 3845define <vscale x 8 x i1> @icmp_sle_vi_swap_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {3846; CHECK-LABEL: icmp_sle_vi_swap_nxv8i64:3847; CHECK:       # %bb.0:3848; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma3849; CHECK-NEXT:    vmsgt.vi v16, v8, 3, v0.t3850; CHECK-NEXT:    vmv1r.v v0, v163851; CHECK-NEXT:    ret3852  %v = call <vscale x 8 x i1> @llvm.vp.icmp.nxv8i64(<vscale x 8 x i64> splat (i64 4), <vscale x 8 x i64> %va, metadata !"sle", <vscale x 8 x i1> %m, i32 %evl)3853  ret <vscale x 8 x i1> %v3854}3855