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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s3 4define <vscale x 1 x i8> @smulo_nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %y) {5; CHECK-LABEL: smulo_nxv1i8:6; CHECK: # %bb.0:7; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma8; CHECK-NEXT: vmulh.vv v10, v8, v99; CHECK-NEXT: vmul.vv v8, v8, v910; CHECK-NEXT: vsra.vi v9, v8, 711; CHECK-NEXT: vmsne.vv v0, v10, v912; CHECK-NEXT: vmerge.vim v8, v8, 0, v013; CHECK-NEXT: ret14 %a = call { <vscale x 1 x i8>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %y)15 %b = extractvalue { <vscale x 1 x i8>, <vscale x 1 x i1> } %a, 016 %c = extractvalue { <vscale x 1 x i8>, <vscale x 1 x i1> } %a, 117 %d = select <vscale x 1 x i1> %c, <vscale x 1 x i8> zeroinitializer, <vscale x 1 x i8> %b18 ret <vscale x 1 x i8> %d19}20 21define <vscale x 2 x i8> @smulo_nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %y) {22; CHECK-LABEL: smulo_nxv2i8:23; CHECK: # %bb.0:24; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma25; CHECK-NEXT: vmulh.vv v10, v8, v926; CHECK-NEXT: vmul.vv v8, v8, v927; CHECK-NEXT: vsra.vi v9, v8, 728; CHECK-NEXT: vmsne.vv v0, v10, v929; CHECK-NEXT: vmerge.vim v8, v8, 0, v030; CHECK-NEXT: ret31 %a = call { <vscale x 2 x i8>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %y)32 %b = extractvalue { <vscale x 2 x i8>, <vscale x 2 x i1> } %a, 033 %c = extractvalue { <vscale x 2 x i8>, <vscale x 2 x i1> } %a, 134 %d = select <vscale x 2 x i1> %c, <vscale x 2 x i8> zeroinitializer, <vscale x 2 x i8> %b35 ret <vscale x 2 x i8> %d36}37 38define <vscale x 4 x i8> @smulo_nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %y) {39; CHECK-LABEL: smulo_nxv4i8:40; CHECK: # %bb.0:41; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma42; CHECK-NEXT: vmulh.vv v10, v8, v943; CHECK-NEXT: vmul.vv v8, v8, v944; CHECK-NEXT: vsra.vi v9, v8, 745; CHECK-NEXT: vmsne.vv v0, v10, v946; CHECK-NEXT: vmerge.vim v8, v8, 0, v047; CHECK-NEXT: ret48 %a = call { <vscale x 4 x i8>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %y)49 %b = extractvalue { <vscale x 4 x i8>, <vscale x 4 x i1> } %a, 050 %c = extractvalue { <vscale x 4 x i8>, <vscale x 4 x i1> } %a, 151 %d = select <vscale x 4 x i1> %c, <vscale x 4 x i8> zeroinitializer, <vscale x 4 x i8> %b52 ret <vscale x 4 x i8> %d53}54 55define <vscale x 8 x i8> @smulo_nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %y) {56; CHECK-LABEL: smulo_nxv8i8:57; CHECK: # %bb.0:58; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma59; CHECK-NEXT: vmulh.vv v10, v8, v960; CHECK-NEXT: vmul.vv v8, v8, v961; CHECK-NEXT: vsra.vi v9, v8, 762; CHECK-NEXT: vmsne.vv v0, v10, v963; CHECK-NEXT: vmerge.vim v8, v8, 0, v064; CHECK-NEXT: ret65 %a = call { <vscale x 8 x i8>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %y)66 %b = extractvalue { <vscale x 8 x i8>, <vscale x 8 x i1> } %a, 067 %c = extractvalue { <vscale x 8 x i8>, <vscale x 8 x i1> } %a, 168 %d = select <vscale x 8 x i1> %c, <vscale x 8 x i8> zeroinitializer, <vscale x 8 x i8> %b69 ret <vscale x 8 x i8> %d70}71 72define <vscale x 16 x i8> @smulo_nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %y) {73; CHECK-LABEL: smulo_nxv16i8:74; CHECK: # %bb.0:75; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma76; CHECK-NEXT: vmulh.vv v12, v8, v1077; CHECK-NEXT: vmul.vv v8, v8, v1078; CHECK-NEXT: vsra.vi v10, v8, 779; CHECK-NEXT: vmsne.vv v0, v12, v1080; CHECK-NEXT: vmerge.vim v8, v8, 0, v081; CHECK-NEXT: ret82 %a = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %y)83 %b = extractvalue { <vscale x 16 x i8>, <vscale x 16 x i1> } %a, 084 %c = extractvalue { <vscale x 16 x i8>, <vscale x 16 x i1> } %a, 185 %d = select <vscale x 16 x i1> %c, <vscale x 16 x i8> zeroinitializer, <vscale x 16 x i8> %b86 ret <vscale x 16 x i8> %d87}88 89define <vscale x 32 x i8> @smulo_nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %y) {90; CHECK-LABEL: smulo_nxv32i8:91; CHECK: # %bb.0:92; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma93; CHECK-NEXT: vmulh.vv v16, v8, v1294; CHECK-NEXT: vmul.vv v8, v8, v1295; CHECK-NEXT: vsra.vi v12, v8, 796; CHECK-NEXT: vmsne.vv v0, v16, v1297; CHECK-NEXT: vmerge.vim v8, v8, 0, v098; CHECK-NEXT: ret99 %a = call { <vscale x 32 x i8>, <vscale x 32 x i1> } @llvm.smul.with.overflow.nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %y)100 %b = extractvalue { <vscale x 32 x i8>, <vscale x 32 x i1> } %a, 0101 %c = extractvalue { <vscale x 32 x i8>, <vscale x 32 x i1> } %a, 1102 %d = select <vscale x 32 x i1> %c, <vscale x 32 x i8> zeroinitializer, <vscale x 32 x i8> %b103 ret <vscale x 32 x i8> %d104}105 106define <vscale x 64 x i8> @smulo_nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %y) {107; CHECK-LABEL: smulo_nxv64i8:108; CHECK: # %bb.0:109; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma110; CHECK-NEXT: vmulh.vv v24, v8, v16111; CHECK-NEXT: vmul.vv v8, v8, v16112; CHECK-NEXT: vsra.vi v16, v8, 7113; CHECK-NEXT: vmsne.vv v0, v24, v16114; CHECK-NEXT: vmerge.vim v8, v8, 0, v0115; CHECK-NEXT: ret116 %a = call { <vscale x 64 x i8>, <vscale x 64 x i1> } @llvm.smul.with.overflow.nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %y)117 %b = extractvalue { <vscale x 64 x i8>, <vscale x 64 x i1> } %a, 0118 %c = extractvalue { <vscale x 64 x i8>, <vscale x 64 x i1> } %a, 1119 %d = select <vscale x 64 x i1> %c, <vscale x 64 x i8> zeroinitializer, <vscale x 64 x i8> %b120 ret <vscale x 64 x i8> %d121}122 123define <vscale x 1 x i16> @smulo_nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %y) {124; CHECK-LABEL: smulo_nxv1i16:125; CHECK: # %bb.0:126; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma127; CHECK-NEXT: vmulh.vv v10, v8, v9128; CHECK-NEXT: vmul.vv v8, v8, v9129; CHECK-NEXT: vsra.vi v9, v8, 15130; CHECK-NEXT: vmsne.vv v0, v10, v9131; CHECK-NEXT: vmerge.vim v8, v8, 0, v0132; CHECK-NEXT: ret133 %a = call { <vscale x 1 x i16>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %y)134 %b = extractvalue { <vscale x 1 x i16>, <vscale x 1 x i1> } %a, 0135 %c = extractvalue { <vscale x 1 x i16>, <vscale x 1 x i1> } %a, 1136 %d = select <vscale x 1 x i1> %c, <vscale x 1 x i16> zeroinitializer, <vscale x 1 x i16> %b137 ret <vscale x 1 x i16> %d138}139 140define <vscale x 2 x i16> @smulo_nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %y) {141; CHECK-LABEL: smulo_nxv2i16:142; CHECK: # %bb.0:143; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma144; CHECK-NEXT: vmulh.vv v10, v8, v9145; CHECK-NEXT: vmul.vv v8, v8, v9146; CHECK-NEXT: vsra.vi v9, v8, 15147; CHECK-NEXT: vmsne.vv v0, v10, v9148; CHECK-NEXT: vmerge.vim v8, v8, 0, v0149; CHECK-NEXT: ret150 %a = call { <vscale x 2 x i16>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %y)151 %b = extractvalue { <vscale x 2 x i16>, <vscale x 2 x i1> } %a, 0152 %c = extractvalue { <vscale x 2 x i16>, <vscale x 2 x i1> } %a, 1153 %d = select <vscale x 2 x i1> %c, <vscale x 2 x i16> zeroinitializer, <vscale x 2 x i16> %b154 ret <vscale x 2 x i16> %d155}156 157define <vscale x 4 x i16> @smulo_nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %y) {158; CHECK-LABEL: smulo_nxv4i16:159; CHECK: # %bb.0:160; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma161; CHECK-NEXT: vmulh.vv v10, v8, v9162; CHECK-NEXT: vmul.vv v8, v8, v9163; CHECK-NEXT: vsra.vi v9, v8, 15164; CHECK-NEXT: vmsne.vv v0, v10, v9165; CHECK-NEXT: vmerge.vim v8, v8, 0, v0166; CHECK-NEXT: ret167 %a = call { <vscale x 4 x i16>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %y)168 %b = extractvalue { <vscale x 4 x i16>, <vscale x 4 x i1> } %a, 0169 %c = extractvalue { <vscale x 4 x i16>, <vscale x 4 x i1> } %a, 1170 %d = select <vscale x 4 x i1> %c, <vscale x 4 x i16> zeroinitializer, <vscale x 4 x i16> %b171 ret <vscale x 4 x i16> %d172}173 174define <vscale x 8 x i16> @smulo_nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %y) {175; CHECK-LABEL: smulo_nxv8i16:176; CHECK: # %bb.0:177; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma178; CHECK-NEXT: vmulh.vv v12, v8, v10179; CHECK-NEXT: vmul.vv v8, v8, v10180; CHECK-NEXT: vsra.vi v10, v8, 15181; CHECK-NEXT: vmsne.vv v0, v12, v10182; CHECK-NEXT: vmerge.vim v8, v8, 0, v0183; CHECK-NEXT: ret184 %a = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %y)185 %b = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i1> } %a, 0186 %c = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i1> } %a, 1187 %d = select <vscale x 8 x i1> %c, <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i16> %b188 ret <vscale x 8 x i16> %d189}190 191define <vscale x 16 x i16> @smulo_nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %y) {192; CHECK-LABEL: smulo_nxv16i16:193; CHECK: # %bb.0:194; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma195; CHECK-NEXT: vmulh.vv v16, v8, v12196; CHECK-NEXT: vmul.vv v8, v8, v12197; CHECK-NEXT: vsra.vi v12, v8, 15198; CHECK-NEXT: vmsne.vv v0, v16, v12199; CHECK-NEXT: vmerge.vim v8, v8, 0, v0200; CHECK-NEXT: ret201 %a = call { <vscale x 16 x i16>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %y)202 %b = extractvalue { <vscale x 16 x i16>, <vscale x 16 x i1> } %a, 0203 %c = extractvalue { <vscale x 16 x i16>, <vscale x 16 x i1> } %a, 1204 %d = select <vscale x 16 x i1> %c, <vscale x 16 x i16> zeroinitializer, <vscale x 16 x i16> %b205 ret <vscale x 16 x i16> %d206}207 208define <vscale x 32 x i16> @smulo_nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %y) {209; CHECK-LABEL: smulo_nxv32i16:210; CHECK: # %bb.0:211; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma212; CHECK-NEXT: vmulh.vv v24, v8, v16213; CHECK-NEXT: vmul.vv v8, v8, v16214; CHECK-NEXT: vsra.vi v16, v8, 15215; CHECK-NEXT: vmsne.vv v0, v24, v16216; CHECK-NEXT: vmerge.vim v8, v8, 0, v0217; CHECK-NEXT: ret218 %a = call { <vscale x 32 x i16>, <vscale x 32 x i1> } @llvm.smul.with.overflow.nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %y)219 %b = extractvalue { <vscale x 32 x i16>, <vscale x 32 x i1> } %a, 0220 %c = extractvalue { <vscale x 32 x i16>, <vscale x 32 x i1> } %a, 1221 %d = select <vscale x 32 x i1> %c, <vscale x 32 x i16> zeroinitializer, <vscale x 32 x i16> %b222 ret <vscale x 32 x i16> %d223}224 225define <vscale x 1 x i32> @smulo_nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %y) {226; CHECK-LABEL: smulo_nxv1i32:227; CHECK: # %bb.0:228; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma229; CHECK-NEXT: vmulh.vv v10, v8, v9230; CHECK-NEXT: vmul.vv v8, v8, v9231; CHECK-NEXT: vsra.vi v9, v8, 31232; CHECK-NEXT: vmsne.vv v0, v10, v9233; CHECK-NEXT: vmerge.vim v8, v8, 0, v0234; CHECK-NEXT: ret235 %a = call { <vscale x 1 x i32>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %y)236 %b = extractvalue { <vscale x 1 x i32>, <vscale x 1 x i1> } %a, 0237 %c = extractvalue { <vscale x 1 x i32>, <vscale x 1 x i1> } %a, 1238 %d = select <vscale x 1 x i1> %c, <vscale x 1 x i32> zeroinitializer, <vscale x 1 x i32> %b239 ret <vscale x 1 x i32> %d240}241 242define <vscale x 2 x i32> @smulo_nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y) {243; CHECK-LABEL: smulo_nxv2i32:244; CHECK: # %bb.0:245; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma246; CHECK-NEXT: vmulh.vv v10, v8, v9247; CHECK-NEXT: vmul.vv v8, v8, v9248; CHECK-NEXT: vsra.vi v9, v8, 31249; CHECK-NEXT: vmsne.vv v0, v10, v9250; CHECK-NEXT: vmerge.vim v8, v8, 0, v0251; CHECK-NEXT: ret252 %a = call { <vscale x 2 x i32>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y)253 %b = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i1> } %a, 0254 %c = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i1> } %a, 1255 %d = select <vscale x 2 x i1> %c, <vscale x 2 x i32> zeroinitializer, <vscale x 2 x i32> %b256 ret <vscale x 2 x i32> %d257}258 259define <vscale x 4 x i32> @smulo_nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %y) {260; CHECK-LABEL: smulo_nxv4i32:261; CHECK: # %bb.0:262; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma263; CHECK-NEXT: vmulh.vv v12, v8, v10264; CHECK-NEXT: vmul.vv v8, v8, v10265; CHECK-NEXT: vsra.vi v10, v8, 31266; CHECK-NEXT: vmsne.vv v0, v12, v10267; CHECK-NEXT: vmerge.vim v8, v8, 0, v0268; CHECK-NEXT: ret269 %a = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %y)270 %b = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i1> } %a, 0271 %c = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i1> } %a, 1272 %d = select <vscale x 4 x i1> %c, <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> %b273 ret <vscale x 4 x i32> %d274}275 276define <vscale x 8 x i32> @smulo_nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %y) {277; CHECK-LABEL: smulo_nxv8i32:278; CHECK: # %bb.0:279; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma280; CHECK-NEXT: vmulh.vv v16, v8, v12281; CHECK-NEXT: vmul.vv v8, v8, v12282; CHECK-NEXT: vsra.vi v12, v8, 31283; CHECK-NEXT: vmsne.vv v0, v16, v12284; CHECK-NEXT: vmerge.vim v8, v8, 0, v0285; CHECK-NEXT: ret286 %a = call { <vscale x 8 x i32>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %y)287 %b = extractvalue { <vscale x 8 x i32>, <vscale x 8 x i1> } %a, 0288 %c = extractvalue { <vscale x 8 x i32>, <vscale x 8 x i1> } %a, 1289 %d = select <vscale x 8 x i1> %c, <vscale x 8 x i32> zeroinitializer, <vscale x 8 x i32> %b290 ret <vscale x 8 x i32> %d291}292 293define <vscale x 16 x i32> @smulo_nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %y) {294; CHECK-LABEL: smulo_nxv16i32:295; CHECK: # %bb.0:296; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma297; CHECK-NEXT: vmulh.vv v24, v8, v16298; CHECK-NEXT: vmul.vv v8, v8, v16299; CHECK-NEXT: vsra.vi v16, v8, 31300; CHECK-NEXT: vmsne.vv v0, v24, v16301; CHECK-NEXT: vmerge.vim v8, v8, 0, v0302; CHECK-NEXT: ret303 %a = call { <vscale x 16 x i32>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %y)304 %b = extractvalue { <vscale x 16 x i32>, <vscale x 16 x i1> } %a, 0305 %c = extractvalue { <vscale x 16 x i32>, <vscale x 16 x i1> } %a, 1306 %d = select <vscale x 16 x i1> %c, <vscale x 16 x i32> zeroinitializer, <vscale x 16 x i32> %b307 ret <vscale x 16 x i32> %d308}309 310define <vscale x 1 x i64> @smulo_nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %y) {311; CHECK-LABEL: smulo_nxv1i64:312; CHECK: # %bb.0:313; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma314; CHECK-NEXT: vmulh.vv v10, v8, v9315; CHECK-NEXT: vmul.vv v8, v8, v9316; CHECK-NEXT: li a0, 63317; CHECK-NEXT: vsra.vx v9, v8, a0318; CHECK-NEXT: vmsne.vv v0, v10, v9319; CHECK-NEXT: vmerge.vim v8, v8, 0, v0320; CHECK-NEXT: ret321 %a = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %y)322 %b = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i1> } %a, 0323 %c = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i1> } %a, 1324 %d = select <vscale x 1 x i1> %c, <vscale x 1 x i64> zeroinitializer, <vscale x 1 x i64> %b325 ret <vscale x 1 x i64> %d326}327 328define <vscale x 2 x i64> @smulo_nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y) {329; CHECK-LABEL: smulo_nxv2i64:330; CHECK: # %bb.0:331; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma332; CHECK-NEXT: vmulh.vv v12, v8, v10333; CHECK-NEXT: vmul.vv v8, v8, v10334; CHECK-NEXT: li a0, 63335; CHECK-NEXT: vsra.vx v10, v8, a0336; CHECK-NEXT: vmsne.vv v0, v12, v10337; CHECK-NEXT: vmerge.vim v8, v8, 0, v0338; CHECK-NEXT: ret339 %a = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y)340 %b = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i1> } %a, 0341 %c = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i1> } %a, 1342 %d = select <vscale x 2 x i1> %c, <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i64> %b343 ret <vscale x 2 x i64> %d344}345 346define <vscale x 4 x i64> @smulo_nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %y) {347; CHECK-LABEL: smulo_nxv4i64:348; CHECK: # %bb.0:349; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma350; CHECK-NEXT: vmulh.vv v16, v8, v12351; CHECK-NEXT: vmul.vv v8, v8, v12352; CHECK-NEXT: li a0, 63353; CHECK-NEXT: vsra.vx v12, v8, a0354; CHECK-NEXT: vmsne.vv v0, v16, v12355; CHECK-NEXT: vmerge.vim v8, v8, 0, v0356; CHECK-NEXT: ret357 %a = call { <vscale x 4 x i64>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %y)358 %b = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i1> } %a, 0359 %c = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i1> } %a, 1360 %d = select <vscale x 4 x i1> %c, <vscale x 4 x i64> zeroinitializer, <vscale x 4 x i64> %b361 ret <vscale x 4 x i64> %d362}363 364define <vscale x 8 x i64> @smulo_nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %y) {365; CHECK-LABEL: smulo_nxv8i64:366; CHECK: # %bb.0:367; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma368; CHECK-NEXT: vmulh.vv v24, v8, v16369; CHECK-NEXT: vmul.vv v8, v8, v16370; CHECK-NEXT: li a0, 63371; CHECK-NEXT: vsra.vx v16, v8, a0372; CHECK-NEXT: vmsne.vv v0, v24, v16373; CHECK-NEXT: vmerge.vim v8, v8, 0, v0374; CHECK-NEXT: ret375 %a = call { <vscale x 8 x i64>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %y)376 %b = extractvalue { <vscale x 8 x i64>, <vscale x 8 x i1> } %a, 0377 %c = extractvalue { <vscale x 8 x i64>, <vscale x 8 x i1> } %a, 1378 %d = select <vscale x 8 x i1> %c, <vscale x 8 x i64> zeroinitializer, <vscale x 8 x i64> %b379 ret <vscale x 8 x i64> %d380}381