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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc %s -mtriple=riscv64 -mattr=+v -enable-subreg-liveness -run-pass=init-undef -o - | FileCheck %s3# RUN: llc %s -mtriple=riscv64 -mattr=+v -enable-subreg-liveness -passes=init-undef -o - | FileCheck %s4 5...6---7name: test_M4_sub_vrm1_08body: |9 bb.0.entry:10 ; CHECK-LABEL: name: test_M4_sub_vrm1_011 ; CHECK: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF12 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 813 ; CHECK-NEXT: %pt:vr = IMPLICIT_DEF14 ; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */15 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm4 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M1_]], %subreg.sub_vrm1_016 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype17 ; CHECK-NEXT: %pt2:vrm4 = IMPLICIT_DEF18 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm2nov0 = INIT_UNDEF19 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm4 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm2_120 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrnov0 = INIT_UNDEF21 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm4 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm1_122 ; CHECK-NEXT: early-clobber %6:vrm4 = PseudoVRGATHER_VI_M4 %pt2, killed [[INSERT_SUBREG2]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype23 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 024 ; CHECK-NEXT: PseudoVSE32_V_M4 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype25 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x026 ; CHECK-NEXT: $x10 = COPY [[COPY]]27 ; CHECK-NEXT: PseudoRET implicit $x1028 %1:vrm4 = IMPLICIT_DEF29 %7:gpr = ADDI $x0, 830 %pt:vr = IMPLICIT_DEF31 %5:vr = PseudoVLE32_V_M1 %pt, killed %7:gpr, 0, 5, 032 %6:vrm4 = INSERT_SUBREG %1:vrm4, %5, %subreg.sub_vrm1_033 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype34 %pt2:vrm4 = IMPLICIT_DEF35 early-clobber %0:vrm4 = PseudoVRGATHER_VI_M4 %pt2, killed %6, 0, 0, 5/* e32 */, 0, implicit $vl, implicit $vtype36 %2:gpr = ADDI $x0, 037 PseudoVSE32_V_M4 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype38 %3:gpr = COPY $x039 $x10 = COPY %340 PseudoRET implicit $x1041 42...43 44---45name: test_M4_sub_vrm1_146body: |47 bb.0.entry:48 ; CHECK-LABEL: name: test_M4_sub_vrm1_149 ; CHECK: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF50 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 851 ; CHECK-NEXT: %pt:vr = IMPLICIT_DEF52 ; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */53 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm4 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M1_]], %subreg.sub_vrm1_154 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype55 ; CHECK-NEXT: %pt2:vrm4 = IMPLICIT_DEF56 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm2nov0 = INIT_UNDEF57 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm4 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm2_158 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vr = INIT_UNDEF59 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm4 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm1_060 ; CHECK-NEXT: early-clobber %6:vrm4 = PseudoVRGATHER_VI_M4 %pt2, killed [[INSERT_SUBREG2]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype61 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 062 ; CHECK-NEXT: PseudoVSE32_V_M4 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype63 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x064 ; CHECK-NEXT: $x10 = COPY [[COPY]]65 ; CHECK-NEXT: PseudoRET implicit $x1066 %1:vrm4 = IMPLICIT_DEF67 %7:gpr = ADDI $x0, 868 %pt:vr = IMPLICIT_DEF69 %5:vr = PseudoVLE32_V_M1 %pt, killed %7:gpr, 0, 5, 070 %6:vrm4 = INSERT_SUBREG %1:vrm4, %5, %subreg.sub_vrm1_171 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype72 %pt2:vrm4 = IMPLICIT_DEF73 early-clobber %0:vrm4 = PseudoVRGATHER_VI_M4 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype74 %2:gpr = ADDI $x0, 075 PseudoVSE32_V_M4 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype76 %3:gpr = COPY $x077 $x10 = COPY %378 PseudoRET implicit $x1079 80...81 82---83name: test_M4_sub_vrm1_284body: |85 bb.0.entry:86 ; CHECK-LABEL: name: test_M4_sub_vrm1_287 ; CHECK: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF88 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 889 ; CHECK-NEXT: %pt:vr = IMPLICIT_DEF90 ; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */91 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm4 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M1_]], %subreg.sub_vrm1_292 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype93 ; CHECK-NEXT: %pt2:vrm4 = IMPLICIT_DEF94 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm2 = INIT_UNDEF95 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm4 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm2_096 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrnov0 = INIT_UNDEF97 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm4 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm1_398 ; CHECK-NEXT: early-clobber %6:vrm4 = PseudoVRGATHER_VI_M4 %pt2, killed [[INSERT_SUBREG2]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype99 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0100 ; CHECK-NEXT: PseudoVSE32_V_M4 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype101 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0102 ; CHECK-NEXT: $x10 = COPY [[COPY]]103 ; CHECK-NEXT: PseudoRET implicit $x10104 %1:vrm4 = IMPLICIT_DEF105 %7:gpr = ADDI $x0, 8106 %pt:vr = IMPLICIT_DEF107 %5:vr = PseudoVLE32_V_M1 %pt, killed %7:gpr, 0, 5, 0108 %6:vrm4 = INSERT_SUBREG %1:vrm4, %5, %subreg.sub_vrm1_2109 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype110 %pt2:vrm4 = IMPLICIT_DEF111 early-clobber %0:vrm4 = PseudoVRGATHER_VI_M4 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype112 %2:gpr = ADDI $x0, 0113 PseudoVSE32_V_M4 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype114 %3:gpr = COPY $x0115 $x10 = COPY %3116 PseudoRET implicit $x10117 118...119 120---121name: test_M4_sub_vrm1_3122body: |123 bb.0.entry:124 ; CHECK-LABEL: name: test_M4_sub_vrm1_3125 ; CHECK: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF126 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8127 ; CHECK-NEXT: %pt:vr = IMPLICIT_DEF128 ; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */129 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm4 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M1_]], %subreg.sub_vrm1_3130 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype131 ; CHECK-NEXT: %pt2:vrm4 = IMPLICIT_DEF132 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm2 = INIT_UNDEF133 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm4 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm2_0134 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrnov0 = INIT_UNDEF135 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm4 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm1_2136 ; CHECK-NEXT: early-clobber %6:vrm4 = PseudoVRGATHER_VI_M4 %pt2, killed [[INSERT_SUBREG2]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype137 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0138 ; CHECK-NEXT: PseudoVSE32_V_M4 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype139 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0140 ; CHECK-NEXT: $x10 = COPY [[COPY]]141 ; CHECK-NEXT: PseudoRET implicit $x10142 %1:vrm4 = IMPLICIT_DEF143 %7:gpr = ADDI $x0, 8144 %pt:vr = IMPLICIT_DEF145 %5:vr = PseudoVLE32_V_M1 %pt, killed %7:gpr, 0, 5, 0146 %6:vrm4 = INSERT_SUBREG %1:vrm4, %5, %subreg.sub_vrm1_3147 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype148 %pt2:vrm4 = IMPLICIT_DEF149 early-clobber %0:vrm4 = PseudoVRGATHER_VI_M4 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype150 %2:gpr = ADDI $x0, 0151 PseudoVSE32_V_M4 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype152 %3:gpr = COPY $x0153 $x10 = COPY %3154 PseudoRET implicit $x10155 156...157 158---159name: test_M4_sub_vrm2_0160body: |161 bb.0.entry:162 ; CHECK-LABEL: name: test_M4_sub_vrm2_0163 ; CHECK: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF164 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8165 ; CHECK-NEXT: %pt:vrm2 = IMPLICIT_DEF166 ; CHECK-NEXT: [[PseudoVLE32_V_M2_:%[0-9]+]]:vrm2 = PseudoVLE32_V_M2 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */167 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm4 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M2_]], %subreg.sub_vrm2_0168 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype169 ; CHECK-NEXT: %pt2:vrm4 = IMPLICIT_DEF170 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm2nov0 = INIT_UNDEF171 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm4 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm2_1172 ; CHECK-NEXT: early-clobber %6:vrm4 = PseudoVRGATHER_VI_M4 %pt2, killed [[INSERT_SUBREG1]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype173 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0174 ; CHECK-NEXT: PseudoVSE32_V_M4 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype175 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0176 ; CHECK-NEXT: $x10 = COPY [[COPY]]177 ; CHECK-NEXT: PseudoRET implicit $x10178 %1:vrm4 = IMPLICIT_DEF179 %7:gpr = ADDI $x0, 8180 %pt:vrm2 = IMPLICIT_DEF181 %5:vrm2 = PseudoVLE32_V_M2 %pt, killed %7:gpr, 0, 5, 0182 %6:vrm4 = INSERT_SUBREG %1:vrm4, %5, %subreg.sub_vrm2_0183 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype184 %pt2:vrm4 = IMPLICIT_DEF185 early-clobber %0:vrm4 = PseudoVRGATHER_VI_M4 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype186 %2:gpr = ADDI $x0, 0187 PseudoVSE32_V_M4 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype188 %3:gpr = COPY $x0189 $x10 = COPY %3190 PseudoRET implicit $x10191 192...193 194---195name: test_M4_sub_vrm2_1196body: |197 bb.0.entry:198 ; CHECK-LABEL: name: test_M4_sub_vrm2_1199 ; CHECK: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF200 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8201 ; CHECK-NEXT: %pt:vrm2 = IMPLICIT_DEF202 ; CHECK-NEXT: [[PseudoVLE32_V_M2_:%[0-9]+]]:vrm2 = PseudoVLE32_V_M2 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */203 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm4 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M2_]], %subreg.sub_vrm2_1204 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype205 ; CHECK-NEXT: %pt2:vrm4 = IMPLICIT_DEF206 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm2 = INIT_UNDEF207 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm4 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm2_0208 ; CHECK-NEXT: early-clobber %6:vrm4 = PseudoVRGATHER_VI_M4 %pt2, killed [[INSERT_SUBREG1]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype209 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0210 ; CHECK-NEXT: PseudoVSE32_V_M4 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype211 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0212 ; CHECK-NEXT: $x10 = COPY [[COPY]]213 ; CHECK-NEXT: PseudoRET implicit $x10214 %1:vrm4 = IMPLICIT_DEF215 %7:gpr = ADDI $x0, 8216 %pt:vrm2 = IMPLICIT_DEF217 %5:vrm2 = PseudoVLE32_V_M2 %pt, killed %7:gpr, 0, 5, 0218 %6:vrm4 = INSERT_SUBREG %1:vrm4, %5, %subreg.sub_vrm2_1219 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype220 %pt2:vrm4 = IMPLICIT_DEF221 early-clobber %0:vrm4 = PseudoVRGATHER_VI_M4 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype222 %2:gpr = ADDI $x0, 0223 PseudoVSE32_V_M4 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype224 %3:gpr = COPY $x0225 $x10 = COPY %3226 PseudoRET implicit $x10227 228...229 230 231---232name: test_M8_sub_vrm1_0233body: |234 bb.0.entry:235 ; CHECK-LABEL: name: test_M8_sub_vrm1_0236 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF237 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8238 ; CHECK-NEXT: %pt:vr = IMPLICIT_DEF239 ; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */240 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M1_]], %subreg.sub_vrm1_0241 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype242 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF243 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4nov0 = INIT_UNDEF244 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_1245 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrm2nov0 = INIT_UNDEF246 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm2_1247 ; CHECK-NEXT: [[INIT_UNDEF2:%[0-9]+]]:vrnov0 = INIT_UNDEF248 ; CHECK-NEXT: [[INSERT_SUBREG3:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG2]], [[INIT_UNDEF2]], %subreg.sub_vrm1_1249 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG3]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype250 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0251 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype252 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0253 ; CHECK-NEXT: $x10 = COPY [[COPY]]254 ; CHECK-NEXT: PseudoRET implicit $x10255 %1:vrm8 = IMPLICIT_DEF256 %7:gpr = ADDI $x0, 8257 %pt:vr = IMPLICIT_DEF258 %5:vr = PseudoVLE32_V_M1 %pt, killed %7:gpr, 0, 5, 0259 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm1_0260 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype261 %pt2:vrm8 = IMPLICIT_DEF262 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype263 %2:gpr = ADDI $x0, 0264 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype265 %3:gpr = COPY $x0266 $x10 = COPY %3267 PseudoRET implicit $x10268 269...270 271---272name: test_M8_sub_vrm1_1273body: |274 bb.0.entry:275 ; CHECK-LABEL: name: test_M8_sub_vrm1_1276 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF277 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8278 ; CHECK-NEXT: %pt:vr = IMPLICIT_DEF279 ; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */280 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M1_]], %subreg.sub_vrm1_1281 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype282 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF283 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4nov0 = INIT_UNDEF284 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_1285 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrm2nov0 = INIT_UNDEF286 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm2_1287 ; CHECK-NEXT: [[INIT_UNDEF2:%[0-9]+]]:vr = INIT_UNDEF288 ; CHECK-NEXT: [[INSERT_SUBREG3:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG2]], [[INIT_UNDEF2]], %subreg.sub_vrm1_0289 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG3]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype290 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0291 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype292 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0293 ; CHECK-NEXT: $x10 = COPY [[COPY]]294 ; CHECK-NEXT: PseudoRET implicit $x10295 %1:vrm8 = IMPLICIT_DEF296 %7:gpr = ADDI $x0, 8297 %pt:vr = IMPLICIT_DEF298 %5:vr = PseudoVLE32_V_M1 %pt, killed %7:gpr, 0, 5, 0299 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm1_1300 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype301 %pt2:vrm8 = IMPLICIT_DEF302 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype303 %2:gpr = ADDI $x0, 0304 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype305 %3:gpr = COPY $x0306 $x10 = COPY %3307 PseudoRET implicit $x10308 309...310 311---312name: test_M8_sub_vrm1_2313body: |314 bb.0.entry:315 ; CHECK-LABEL: name: test_M8_sub_vrm1_2316 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF317 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8318 ; CHECK-NEXT: %pt:vr = IMPLICIT_DEF319 ; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */320 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M1_]], %subreg.sub_vrm1_2321 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype322 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF323 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4nov0 = INIT_UNDEF324 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_1325 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrm2 = INIT_UNDEF326 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm2_0327 ; CHECK-NEXT: [[INIT_UNDEF2:%[0-9]+]]:vrnov0 = INIT_UNDEF328 ; CHECK-NEXT: [[INSERT_SUBREG3:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG2]], [[INIT_UNDEF2]], %subreg.sub_vrm1_3329 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG3]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype330 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0331 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype332 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0333 ; CHECK-NEXT: $x10 = COPY [[COPY]]334 ; CHECK-NEXT: PseudoRET implicit $x10335 %1:vrm8 = IMPLICIT_DEF336 %7:gpr = ADDI $x0, 8337 %pt:vr = IMPLICIT_DEF338 %5:vr = PseudoVLE32_V_M1 %pt, killed %7:gpr, 0, 5, 0339 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm1_2340 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype341 %pt2:vrm8 = IMPLICIT_DEF342 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype343 %2:gpr = ADDI $x0, 0344 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype345 %3:gpr = COPY $x0346 $x10 = COPY %3347 PseudoRET implicit $x10348 349...350 351---352name: test_M8_sub_vrm1_3353body: |354 bb.0.entry:355 ; CHECK-LABEL: name: test_M8_sub_vrm1_3356 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF357 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8358 ; CHECK-NEXT: %pt:vr = IMPLICIT_DEF359 ; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */360 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M1_]], %subreg.sub_vrm1_3361 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype362 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF363 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4nov0 = INIT_UNDEF364 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_1365 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrm2 = INIT_UNDEF366 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm2_0367 ; CHECK-NEXT: [[INIT_UNDEF2:%[0-9]+]]:vrnov0 = INIT_UNDEF368 ; CHECK-NEXT: [[INSERT_SUBREG3:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG2]], [[INIT_UNDEF2]], %subreg.sub_vrm1_2369 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG3]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype370 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0371 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype372 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0373 ; CHECK-NEXT: $x10 = COPY [[COPY]]374 ; CHECK-NEXT: PseudoRET implicit $x10375 %1:vrm8 = IMPLICIT_DEF376 %7:gpr = ADDI $x0, 8377 %pt:vr = IMPLICIT_DEF378 %5:vr = PseudoVLE32_V_M1 %pt, killed %7:gpr, 0, 5, 0379 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm1_3380 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype381 %pt2:vrm8 = IMPLICIT_DEF382 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype383 %2:gpr = ADDI $x0, 0384 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype385 %3:gpr = COPY $x0386 $x10 = COPY %3387 PseudoRET implicit $x10388 389...390 391---392name: test_M8_sub_vrm1_4393body: |394 bb.0.entry:395 ; CHECK-LABEL: name: test_M8_sub_vrm1_4396 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF397 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8398 ; CHECK-NEXT: %pt:vr = IMPLICIT_DEF399 ; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */400 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M1_]], %subreg.sub_vrm1_4401 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype402 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF403 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4 = INIT_UNDEF404 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_0405 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrm2nov0 = INIT_UNDEF406 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm2_3407 ; CHECK-NEXT: [[INIT_UNDEF2:%[0-9]+]]:vrnov0 = INIT_UNDEF408 ; CHECK-NEXT: [[INSERT_SUBREG3:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG2]], [[INIT_UNDEF2]], %subreg.sub_vrm1_5409 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG3]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype410 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0411 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype412 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0413 ; CHECK-NEXT: $x10 = COPY [[COPY]]414 ; CHECK-NEXT: PseudoRET implicit $x10415 %1:vrm8 = IMPLICIT_DEF416 %7:gpr = ADDI $x0, 8417 %pt:vr = IMPLICIT_DEF418 %5:vr = PseudoVLE32_V_M1 %pt, killed %7:gpr, 0, 5, 0419 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm1_4420 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype421 %pt2:vrm8 = IMPLICIT_DEF422 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype423 %2:gpr = ADDI $x0, 0424 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype425 %3:gpr = COPY $x0426 $x10 = COPY %3427 PseudoRET implicit $x10428 429...430 431---432name: test_M8_sub_vrm1_5433body: |434 bb.0.entry:435 ; CHECK-LABEL: name: test_M8_sub_vrm1_5436 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF437 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8438 ; CHECK-NEXT: %pt:vr = IMPLICIT_DEF439 ; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */440 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M1_]], %subreg.sub_vrm1_5441 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype442 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF443 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4 = INIT_UNDEF444 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_0445 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrm2nov0 = INIT_UNDEF446 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm2_3447 ; CHECK-NEXT: [[INIT_UNDEF2:%[0-9]+]]:vrnov0 = INIT_UNDEF448 ; CHECK-NEXT: [[INSERT_SUBREG3:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG2]], [[INIT_UNDEF2]], %subreg.sub_vrm1_4449 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG3]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype450 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0451 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype452 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0453 ; CHECK-NEXT: $x10 = COPY [[COPY]]454 ; CHECK-NEXT: PseudoRET implicit $x10455 %1:vrm8 = IMPLICIT_DEF456 %7:gpr = ADDI $x0, 8457 %pt:vr = IMPLICIT_DEF458 %5:vr = PseudoVLE32_V_M1 %pt, killed %7:gpr, 0, 5, 0459 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm1_5460 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype461 %pt2:vrm8 = IMPLICIT_DEF462 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype463 %2:gpr = ADDI $x0, 0464 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype465 %3:gpr = COPY $x0466 $x10 = COPY %3467 PseudoRET implicit $x10468 469...470 471---472name: test_M8_sub_vrm1_6473body: |474 bb.0.entry:475 ; CHECK-LABEL: name: test_M8_sub_vrm1_6476 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF477 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8478 ; CHECK-NEXT: %pt:vr = IMPLICIT_DEF479 ; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */480 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M1_]], %subreg.sub_vrm1_6481 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype482 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF483 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4 = INIT_UNDEF484 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_0485 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrm2nov0 = INIT_UNDEF486 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm2_2487 ; CHECK-NEXT: [[INIT_UNDEF2:%[0-9]+]]:vrnov0 = INIT_UNDEF488 ; CHECK-NEXT: [[INSERT_SUBREG3:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG2]], [[INIT_UNDEF2]], %subreg.sub_vrm1_7489 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG3]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype490 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0491 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype492 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0493 ; CHECK-NEXT: $x10 = COPY [[COPY]]494 ; CHECK-NEXT: PseudoRET implicit $x10495 %1:vrm8 = IMPLICIT_DEF496 %7:gpr = ADDI $x0, 8497 %pt:vr = IMPLICIT_DEF498 %5:vr = PseudoVLE32_V_M1 %pt, killed %7:gpr, 0, 5, 0499 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm1_6500 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype501 %pt2:vrm8 = IMPLICIT_DEF502 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype503 %2:gpr = ADDI $x0, 0504 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype505 %3:gpr = COPY $x0506 $x10 = COPY %3507 PseudoRET implicit $x10508 509...510 511---512name: test_M8_sub_vrm1_7513body: |514 bb.0.entry:515 ; CHECK-LABEL: name: test_M8_sub_vrm1_7516 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF517 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8518 ; CHECK-NEXT: %pt:vr = IMPLICIT_DEF519 ; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */520 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M1_]], %subreg.sub_vrm1_7521 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype522 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF523 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4 = INIT_UNDEF524 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_0525 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrm2nov0 = INIT_UNDEF526 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm2_2527 ; CHECK-NEXT: [[INIT_UNDEF2:%[0-9]+]]:vrnov0 = INIT_UNDEF528 ; CHECK-NEXT: [[INSERT_SUBREG3:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG2]], [[INIT_UNDEF2]], %subreg.sub_vrm1_6529 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG3]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype530 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0531 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype532 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0533 ; CHECK-NEXT: $x10 = COPY [[COPY]]534 ; CHECK-NEXT: PseudoRET implicit $x10535 %1:vrm8 = IMPLICIT_DEF536 %7:gpr = ADDI $x0, 8537 %pt:vr = IMPLICIT_DEF538 %5:vr = PseudoVLE32_V_M1 %pt, killed %7:gpr, 0, 5, 0539 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm1_7540 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype541 %pt2:vrm8 = IMPLICIT_DEF542 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype543 %2:gpr = ADDI $x0, 0544 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype545 %3:gpr = COPY $x0546 $x10 = COPY %3547 PseudoRET implicit $x10548 549...550 551---552name: test_M8_sub_vrm2_0553body: |554 bb.0.entry:555 ; CHECK-LABEL: name: test_M8_sub_vrm2_0556 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF557 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8558 ; CHECK-NEXT: %pt:vrm2 = IMPLICIT_DEF559 ; CHECK-NEXT: [[PseudoVLE32_V_M2_:%[0-9]+]]:vrm2 = PseudoVLE32_V_M2 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */560 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M2_]], %subreg.sub_vrm2_0561 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype562 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF563 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4nov0 = INIT_UNDEF564 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_1565 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrm2nov0 = INIT_UNDEF566 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm2_1567 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG2]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype568 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0569 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype570 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0571 ; CHECK-NEXT: $x10 = COPY [[COPY]]572 ; CHECK-NEXT: PseudoRET implicit $x10573 %1:vrm8 = IMPLICIT_DEF574 %7:gpr = ADDI $x0, 8575 %pt:vrm2 = IMPLICIT_DEF576 %5:vrm2 = PseudoVLE32_V_M2 %pt, killed %7:gpr, 0, 5, 0577 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm2_0578 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype579 %pt2:vrm8 = IMPLICIT_DEF580 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype581 %2:gpr = ADDI $x0, 0582 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype583 %3:gpr = COPY $x0584 $x10 = COPY %3585 PseudoRET implicit $x10586 587...588 589---590name: test_M8_sub_vrm2_1591body: |592 bb.0.entry:593 ; CHECK-LABEL: name: test_M8_sub_vrm2_1594 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF595 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8596 ; CHECK-NEXT: %pt:vrm2 = IMPLICIT_DEF597 ; CHECK-NEXT: [[PseudoVLE32_V_M2_:%[0-9]+]]:vrm2 = PseudoVLE32_V_M2 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */598 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M2_]], %subreg.sub_vrm2_1599 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype600 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF601 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4nov0 = INIT_UNDEF602 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_1603 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrm2 = INIT_UNDEF604 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm2_0605 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG2]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype606 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0607 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype608 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0609 ; CHECK-NEXT: $x10 = COPY [[COPY]]610 ; CHECK-NEXT: PseudoRET implicit $x10611 %1:vrm8 = IMPLICIT_DEF612 %7:gpr = ADDI $x0, 8613 %pt:vrm2 = IMPLICIT_DEF614 %5:vrm2 = PseudoVLE32_V_M2 %pt, killed %7:gpr, 0, 5, 0615 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm2_1616 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype617 %pt2:vrm8 = IMPLICIT_DEF618 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype619 %2:gpr = ADDI $x0, 0620 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype621 %3:gpr = COPY $x0622 $x10 = COPY %3623 PseudoRET implicit $x10624 625...626 627---628name: test_M8_sub_vrm2_2629body: |630 bb.0.entry:631 ; CHECK-LABEL: name: test_M8_sub_vrm2_2632 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF633 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8634 ; CHECK-NEXT: %pt:vrm2 = IMPLICIT_DEF635 ; CHECK-NEXT: [[PseudoVLE32_V_M2_:%[0-9]+]]:vrm2 = PseudoVLE32_V_M2 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */636 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M2_]], %subreg.sub_vrm2_2637 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype638 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF639 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4 = INIT_UNDEF640 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_0641 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrm2nov0 = INIT_UNDEF642 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm2_3643 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG2]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype644 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0645 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype646 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0647 ; CHECK-NEXT: $x10 = COPY [[COPY]]648 ; CHECK-NEXT: PseudoRET implicit $x10649 %1:vrm8 = IMPLICIT_DEF650 %7:gpr = ADDI $x0, 8651 %pt:vrm2 = IMPLICIT_DEF652 %5:vrm2 = PseudoVLE32_V_M2 %pt, killed %7:gpr, 0, 5, 0653 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm2_2654 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype655 %pt2:vrm8 = IMPLICIT_DEF656 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype657 %2:gpr = ADDI $x0, 0658 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype659 %3:gpr = COPY $x0660 $x10 = COPY %3661 PseudoRET implicit $x10662 663...664 665---666name: test_M8_sub_vrm2_3667body: |668 bb.0.entry:669 ; CHECK-LABEL: name: test_M8_sub_vrm2_3670 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF671 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8672 ; CHECK-NEXT: %pt:vrm2 = IMPLICIT_DEF673 ; CHECK-NEXT: [[PseudoVLE32_V_M2_:%[0-9]+]]:vrm2 = PseudoVLE32_V_M2 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */674 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M2_]], %subreg.sub_vrm2_3675 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype676 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF677 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4 = INIT_UNDEF678 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_0679 ; CHECK-NEXT: [[INIT_UNDEF1:%[0-9]+]]:vrm2nov0 = INIT_UNDEF680 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG1]], [[INIT_UNDEF1]], %subreg.sub_vrm2_2681 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG2]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype682 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0683 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype684 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0685 ; CHECK-NEXT: $x10 = COPY [[COPY]]686 ; CHECK-NEXT: PseudoRET implicit $x10687 %1:vrm8 = IMPLICIT_DEF688 %7:gpr = ADDI $x0, 8689 %pt:vrm2 = IMPLICIT_DEF690 %5:vrm2 = PseudoVLE32_V_M2 %pt, killed %7:gpr, 0, 5, 0691 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm2_3692 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype693 %pt2:vrm8 = IMPLICIT_DEF694 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype695 %2:gpr = ADDI $x0, 0696 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype697 %3:gpr = COPY $x0698 $x10 = COPY %3699 PseudoRET implicit $x10700 701...702 703---704name: test_M8_sub_vrm4_0705body: |706 bb.0.entry:707 ; CHECK-LABEL: name: test_M8_sub_vrm4_0708 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF709 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8710 ; CHECK-NEXT: %pt:vrm4 = IMPLICIT_DEF711 ; CHECK-NEXT: [[PseudoVLE32_V_M4_:%[0-9]+]]:vrm4 = PseudoVLE32_V_M4 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */712 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M4_]], %subreg.sub_vrm4_0713 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype714 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF715 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4nov0 = INIT_UNDEF716 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_1717 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG1]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype718 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0719 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype720 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0721 ; CHECK-NEXT: $x10 = COPY [[COPY]]722 ; CHECK-NEXT: PseudoRET implicit $x10723 %1:vrm8 = IMPLICIT_DEF724 %7:gpr = ADDI $x0, 8725 %pt:vrm4 = IMPLICIT_DEF726 %5:vrm4 = PseudoVLE32_V_M4 %pt, killed %7:gpr, 0, 5, 0727 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm4_0728 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype729 %pt2:vrm8 = IMPLICIT_DEF730 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype731 %2:gpr = ADDI $x0, 0732 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype733 %3:gpr = COPY $x0734 $x10 = COPY %3735 PseudoRET implicit $x10736 737...738 739---740name: test_M8_sub_vrm4_1741body: |742 bb.0.entry:743 ; CHECK-LABEL: name: test_M8_sub_vrm4_1744 ; CHECK: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF745 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 8746 ; CHECK-NEXT: %pt:vrm4 = IMPLICIT_DEF747 ; CHECK-NEXT: [[PseudoVLE32_V_M4_:%[0-9]+]]:vrm4 = PseudoVLE32_V_M4 %pt, killed [[ADDI]], 0, 5 /* e32 */, 0 /* tu, mu */748 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vrm8 = INSERT_SUBREG [[DEF]], [[PseudoVLE32_V_M4_]], %subreg.sub_vrm4_1749 ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype750 ; CHECK-NEXT: %pt2:vrm8 = IMPLICIT_DEF751 ; CHECK-NEXT: [[INIT_UNDEF:%[0-9]+]]:vrm4 = INIT_UNDEF752 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:vrm8 = INSERT_SUBREG [[INSERT_SUBREG]], [[INIT_UNDEF]], %subreg.sub_vrm4_0753 ; CHECK-NEXT: early-clobber %6:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed [[INSERT_SUBREG1]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype754 ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 0755 ; CHECK-NEXT: PseudoVSE32_V_M8 killed %6, killed [[ADDI1]], 0, 5 /* e32 */, implicit $vl, implicit $vtype756 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0757 ; CHECK-NEXT: $x10 = COPY [[COPY]]758 ; CHECK-NEXT: PseudoRET implicit $x10759 %1:vrm8 = IMPLICIT_DEF760 %7:gpr = ADDI $x0, 8761 %pt:vrm4 = IMPLICIT_DEF762 %5:vrm4 = PseudoVLE32_V_M4 %pt, killed %7:gpr, 0, 5, 0763 %6:vrm8 = INSERT_SUBREG %1:vrm8, %5, %subreg.sub_vrm4_1764 dead $x0 = PseudoVSETIVLI 0, 210 /* e32, m4, ta, ma */, implicit-def $vl, implicit-def $vtype765 %pt2:vrm8 = IMPLICIT_DEF766 early-clobber %0:vrm8 = PseudoVRGATHER_VI_M8 %pt2, killed %6, 0, 0, 5 /* e32 */, 0, implicit $vl, implicit $vtype767 %2:gpr = ADDI $x0, 0768 PseudoVSE32_V_M8 killed %0, killed %2, 0, 5 /* e32 */, implicit $vl, implicit $vtype769 %3:gpr = COPY $x0770 $x10 = COPY %3771 PseudoRET implicit $x10772 773...774