355 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s3 4define <vscale x 1 x i8> @umulo_nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %y) {5; CHECK-LABEL: umulo_nxv1i8:6; CHECK: # %bb.0:7; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma8; CHECK-NEXT: vmulhu.vv v10, v8, v99; CHECK-NEXT: vmsne.vi v0, v10, 010; CHECK-NEXT: vmul.vv v8, v8, v911; CHECK-NEXT: vmerge.vim v8, v8, 0, v012; CHECK-NEXT: ret13 %a = call { <vscale x 1 x i8>, <vscale x 1 x i1> } @llvm.umul.with.overflow.nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %y)14 %b = extractvalue { <vscale x 1 x i8>, <vscale x 1 x i1> } %a, 015 %c = extractvalue { <vscale x 1 x i8>, <vscale x 1 x i1> } %a, 116 %d = select <vscale x 1 x i1> %c, <vscale x 1 x i8> zeroinitializer, <vscale x 1 x i8> %b17 ret <vscale x 1 x i8> %d18}19 20define <vscale x 2 x i8> @umulo_nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %y) {21; CHECK-LABEL: umulo_nxv2i8:22; CHECK: # %bb.0:23; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma24; CHECK-NEXT: vmulhu.vv v10, v8, v925; CHECK-NEXT: vmsne.vi v0, v10, 026; CHECK-NEXT: vmul.vv v8, v8, v927; CHECK-NEXT: vmerge.vim v8, v8, 0, v028; CHECK-NEXT: ret29 %a = call { <vscale x 2 x i8>, <vscale x 2 x i1> } @llvm.umul.with.overflow.nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %y)30 %b = extractvalue { <vscale x 2 x i8>, <vscale x 2 x i1> } %a, 031 %c = extractvalue { <vscale x 2 x i8>, <vscale x 2 x i1> } %a, 132 %d = select <vscale x 2 x i1> %c, <vscale x 2 x i8> zeroinitializer, <vscale x 2 x i8> %b33 ret <vscale x 2 x i8> %d34}35 36define <vscale x 4 x i8> @umulo_nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %y) {37; CHECK-LABEL: umulo_nxv4i8:38; CHECK: # %bb.0:39; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma40; CHECK-NEXT: vmulhu.vv v10, v8, v941; CHECK-NEXT: vmsne.vi v0, v10, 042; CHECK-NEXT: vmul.vv v8, v8, v943; CHECK-NEXT: vmerge.vim v8, v8, 0, v044; CHECK-NEXT: ret45 %a = call { <vscale x 4 x i8>, <vscale x 4 x i1> } @llvm.umul.with.overflow.nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %y)46 %b = extractvalue { <vscale x 4 x i8>, <vscale x 4 x i1> } %a, 047 %c = extractvalue { <vscale x 4 x i8>, <vscale x 4 x i1> } %a, 148 %d = select <vscale x 4 x i1> %c, <vscale x 4 x i8> zeroinitializer, <vscale x 4 x i8> %b49 ret <vscale x 4 x i8> %d50}51 52define <vscale x 8 x i8> @umulo_nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %y) {53; CHECK-LABEL: umulo_nxv8i8:54; CHECK: # %bb.0:55; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma56; CHECK-NEXT: vmulhu.vv v10, v8, v957; CHECK-NEXT: vmsne.vi v0, v10, 058; CHECK-NEXT: vmul.vv v8, v8, v959; CHECK-NEXT: vmerge.vim v8, v8, 0, v060; CHECK-NEXT: ret61 %a = call { <vscale x 8 x i8>, <vscale x 8 x i1> } @llvm.umul.with.overflow.nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %y)62 %b = extractvalue { <vscale x 8 x i8>, <vscale x 8 x i1> } %a, 063 %c = extractvalue { <vscale x 8 x i8>, <vscale x 8 x i1> } %a, 164 %d = select <vscale x 8 x i1> %c, <vscale x 8 x i8> zeroinitializer, <vscale x 8 x i8> %b65 ret <vscale x 8 x i8> %d66}67 68define <vscale x 16 x i8> @umulo_nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %y) {69; CHECK-LABEL: umulo_nxv16i8:70; CHECK: # %bb.0:71; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma72; CHECK-NEXT: vmulhu.vv v12, v8, v1073; CHECK-NEXT: vmsne.vi v0, v12, 074; CHECK-NEXT: vmul.vv v8, v8, v1075; CHECK-NEXT: vmerge.vim v8, v8, 0, v076; CHECK-NEXT: ret77 %a = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.umul.with.overflow.nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %y)78 %b = extractvalue { <vscale x 16 x i8>, <vscale x 16 x i1> } %a, 079 %c = extractvalue { <vscale x 16 x i8>, <vscale x 16 x i1> } %a, 180 %d = select <vscale x 16 x i1> %c, <vscale x 16 x i8> zeroinitializer, <vscale x 16 x i8> %b81 ret <vscale x 16 x i8> %d82}83 84define <vscale x 32 x i8> @umulo_nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %y) {85; CHECK-LABEL: umulo_nxv32i8:86; CHECK: # %bb.0:87; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma88; CHECK-NEXT: vmulhu.vv v16, v8, v1289; CHECK-NEXT: vmsne.vi v0, v16, 090; CHECK-NEXT: vmul.vv v8, v8, v1291; CHECK-NEXT: vmerge.vim v8, v8, 0, v092; CHECK-NEXT: ret93 %a = call { <vscale x 32 x i8>, <vscale x 32 x i1> } @llvm.umul.with.overflow.nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %y)94 %b = extractvalue { <vscale x 32 x i8>, <vscale x 32 x i1> } %a, 095 %c = extractvalue { <vscale x 32 x i8>, <vscale x 32 x i1> } %a, 196 %d = select <vscale x 32 x i1> %c, <vscale x 32 x i8> zeroinitializer, <vscale x 32 x i8> %b97 ret <vscale x 32 x i8> %d98}99 100define <vscale x 64 x i8> @umulo_nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %y) {101; CHECK-LABEL: umulo_nxv64i8:102; CHECK: # %bb.0:103; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma104; CHECK-NEXT: vmulhu.vv v24, v8, v16105; CHECK-NEXT: vmsne.vi v0, v24, 0106; CHECK-NEXT: vmul.vv v8, v8, v16107; CHECK-NEXT: vmerge.vim v8, v8, 0, v0108; CHECK-NEXT: ret109 %a = call { <vscale x 64 x i8>, <vscale x 64 x i1> } @llvm.umul.with.overflow.nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %y)110 %b = extractvalue { <vscale x 64 x i8>, <vscale x 64 x i1> } %a, 0111 %c = extractvalue { <vscale x 64 x i8>, <vscale x 64 x i1> } %a, 1112 %d = select <vscale x 64 x i1> %c, <vscale x 64 x i8> zeroinitializer, <vscale x 64 x i8> %b113 ret <vscale x 64 x i8> %d114}115 116define <vscale x 1 x i16> @umulo_nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %y) {117; CHECK-LABEL: umulo_nxv1i16:118; CHECK: # %bb.0:119; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma120; CHECK-NEXT: vmulhu.vv v10, v8, v9121; CHECK-NEXT: vmsne.vi v0, v10, 0122; CHECK-NEXT: vmul.vv v8, v8, v9123; CHECK-NEXT: vmerge.vim v8, v8, 0, v0124; CHECK-NEXT: ret125 %a = call { <vscale x 1 x i16>, <vscale x 1 x i1> } @llvm.umul.with.overflow.nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %y)126 %b = extractvalue { <vscale x 1 x i16>, <vscale x 1 x i1> } %a, 0127 %c = extractvalue { <vscale x 1 x i16>, <vscale x 1 x i1> } %a, 1128 %d = select <vscale x 1 x i1> %c, <vscale x 1 x i16> zeroinitializer, <vscale x 1 x i16> %b129 ret <vscale x 1 x i16> %d130}131 132define <vscale x 2 x i16> @umulo_nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %y) {133; CHECK-LABEL: umulo_nxv2i16:134; CHECK: # %bb.0:135; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma136; CHECK-NEXT: vmulhu.vv v10, v8, v9137; CHECK-NEXT: vmsne.vi v0, v10, 0138; CHECK-NEXT: vmul.vv v8, v8, v9139; CHECK-NEXT: vmerge.vim v8, v8, 0, v0140; CHECK-NEXT: ret141 %a = call { <vscale x 2 x i16>, <vscale x 2 x i1> } @llvm.umul.with.overflow.nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %y)142 %b = extractvalue { <vscale x 2 x i16>, <vscale x 2 x i1> } %a, 0143 %c = extractvalue { <vscale x 2 x i16>, <vscale x 2 x i1> } %a, 1144 %d = select <vscale x 2 x i1> %c, <vscale x 2 x i16> zeroinitializer, <vscale x 2 x i16> %b145 ret <vscale x 2 x i16> %d146}147 148define <vscale x 4 x i16> @umulo_nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %y) {149; CHECK-LABEL: umulo_nxv4i16:150; CHECK: # %bb.0:151; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma152; CHECK-NEXT: vmulhu.vv v10, v8, v9153; CHECK-NEXT: vmsne.vi v0, v10, 0154; CHECK-NEXT: vmul.vv v8, v8, v9155; CHECK-NEXT: vmerge.vim v8, v8, 0, v0156; CHECK-NEXT: ret157 %a = call { <vscale x 4 x i16>, <vscale x 4 x i1> } @llvm.umul.with.overflow.nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %y)158 %b = extractvalue { <vscale x 4 x i16>, <vscale x 4 x i1> } %a, 0159 %c = extractvalue { <vscale x 4 x i16>, <vscale x 4 x i1> } %a, 1160 %d = select <vscale x 4 x i1> %c, <vscale x 4 x i16> zeroinitializer, <vscale x 4 x i16> %b161 ret <vscale x 4 x i16> %d162}163 164define <vscale x 8 x i16> @umulo_nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %y) {165; CHECK-LABEL: umulo_nxv8i16:166; CHECK: # %bb.0:167; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma168; CHECK-NEXT: vmulhu.vv v12, v8, v10169; CHECK-NEXT: vmsne.vi v0, v12, 0170; CHECK-NEXT: vmul.vv v8, v8, v10171; CHECK-NEXT: vmerge.vim v8, v8, 0, v0172; CHECK-NEXT: ret173 %a = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.umul.with.overflow.nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %y)174 %b = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i1> } %a, 0175 %c = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i1> } %a, 1176 %d = select <vscale x 8 x i1> %c, <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i16> %b177 ret <vscale x 8 x i16> %d178}179 180define <vscale x 16 x i16> @umulo_nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %y) {181; CHECK-LABEL: umulo_nxv16i16:182; CHECK: # %bb.0:183; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma184; CHECK-NEXT: vmulhu.vv v16, v8, v12185; CHECK-NEXT: vmsne.vi v0, v16, 0186; CHECK-NEXT: vmul.vv v8, v8, v12187; CHECK-NEXT: vmerge.vim v8, v8, 0, v0188; CHECK-NEXT: ret189 %a = call { <vscale x 16 x i16>, <vscale x 16 x i1> } @llvm.umul.with.overflow.nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %y)190 %b = extractvalue { <vscale x 16 x i16>, <vscale x 16 x i1> } %a, 0191 %c = extractvalue { <vscale x 16 x i16>, <vscale x 16 x i1> } %a, 1192 %d = select <vscale x 16 x i1> %c, <vscale x 16 x i16> zeroinitializer, <vscale x 16 x i16> %b193 ret <vscale x 16 x i16> %d194}195 196define <vscale x 32 x i16> @umulo_nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %y) {197; CHECK-LABEL: umulo_nxv32i16:198; CHECK: # %bb.0:199; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma200; CHECK-NEXT: vmulhu.vv v24, v8, v16201; CHECK-NEXT: vmsne.vi v0, v24, 0202; CHECK-NEXT: vmul.vv v8, v8, v16203; CHECK-NEXT: vmerge.vim v8, v8, 0, v0204; CHECK-NEXT: ret205 %a = call { <vscale x 32 x i16>, <vscale x 32 x i1> } @llvm.umul.with.overflow.nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %y)206 %b = extractvalue { <vscale x 32 x i16>, <vscale x 32 x i1> } %a, 0207 %c = extractvalue { <vscale x 32 x i16>, <vscale x 32 x i1> } %a, 1208 %d = select <vscale x 32 x i1> %c, <vscale x 32 x i16> zeroinitializer, <vscale x 32 x i16> %b209 ret <vscale x 32 x i16> %d210}211 212define <vscale x 1 x i32> @umulo_nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %y) {213; CHECK-LABEL: umulo_nxv1i32:214; CHECK: # %bb.0:215; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma216; CHECK-NEXT: vmulhu.vv v10, v8, v9217; CHECK-NEXT: vmsne.vi v0, v10, 0218; CHECK-NEXT: vmul.vv v8, v8, v9219; CHECK-NEXT: vmerge.vim v8, v8, 0, v0220; CHECK-NEXT: ret221 %a = call { <vscale x 1 x i32>, <vscale x 1 x i1> } @llvm.umul.with.overflow.nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %y)222 %b = extractvalue { <vscale x 1 x i32>, <vscale x 1 x i1> } %a, 0223 %c = extractvalue { <vscale x 1 x i32>, <vscale x 1 x i1> } %a, 1224 %d = select <vscale x 1 x i1> %c, <vscale x 1 x i32> zeroinitializer, <vscale x 1 x i32> %b225 ret <vscale x 1 x i32> %d226}227 228define <vscale x 2 x i32> @umulo_nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y) {229; CHECK-LABEL: umulo_nxv2i32:230; CHECK: # %bb.0:231; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma232; CHECK-NEXT: vmulhu.vv v10, v8, v9233; CHECK-NEXT: vmsne.vi v0, v10, 0234; CHECK-NEXT: vmul.vv v8, v8, v9235; CHECK-NEXT: vmerge.vim v8, v8, 0, v0236; CHECK-NEXT: ret237 %a = call { <vscale x 2 x i32>, <vscale x 2 x i1> } @llvm.umul.with.overflow.nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y)238 %b = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i1> } %a, 0239 %c = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i1> } %a, 1240 %d = select <vscale x 2 x i1> %c, <vscale x 2 x i32> zeroinitializer, <vscale x 2 x i32> %b241 ret <vscale x 2 x i32> %d242}243 244define <vscale x 4 x i32> @umulo_nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %y) {245; CHECK-LABEL: umulo_nxv4i32:246; CHECK: # %bb.0:247; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma248; CHECK-NEXT: vmulhu.vv v12, v8, v10249; CHECK-NEXT: vmsne.vi v0, v12, 0250; CHECK-NEXT: vmul.vv v8, v8, v10251; CHECK-NEXT: vmerge.vim v8, v8, 0, v0252; CHECK-NEXT: ret253 %a = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.umul.with.overflow.nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %y)254 %b = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i1> } %a, 0255 %c = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i1> } %a, 1256 %d = select <vscale x 4 x i1> %c, <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> %b257 ret <vscale x 4 x i32> %d258}259 260define <vscale x 8 x i32> @umulo_nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %y) {261; CHECK-LABEL: umulo_nxv8i32:262; CHECK: # %bb.0:263; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma264; CHECK-NEXT: vmulhu.vv v16, v8, v12265; CHECK-NEXT: vmsne.vi v0, v16, 0266; CHECK-NEXT: vmul.vv v8, v8, v12267; CHECK-NEXT: vmerge.vim v8, v8, 0, v0268; CHECK-NEXT: ret269 %a = call { <vscale x 8 x i32>, <vscale x 8 x i1> } @llvm.umul.with.overflow.nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %y)270 %b = extractvalue { <vscale x 8 x i32>, <vscale x 8 x i1> } %a, 0271 %c = extractvalue { <vscale x 8 x i32>, <vscale x 8 x i1> } %a, 1272 %d = select <vscale x 8 x i1> %c, <vscale x 8 x i32> zeroinitializer, <vscale x 8 x i32> %b273 ret <vscale x 8 x i32> %d274}275 276define <vscale x 16 x i32> @umulo_nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %y) {277; CHECK-LABEL: umulo_nxv16i32:278; CHECK: # %bb.0:279; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma280; CHECK-NEXT: vmulhu.vv v24, v8, v16281; CHECK-NEXT: vmsne.vi v0, v24, 0282; CHECK-NEXT: vmul.vv v8, v8, v16283; CHECK-NEXT: vmerge.vim v8, v8, 0, v0284; CHECK-NEXT: ret285 %a = call { <vscale x 16 x i32>, <vscale x 16 x i1> } @llvm.umul.with.overflow.nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %y)286 %b = extractvalue { <vscale x 16 x i32>, <vscale x 16 x i1> } %a, 0287 %c = extractvalue { <vscale x 16 x i32>, <vscale x 16 x i1> } %a, 1288 %d = select <vscale x 16 x i1> %c, <vscale x 16 x i32> zeroinitializer, <vscale x 16 x i32> %b289 ret <vscale x 16 x i32> %d290}291 292define <vscale x 1 x i64> @umulo_nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %y) {293; CHECK-LABEL: umulo_nxv1i64:294; CHECK: # %bb.0:295; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma296; CHECK-NEXT: vmulhu.vv v10, v8, v9297; CHECK-NEXT: vmsne.vi v0, v10, 0298; CHECK-NEXT: vmul.vv v8, v8, v9299; CHECK-NEXT: vmerge.vim v8, v8, 0, v0300; CHECK-NEXT: ret301 %a = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.umul.with.overflow.nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %y)302 %b = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i1> } %a, 0303 %c = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i1> } %a, 1304 %d = select <vscale x 1 x i1> %c, <vscale x 1 x i64> zeroinitializer, <vscale x 1 x i64> %b305 ret <vscale x 1 x i64> %d306}307 308define <vscale x 2 x i64> @umulo_nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y) {309; CHECK-LABEL: umulo_nxv2i64:310; CHECK: # %bb.0:311; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma312; CHECK-NEXT: vmulhu.vv v12, v8, v10313; CHECK-NEXT: vmsne.vi v0, v12, 0314; CHECK-NEXT: vmul.vv v8, v8, v10315; CHECK-NEXT: vmerge.vim v8, v8, 0, v0316; CHECK-NEXT: ret317 %a = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.umul.with.overflow.nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y)318 %b = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i1> } %a, 0319 %c = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i1> } %a, 1320 %d = select <vscale x 2 x i1> %c, <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i64> %b321 ret <vscale x 2 x i64> %d322}323 324define <vscale x 4 x i64> @umulo_nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %y) {325; CHECK-LABEL: umulo_nxv4i64:326; CHECK: # %bb.0:327; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma328; CHECK-NEXT: vmulhu.vv v16, v8, v12329; CHECK-NEXT: vmsne.vi v0, v16, 0330; CHECK-NEXT: vmul.vv v8, v8, v12331; CHECK-NEXT: vmerge.vim v8, v8, 0, v0332; CHECK-NEXT: ret333 %a = call { <vscale x 4 x i64>, <vscale x 4 x i1> } @llvm.umul.with.overflow.nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %y)334 %b = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i1> } %a, 0335 %c = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i1> } %a, 1336 %d = select <vscale x 4 x i1> %c, <vscale x 4 x i64> zeroinitializer, <vscale x 4 x i64> %b337 ret <vscale x 4 x i64> %d338}339 340define <vscale x 8 x i64> @umulo_nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %y) {341; CHECK-LABEL: umulo_nxv8i64:342; CHECK: # %bb.0:343; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma344; CHECK-NEXT: vmulhu.vv v24, v8, v16345; CHECK-NEXT: vmsne.vi v0, v24, 0346; CHECK-NEXT: vmul.vv v8, v8, v16347; CHECK-NEXT: vmerge.vim v8, v8, 0, v0348; CHECK-NEXT: ret349 %a = call { <vscale x 8 x i64>, <vscale x 8 x i1> } @llvm.umul.with.overflow.nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %y)350 %b = extractvalue { <vscale x 8 x i64>, <vscale x 8 x i1> } %a, 0351 %c = extractvalue { <vscale x 8 x i64>, <vscale x 8 x i1> } %a, 1352 %d = select <vscale x 8 x i1> %c, <vscale x 8 x i64> zeroinitializer, <vscale x 8 x i64> %b353 ret <vscale x 8 x i64> %d354}355