1614 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <vscale x 8 x i7> @vand_vx_nxv8i7(<vscale x 8 x i7> %a, i7 signext %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {8; CHECK-LABEL: vand_vx_nxv8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma11; CHECK-NEXT: vand.vx v8, v8, a0, v0.t12; CHECK-NEXT: ret13 %elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 014 %vb = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer15 %v = call <vscale x 8 x i7> @llvm.vp.and.nxv8i7(<vscale x 8 x i7> %a, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %mask, i32 %evl)16 ret <vscale x 8 x i7> %v17}18 19define <vscale x 1 x i8> @vand_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {20; CHECK-LABEL: vand_vv_nxv1i8:21; CHECK: # %bb.0:22; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma23; CHECK-NEXT: vand.vv v8, v8, v9, v0.t24; CHECK-NEXT: ret25 %v = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 %evl)26 ret <vscale x 1 x i8> %v27}28 29define <vscale x 1 x i8> @vand_vv_nxv1i8_unmasked(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, i32 zeroext %evl) {30; CHECK-LABEL: vand_vv_nxv1i8_unmasked:31; CHECK: # %bb.0:32; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma33; CHECK-NEXT: vand.vv v8, v8, v934; CHECK-NEXT: ret35 %v = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)36 ret <vscale x 1 x i8> %v37}38 39define <vscale x 1 x i8> @vand_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {40; CHECK-LABEL: vand_vx_nxv1i8:41; CHECK: # %bb.0:42; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma43; CHECK-NEXT: vand.vx v8, v8, a0, v0.t44; CHECK-NEXT: ret45 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 046 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer47 %v = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 %evl)48 ret <vscale x 1 x i8> %v49}50 51define <vscale x 1 x i8> @vand_vx_nxv1i8_unmasked(<vscale x 1 x i8> %va, i8 %b, i32 zeroext %evl) {52; CHECK-LABEL: vand_vx_nxv1i8_unmasked:53; CHECK: # %bb.0:54; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma55; CHECK-NEXT: vand.vx v8, v8, a056; CHECK-NEXT: ret57 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 058 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer59 %v = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)60 ret <vscale x 1 x i8> %v61}62 63define <vscale x 1 x i8> @vand_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {64; CHECK-LABEL: vand_vi_nxv1i8:65; CHECK: # %bb.0:66; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma67; CHECK-NEXT: vand.vi v8, v8, 4, v0.t68; CHECK-NEXT: ret69 %v = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), <vscale x 1 x i1> %m, i32 %evl)70 ret <vscale x 1 x i8> %v71}72 73define <vscale x 1 x i8> @vand_vi_nxv1i8_unmasked(<vscale x 1 x i8> %va, i32 zeroext %evl) {74; CHECK-LABEL: vand_vi_nxv1i8_unmasked:75; CHECK: # %bb.0:76; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma77; CHECK-NEXT: vand.vi v8, v8, 478; CHECK-NEXT: ret79 %v = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> splat (i8 4), <vscale x 1 x i1> splat (i1 true), i32 %evl)80 ret <vscale x 1 x i8> %v81}82 83define <vscale x 2 x i8> @vand_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {84; CHECK-LABEL: vand_vv_nxv2i8:85; CHECK: # %bb.0:86; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma87; CHECK-NEXT: vand.vv v8, v8, v9, v0.t88; CHECK-NEXT: ret89 %v = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 %evl)90 ret <vscale x 2 x i8> %v91}92 93define <vscale x 2 x i8> @vand_vv_nxv2i8_unmasked(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, i32 zeroext %evl) {94; CHECK-LABEL: vand_vv_nxv2i8_unmasked:95; CHECK: # %bb.0:96; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma97; CHECK-NEXT: vand.vv v8, v8, v998; CHECK-NEXT: ret99 %v = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)100 ret <vscale x 2 x i8> %v101}102 103define <vscale x 2 x i8> @vand_vx_nxv2i8(<vscale x 2 x i8> %va, i8 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {104; CHECK-LABEL: vand_vx_nxv2i8:105; CHECK: # %bb.0:106; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma107; CHECK-NEXT: vand.vx v8, v8, a0, v0.t108; CHECK-NEXT: ret109 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0110 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer111 %v = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 %evl)112 ret <vscale x 2 x i8> %v113}114 115define <vscale x 2 x i8> @vand_vx_nxv2i8_unmasked(<vscale x 2 x i8> %va, i8 %b, i32 zeroext %evl) {116; CHECK-LABEL: vand_vx_nxv2i8_unmasked:117; CHECK: # %bb.0:118; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma119; CHECK-NEXT: vand.vx v8, v8, a0120; CHECK-NEXT: ret121 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0122 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer123 %v = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)124 ret <vscale x 2 x i8> %v125}126 127define <vscale x 2 x i8> @vand_vi_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {128; CHECK-LABEL: vand_vi_nxv2i8:129; CHECK: # %bb.0:130; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma131; CHECK-NEXT: vand.vi v8, v8, 4, v0.t132; CHECK-NEXT: ret133 %v = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> splat (i8 4), <vscale x 2 x i1> %m, i32 %evl)134 ret <vscale x 2 x i8> %v135}136 137define <vscale x 2 x i8> @vand_vi_nxv2i8_unmasked(<vscale x 2 x i8> %va, i32 zeroext %evl) {138; CHECK-LABEL: vand_vi_nxv2i8_unmasked:139; CHECK: # %bb.0:140; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma141; CHECK-NEXT: vand.vi v8, v8, 4142; CHECK-NEXT: ret143 %v = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> splat (i8 4), <vscale x 2 x i1> splat (i1 true), i32 %evl)144 ret <vscale x 2 x i8> %v145}146 147define <vscale x 4 x i8> @vand_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {148; CHECK-LABEL: vand_vv_nxv4i8:149; CHECK: # %bb.0:150; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma151; CHECK-NEXT: vand.vv v8, v8, v9, v0.t152; CHECK-NEXT: ret153 %v = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 %evl)154 ret <vscale x 4 x i8> %v155}156 157define <vscale x 4 x i8> @vand_vv_nxv4i8_unmasked(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, i32 zeroext %evl) {158; CHECK-LABEL: vand_vv_nxv4i8_unmasked:159; CHECK: # %bb.0:160; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma161; CHECK-NEXT: vand.vv v8, v8, v9162; CHECK-NEXT: ret163 %v = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)164 ret <vscale x 4 x i8> %v165}166 167define <vscale x 4 x i8> @vand_vx_nxv4i8(<vscale x 4 x i8> %va, i8 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {168; CHECK-LABEL: vand_vx_nxv4i8:169; CHECK: # %bb.0:170; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma171; CHECK-NEXT: vand.vx v8, v8, a0, v0.t172; CHECK-NEXT: ret173 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0174 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer175 %v = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 %evl)176 ret <vscale x 4 x i8> %v177}178 179define <vscale x 4 x i8> @vand_vx_nxv4i8_unmasked(<vscale x 4 x i8> %va, i8 %b, i32 zeroext %evl) {180; CHECK-LABEL: vand_vx_nxv4i8_unmasked:181; CHECK: # %bb.0:182; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma183; CHECK-NEXT: vand.vx v8, v8, a0184; CHECK-NEXT: ret185 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0186 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer187 %v = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)188 ret <vscale x 4 x i8> %v189}190 191define <vscale x 4 x i8> @vand_vi_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {192; CHECK-LABEL: vand_vi_nxv4i8:193; CHECK: # %bb.0:194; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma195; CHECK-NEXT: vand.vi v8, v8, 4, v0.t196; CHECK-NEXT: ret197 %v = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> splat (i8 4), <vscale x 4 x i1> %m, i32 %evl)198 ret <vscale x 4 x i8> %v199}200 201define <vscale x 4 x i8> @vand_vi_nxv4i8_unmasked(<vscale x 4 x i8> %va, i32 zeroext %evl) {202; CHECK-LABEL: vand_vi_nxv4i8_unmasked:203; CHECK: # %bb.0:204; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma205; CHECK-NEXT: vand.vi v8, v8, 4206; CHECK-NEXT: ret207 %v = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> splat (i8 4), <vscale x 4 x i1> splat (i1 true), i32 %evl)208 ret <vscale x 4 x i8> %v209}210 211define <vscale x 8 x i8> @vand_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {212; CHECK-LABEL: vand_vv_nxv8i8:213; CHECK: # %bb.0:214; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma215; CHECK-NEXT: vand.vv v8, v8, v9, v0.t216; CHECK-NEXT: ret217 %v = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 %evl)218 ret <vscale x 8 x i8> %v219}220 221define <vscale x 8 x i8> @vand_vv_nxv8i8_unmasked(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, i32 zeroext %evl) {222; CHECK-LABEL: vand_vv_nxv8i8_unmasked:223; CHECK: # %bb.0:224; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma225; CHECK-NEXT: vand.vv v8, v8, v9226; CHECK-NEXT: ret227 %v = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)228 ret <vscale x 8 x i8> %v229}230 231define <vscale x 8 x i8> @vand_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {232; CHECK-LABEL: vand_vx_nxv8i8:233; CHECK: # %bb.0:234; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma235; CHECK-NEXT: vand.vx v8, v8, a0, v0.t236; CHECK-NEXT: ret237 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0238 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer239 %v = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 %evl)240 ret <vscale x 8 x i8> %v241}242 243define <vscale x 8 x i8> @vand_vx_nxv8i8_unmasked(<vscale x 8 x i8> %va, i8 %b, i32 zeroext %evl) {244; CHECK-LABEL: vand_vx_nxv8i8_unmasked:245; CHECK: # %bb.0:246; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma247; CHECK-NEXT: vand.vx v8, v8, a0248; CHECK-NEXT: ret249 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0250 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer251 %v = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)252 ret <vscale x 8 x i8> %v253}254 255define <vscale x 8 x i8> @vand_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {256; CHECK-LABEL: vand_vi_nxv8i8:257; CHECK: # %bb.0:258; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma259; CHECK-NEXT: vand.vi v8, v8, 4, v0.t260; CHECK-NEXT: ret261 %v = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), <vscale x 8 x i1> %m, i32 %evl)262 ret <vscale x 8 x i8> %v263}264 265define <vscale x 8 x i8> @vand_vi_nxv8i8_unmasked(<vscale x 8 x i8> %va, i32 zeroext %evl) {266; CHECK-LABEL: vand_vi_nxv8i8_unmasked:267; CHECK: # %bb.0:268; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma269; CHECK-NEXT: vand.vi v8, v8, 4270; CHECK-NEXT: ret271 %v = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> splat (i8 4), <vscale x 8 x i1> splat (i1 true), i32 %evl)272 ret <vscale x 8 x i8> %v273}274 275define <vscale x 16 x i8> @vand_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {276; CHECK-LABEL: vand_vv_nxv16i8:277; CHECK: # %bb.0:278; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma279; CHECK-NEXT: vand.vv v8, v8, v10, v0.t280; CHECK-NEXT: ret281 %v = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 %evl)282 ret <vscale x 16 x i8> %v283}284 285define <vscale x 16 x i8> @vand_vv_nxv16i8_unmasked(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, i32 zeroext %evl) {286; CHECK-LABEL: vand_vv_nxv16i8_unmasked:287; CHECK: # %bb.0:288; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma289; CHECK-NEXT: vand.vv v8, v8, v10290; CHECK-NEXT: ret291 %v = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)292 ret <vscale x 16 x i8> %v293}294 295define <vscale x 16 x i8> @vand_vx_nxv16i8(<vscale x 16 x i8> %va, i8 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {296; CHECK-LABEL: vand_vx_nxv16i8:297; CHECK: # %bb.0:298; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma299; CHECK-NEXT: vand.vx v8, v8, a0, v0.t300; CHECK-NEXT: ret301 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0302 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer303 %v = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 %evl)304 ret <vscale x 16 x i8> %v305}306 307define <vscale x 16 x i8> @vand_vx_nxv16i8_unmasked(<vscale x 16 x i8> %va, i8 %b, i32 zeroext %evl) {308; CHECK-LABEL: vand_vx_nxv16i8_unmasked:309; CHECK: # %bb.0:310; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma311; CHECK-NEXT: vand.vx v8, v8, a0312; CHECK-NEXT: ret313 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0314 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer315 %v = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)316 ret <vscale x 16 x i8> %v317}318 319define <vscale x 16 x i8> @vand_vi_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {320; CHECK-LABEL: vand_vi_nxv16i8:321; CHECK: # %bb.0:322; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma323; CHECK-NEXT: vand.vi v8, v8, 4, v0.t324; CHECK-NEXT: ret325 %v = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> splat (i8 4), <vscale x 16 x i1> %m, i32 %evl)326 ret <vscale x 16 x i8> %v327}328 329define <vscale x 16 x i8> @vand_vi_nxv16i8_unmasked(<vscale x 16 x i8> %va, i32 zeroext %evl) {330; CHECK-LABEL: vand_vi_nxv16i8_unmasked:331; CHECK: # %bb.0:332; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma333; CHECK-NEXT: vand.vi v8, v8, 4334; CHECK-NEXT: ret335 %v = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> splat (i8 4), <vscale x 16 x i1> splat (i1 true), i32 %evl)336 ret <vscale x 16 x i8> %v337}338 339define <vscale x 32 x i8> @vand_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {340; CHECK-LABEL: vand_vv_nxv32i8:341; CHECK: # %bb.0:342; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma343; CHECK-NEXT: vand.vv v8, v8, v12, v0.t344; CHECK-NEXT: ret345 %v = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 %evl)346 ret <vscale x 32 x i8> %v347}348 349define <vscale x 32 x i8> @vand_vv_nxv32i8_unmasked(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, i32 zeroext %evl) {350; CHECK-LABEL: vand_vv_nxv32i8_unmasked:351; CHECK: # %bb.0:352; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma353; CHECK-NEXT: vand.vv v8, v8, v12354; CHECK-NEXT: ret355 %v = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)356 ret <vscale x 32 x i8> %v357}358 359define <vscale x 32 x i8> @vand_vx_nxv32i8(<vscale x 32 x i8> %va, i8 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {360; CHECK-LABEL: vand_vx_nxv32i8:361; CHECK: # %bb.0:362; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma363; CHECK-NEXT: vand.vx v8, v8, a0, v0.t364; CHECK-NEXT: ret365 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0366 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer367 %v = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 %evl)368 ret <vscale x 32 x i8> %v369}370 371define <vscale x 32 x i8> @vand_vx_nxv32i8_unmasked(<vscale x 32 x i8> %va, i8 %b, i32 zeroext %evl) {372; CHECK-LABEL: vand_vx_nxv32i8_unmasked:373; CHECK: # %bb.0:374; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma375; CHECK-NEXT: vand.vx v8, v8, a0376; CHECK-NEXT: ret377 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0378 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer379 %v = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)380 ret <vscale x 32 x i8> %v381}382 383define <vscale x 32 x i8> @vand_vi_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {384; CHECK-LABEL: vand_vi_nxv32i8:385; CHECK: # %bb.0:386; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma387; CHECK-NEXT: vand.vi v8, v8, 4, v0.t388; CHECK-NEXT: ret389 %v = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> splat (i8 4), <vscale x 32 x i1> %m, i32 %evl)390 ret <vscale x 32 x i8> %v391}392 393define <vscale x 32 x i8> @vand_vi_nxv32i8_unmasked(<vscale x 32 x i8> %va, i32 zeroext %evl) {394; CHECK-LABEL: vand_vi_nxv32i8_unmasked:395; CHECK: # %bb.0:396; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma397; CHECK-NEXT: vand.vi v8, v8, 4398; CHECK-NEXT: ret399 %v = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> splat (i8 4), <vscale x 32 x i1> splat (i1 true), i32 %evl)400 ret <vscale x 32 x i8> %v401}402 403define <vscale x 64 x i8> @vand_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {404; CHECK-LABEL: vand_vv_nxv64i8:405; CHECK: # %bb.0:406; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma407; CHECK-NEXT: vand.vv v8, v8, v16, v0.t408; CHECK-NEXT: ret409 %v = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 %evl)410 ret <vscale x 64 x i8> %v411}412 413define <vscale x 64 x i8> @vand_vv_nxv64i8_unmasked(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, i32 zeroext %evl) {414; CHECK-LABEL: vand_vv_nxv64i8_unmasked:415; CHECK: # %bb.0:416; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma417; CHECK-NEXT: vand.vv v8, v8, v16418; CHECK-NEXT: ret419 %v = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 true), i32 %evl)420 ret <vscale x 64 x i8> %v421}422 423define <vscale x 64 x i8> @vand_vx_nxv64i8(<vscale x 64 x i8> %va, i8 %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {424; CHECK-LABEL: vand_vx_nxv64i8:425; CHECK: # %bb.0:426; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma427; CHECK-NEXT: vand.vx v8, v8, a0, v0.t428; CHECK-NEXT: ret429 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0430 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer431 %v = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 %evl)432 ret <vscale x 64 x i8> %v433}434 435define <vscale x 64 x i8> @vand_vx_nxv64i8_unmasked(<vscale x 64 x i8> %va, i8 %b, i32 zeroext %evl) {436; CHECK-LABEL: vand_vx_nxv64i8_unmasked:437; CHECK: # %bb.0:438; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma439; CHECK-NEXT: vand.vx v8, v8, a0440; CHECK-NEXT: ret441 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0442 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer443 %v = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 true), i32 %evl)444 ret <vscale x 64 x i8> %v445}446 447define <vscale x 64 x i8> @vand_vi_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i1> %m, i32 zeroext %evl) {448; CHECK-LABEL: vand_vi_nxv64i8:449; CHECK: # %bb.0:450; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma451; CHECK-NEXT: vand.vi v8, v8, 4, v0.t452; CHECK-NEXT: ret453 %v = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> splat (i8 4), <vscale x 64 x i1> %m, i32 %evl)454 ret <vscale x 64 x i8> %v455}456 457define <vscale x 64 x i8> @vand_vi_nxv64i8_unmasked(<vscale x 64 x i8> %va, i32 zeroext %evl) {458; CHECK-LABEL: vand_vi_nxv64i8_unmasked:459; CHECK: # %bb.0:460; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma461; CHECK-NEXT: vand.vi v8, v8, 4462; CHECK-NEXT: ret463 %v = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> splat (i8 4), <vscale x 64 x i1> splat (i1 true), i32 %evl)464 ret <vscale x 64 x i8> %v465}466 467define <vscale x 1 x i16> @vand_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {468; CHECK-LABEL: vand_vv_nxv1i16:469; CHECK: # %bb.0:470; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma471; CHECK-NEXT: vand.vv v8, v8, v9, v0.t472; CHECK-NEXT: ret473 %v = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 %evl)474 ret <vscale x 1 x i16> %v475}476 477define <vscale x 1 x i16> @vand_vv_nxv1i16_unmasked(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, i32 zeroext %evl) {478; CHECK-LABEL: vand_vv_nxv1i16_unmasked:479; CHECK: # %bb.0:480; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma481; CHECK-NEXT: vand.vv v8, v8, v9482; CHECK-NEXT: ret483 %v = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)484 ret <vscale x 1 x i16> %v485}486 487define <vscale x 1 x i16> @vand_vx_nxv1i16(<vscale x 1 x i16> %va, i16 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {488; CHECK-LABEL: vand_vx_nxv1i16:489; CHECK: # %bb.0:490; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma491; CHECK-NEXT: vand.vx v8, v8, a0, v0.t492; CHECK-NEXT: ret493 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0494 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer495 %v = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 %evl)496 ret <vscale x 1 x i16> %v497}498 499define <vscale x 1 x i16> @vand_vx_nxv1i16_unmasked(<vscale x 1 x i16> %va, i16 %b, i32 zeroext %evl) {500; CHECK-LABEL: vand_vx_nxv1i16_unmasked:501; CHECK: # %bb.0:502; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma503; CHECK-NEXT: vand.vx v8, v8, a0504; CHECK-NEXT: ret505 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0506 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer507 %v = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)508 ret <vscale x 1 x i16> %v509}510 511define <vscale x 1 x i16> @vand_vi_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {512; CHECK-LABEL: vand_vi_nxv1i16:513; CHECK: # %bb.0:514; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma515; CHECK-NEXT: vand.vi v8, v8, 4, v0.t516; CHECK-NEXT: ret517 %v = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> splat (i16 4), <vscale x 1 x i1> %m, i32 %evl)518 ret <vscale x 1 x i16> %v519}520 521define <vscale x 1 x i16> @vand_vi_nxv1i16_unmasked(<vscale x 1 x i16> %va, i32 zeroext %evl) {522; CHECK-LABEL: vand_vi_nxv1i16_unmasked:523; CHECK: # %bb.0:524; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma525; CHECK-NEXT: vand.vi v8, v8, 4526; CHECK-NEXT: ret527 %v = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> splat (i16 4), <vscale x 1 x i1> splat (i1 true), i32 %evl)528 ret <vscale x 1 x i16> %v529}530 531define <vscale x 2 x i16> @vand_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {532; CHECK-LABEL: vand_vv_nxv2i16:533; CHECK: # %bb.0:534; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma535; CHECK-NEXT: vand.vv v8, v8, v9, v0.t536; CHECK-NEXT: ret537 %v = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 %evl)538 ret <vscale x 2 x i16> %v539}540 541define <vscale x 2 x i16> @vand_vv_nxv2i16_unmasked(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, i32 zeroext %evl) {542; CHECK-LABEL: vand_vv_nxv2i16_unmasked:543; CHECK: # %bb.0:544; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma545; CHECK-NEXT: vand.vv v8, v8, v9546; CHECK-NEXT: ret547 %v = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)548 ret <vscale x 2 x i16> %v549}550 551define <vscale x 2 x i16> @vand_vx_nxv2i16(<vscale x 2 x i16> %va, i16 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {552; CHECK-LABEL: vand_vx_nxv2i16:553; CHECK: # %bb.0:554; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma555; CHECK-NEXT: vand.vx v8, v8, a0, v0.t556; CHECK-NEXT: ret557 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0558 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer559 %v = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 %evl)560 ret <vscale x 2 x i16> %v561}562 563define <vscale x 2 x i16> @vand_vx_nxv2i16_unmasked(<vscale x 2 x i16> %va, i16 %b, i32 zeroext %evl) {564; CHECK-LABEL: vand_vx_nxv2i16_unmasked:565; CHECK: # %bb.0:566; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma567; CHECK-NEXT: vand.vx v8, v8, a0568; CHECK-NEXT: ret569 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0570 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer571 %v = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)572 ret <vscale x 2 x i16> %v573}574 575define <vscale x 2 x i16> @vand_vi_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {576; CHECK-LABEL: vand_vi_nxv2i16:577; CHECK: # %bb.0:578; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma579; CHECK-NEXT: vand.vi v8, v8, 4, v0.t580; CHECK-NEXT: ret581 %v = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> splat (i16 4), <vscale x 2 x i1> %m, i32 %evl)582 ret <vscale x 2 x i16> %v583}584 585define <vscale x 2 x i16> @vand_vi_nxv2i16_unmasked(<vscale x 2 x i16> %va, i32 zeroext %evl) {586; CHECK-LABEL: vand_vi_nxv2i16_unmasked:587; CHECK: # %bb.0:588; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma589; CHECK-NEXT: vand.vi v8, v8, 4590; CHECK-NEXT: ret591 %v = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> splat (i16 4), <vscale x 2 x i1> splat (i1 true), i32 %evl)592 ret <vscale x 2 x i16> %v593}594 595define <vscale x 4 x i16> @vand_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {596; CHECK-LABEL: vand_vv_nxv4i16:597; CHECK: # %bb.0:598; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma599; CHECK-NEXT: vand.vv v8, v8, v9, v0.t600; CHECK-NEXT: ret601 %v = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 %evl)602 ret <vscale x 4 x i16> %v603}604 605define <vscale x 4 x i16> @vand_vv_nxv4i16_unmasked(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, i32 zeroext %evl) {606; CHECK-LABEL: vand_vv_nxv4i16_unmasked:607; CHECK: # %bb.0:608; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma609; CHECK-NEXT: vand.vv v8, v8, v9610; CHECK-NEXT: ret611 %v = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)612 ret <vscale x 4 x i16> %v613}614 615define <vscale x 4 x i16> @vand_vx_nxv4i16(<vscale x 4 x i16> %va, i16 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {616; CHECK-LABEL: vand_vx_nxv4i16:617; CHECK: # %bb.0:618; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma619; CHECK-NEXT: vand.vx v8, v8, a0, v0.t620; CHECK-NEXT: ret621 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0622 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer623 %v = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 %evl)624 ret <vscale x 4 x i16> %v625}626 627define <vscale x 4 x i16> @vand_vx_nxv4i16_unmasked(<vscale x 4 x i16> %va, i16 %b, i32 zeroext %evl) {628; CHECK-LABEL: vand_vx_nxv4i16_unmasked:629; CHECK: # %bb.0:630; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma631; CHECK-NEXT: vand.vx v8, v8, a0632; CHECK-NEXT: ret633 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0634 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer635 %v = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)636 ret <vscale x 4 x i16> %v637}638 639define <vscale x 4 x i16> @vand_vi_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {640; CHECK-LABEL: vand_vi_nxv4i16:641; CHECK: # %bb.0:642; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma643; CHECK-NEXT: vand.vi v8, v8, 4, v0.t644; CHECK-NEXT: ret645 %v = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> splat (i16 4), <vscale x 4 x i1> %m, i32 %evl)646 ret <vscale x 4 x i16> %v647}648 649define <vscale x 4 x i16> @vand_vi_nxv4i16_unmasked(<vscale x 4 x i16> %va, i32 zeroext %evl) {650; CHECK-LABEL: vand_vi_nxv4i16_unmasked:651; CHECK: # %bb.0:652; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma653; CHECK-NEXT: vand.vi v8, v8, 4654; CHECK-NEXT: ret655 %v = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> splat (i16 4), <vscale x 4 x i1> splat (i1 true), i32 %evl)656 ret <vscale x 4 x i16> %v657}658 659define <vscale x 8 x i16> @vand_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {660; CHECK-LABEL: vand_vv_nxv8i16:661; CHECK: # %bb.0:662; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma663; CHECK-NEXT: vand.vv v8, v8, v10, v0.t664; CHECK-NEXT: ret665 %v = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 %evl)666 ret <vscale x 8 x i16> %v667}668 669define <vscale x 8 x i16> @vand_vv_nxv8i16_unmasked(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, i32 zeroext %evl) {670; CHECK-LABEL: vand_vv_nxv8i16_unmasked:671; CHECK: # %bb.0:672; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma673; CHECK-NEXT: vand.vv v8, v8, v10674; CHECK-NEXT: ret675 %v = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)676 ret <vscale x 8 x i16> %v677}678 679define <vscale x 8 x i16> @vand_vx_nxv8i16(<vscale x 8 x i16> %va, i16 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {680; CHECK-LABEL: vand_vx_nxv8i16:681; CHECK: # %bb.0:682; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma683; CHECK-NEXT: vand.vx v8, v8, a0, v0.t684; CHECK-NEXT: ret685 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0686 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer687 %v = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 %evl)688 ret <vscale x 8 x i16> %v689}690 691define <vscale x 8 x i16> @vand_vx_nxv8i16_unmasked(<vscale x 8 x i16> %va, i16 %b, i32 zeroext %evl) {692; CHECK-LABEL: vand_vx_nxv8i16_unmasked:693; CHECK: # %bb.0:694; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma695; CHECK-NEXT: vand.vx v8, v8, a0696; CHECK-NEXT: ret697 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0698 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer699 %v = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)700 ret <vscale x 8 x i16> %v701}702 703define <vscale x 8 x i16> @vand_vi_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {704; CHECK-LABEL: vand_vi_nxv8i16:705; CHECK: # %bb.0:706; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma707; CHECK-NEXT: vand.vi v8, v8, 4, v0.t708; CHECK-NEXT: ret709 %v = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> splat (i16 4), <vscale x 8 x i1> %m, i32 %evl)710 ret <vscale x 8 x i16> %v711}712 713define <vscale x 8 x i16> @vand_vi_nxv8i16_unmasked(<vscale x 8 x i16> %va, i32 zeroext %evl) {714; CHECK-LABEL: vand_vi_nxv8i16_unmasked:715; CHECK: # %bb.0:716; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma717; CHECK-NEXT: vand.vi v8, v8, 4718; CHECK-NEXT: ret719 %v = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> splat (i16 4), <vscale x 8 x i1> splat (i1 true), i32 %evl)720 ret <vscale x 8 x i16> %v721}722 723define <vscale x 14 x i16> @vand_vv_nxv14i16(<vscale x 14 x i16> %va, <vscale x 14 x i16> %b, <vscale x 14 x i1> %m, i32 zeroext %evl) {724; CHECK-LABEL: vand_vv_nxv14i16:725; CHECK: # %bb.0:726; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma727; CHECK-NEXT: vand.vv v8, v8, v12, v0.t728; CHECK-NEXT: ret729 %v = call <vscale x 14 x i16> @llvm.vp.and.nxv14i16(<vscale x 14 x i16> %va, <vscale x 14 x i16> %b, <vscale x 14 x i1> %m, i32 %evl)730 ret <vscale x 14 x i16> %v731}732 733define <vscale x 14 x i16> @vand_vv_nxv14i16_unmasked(<vscale x 14 x i16> %va, <vscale x 14 x i16> %b, i32 zeroext %evl) {734; CHECK-LABEL: vand_vv_nxv14i16_unmasked:735; CHECK: # %bb.0:736; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma737; CHECK-NEXT: vand.vv v8, v8, v12738; CHECK-NEXT: ret739 %v = call <vscale x 14 x i16> @llvm.vp.and.nxv14i16(<vscale x 14 x i16> %va, <vscale x 14 x i16> %b, <vscale x 14 x i1> splat (i1 true), i32 %evl)740 ret <vscale x 14 x i16> %v741}742 743define <vscale x 14 x i16> @vand_vx_nxv14i16(<vscale x 14 x i16> %va, i16 %b, <vscale x 14 x i1> %m, i32 zeroext %evl) {744; CHECK-LABEL: vand_vx_nxv14i16:745; CHECK: # %bb.0:746; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma747; CHECK-NEXT: vand.vx v8, v8, a0, v0.t748; CHECK-NEXT: ret749 %elt.head = insertelement <vscale x 14 x i16> poison, i16 %b, i32 0750 %vb = shufflevector <vscale x 14 x i16> %elt.head, <vscale x 14 x i16> poison, <vscale x 14 x i32> zeroinitializer751 %v = call <vscale x 14 x i16> @llvm.vp.and.nxv14i16(<vscale x 14 x i16> %va, <vscale x 14 x i16> %vb, <vscale x 14 x i1> %m, i32 %evl)752 ret <vscale x 14 x i16> %v753}754 755define <vscale x 14 x i16> @vand_vx_nxv14i16_unmasked(<vscale x 14 x i16> %va, i16 %b, i32 zeroext %evl) {756; CHECK-LABEL: vand_vx_nxv14i16_unmasked:757; CHECK: # %bb.0:758; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma759; CHECK-NEXT: vand.vx v8, v8, a0760; CHECK-NEXT: ret761 %elt.head = insertelement <vscale x 14 x i16> poison, i16 %b, i32 0762 %vb = shufflevector <vscale x 14 x i16> %elt.head, <vscale x 14 x i16> poison, <vscale x 14 x i32> zeroinitializer763 %v = call <vscale x 14 x i16> @llvm.vp.and.nxv14i16(<vscale x 14 x i16> %va, <vscale x 14 x i16> %vb, <vscale x 14 x i1> splat (i1 true), i32 %evl)764 ret <vscale x 14 x i16> %v765}766 767define <vscale x 14 x i16> @vand_vi_nxv14i16(<vscale x 14 x i16> %va, <vscale x 14 x i1> %m, i32 zeroext %evl) {768; CHECK-LABEL: vand_vi_nxv14i16:769; CHECK: # %bb.0:770; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma771; CHECK-NEXT: vand.vi v8, v8, 4, v0.t772; CHECK-NEXT: ret773 %v = call <vscale x 14 x i16> @llvm.vp.and.nxv14i16(<vscale x 14 x i16> %va, <vscale x 14 x i16> splat (i16 4), <vscale x 14 x i1> %m, i32 %evl)774 ret <vscale x 14 x i16> %v775}776 777define <vscale x 14 x i16> @vand_vi_nxv14i16_unmasked(<vscale x 14 x i16> %va, i32 zeroext %evl) {778; CHECK-LABEL: vand_vi_nxv14i16_unmasked:779; CHECK: # %bb.0:780; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma781; CHECK-NEXT: vand.vi v8, v8, 4782; CHECK-NEXT: ret783 %v = call <vscale x 14 x i16> @llvm.vp.and.nxv14i16(<vscale x 14 x i16> %va, <vscale x 14 x i16> splat (i16 4), <vscale x 14 x i1> splat (i1 true), i32 %evl)784 ret <vscale x 14 x i16> %v785}786 787define <vscale x 16 x i16> @vand_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {788; CHECK-LABEL: vand_vv_nxv16i16:789; CHECK: # %bb.0:790; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma791; CHECK-NEXT: vand.vv v8, v8, v12, v0.t792; CHECK-NEXT: ret793 %v = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 %evl)794 ret <vscale x 16 x i16> %v795}796 797define <vscale x 16 x i16> @vand_vv_nxv16i16_unmasked(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, i32 zeroext %evl) {798; CHECK-LABEL: vand_vv_nxv16i16_unmasked:799; CHECK: # %bb.0:800; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma801; CHECK-NEXT: vand.vv v8, v8, v12802; CHECK-NEXT: ret803 %v = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)804 ret <vscale x 16 x i16> %v805}806 807define <vscale x 16 x i16> @vand_vx_nxv16i16(<vscale x 16 x i16> %va, i16 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {808; CHECK-LABEL: vand_vx_nxv16i16:809; CHECK: # %bb.0:810; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma811; CHECK-NEXT: vand.vx v8, v8, a0, v0.t812; CHECK-NEXT: ret813 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0814 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer815 %v = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 %evl)816 ret <vscale x 16 x i16> %v817}818 819define <vscale x 16 x i16> @vand_vx_nxv16i16_unmasked(<vscale x 16 x i16> %va, i16 %b, i32 zeroext %evl) {820; CHECK-LABEL: vand_vx_nxv16i16_unmasked:821; CHECK: # %bb.0:822; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma823; CHECK-NEXT: vand.vx v8, v8, a0824; CHECK-NEXT: ret825 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0826 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer827 %v = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)828 ret <vscale x 16 x i16> %v829}830 831define <vscale x 16 x i16> @vand_vi_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {832; CHECK-LABEL: vand_vi_nxv16i16:833; CHECK: # %bb.0:834; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma835; CHECK-NEXT: vand.vi v8, v8, 4, v0.t836; CHECK-NEXT: ret837 %v = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> splat (i16 4), <vscale x 16 x i1> %m, i32 %evl)838 ret <vscale x 16 x i16> %v839}840 841define <vscale x 16 x i16> @vand_vi_nxv16i16_unmasked(<vscale x 16 x i16> %va, i32 zeroext %evl) {842; CHECK-LABEL: vand_vi_nxv16i16_unmasked:843; CHECK: # %bb.0:844; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma845; CHECK-NEXT: vand.vi v8, v8, 4846; CHECK-NEXT: ret847 %v = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> splat (i16 4), <vscale x 16 x i1> splat (i1 true), i32 %evl)848 ret <vscale x 16 x i16> %v849}850 851define <vscale x 32 x i16> @vand_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {852; CHECK-LABEL: vand_vv_nxv32i16:853; CHECK: # %bb.0:854; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma855; CHECK-NEXT: vand.vv v8, v8, v16, v0.t856; CHECK-NEXT: ret857 %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 %evl)858 ret <vscale x 32 x i16> %v859}860 861define <vscale x 32 x i16> @vand_vv_nxv32i16_unmasked(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, i32 zeroext %evl) {862; CHECK-LABEL: vand_vv_nxv32i16_unmasked:863; CHECK: # %bb.0:864; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma865; CHECK-NEXT: vand.vv v8, v8, v16866; CHECK-NEXT: ret867 %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)868 ret <vscale x 32 x i16> %v869}870 871define <vscale x 32 x i16> @vand_vx_nxv32i16(<vscale x 32 x i16> %va, i16 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {872; CHECK-LABEL: vand_vx_nxv32i16:873; CHECK: # %bb.0:874; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma875; CHECK-NEXT: vand.vx v8, v8, a0, v0.t876; CHECK-NEXT: ret877 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0878 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer879 %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 %evl)880 ret <vscale x 32 x i16> %v881}882 883define <vscale x 32 x i16> @vand_vx_nxv32i16_commute(<vscale x 32 x i16> %va, i16 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {884; CHECK-LABEL: vand_vx_nxv32i16_commute:885; CHECK: # %bb.0:886; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma887; CHECK-NEXT: vand.vx v8, v8, a0, v0.t888; CHECK-NEXT: ret889 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0890 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer891 %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %vb, <vscale x 32 x i16> %va, <vscale x 32 x i1> %m, i32 %evl)892 ret <vscale x 32 x i16> %v893}894 895define <vscale x 32 x i16> @vand_vx_nxv32i16_unmasked(<vscale x 32 x i16> %va, i16 %b, i32 zeroext %evl) {896; CHECK-LABEL: vand_vx_nxv32i16_unmasked:897; CHECK: # %bb.0:898; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma899; CHECK-NEXT: vand.vx v8, v8, a0900; CHECK-NEXT: ret901 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0902 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer903 %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)904 ret <vscale x 32 x i16> %v905}906 907define <vscale x 32 x i16> @vand_vi_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {908; CHECK-LABEL: vand_vi_nxv32i16:909; CHECK: # %bb.0:910; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma911; CHECK-NEXT: vand.vi v8, v8, 4, v0.t912; CHECK-NEXT: ret913 %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> splat (i16 4), <vscale x 32 x i1> %m, i32 %evl)914 ret <vscale x 32 x i16> %v915}916 917define <vscale x 32 x i16> @vand_vi_nxv32i16_unmasked(<vscale x 32 x i16> %va, i32 zeroext %evl) {918; CHECK-LABEL: vand_vi_nxv32i16_unmasked:919; CHECK: # %bb.0:920; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma921; CHECK-NEXT: vand.vi v8, v8, 4922; CHECK-NEXT: ret923 %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> splat (i16 4), <vscale x 32 x i1> splat (i1 true), i32 %evl)924 ret <vscale x 32 x i16> %v925}926 927define <vscale x 1 x i32> @vand_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {928; CHECK-LABEL: vand_vv_nxv1i32:929; CHECK: # %bb.0:930; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma931; CHECK-NEXT: vand.vv v8, v8, v9, v0.t932; CHECK-NEXT: ret933 %v = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 %evl)934 ret <vscale x 1 x i32> %v935}936 937define <vscale x 1 x i32> @vand_vv_nxv1i32_unmasked(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, i32 zeroext %evl) {938; CHECK-LABEL: vand_vv_nxv1i32_unmasked:939; CHECK: # %bb.0:940; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma941; CHECK-NEXT: vand.vv v8, v8, v9942; CHECK-NEXT: ret943 %v = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)944 ret <vscale x 1 x i32> %v945}946 947define <vscale x 1 x i32> @vand_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {948; CHECK-LABEL: vand_vx_nxv1i32:949; CHECK: # %bb.0:950; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma951; CHECK-NEXT: vand.vx v8, v8, a0, v0.t952; CHECK-NEXT: ret953 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0954 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer955 %v = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 %evl)956 ret <vscale x 1 x i32> %v957}958 959define <vscale x 1 x i32> @vand_vx_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 %b, i32 zeroext %evl) {960; CHECK-LABEL: vand_vx_nxv1i32_unmasked:961; CHECK: # %bb.0:962; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma963; CHECK-NEXT: vand.vx v8, v8, a0964; CHECK-NEXT: ret965 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0966 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer967 %v = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)968 ret <vscale x 1 x i32> %v969}970 971define <vscale x 1 x i32> @vand_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {972; CHECK-LABEL: vand_vi_nxv1i32:973; CHECK: # %bb.0:974; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma975; CHECK-NEXT: vand.vi v8, v8, 4, v0.t976; CHECK-NEXT: ret977 %v = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), <vscale x 1 x i1> %m, i32 %evl)978 ret <vscale x 1 x i32> %v979}980 981define <vscale x 1 x i32> @vand_vi_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 zeroext %evl) {982; CHECK-LABEL: vand_vi_nxv1i32_unmasked:983; CHECK: # %bb.0:984; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma985; CHECK-NEXT: vand.vi v8, v8, 4986; CHECK-NEXT: ret987 %v = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> splat (i32 4), <vscale x 1 x i1> splat (i1 true), i32 %evl)988 ret <vscale x 1 x i32> %v989}990 991define <vscale x 2 x i32> @vand_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {992; CHECK-LABEL: vand_vv_nxv2i32:993; CHECK: # %bb.0:994; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma995; CHECK-NEXT: vand.vv v8, v8, v9, v0.t996; CHECK-NEXT: ret997 %v = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 %evl)998 ret <vscale x 2 x i32> %v999}1000 1001define <vscale x 2 x i32> @vand_vv_nxv2i32_unmasked(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, i32 zeroext %evl) {1002; CHECK-LABEL: vand_vv_nxv2i32_unmasked:1003; CHECK: # %bb.0:1004; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma1005; CHECK-NEXT: vand.vv v8, v8, v91006; CHECK-NEXT: ret1007 %v = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)1008 ret <vscale x 2 x i32> %v1009}1010 1011define <vscale x 2 x i32> @vand_vx_nxv2i32(<vscale x 2 x i32> %va, i32 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1012; CHECK-LABEL: vand_vx_nxv2i32:1013; CHECK: # %bb.0:1014; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma1015; CHECK-NEXT: vand.vx v8, v8, a0, v0.t1016; CHECK-NEXT: ret1017 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 01018 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer1019 %v = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 %evl)1020 ret <vscale x 2 x i32> %v1021}1022 1023define <vscale x 2 x i32> @vand_vx_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 %b, i32 zeroext %evl) {1024; CHECK-LABEL: vand_vx_nxv2i32_unmasked:1025; CHECK: # %bb.0:1026; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma1027; CHECK-NEXT: vand.vx v8, v8, a01028; CHECK-NEXT: ret1029 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 01030 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer1031 %v = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)1032 ret <vscale x 2 x i32> %v1033}1034 1035define <vscale x 2 x i32> @vand_vi_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {1036; CHECK-LABEL: vand_vi_nxv2i32:1037; CHECK: # %bb.0:1038; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma1039; CHECK-NEXT: vand.vi v8, v8, 4, v0.t1040; CHECK-NEXT: ret1041 %v = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> splat (i32 4), <vscale x 2 x i1> %m, i32 %evl)1042 ret <vscale x 2 x i32> %v1043}1044 1045define <vscale x 2 x i32> @vand_vi_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 zeroext %evl) {1046; CHECK-LABEL: vand_vi_nxv2i32_unmasked:1047; CHECK: # %bb.0:1048; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma1049; CHECK-NEXT: vand.vi v8, v8, 41050; CHECK-NEXT: ret1051 %v = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> splat (i32 4), <vscale x 2 x i1> splat (i1 true), i32 %evl)1052 ret <vscale x 2 x i32> %v1053}1054 1055define <vscale x 4 x i32> @vand_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1056; CHECK-LABEL: vand_vv_nxv4i32:1057; CHECK: # %bb.0:1058; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1059; CHECK-NEXT: vand.vv v8, v8, v10, v0.t1060; CHECK-NEXT: ret1061 %v = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 %evl)1062 ret <vscale x 4 x i32> %v1063}1064 1065define <vscale x 4 x i32> @vand_vv_nxv4i32_unmasked(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, i32 zeroext %evl) {1066; CHECK-LABEL: vand_vv_nxv4i32_unmasked:1067; CHECK: # %bb.0:1068; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1069; CHECK-NEXT: vand.vv v8, v8, v101070; CHECK-NEXT: ret1071 %v = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1072 ret <vscale x 4 x i32> %v1073}1074 1075define <vscale x 4 x i32> @vand_vx_nxv4i32(<vscale x 4 x i32> %va, i32 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1076; CHECK-LABEL: vand_vx_nxv4i32:1077; CHECK: # %bb.0:1078; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma1079; CHECK-NEXT: vand.vx v8, v8, a0, v0.t1080; CHECK-NEXT: ret1081 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01082 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1083 %v = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 %evl)1084 ret <vscale x 4 x i32> %v1085}1086 1087define <vscale x 4 x i32> @vand_vx_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 %b, i32 zeroext %evl) {1088; CHECK-LABEL: vand_vx_nxv4i32_unmasked:1089; CHECK: # %bb.0:1090; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma1091; CHECK-NEXT: vand.vx v8, v8, a01092; CHECK-NEXT: ret1093 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 01094 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer1095 %v = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1096 ret <vscale x 4 x i32> %v1097}1098 1099define <vscale x 4 x i32> @vand_vi_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {1100; CHECK-LABEL: vand_vi_nxv4i32:1101; CHECK: # %bb.0:1102; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1103; CHECK-NEXT: vand.vi v8, v8, 4, v0.t1104; CHECK-NEXT: ret1105 %v = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> splat (i32 4), <vscale x 4 x i1> %m, i32 %evl)1106 ret <vscale x 4 x i32> %v1107}1108 1109define <vscale x 4 x i32> @vand_vi_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 zeroext %evl) {1110; CHECK-LABEL: vand_vi_nxv4i32_unmasked:1111; CHECK: # %bb.0:1112; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma1113; CHECK-NEXT: vand.vi v8, v8, 41114; CHECK-NEXT: ret1115 %v = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> splat (i32 4), <vscale x 4 x i1> splat (i1 true), i32 %evl)1116 ret <vscale x 4 x i32> %v1117}1118 1119define <vscale x 8 x i32> @vand_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1120; CHECK-LABEL: vand_vv_nxv8i32:1121; CHECK: # %bb.0:1122; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1123; CHECK-NEXT: vand.vv v8, v8, v12, v0.t1124; CHECK-NEXT: ret1125 %v = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 %evl)1126 ret <vscale x 8 x i32> %v1127}1128 1129define <vscale x 8 x i32> @vand_vv_nxv8i32_unmasked(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, i32 zeroext %evl) {1130; CHECK-LABEL: vand_vv_nxv8i32_unmasked:1131; CHECK: # %bb.0:1132; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1133; CHECK-NEXT: vand.vv v8, v8, v121134; CHECK-NEXT: ret1135 %v = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1136 ret <vscale x 8 x i32> %v1137}1138 1139define <vscale x 8 x i32> @vand_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1140; CHECK-LABEL: vand_vx_nxv8i32:1141; CHECK: # %bb.0:1142; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma1143; CHECK-NEXT: vand.vx v8, v8, a0, v0.t1144; CHECK-NEXT: ret1145 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01146 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1147 %v = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 %evl)1148 ret <vscale x 8 x i32> %v1149}1150 1151define <vscale x 8 x i32> @vand_vx_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 %b, i32 zeroext %evl) {1152; CHECK-LABEL: vand_vx_nxv8i32_unmasked:1153; CHECK: # %bb.0:1154; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma1155; CHECK-NEXT: vand.vx v8, v8, a01156; CHECK-NEXT: ret1157 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 01158 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer1159 %v = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1160 ret <vscale x 8 x i32> %v1161}1162 1163define <vscale x 8 x i32> @vand_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1164; CHECK-LABEL: vand_vi_nxv8i32:1165; CHECK: # %bb.0:1166; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1167; CHECK-NEXT: vand.vi v8, v8, 4, v0.t1168; CHECK-NEXT: ret1169 %v = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), <vscale x 8 x i1> %m, i32 %evl)1170 ret <vscale x 8 x i32> %v1171}1172 1173define <vscale x 8 x i32> @vand_vi_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 zeroext %evl) {1174; CHECK-LABEL: vand_vi_nxv8i32_unmasked:1175; CHECK: # %bb.0:1176; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma1177; CHECK-NEXT: vand.vi v8, v8, 41178; CHECK-NEXT: ret1179 %v = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> splat (i32 4), <vscale x 8 x i1> splat (i1 true), i32 %evl)1180 ret <vscale x 8 x i32> %v1181}1182 1183define <vscale x 16 x i32> @vand_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {1184; CHECK-LABEL: vand_vv_nxv16i32:1185; CHECK: # %bb.0:1186; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1187; CHECK-NEXT: vand.vv v8, v8, v16, v0.t1188; CHECK-NEXT: ret1189 %v = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 %evl)1190 ret <vscale x 16 x i32> %v1191}1192 1193define <vscale x 16 x i32> @vand_vv_nxv16i32_unmasked(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, i32 zeroext %evl) {1194; CHECK-LABEL: vand_vv_nxv16i32_unmasked:1195; CHECK: # %bb.0:1196; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1197; CHECK-NEXT: vand.vv v8, v8, v161198; CHECK-NEXT: ret1199 %v = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)1200 ret <vscale x 16 x i32> %v1201}1202 1203define <vscale x 16 x i32> @vand_vx_nxv16i32(<vscale x 16 x i32> %va, i32 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {1204; CHECK-LABEL: vand_vx_nxv16i32:1205; CHECK: # %bb.0:1206; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma1207; CHECK-NEXT: vand.vx v8, v8, a0, v0.t1208; CHECK-NEXT: ret1209 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01210 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1211 %v = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 %evl)1212 ret <vscale x 16 x i32> %v1213}1214 1215define <vscale x 16 x i32> @vand_vx_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 %b, i32 zeroext %evl) {1216; CHECK-LABEL: vand_vx_nxv16i32_unmasked:1217; CHECK: # %bb.0:1218; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma1219; CHECK-NEXT: vand.vx v8, v8, a01220; CHECK-NEXT: ret1221 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 01222 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1223 %v = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)1224 ret <vscale x 16 x i32> %v1225}1226 1227define <vscale x 16 x i32> @vand_vi_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {1228; CHECK-LABEL: vand_vi_nxv16i32:1229; CHECK: # %bb.0:1230; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1231; CHECK-NEXT: vand.vi v8, v8, 4, v0.t1232; CHECK-NEXT: ret1233 %v = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> splat (i32 4), <vscale x 16 x i1> %m, i32 %evl)1234 ret <vscale x 16 x i32> %v1235}1236 1237define <vscale x 16 x i32> @vand_vi_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 zeroext %evl) {1238; CHECK-LABEL: vand_vi_nxv16i32_unmasked:1239; CHECK: # %bb.0:1240; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma1241; CHECK-NEXT: vand.vi v8, v8, 41242; CHECK-NEXT: ret1243 %v = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> splat (i32 4), <vscale x 16 x i1> splat (i1 true), i32 %evl)1244 ret <vscale x 16 x i32> %v1245}1246 1247define <vscale x 1 x i64> @vand_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1248; CHECK-LABEL: vand_vv_nxv1i64:1249; CHECK: # %bb.0:1250; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1251; CHECK-NEXT: vand.vv v8, v8, v9, v0.t1252; CHECK-NEXT: ret1253 %v = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 %evl)1254 ret <vscale x 1 x i64> %v1255}1256 1257define <vscale x 1 x i64> @vand_vv_nxv1i64_unmasked(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, i32 zeroext %evl) {1258; CHECK-LABEL: vand_vv_nxv1i64_unmasked:1259; CHECK: # %bb.0:1260; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1261; CHECK-NEXT: vand.vv v8, v8, v91262; CHECK-NEXT: ret1263 %v = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)1264 ret <vscale x 1 x i64> %v1265}1266 1267define <vscale x 1 x i64> @vand_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1268; RV32-LABEL: vand_vx_nxv1i64:1269; RV32: # %bb.0:1270; RV32-NEXT: addi sp, sp, -161271; RV32-NEXT: .cfi_def_cfa_offset 161272; RV32-NEXT: sw a0, 8(sp)1273; RV32-NEXT: sw a1, 12(sp)1274; RV32-NEXT: addi a0, sp, 81275; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1276; RV32-NEXT: vlse64.v v9, (a0), zero1277; RV32-NEXT: vand.vv v8, v8, v9, v0.t1278; RV32-NEXT: addi sp, sp, 161279; RV32-NEXT: .cfi_def_cfa_offset 01280; RV32-NEXT: ret1281;1282; RV64-LABEL: vand_vx_nxv1i64:1283; RV64: # %bb.0:1284; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1285; RV64-NEXT: vand.vx v8, v8, a0, v0.t1286; RV64-NEXT: ret1287 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01288 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1289 %v = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 %evl)1290 ret <vscale x 1 x i64> %v1291}1292 1293define <vscale x 1 x i64> @vand_vx_nxv1i64_unmasked(<vscale x 1 x i64> %va, i64 %b, i32 zeroext %evl) {1294; RV32-LABEL: vand_vx_nxv1i64_unmasked:1295; RV32: # %bb.0:1296; RV32-NEXT: addi sp, sp, -161297; RV32-NEXT: .cfi_def_cfa_offset 161298; RV32-NEXT: sw a0, 8(sp)1299; RV32-NEXT: sw a1, 12(sp)1300; RV32-NEXT: addi a0, sp, 81301; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1302; RV32-NEXT: vlse64.v v9, (a0), zero1303; RV32-NEXT: vand.vv v8, v8, v91304; RV32-NEXT: addi sp, sp, 161305; RV32-NEXT: .cfi_def_cfa_offset 01306; RV32-NEXT: ret1307;1308; RV64-LABEL: vand_vx_nxv1i64_unmasked:1309; RV64: # %bb.0:1310; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1311; RV64-NEXT: vand.vx v8, v8, a01312; RV64-NEXT: ret1313 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 01314 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1315 %v = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)1316 ret <vscale x 1 x i64> %v1317}1318 1319define <vscale x 1 x i64> @vand_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {1320; CHECK-LABEL: vand_vi_nxv1i64:1321; CHECK: # %bb.0:1322; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1323; CHECK-NEXT: vand.vi v8, v8, 4, v0.t1324; CHECK-NEXT: ret1325 %v = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), <vscale x 1 x i1> %m, i32 %evl)1326 ret <vscale x 1 x i64> %v1327}1328 1329define <vscale x 1 x i64> @vand_vi_nxv1i64_unmasked(<vscale x 1 x i64> %va, i32 zeroext %evl) {1330; CHECK-LABEL: vand_vi_nxv1i64_unmasked:1331; CHECK: # %bb.0:1332; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1333; CHECK-NEXT: vand.vi v8, v8, 41334; CHECK-NEXT: ret1335 %v = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> splat (i64 4), <vscale x 1 x i1> splat (i1 true), i32 %evl)1336 ret <vscale x 1 x i64> %v1337}1338 1339define <vscale x 2 x i64> @vand_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1340; CHECK-LABEL: vand_vv_nxv2i64:1341; CHECK: # %bb.0:1342; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1343; CHECK-NEXT: vand.vv v8, v8, v10, v0.t1344; CHECK-NEXT: ret1345 %v = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 %evl)1346 ret <vscale x 2 x i64> %v1347}1348 1349define <vscale x 2 x i64> @vand_vv_nxv2i64_unmasked(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, i32 zeroext %evl) {1350; CHECK-LABEL: vand_vv_nxv2i64_unmasked:1351; CHECK: # %bb.0:1352; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1353; CHECK-NEXT: vand.vv v8, v8, v101354; CHECK-NEXT: ret1355 %v = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)1356 ret <vscale x 2 x i64> %v1357}1358 1359define <vscale x 2 x i64> @vand_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1360; RV32-LABEL: vand_vx_nxv2i64:1361; RV32: # %bb.0:1362; RV32-NEXT: addi sp, sp, -161363; RV32-NEXT: .cfi_def_cfa_offset 161364; RV32-NEXT: sw a0, 8(sp)1365; RV32-NEXT: sw a1, 12(sp)1366; RV32-NEXT: addi a0, sp, 81367; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1368; RV32-NEXT: vlse64.v v10, (a0), zero1369; RV32-NEXT: vand.vv v8, v8, v10, v0.t1370; RV32-NEXT: addi sp, sp, 161371; RV32-NEXT: .cfi_def_cfa_offset 01372; RV32-NEXT: ret1373;1374; RV64-LABEL: vand_vx_nxv2i64:1375; RV64: # %bb.0:1376; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1377; RV64-NEXT: vand.vx v8, v8, a0, v0.t1378; RV64-NEXT: ret1379 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01380 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1381 %v = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 %evl)1382 ret <vscale x 2 x i64> %v1383}1384 1385define <vscale x 2 x i64> @vand_vx_nxv2i64_unmasked(<vscale x 2 x i64> %va, i64 %b, i32 zeroext %evl) {1386; RV32-LABEL: vand_vx_nxv2i64_unmasked:1387; RV32: # %bb.0:1388; RV32-NEXT: addi sp, sp, -161389; RV32-NEXT: .cfi_def_cfa_offset 161390; RV32-NEXT: sw a0, 8(sp)1391; RV32-NEXT: sw a1, 12(sp)1392; RV32-NEXT: addi a0, sp, 81393; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1394; RV32-NEXT: vlse64.v v10, (a0), zero1395; RV32-NEXT: vand.vv v8, v8, v101396; RV32-NEXT: addi sp, sp, 161397; RV32-NEXT: .cfi_def_cfa_offset 01398; RV32-NEXT: ret1399;1400; RV64-LABEL: vand_vx_nxv2i64_unmasked:1401; RV64: # %bb.0:1402; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1403; RV64-NEXT: vand.vx v8, v8, a01404; RV64-NEXT: ret1405 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 01406 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1407 %v = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)1408 ret <vscale x 2 x i64> %v1409}1410 1411define <vscale x 2 x i64> @vand_vi_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {1412; CHECK-LABEL: vand_vi_nxv2i64:1413; CHECK: # %bb.0:1414; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1415; CHECK-NEXT: vand.vi v8, v8, 4, v0.t1416; CHECK-NEXT: ret1417 %v = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> splat (i64 4), <vscale x 2 x i1> %m, i32 %evl)1418 ret <vscale x 2 x i64> %v1419}1420 1421define <vscale x 2 x i64> @vand_vi_nxv2i64_unmasked(<vscale x 2 x i64> %va, i32 zeroext %evl) {1422; CHECK-LABEL: vand_vi_nxv2i64_unmasked:1423; CHECK: # %bb.0:1424; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1425; CHECK-NEXT: vand.vi v8, v8, 41426; CHECK-NEXT: ret1427 %v = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> splat (i64 4), <vscale x 2 x i1> splat (i1 true), i32 %evl)1428 ret <vscale x 2 x i64> %v1429}1430 1431define <vscale x 4 x i64> @vand_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1432; CHECK-LABEL: vand_vv_nxv4i64:1433; CHECK: # %bb.0:1434; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1435; CHECK-NEXT: vand.vv v8, v8, v12, v0.t1436; CHECK-NEXT: ret1437 %v = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 %evl)1438 ret <vscale x 4 x i64> %v1439}1440 1441define <vscale x 4 x i64> @vand_vv_nxv4i64_unmasked(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, i32 zeroext %evl) {1442; CHECK-LABEL: vand_vv_nxv4i64_unmasked:1443; CHECK: # %bb.0:1444; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1445; CHECK-NEXT: vand.vv v8, v8, v121446; CHECK-NEXT: ret1447 %v = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1448 ret <vscale x 4 x i64> %v1449}1450 1451define <vscale x 4 x i64> @vand_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1452; RV32-LABEL: vand_vx_nxv4i64:1453; RV32: # %bb.0:1454; RV32-NEXT: addi sp, sp, -161455; RV32-NEXT: .cfi_def_cfa_offset 161456; RV32-NEXT: sw a0, 8(sp)1457; RV32-NEXT: sw a1, 12(sp)1458; RV32-NEXT: addi a0, sp, 81459; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1460; RV32-NEXT: vlse64.v v12, (a0), zero1461; RV32-NEXT: vand.vv v8, v8, v12, v0.t1462; RV32-NEXT: addi sp, sp, 161463; RV32-NEXT: .cfi_def_cfa_offset 01464; RV32-NEXT: ret1465;1466; RV64-LABEL: vand_vx_nxv4i64:1467; RV64: # %bb.0:1468; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1469; RV64-NEXT: vand.vx v8, v8, a0, v0.t1470; RV64-NEXT: ret1471 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01472 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1473 %v = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 %evl)1474 ret <vscale x 4 x i64> %v1475}1476 1477define <vscale x 4 x i64> @vand_vx_nxv4i64_unmasked(<vscale x 4 x i64> %va, i64 %b, i32 zeroext %evl) {1478; RV32-LABEL: vand_vx_nxv4i64_unmasked:1479; RV32: # %bb.0:1480; RV32-NEXT: addi sp, sp, -161481; RV32-NEXT: .cfi_def_cfa_offset 161482; RV32-NEXT: sw a0, 8(sp)1483; RV32-NEXT: sw a1, 12(sp)1484; RV32-NEXT: addi a0, sp, 81485; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1486; RV32-NEXT: vlse64.v v12, (a0), zero1487; RV32-NEXT: vand.vv v8, v8, v121488; RV32-NEXT: addi sp, sp, 161489; RV32-NEXT: .cfi_def_cfa_offset 01490; RV32-NEXT: ret1491;1492; RV64-LABEL: vand_vx_nxv4i64_unmasked:1493; RV64: # %bb.0:1494; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1495; RV64-NEXT: vand.vx v8, v8, a01496; RV64-NEXT: ret1497 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01498 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1499 %v = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1500 ret <vscale x 4 x i64> %v1501}1502 1503define <vscale x 4 x i64> @vand_vi_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {1504; CHECK-LABEL: vand_vi_nxv4i64:1505; CHECK: # %bb.0:1506; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1507; CHECK-NEXT: vand.vi v8, v8, 4, v0.t1508; CHECK-NEXT: ret1509 %v = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> splat (i64 4), <vscale x 4 x i1> %m, i32 %evl)1510 ret <vscale x 4 x i64> %v1511}1512 1513define <vscale x 4 x i64> @vand_vi_nxv4i64_unmasked(<vscale x 4 x i64> %va, i32 zeroext %evl) {1514; CHECK-LABEL: vand_vi_nxv4i64_unmasked:1515; CHECK: # %bb.0:1516; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1517; CHECK-NEXT: vand.vi v8, v8, 41518; CHECK-NEXT: ret1519 %v = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> splat (i64 4), <vscale x 4 x i1> splat (i1 true), i32 %evl)1520 ret <vscale x 4 x i64> %v1521}1522 1523define <vscale x 8 x i64> @vand_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1524; CHECK-LABEL: vand_vv_nxv8i64:1525; CHECK: # %bb.0:1526; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1527; CHECK-NEXT: vand.vv v8, v8, v16, v0.t1528; CHECK-NEXT: ret1529 %v = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 %evl)1530 ret <vscale x 8 x i64> %v1531}1532 1533define <vscale x 8 x i64> @vand_vv_nxv8i64_unmasked(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, i32 zeroext %evl) {1534; CHECK-LABEL: vand_vv_nxv8i64_unmasked:1535; CHECK: # %bb.0:1536; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1537; CHECK-NEXT: vand.vv v8, v8, v161538; CHECK-NEXT: ret1539 %v = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1540 ret <vscale x 8 x i64> %v1541}1542 1543define <vscale x 8 x i64> @vand_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1544; RV32-LABEL: vand_vx_nxv8i64:1545; RV32: # %bb.0:1546; RV32-NEXT: addi sp, sp, -161547; RV32-NEXT: .cfi_def_cfa_offset 161548; RV32-NEXT: sw a0, 8(sp)1549; RV32-NEXT: sw a1, 12(sp)1550; RV32-NEXT: addi a0, sp, 81551; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1552; RV32-NEXT: vlse64.v v16, (a0), zero1553; RV32-NEXT: vand.vv v8, v8, v16, v0.t1554; RV32-NEXT: addi sp, sp, 161555; RV32-NEXT: .cfi_def_cfa_offset 01556; RV32-NEXT: ret1557;1558; RV64-LABEL: vand_vx_nxv8i64:1559; RV64: # %bb.0:1560; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1561; RV64-NEXT: vand.vx v8, v8, a0, v0.t1562; RV64-NEXT: ret1563 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01564 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1565 %v = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 %evl)1566 ret <vscale x 8 x i64> %v1567}1568 1569define <vscale x 8 x i64> @vand_vx_nxv8i64_unmasked(<vscale x 8 x i64> %va, i64 %b, i32 zeroext %evl) {1570; RV32-LABEL: vand_vx_nxv8i64_unmasked:1571; RV32: # %bb.0:1572; RV32-NEXT: addi sp, sp, -161573; RV32-NEXT: .cfi_def_cfa_offset 161574; RV32-NEXT: sw a0, 8(sp)1575; RV32-NEXT: sw a1, 12(sp)1576; RV32-NEXT: addi a0, sp, 81577; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1578; RV32-NEXT: vlse64.v v16, (a0), zero1579; RV32-NEXT: vand.vv v8, v8, v161580; RV32-NEXT: addi sp, sp, 161581; RV32-NEXT: .cfi_def_cfa_offset 01582; RV32-NEXT: ret1583;1584; RV64-LABEL: vand_vx_nxv8i64_unmasked:1585; RV64: # %bb.0:1586; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1587; RV64-NEXT: vand.vx v8, v8, a01588; RV64-NEXT: ret1589 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01590 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1591 %v = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1592 ret <vscale x 8 x i64> %v1593}1594 1595define <vscale x 8 x i64> @vand_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {1596; CHECK-LABEL: vand_vi_nxv8i64:1597; CHECK: # %bb.0:1598; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1599; CHECK-NEXT: vand.vi v8, v8, 4, v0.t1600; CHECK-NEXT: ret1601 %v = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), <vscale x 8 x i1> %m, i32 %evl)1602 ret <vscale x 8 x i64> %v1603}1604 1605define <vscale x 8 x i64> @vand_vi_nxv8i64_unmasked(<vscale x 8 x i64> %va, i32 zeroext %evl) {1606; CHECK-LABEL: vand_vi_nxv8i64_unmasked:1607; CHECK: # %bb.0:1608; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1609; CHECK-NEXT: vand.vi v8, v8, 41610; CHECK-NEXT: ret1611 %v = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> splat (i64 4), <vscale x 8 x i1> splat (i1 true), i32 %evl)1612 ret <vscale x 8 x i64> %v1613}1614