1480 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-RV323; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-RV644; RUN: llc -mtriple=riscv32 -mattr=+v,+zvkb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-ZVKB,CHECK-ZVKB325; RUN: llc -mtriple=riscv64 -mattr=+v,+zvkb -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK-ZVKB,CHECK-ZVKB646 7define <vscale x 1 x i8> @vandn_vv_vp_nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i1> %mask, i32 zeroext %evl) {8; CHECK-LABEL: vandn_vv_vp_nxv1i8:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma11; CHECK-NEXT: vnot.v v8, v8, v0.t12; CHECK-NEXT: vand.vv v8, v8, v9, v0.t13; CHECK-NEXT: ret14;15; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv1i8:16; CHECK-ZVKB: # %bb.0:17; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, mf8, ta, ma18; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t19; CHECK-ZVKB-NEXT: ret20 %not.a = call <vscale x 1 x i8> @llvm.vp.xor.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> splat (i8 -1), <vscale x 1 x i1> %mask, i32 %evl)21 %x = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %not.a, <vscale x 1 x i8> %b, <vscale x 1 x i1> %mask, i32 %evl)22 ret <vscale x 1 x i8> %x23}24 25define <vscale x 1 x i8> @vandn_vv_vp_swapped_nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> %b, <vscale x 1 x i1> %mask, i32 zeroext %evl) {26; CHECK-LABEL: vandn_vv_vp_swapped_nxv1i8:27; CHECK: # %bb.0:28; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma29; CHECK-NEXT: vnot.v v8, v8, v0.t30; CHECK-NEXT: vand.vv v8, v9, v8, v0.t31; CHECK-NEXT: ret32;33; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv1i8:34; CHECK-ZVKB: # %bb.0:35; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, mf8, ta, ma36; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t37; CHECK-ZVKB-NEXT: ret38 %not.a = call <vscale x 1 x i8> @llvm.vp.xor.nxv1i8(<vscale x 1 x i8> %a, <vscale x 1 x i8> splat (i8 -1), <vscale x 1 x i1> %mask, i32 %evl)39 %x = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %b, <vscale x 1 x i8> %not.a, <vscale x 1 x i1> %mask, i32 %evl)40 ret <vscale x 1 x i8> %x41}42 43define <vscale x 1 x i8> @vandn_vx_vp_nxv1i8(i8 %a, <vscale x 1 x i8> %b, <vscale x 1 x i1> %mask, i32 zeroext %evl) {44; CHECK-LABEL: vandn_vx_vp_nxv1i8:45; CHECK: # %bb.0:46; CHECK-NEXT: not a0, a047; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma48; CHECK-NEXT: vand.vx v8, v8, a0, v0.t49; CHECK-NEXT: ret50;51; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv1i8:52; CHECK-ZVKB: # %bb.0:53; CHECK-ZVKB-NEXT: vsetvli zero, a1, e8, mf8, ta, ma54; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t55; CHECK-ZVKB-NEXT: ret56 %not.a = xor i8 %a, -157 %head.not.a = insertelement <vscale x 1 x i8> poison, i8 %not.a, i32 058 %splat.not.a = shufflevector <vscale x 1 x i8> %head.not.a, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer59 %x = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %b, <vscale x 1 x i8> %splat.not.a, <vscale x 1 x i1> %mask, i32 %evl)60 ret <vscale x 1 x i8> %x61}62 63define <vscale x 2 x i8> @vandn_vv_vp_nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i1> %mask, i32 zeroext %evl) {64; CHECK-LABEL: vandn_vv_vp_nxv2i8:65; CHECK: # %bb.0:66; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma67; CHECK-NEXT: vnot.v v8, v8, v0.t68; CHECK-NEXT: vand.vv v8, v8, v9, v0.t69; CHECK-NEXT: ret70;71; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv2i8:72; CHECK-ZVKB: # %bb.0:73; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, mf4, ta, ma74; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t75; CHECK-ZVKB-NEXT: ret76 %not.a = call <vscale x 2 x i8> @llvm.vp.xor.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> splat (i8 -1), <vscale x 2 x i1> %mask, i32 %evl)77 %x = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %not.a, <vscale x 2 x i8> %b, <vscale x 2 x i1> %mask, i32 %evl)78 ret <vscale x 2 x i8> %x79}80 81define <vscale x 2 x i8> @vandn_vv_vp_swapped_nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> %b, <vscale x 2 x i1> %mask, i32 zeroext %evl) {82; CHECK-LABEL: vandn_vv_vp_swapped_nxv2i8:83; CHECK: # %bb.0:84; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma85; CHECK-NEXT: vnot.v v8, v8, v0.t86; CHECK-NEXT: vand.vv v8, v9, v8, v0.t87; CHECK-NEXT: ret88;89; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv2i8:90; CHECK-ZVKB: # %bb.0:91; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, mf4, ta, ma92; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t93; CHECK-ZVKB-NEXT: ret94 %not.a = call <vscale x 2 x i8> @llvm.vp.xor.nxv2i8(<vscale x 2 x i8> %a, <vscale x 2 x i8> splat (i8 -1), <vscale x 2 x i1> %mask, i32 %evl)95 %x = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %b, <vscale x 2 x i8> %not.a, <vscale x 2 x i1> %mask, i32 %evl)96 ret <vscale x 2 x i8> %x97}98 99define <vscale x 2 x i8> @vandn_vx_vp_nxv2i8(i8 %a, <vscale x 2 x i8> %b, <vscale x 2 x i1> %mask, i32 zeroext %evl) {100; CHECK-LABEL: vandn_vx_vp_nxv2i8:101; CHECK: # %bb.0:102; CHECK-NEXT: not a0, a0103; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma104; CHECK-NEXT: vand.vx v8, v8, a0, v0.t105; CHECK-NEXT: ret106;107; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv2i8:108; CHECK-ZVKB: # %bb.0:109; CHECK-ZVKB-NEXT: vsetvli zero, a1, e8, mf4, ta, ma110; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t111; CHECK-ZVKB-NEXT: ret112 %not.a = xor i8 %a, -1113 %head.not.a = insertelement <vscale x 2 x i8> poison, i8 %not.a, i32 0114 %splat.not.a = shufflevector <vscale x 2 x i8> %head.not.a, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer115 %x = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %b, <vscale x 2 x i8> %splat.not.a, <vscale x 2 x i1> %mask, i32 %evl)116 ret <vscale x 2 x i8> %x117}118 119define <vscale x 4 x i8> @vandn_vv_vp_nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i1> %mask, i32 zeroext %evl) {120; CHECK-LABEL: vandn_vv_vp_nxv4i8:121; CHECK: # %bb.0:122; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma123; CHECK-NEXT: vnot.v v8, v8, v0.t124; CHECK-NEXT: vand.vv v8, v8, v9, v0.t125; CHECK-NEXT: ret126;127; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv4i8:128; CHECK-ZVKB: # %bb.0:129; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, mf2, ta, ma130; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t131; CHECK-ZVKB-NEXT: ret132 %not.a = call <vscale x 4 x i8> @llvm.vp.xor.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> splat (i8 -1), <vscale x 4 x i1> %mask, i32 %evl)133 %x = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %not.a, <vscale x 4 x i8> %b, <vscale x 4 x i1> %mask, i32 %evl)134 ret <vscale x 4 x i8> %x135}136 137define <vscale x 4 x i8> @vandn_vv_vp_swapped_nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> %b, <vscale x 4 x i1> %mask, i32 zeroext %evl) {138; CHECK-LABEL: vandn_vv_vp_swapped_nxv4i8:139; CHECK: # %bb.0:140; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma141; CHECK-NEXT: vnot.v v8, v8, v0.t142; CHECK-NEXT: vand.vv v8, v9, v8, v0.t143; CHECK-NEXT: ret144;145; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv4i8:146; CHECK-ZVKB: # %bb.0:147; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, mf2, ta, ma148; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t149; CHECK-ZVKB-NEXT: ret150 %not.a = call <vscale x 4 x i8> @llvm.vp.xor.nxv4i8(<vscale x 4 x i8> %a, <vscale x 4 x i8> splat (i8 -1), <vscale x 4 x i1> %mask, i32 %evl)151 %x = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %b, <vscale x 4 x i8> %not.a, <vscale x 4 x i1> %mask, i32 %evl)152 ret <vscale x 4 x i8> %x153}154 155define <vscale x 4 x i8> @vandn_vx_vp_nxv4i8(i8 %a, <vscale x 4 x i8> %b, <vscale x 4 x i1> %mask, i32 zeroext %evl) {156; CHECK-LABEL: vandn_vx_vp_nxv4i8:157; CHECK: # %bb.0:158; CHECK-NEXT: not a0, a0159; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma160; CHECK-NEXT: vand.vx v8, v8, a0, v0.t161; CHECK-NEXT: ret162;163; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv4i8:164; CHECK-ZVKB: # %bb.0:165; CHECK-ZVKB-NEXT: vsetvli zero, a1, e8, mf2, ta, ma166; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t167; CHECK-ZVKB-NEXT: ret168 %not.a = xor i8 %a, -1169 %head.not.a = insertelement <vscale x 4 x i8> poison, i8 %not.a, i32 0170 %splat.not.a = shufflevector <vscale x 4 x i8> %head.not.a, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer171 %x = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %b, <vscale x 4 x i8> %splat.not.a, <vscale x 4 x i1> %mask, i32 %evl)172 ret <vscale x 4 x i8> %x173}174 175define <vscale x 8 x i8> @vandn_vv_vp_nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {176; CHECK-LABEL: vandn_vv_vp_nxv8i8:177; CHECK: # %bb.0:178; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma179; CHECK-NEXT: vnot.v v8, v8, v0.t180; CHECK-NEXT: vand.vv v8, v8, v9, v0.t181; CHECK-NEXT: ret182;183; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv8i8:184; CHECK-ZVKB: # %bb.0:185; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, m1, ta, ma186; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t187; CHECK-ZVKB-NEXT: ret188 %not.a = call <vscale x 8 x i8> @llvm.vp.xor.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> splat (i8 -1), <vscale x 8 x i1> %mask, i32 %evl)189 %x = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %not.a, <vscale x 8 x i8> %b, <vscale x 8 x i1> %mask, i32 %evl)190 ret <vscale x 8 x i8> %x191}192 193define <vscale x 8 x i8> @vandn_vv_vp_swapped_nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {194; CHECK-LABEL: vandn_vv_vp_swapped_nxv8i8:195; CHECK: # %bb.0:196; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma197; CHECK-NEXT: vnot.v v8, v8, v0.t198; CHECK-NEXT: vand.vv v8, v9, v8, v0.t199; CHECK-NEXT: ret200;201; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv8i8:202; CHECK-ZVKB: # %bb.0:203; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, m1, ta, ma204; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t205; CHECK-ZVKB-NEXT: ret206 %not.a = call <vscale x 8 x i8> @llvm.vp.xor.nxv8i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> splat (i8 -1), <vscale x 8 x i1> %mask, i32 %evl)207 %x = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %b, <vscale x 8 x i8> %not.a, <vscale x 8 x i1> %mask, i32 %evl)208 ret <vscale x 8 x i8> %x209}210 211define <vscale x 8 x i8> @vandn_vx_vp_nxv8i8(i8 %a, <vscale x 8 x i8> %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {212; CHECK-LABEL: vandn_vx_vp_nxv8i8:213; CHECK: # %bb.0:214; CHECK-NEXT: not a0, a0215; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma216; CHECK-NEXT: vand.vx v8, v8, a0, v0.t217; CHECK-NEXT: ret218;219; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv8i8:220; CHECK-ZVKB: # %bb.0:221; CHECK-ZVKB-NEXT: vsetvli zero, a1, e8, m1, ta, ma222; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t223; CHECK-ZVKB-NEXT: ret224 %not.a = xor i8 %a, -1225 %head.not.a = insertelement <vscale x 8 x i8> poison, i8 %not.a, i32 0226 %splat.not.a = shufflevector <vscale x 8 x i8> %head.not.a, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer227 %x = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %b, <vscale x 8 x i8> %splat.not.a, <vscale x 8 x i1> %mask, i32 %evl)228 ret <vscale x 8 x i8> %x229}230 231define <vscale x 16 x i8> @vandn_vv_vp_nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i1> %mask, i32 zeroext %evl) {232; CHECK-LABEL: vandn_vv_vp_nxv16i8:233; CHECK: # %bb.0:234; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma235; CHECK-NEXT: vnot.v v8, v8, v0.t236; CHECK-NEXT: vand.vv v8, v8, v10, v0.t237; CHECK-NEXT: ret238;239; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv16i8:240; CHECK-ZVKB: # %bb.0:241; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, m2, ta, ma242; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8, v0.t243; CHECK-ZVKB-NEXT: ret244 %not.a = call <vscale x 16 x i8> @llvm.vp.xor.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> splat (i8 -1), <vscale x 16 x i1> %mask, i32 %evl)245 %x = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %not.a, <vscale x 16 x i8> %b, <vscale x 16 x i1> %mask, i32 %evl)246 ret <vscale x 16 x i8> %x247}248 249define <vscale x 16 x i8> @vandn_vv_vp_swapped_nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i1> %mask, i32 zeroext %evl) {250; CHECK-LABEL: vandn_vv_vp_swapped_nxv16i8:251; CHECK: # %bb.0:252; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma253; CHECK-NEXT: vnot.v v8, v8, v0.t254; CHECK-NEXT: vand.vv v8, v10, v8, v0.t255; CHECK-NEXT: ret256;257; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv16i8:258; CHECK-ZVKB: # %bb.0:259; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, m2, ta, ma260; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8, v0.t261; CHECK-ZVKB-NEXT: ret262 %not.a = call <vscale x 16 x i8> @llvm.vp.xor.nxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> splat (i8 -1), <vscale x 16 x i1> %mask, i32 %evl)263 %x = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %b, <vscale x 16 x i8> %not.a, <vscale x 16 x i1> %mask, i32 %evl)264 ret <vscale x 16 x i8> %x265}266 267define <vscale x 16 x i8> @vandn_vx_vp_nxv16i8(i8 %a, <vscale x 16 x i8> %b, <vscale x 16 x i1> %mask, i32 zeroext %evl) {268; CHECK-LABEL: vandn_vx_vp_nxv16i8:269; CHECK: # %bb.0:270; CHECK-NEXT: not a0, a0271; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma272; CHECK-NEXT: vand.vx v8, v8, a0, v0.t273; CHECK-NEXT: ret274;275; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv16i8:276; CHECK-ZVKB: # %bb.0:277; CHECK-ZVKB-NEXT: vsetvli zero, a1, e8, m2, ta, ma278; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t279; CHECK-ZVKB-NEXT: ret280 %not.a = xor i8 %a, -1281 %head.not.a = insertelement <vscale x 16 x i8> poison, i8 %not.a, i32 0282 %splat.not.a = shufflevector <vscale x 16 x i8> %head.not.a, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer283 %x = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %b, <vscale x 16 x i8> %splat.not.a, <vscale x 16 x i1> %mask, i32 %evl)284 ret <vscale x 16 x i8> %x285}286 287define <vscale x 32 x i8> @vandn_vv_vp_nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i1> %mask, i32 zeroext %evl) {288; CHECK-LABEL: vandn_vv_vp_nxv32i8:289; CHECK: # %bb.0:290; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma291; CHECK-NEXT: vnot.v v8, v8, v0.t292; CHECK-NEXT: vand.vv v8, v8, v12, v0.t293; CHECK-NEXT: ret294;295; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv32i8:296; CHECK-ZVKB: # %bb.0:297; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, m4, ta, ma298; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8, v0.t299; CHECK-ZVKB-NEXT: ret300 %not.a = call <vscale x 32 x i8> @llvm.vp.xor.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> splat (i8 -1), <vscale x 32 x i1> %mask, i32 %evl)301 %x = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %not.a, <vscale x 32 x i8> %b, <vscale x 32 x i1> %mask, i32 %evl)302 ret <vscale x 32 x i8> %x303}304 305define <vscale x 32 x i8> @vandn_vv_vp_swapped_nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> %b, <vscale x 32 x i1> %mask, i32 zeroext %evl) {306; CHECK-LABEL: vandn_vv_vp_swapped_nxv32i8:307; CHECK: # %bb.0:308; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma309; CHECK-NEXT: vnot.v v8, v8, v0.t310; CHECK-NEXT: vand.vv v8, v12, v8, v0.t311; CHECK-NEXT: ret312;313; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv32i8:314; CHECK-ZVKB: # %bb.0:315; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, m4, ta, ma316; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8, v0.t317; CHECK-ZVKB-NEXT: ret318 %not.a = call <vscale x 32 x i8> @llvm.vp.xor.nxv32i8(<vscale x 32 x i8> %a, <vscale x 32 x i8> splat (i8 -1), <vscale x 32 x i1> %mask, i32 %evl)319 %x = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %b, <vscale x 32 x i8> %not.a, <vscale x 32 x i1> %mask, i32 %evl)320 ret <vscale x 32 x i8> %x321}322 323define <vscale x 32 x i8> @vandn_vx_vp_nxv32i8(i8 %a, <vscale x 32 x i8> %b, <vscale x 32 x i1> %mask, i32 zeroext %evl) {324; CHECK-LABEL: vandn_vx_vp_nxv32i8:325; CHECK: # %bb.0:326; CHECK-NEXT: not a0, a0327; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma328; CHECK-NEXT: vand.vx v8, v8, a0, v0.t329; CHECK-NEXT: ret330;331; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv32i8:332; CHECK-ZVKB: # %bb.0:333; CHECK-ZVKB-NEXT: vsetvli zero, a1, e8, m4, ta, ma334; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t335; CHECK-ZVKB-NEXT: ret336 %not.a = xor i8 %a, -1337 %head.not.a = insertelement <vscale x 32 x i8> poison, i8 %not.a, i32 0338 %splat.not.a = shufflevector <vscale x 32 x i8> %head.not.a, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer339 %x = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %b, <vscale x 32 x i8> %splat.not.a, <vscale x 32 x i1> %mask, i32 %evl)340 ret <vscale x 32 x i8> %x341}342 343define <vscale x 64 x i8> @vandn_vv_vp_nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i1> %mask, i32 zeroext %evl) {344; CHECK-LABEL: vandn_vv_vp_nxv64i8:345; CHECK: # %bb.0:346; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma347; CHECK-NEXT: vnot.v v8, v8, v0.t348; CHECK-NEXT: vand.vv v8, v8, v16, v0.t349; CHECK-NEXT: ret350;351; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv64i8:352; CHECK-ZVKB: # %bb.0:353; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, m8, ta, ma354; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8, v0.t355; CHECK-ZVKB-NEXT: ret356 %not.a = call <vscale x 64 x i8> @llvm.vp.xor.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> splat (i8 -1), <vscale x 64 x i1> %mask, i32 %evl)357 %x = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %not.a, <vscale x 64 x i8> %b, <vscale x 64 x i1> %mask, i32 %evl)358 ret <vscale x 64 x i8> %x359}360 361define <vscale x 64 x i8> @vandn_vv_vp_swapped_nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b, <vscale x 64 x i1> %mask, i32 zeroext %evl) {362; CHECK-LABEL: vandn_vv_vp_swapped_nxv64i8:363; CHECK: # %bb.0:364; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma365; CHECK-NEXT: vnot.v v8, v8, v0.t366; CHECK-NEXT: vand.vv v8, v16, v8, v0.t367; CHECK-NEXT: ret368;369; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv64i8:370; CHECK-ZVKB: # %bb.0:371; CHECK-ZVKB-NEXT: vsetvli zero, a0, e8, m8, ta, ma372; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8, v0.t373; CHECK-ZVKB-NEXT: ret374 %not.a = call <vscale x 64 x i8> @llvm.vp.xor.nxv64i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> splat (i8 -1), <vscale x 64 x i1> %mask, i32 %evl)375 %x = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %b, <vscale x 64 x i8> %not.a, <vscale x 64 x i1> %mask, i32 %evl)376 ret <vscale x 64 x i8> %x377}378 379define <vscale x 64 x i8> @vandn_vx_vp_nxv64i8(i8 %a, <vscale x 64 x i8> %b, <vscale x 64 x i1> %mask, i32 zeroext %evl) {380; CHECK-LABEL: vandn_vx_vp_nxv64i8:381; CHECK: # %bb.0:382; CHECK-NEXT: not a0, a0383; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma384; CHECK-NEXT: vand.vx v8, v8, a0, v0.t385; CHECK-NEXT: ret386;387; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv64i8:388; CHECK-ZVKB: # %bb.0:389; CHECK-ZVKB-NEXT: vsetvli zero, a1, e8, m8, ta, ma390; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t391; CHECK-ZVKB-NEXT: ret392 %not.a = xor i8 %a, -1393 %head.not.a = insertelement <vscale x 64 x i8> poison, i8 %not.a, i32 0394 %splat.not.a = shufflevector <vscale x 64 x i8> %head.not.a, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer395 %x = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %b, <vscale x 64 x i8> %splat.not.a, <vscale x 64 x i1> %mask, i32 %evl)396 ret <vscale x 64 x i8> %x397}398 399define <vscale x 1 x i16> @vandn_vv_vp_nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i1> %mask, i32 zeroext %evl) {400; CHECK-LABEL: vandn_vv_vp_nxv1i16:401; CHECK: # %bb.0:402; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma403; CHECK-NEXT: vnot.v v8, v8, v0.t404; CHECK-NEXT: vand.vv v8, v8, v9, v0.t405; CHECK-NEXT: ret406;407; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv1i16:408; CHECK-ZVKB: # %bb.0:409; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma410; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t411; CHECK-ZVKB-NEXT: ret412 %not.a = call <vscale x 1 x i16> @llvm.vp.xor.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> splat (i16 -1), <vscale x 1 x i1> %mask, i32 %evl)413 %x = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %not.a, <vscale x 1 x i16> %b, <vscale x 1 x i1> %mask, i32 %evl)414 ret <vscale x 1 x i16> %x415}416 417define <vscale x 1 x i16> @vandn_vv_vp_swapped_nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> %b, <vscale x 1 x i1> %mask, i32 zeroext %evl) {418; CHECK-LABEL: vandn_vv_vp_swapped_nxv1i16:419; CHECK: # %bb.0:420; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma421; CHECK-NEXT: vnot.v v8, v8, v0.t422; CHECK-NEXT: vand.vv v8, v9, v8, v0.t423; CHECK-NEXT: ret424;425; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv1i16:426; CHECK-ZVKB: # %bb.0:427; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma428; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t429; CHECK-ZVKB-NEXT: ret430 %not.a = call <vscale x 1 x i16> @llvm.vp.xor.nxv1i16(<vscale x 1 x i16> %a, <vscale x 1 x i16> splat (i16 -1), <vscale x 1 x i1> %mask, i32 %evl)431 %x = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %b, <vscale x 1 x i16> %not.a, <vscale x 1 x i1> %mask, i32 %evl)432 ret <vscale x 1 x i16> %x433}434 435define <vscale x 1 x i16> @vandn_vx_vp_nxv1i16(i16 %a, <vscale x 1 x i16> %b, <vscale x 1 x i1> %mask, i32 zeroext %evl) {436; CHECK-LABEL: vandn_vx_vp_nxv1i16:437; CHECK: # %bb.0:438; CHECK-NEXT: not a0, a0439; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma440; CHECK-NEXT: vand.vx v8, v8, a0, v0.t441; CHECK-NEXT: ret442;443; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv1i16:444; CHECK-ZVKB: # %bb.0:445; CHECK-ZVKB-NEXT: vsetvli zero, a1, e16, mf4, ta, ma446; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t447; CHECK-ZVKB-NEXT: ret448 %not.a = xor i16 %a, -1449 %head.not.a = insertelement <vscale x 1 x i16> poison, i16 %not.a, i32 0450 %splat.not.a = shufflevector <vscale x 1 x i16> %head.not.a, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer451 %x = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %b, <vscale x 1 x i16> %splat.not.a, <vscale x 1 x i1> %mask, i32 %evl)452 ret <vscale x 1 x i16> %x453}454 455define <vscale x 2 x i16> @vandn_vv_vp_nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i1> %mask, i32 zeroext %evl) {456; CHECK-LABEL: vandn_vv_vp_nxv2i16:457; CHECK: # %bb.0:458; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma459; CHECK-NEXT: vnot.v v8, v8, v0.t460; CHECK-NEXT: vand.vv v8, v8, v9, v0.t461; CHECK-NEXT: ret462;463; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv2i16:464; CHECK-ZVKB: # %bb.0:465; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, mf2, ta, ma466; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t467; CHECK-ZVKB-NEXT: ret468 %not.a = call <vscale x 2 x i16> @llvm.vp.xor.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> splat (i16 -1), <vscale x 2 x i1> %mask, i32 %evl)469 %x = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %not.a, <vscale x 2 x i16> %b, <vscale x 2 x i1> %mask, i32 %evl)470 ret <vscale x 2 x i16> %x471}472 473define <vscale x 2 x i16> @vandn_vv_vp_swapped_nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, <vscale x 2 x i1> %mask, i32 zeroext %evl) {474; CHECK-LABEL: vandn_vv_vp_swapped_nxv2i16:475; CHECK: # %bb.0:476; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma477; CHECK-NEXT: vnot.v v8, v8, v0.t478; CHECK-NEXT: vand.vv v8, v9, v8, v0.t479; CHECK-NEXT: ret480;481; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv2i16:482; CHECK-ZVKB: # %bb.0:483; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, mf2, ta, ma484; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t485; CHECK-ZVKB-NEXT: ret486 %not.a = call <vscale x 2 x i16> @llvm.vp.xor.nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> splat (i16 -1), <vscale x 2 x i1> %mask, i32 %evl)487 %x = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %b, <vscale x 2 x i16> %not.a, <vscale x 2 x i1> %mask, i32 %evl)488 ret <vscale x 2 x i16> %x489}490 491define <vscale x 2 x i16> @vandn_vx_vp_nxv2i16(i16 %a, <vscale x 2 x i16> %b, <vscale x 2 x i1> %mask, i32 zeroext %evl) {492; CHECK-LABEL: vandn_vx_vp_nxv2i16:493; CHECK: # %bb.0:494; CHECK-NEXT: not a0, a0495; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma496; CHECK-NEXT: vand.vx v8, v8, a0, v0.t497; CHECK-NEXT: ret498;499; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv2i16:500; CHECK-ZVKB: # %bb.0:501; CHECK-ZVKB-NEXT: vsetvli zero, a1, e16, mf2, ta, ma502; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t503; CHECK-ZVKB-NEXT: ret504 %not.a = xor i16 %a, -1505 %head.not.a = insertelement <vscale x 2 x i16> poison, i16 %not.a, i32 0506 %splat.not.a = shufflevector <vscale x 2 x i16> %head.not.a, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer507 %x = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %b, <vscale x 2 x i16> %splat.not.a, <vscale x 2 x i1> %mask, i32 %evl)508 ret <vscale x 2 x i16> %x509}510 511define <vscale x 4 x i16> @vandn_vv_vp_nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i1> %mask, i32 zeroext %evl) {512; CHECK-LABEL: vandn_vv_vp_nxv4i16:513; CHECK: # %bb.0:514; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma515; CHECK-NEXT: vnot.v v8, v8, v0.t516; CHECK-NEXT: vand.vv v8, v8, v9, v0.t517; CHECK-NEXT: ret518;519; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv4i16:520; CHECK-ZVKB: # %bb.0:521; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, m1, ta, ma522; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t523; CHECK-ZVKB-NEXT: ret524 %not.a = call <vscale x 4 x i16> @llvm.vp.xor.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> splat (i16 -1), <vscale x 4 x i1> %mask, i32 %evl)525 %x = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %not.a, <vscale x 4 x i16> %b, <vscale x 4 x i1> %mask, i32 %evl)526 ret <vscale x 4 x i16> %x527}528 529define <vscale x 4 x i16> @vandn_vv_vp_swapped_nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> %b, <vscale x 4 x i1> %mask, i32 zeroext %evl) {530; CHECK-LABEL: vandn_vv_vp_swapped_nxv4i16:531; CHECK: # %bb.0:532; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma533; CHECK-NEXT: vnot.v v8, v8, v0.t534; CHECK-NEXT: vand.vv v8, v9, v8, v0.t535; CHECK-NEXT: ret536;537; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv4i16:538; CHECK-ZVKB: # %bb.0:539; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, m1, ta, ma540; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t541; CHECK-ZVKB-NEXT: ret542 %not.a = call <vscale x 4 x i16> @llvm.vp.xor.nxv4i16(<vscale x 4 x i16> %a, <vscale x 4 x i16> splat (i16 -1), <vscale x 4 x i1> %mask, i32 %evl)543 %x = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %b, <vscale x 4 x i16> %not.a, <vscale x 4 x i1> %mask, i32 %evl)544 ret <vscale x 4 x i16> %x545}546 547define <vscale x 4 x i16> @vandn_vx_vp_nxv4i16(i16 %a, <vscale x 4 x i16> %b, <vscale x 4 x i1> %mask, i32 zeroext %evl) {548; CHECK-LABEL: vandn_vx_vp_nxv4i16:549; CHECK: # %bb.0:550; CHECK-NEXT: not a0, a0551; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma552; CHECK-NEXT: vand.vx v8, v8, a0, v0.t553; CHECK-NEXT: ret554;555; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv4i16:556; CHECK-ZVKB: # %bb.0:557; CHECK-ZVKB-NEXT: vsetvli zero, a1, e16, m1, ta, ma558; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t559; CHECK-ZVKB-NEXT: ret560 %not.a = xor i16 %a, -1561 %head.not.a = insertelement <vscale x 4 x i16> poison, i16 %not.a, i32 0562 %splat.not.a = shufflevector <vscale x 4 x i16> %head.not.a, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer563 %x = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %b, <vscale x 4 x i16> %splat.not.a, <vscale x 4 x i1> %mask, i32 %evl)564 ret <vscale x 4 x i16> %x565}566 567define <vscale x 8 x i16> @vandn_vv_vp_nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {568; CHECK-LABEL: vandn_vv_vp_nxv8i16:569; CHECK: # %bb.0:570; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma571; CHECK-NEXT: vnot.v v8, v8, v0.t572; CHECK-NEXT: vand.vv v8, v8, v10, v0.t573; CHECK-NEXT: ret574;575; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv8i16:576; CHECK-ZVKB: # %bb.0:577; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, m2, ta, ma578; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8, v0.t579; CHECK-ZVKB-NEXT: ret580 %not.a = call <vscale x 8 x i16> @llvm.vp.xor.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> splat (i16 -1), <vscale x 8 x i1> %mask, i32 %evl)581 %x = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %not.a, <vscale x 8 x i16> %b, <vscale x 8 x i1> %mask, i32 %evl)582 ret <vscale x 8 x i16> %x583}584 585define <vscale x 8 x i16> @vandn_vv_vp_swapped_nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {586; CHECK-LABEL: vandn_vv_vp_swapped_nxv8i16:587; CHECK: # %bb.0:588; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma589; CHECK-NEXT: vnot.v v8, v8, v0.t590; CHECK-NEXT: vand.vv v8, v10, v8, v0.t591; CHECK-NEXT: ret592;593; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv8i16:594; CHECK-ZVKB: # %bb.0:595; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, m2, ta, ma596; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8, v0.t597; CHECK-ZVKB-NEXT: ret598 %not.a = call <vscale x 8 x i16> @llvm.vp.xor.nxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> splat (i16 -1), <vscale x 8 x i1> %mask, i32 %evl)599 %x = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %b, <vscale x 8 x i16> %not.a, <vscale x 8 x i1> %mask, i32 %evl)600 ret <vscale x 8 x i16> %x601}602 603define <vscale x 8 x i16> @vandn_vx_vp_nxv8i16(i16 %a, <vscale x 8 x i16> %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {604; CHECK-LABEL: vandn_vx_vp_nxv8i16:605; CHECK: # %bb.0:606; CHECK-NEXT: not a0, a0607; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma608; CHECK-NEXT: vand.vx v8, v8, a0, v0.t609; CHECK-NEXT: ret610;611; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv8i16:612; CHECK-ZVKB: # %bb.0:613; CHECK-ZVKB-NEXT: vsetvli zero, a1, e16, m2, ta, ma614; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t615; CHECK-ZVKB-NEXT: ret616 %not.a = xor i16 %a, -1617 %head.not.a = insertelement <vscale x 8 x i16> poison, i16 %not.a, i32 0618 %splat.not.a = shufflevector <vscale x 8 x i16> %head.not.a, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer619 %x = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %b, <vscale x 8 x i16> %splat.not.a, <vscale x 8 x i1> %mask, i32 %evl)620 ret <vscale x 8 x i16> %x621}622 623define <vscale x 16 x i16> @vandn_vv_vp_nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i1> %mask, i32 zeroext %evl) {624; CHECK-LABEL: vandn_vv_vp_nxv16i16:625; CHECK: # %bb.0:626; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma627; CHECK-NEXT: vnot.v v8, v8, v0.t628; CHECK-NEXT: vand.vv v8, v8, v12, v0.t629; CHECK-NEXT: ret630;631; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv16i16:632; CHECK-ZVKB: # %bb.0:633; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, m4, ta, ma634; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8, v0.t635; CHECK-ZVKB-NEXT: ret636 %not.a = call <vscale x 16 x i16> @llvm.vp.xor.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> splat (i16 -1), <vscale x 16 x i1> %mask, i32 %evl)637 %x = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %not.a, <vscale x 16 x i16> %b, <vscale x 16 x i1> %mask, i32 %evl)638 ret <vscale x 16 x i16> %x639}640 641define <vscale x 16 x i16> @vandn_vv_vp_swapped_nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> %b, <vscale x 16 x i1> %mask, i32 zeroext %evl) {642; CHECK-LABEL: vandn_vv_vp_swapped_nxv16i16:643; CHECK: # %bb.0:644; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma645; CHECK-NEXT: vnot.v v8, v8, v0.t646; CHECK-NEXT: vand.vv v8, v12, v8, v0.t647; CHECK-NEXT: ret648;649; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv16i16:650; CHECK-ZVKB: # %bb.0:651; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, m4, ta, ma652; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8, v0.t653; CHECK-ZVKB-NEXT: ret654 %not.a = call <vscale x 16 x i16> @llvm.vp.xor.nxv16i16(<vscale x 16 x i16> %a, <vscale x 16 x i16> splat (i16 -1), <vscale x 16 x i1> %mask, i32 %evl)655 %x = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %b, <vscale x 16 x i16> %not.a, <vscale x 16 x i1> %mask, i32 %evl)656 ret <vscale x 16 x i16> %x657}658 659define <vscale x 16 x i16> @vandn_vx_vp_nxv16i16(i16 %a, <vscale x 16 x i16> %b, <vscale x 16 x i1> %mask, i32 zeroext %evl) {660; CHECK-LABEL: vandn_vx_vp_nxv16i16:661; CHECK: # %bb.0:662; CHECK-NEXT: not a0, a0663; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma664; CHECK-NEXT: vand.vx v8, v8, a0, v0.t665; CHECK-NEXT: ret666;667; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv16i16:668; CHECK-ZVKB: # %bb.0:669; CHECK-ZVKB-NEXT: vsetvli zero, a1, e16, m4, ta, ma670; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t671; CHECK-ZVKB-NEXT: ret672 %not.a = xor i16 %a, -1673 %head.not.a = insertelement <vscale x 16 x i16> poison, i16 %not.a, i32 0674 %splat.not.a = shufflevector <vscale x 16 x i16> %head.not.a, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer675 %x = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %b, <vscale x 16 x i16> %splat.not.a, <vscale x 16 x i1> %mask, i32 %evl)676 ret <vscale x 16 x i16> %x677}678 679define <vscale x 32 x i16> @vandn_vv_vp_nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i1> %mask, i32 zeroext %evl) {680; CHECK-LABEL: vandn_vv_vp_nxv32i16:681; CHECK: # %bb.0:682; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma683; CHECK-NEXT: vnot.v v8, v8, v0.t684; CHECK-NEXT: vand.vv v8, v8, v16, v0.t685; CHECK-NEXT: ret686;687; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv32i16:688; CHECK-ZVKB: # %bb.0:689; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, m8, ta, ma690; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8, v0.t691; CHECK-ZVKB-NEXT: ret692 %not.a = call <vscale x 32 x i16> @llvm.vp.xor.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> splat (i16 -1), <vscale x 32 x i1> %mask, i32 %evl)693 %x = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %not.a, <vscale x 32 x i16> %b, <vscale x 32 x i1> %mask, i32 %evl)694 ret <vscale x 32 x i16> %x695}696 697define <vscale x 32 x i16> @vandn_vv_vp_swapped_nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b, <vscale x 32 x i1> %mask, i32 zeroext %evl) {698; CHECK-LABEL: vandn_vv_vp_swapped_nxv32i16:699; CHECK: # %bb.0:700; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma701; CHECK-NEXT: vnot.v v8, v8, v0.t702; CHECK-NEXT: vand.vv v8, v16, v8, v0.t703; CHECK-NEXT: ret704;705; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv32i16:706; CHECK-ZVKB: # %bb.0:707; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, m8, ta, ma708; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8, v0.t709; CHECK-ZVKB-NEXT: ret710 %not.a = call <vscale x 32 x i16> @llvm.vp.xor.nxv32i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> splat (i16 -1), <vscale x 32 x i1> %mask, i32 %evl)711 %x = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %b, <vscale x 32 x i16> %not.a, <vscale x 32 x i1> %mask, i32 %evl)712 ret <vscale x 32 x i16> %x713}714 715define <vscale x 32 x i16> @vandn_vx_vp_nxv32i16(i16 %a, <vscale x 32 x i16> %b, <vscale x 32 x i1> %mask, i32 zeroext %evl) {716; CHECK-LABEL: vandn_vx_vp_nxv32i16:717; CHECK: # %bb.0:718; CHECK-NEXT: not a0, a0719; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma720; CHECK-NEXT: vand.vx v8, v8, a0, v0.t721; CHECK-NEXT: ret722;723; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv32i16:724; CHECK-ZVKB: # %bb.0:725; CHECK-ZVKB-NEXT: vsetvli zero, a1, e16, m8, ta, ma726; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t727; CHECK-ZVKB-NEXT: ret728 %not.a = xor i16 %a, -1729 %head.not.a = insertelement <vscale x 32 x i16> poison, i16 %not.a, i32 0730 %splat.not.a = shufflevector <vscale x 32 x i16> %head.not.a, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer731 %x = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %b, <vscale x 32 x i16> %splat.not.a, <vscale x 32 x i1> %mask, i32 %evl)732 ret <vscale x 32 x i16> %x733}734 735define <vscale x 1 x i32> @vandn_vv_vp_nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i1> %mask, i32 zeroext %evl) {736; CHECK-LABEL: vandn_vv_vp_nxv1i32:737; CHECK: # %bb.0:738; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma739; CHECK-NEXT: vnot.v v8, v8, v0.t740; CHECK-NEXT: vand.vv v8, v8, v9, v0.t741; CHECK-NEXT: ret742;743; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv1i32:744; CHECK-ZVKB: # %bb.0:745; CHECK-ZVKB-NEXT: vsetvli zero, a0, e32, mf2, ta, ma746; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t747; CHECK-ZVKB-NEXT: ret748 %not.a = call <vscale x 1 x i32> @llvm.vp.xor.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> splat (i32 -1), <vscale x 1 x i1> %mask, i32 %evl)749 %x = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %not.a, <vscale x 1 x i32> %b, <vscale x 1 x i1> %mask, i32 %evl)750 ret <vscale x 1 x i32> %x751}752 753define <vscale x 1 x i32> @vandn_vv_vp_swapped_nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i1> %mask, i32 zeroext %evl) {754; CHECK-LABEL: vandn_vv_vp_swapped_nxv1i32:755; CHECK: # %bb.0:756; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma757; CHECK-NEXT: vnot.v v8, v8, v0.t758; CHECK-NEXT: vand.vv v8, v9, v8, v0.t759; CHECK-NEXT: ret760;761; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv1i32:762; CHECK-ZVKB: # %bb.0:763; CHECK-ZVKB-NEXT: vsetvli zero, a0, e32, mf2, ta, ma764; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t765; CHECK-ZVKB-NEXT: ret766 %not.a = call <vscale x 1 x i32> @llvm.vp.xor.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> splat (i32 -1), <vscale x 1 x i1> %mask, i32 %evl)767 %x = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %b, <vscale x 1 x i32> %not.a, <vscale x 1 x i1> %mask, i32 %evl)768 ret <vscale x 1 x i32> %x769}770 771define <vscale x 1 x i32> @vandn_vx_vp_nxv1i32(i32 %a, <vscale x 1 x i32> %b, <vscale x 1 x i1> %mask, i32 zeroext %evl) {772; CHECK-LABEL: vandn_vx_vp_nxv1i32:773; CHECK: # %bb.0:774; CHECK-NEXT: not a0, a0775; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma776; CHECK-NEXT: vand.vx v8, v8, a0, v0.t777; CHECK-NEXT: ret778;779; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv1i32:780; CHECK-ZVKB: # %bb.0:781; CHECK-ZVKB-NEXT: vsetvli zero, a1, e32, mf2, ta, ma782; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t783; CHECK-ZVKB-NEXT: ret784 %not.a = xor i32 %a, -1785 %head.not.a = insertelement <vscale x 1 x i32> poison, i32 %not.a, i32 0786 %splat.not.a = shufflevector <vscale x 1 x i32> %head.not.a, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer787 %x = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %b, <vscale x 1 x i32> %splat.not.a, <vscale x 1 x i1> %mask, i32 %evl)788 ret <vscale x 1 x i32> %x789}790 791define <vscale x 2 x i32> @vandn_vv_vp_nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i1> %mask, i32 zeroext %evl) {792; CHECK-LABEL: vandn_vv_vp_nxv2i32:793; CHECK: # %bb.0:794; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma795; CHECK-NEXT: vnot.v v8, v8, v0.t796; CHECK-NEXT: vand.vv v8, v8, v9, v0.t797; CHECK-NEXT: ret798;799; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv2i32:800; CHECK-ZVKB: # %bb.0:801; CHECK-ZVKB-NEXT: vsetvli zero, a0, e32, m1, ta, ma802; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t803; CHECK-ZVKB-NEXT: ret804 %not.a = call <vscale x 2 x i32> @llvm.vp.xor.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> splat (i32 -1), <vscale x 2 x i1> %mask, i32 %evl)805 %x = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %not.a, <vscale x 2 x i32> %b, <vscale x 2 x i1> %mask, i32 %evl)806 ret <vscale x 2 x i32> %x807}808 809define <vscale x 2 x i32> @vandn_vv_vp_swapped_nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b, <vscale x 2 x i1> %mask, i32 zeroext %evl) {810; CHECK-LABEL: vandn_vv_vp_swapped_nxv2i32:811; CHECK: # %bb.0:812; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma813; CHECK-NEXT: vnot.v v8, v8, v0.t814; CHECK-NEXT: vand.vv v8, v9, v8, v0.t815; CHECK-NEXT: ret816;817; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv2i32:818; CHECK-ZVKB: # %bb.0:819; CHECK-ZVKB-NEXT: vsetvli zero, a0, e32, m1, ta, ma820; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t821; CHECK-ZVKB-NEXT: ret822 %not.a = call <vscale x 2 x i32> @llvm.vp.xor.nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> splat (i32 -1), <vscale x 2 x i1> %mask, i32 %evl)823 %x = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %b, <vscale x 2 x i32> %not.a, <vscale x 2 x i1> %mask, i32 %evl)824 ret <vscale x 2 x i32> %x825}826 827define <vscale x 2 x i32> @vandn_vx_vp_nxv2i32(i32 %a, <vscale x 2 x i32> %b, <vscale x 2 x i1> %mask, i32 zeroext %evl) {828; CHECK-LABEL: vandn_vx_vp_nxv2i32:829; CHECK: # %bb.0:830; CHECK-NEXT: not a0, a0831; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma832; CHECK-NEXT: vand.vx v8, v8, a0, v0.t833; CHECK-NEXT: ret834;835; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv2i32:836; CHECK-ZVKB: # %bb.0:837; CHECK-ZVKB-NEXT: vsetvli zero, a1, e32, m1, ta, ma838; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t839; CHECK-ZVKB-NEXT: ret840 %not.a = xor i32 %a, -1841 %head.not.a = insertelement <vscale x 2 x i32> poison, i32 %not.a, i32 0842 %splat.not.a = shufflevector <vscale x 2 x i32> %head.not.a, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer843 %x = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %b, <vscale x 2 x i32> %splat.not.a, <vscale x 2 x i1> %mask, i32 %evl)844 ret <vscale x 2 x i32> %x845}846 847define <vscale x 4 x i32> @vandn_vv_vp_nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> %mask, i32 zeroext %evl) {848; CHECK-LABEL: vandn_vv_vp_nxv4i32:849; CHECK: # %bb.0:850; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma851; CHECK-NEXT: vnot.v v8, v8, v0.t852; CHECK-NEXT: vand.vv v8, v8, v10, v0.t853; CHECK-NEXT: ret854;855; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv4i32:856; CHECK-ZVKB: # %bb.0:857; CHECK-ZVKB-NEXT: vsetvli zero, a0, e32, m2, ta, ma858; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8, v0.t859; CHECK-ZVKB-NEXT: ret860 %not.a = call <vscale x 4 x i32> @llvm.vp.xor.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> splat (i32 -1), <vscale x 4 x i1> %mask, i32 %evl)861 %x = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %not.a, <vscale x 4 x i32> %b, <vscale x 4 x i1> %mask, i32 %evl)862 ret <vscale x 4 x i32> %x863}864 865define <vscale x 4 x i32> @vandn_vv_vp_swapped_nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> %mask, i32 zeroext %evl) {866; CHECK-LABEL: vandn_vv_vp_swapped_nxv4i32:867; CHECK: # %bb.0:868; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma869; CHECK-NEXT: vnot.v v8, v8, v0.t870; CHECK-NEXT: vand.vv v8, v10, v8, v0.t871; CHECK-NEXT: ret872;873; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv4i32:874; CHECK-ZVKB: # %bb.0:875; CHECK-ZVKB-NEXT: vsetvli zero, a0, e32, m2, ta, ma876; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8, v0.t877; CHECK-ZVKB-NEXT: ret878 %not.a = call <vscale x 4 x i32> @llvm.vp.xor.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> splat (i32 -1), <vscale x 4 x i1> %mask, i32 %evl)879 %x = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %b, <vscale x 4 x i32> %not.a, <vscale x 4 x i1> %mask, i32 %evl)880 ret <vscale x 4 x i32> %x881}882 883define <vscale x 4 x i32> @vandn_vx_vp_nxv4i32(i32 %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> %mask, i32 zeroext %evl) {884; CHECK-LABEL: vandn_vx_vp_nxv4i32:885; CHECK: # %bb.0:886; CHECK-NEXT: not a0, a0887; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma888; CHECK-NEXT: vand.vx v8, v8, a0, v0.t889; CHECK-NEXT: ret890;891; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv4i32:892; CHECK-ZVKB: # %bb.0:893; CHECK-ZVKB-NEXT: vsetvli zero, a1, e32, m2, ta, ma894; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t895; CHECK-ZVKB-NEXT: ret896 %not.a = xor i32 %a, -1897 %head.not.a = insertelement <vscale x 4 x i32> poison, i32 %not.a, i32 0898 %splat.not.a = shufflevector <vscale x 4 x i32> %head.not.a, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer899 %x = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %b, <vscale x 4 x i32> %splat.not.a, <vscale x 4 x i1> %mask, i32 %evl)900 ret <vscale x 4 x i32> %x901}902 903define <vscale x 8 x i32> @vandn_vv_vp_nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {904; CHECK-LABEL: vandn_vv_vp_nxv8i32:905; CHECK: # %bb.0:906; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma907; CHECK-NEXT: vnot.v v8, v8, v0.t908; CHECK-NEXT: vand.vv v8, v8, v12, v0.t909; CHECK-NEXT: ret910;911; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv8i32:912; CHECK-ZVKB: # %bb.0:913; CHECK-ZVKB-NEXT: vsetvli zero, a0, e32, m4, ta, ma914; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8, v0.t915; CHECK-ZVKB-NEXT: ret916 %not.a = call <vscale x 8 x i32> @llvm.vp.xor.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> splat (i32 -1), <vscale x 8 x i1> %mask, i32 %evl)917 %x = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %not.a, <vscale x 8 x i32> %b, <vscale x 8 x i1> %mask, i32 %evl)918 ret <vscale x 8 x i32> %x919}920 921define <vscale x 8 x i32> @vandn_vv_vp_swapped_nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {922; CHECK-LABEL: vandn_vv_vp_swapped_nxv8i32:923; CHECK: # %bb.0:924; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma925; CHECK-NEXT: vnot.v v8, v8, v0.t926; CHECK-NEXT: vand.vv v8, v12, v8, v0.t927; CHECK-NEXT: ret928;929; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv8i32:930; CHECK-ZVKB: # %bb.0:931; CHECK-ZVKB-NEXT: vsetvli zero, a0, e32, m4, ta, ma932; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8, v0.t933; CHECK-ZVKB-NEXT: ret934 %not.a = call <vscale x 8 x i32> @llvm.vp.xor.nxv8i32(<vscale x 8 x i32> %a, <vscale x 8 x i32> splat (i32 -1), <vscale x 8 x i1> %mask, i32 %evl)935 %x = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %b, <vscale x 8 x i32> %not.a, <vscale x 8 x i1> %mask, i32 %evl)936 ret <vscale x 8 x i32> %x937}938 939define <vscale x 8 x i32> @vandn_vx_vp_nxv8i32(i32 %a, <vscale x 8 x i32> %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {940; CHECK-LABEL: vandn_vx_vp_nxv8i32:941; CHECK: # %bb.0:942; CHECK-NEXT: not a0, a0943; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma944; CHECK-NEXT: vand.vx v8, v8, a0, v0.t945; CHECK-NEXT: ret946;947; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv8i32:948; CHECK-ZVKB: # %bb.0:949; CHECK-ZVKB-NEXT: vsetvli zero, a1, e32, m4, ta, ma950; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t951; CHECK-ZVKB-NEXT: ret952 %not.a = xor i32 %a, -1953 %head.not.a = insertelement <vscale x 8 x i32> poison, i32 %not.a, i32 0954 %splat.not.a = shufflevector <vscale x 8 x i32> %head.not.a, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer955 %x = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %b, <vscale x 8 x i32> %splat.not.a, <vscale x 8 x i1> %mask, i32 %evl)956 ret <vscale x 8 x i32> %x957}958 959define <vscale x 16 x i32> @vandn_vv_vp_nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i1> %mask, i32 zeroext %evl) {960; CHECK-LABEL: vandn_vv_vp_nxv16i32:961; CHECK: # %bb.0:962; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma963; CHECK-NEXT: vnot.v v8, v8, v0.t964; CHECK-NEXT: vand.vv v8, v8, v16, v0.t965; CHECK-NEXT: ret966;967; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv16i32:968; CHECK-ZVKB: # %bb.0:969; CHECK-ZVKB-NEXT: vsetvli zero, a0, e32, m8, ta, ma970; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8, v0.t971; CHECK-ZVKB-NEXT: ret972 %not.a = call <vscale x 16 x i32> @llvm.vp.xor.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> splat (i32 -1), <vscale x 16 x i1> %mask, i32 %evl)973 %x = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %not.a, <vscale x 16 x i32> %b, <vscale x 16 x i1> %mask, i32 %evl)974 ret <vscale x 16 x i32> %x975}976 977define <vscale x 16 x i32> @vandn_vv_vp_swapped_nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i1> %mask, i32 zeroext %evl) {978; CHECK-LABEL: vandn_vv_vp_swapped_nxv16i32:979; CHECK: # %bb.0:980; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma981; CHECK-NEXT: vnot.v v8, v8, v0.t982; CHECK-NEXT: vand.vv v8, v16, v8, v0.t983; CHECK-NEXT: ret984;985; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv16i32:986; CHECK-ZVKB: # %bb.0:987; CHECK-ZVKB-NEXT: vsetvli zero, a0, e32, m8, ta, ma988; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8, v0.t989; CHECK-ZVKB-NEXT: ret990 %not.a = call <vscale x 16 x i32> @llvm.vp.xor.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> splat (i32 -1), <vscale x 16 x i1> %mask, i32 %evl)991 %x = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %b, <vscale x 16 x i32> %not.a, <vscale x 16 x i1> %mask, i32 %evl)992 ret <vscale x 16 x i32> %x993}994 995define <vscale x 16 x i32> @vandn_vx_vp_nxv16i32(i32 %a, <vscale x 16 x i32> %b, <vscale x 16 x i1> %mask, i32 zeroext %evl) {996; CHECK-LABEL: vandn_vx_vp_nxv16i32:997; CHECK: # %bb.0:998; CHECK-NEXT: not a0, a0999; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma1000; CHECK-NEXT: vand.vx v8, v8, a0, v0.t1001; CHECK-NEXT: ret1002;1003; CHECK-ZVKB-LABEL: vandn_vx_vp_nxv16i32:1004; CHECK-ZVKB: # %bb.0:1005; CHECK-ZVKB-NEXT: vsetvli zero, a1, e32, m8, ta, ma1006; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a0, v0.t1007; CHECK-ZVKB-NEXT: ret1008 %not.a = xor i32 %a, -11009 %head.not.a = insertelement <vscale x 16 x i32> poison, i32 %not.a, i32 01010 %splat.not.a = shufflevector <vscale x 16 x i32> %head.not.a, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer1011 %x = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %b, <vscale x 16 x i32> %splat.not.a, <vscale x 16 x i1> %mask, i32 %evl)1012 ret <vscale x 16 x i32> %x1013}1014 1015define <vscale x 1 x i64> @vandn_vv_vp_nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i1> %mask, i32 zeroext %evl) {1016; CHECK-LABEL: vandn_vv_vp_nxv1i64:1017; CHECK: # %bb.0:1018; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1019; CHECK-NEXT: vnot.v v8, v8, v0.t1020; CHECK-NEXT: vand.vv v8, v8, v9, v0.t1021; CHECK-NEXT: ret1022;1023; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv1i64:1024; CHECK-ZVKB: # %bb.0:1025; CHECK-ZVKB-NEXT: vsetvli zero, a0, e64, m1, ta, ma1026; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t1027; CHECK-ZVKB-NEXT: ret1028 %not.a = call <vscale x 1 x i64> @llvm.vp.xor.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> splat (i64 -1), <vscale x 1 x i1> %mask, i32 %evl)1029 %x = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %not.a, <vscale x 1 x i64> %b, <vscale x 1 x i1> %mask, i32 %evl)1030 ret <vscale x 1 x i64> %x1031}1032 1033define <vscale x 1 x i64> @vandn_vv_vp_swapped_nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i1> %mask, i32 zeroext %evl) {1034; CHECK-LABEL: vandn_vv_vp_swapped_nxv1i64:1035; CHECK: # %bb.0:1036; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma1037; CHECK-NEXT: vnot.v v8, v8, v0.t1038; CHECK-NEXT: vand.vv v8, v9, v8, v0.t1039; CHECK-NEXT: ret1040;1041; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv1i64:1042; CHECK-ZVKB: # %bb.0:1043; CHECK-ZVKB-NEXT: vsetvli zero, a0, e64, m1, ta, ma1044; CHECK-ZVKB-NEXT: vandn.vv v8, v9, v8, v0.t1045; CHECK-ZVKB-NEXT: ret1046 %not.a = call <vscale x 1 x i64> @llvm.vp.xor.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> splat (i64 -1), <vscale x 1 x i1> %mask, i32 %evl)1047 %x = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %b, <vscale x 1 x i64> %not.a, <vscale x 1 x i1> %mask, i32 %evl)1048 ret <vscale x 1 x i64> %x1049}1050 1051define <vscale x 1 x i64> @vandn_vx_vp_nxv1i64(i64 %a, <vscale x 1 x i64> %b, <vscale x 1 x i1> %mask, i32 zeroext %evl) {1052; CHECK-RV32-LABEL: vandn_vx_vp_nxv1i64:1053; CHECK-RV32: # %bb.0:1054; CHECK-RV32-NEXT: addi sp, sp, -161055; CHECK-RV32-NEXT: .cfi_def_cfa_offset 161056; CHECK-RV32-NEXT: not a0, a01057; CHECK-RV32-NEXT: not a1, a11058; CHECK-RV32-NEXT: sw a0, 8(sp)1059; CHECK-RV32-NEXT: sw a1, 12(sp)1060; CHECK-RV32-NEXT: addi a0, sp, 81061; CHECK-RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1062; CHECK-RV32-NEXT: vlse64.v v9, (a0), zero1063; CHECK-RV32-NEXT: vand.vv v8, v8, v9, v0.t1064; CHECK-RV32-NEXT: addi sp, sp, 161065; CHECK-RV32-NEXT: .cfi_def_cfa_offset 01066; CHECK-RV32-NEXT: ret1067;1068; CHECK-RV64-LABEL: vandn_vx_vp_nxv1i64:1069; CHECK-RV64: # %bb.0:1070; CHECK-RV64-NEXT: not a0, a01071; CHECK-RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1072; CHECK-RV64-NEXT: vand.vx v8, v8, a0, v0.t1073; CHECK-RV64-NEXT: ret1074;1075; CHECK-ZVKB32-LABEL: vandn_vx_vp_nxv1i64:1076; CHECK-ZVKB32: # %bb.0:1077; CHECK-ZVKB32-NEXT: addi sp, sp, -161078; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 161079; CHECK-ZVKB32-NEXT: not a0, a01080; CHECK-ZVKB32-NEXT: not a1, a11081; CHECK-ZVKB32-NEXT: sw a0, 8(sp)1082; CHECK-ZVKB32-NEXT: sw a1, 12(sp)1083; CHECK-ZVKB32-NEXT: addi a0, sp, 81084; CHECK-ZVKB32-NEXT: vsetvli zero, a2, e64, m1, ta, ma1085; CHECK-ZVKB32-NEXT: vlse64.v v9, (a0), zero1086; CHECK-ZVKB32-NEXT: vand.vv v8, v8, v9, v0.t1087; CHECK-ZVKB32-NEXT: addi sp, sp, 161088; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 01089; CHECK-ZVKB32-NEXT: ret1090;1091; CHECK-ZVKB64-LABEL: vandn_vx_vp_nxv1i64:1092; CHECK-ZVKB64: # %bb.0:1093; CHECK-ZVKB64-NEXT: vsetvli zero, a1, e64, m1, ta, ma1094; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0, v0.t1095; CHECK-ZVKB64-NEXT: ret1096 %not.a = xor i64 %a, -11097 %head.not.a = insertelement <vscale x 1 x i64> poison, i64 %not.a, i32 01098 %splat.not.a = shufflevector <vscale x 1 x i64> %head.not.a, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer1099 %x = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %b, <vscale x 1 x i64> %splat.not.a, <vscale x 1 x i1> %mask, i32 %evl)1100 ret <vscale x 1 x i64> %x1101}1102 1103define <vscale x 2 x i64> @vandn_vv_vp_nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i1> %mask, i32 zeroext %evl) {1104; CHECK-LABEL: vandn_vv_vp_nxv2i64:1105; CHECK: # %bb.0:1106; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1107; CHECK-NEXT: vnot.v v8, v8, v0.t1108; CHECK-NEXT: vand.vv v8, v8, v10, v0.t1109; CHECK-NEXT: ret1110;1111; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv2i64:1112; CHECK-ZVKB: # %bb.0:1113; CHECK-ZVKB-NEXT: vsetvli zero, a0, e64, m2, ta, ma1114; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8, v0.t1115; CHECK-ZVKB-NEXT: ret1116 %not.a = call <vscale x 2 x i64> @llvm.vp.xor.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> splat (i64 -1), <vscale x 2 x i1> %mask, i32 %evl)1117 %x = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %not.a, <vscale x 2 x i64> %b, <vscale x 2 x i1> %mask, i32 %evl)1118 ret <vscale x 2 x i64> %x1119}1120 1121define <vscale x 2 x i64> @vandn_vv_vp_swapped_nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i1> %mask, i32 zeroext %evl) {1122; CHECK-LABEL: vandn_vv_vp_swapped_nxv2i64:1123; CHECK: # %bb.0:1124; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma1125; CHECK-NEXT: vnot.v v8, v8, v0.t1126; CHECK-NEXT: vand.vv v8, v10, v8, v0.t1127; CHECK-NEXT: ret1128;1129; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv2i64:1130; CHECK-ZVKB: # %bb.0:1131; CHECK-ZVKB-NEXT: vsetvli zero, a0, e64, m2, ta, ma1132; CHECK-ZVKB-NEXT: vandn.vv v8, v10, v8, v0.t1133; CHECK-ZVKB-NEXT: ret1134 %not.a = call <vscale x 2 x i64> @llvm.vp.xor.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> splat (i64 -1), <vscale x 2 x i1> %mask, i32 %evl)1135 %x = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %b, <vscale x 2 x i64> %not.a, <vscale x 2 x i1> %mask, i32 %evl)1136 ret <vscale x 2 x i64> %x1137}1138 1139define <vscale x 2 x i64> @vandn_vx_vp_nxv2i64(i64 %a, <vscale x 2 x i64> %b, <vscale x 2 x i1> %mask, i32 zeroext %evl) {1140; CHECK-RV32-LABEL: vandn_vx_vp_nxv2i64:1141; CHECK-RV32: # %bb.0:1142; CHECK-RV32-NEXT: addi sp, sp, -161143; CHECK-RV32-NEXT: .cfi_def_cfa_offset 161144; CHECK-RV32-NEXT: not a0, a01145; CHECK-RV32-NEXT: not a1, a11146; CHECK-RV32-NEXT: sw a0, 8(sp)1147; CHECK-RV32-NEXT: sw a1, 12(sp)1148; CHECK-RV32-NEXT: addi a0, sp, 81149; CHECK-RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1150; CHECK-RV32-NEXT: vlse64.v v10, (a0), zero1151; CHECK-RV32-NEXT: vand.vv v8, v8, v10, v0.t1152; CHECK-RV32-NEXT: addi sp, sp, 161153; CHECK-RV32-NEXT: .cfi_def_cfa_offset 01154; CHECK-RV32-NEXT: ret1155;1156; CHECK-RV64-LABEL: vandn_vx_vp_nxv2i64:1157; CHECK-RV64: # %bb.0:1158; CHECK-RV64-NEXT: not a0, a01159; CHECK-RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1160; CHECK-RV64-NEXT: vand.vx v8, v8, a0, v0.t1161; CHECK-RV64-NEXT: ret1162;1163; CHECK-ZVKB32-LABEL: vandn_vx_vp_nxv2i64:1164; CHECK-ZVKB32: # %bb.0:1165; CHECK-ZVKB32-NEXT: addi sp, sp, -161166; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 161167; CHECK-ZVKB32-NEXT: not a0, a01168; CHECK-ZVKB32-NEXT: not a1, a11169; CHECK-ZVKB32-NEXT: sw a0, 8(sp)1170; CHECK-ZVKB32-NEXT: sw a1, 12(sp)1171; CHECK-ZVKB32-NEXT: addi a0, sp, 81172; CHECK-ZVKB32-NEXT: vsetvli zero, a2, e64, m2, ta, ma1173; CHECK-ZVKB32-NEXT: vlse64.v v10, (a0), zero1174; CHECK-ZVKB32-NEXT: vand.vv v8, v8, v10, v0.t1175; CHECK-ZVKB32-NEXT: addi sp, sp, 161176; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 01177; CHECK-ZVKB32-NEXT: ret1178;1179; CHECK-ZVKB64-LABEL: vandn_vx_vp_nxv2i64:1180; CHECK-ZVKB64: # %bb.0:1181; CHECK-ZVKB64-NEXT: vsetvli zero, a1, e64, m2, ta, ma1182; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0, v0.t1183; CHECK-ZVKB64-NEXT: ret1184 %not.a = xor i64 %a, -11185 %head.not.a = insertelement <vscale x 2 x i64> poison, i64 %not.a, i32 01186 %splat.not.a = shufflevector <vscale x 2 x i64> %head.not.a, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer1187 %x = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %b, <vscale x 2 x i64> %splat.not.a, <vscale x 2 x i1> %mask, i32 %evl)1188 ret <vscale x 2 x i64> %x1189}1190 1191define <vscale x 4 x i64> @vandn_vv_vp_nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i1> %mask, i32 zeroext %evl) {1192; CHECK-LABEL: vandn_vv_vp_nxv4i64:1193; CHECK: # %bb.0:1194; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1195; CHECK-NEXT: vnot.v v8, v8, v0.t1196; CHECK-NEXT: vand.vv v8, v8, v12, v0.t1197; CHECK-NEXT: ret1198;1199; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv4i64:1200; CHECK-ZVKB: # %bb.0:1201; CHECK-ZVKB-NEXT: vsetvli zero, a0, e64, m4, ta, ma1202; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8, v0.t1203; CHECK-ZVKB-NEXT: ret1204 %not.a = call <vscale x 4 x i64> @llvm.vp.xor.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> splat (i64 -1), <vscale x 4 x i1> %mask, i32 %evl)1205 %x = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %not.a, <vscale x 4 x i64> %b, <vscale x 4 x i1> %mask, i32 %evl)1206 ret <vscale x 4 x i64> %x1207}1208 1209define <vscale x 4 x i64> @vandn_vv_vp_swapped_nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b, <vscale x 4 x i1> %mask, i32 zeroext %evl) {1210; CHECK-LABEL: vandn_vv_vp_swapped_nxv4i64:1211; CHECK: # %bb.0:1212; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma1213; CHECK-NEXT: vnot.v v8, v8, v0.t1214; CHECK-NEXT: vand.vv v8, v12, v8, v0.t1215; CHECK-NEXT: ret1216;1217; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv4i64:1218; CHECK-ZVKB: # %bb.0:1219; CHECK-ZVKB-NEXT: vsetvli zero, a0, e64, m4, ta, ma1220; CHECK-ZVKB-NEXT: vandn.vv v8, v12, v8, v0.t1221; CHECK-ZVKB-NEXT: ret1222 %not.a = call <vscale x 4 x i64> @llvm.vp.xor.nxv4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> splat (i64 -1), <vscale x 4 x i1> %mask, i32 %evl)1223 %x = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %b, <vscale x 4 x i64> %not.a, <vscale x 4 x i1> %mask, i32 %evl)1224 ret <vscale x 4 x i64> %x1225}1226 1227define <vscale x 4 x i64> @vandn_vx_vp_nxv4i64(i64 %a, <vscale x 4 x i64> %b, <vscale x 4 x i1> %mask, i32 zeroext %evl) {1228; CHECK-RV32-LABEL: vandn_vx_vp_nxv4i64:1229; CHECK-RV32: # %bb.0:1230; CHECK-RV32-NEXT: addi sp, sp, -161231; CHECK-RV32-NEXT: .cfi_def_cfa_offset 161232; CHECK-RV32-NEXT: not a0, a01233; CHECK-RV32-NEXT: not a1, a11234; CHECK-RV32-NEXT: sw a0, 8(sp)1235; CHECK-RV32-NEXT: sw a1, 12(sp)1236; CHECK-RV32-NEXT: addi a0, sp, 81237; CHECK-RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1238; CHECK-RV32-NEXT: vlse64.v v12, (a0), zero1239; CHECK-RV32-NEXT: vand.vv v8, v8, v12, v0.t1240; CHECK-RV32-NEXT: addi sp, sp, 161241; CHECK-RV32-NEXT: .cfi_def_cfa_offset 01242; CHECK-RV32-NEXT: ret1243;1244; CHECK-RV64-LABEL: vandn_vx_vp_nxv4i64:1245; CHECK-RV64: # %bb.0:1246; CHECK-RV64-NEXT: not a0, a01247; CHECK-RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1248; CHECK-RV64-NEXT: vand.vx v8, v8, a0, v0.t1249; CHECK-RV64-NEXT: ret1250;1251; CHECK-ZVKB32-LABEL: vandn_vx_vp_nxv4i64:1252; CHECK-ZVKB32: # %bb.0:1253; CHECK-ZVKB32-NEXT: addi sp, sp, -161254; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 161255; CHECK-ZVKB32-NEXT: not a0, a01256; CHECK-ZVKB32-NEXT: not a1, a11257; CHECK-ZVKB32-NEXT: sw a0, 8(sp)1258; CHECK-ZVKB32-NEXT: sw a1, 12(sp)1259; CHECK-ZVKB32-NEXT: addi a0, sp, 81260; CHECK-ZVKB32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1261; CHECK-ZVKB32-NEXT: vlse64.v v12, (a0), zero1262; CHECK-ZVKB32-NEXT: vand.vv v8, v8, v12, v0.t1263; CHECK-ZVKB32-NEXT: addi sp, sp, 161264; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 01265; CHECK-ZVKB32-NEXT: ret1266;1267; CHECK-ZVKB64-LABEL: vandn_vx_vp_nxv4i64:1268; CHECK-ZVKB64: # %bb.0:1269; CHECK-ZVKB64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1270; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0, v0.t1271; CHECK-ZVKB64-NEXT: ret1272 %not.a = xor i64 %a, -11273 %head.not.a = insertelement <vscale x 4 x i64> poison, i64 %not.a, i32 01274 %splat.not.a = shufflevector <vscale x 4 x i64> %head.not.a, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1275 %x = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %b, <vscale x 4 x i64> %splat.not.a, <vscale x 4 x i1> %mask, i32 %evl)1276 ret <vscale x 4 x i64> %x1277}1278 1279define <vscale x 8 x i64> @vandn_vv_vp_nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {1280; CHECK-LABEL: vandn_vv_vp_nxv8i64:1281; CHECK: # %bb.0:1282; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1283; CHECK-NEXT: vnot.v v8, v8, v0.t1284; CHECK-NEXT: vand.vv v8, v8, v16, v0.t1285; CHECK-NEXT: ret1286;1287; CHECK-ZVKB-LABEL: vandn_vv_vp_nxv8i64:1288; CHECK-ZVKB: # %bb.0:1289; CHECK-ZVKB-NEXT: vsetvli zero, a0, e64, m8, ta, ma1290; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8, v0.t1291; CHECK-ZVKB-NEXT: ret1292 %not.a = call <vscale x 8 x i64> @llvm.vp.xor.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> splat (i64 -1), <vscale x 8 x i1> %mask, i32 %evl)1293 %x = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %not.a, <vscale x 8 x i64> %b, <vscale x 8 x i1> %mask, i32 %evl)1294 ret <vscale x 8 x i64> %x1295}1296 1297define <vscale x 8 x i64> @vandn_vv_vp_swapped_nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {1298; CHECK-LABEL: vandn_vv_vp_swapped_nxv8i64:1299; CHECK: # %bb.0:1300; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1301; CHECK-NEXT: vnot.v v8, v8, v0.t1302; CHECK-NEXT: vand.vv v8, v16, v8, v0.t1303; CHECK-NEXT: ret1304;1305; CHECK-ZVKB-LABEL: vandn_vv_vp_swapped_nxv8i64:1306; CHECK-ZVKB: # %bb.0:1307; CHECK-ZVKB-NEXT: vsetvli zero, a0, e64, m8, ta, ma1308; CHECK-ZVKB-NEXT: vandn.vv v8, v16, v8, v0.t1309; CHECK-ZVKB-NEXT: ret1310 %not.a = call <vscale x 8 x i64> @llvm.vp.xor.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> splat (i64 -1), <vscale x 8 x i1> %mask, i32 %evl)1311 %x = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %b, <vscale x 8 x i64> %not.a, <vscale x 8 x i1> %mask, i32 %evl)1312 ret <vscale x 8 x i64> %x1313}1314 1315define <vscale x 8 x i64> @vandn_vx_vp_nxv8i64(i64 %a, <vscale x 8 x i64> %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {1316; CHECK-RV32-LABEL: vandn_vx_vp_nxv8i64:1317; CHECK-RV32: # %bb.0:1318; CHECK-RV32-NEXT: addi sp, sp, -161319; CHECK-RV32-NEXT: .cfi_def_cfa_offset 161320; CHECK-RV32-NEXT: not a0, a01321; CHECK-RV32-NEXT: not a1, a11322; CHECK-RV32-NEXT: sw a0, 8(sp)1323; CHECK-RV32-NEXT: sw a1, 12(sp)1324; CHECK-RV32-NEXT: addi a0, sp, 81325; CHECK-RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1326; CHECK-RV32-NEXT: vlse64.v v16, (a0), zero1327; CHECK-RV32-NEXT: vand.vv v8, v8, v16, v0.t1328; CHECK-RV32-NEXT: addi sp, sp, 161329; CHECK-RV32-NEXT: .cfi_def_cfa_offset 01330; CHECK-RV32-NEXT: ret1331;1332; CHECK-RV64-LABEL: vandn_vx_vp_nxv8i64:1333; CHECK-RV64: # %bb.0:1334; CHECK-RV64-NEXT: not a0, a01335; CHECK-RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1336; CHECK-RV64-NEXT: vand.vx v8, v8, a0, v0.t1337; CHECK-RV64-NEXT: ret1338;1339; CHECK-ZVKB32-LABEL: vandn_vx_vp_nxv8i64:1340; CHECK-ZVKB32: # %bb.0:1341; CHECK-ZVKB32-NEXT: addi sp, sp, -161342; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 161343; CHECK-ZVKB32-NEXT: not a0, a01344; CHECK-ZVKB32-NEXT: not a1, a11345; CHECK-ZVKB32-NEXT: sw a0, 8(sp)1346; CHECK-ZVKB32-NEXT: sw a1, 12(sp)1347; CHECK-ZVKB32-NEXT: addi a0, sp, 81348; CHECK-ZVKB32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1349; CHECK-ZVKB32-NEXT: vlse64.v v16, (a0), zero1350; CHECK-ZVKB32-NEXT: vand.vv v8, v8, v16, v0.t1351; CHECK-ZVKB32-NEXT: addi sp, sp, 161352; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 01353; CHECK-ZVKB32-NEXT: ret1354;1355; CHECK-ZVKB64-LABEL: vandn_vx_vp_nxv8i64:1356; CHECK-ZVKB64: # %bb.0:1357; CHECK-ZVKB64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1358; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a0, v0.t1359; CHECK-ZVKB64-NEXT: ret1360 %not.a = xor i64 %a, -11361 %head.not.a = insertelement <vscale x 8 x i64> poison, i64 %not.a, i32 01362 %splat.not.a = shufflevector <vscale x 8 x i64> %head.not.a, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1363 %x = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %b, <vscale x 8 x i64> %splat.not.a, <vscale x 8 x i1> %mask, i32 %evl)1364 ret <vscale x 8 x i64> %x1365}1366 1367define <vscale x 1 x i16> @vandn_vx_vp_imm16(<vscale x 1 x i16> %x, <vscale x 1 x i1> %mask, i32 zeroext %evl) {1368; CHECK-LABEL: vandn_vx_vp_imm16:1369; CHECK: # %bb.0:1370; CHECK-NEXT: lui a1, 81371; CHECK-NEXT: addi a1, a1, -11372; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1373; CHECK-NEXT: vand.vx v8, v8, a1, v0.t1374; CHECK-NEXT: ret1375;1376; CHECK-ZVKB-LABEL: vandn_vx_vp_imm16:1377; CHECK-ZVKB: # %bb.0:1378; CHECK-ZVKB-NEXT: lui a1, 10485681379; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1380; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a1, v0.t1381; CHECK-ZVKB-NEXT: ret1382 %a = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> splat (i16 32767), <vscale x 1 x i16> %x, <vscale x 1 x i1> %mask, i32 %evl)1383 ret <vscale x 1 x i16> %a1384}1385 1386define <vscale x 1 x i16> @vandn_vx_vp_swapped_imm16(<vscale x 1 x i16> %x, <vscale x 1 x i1> %mask, i32 zeroext %evl) {1387; CHECK-LABEL: vandn_vx_vp_swapped_imm16:1388; CHECK: # %bb.0:1389; CHECK-NEXT: lui a1, 81390; CHECK-NEXT: addi a1, a1, -11391; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1392; CHECK-NEXT: vand.vx v8, v8, a1, v0.t1393; CHECK-NEXT: ret1394;1395; CHECK-ZVKB-LABEL: vandn_vx_vp_swapped_imm16:1396; CHECK-ZVKB: # %bb.0:1397; CHECK-ZVKB-NEXT: lui a1, 10485681398; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1399; CHECK-ZVKB-NEXT: vandn.vx v8, v8, a1, v0.t1400; CHECK-ZVKB-NEXT: ret1401 %a = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> splat (i16 32767), <vscale x 1 x i1> %mask, i32 %evl)1402 ret <vscale x 1 x i16> %a1403}1404 1405define <vscale x 1 x i64> @vandn_vx_vp_imm64(<vscale x 1 x i64> %x, <vscale x 1 x i1> %mask, i32 zeroext %evl) {1406; CHECK-RV32-LABEL: vandn_vx_vp_imm64:1407; CHECK-RV32: # %bb.0:1408; CHECK-RV32-NEXT: addi sp, sp, -161409; CHECK-RV32-NEXT: .cfi_def_cfa_offset 161410; CHECK-RV32-NEXT: lui a1, 10444801411; CHECK-RV32-NEXT: li a2, 2551412; CHECK-RV32-NEXT: sw a2, 8(sp)1413; CHECK-RV32-NEXT: sw a1, 12(sp)1414; CHECK-RV32-NEXT: addi a1, sp, 81415; CHECK-RV32-NEXT: vsetvli zero, a0, e64, m1, ta, ma1416; CHECK-RV32-NEXT: vlse64.v v9, (a1), zero1417; CHECK-RV32-NEXT: vand.vv v8, v8, v9, v0.t1418; CHECK-RV32-NEXT: addi sp, sp, 161419; CHECK-RV32-NEXT: .cfi_def_cfa_offset 01420; CHECK-RV32-NEXT: ret1421;1422; CHECK-RV64-LABEL: vandn_vx_vp_imm64:1423; CHECK-RV64: # %bb.0:1424; CHECK-RV64-NEXT: li a1, -11425; CHECK-RV64-NEXT: slli a1, a1, 561426; CHECK-RV64-NEXT: addi a1, a1, 2551427; CHECK-RV64-NEXT: vsetvli zero, a0, e64, m1, ta, ma1428; CHECK-RV64-NEXT: vand.vx v8, v8, a1, v0.t1429; CHECK-RV64-NEXT: ret1430;1431; CHECK-ZVKB32-LABEL: vandn_vx_vp_imm64:1432; CHECK-ZVKB32: # %bb.0:1433; CHECK-ZVKB32-NEXT: addi sp, sp, -161434; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 161435; CHECK-ZVKB32-NEXT: lui a1, 10444801436; CHECK-ZVKB32-NEXT: li a2, 2551437; CHECK-ZVKB32-NEXT: sw a2, 8(sp)1438; CHECK-ZVKB32-NEXT: sw a1, 12(sp)1439; CHECK-ZVKB32-NEXT: addi a1, sp, 81440; CHECK-ZVKB32-NEXT: vsetvli zero, a0, e64, m1, ta, ma1441; CHECK-ZVKB32-NEXT: vlse64.v v9, (a1), zero1442; CHECK-ZVKB32-NEXT: vand.vv v8, v8, v9, v0.t1443; CHECK-ZVKB32-NEXT: addi sp, sp, 161444; CHECK-ZVKB32-NEXT: .cfi_def_cfa_offset 01445; CHECK-ZVKB32-NEXT: ret1446;1447; CHECK-ZVKB64-LABEL: vandn_vx_vp_imm64:1448; CHECK-ZVKB64: # %bb.0:1449; CHECK-ZVKB64-NEXT: lui a1, 10485601450; CHECK-ZVKB64-NEXT: srli a1, a1, 81451; CHECK-ZVKB64-NEXT: vsetvli zero, a0, e64, m1, ta, ma1452; CHECK-ZVKB64-NEXT: vandn.vx v8, v8, a1, v0.t1453; CHECK-ZVKB64-NEXT: ret1454 %a = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> splat (i64 -72057594037927681), <vscale x 1 x i1> %mask, i32 %evl)1455 ret <vscale x 1 x i64> %a1456}1457 1458define <vscale x 1 x i16> @vand_vadd_vx_vp_imm16(<vscale x 1 x i16> %x, <vscale x 1 x i1> %mask, i32 zeroext %evl) {1459; CHECK-LABEL: vand_vadd_vx_vp_imm16:1460; CHECK: # %bb.0:1461; CHECK-NEXT: lui a1, 81462; CHECK-NEXT: addi a1, a1, -11463; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1464; CHECK-NEXT: vand.vx v8, v8, a1, v0.t1465; CHECK-NEXT: vadd.vx v8, v8, a1, v0.t1466; CHECK-NEXT: ret1467;1468; CHECK-ZVKB-LABEL: vand_vadd_vx_vp_imm16:1469; CHECK-ZVKB: # %bb.0:1470; CHECK-ZVKB-NEXT: lui a1, 81471; CHECK-ZVKB-NEXT: addi a1, a1, -11472; CHECK-ZVKB-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1473; CHECK-ZVKB-NEXT: vand.vx v8, v8, a1, v0.t1474; CHECK-ZVKB-NEXT: vadd.vx v8, v8, a1, v0.t1475; CHECK-ZVKB-NEXT: ret1476 %a = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> splat (i16 32767), <vscale x 1 x i16> %x, <vscale x 1 x i1> %mask, i32 %evl)1477 %b = call <vscale x 1 x i16> @llvm.vp.add.nxv1i16(<vscale x 1 x i16> splat (i16 32767), <vscale x 1 x i16> %a, <vscale x 1 x i1> %mask, i32 %evl)1478 ret <vscale x 1 x i16> %b1479}1480