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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \3; RUN: | FileCheck %s --check-prefixes=CHECK,RV324; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \5; RUN: | FileCheck %s --check-prefixes=CHECK,RV646 7define <vscale x 8 x i7> @vdivu_vx_nxv8i7(<vscale x 8 x i7> %a, i7 signext %b, <vscale x 8 x i1> %mask, i32 zeroext %evl) {8; CHECK-LABEL: vdivu_vx_nxv8i7:9; CHECK: # %bb.0:10; CHECK-NEXT: li a2, 12711; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma12; CHECK-NEXT: vmv.v.x v9, a013; CHECK-NEXT: vand.vx v8, v8, a2, v0.t14; CHECK-NEXT: vand.vx v9, v9, a2, v0.t15; CHECK-NEXT: vdivu.vv v8, v8, v9, v0.t16; CHECK-NEXT: ret17 %elt.head = insertelement <vscale x 8 x i7> poison, i7 %b, i32 018 %vb = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer19 %v = call <vscale x 8 x i7> @llvm.vp.udiv.nxv8i7(<vscale x 8 x i7> %a, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %mask, i32 %evl)20 ret <vscale x 8 x i7> %v21}22 23define <vscale x 1 x i8> @vdivu_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {24; CHECK-LABEL: vdivu_vv_nxv1i8:25; CHECK: # %bb.0:26; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma27; CHECK-NEXT: vdivu.vv v8, v8, v9, v0.t28; CHECK-NEXT: ret29 %v = call <vscale x 1 x i8> @llvm.vp.udiv.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 %evl)30 ret <vscale x 1 x i8> %v31}32 33define <vscale x 1 x i8> @vdivu_vv_nxv1i8_unmasked(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, i32 zeroext %evl) {34; CHECK-LABEL: vdivu_vv_nxv1i8_unmasked:35; CHECK: # %bb.0:36; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma37; CHECK-NEXT: vdivu.vv v8, v8, v938; CHECK-NEXT: ret39 %v = call <vscale x 1 x i8> @llvm.vp.udiv.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)40 ret <vscale x 1 x i8> %v41}42 43define <vscale x 1 x i8> @vdivu_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {44; CHECK-LABEL: vdivu_vx_nxv1i8:45; CHECK: # %bb.0:46; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma47; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t48; CHECK-NEXT: ret49 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 050 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer51 %v = call <vscale x 1 x i8> @llvm.vp.udiv.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 %evl)52 ret <vscale x 1 x i8> %v53}54 55define <vscale x 1 x i8> @vdivu_vx_nxv1i8_unmasked(<vscale x 1 x i8> %va, i8 %b, i32 zeroext %evl) {56; CHECK-LABEL: vdivu_vx_nxv1i8_unmasked:57; CHECK: # %bb.0:58; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, ma59; CHECK-NEXT: vdivu.vx v8, v8, a060; CHECK-NEXT: ret61 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 062 %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer63 %v = call <vscale x 1 x i8> @llvm.vp.udiv.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)64 ret <vscale x 1 x i8> %v65}66 67define <vscale x 2 x i8> @vdivu_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {68; CHECK-LABEL: vdivu_vv_nxv2i8:69; CHECK: # %bb.0:70; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma71; CHECK-NEXT: vdivu.vv v8, v8, v9, v0.t72; CHECK-NEXT: ret73 %v = call <vscale x 2 x i8> @llvm.vp.udiv.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 %evl)74 ret <vscale x 2 x i8> %v75}76 77define <vscale x 2 x i8> @vdivu_vv_nxv2i8_unmasked(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, i32 zeroext %evl) {78; CHECK-LABEL: vdivu_vv_nxv2i8_unmasked:79; CHECK: # %bb.0:80; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma81; CHECK-NEXT: vdivu.vv v8, v8, v982; CHECK-NEXT: ret83 %v = call <vscale x 2 x i8> @llvm.vp.udiv.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)84 ret <vscale x 2 x i8> %v85}86 87define <vscale x 2 x i8> @vdivu_vx_nxv2i8(<vscale x 2 x i8> %va, i8 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {88; CHECK-LABEL: vdivu_vx_nxv2i8:89; CHECK: # %bb.0:90; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma91; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t92; CHECK-NEXT: ret93 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 094 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer95 %v = call <vscale x 2 x i8> @llvm.vp.udiv.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 %evl)96 ret <vscale x 2 x i8> %v97}98 99define <vscale x 2 x i8> @vdivu_vx_nxv2i8_unmasked(<vscale x 2 x i8> %va, i8 %b, i32 zeroext %evl) {100; CHECK-LABEL: vdivu_vx_nxv2i8_unmasked:101; CHECK: # %bb.0:102; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, ma103; CHECK-NEXT: vdivu.vx v8, v8, a0104; CHECK-NEXT: ret105 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0106 %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer107 %v = call <vscale x 2 x i8> @llvm.vp.udiv.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)108 ret <vscale x 2 x i8> %v109}110 111define <vscale x 3 x i8> @vdivu_vv_nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %b, <vscale x 3 x i1> %m, i32 zeroext %evl) {112; CHECK-LABEL: vdivu_vv_nxv3i8:113; CHECK: # %bb.0:114; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma115; CHECK-NEXT: vdivu.vv v8, v8, v9, v0.t116; CHECK-NEXT: ret117 %v = call <vscale x 3 x i8> @llvm.vp.udiv.nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %b, <vscale x 3 x i1> %m, i32 %evl)118 ret <vscale x 3 x i8> %v119}120 121define <vscale x 4 x i8> @vdivu_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {122; CHECK-LABEL: vdivu_vv_nxv4i8:123; CHECK: # %bb.0:124; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma125; CHECK-NEXT: vdivu.vv v8, v8, v9, v0.t126; CHECK-NEXT: ret127 %v = call <vscale x 4 x i8> @llvm.vp.udiv.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 %evl)128 ret <vscale x 4 x i8> %v129}130 131define <vscale x 4 x i8> @vdivu_vv_nxv4i8_unmasked(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, i32 zeroext %evl) {132; CHECK-LABEL: vdivu_vv_nxv4i8_unmasked:133; CHECK: # %bb.0:134; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma135; CHECK-NEXT: vdivu.vv v8, v8, v9136; CHECK-NEXT: ret137 %v = call <vscale x 4 x i8> @llvm.vp.udiv.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)138 ret <vscale x 4 x i8> %v139}140 141define <vscale x 4 x i8> @vdivu_vx_nxv4i8(<vscale x 4 x i8> %va, i8 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {142; CHECK-LABEL: vdivu_vx_nxv4i8:143; CHECK: # %bb.0:144; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma145; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t146; CHECK-NEXT: ret147 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0148 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer149 %v = call <vscale x 4 x i8> @llvm.vp.udiv.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 %evl)150 ret <vscale x 4 x i8> %v151}152 153define <vscale x 4 x i8> @vdivu_vx_nxv4i8_unmasked(<vscale x 4 x i8> %va, i8 %b, i32 zeroext %evl) {154; CHECK-LABEL: vdivu_vx_nxv4i8_unmasked:155; CHECK: # %bb.0:156; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, ma157; CHECK-NEXT: vdivu.vx v8, v8, a0158; CHECK-NEXT: ret159 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0160 %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer161 %v = call <vscale x 4 x i8> @llvm.vp.udiv.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)162 ret <vscale x 4 x i8> %v163}164 165define <vscale x 8 x i8> @vdivu_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {166; CHECK-LABEL: vdivu_vv_nxv8i8:167; CHECK: # %bb.0:168; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma169; CHECK-NEXT: vdivu.vv v8, v8, v9, v0.t170; CHECK-NEXT: ret171 %v = call <vscale x 8 x i8> @llvm.vp.udiv.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 %evl)172 ret <vscale x 8 x i8> %v173}174 175define <vscale x 8 x i8> @vdivu_vv_nxv8i8_unmasked(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, i32 zeroext %evl) {176; CHECK-LABEL: vdivu_vv_nxv8i8_unmasked:177; CHECK: # %bb.0:178; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma179; CHECK-NEXT: vdivu.vv v8, v8, v9180; CHECK-NEXT: ret181 %v = call <vscale x 8 x i8> @llvm.vp.udiv.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)182 ret <vscale x 8 x i8> %v183}184 185define <vscale x 8 x i8> @vdivu_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {186; CHECK-LABEL: vdivu_vx_nxv8i8:187; CHECK: # %bb.0:188; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma189; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t190; CHECK-NEXT: ret191 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0192 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer193 %v = call <vscale x 8 x i8> @llvm.vp.udiv.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 %evl)194 ret <vscale x 8 x i8> %v195}196 197define <vscale x 8 x i8> @vdivu_vx_nxv8i8_unmasked(<vscale x 8 x i8> %va, i8 %b, i32 zeroext %evl) {198; CHECK-LABEL: vdivu_vx_nxv8i8_unmasked:199; CHECK: # %bb.0:200; CHECK-NEXT: vsetvli zero, a1, e8, m1, ta, ma201; CHECK-NEXT: vdivu.vx v8, v8, a0202; CHECK-NEXT: ret203 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0204 %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer205 %v = call <vscale x 8 x i8> @llvm.vp.udiv.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)206 ret <vscale x 8 x i8> %v207}208 209define <vscale x 16 x i8> @vdivu_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {210; CHECK-LABEL: vdivu_vv_nxv16i8:211; CHECK: # %bb.0:212; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma213; CHECK-NEXT: vdivu.vv v8, v8, v10, v0.t214; CHECK-NEXT: ret215 %v = call <vscale x 16 x i8> @llvm.vp.udiv.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 %evl)216 ret <vscale x 16 x i8> %v217}218 219define <vscale x 16 x i8> @vdivu_vv_nxv16i8_unmasked(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, i32 zeroext %evl) {220; CHECK-LABEL: vdivu_vv_nxv16i8_unmasked:221; CHECK: # %bb.0:222; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma223; CHECK-NEXT: vdivu.vv v8, v8, v10224; CHECK-NEXT: ret225 %v = call <vscale x 16 x i8> @llvm.vp.udiv.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)226 ret <vscale x 16 x i8> %v227}228 229define <vscale x 16 x i8> @vdivu_vx_nxv16i8(<vscale x 16 x i8> %va, i8 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {230; CHECK-LABEL: vdivu_vx_nxv16i8:231; CHECK: # %bb.0:232; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma233; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t234; CHECK-NEXT: ret235 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0236 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer237 %v = call <vscale x 16 x i8> @llvm.vp.udiv.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 %evl)238 ret <vscale x 16 x i8> %v239}240 241define <vscale x 16 x i8> @vdivu_vx_nxv16i8_unmasked(<vscale x 16 x i8> %va, i8 %b, i32 zeroext %evl) {242; CHECK-LABEL: vdivu_vx_nxv16i8_unmasked:243; CHECK: # %bb.0:244; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, ma245; CHECK-NEXT: vdivu.vx v8, v8, a0246; CHECK-NEXT: ret247 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0248 %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer249 %v = call <vscale x 16 x i8> @llvm.vp.udiv.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)250 ret <vscale x 16 x i8> %v251}252 253define <vscale x 32 x i8> @vdivu_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {254; CHECK-LABEL: vdivu_vv_nxv32i8:255; CHECK: # %bb.0:256; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma257; CHECK-NEXT: vdivu.vv v8, v8, v12, v0.t258; CHECK-NEXT: ret259 %v = call <vscale x 32 x i8> @llvm.vp.udiv.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 %evl)260 ret <vscale x 32 x i8> %v261}262 263define <vscale x 32 x i8> @vdivu_vv_nxv32i8_unmasked(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, i32 zeroext %evl) {264; CHECK-LABEL: vdivu_vv_nxv32i8_unmasked:265; CHECK: # %bb.0:266; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma267; CHECK-NEXT: vdivu.vv v8, v8, v12268; CHECK-NEXT: ret269 %v = call <vscale x 32 x i8> @llvm.vp.udiv.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)270 ret <vscale x 32 x i8> %v271}272 273define <vscale x 32 x i8> @vdivu_vx_nxv32i8(<vscale x 32 x i8> %va, i8 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {274; CHECK-LABEL: vdivu_vx_nxv32i8:275; CHECK: # %bb.0:276; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma277; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t278; CHECK-NEXT: ret279 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0280 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer281 %v = call <vscale x 32 x i8> @llvm.vp.udiv.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 %evl)282 ret <vscale x 32 x i8> %v283}284 285define <vscale x 32 x i8> @vdivu_vx_nxv32i8_unmasked(<vscale x 32 x i8> %va, i8 %b, i32 zeroext %evl) {286; CHECK-LABEL: vdivu_vx_nxv32i8_unmasked:287; CHECK: # %bb.0:288; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, ma289; CHECK-NEXT: vdivu.vx v8, v8, a0290; CHECK-NEXT: ret291 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0292 %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer293 %v = call <vscale x 32 x i8> @llvm.vp.udiv.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)294 ret <vscale x 32 x i8> %v295}296 297define <vscale x 64 x i8> @vdivu_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {298; CHECK-LABEL: vdivu_vv_nxv64i8:299; CHECK: # %bb.0:300; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma301; CHECK-NEXT: vdivu.vv v8, v8, v16, v0.t302; CHECK-NEXT: ret303 %v = call <vscale x 64 x i8> @llvm.vp.udiv.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 %evl)304 ret <vscale x 64 x i8> %v305}306 307define <vscale x 64 x i8> @vdivu_vv_nxv64i8_unmasked(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, i32 zeroext %evl) {308; CHECK-LABEL: vdivu_vv_nxv64i8_unmasked:309; CHECK: # %bb.0:310; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma311; CHECK-NEXT: vdivu.vv v8, v8, v16312; CHECK-NEXT: ret313 %v = call <vscale x 64 x i8> @llvm.vp.udiv.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> splat (i1 true), i32 %evl)314 ret <vscale x 64 x i8> %v315}316 317define <vscale x 64 x i8> @vdivu_vx_nxv64i8(<vscale x 64 x i8> %va, i8 %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {318; CHECK-LABEL: vdivu_vx_nxv64i8:319; CHECK: # %bb.0:320; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma321; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t322; CHECK-NEXT: ret323 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0324 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer325 %v = call <vscale x 64 x i8> @llvm.vp.udiv.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 %evl)326 ret <vscale x 64 x i8> %v327}328 329define <vscale x 64 x i8> @vdivu_vx_nxv64i8_unmasked(<vscale x 64 x i8> %va, i8 %b, i32 zeroext %evl) {330; CHECK-LABEL: vdivu_vx_nxv64i8_unmasked:331; CHECK: # %bb.0:332; CHECK-NEXT: vsetvli zero, a1, e8, m8, ta, ma333; CHECK-NEXT: vdivu.vx v8, v8, a0334; CHECK-NEXT: ret335 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0336 %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer337 %v = call <vscale x 64 x i8> @llvm.vp.udiv.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> splat (i1 true), i32 %evl)338 ret <vscale x 64 x i8> %v339}340 341define <vscale x 1 x i16> @vdivu_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {342; CHECK-LABEL: vdivu_vv_nxv1i16:343; CHECK: # %bb.0:344; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma345; CHECK-NEXT: vdivu.vv v8, v8, v9, v0.t346; CHECK-NEXT: ret347 %v = call <vscale x 1 x i16> @llvm.vp.udiv.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 %evl)348 ret <vscale x 1 x i16> %v349}350 351define <vscale x 1 x i16> @vdivu_vv_nxv1i16_unmasked(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, i32 zeroext %evl) {352; CHECK-LABEL: vdivu_vv_nxv1i16_unmasked:353; CHECK: # %bb.0:354; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma355; CHECK-NEXT: vdivu.vv v8, v8, v9356; CHECK-NEXT: ret357 %v = call <vscale x 1 x i16> @llvm.vp.udiv.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)358 ret <vscale x 1 x i16> %v359}360 361define <vscale x 1 x i16> @vdivu_vx_nxv1i16(<vscale x 1 x i16> %va, i16 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {362; CHECK-LABEL: vdivu_vx_nxv1i16:363; CHECK: # %bb.0:364; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma365; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t366; CHECK-NEXT: ret367 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0368 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer369 %v = call <vscale x 1 x i16> @llvm.vp.udiv.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 %evl)370 ret <vscale x 1 x i16> %v371}372 373define <vscale x 1 x i16> @vdivu_vx_nxv1i16_unmasked(<vscale x 1 x i16> %va, i16 %b, i32 zeroext %evl) {374; CHECK-LABEL: vdivu_vx_nxv1i16_unmasked:375; CHECK: # %bb.0:376; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, ma377; CHECK-NEXT: vdivu.vx v8, v8, a0378; CHECK-NEXT: ret379 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0380 %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer381 %v = call <vscale x 1 x i16> @llvm.vp.udiv.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)382 ret <vscale x 1 x i16> %v383}384 385define <vscale x 2 x i16> @vdivu_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {386; CHECK-LABEL: vdivu_vv_nxv2i16:387; CHECK: # %bb.0:388; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma389; CHECK-NEXT: vdivu.vv v8, v8, v9, v0.t390; CHECK-NEXT: ret391 %v = call <vscale x 2 x i16> @llvm.vp.udiv.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 %evl)392 ret <vscale x 2 x i16> %v393}394 395define <vscale x 2 x i16> @vdivu_vv_nxv2i16_unmasked(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, i32 zeroext %evl) {396; CHECK-LABEL: vdivu_vv_nxv2i16_unmasked:397; CHECK: # %bb.0:398; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma399; CHECK-NEXT: vdivu.vv v8, v8, v9400; CHECK-NEXT: ret401 %v = call <vscale x 2 x i16> @llvm.vp.udiv.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)402 ret <vscale x 2 x i16> %v403}404 405define <vscale x 2 x i16> @vdivu_vx_nxv2i16(<vscale x 2 x i16> %va, i16 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {406; CHECK-LABEL: vdivu_vx_nxv2i16:407; CHECK: # %bb.0:408; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma409; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t410; CHECK-NEXT: ret411 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0412 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer413 %v = call <vscale x 2 x i16> @llvm.vp.udiv.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 %evl)414 ret <vscale x 2 x i16> %v415}416 417define <vscale x 2 x i16> @vdivu_vx_nxv2i16_unmasked(<vscale x 2 x i16> %va, i16 %b, i32 zeroext %evl) {418; CHECK-LABEL: vdivu_vx_nxv2i16_unmasked:419; CHECK: # %bb.0:420; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma421; CHECK-NEXT: vdivu.vx v8, v8, a0422; CHECK-NEXT: ret423 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0424 %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer425 %v = call <vscale x 2 x i16> @llvm.vp.udiv.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)426 ret <vscale x 2 x i16> %v427}428 429define <vscale x 4 x i16> @vdivu_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {430; CHECK-LABEL: vdivu_vv_nxv4i16:431; CHECK: # %bb.0:432; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma433; CHECK-NEXT: vdivu.vv v8, v8, v9, v0.t434; CHECK-NEXT: ret435 %v = call <vscale x 4 x i16> @llvm.vp.udiv.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 %evl)436 ret <vscale x 4 x i16> %v437}438 439define <vscale x 4 x i16> @vdivu_vv_nxv4i16_unmasked(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, i32 zeroext %evl) {440; CHECK-LABEL: vdivu_vv_nxv4i16_unmasked:441; CHECK: # %bb.0:442; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma443; CHECK-NEXT: vdivu.vv v8, v8, v9444; CHECK-NEXT: ret445 %v = call <vscale x 4 x i16> @llvm.vp.udiv.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)446 ret <vscale x 4 x i16> %v447}448 449define <vscale x 4 x i16> @vdivu_vx_nxv4i16(<vscale x 4 x i16> %va, i16 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {450; CHECK-LABEL: vdivu_vx_nxv4i16:451; CHECK: # %bb.0:452; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma453; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t454; CHECK-NEXT: ret455 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0456 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer457 %v = call <vscale x 4 x i16> @llvm.vp.udiv.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 %evl)458 ret <vscale x 4 x i16> %v459}460 461define <vscale x 4 x i16> @vdivu_vx_nxv4i16_unmasked(<vscale x 4 x i16> %va, i16 %b, i32 zeroext %evl) {462; CHECK-LABEL: vdivu_vx_nxv4i16_unmasked:463; CHECK: # %bb.0:464; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, ma465; CHECK-NEXT: vdivu.vx v8, v8, a0466; CHECK-NEXT: ret467 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0468 %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer469 %v = call <vscale x 4 x i16> @llvm.vp.udiv.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)470 ret <vscale x 4 x i16> %v471}472 473define <vscale x 8 x i16> @vdivu_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {474; CHECK-LABEL: vdivu_vv_nxv8i16:475; CHECK: # %bb.0:476; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma477; CHECK-NEXT: vdivu.vv v8, v8, v10, v0.t478; CHECK-NEXT: ret479 %v = call <vscale x 8 x i16> @llvm.vp.udiv.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 %evl)480 ret <vscale x 8 x i16> %v481}482 483define <vscale x 8 x i16> @vdivu_vv_nxv8i16_unmasked(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, i32 zeroext %evl) {484; CHECK-LABEL: vdivu_vv_nxv8i16_unmasked:485; CHECK: # %bb.0:486; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma487; CHECK-NEXT: vdivu.vv v8, v8, v10488; CHECK-NEXT: ret489 %v = call <vscale x 8 x i16> @llvm.vp.udiv.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)490 ret <vscale x 8 x i16> %v491}492 493define <vscale x 8 x i16> @vdivu_vx_nxv8i16(<vscale x 8 x i16> %va, i16 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {494; CHECK-LABEL: vdivu_vx_nxv8i16:495; CHECK: # %bb.0:496; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma497; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t498; CHECK-NEXT: ret499 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0500 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer501 %v = call <vscale x 8 x i16> @llvm.vp.udiv.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 %evl)502 ret <vscale x 8 x i16> %v503}504 505define <vscale x 8 x i16> @vdivu_vx_nxv8i16_unmasked(<vscale x 8 x i16> %va, i16 %b, i32 zeroext %evl) {506; CHECK-LABEL: vdivu_vx_nxv8i16_unmasked:507; CHECK: # %bb.0:508; CHECK-NEXT: vsetvli zero, a1, e16, m2, ta, ma509; CHECK-NEXT: vdivu.vx v8, v8, a0510; CHECK-NEXT: ret511 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0512 %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer513 %v = call <vscale x 8 x i16> @llvm.vp.udiv.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)514 ret <vscale x 8 x i16> %v515}516 517define <vscale x 16 x i16> @vdivu_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {518; CHECK-LABEL: vdivu_vv_nxv16i16:519; CHECK: # %bb.0:520; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma521; CHECK-NEXT: vdivu.vv v8, v8, v12, v0.t522; CHECK-NEXT: ret523 %v = call <vscale x 16 x i16> @llvm.vp.udiv.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 %evl)524 ret <vscale x 16 x i16> %v525}526 527define <vscale x 16 x i16> @vdivu_vv_nxv16i16_unmasked(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, i32 zeroext %evl) {528; CHECK-LABEL: vdivu_vv_nxv16i16_unmasked:529; CHECK: # %bb.0:530; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma531; CHECK-NEXT: vdivu.vv v8, v8, v12532; CHECK-NEXT: ret533 %v = call <vscale x 16 x i16> @llvm.vp.udiv.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)534 ret <vscale x 16 x i16> %v535}536 537define <vscale x 16 x i16> @vdivu_vx_nxv16i16(<vscale x 16 x i16> %va, i16 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {538; CHECK-LABEL: vdivu_vx_nxv16i16:539; CHECK: # %bb.0:540; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma541; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t542; CHECK-NEXT: ret543 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0544 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer545 %v = call <vscale x 16 x i16> @llvm.vp.udiv.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 %evl)546 ret <vscale x 16 x i16> %v547}548 549define <vscale x 16 x i16> @vdivu_vx_nxv16i16_unmasked(<vscale x 16 x i16> %va, i16 %b, i32 zeroext %evl) {550; CHECK-LABEL: vdivu_vx_nxv16i16_unmasked:551; CHECK: # %bb.0:552; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma553; CHECK-NEXT: vdivu.vx v8, v8, a0554; CHECK-NEXT: ret555 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0556 %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer557 %v = call <vscale x 16 x i16> @llvm.vp.udiv.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)558 ret <vscale x 16 x i16> %v559}560 561define <vscale x 32 x i16> @vdivu_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {562; CHECK-LABEL: vdivu_vv_nxv32i16:563; CHECK: # %bb.0:564; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma565; CHECK-NEXT: vdivu.vv v8, v8, v16, v0.t566; CHECK-NEXT: ret567 %v = call <vscale x 32 x i16> @llvm.vp.udiv.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 %evl)568 ret <vscale x 32 x i16> %v569}570 571define <vscale x 32 x i16> @vdivu_vv_nxv32i16_unmasked(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, i32 zeroext %evl) {572; CHECK-LABEL: vdivu_vv_nxv32i16_unmasked:573; CHECK: # %bb.0:574; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma575; CHECK-NEXT: vdivu.vv v8, v8, v16576; CHECK-NEXT: ret577 %v = call <vscale x 32 x i16> @llvm.vp.udiv.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)578 ret <vscale x 32 x i16> %v579}580 581define <vscale x 32 x i16> @vdivu_vx_nxv32i16(<vscale x 32 x i16> %va, i16 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {582; CHECK-LABEL: vdivu_vx_nxv32i16:583; CHECK: # %bb.0:584; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma585; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t586; CHECK-NEXT: ret587 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0588 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer589 %v = call <vscale x 32 x i16> @llvm.vp.udiv.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 %evl)590 ret <vscale x 32 x i16> %v591}592 593define <vscale x 32 x i16> @vdivu_vx_nxv32i16_unmasked(<vscale x 32 x i16> %va, i16 %b, i32 zeroext %evl) {594; CHECK-LABEL: vdivu_vx_nxv32i16_unmasked:595; CHECK: # %bb.0:596; CHECK-NEXT: vsetvli zero, a1, e16, m8, ta, ma597; CHECK-NEXT: vdivu.vx v8, v8, a0598; CHECK-NEXT: ret599 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0600 %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer601 %v = call <vscale x 32 x i16> @llvm.vp.udiv.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)602 ret <vscale x 32 x i16> %v603}604 605define <vscale x 1 x i32> @vdivu_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {606; CHECK-LABEL: vdivu_vv_nxv1i32:607; CHECK: # %bb.0:608; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma609; CHECK-NEXT: vdivu.vv v8, v8, v9, v0.t610; CHECK-NEXT: ret611 %v = call <vscale x 1 x i32> @llvm.vp.udiv.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 %evl)612 ret <vscale x 1 x i32> %v613}614 615define <vscale x 1 x i32> @vdivu_vv_nxv1i32_unmasked(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, i32 zeroext %evl) {616; CHECK-LABEL: vdivu_vv_nxv1i32_unmasked:617; CHECK: # %bb.0:618; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma619; CHECK-NEXT: vdivu.vv v8, v8, v9620; CHECK-NEXT: ret621 %v = call <vscale x 1 x i32> @llvm.vp.udiv.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)622 ret <vscale x 1 x i32> %v623}624 625define <vscale x 1 x i32> @vdivu_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {626; CHECK-LABEL: vdivu_vx_nxv1i32:627; CHECK: # %bb.0:628; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma629; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t630; CHECK-NEXT: ret631 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0632 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer633 %v = call <vscale x 1 x i32> @llvm.vp.udiv.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 %evl)634 ret <vscale x 1 x i32> %v635}636 637define <vscale x 1 x i32> @vdivu_vx_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 %b, i32 zeroext %evl) {638; CHECK-LABEL: vdivu_vx_nxv1i32_unmasked:639; CHECK: # %bb.0:640; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, ma641; CHECK-NEXT: vdivu.vx v8, v8, a0642; CHECK-NEXT: ret643 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0644 %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer645 %v = call <vscale x 1 x i32> @llvm.vp.udiv.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)646 ret <vscale x 1 x i32> %v647}648 649define <vscale x 2 x i32> @vdivu_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {650; CHECK-LABEL: vdivu_vv_nxv2i32:651; CHECK: # %bb.0:652; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma653; CHECK-NEXT: vdivu.vv v8, v8, v9, v0.t654; CHECK-NEXT: ret655 %v = call <vscale x 2 x i32> @llvm.vp.udiv.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 %evl)656 ret <vscale x 2 x i32> %v657}658 659define <vscale x 2 x i32> @vdivu_vv_nxv2i32_unmasked(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, i32 zeroext %evl) {660; CHECK-LABEL: vdivu_vv_nxv2i32_unmasked:661; CHECK: # %bb.0:662; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma663; CHECK-NEXT: vdivu.vv v8, v8, v9664; CHECK-NEXT: ret665 %v = call <vscale x 2 x i32> @llvm.vp.udiv.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)666 ret <vscale x 2 x i32> %v667}668 669define <vscale x 2 x i32> @vdivu_vx_nxv2i32(<vscale x 2 x i32> %va, i32 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {670; CHECK-LABEL: vdivu_vx_nxv2i32:671; CHECK: # %bb.0:672; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma673; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t674; CHECK-NEXT: ret675 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0676 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer677 %v = call <vscale x 2 x i32> @llvm.vp.udiv.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 %evl)678 ret <vscale x 2 x i32> %v679}680 681define <vscale x 2 x i32> @vdivu_vx_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 %b, i32 zeroext %evl) {682; CHECK-LABEL: vdivu_vx_nxv2i32_unmasked:683; CHECK: # %bb.0:684; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma685; CHECK-NEXT: vdivu.vx v8, v8, a0686; CHECK-NEXT: ret687 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0688 %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer689 %v = call <vscale x 2 x i32> @llvm.vp.udiv.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)690 ret <vscale x 2 x i32> %v691}692 693define <vscale x 4 x i32> @vdivu_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {694; CHECK-LABEL: vdivu_vv_nxv4i32:695; CHECK: # %bb.0:696; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma697; CHECK-NEXT: vdivu.vv v8, v8, v10, v0.t698; CHECK-NEXT: ret699 %v = call <vscale x 4 x i32> @llvm.vp.udiv.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 %evl)700 ret <vscale x 4 x i32> %v701}702 703define <vscale x 4 x i32> @vdivu_vv_nxv4i32_unmasked(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, i32 zeroext %evl) {704; CHECK-LABEL: vdivu_vv_nxv4i32_unmasked:705; CHECK: # %bb.0:706; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma707; CHECK-NEXT: vdivu.vv v8, v8, v10708; CHECK-NEXT: ret709 %v = call <vscale x 4 x i32> @llvm.vp.udiv.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)710 ret <vscale x 4 x i32> %v711}712 713define <vscale x 4 x i32> @vdivu_vx_nxv4i32(<vscale x 4 x i32> %va, i32 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {714; CHECK-LABEL: vdivu_vx_nxv4i32:715; CHECK: # %bb.0:716; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma717; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t718; CHECK-NEXT: ret719 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0720 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer721 %v = call <vscale x 4 x i32> @llvm.vp.udiv.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 %evl)722 ret <vscale x 4 x i32> %v723}724 725define <vscale x 4 x i32> @vdivu_vx_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 %b, i32 zeroext %evl) {726; CHECK-LABEL: vdivu_vx_nxv4i32_unmasked:727; CHECK: # %bb.0:728; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma729; CHECK-NEXT: vdivu.vx v8, v8, a0730; CHECK-NEXT: ret731 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0732 %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer733 %v = call <vscale x 4 x i32> @llvm.vp.udiv.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)734 ret <vscale x 4 x i32> %v735}736 737define <vscale x 8 x i32> @vdivu_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {738; CHECK-LABEL: vdivu_vv_nxv8i32:739; CHECK: # %bb.0:740; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma741; CHECK-NEXT: vdivu.vv v8, v8, v12, v0.t742; CHECK-NEXT: ret743 %v = call <vscale x 8 x i32> @llvm.vp.udiv.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 %evl)744 ret <vscale x 8 x i32> %v745}746 747define <vscale x 8 x i32> @vdivu_vv_nxv8i32_unmasked(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, i32 zeroext %evl) {748; CHECK-LABEL: vdivu_vv_nxv8i32_unmasked:749; CHECK: # %bb.0:750; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma751; CHECK-NEXT: vdivu.vv v8, v8, v12752; CHECK-NEXT: ret753 %v = call <vscale x 8 x i32> @llvm.vp.udiv.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)754 ret <vscale x 8 x i32> %v755}756 757define <vscale x 8 x i32> @vdivu_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {758; CHECK-LABEL: vdivu_vx_nxv8i32:759; CHECK: # %bb.0:760; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma761; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t762; CHECK-NEXT: ret763 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0764 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer765 %v = call <vscale x 8 x i32> @llvm.vp.udiv.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 %evl)766 ret <vscale x 8 x i32> %v767}768 769define <vscale x 8 x i32> @vdivu_vx_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 %b, i32 zeroext %evl) {770; CHECK-LABEL: vdivu_vx_nxv8i32_unmasked:771; CHECK: # %bb.0:772; CHECK-NEXT: vsetvli zero, a1, e32, m4, ta, ma773; CHECK-NEXT: vdivu.vx v8, v8, a0774; CHECK-NEXT: ret775 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0776 %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer777 %v = call <vscale x 8 x i32> @llvm.vp.udiv.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)778 ret <vscale x 8 x i32> %v779}780 781define <vscale x 16 x i32> @vdivu_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {782; CHECK-LABEL: vdivu_vv_nxv16i32:783; CHECK: # %bb.0:784; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma785; CHECK-NEXT: vdivu.vv v8, v8, v16, v0.t786; CHECK-NEXT: ret787 %v = call <vscale x 16 x i32> @llvm.vp.udiv.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 %evl)788 ret <vscale x 16 x i32> %v789}790 791define <vscale x 16 x i32> @vdivu_vv_nxv16i32_unmasked(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, i32 zeroext %evl) {792; CHECK-LABEL: vdivu_vv_nxv16i32_unmasked:793; CHECK: # %bb.0:794; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma795; CHECK-NEXT: vdivu.vv v8, v8, v16796; CHECK-NEXT: ret797 %v = call <vscale x 16 x i32> @llvm.vp.udiv.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)798 ret <vscale x 16 x i32> %v799}800 801define <vscale x 16 x i32> @vdivu_vx_nxv16i32(<vscale x 16 x i32> %va, i32 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {802; CHECK-LABEL: vdivu_vx_nxv16i32:803; CHECK: # %bb.0:804; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma805; CHECK-NEXT: vdivu.vx v8, v8, a0, v0.t806; CHECK-NEXT: ret807 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0808 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer809 %v = call <vscale x 16 x i32> @llvm.vp.udiv.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 %evl)810 ret <vscale x 16 x i32> %v811}812 813define <vscale x 16 x i32> @vdivu_vx_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 %b, i32 zeroext %evl) {814; CHECK-LABEL: vdivu_vx_nxv16i32_unmasked:815; CHECK: # %bb.0:816; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma817; CHECK-NEXT: vdivu.vx v8, v8, a0818; CHECK-NEXT: ret819 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0820 %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer821 %v = call <vscale x 16 x i32> @llvm.vp.udiv.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)822 ret <vscale x 16 x i32> %v823}824 825define <vscale x 1 x i64> @vdivu_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {826; CHECK-LABEL: vdivu_vv_nxv1i64:827; CHECK: # %bb.0:828; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma829; CHECK-NEXT: vdivu.vv v8, v8, v9, v0.t830; CHECK-NEXT: ret831 %v = call <vscale x 1 x i64> @llvm.vp.udiv.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 %evl)832 ret <vscale x 1 x i64> %v833}834 835define <vscale x 1 x i64> @vdivu_vv_nxv1i64_unmasked(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, i32 zeroext %evl) {836; CHECK-LABEL: vdivu_vv_nxv1i64_unmasked:837; CHECK: # %bb.0:838; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma839; CHECK-NEXT: vdivu.vv v8, v8, v9840; CHECK-NEXT: ret841 %v = call <vscale x 1 x i64> @llvm.vp.udiv.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)842 ret <vscale x 1 x i64> %v843}844 845define <vscale x 1 x i64> @vdivu_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {846; RV32-LABEL: vdivu_vx_nxv1i64:847; RV32: # %bb.0:848; RV32-NEXT: addi sp, sp, -16849; RV32-NEXT: .cfi_def_cfa_offset 16850; RV32-NEXT: sw a0, 8(sp)851; RV32-NEXT: sw a1, 12(sp)852; RV32-NEXT: addi a0, sp, 8853; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma854; RV32-NEXT: vlse64.v v9, (a0), zero855; RV32-NEXT: vdivu.vv v8, v8, v9, v0.t856; RV32-NEXT: addi sp, sp, 16857; RV32-NEXT: .cfi_def_cfa_offset 0858; RV32-NEXT: ret859;860; RV64-LABEL: vdivu_vx_nxv1i64:861; RV64: # %bb.0:862; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma863; RV64-NEXT: vdivu.vx v8, v8, a0, v0.t864; RV64-NEXT: ret865 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0866 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer867 %v = call <vscale x 1 x i64> @llvm.vp.udiv.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 %evl)868 ret <vscale x 1 x i64> %v869}870 871define <vscale x 1 x i64> @vdivu_vx_nxv1i64_unmasked(<vscale x 1 x i64> %va, i64 %b, i32 zeroext %evl) {872; RV32-LABEL: vdivu_vx_nxv1i64_unmasked:873; RV32: # %bb.0:874; RV32-NEXT: addi sp, sp, -16875; RV32-NEXT: .cfi_def_cfa_offset 16876; RV32-NEXT: sw a0, 8(sp)877; RV32-NEXT: sw a1, 12(sp)878; RV32-NEXT: addi a0, sp, 8879; RV32-NEXT: vsetvli zero, a2, e64, m1, ta, ma880; RV32-NEXT: vlse64.v v9, (a0), zero881; RV32-NEXT: vdivu.vv v8, v8, v9882; RV32-NEXT: addi sp, sp, 16883; RV32-NEXT: .cfi_def_cfa_offset 0884; RV32-NEXT: ret885;886; RV64-LABEL: vdivu_vx_nxv1i64_unmasked:887; RV64: # %bb.0:888; RV64-NEXT: vsetvli zero, a1, e64, m1, ta, ma889; RV64-NEXT: vdivu.vx v8, v8, a0890; RV64-NEXT: ret891 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0892 %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer893 %v = call <vscale x 1 x i64> @llvm.vp.udiv.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)894 ret <vscale x 1 x i64> %v895}896 897define <vscale x 2 x i64> @vdivu_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {898; CHECK-LABEL: vdivu_vv_nxv2i64:899; CHECK: # %bb.0:900; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma901; CHECK-NEXT: vdivu.vv v8, v8, v10, v0.t902; CHECK-NEXT: ret903 %v = call <vscale x 2 x i64> @llvm.vp.udiv.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 %evl)904 ret <vscale x 2 x i64> %v905}906 907define <vscale x 2 x i64> @vdivu_vv_nxv2i64_unmasked(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, i32 zeroext %evl) {908; CHECK-LABEL: vdivu_vv_nxv2i64_unmasked:909; CHECK: # %bb.0:910; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma911; CHECK-NEXT: vdivu.vv v8, v8, v10912; CHECK-NEXT: ret913 %v = call <vscale x 2 x i64> @llvm.vp.udiv.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)914 ret <vscale x 2 x i64> %v915}916 917define <vscale x 2 x i64> @vdivu_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {918; RV32-LABEL: vdivu_vx_nxv2i64:919; RV32: # %bb.0:920; RV32-NEXT: addi sp, sp, -16921; RV32-NEXT: .cfi_def_cfa_offset 16922; RV32-NEXT: sw a0, 8(sp)923; RV32-NEXT: sw a1, 12(sp)924; RV32-NEXT: addi a0, sp, 8925; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma926; RV32-NEXT: vlse64.v v10, (a0), zero927; RV32-NEXT: vdivu.vv v8, v8, v10, v0.t928; RV32-NEXT: addi sp, sp, 16929; RV32-NEXT: .cfi_def_cfa_offset 0930; RV32-NEXT: ret931;932; RV64-LABEL: vdivu_vx_nxv2i64:933; RV64: # %bb.0:934; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma935; RV64-NEXT: vdivu.vx v8, v8, a0, v0.t936; RV64-NEXT: ret937 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0938 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer939 %v = call <vscale x 2 x i64> @llvm.vp.udiv.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 %evl)940 ret <vscale x 2 x i64> %v941}942 943define <vscale x 2 x i64> @vdivu_vx_nxv2i64_unmasked(<vscale x 2 x i64> %va, i64 %b, i32 zeroext %evl) {944; RV32-LABEL: vdivu_vx_nxv2i64_unmasked:945; RV32: # %bb.0:946; RV32-NEXT: addi sp, sp, -16947; RV32-NEXT: .cfi_def_cfa_offset 16948; RV32-NEXT: sw a0, 8(sp)949; RV32-NEXT: sw a1, 12(sp)950; RV32-NEXT: addi a0, sp, 8951; RV32-NEXT: vsetvli zero, a2, e64, m2, ta, ma952; RV32-NEXT: vlse64.v v10, (a0), zero953; RV32-NEXT: vdivu.vv v8, v8, v10954; RV32-NEXT: addi sp, sp, 16955; RV32-NEXT: .cfi_def_cfa_offset 0956; RV32-NEXT: ret957;958; RV64-LABEL: vdivu_vx_nxv2i64_unmasked:959; RV64: # %bb.0:960; RV64-NEXT: vsetvli zero, a1, e64, m2, ta, ma961; RV64-NEXT: vdivu.vx v8, v8, a0962; RV64-NEXT: ret963 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0964 %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer965 %v = call <vscale x 2 x i64> @llvm.vp.udiv.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)966 ret <vscale x 2 x i64> %v967}968 969define <vscale x 4 x i64> @vdivu_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {970; CHECK-LABEL: vdivu_vv_nxv4i64:971; CHECK: # %bb.0:972; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma973; CHECK-NEXT: vdivu.vv v8, v8, v12, v0.t974; CHECK-NEXT: ret975 %v = call <vscale x 4 x i64> @llvm.vp.udiv.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 %evl)976 ret <vscale x 4 x i64> %v977}978 979define <vscale x 4 x i64> @vdivu_vv_nxv4i64_unmasked(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, i32 zeroext %evl) {980; CHECK-LABEL: vdivu_vv_nxv4i64_unmasked:981; CHECK: # %bb.0:982; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma983; CHECK-NEXT: vdivu.vv v8, v8, v12984; CHECK-NEXT: ret985 %v = call <vscale x 4 x i64> @llvm.vp.udiv.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)986 ret <vscale x 4 x i64> %v987}988 989define <vscale x 4 x i64> @vdivu_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {990; RV32-LABEL: vdivu_vx_nxv4i64:991; RV32: # %bb.0:992; RV32-NEXT: addi sp, sp, -16993; RV32-NEXT: .cfi_def_cfa_offset 16994; RV32-NEXT: sw a0, 8(sp)995; RV32-NEXT: sw a1, 12(sp)996; RV32-NEXT: addi a0, sp, 8997; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma998; RV32-NEXT: vlse64.v v12, (a0), zero999; RV32-NEXT: vdivu.vv v8, v8, v12, v0.t1000; RV32-NEXT: addi sp, sp, 161001; RV32-NEXT: .cfi_def_cfa_offset 01002; RV32-NEXT: ret1003;1004; RV64-LABEL: vdivu_vx_nxv4i64:1005; RV64: # %bb.0:1006; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1007; RV64-NEXT: vdivu.vx v8, v8, a0, v0.t1008; RV64-NEXT: ret1009 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01010 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1011 %v = call <vscale x 4 x i64> @llvm.vp.udiv.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 %evl)1012 ret <vscale x 4 x i64> %v1013}1014 1015define <vscale x 4 x i64> @vdivu_vx_nxv4i64_unmasked(<vscale x 4 x i64> %va, i64 %b, i32 zeroext %evl) {1016; RV32-LABEL: vdivu_vx_nxv4i64_unmasked:1017; RV32: # %bb.0:1018; RV32-NEXT: addi sp, sp, -161019; RV32-NEXT: .cfi_def_cfa_offset 161020; RV32-NEXT: sw a0, 8(sp)1021; RV32-NEXT: sw a1, 12(sp)1022; RV32-NEXT: addi a0, sp, 81023; RV32-NEXT: vsetvli zero, a2, e64, m4, ta, ma1024; RV32-NEXT: vlse64.v v12, (a0), zero1025; RV32-NEXT: vdivu.vv v8, v8, v121026; RV32-NEXT: addi sp, sp, 161027; RV32-NEXT: .cfi_def_cfa_offset 01028; RV32-NEXT: ret1029;1030; RV64-LABEL: vdivu_vx_nxv4i64_unmasked:1031; RV64: # %bb.0:1032; RV64-NEXT: vsetvli zero, a1, e64, m4, ta, ma1033; RV64-NEXT: vdivu.vx v8, v8, a01034; RV64-NEXT: ret1035 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 01036 %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer1037 %v = call <vscale x 4 x i64> @llvm.vp.udiv.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)1038 ret <vscale x 4 x i64> %v1039}1040 1041define <vscale x 8 x i64> @vdivu_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1042; CHECK-LABEL: vdivu_vv_nxv8i64:1043; CHECK: # %bb.0:1044; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1045; CHECK-NEXT: vdivu.vv v8, v8, v16, v0.t1046; CHECK-NEXT: ret1047 %v = call <vscale x 8 x i64> @llvm.vp.udiv.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 %evl)1048 ret <vscale x 8 x i64> %v1049}1050 1051define <vscale x 8 x i64> @vdivu_vv_nxv8i64_unmasked(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, i32 zeroext %evl) {1052; CHECK-LABEL: vdivu_vv_nxv8i64_unmasked:1053; CHECK: # %bb.0:1054; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma1055; CHECK-NEXT: vdivu.vv v8, v8, v161056; CHECK-NEXT: ret1057 %v = call <vscale x 8 x i64> @llvm.vp.udiv.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)1058 ret <vscale x 8 x i64> %v1059}1060 1061define <vscale x 8 x i64> @vdivu_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {1062; RV32-LABEL: vdivu_vx_nxv8i64:1063; RV32: # %bb.0:1064; RV32-NEXT: addi sp, sp, -161065; RV32-NEXT: .cfi_def_cfa_offset 161066; RV32-NEXT: sw a0, 8(sp)1067; RV32-NEXT: sw a1, 12(sp)1068; RV32-NEXT: addi a0, sp, 81069; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1070; RV32-NEXT: vlse64.v v16, (a0), zero1071; RV32-NEXT: vdivu.vv v8, v8, v16, v0.t1072; RV32-NEXT: addi sp, sp, 161073; RV32-NEXT: .cfi_def_cfa_offset 01074; RV32-NEXT: ret1075;1076; RV64-LABEL: vdivu_vx_nxv8i64:1077; RV64: # %bb.0:1078; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1079; RV64-NEXT: vdivu.vx v8, v8, a0, v0.t1080; RV64-NEXT: ret1081 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01082 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1083 %v = call <vscale x 8 x i64> @llvm.vp.udiv.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 %evl)1084 ret <vscale x 8 x i64> %v1085}1086 1087define <vscale x 8 x i64> @vdivu_vx_nxv8i64_unmasked(<vscale x 8 x i64> %va, i64 %b, i32 zeroext %evl) {1088; RV32-LABEL: vdivu_vx_nxv8i64_unmasked:1089; RV32: # %bb.0:1090; RV32-NEXT: addi sp, sp, -161091; RV32-NEXT: .cfi_def_cfa_offset 161092; RV32-NEXT: sw a0, 8(sp)1093; RV32-NEXT: sw a1, 12(sp)1094; RV32-NEXT: addi a0, sp, 81095; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, ma1096; RV32-NEXT: vlse64.v v16, (a0), zero1097; RV32-NEXT: vdivu.vv v8, v8, v161098; RV32-NEXT: addi sp, sp, 161099; RV32-NEXT: .cfi_def_cfa_offset 01100; RV32-NEXT: ret1101;1102; RV64-LABEL: vdivu_vx_nxv8i64_unmasked:1103; RV64: # %bb.0:1104; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, ma1105; RV64-NEXT: vdivu.vx v8, v8, a01106; RV64-NEXT: ret1107 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 01108 %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer1109 %v = call <vscale x 8 x i64> @llvm.vp.udiv.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)1110 ret <vscale x 8 x i64> %v1111}1112