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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \3; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \4; RUN: --check-prefixes=CHECK,ZVFH5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \6; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \7; RUN: --check-prefixes=CHECK,ZVFH8; RUN: llc -mtriple=riscv32 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \9; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \10; RUN: --check-prefixes=CHECK,ZVFHMIN11; RUN: llc -mtriple=riscv64 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \12; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \13; RUN: --check-prefixes=CHECK,ZVFHMIN14; RUN: llc -mtriple=riscv64 -mattr=+zvfhmin,+experimental-zvfbfa,+v \15; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \16; RUN: --check-prefixes=CHECK,ZVFBFA17 18define <vscale x 1 x bfloat> @vfadd_vv_nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {19; ZVFH-LABEL: vfadd_vv_nxv1bf16:20; ZVFH: # %bb.0:21; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma22; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t23; ZVFH-NEXT: vfwcvtbf16.f.f.v v9, v8, v0.t24; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma25; ZVFH-NEXT: vfadd.vv v9, v9, v10, v0.t26; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma27; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t28; ZVFH-NEXT: ret29;30; ZVFHMIN-LABEL: vfadd_vv_nxv1bf16:31; ZVFHMIN: # %bb.0:32; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma33; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t34; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v9, v8, v0.t35; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma36; ZVFHMIN-NEXT: vfadd.vv v9, v9, v10, v0.t37; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma38; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t39; ZVFHMIN-NEXT: ret40;41; ZVFBFA-LABEL: vfadd_vv_nxv1bf16:42; ZVFBFA: # %bb.0:43; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, mf4, ta, ma44; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v9, v0.t45; ZVFBFA-NEXT: vfwcvt.f.f.v v9, v8, v0.t46; ZVFBFA-NEXT: vsetvli zero, zero, e32, mf2, ta, ma47; ZVFBFA-NEXT: vfadd.vv v9, v9, v10, v0.t48; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, mf4, ta, ma49; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9, v0.t50; ZVFBFA-NEXT: ret51 %v = call <vscale x 1 x bfloat> @llvm.vp.fadd.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x i1> %m, i32 %evl)52 ret <vscale x 1 x bfloat> %v53}54 55define <vscale x 1 x bfloat> @vfadd_vv_nxv1bf16_unmasked(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, i32 zeroext %evl) {56; ZVFH-LABEL: vfadd_vv_nxv1bf16_unmasked:57; ZVFH: # %bb.0:58; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma59; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v960; ZVFH-NEXT: vfwcvtbf16.f.f.v v9, v861; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma62; ZVFH-NEXT: vfadd.vv v9, v9, v1063; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma64; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v965; ZVFH-NEXT: ret66;67; ZVFHMIN-LABEL: vfadd_vv_nxv1bf16_unmasked:68; ZVFHMIN: # %bb.0:69; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma70; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v971; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v9, v872; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma73; ZVFHMIN-NEXT: vfadd.vv v9, v9, v1074; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma75; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v976; ZVFHMIN-NEXT: ret77;78; ZVFBFA-LABEL: vfadd_vv_nxv1bf16_unmasked:79; ZVFBFA: # %bb.0:80; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, mf4, ta, ma81; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v982; ZVFBFA-NEXT: vfwcvt.f.f.v v9, v883; ZVFBFA-NEXT: vsetvli zero, zero, e32, mf2, ta, ma84; ZVFBFA-NEXT: vfadd.vv v9, v9, v1085; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, mf4, ta, ma86; ZVFBFA-NEXT: vfncvt.f.f.w v8, v987; ZVFBFA-NEXT: ret88 %v = call <vscale x 1 x bfloat> @llvm.vp.fadd.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)89 ret <vscale x 1 x bfloat> %v90}91 92define <vscale x 1 x bfloat> @vfadd_vf_nxv1bf16(<vscale x 1 x bfloat> %va, bfloat %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {93; ZVFH-LABEL: vfadd_vf_nxv1bf16:94; ZVFH: # %bb.0:95; ZVFH-NEXT: fmv.x.h a1, fa096; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma97; ZVFH-NEXT: vmv.v.x v9, a198; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t99; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v9, v0.t100; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma101; ZVFH-NEXT: vfadd.vv v9, v10, v8, v0.t102; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma103; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t104; ZVFH-NEXT: ret105;106; ZVFHMIN-LABEL: vfadd_vf_nxv1bf16:107; ZVFHMIN: # %bb.0:108; ZVFHMIN-NEXT: fmv.x.h a1, fa0109; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma110; ZVFHMIN-NEXT: vmv.v.x v9, a1111; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t112; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v8, v9, v0.t113; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma114; ZVFHMIN-NEXT: vfadd.vv v9, v10, v8, v0.t115; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma116; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t117; ZVFHMIN-NEXT: ret118;119; ZVFBFA-LABEL: vfadd_vf_nxv1bf16:120; ZVFBFA: # %bb.0:121; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, mf4, ta, ma122; ZVFBFA-NEXT: vfmv.v.f v9, fa0123; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v8, v0.t124; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v9, v0.t125; ZVFBFA-NEXT: vsetvli zero, zero, e32, mf2, ta, ma126; ZVFBFA-NEXT: vfadd.vv v9, v10, v8, v0.t127; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, mf4, ta, ma128; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9, v0.t129; ZVFBFA-NEXT: ret130 %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 0131 %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer132 %v = call <vscale x 1 x bfloat> @llvm.vp.fadd.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vb, <vscale x 1 x i1> %m, i32 %evl)133 ret <vscale x 1 x bfloat> %v134}135 136define <vscale x 1 x bfloat> @vfadd_vf_nxv1bf16_commute(<vscale x 1 x bfloat> %va, bfloat %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {137; ZVFH-LABEL: vfadd_vf_nxv1bf16_commute:138; ZVFH: # %bb.0:139; ZVFH-NEXT: fmv.x.h a1, fa0140; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma141; ZVFH-NEXT: vmv.v.x v9, a1142; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t143; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v9, v0.t144; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma145; ZVFH-NEXT: vfadd.vv v9, v8, v10, v0.t146; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma147; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t148; ZVFH-NEXT: ret149;150; ZVFHMIN-LABEL: vfadd_vf_nxv1bf16_commute:151; ZVFHMIN: # %bb.0:152; ZVFHMIN-NEXT: fmv.x.h a1, fa0153; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma154; ZVFHMIN-NEXT: vmv.v.x v9, a1155; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t156; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v8, v9, v0.t157; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma158; ZVFHMIN-NEXT: vfadd.vv v9, v8, v10, v0.t159; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma160; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t161; ZVFHMIN-NEXT: ret162;163; ZVFBFA-LABEL: vfadd_vf_nxv1bf16_commute:164; ZVFBFA: # %bb.0:165; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, mf4, ta, ma166; ZVFBFA-NEXT: vfmv.v.f v9, fa0167; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v8, v0.t168; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v9, v0.t169; ZVFBFA-NEXT: vsetvli zero, zero, e32, mf2, ta, ma170; ZVFBFA-NEXT: vfadd.vv v9, v8, v10, v0.t171; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, mf4, ta, ma172; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9, v0.t173; ZVFBFA-NEXT: ret174 %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 0175 %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer176 %v = call <vscale x 1 x bfloat> @llvm.vp.fadd.nxv1bf16(<vscale x 1 x bfloat> %vb, <vscale x 1 x bfloat> %va, <vscale x 1 x i1> %m, i32 %evl)177 ret <vscale x 1 x bfloat> %v178}179 180define <vscale x 1 x bfloat> @vfadd_vf_nxv1bf16_unmasked(<vscale x 1 x bfloat> %va, bfloat %b, i32 zeroext %evl) {181; ZVFH-LABEL: vfadd_vf_nxv1bf16_unmasked:182; ZVFH: # %bb.0:183; ZVFH-NEXT: fmv.x.h a1, fa0184; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma185; ZVFH-NEXT: vmv.v.x v9, a1186; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8187; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v9188; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma189; ZVFH-NEXT: vfadd.vv v9, v10, v8190; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma191; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v9192; ZVFH-NEXT: ret193;194; ZVFHMIN-LABEL: vfadd_vf_nxv1bf16_unmasked:195; ZVFHMIN: # %bb.0:196; ZVFHMIN-NEXT: fmv.x.h a1, fa0197; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma198; ZVFHMIN-NEXT: vmv.v.x v9, a1199; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v8200; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v8, v9201; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma202; ZVFHMIN-NEXT: vfadd.vv v9, v10, v8203; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma204; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v9205; ZVFHMIN-NEXT: ret206;207; ZVFBFA-LABEL: vfadd_vf_nxv1bf16_unmasked:208; ZVFBFA: # %bb.0:209; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, mf4, ta, ma210; ZVFBFA-NEXT: vfmv.v.f v9, fa0211; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v8212; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v9213; ZVFBFA-NEXT: vsetvli zero, zero, e32, mf2, ta, ma214; ZVFBFA-NEXT: vfadd.vv v9, v10, v8215; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, mf4, ta, ma216; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9217; ZVFBFA-NEXT: ret218 %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 0219 %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer220 %v = call <vscale x 1 x bfloat> @llvm.vp.fadd.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)221 ret <vscale x 1 x bfloat> %v222}223 224define <vscale x 1 x bfloat> @vfadd_vf_nxv1bf16_unmasked_commute(<vscale x 1 x bfloat> %va, bfloat %b, i32 zeroext %evl) {225; ZVFH-LABEL: vfadd_vf_nxv1bf16_unmasked_commute:226; ZVFH: # %bb.0:227; ZVFH-NEXT: fmv.x.h a1, fa0228; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma229; ZVFH-NEXT: vmv.v.x v9, a1230; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8231; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v9232; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma233; ZVFH-NEXT: vfadd.vv v9, v8, v10234; ZVFH-NEXT: vsetvli zero, zero, e16, mf4, ta, ma235; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v9236; ZVFH-NEXT: ret237;238; ZVFHMIN-LABEL: vfadd_vf_nxv1bf16_unmasked_commute:239; ZVFHMIN: # %bb.0:240; ZVFHMIN-NEXT: fmv.x.h a1, fa0241; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma242; ZVFHMIN-NEXT: vmv.v.x v9, a1243; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v8244; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v8, v9245; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma246; ZVFHMIN-NEXT: vfadd.vv v9, v8, v10247; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma248; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v9249; ZVFHMIN-NEXT: ret250;251; ZVFBFA-LABEL: vfadd_vf_nxv1bf16_unmasked_commute:252; ZVFBFA: # %bb.0:253; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, mf4, ta, ma254; ZVFBFA-NEXT: vfmv.v.f v9, fa0255; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v8256; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v9257; ZVFBFA-NEXT: vsetvli zero, zero, e32, mf2, ta, ma258; ZVFBFA-NEXT: vfadd.vv v9, v8, v10259; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, mf4, ta, ma260; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9261; ZVFBFA-NEXT: ret262 %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 0263 %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer264 %v = call <vscale x 1 x bfloat> @llvm.vp.fadd.nxv1bf16(<vscale x 1 x bfloat> %vb, <vscale x 1 x bfloat> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)265 ret <vscale x 1 x bfloat> %v266}267 268define <vscale x 2 x bfloat> @vfadd_vv_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {269; ZVFH-LABEL: vfadd_vv_nxv2bf16:270; ZVFH: # %bb.0:271; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma272; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t273; ZVFH-NEXT: vfwcvtbf16.f.f.v v9, v8, v0.t274; ZVFH-NEXT: vsetvli zero, zero, e32, m1, ta, ma275; ZVFH-NEXT: vfadd.vv v9, v9, v10, v0.t276; ZVFH-NEXT: vsetvli zero, zero, e16, mf2, ta, ma277; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t278; ZVFH-NEXT: ret279;280; ZVFHMIN-LABEL: vfadd_vv_nxv2bf16:281; ZVFHMIN: # %bb.0:282; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma283; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t284; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v9, v8, v0.t285; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma286; ZVFHMIN-NEXT: vfadd.vv v9, v9, v10, v0.t287; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma288; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t289; ZVFHMIN-NEXT: ret290;291; ZVFBFA-LABEL: vfadd_vv_nxv2bf16:292; ZVFBFA: # %bb.0:293; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, mf2, ta, ma294; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v9, v0.t295; ZVFBFA-NEXT: vfwcvt.f.f.v v9, v8, v0.t296; ZVFBFA-NEXT: vsetvli zero, zero, e32, m1, ta, ma297; ZVFBFA-NEXT: vfadd.vv v9, v9, v10, v0.t298; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, mf2, ta, ma299; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9, v0.t300; ZVFBFA-NEXT: ret301 %v = call <vscale x 2 x bfloat> @llvm.vp.fadd.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x i1> %m, i32 %evl)302 ret <vscale x 2 x bfloat> %v303}304 305define <vscale x 2 x bfloat> @vfadd_vv_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, i32 zeroext %evl) {306; ZVFH-LABEL: vfadd_vv_nxv2bf16_unmasked:307; ZVFH: # %bb.0:308; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma309; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v9310; ZVFH-NEXT: vfwcvtbf16.f.f.v v9, v8311; ZVFH-NEXT: vsetvli zero, zero, e32, m1, ta, ma312; ZVFH-NEXT: vfadd.vv v9, v9, v10313; ZVFH-NEXT: vsetvli zero, zero, e16, mf2, ta, ma314; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v9315; ZVFH-NEXT: ret316;317; ZVFHMIN-LABEL: vfadd_vv_nxv2bf16_unmasked:318; ZVFHMIN: # %bb.0:319; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma320; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v9321; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v9, v8322; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma323; ZVFHMIN-NEXT: vfadd.vv v9, v9, v10324; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma325; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v9326; ZVFHMIN-NEXT: ret327;328; ZVFBFA-LABEL: vfadd_vv_nxv2bf16_unmasked:329; ZVFBFA: # %bb.0:330; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, mf2, ta, ma331; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v9332; ZVFBFA-NEXT: vfwcvt.f.f.v v9, v8333; ZVFBFA-NEXT: vsetvli zero, zero, e32, m1, ta, ma334; ZVFBFA-NEXT: vfadd.vv v9, v9, v10335; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, mf2, ta, ma336; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9337; ZVFBFA-NEXT: ret338 %v = call <vscale x 2 x bfloat> @llvm.vp.fadd.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)339 ret <vscale x 2 x bfloat> %v340}341 342define <vscale x 2 x bfloat> @vfadd_vf_nxv2bf16(<vscale x 2 x bfloat> %va, bfloat %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {343; ZVFH-LABEL: vfadd_vf_nxv2bf16:344; ZVFH: # %bb.0:345; ZVFH-NEXT: fmv.x.h a1, fa0346; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma347; ZVFH-NEXT: vmv.v.x v9, a1348; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t349; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v9, v0.t350; ZVFH-NEXT: vsetvli zero, zero, e32, m1, ta, ma351; ZVFH-NEXT: vfadd.vv v9, v10, v8, v0.t352; ZVFH-NEXT: vsetvli zero, zero, e16, mf2, ta, ma353; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t354; ZVFH-NEXT: ret355;356; ZVFHMIN-LABEL: vfadd_vf_nxv2bf16:357; ZVFHMIN: # %bb.0:358; ZVFHMIN-NEXT: fmv.x.h a1, fa0359; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma360; ZVFHMIN-NEXT: vmv.v.x v9, a1361; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t362; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v8, v9, v0.t363; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma364; ZVFHMIN-NEXT: vfadd.vv v9, v10, v8, v0.t365; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma366; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v9, v0.t367; ZVFHMIN-NEXT: ret368;369; ZVFBFA-LABEL: vfadd_vf_nxv2bf16:370; ZVFBFA: # %bb.0:371; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, mf2, ta, ma372; ZVFBFA-NEXT: vfmv.v.f v9, fa0373; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v8, v0.t374; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v9, v0.t375; ZVFBFA-NEXT: vsetvli zero, zero, e32, m1, ta, ma376; ZVFBFA-NEXT: vfadd.vv v9, v10, v8, v0.t377; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, mf2, ta, ma378; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9, v0.t379; ZVFBFA-NEXT: ret380 %elt.head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0381 %vb = shufflevector <vscale x 2 x bfloat> %elt.head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer382 %v = call <vscale x 2 x bfloat> @llvm.vp.fadd.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vb, <vscale x 2 x i1> %m, i32 %evl)383 ret <vscale x 2 x bfloat> %v384}385 386define <vscale x 2 x bfloat> @vfadd_vf_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, bfloat %b, i32 zeroext %evl) {387; ZVFH-LABEL: vfadd_vf_nxv2bf16_unmasked:388; ZVFH: # %bb.0:389; ZVFH-NEXT: fmv.x.h a1, fa0390; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma391; ZVFH-NEXT: vmv.v.x v9, a1392; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8393; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v9394; ZVFH-NEXT: vsetvli zero, zero, e32, m1, ta, ma395; ZVFH-NEXT: vfadd.vv v9, v10, v8396; ZVFH-NEXT: vsetvli zero, zero, e16, mf2, ta, ma397; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v9398; ZVFH-NEXT: ret399;400; ZVFHMIN-LABEL: vfadd_vf_nxv2bf16_unmasked:401; ZVFHMIN: # %bb.0:402; ZVFHMIN-NEXT: fmv.x.h a1, fa0403; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma404; ZVFHMIN-NEXT: vmv.v.x v9, a1405; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v8406; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v8, v9407; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma408; ZVFHMIN-NEXT: vfadd.vv v9, v10, v8409; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma410; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v9411; ZVFHMIN-NEXT: ret412;413; ZVFBFA-LABEL: vfadd_vf_nxv2bf16_unmasked:414; ZVFBFA: # %bb.0:415; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, mf2, ta, ma416; ZVFBFA-NEXT: vfmv.v.f v9, fa0417; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v8418; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v9419; ZVFBFA-NEXT: vsetvli zero, zero, e32, m1, ta, ma420; ZVFBFA-NEXT: vfadd.vv v9, v10, v8421; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, mf2, ta, ma422; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9423; ZVFBFA-NEXT: ret424 %elt.head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0425 %vb = shufflevector <vscale x 2 x bfloat> %elt.head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer426 %v = call <vscale x 2 x bfloat> @llvm.vp.fadd.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)427 ret <vscale x 2 x bfloat> %v428}429 430define <vscale x 4 x bfloat> @vfadd_vv_nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {431; ZVFH-LABEL: vfadd_vv_nxv4bf16:432; ZVFH: # %bb.0:433; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma434; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t435; ZVFH-NEXT: vfwcvtbf16.f.f.v v12, v8, v0.t436; ZVFH-NEXT: vsetvli zero, zero, e32, m2, ta, ma437; ZVFH-NEXT: vfadd.vv v10, v12, v10, v0.t438; ZVFH-NEXT: vsetvli zero, zero, e16, m1, ta, ma439; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v10, v0.t440; ZVFH-NEXT: ret441;442; ZVFHMIN-LABEL: vfadd_vv_nxv4bf16:443; ZVFHMIN: # %bb.0:444; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma445; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t446; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v12, v8, v0.t447; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma448; ZVFHMIN-NEXT: vfadd.vv v10, v12, v10, v0.t449; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma450; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v10, v0.t451; ZVFHMIN-NEXT: ret452;453; ZVFBFA-LABEL: vfadd_vv_nxv4bf16:454; ZVFBFA: # %bb.0:455; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m1, ta, ma456; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v9, v0.t457; ZVFBFA-NEXT: vfwcvt.f.f.v v12, v8, v0.t458; ZVFBFA-NEXT: vsetvli zero, zero, e32, m2, ta, ma459; ZVFBFA-NEXT: vfadd.vv v10, v12, v10, v0.t460; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m1, ta, ma461; ZVFBFA-NEXT: vfncvt.f.f.w v8, v10, v0.t462; ZVFBFA-NEXT: ret463 %v = call <vscale x 4 x bfloat> @llvm.vp.fadd.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x i1> %m, i32 %evl)464 ret <vscale x 4 x bfloat> %v465}466 467define <vscale x 4 x bfloat> @vfadd_vv_nxv4bf16_unmasked(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, i32 zeroext %evl) {468; ZVFH-LABEL: vfadd_vv_nxv4bf16_unmasked:469; ZVFH: # %bb.0:470; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma471; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v9472; ZVFH-NEXT: vfwcvtbf16.f.f.v v12, v8473; ZVFH-NEXT: vsetvli zero, zero, e32, m2, ta, ma474; ZVFH-NEXT: vfadd.vv v10, v12, v10475; ZVFH-NEXT: vsetvli zero, zero, e16, m1, ta, ma476; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v10477; ZVFH-NEXT: ret478;479; ZVFHMIN-LABEL: vfadd_vv_nxv4bf16_unmasked:480; ZVFHMIN: # %bb.0:481; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma482; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v9483; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v12, v8484; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma485; ZVFHMIN-NEXT: vfadd.vv v10, v12, v10486; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma487; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v10488; ZVFHMIN-NEXT: ret489;490; ZVFBFA-LABEL: vfadd_vv_nxv4bf16_unmasked:491; ZVFBFA: # %bb.0:492; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m1, ta, ma493; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v9494; ZVFBFA-NEXT: vfwcvt.f.f.v v12, v8495; ZVFBFA-NEXT: vsetvli zero, zero, e32, m2, ta, ma496; ZVFBFA-NEXT: vfadd.vv v10, v12, v10497; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m1, ta, ma498; ZVFBFA-NEXT: vfncvt.f.f.w v8, v10499; ZVFBFA-NEXT: ret500 %v = call <vscale x 4 x bfloat> @llvm.vp.fadd.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)501 ret <vscale x 4 x bfloat> %v502}503 504define <vscale x 4 x bfloat> @vfadd_vf_nxv4bf16(<vscale x 4 x bfloat> %va, bfloat %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {505; ZVFH-LABEL: vfadd_vf_nxv4bf16:506; ZVFH: # %bb.0:507; ZVFH-NEXT: fmv.x.h a1, fa0508; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma509; ZVFH-NEXT: vmv.v.x v12, a1510; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t511; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v12, v0.t512; ZVFH-NEXT: vsetvli zero, zero, e32, m2, ta, ma513; ZVFH-NEXT: vfadd.vv v10, v10, v8, v0.t514; ZVFH-NEXT: vsetvli zero, zero, e16, m1, ta, ma515; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v10, v0.t516; ZVFH-NEXT: ret517;518; ZVFHMIN-LABEL: vfadd_vf_nxv4bf16:519; ZVFHMIN: # %bb.0:520; ZVFHMIN-NEXT: fmv.x.h a1, fa0521; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma522; ZVFHMIN-NEXT: vmv.v.x v12, a1523; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t524; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v8, v12, v0.t525; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma526; ZVFHMIN-NEXT: vfadd.vv v10, v10, v8, v0.t527; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma528; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v10, v0.t529; ZVFHMIN-NEXT: ret530;531; ZVFBFA-LABEL: vfadd_vf_nxv4bf16:532; ZVFBFA: # %bb.0:533; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m1, ta, ma534; ZVFBFA-NEXT: vfmv.v.f v12, fa0535; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v8, v0.t536; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v12, v0.t537; ZVFBFA-NEXT: vsetvli zero, zero, e32, m2, ta, ma538; ZVFBFA-NEXT: vfadd.vv v10, v10, v8, v0.t539; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m1, ta, ma540; ZVFBFA-NEXT: vfncvt.f.f.w v8, v10, v0.t541; ZVFBFA-NEXT: ret542 %elt.head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0543 %vb = shufflevector <vscale x 4 x bfloat> %elt.head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer544 %v = call <vscale x 4 x bfloat> @llvm.vp.fadd.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vb, <vscale x 4 x i1> %m, i32 %evl)545 ret <vscale x 4 x bfloat> %v546}547 548define <vscale x 4 x bfloat> @vfadd_vf_nxv4bf16_unmasked(<vscale x 4 x bfloat> %va, bfloat %b, i32 zeroext %evl) {549; ZVFH-LABEL: vfadd_vf_nxv4bf16_unmasked:550; ZVFH: # %bb.0:551; ZVFH-NEXT: fmv.x.h a1, fa0552; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma553; ZVFH-NEXT: vmv.v.x v12, a1554; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8555; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v12556; ZVFH-NEXT: vsetvli zero, zero, e32, m2, ta, ma557; ZVFH-NEXT: vfadd.vv v10, v10, v8558; ZVFH-NEXT: vsetvli zero, zero, e16, m1, ta, ma559; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v10560; ZVFH-NEXT: ret561;562; ZVFHMIN-LABEL: vfadd_vf_nxv4bf16_unmasked:563; ZVFHMIN: # %bb.0:564; ZVFHMIN-NEXT: fmv.x.h a1, fa0565; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma566; ZVFHMIN-NEXT: vmv.v.x v12, a1567; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v10, v8568; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v8, v12569; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma570; ZVFHMIN-NEXT: vfadd.vv v10, v10, v8571; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma572; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v10573; ZVFHMIN-NEXT: ret574;575; ZVFBFA-LABEL: vfadd_vf_nxv4bf16_unmasked:576; ZVFBFA: # %bb.0:577; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m1, ta, ma578; ZVFBFA-NEXT: vfmv.v.f v12, fa0579; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v8580; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v12581; ZVFBFA-NEXT: vsetvli zero, zero, e32, m2, ta, ma582; ZVFBFA-NEXT: vfadd.vv v10, v10, v8583; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m1, ta, ma584; ZVFBFA-NEXT: vfncvt.f.f.w v8, v10585; ZVFBFA-NEXT: ret586 %elt.head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0587 %vb = shufflevector <vscale x 4 x bfloat> %elt.head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer588 %v = call <vscale x 4 x bfloat> @llvm.vp.fadd.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)589 ret <vscale x 4 x bfloat> %v590}591 592define <vscale x 8 x bfloat> @vfadd_vv_nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {593; ZVFH-LABEL: vfadd_vv_nxv8bf16:594; ZVFH: # %bb.0:595; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma596; ZVFH-NEXT: vfwcvtbf16.f.f.v v12, v10, v0.t597; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t598; ZVFH-NEXT: vsetvli zero, zero, e32, m4, ta, ma599; ZVFH-NEXT: vfadd.vv v12, v16, v12, v0.t600; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, ma601; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v12, v0.t602; ZVFH-NEXT: ret603;604; ZVFHMIN-LABEL: vfadd_vv_nxv8bf16:605; ZVFHMIN: # %bb.0:606; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma607; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v12, v10, v0.t608; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t609; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma610; ZVFHMIN-NEXT: vfadd.vv v12, v16, v12, v0.t611; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma612; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v12, v0.t613; ZVFHMIN-NEXT: ret614;615; ZVFBFA-LABEL: vfadd_vv_nxv8bf16:616; ZVFBFA: # %bb.0:617; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m2, ta, ma618; ZVFBFA-NEXT: vfwcvt.f.f.v v12, v10, v0.t619; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v8, v0.t620; ZVFBFA-NEXT: vsetvli zero, zero, e32, m4, ta, ma621; ZVFBFA-NEXT: vfadd.vv v12, v16, v12, v0.t622; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m2, ta, ma623; ZVFBFA-NEXT: vfncvt.f.f.w v8, v12, v0.t624; ZVFBFA-NEXT: ret625 %v = call <vscale x 8 x bfloat> @llvm.vp.fadd.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x i1> %m, i32 %evl)626 ret <vscale x 8 x bfloat> %v627}628 629define <vscale x 8 x bfloat> @vfadd_vv_nxv8bf16_unmasked(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, i32 zeroext %evl) {630; ZVFH-LABEL: vfadd_vv_nxv8bf16_unmasked:631; ZVFH: # %bb.0:632; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma633; ZVFH-NEXT: vfwcvtbf16.f.f.v v12, v10634; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v8635; ZVFH-NEXT: vsetvli zero, zero, e32, m4, ta, ma636; ZVFH-NEXT: vfadd.vv v12, v16, v12637; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, ma638; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v12639; ZVFH-NEXT: ret640;641; ZVFHMIN-LABEL: vfadd_vv_nxv8bf16_unmasked:642; ZVFHMIN: # %bb.0:643; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma644; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v12, v10645; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v8646; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma647; ZVFHMIN-NEXT: vfadd.vv v12, v16, v12648; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma649; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v12650; ZVFHMIN-NEXT: ret651;652; ZVFBFA-LABEL: vfadd_vv_nxv8bf16_unmasked:653; ZVFBFA: # %bb.0:654; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m2, ta, ma655; ZVFBFA-NEXT: vfwcvt.f.f.v v12, v10656; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v8657; ZVFBFA-NEXT: vsetvli zero, zero, e32, m4, ta, ma658; ZVFBFA-NEXT: vfadd.vv v12, v16, v12659; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m2, ta, ma660; ZVFBFA-NEXT: vfncvt.f.f.w v8, v12661; ZVFBFA-NEXT: ret662 %v = call <vscale x 8 x bfloat> @llvm.vp.fadd.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)663 ret <vscale x 8 x bfloat> %v664}665 666define <vscale x 8 x bfloat> @vfadd_vf_nxv8bf16(<vscale x 8 x bfloat> %va, bfloat %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {667; ZVFH-LABEL: vfadd_vf_nxv8bf16:668; ZVFH: # %bb.0:669; ZVFH-NEXT: fmv.x.h a1, fa0670; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma671; ZVFH-NEXT: vmv.v.x v16, a1672; ZVFH-NEXT: vfwcvtbf16.f.f.v v12, v8, v0.t673; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v16, v0.t674; ZVFH-NEXT: vsetvli zero, zero, e32, m4, ta, ma675; ZVFH-NEXT: vfadd.vv v12, v12, v8, v0.t676; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, ma677; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v12, v0.t678; ZVFH-NEXT: ret679;680; ZVFHMIN-LABEL: vfadd_vf_nxv8bf16:681; ZVFHMIN: # %bb.0:682; ZVFHMIN-NEXT: fmv.x.h a1, fa0683; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma684; ZVFHMIN-NEXT: vmv.v.x v16, a1685; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v12, v8, v0.t686; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v8, v16, v0.t687; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma688; ZVFHMIN-NEXT: vfadd.vv v12, v12, v8, v0.t689; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma690; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v12, v0.t691; ZVFHMIN-NEXT: ret692;693; ZVFBFA-LABEL: vfadd_vf_nxv8bf16:694; ZVFBFA: # %bb.0:695; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m2, ta, ma696; ZVFBFA-NEXT: vfmv.v.f v16, fa0697; ZVFBFA-NEXT: vfwcvt.f.f.v v12, v8, v0.t698; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v16, v0.t699; ZVFBFA-NEXT: vsetvli zero, zero, e32, m4, ta, ma700; ZVFBFA-NEXT: vfadd.vv v12, v12, v8, v0.t701; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m2, ta, ma702; ZVFBFA-NEXT: vfncvt.f.f.w v8, v12, v0.t703; ZVFBFA-NEXT: ret704 %elt.head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0705 %vb = shufflevector <vscale x 8 x bfloat> %elt.head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer706 %v = call <vscale x 8 x bfloat> @llvm.vp.fadd.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vb, <vscale x 8 x i1> %m, i32 %evl)707 ret <vscale x 8 x bfloat> %v708}709 710define <vscale x 8 x bfloat> @vfadd_vf_nxv8bf16_unmasked(<vscale x 8 x bfloat> %va, bfloat %b, i32 zeroext %evl) {711; ZVFH-LABEL: vfadd_vf_nxv8bf16_unmasked:712; ZVFH: # %bb.0:713; ZVFH-NEXT: fmv.x.h a1, fa0714; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma715; ZVFH-NEXT: vmv.v.x v16, a1716; ZVFH-NEXT: vfwcvtbf16.f.f.v v12, v8717; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v16718; ZVFH-NEXT: vsetvli zero, zero, e32, m4, ta, ma719; ZVFH-NEXT: vfadd.vv v12, v12, v8720; ZVFH-NEXT: vsetvli zero, zero, e16, m2, ta, ma721; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v12722; ZVFH-NEXT: ret723;724; ZVFHMIN-LABEL: vfadd_vf_nxv8bf16_unmasked:725; ZVFHMIN: # %bb.0:726; ZVFHMIN-NEXT: fmv.x.h a1, fa0727; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma728; ZVFHMIN-NEXT: vmv.v.x v16, a1729; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v12, v8730; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v8, v16731; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma732; ZVFHMIN-NEXT: vfadd.vv v12, v12, v8733; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma734; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v12735; ZVFHMIN-NEXT: ret736;737; ZVFBFA-LABEL: vfadd_vf_nxv8bf16_unmasked:738; ZVFBFA: # %bb.0:739; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m2, ta, ma740; ZVFBFA-NEXT: vfmv.v.f v16, fa0741; ZVFBFA-NEXT: vfwcvt.f.f.v v12, v8742; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v16743; ZVFBFA-NEXT: vsetvli zero, zero, e32, m4, ta, ma744; ZVFBFA-NEXT: vfadd.vv v12, v12, v8745; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m2, ta, ma746; ZVFBFA-NEXT: vfncvt.f.f.w v8, v12747; ZVFBFA-NEXT: ret748 %elt.head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0749 %vb = shufflevector <vscale x 8 x bfloat> %elt.head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer750 %v = call <vscale x 8 x bfloat> @llvm.vp.fadd.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)751 ret <vscale x 8 x bfloat> %v752}753 754define <vscale x 16 x bfloat> @vfadd_vv_nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {755; ZVFH-LABEL: vfadd_vv_nxv16bf16:756; ZVFH: # %bb.0:757; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma758; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t759; ZVFH-NEXT: vfwcvtbf16.f.f.v v24, v8, v0.t760; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma761; ZVFH-NEXT: vfadd.vv v16, v24, v16, v0.t762; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, ma763; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t764; ZVFH-NEXT: ret765;766; ZVFHMIN-LABEL: vfadd_vv_nxv16bf16:767; ZVFHMIN: # %bb.0:768; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma769; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t770; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v24, v8, v0.t771; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma772; ZVFHMIN-NEXT: vfadd.vv v16, v24, v16, v0.t773; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma774; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t775; ZVFHMIN-NEXT: ret776;777; ZVFBFA-LABEL: vfadd_vv_nxv16bf16:778; ZVFBFA: # %bb.0:779; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m4, ta, ma780; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v12, v0.t781; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v8, v0.t782; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma783; ZVFBFA-NEXT: vfadd.vv v16, v24, v16, v0.t784; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma785; ZVFBFA-NEXT: vfncvt.f.f.w v8, v16, v0.t786; ZVFBFA-NEXT: ret787 %v = call <vscale x 16 x bfloat> @llvm.vp.fadd.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x i1> %m, i32 %evl)788 ret <vscale x 16 x bfloat> %v789}790 791define <vscale x 16 x bfloat> @vfadd_vv_nxv16bf16_unmasked(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, i32 zeroext %evl) {792; ZVFH-LABEL: vfadd_vv_nxv16bf16_unmasked:793; ZVFH: # %bb.0:794; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma795; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v12796; ZVFH-NEXT: vfwcvtbf16.f.f.v v24, v8797; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma798; ZVFH-NEXT: vfadd.vv v16, v24, v16799; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, ma800; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v16801; ZVFH-NEXT: ret802;803; ZVFHMIN-LABEL: vfadd_vv_nxv16bf16_unmasked:804; ZVFHMIN: # %bb.0:805; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma806; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v12807; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v24, v8808; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma809; ZVFHMIN-NEXT: vfadd.vv v16, v24, v16810; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma811; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v16812; ZVFHMIN-NEXT: ret813;814; ZVFBFA-LABEL: vfadd_vv_nxv16bf16_unmasked:815; ZVFBFA: # %bb.0:816; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m4, ta, ma817; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v12818; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v8819; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma820; ZVFBFA-NEXT: vfadd.vv v16, v24, v16821; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma822; ZVFBFA-NEXT: vfncvt.f.f.w v8, v16823; ZVFBFA-NEXT: ret824 %v = call <vscale x 16 x bfloat> @llvm.vp.fadd.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)825 ret <vscale x 16 x bfloat> %v826}827 828define <vscale x 16 x bfloat> @vfadd_vf_nxv16bf16(<vscale x 16 x bfloat> %va, bfloat %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {829; ZVFH-LABEL: vfadd_vf_nxv16bf16:830; ZVFH: # %bb.0:831; ZVFH-NEXT: fmv.x.h a1, fa0832; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma833; ZVFH-NEXT: vmv.v.x v24, a1834; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t835; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v24, v0.t836; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma837; ZVFH-NEXT: vfadd.vv v16, v16, v8, v0.t838; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, ma839; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t840; ZVFH-NEXT: ret841;842; ZVFHMIN-LABEL: vfadd_vf_nxv16bf16:843; ZVFHMIN: # %bb.0:844; ZVFHMIN-NEXT: fmv.x.h a1, fa0845; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma846; ZVFHMIN-NEXT: vmv.v.x v24, a1847; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t848; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v8, v24, v0.t849; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma850; ZVFHMIN-NEXT: vfadd.vv v16, v16, v8, v0.t851; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma852; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t853; ZVFHMIN-NEXT: ret854;855; ZVFBFA-LABEL: vfadd_vf_nxv16bf16:856; ZVFBFA: # %bb.0:857; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m4, ta, ma858; ZVFBFA-NEXT: vfmv.v.f v24, fa0859; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v8, v0.t860; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v24, v0.t861; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma862; ZVFBFA-NEXT: vfadd.vv v16, v16, v8, v0.t863; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma864; ZVFBFA-NEXT: vfncvt.f.f.w v8, v16, v0.t865; ZVFBFA-NEXT: ret866 %elt.head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0867 %vb = shufflevector <vscale x 16 x bfloat> %elt.head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer868 %v = call <vscale x 16 x bfloat> @llvm.vp.fadd.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vb, <vscale x 16 x i1> %m, i32 %evl)869 ret <vscale x 16 x bfloat> %v870}871 872define <vscale x 16 x bfloat> @vfadd_vf_nxv16bf16_unmasked(<vscale x 16 x bfloat> %va, bfloat %b, i32 zeroext %evl) {873; ZVFH-LABEL: vfadd_vf_nxv16bf16_unmasked:874; ZVFH: # %bb.0:875; ZVFH-NEXT: fmv.x.h a1, fa0876; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma877; ZVFH-NEXT: vmv.v.x v24, a1878; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v8879; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v24880; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma881; ZVFH-NEXT: vfadd.vv v16, v16, v8882; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, ma883; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v16884; ZVFH-NEXT: ret885;886; ZVFHMIN-LABEL: vfadd_vf_nxv16bf16_unmasked:887; ZVFHMIN: # %bb.0:888; ZVFHMIN-NEXT: fmv.x.h a1, fa0889; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma890; ZVFHMIN-NEXT: vmv.v.x v24, a1891; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v8892; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v8, v24893; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma894; ZVFHMIN-NEXT: vfadd.vv v16, v16, v8895; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma896; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v16897; ZVFHMIN-NEXT: ret898;899; ZVFBFA-LABEL: vfadd_vf_nxv16bf16_unmasked:900; ZVFBFA: # %bb.0:901; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m4, ta, ma902; ZVFBFA-NEXT: vfmv.v.f v24, fa0903; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v8904; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v24905; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma906; ZVFBFA-NEXT: vfadd.vv v16, v16, v8907; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma908; ZVFBFA-NEXT: vfncvt.f.f.w v8, v16909; ZVFBFA-NEXT: ret910 %elt.head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0911 %vb = shufflevector <vscale x 16 x bfloat> %elt.head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer912 %v = call <vscale x 16 x bfloat> @llvm.vp.fadd.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)913 ret <vscale x 16 x bfloat> %v914}915 916define <vscale x 32 x bfloat> @vfadd_vv_nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {917; ZVFH-LABEL: vfadd_vv_nxv32bf16:918; ZVFH: # %bb.0:919; ZVFH-NEXT: addi sp, sp, -16920; ZVFH-NEXT: .cfi_def_cfa_offset 16921; ZVFH-NEXT: csrr a1, vlenb922; ZVFH-NEXT: slli a1, a1, 3923; ZVFH-NEXT: sub sp, sp, a1924; ZVFH-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb925; ZVFH-NEXT: vsetvli a1, zero, e8, mf2, ta, ma926; ZVFH-NEXT: vmv1r.v v7, v0927; ZVFH-NEXT: csrr a2, vlenb928; ZVFH-NEXT: slli a1, a2, 1929; ZVFH-NEXT: srli a2, a2, 2930; ZVFH-NEXT: sub a3, a0, a1931; ZVFH-NEXT: vslidedown.vx v0, v0, a2932; ZVFH-NEXT: sltu a2, a0, a3933; ZVFH-NEXT: addi a2, a2, -1934; ZVFH-NEXT: and a2, a2, a3935; ZVFH-NEXT: addi a3, sp, 16936; ZVFH-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill937; ZVFH-NEXT: vsetvli zero, a2, e16, m4, ta, ma938; ZVFH-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t939; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t940; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma941; ZVFH-NEXT: vfadd.vv v16, v16, v24, v0.t942; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, ma943; ZVFH-NEXT: vfncvtbf16.f.f.w v12, v16, v0.t944; ZVFH-NEXT: bltu a0, a1, .LBB22_2945; ZVFH-NEXT: # %bb.1:946; ZVFH-NEXT: mv a0, a1947; ZVFH-NEXT: .LBB22_2:948; ZVFH-NEXT: vmv1r.v v0, v7949; ZVFH-NEXT: addi a1, sp, 16950; ZVFH-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload951; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma952; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v24, v0.t953; ZVFH-NEXT: vfwcvtbf16.f.f.v v24, v8, v0.t954; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma955; ZVFH-NEXT: vfadd.vv v16, v24, v16, v0.t956; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, ma957; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t958; ZVFH-NEXT: csrr a0, vlenb959; ZVFH-NEXT: slli a0, a0, 3960; ZVFH-NEXT: add sp, sp, a0961; ZVFH-NEXT: .cfi_def_cfa sp, 16962; ZVFH-NEXT: addi sp, sp, 16963; ZVFH-NEXT: .cfi_def_cfa_offset 0964; ZVFH-NEXT: ret965;966; ZVFHMIN-LABEL: vfadd_vv_nxv32bf16:967; ZVFHMIN: # %bb.0:968; ZVFHMIN-NEXT: addi sp, sp, -16969; ZVFHMIN-NEXT: .cfi_def_cfa_offset 16970; ZVFHMIN-NEXT: csrr a1, vlenb971; ZVFHMIN-NEXT: slli a1, a1, 3972; ZVFHMIN-NEXT: sub sp, sp, a1973; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb974; ZVFHMIN-NEXT: vsetvli a1, zero, e8, mf2, ta, ma975; ZVFHMIN-NEXT: vmv1r.v v7, v0976; ZVFHMIN-NEXT: csrr a2, vlenb977; ZVFHMIN-NEXT: slli a1, a2, 1978; ZVFHMIN-NEXT: srli a2, a2, 2979; ZVFHMIN-NEXT: sub a3, a0, a1980; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a2981; ZVFHMIN-NEXT: sltu a2, a0, a3982; ZVFHMIN-NEXT: addi a2, a2, -1983; ZVFHMIN-NEXT: and a2, a2, a3984; ZVFHMIN-NEXT: addi a3, sp, 16985; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill986; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma987; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t988; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t989; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma990; ZVFHMIN-NEXT: vfadd.vv v16, v16, v24, v0.t991; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma992; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v12, v16, v0.t993; ZVFHMIN-NEXT: bltu a0, a1, .LBB22_2994; ZVFHMIN-NEXT: # %bb.1:995; ZVFHMIN-NEXT: mv a0, a1996; ZVFHMIN-NEXT: .LBB22_2:997; ZVFHMIN-NEXT: vmv1r.v v0, v7998; ZVFHMIN-NEXT: addi a1, sp, 16999; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload1000; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1001; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v24, v0.t1002; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v24, v8, v0.t1003; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1004; ZVFHMIN-NEXT: vfadd.vv v16, v24, v16, v0.t1005; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1006; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t1007; ZVFHMIN-NEXT: csrr a0, vlenb1008; ZVFHMIN-NEXT: slli a0, a0, 31009; ZVFHMIN-NEXT: add sp, sp, a01010; ZVFHMIN-NEXT: .cfi_def_cfa sp, 161011; ZVFHMIN-NEXT: addi sp, sp, 161012; ZVFHMIN-NEXT: .cfi_def_cfa_offset 01013; ZVFHMIN-NEXT: ret1014;1015; ZVFBFA-LABEL: vfadd_vv_nxv32bf16:1016; ZVFBFA: # %bb.0:1017; ZVFBFA-NEXT: addi sp, sp, -161018; ZVFBFA-NEXT: .cfi_def_cfa_offset 161019; ZVFBFA-NEXT: csrr a1, vlenb1020; ZVFBFA-NEXT: slli a1, a1, 31021; ZVFBFA-NEXT: sub sp, sp, a11022; ZVFBFA-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1023; ZVFBFA-NEXT: vsetvli a1, zero, e8, mf2, ta, ma1024; ZVFBFA-NEXT: vmv1r.v v7, v01025; ZVFBFA-NEXT: csrr a2, vlenb1026; ZVFBFA-NEXT: slli a1, a2, 11027; ZVFBFA-NEXT: srli a2, a2, 21028; ZVFBFA-NEXT: sub a3, a0, a11029; ZVFBFA-NEXT: vslidedown.vx v0, v0, a21030; ZVFBFA-NEXT: sltu a2, a0, a31031; ZVFBFA-NEXT: addi a2, a2, -11032; ZVFBFA-NEXT: and a2, a2, a31033; ZVFBFA-NEXT: addi a3, sp, 161034; ZVFBFA-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1035; ZVFBFA-NEXT: vsetvli zero, a2, e16alt, m4, ta, ma1036; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v20, v0.t1037; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v12, v0.t1038; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma1039; ZVFBFA-NEXT: vfadd.vv v16, v16, v24, v0.t1040; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma1041; ZVFBFA-NEXT: vfncvt.f.f.w v12, v16, v0.t1042; ZVFBFA-NEXT: bltu a0, a1, .LBB22_21043; ZVFBFA-NEXT: # %bb.1:1044; ZVFBFA-NEXT: mv a0, a11045; ZVFBFA-NEXT: .LBB22_2:1046; ZVFBFA-NEXT: vmv1r.v v0, v71047; ZVFBFA-NEXT: addi a1, sp, 161048; ZVFBFA-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload1049; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m4, ta, ma1050; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v24, v0.t1051; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v8, v0.t1052; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma1053; ZVFBFA-NEXT: vfadd.vv v16, v24, v16, v0.t1054; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma1055; ZVFBFA-NEXT: vfncvt.f.f.w v8, v16, v0.t1056; ZVFBFA-NEXT: csrr a0, vlenb1057; ZVFBFA-NEXT: slli a0, a0, 31058; ZVFBFA-NEXT: add sp, sp, a01059; ZVFBFA-NEXT: .cfi_def_cfa sp, 161060; ZVFBFA-NEXT: addi sp, sp, 161061; ZVFBFA-NEXT: .cfi_def_cfa_offset 01062; ZVFBFA-NEXT: ret1063 %v = call <vscale x 32 x bfloat> @llvm.vp.fadd.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x i1> %m, i32 %evl)1064 ret <vscale x 32 x bfloat> %v1065}1066 1067define <vscale x 32 x bfloat> @vfadd_vv_nxv32bf16_unmasked(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, i32 zeroext %evl) {1068; ZVFH-LABEL: vfadd_vv_nxv32bf16_unmasked:1069; ZVFH: # %bb.0:1070; ZVFH-NEXT: addi sp, sp, -161071; ZVFH-NEXT: .cfi_def_cfa_offset 161072; ZVFH-NEXT: csrr a1, vlenb1073; ZVFH-NEXT: slli a1, a1, 31074; ZVFH-NEXT: sub sp, sp, a11075; ZVFH-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1076; ZVFH-NEXT: csrr a2, vlenb1077; ZVFH-NEXT: vsetvli a1, zero, e8, m4, ta, ma1078; ZVFH-NEXT: vmset.m v241079; ZVFH-NEXT: slli a1, a2, 11080; ZVFH-NEXT: srli a2, a2, 21081; ZVFH-NEXT: sub a3, a0, a11082; ZVFH-NEXT: vsetvli a4, zero, e8, mf2, ta, ma1083; ZVFH-NEXT: vslidedown.vx v0, v24, a21084; ZVFH-NEXT: sltu a2, a0, a31085; ZVFH-NEXT: addi a2, a2, -11086; ZVFH-NEXT: and a2, a2, a31087; ZVFH-NEXT: addi a3, sp, 161088; ZVFH-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1089; ZVFH-NEXT: vsetvli zero, a2, e16, m4, ta, ma1090; ZVFH-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t1091; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t1092; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma1093; ZVFH-NEXT: vfadd.vv v16, v16, v24, v0.t1094; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, ma1095; ZVFH-NEXT: vfncvtbf16.f.f.w v12, v16, v0.t1096; ZVFH-NEXT: bltu a0, a1, .LBB23_21097; ZVFH-NEXT: # %bb.1:1098; ZVFH-NEXT: mv a0, a11099; ZVFH-NEXT: .LBB23_2:1100; ZVFH-NEXT: addi a1, sp, 161101; ZVFH-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload1102; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma1103; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v241104; ZVFH-NEXT: vfwcvtbf16.f.f.v v24, v81105; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma1106; ZVFH-NEXT: vfadd.vv v16, v24, v161107; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, ma1108; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v161109; ZVFH-NEXT: csrr a0, vlenb1110; ZVFH-NEXT: slli a0, a0, 31111; ZVFH-NEXT: add sp, sp, a01112; ZVFH-NEXT: .cfi_def_cfa sp, 161113; ZVFH-NEXT: addi sp, sp, 161114; ZVFH-NEXT: .cfi_def_cfa_offset 01115; ZVFH-NEXT: ret1116;1117; ZVFHMIN-LABEL: vfadd_vv_nxv32bf16_unmasked:1118; ZVFHMIN: # %bb.0:1119; ZVFHMIN-NEXT: addi sp, sp, -161120; ZVFHMIN-NEXT: .cfi_def_cfa_offset 161121; ZVFHMIN-NEXT: csrr a1, vlenb1122; ZVFHMIN-NEXT: slli a1, a1, 31123; ZVFHMIN-NEXT: sub sp, sp, a11124; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1125; ZVFHMIN-NEXT: csrr a2, vlenb1126; ZVFHMIN-NEXT: vsetvli a1, zero, e8, m4, ta, ma1127; ZVFHMIN-NEXT: vmset.m v241128; ZVFHMIN-NEXT: slli a1, a2, 11129; ZVFHMIN-NEXT: srli a2, a2, 21130; ZVFHMIN-NEXT: sub a3, a0, a11131; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma1132; ZVFHMIN-NEXT: vslidedown.vx v0, v24, a21133; ZVFHMIN-NEXT: sltu a2, a0, a31134; ZVFHMIN-NEXT: addi a2, a2, -11135; ZVFHMIN-NEXT: and a2, a2, a31136; ZVFHMIN-NEXT: addi a3, sp, 161137; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1138; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma1139; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t1140; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t1141; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1142; ZVFHMIN-NEXT: vfadd.vv v16, v16, v24, v0.t1143; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1144; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v12, v16, v0.t1145; ZVFHMIN-NEXT: bltu a0, a1, .LBB23_21146; ZVFHMIN-NEXT: # %bb.1:1147; ZVFHMIN-NEXT: mv a0, a11148; ZVFHMIN-NEXT: .LBB23_2:1149; ZVFHMIN-NEXT: addi a1, sp, 161150; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload1151; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1152; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v241153; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v24, v81154; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1155; ZVFHMIN-NEXT: vfadd.vv v16, v24, v161156; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1157; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v161158; ZVFHMIN-NEXT: csrr a0, vlenb1159; ZVFHMIN-NEXT: slli a0, a0, 31160; ZVFHMIN-NEXT: add sp, sp, a01161; ZVFHMIN-NEXT: .cfi_def_cfa sp, 161162; ZVFHMIN-NEXT: addi sp, sp, 161163; ZVFHMIN-NEXT: .cfi_def_cfa_offset 01164; ZVFHMIN-NEXT: ret1165;1166; ZVFBFA-LABEL: vfadd_vv_nxv32bf16_unmasked:1167; ZVFBFA: # %bb.0:1168; ZVFBFA-NEXT: addi sp, sp, -161169; ZVFBFA-NEXT: .cfi_def_cfa_offset 161170; ZVFBFA-NEXT: csrr a1, vlenb1171; ZVFBFA-NEXT: slli a1, a1, 31172; ZVFBFA-NEXT: sub sp, sp, a11173; ZVFBFA-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1174; ZVFBFA-NEXT: csrr a2, vlenb1175; ZVFBFA-NEXT: vsetvli a1, zero, e8, m4, ta, ma1176; ZVFBFA-NEXT: vmset.m v241177; ZVFBFA-NEXT: slli a1, a2, 11178; ZVFBFA-NEXT: srli a2, a2, 21179; ZVFBFA-NEXT: sub a3, a0, a11180; ZVFBFA-NEXT: vsetvli a4, zero, e8, mf2, ta, ma1181; ZVFBFA-NEXT: vslidedown.vx v0, v24, a21182; ZVFBFA-NEXT: sltu a2, a0, a31183; ZVFBFA-NEXT: addi a2, a2, -11184; ZVFBFA-NEXT: and a2, a2, a31185; ZVFBFA-NEXT: addi a3, sp, 161186; ZVFBFA-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1187; ZVFBFA-NEXT: vsetvli zero, a2, e16alt, m4, ta, ma1188; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v20, v0.t1189; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v12, v0.t1190; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma1191; ZVFBFA-NEXT: vfadd.vv v16, v16, v24, v0.t1192; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma1193; ZVFBFA-NEXT: vfncvt.f.f.w v12, v16, v0.t1194; ZVFBFA-NEXT: bltu a0, a1, .LBB23_21195; ZVFBFA-NEXT: # %bb.1:1196; ZVFBFA-NEXT: mv a0, a11197; ZVFBFA-NEXT: .LBB23_2:1198; ZVFBFA-NEXT: addi a1, sp, 161199; ZVFBFA-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload1200; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m4, ta, ma1201; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v241202; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v81203; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma1204; ZVFBFA-NEXT: vfadd.vv v16, v24, v161205; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma1206; ZVFBFA-NEXT: vfncvt.f.f.w v8, v161207; ZVFBFA-NEXT: csrr a0, vlenb1208; ZVFBFA-NEXT: slli a0, a0, 31209; ZVFBFA-NEXT: add sp, sp, a01210; ZVFBFA-NEXT: .cfi_def_cfa sp, 161211; ZVFBFA-NEXT: addi sp, sp, 161212; ZVFBFA-NEXT: .cfi_def_cfa_offset 01213; ZVFBFA-NEXT: ret1214 %v = call <vscale x 32 x bfloat> @llvm.vp.fadd.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)1215 ret <vscale x 32 x bfloat> %v1216}1217 1218define <vscale x 32 x bfloat> @vfadd_vf_nxv32bf16(<vscale x 32 x bfloat> %va, bfloat %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {1219; ZVFH-LABEL: vfadd_vf_nxv32bf16:1220; ZVFH: # %bb.0:1221; ZVFH-NEXT: addi sp, sp, -161222; ZVFH-NEXT: .cfi_def_cfa_offset 161223; ZVFH-NEXT: csrr a1, vlenb1224; ZVFH-NEXT: slli a1, a1, 41225; ZVFH-NEXT: sub sp, sp, a11226; ZVFH-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb1227; ZVFH-NEXT: vsetvli a1, zero, e16, m8, ta, ma1228; ZVFH-NEXT: vmv1r.v v7, v01229; ZVFH-NEXT: fmv.x.h a1, fa01230; ZVFH-NEXT: csrr a2, vlenb1231; ZVFH-NEXT: vmv.v.x v24, a11232; ZVFH-NEXT: slli a1, a2, 11233; ZVFH-NEXT: srli a2, a2, 21234; ZVFH-NEXT: sub a3, a0, a11235; ZVFH-NEXT: vsetvli a4, zero, e8, mf2, ta, ma1236; ZVFH-NEXT: vslidedown.vx v0, v0, a21237; ZVFH-NEXT: sltu a2, a0, a31238; ZVFH-NEXT: addi a2, a2, -11239; ZVFH-NEXT: and a2, a2, a31240; ZVFH-NEXT: csrr a3, vlenb1241; ZVFH-NEXT: slli a3, a3, 31242; ZVFH-NEXT: add a3, sp, a31243; ZVFH-NEXT: addi a3, a3, 161244; ZVFH-NEXT: vs8r.v v24, (a3) # vscale x 64-byte Folded Spill1245; ZVFH-NEXT: vsetvli zero, a2, e16, m4, ta, ma1246; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v28, v0.t1247; ZVFH-NEXT: vfwcvtbf16.f.f.v v24, v12, v0.t1248; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma1249; ZVFH-NEXT: vfadd.vv v16, v24, v16, v0.t1250; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, ma1251; ZVFH-NEXT: vfncvtbf16.f.f.w v12, v16, v0.t1252; ZVFH-NEXT: bltu a0, a1, .LBB24_21253; ZVFH-NEXT: # %bb.1:1254; ZVFH-NEXT: mv a0, a11255; ZVFH-NEXT: .LBB24_2:1256; ZVFH-NEXT: vmv1r.v v0, v71257; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma1258; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t1259; ZVFH-NEXT: addi a0, sp, 161260; ZVFH-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill1261; ZVFH-NEXT: csrr a0, vlenb1262; ZVFH-NEXT: slli a0, a0, 31263; ZVFH-NEXT: add a0, sp, a01264; ZVFH-NEXT: addi a0, a0, 161265; ZVFH-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1266; ZVFH-NEXT: vfwcvtbf16.f.f.v v24, v16, v0.t1267; ZVFH-NEXT: addi a0, sp, 161268; ZVFH-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1269; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma1270; ZVFH-NEXT: vfadd.vv v16, v16, v24, v0.t1271; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, ma1272; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t1273; ZVFH-NEXT: csrr a0, vlenb1274; ZVFH-NEXT: slli a0, a0, 41275; ZVFH-NEXT: add sp, sp, a01276; ZVFH-NEXT: .cfi_def_cfa sp, 161277; ZVFH-NEXT: addi sp, sp, 161278; ZVFH-NEXT: .cfi_def_cfa_offset 01279; ZVFH-NEXT: ret1280;1281; ZVFHMIN-LABEL: vfadd_vf_nxv32bf16:1282; ZVFHMIN: # %bb.0:1283; ZVFHMIN-NEXT: addi sp, sp, -161284; ZVFHMIN-NEXT: .cfi_def_cfa_offset 161285; ZVFHMIN-NEXT: csrr a1, vlenb1286; ZVFHMIN-NEXT: slli a1, a1, 41287; ZVFHMIN-NEXT: sub sp, sp, a11288; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb1289; ZVFHMIN-NEXT: vsetvli a1, zero, e16, m8, ta, ma1290; ZVFHMIN-NEXT: vmv1r.v v7, v01291; ZVFHMIN-NEXT: fmv.x.h a1, fa01292; ZVFHMIN-NEXT: csrr a2, vlenb1293; ZVFHMIN-NEXT: vmv.v.x v24, a11294; ZVFHMIN-NEXT: slli a1, a2, 11295; ZVFHMIN-NEXT: srli a2, a2, 21296; ZVFHMIN-NEXT: sub a3, a0, a11297; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma1298; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a21299; ZVFHMIN-NEXT: sltu a2, a0, a31300; ZVFHMIN-NEXT: addi a2, a2, -11301; ZVFHMIN-NEXT: and a2, a2, a31302; ZVFHMIN-NEXT: csrr a3, vlenb1303; ZVFHMIN-NEXT: slli a3, a3, 31304; ZVFHMIN-NEXT: add a3, sp, a31305; ZVFHMIN-NEXT: addi a3, a3, 161306; ZVFHMIN-NEXT: vs8r.v v24, (a3) # vscale x 64-byte Folded Spill1307; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma1308; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v28, v0.t1309; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v24, v12, v0.t1310; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1311; ZVFHMIN-NEXT: vfadd.vv v16, v24, v16, v0.t1312; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1313; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v12, v16, v0.t1314; ZVFHMIN-NEXT: bltu a0, a1, .LBB24_21315; ZVFHMIN-NEXT: # %bb.1:1316; ZVFHMIN-NEXT: mv a0, a11317; ZVFHMIN-NEXT: .LBB24_2:1318; ZVFHMIN-NEXT: vmv1r.v v0, v71319; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1320; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t1321; ZVFHMIN-NEXT: addi a0, sp, 161322; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill1323; ZVFHMIN-NEXT: csrr a0, vlenb1324; ZVFHMIN-NEXT: slli a0, a0, 31325; ZVFHMIN-NEXT: add a0, sp, a01326; ZVFHMIN-NEXT: addi a0, a0, 161327; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1328; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v24, v16, v0.t1329; ZVFHMIN-NEXT: addi a0, sp, 161330; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1331; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1332; ZVFHMIN-NEXT: vfadd.vv v16, v16, v24, v0.t1333; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1334; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t1335; ZVFHMIN-NEXT: csrr a0, vlenb1336; ZVFHMIN-NEXT: slli a0, a0, 41337; ZVFHMIN-NEXT: add sp, sp, a01338; ZVFHMIN-NEXT: .cfi_def_cfa sp, 161339; ZVFHMIN-NEXT: addi sp, sp, 161340; ZVFHMIN-NEXT: .cfi_def_cfa_offset 01341; ZVFHMIN-NEXT: ret1342;1343; ZVFBFA-LABEL: vfadd_vf_nxv32bf16:1344; ZVFBFA: # %bb.0:1345; ZVFBFA-NEXT: addi sp, sp, -161346; ZVFBFA-NEXT: .cfi_def_cfa_offset 161347; ZVFBFA-NEXT: csrr a1, vlenb1348; ZVFBFA-NEXT: slli a1, a1, 31349; ZVFBFA-NEXT: sub sp, sp, a11350; ZVFBFA-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1351; ZVFBFA-NEXT: vsetvli a1, zero, e16alt, m8, ta, ma1352; ZVFBFA-NEXT: vmv1r.v v7, v01353; ZVFBFA-NEXT: vfmv.v.f v24, fa01354; ZVFBFA-NEXT: csrr a2, vlenb1355; ZVFBFA-NEXT: slli a1, a2, 11356; ZVFBFA-NEXT: srli a2, a2, 21357; ZVFBFA-NEXT: sub a3, a0, a11358; ZVFBFA-NEXT: vsetvli a4, zero, e8alt, mf2, ta, ma1359; ZVFBFA-NEXT: vslidedown.vx v0, v0, a21360; ZVFBFA-NEXT: sltu a2, a0, a31361; ZVFBFA-NEXT: addi a2, a2, -11362; ZVFBFA-NEXT: and a2, a2, a31363; ZVFBFA-NEXT: addi a3, sp, 161364; ZVFBFA-NEXT: vs8r.v v24, (a3) # vscale x 64-byte Folded Spill1365; ZVFBFA-NEXT: vsetvli zero, a2, e16alt, m4, ta, ma1366; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v28, v0.t1367; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v12, v0.t1368; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma1369; ZVFBFA-NEXT: vfadd.vv v16, v24, v16, v0.t1370; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma1371; ZVFBFA-NEXT: vfncvt.f.f.w v12, v16, v0.t1372; ZVFBFA-NEXT: bltu a0, a1, .LBB24_21373; ZVFBFA-NEXT: # %bb.1:1374; ZVFBFA-NEXT: mv a0, a11375; ZVFBFA-NEXT: .LBB24_2:1376; ZVFBFA-NEXT: vmv1r.v v0, v71377; ZVFBFA-NEXT: addi a1, sp, 161378; ZVFBFA-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload1379; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m4, ta, ma1380; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v24, v0.t1381; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v8, v0.t1382; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma1383; ZVFBFA-NEXT: vfadd.vv v16, v24, v16, v0.t1384; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma1385; ZVFBFA-NEXT: vfncvt.f.f.w v8, v16, v0.t1386; ZVFBFA-NEXT: csrr a0, vlenb1387; ZVFBFA-NEXT: slli a0, a0, 31388; ZVFBFA-NEXT: add sp, sp, a01389; ZVFBFA-NEXT: .cfi_def_cfa sp, 161390; ZVFBFA-NEXT: addi sp, sp, 161391; ZVFBFA-NEXT: .cfi_def_cfa_offset 01392; ZVFBFA-NEXT: ret1393 %elt.head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 01394 %vb = shufflevector <vscale x 32 x bfloat> %elt.head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer1395 %v = call <vscale x 32 x bfloat> @llvm.vp.fadd.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vb, <vscale x 32 x i1> %m, i32 %evl)1396 ret <vscale x 32 x bfloat> %v1397}1398 1399define <vscale x 32 x bfloat> @vfadd_vf_nxv32bf16_unmasked(<vscale x 32 x bfloat> %va, bfloat %b, i32 zeroext %evl) {1400; ZVFH-LABEL: vfadd_vf_nxv32bf16_unmasked:1401; ZVFH: # %bb.0:1402; ZVFH-NEXT: addi sp, sp, -161403; ZVFH-NEXT: .cfi_def_cfa_offset 161404; ZVFH-NEXT: csrr a1, vlenb1405; ZVFH-NEXT: slli a1, a1, 31406; ZVFH-NEXT: sub sp, sp, a11407; ZVFH-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1408; ZVFH-NEXT: fmv.x.h a1, fa01409; ZVFH-NEXT: csrr a2, vlenb1410; ZVFH-NEXT: vsetvli a3, zero, e16, m8, ta, ma1411; ZVFH-NEXT: vmset.m v241412; ZVFH-NEXT: vmv.v.x v16, a11413; ZVFH-NEXT: slli a1, a2, 11414; ZVFH-NEXT: srli a2, a2, 21415; ZVFH-NEXT: sub a3, a0, a11416; ZVFH-NEXT: vsetvli a4, zero, e8, mf2, ta, ma1417; ZVFH-NEXT: vslidedown.vx v0, v24, a21418; ZVFH-NEXT: sltu a2, a0, a31419; ZVFH-NEXT: addi a2, a2, -11420; ZVFH-NEXT: and a2, a2, a31421; ZVFH-NEXT: addi a3, sp, 161422; ZVFH-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1423; ZVFH-NEXT: vsetvli zero, a2, e16, m4, ta, ma1424; ZVFH-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t1425; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t1426; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma1427; ZVFH-NEXT: vfadd.vv v16, v16, v24, v0.t1428; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, ma1429; ZVFH-NEXT: vfncvtbf16.f.f.w v12, v16, v0.t1430; ZVFH-NEXT: bltu a0, a1, .LBB25_21431; ZVFH-NEXT: # %bb.1:1432; ZVFH-NEXT: mv a0, a11433; ZVFH-NEXT: .LBB25_2:1434; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma1435; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v81436; ZVFH-NEXT: addi a0, sp, 161437; ZVFH-NEXT: vl8r.v v0, (a0) # vscale x 64-byte Folded Reload1438; ZVFH-NEXT: vfwcvtbf16.f.f.v v24, v01439; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma1440; ZVFH-NEXT: vfadd.vv v16, v16, v241441; ZVFH-NEXT: vsetvli zero, zero, e16, m4, ta, ma1442; ZVFH-NEXT: vfncvtbf16.f.f.w v8, v161443; ZVFH-NEXT: csrr a0, vlenb1444; ZVFH-NEXT: slli a0, a0, 31445; ZVFH-NEXT: add sp, sp, a01446; ZVFH-NEXT: .cfi_def_cfa sp, 161447; ZVFH-NEXT: addi sp, sp, 161448; ZVFH-NEXT: .cfi_def_cfa_offset 01449; ZVFH-NEXT: ret1450;1451; ZVFHMIN-LABEL: vfadd_vf_nxv32bf16_unmasked:1452; ZVFHMIN: # %bb.0:1453; ZVFHMIN-NEXT: addi sp, sp, -161454; ZVFHMIN-NEXT: .cfi_def_cfa_offset 161455; ZVFHMIN-NEXT: csrr a1, vlenb1456; ZVFHMIN-NEXT: slli a1, a1, 31457; ZVFHMIN-NEXT: sub sp, sp, a11458; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1459; ZVFHMIN-NEXT: fmv.x.h a1, fa01460; ZVFHMIN-NEXT: csrr a2, vlenb1461; ZVFHMIN-NEXT: vsetvli a3, zero, e16, m8, ta, ma1462; ZVFHMIN-NEXT: vmset.m v241463; ZVFHMIN-NEXT: vmv.v.x v16, a11464; ZVFHMIN-NEXT: slli a1, a2, 11465; ZVFHMIN-NEXT: srli a2, a2, 21466; ZVFHMIN-NEXT: sub a3, a0, a11467; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma1468; ZVFHMIN-NEXT: vslidedown.vx v0, v24, a21469; ZVFHMIN-NEXT: sltu a2, a0, a31470; ZVFHMIN-NEXT: addi a2, a2, -11471; ZVFHMIN-NEXT: and a2, a2, a31472; ZVFHMIN-NEXT: addi a3, sp, 161473; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1474; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma1475; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t1476; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t1477; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1478; ZVFHMIN-NEXT: vfadd.vv v16, v16, v24, v0.t1479; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1480; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v12, v16, v0.t1481; ZVFHMIN-NEXT: bltu a0, a1, .LBB25_21482; ZVFHMIN-NEXT: # %bb.1:1483; ZVFHMIN-NEXT: mv a0, a11484; ZVFHMIN-NEXT: .LBB25_2:1485; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1486; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v16, v81487; ZVFHMIN-NEXT: addi a0, sp, 161488; ZVFHMIN-NEXT: vl8r.v v0, (a0) # vscale x 64-byte Folded Reload1489; ZVFHMIN-NEXT: vfwcvtbf16.f.f.v v24, v01490; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1491; ZVFHMIN-NEXT: vfadd.vv v16, v16, v241492; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1493; ZVFHMIN-NEXT: vfncvtbf16.f.f.w v8, v161494; ZVFHMIN-NEXT: csrr a0, vlenb1495; ZVFHMIN-NEXT: slli a0, a0, 31496; ZVFHMIN-NEXT: add sp, sp, a01497; ZVFHMIN-NEXT: .cfi_def_cfa sp, 161498; ZVFHMIN-NEXT: addi sp, sp, 161499; ZVFHMIN-NEXT: .cfi_def_cfa_offset 01500; ZVFHMIN-NEXT: ret1501;1502; ZVFBFA-LABEL: vfadd_vf_nxv32bf16_unmasked:1503; ZVFBFA: # %bb.0:1504; ZVFBFA-NEXT: addi sp, sp, -161505; ZVFBFA-NEXT: .cfi_def_cfa_offset 161506; ZVFBFA-NEXT: csrr a1, vlenb1507; ZVFBFA-NEXT: slli a1, a1, 31508; ZVFBFA-NEXT: sub sp, sp, a11509; ZVFBFA-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb1510; ZVFBFA-NEXT: vsetvli a1, zero, e16alt, m8, ta, ma1511; ZVFBFA-NEXT: vfmv.v.f v16, fa01512; ZVFBFA-NEXT: csrr a2, vlenb1513; ZVFBFA-NEXT: vmset.m v241514; ZVFBFA-NEXT: slli a1, a2, 11515; ZVFBFA-NEXT: srli a2, a2, 21516; ZVFBFA-NEXT: sub a3, a0, a11517; ZVFBFA-NEXT: vsetvli a4, zero, e8alt, mf2, ta, ma1518; ZVFBFA-NEXT: vslidedown.vx v0, v24, a21519; ZVFBFA-NEXT: sltu a2, a0, a31520; ZVFBFA-NEXT: addi a2, a2, -11521; ZVFBFA-NEXT: and a2, a2, a31522; ZVFBFA-NEXT: addi a3, sp, 161523; ZVFBFA-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1524; ZVFBFA-NEXT: vsetvli zero, a2, e16alt, m4, ta, ma1525; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v20, v0.t1526; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v12, v0.t1527; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma1528; ZVFBFA-NEXT: vfadd.vv v16, v16, v24, v0.t1529; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma1530; ZVFBFA-NEXT: vfncvt.f.f.w v12, v16, v0.t1531; ZVFBFA-NEXT: bltu a0, a1, .LBB25_21532; ZVFBFA-NEXT: # %bb.1:1533; ZVFBFA-NEXT: mv a0, a11534; ZVFBFA-NEXT: .LBB25_2:1535; ZVFBFA-NEXT: addi a1, sp, 161536; ZVFBFA-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload1537; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m4, ta, ma1538; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v241539; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v81540; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma1541; ZVFBFA-NEXT: vfadd.vv v16, v24, v161542; ZVFBFA-NEXT: vsetvli zero, zero, e16alt, m4, ta, ma1543; ZVFBFA-NEXT: vfncvt.f.f.w v8, v161544; ZVFBFA-NEXT: csrr a0, vlenb1545; ZVFBFA-NEXT: slli a0, a0, 31546; ZVFBFA-NEXT: add sp, sp, a01547; ZVFBFA-NEXT: .cfi_def_cfa sp, 161548; ZVFBFA-NEXT: addi sp, sp, 161549; ZVFBFA-NEXT: .cfi_def_cfa_offset 01550; ZVFBFA-NEXT: ret1551 %elt.head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 01552 %vb = shufflevector <vscale x 32 x bfloat> %elt.head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer1553 %v = call <vscale x 32 x bfloat> @llvm.vp.fadd.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)1554 ret <vscale x 32 x bfloat> %v1555}1556 1557define <vscale x 1 x half> @vfadd_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1558; ZVFH-LABEL: vfadd_vv_nxv1f16:1559; ZVFH: # %bb.0:1560; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1561; ZVFH-NEXT: vfadd.vv v8, v8, v9, v0.t1562; ZVFH-NEXT: ret1563;1564; ZVFHMIN-LABEL: vfadd_vv_nxv1f16:1565; ZVFHMIN: # %bb.0:1566; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1567; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t1568; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t1569; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1570; ZVFHMIN-NEXT: vfadd.vv v9, v9, v10, v0.t1571; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1572; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t1573; ZVFHMIN-NEXT: ret1574;1575; ZVFBFA-LABEL: vfadd_vv_nxv1f16:1576; ZVFBFA: # %bb.0:1577; ZVFBFA-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1578; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v9, v0.t1579; ZVFBFA-NEXT: vfwcvt.f.f.v v9, v8, v0.t1580; ZVFBFA-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1581; ZVFBFA-NEXT: vfadd.vv v9, v9, v10, v0.t1582; ZVFBFA-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1583; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9, v0.t1584; ZVFBFA-NEXT: ret1585 %v = call <vscale x 1 x half> @llvm.vp.fadd.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)1586 ret <vscale x 1 x half> %v1587}1588 1589define <vscale x 1 x half> @vfadd_vv_nxv1f16_unmasked(<vscale x 1 x half> %va, <vscale x 1 x half> %b, i32 zeroext %evl) {1590; ZVFH-LABEL: vfadd_vv_nxv1f16_unmasked:1591; ZVFH: # %bb.0:1592; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1593; ZVFH-NEXT: vfadd.vv v8, v8, v91594; ZVFH-NEXT: ret1595;1596; ZVFHMIN-LABEL: vfadd_vv_nxv1f16_unmasked:1597; ZVFHMIN: # %bb.0:1598; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1599; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v91600; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v81601; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1602; ZVFHMIN-NEXT: vfadd.vv v9, v9, v101603; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1604; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v91605; ZVFHMIN-NEXT: ret1606;1607; ZVFBFA-LABEL: vfadd_vv_nxv1f16_unmasked:1608; ZVFBFA: # %bb.0:1609; ZVFBFA-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1610; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v91611; ZVFBFA-NEXT: vfwcvt.f.f.v v9, v81612; ZVFBFA-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1613; ZVFBFA-NEXT: vfadd.vv v9, v9, v101614; ZVFBFA-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1615; ZVFBFA-NEXT: vfncvt.f.f.w v8, v91616; ZVFBFA-NEXT: ret1617 %v = call <vscale x 1 x half> @llvm.vp.fadd.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)1618 ret <vscale x 1 x half> %v1619}1620 1621define <vscale x 1 x half> @vfadd_vf_nxv1f16(<vscale x 1 x half> %va, half %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1622; ZVFH-LABEL: vfadd_vf_nxv1f16:1623; ZVFH: # %bb.0:1624; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1625; ZVFH-NEXT: vfadd.vf v8, v8, fa0, v0.t1626; ZVFH-NEXT: ret1627;1628; ZVFHMIN-LABEL: vfadd_vf_nxv1f16:1629; ZVFHMIN: # %bb.0:1630; ZVFHMIN-NEXT: fmv.x.h a1, fa01631; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1632; ZVFHMIN-NEXT: vmv.v.x v9, a11633; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t1634; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t1635; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1636; ZVFHMIN-NEXT: vfadd.vv v9, v10, v8, v0.t1637; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1638; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t1639; ZVFHMIN-NEXT: ret1640;1641; ZVFBFA-LABEL: vfadd_vf_nxv1f16:1642; ZVFBFA: # %bb.0:1643; ZVFBFA-NEXT: fmv.x.w a1, fa01644; ZVFBFA-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1645; ZVFBFA-NEXT: vmv.v.x v9, a11646; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v8, v0.t1647; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v9, v0.t1648; ZVFBFA-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1649; ZVFBFA-NEXT: vfadd.vv v9, v10, v8, v0.t1650; ZVFBFA-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1651; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9, v0.t1652; ZVFBFA-NEXT: ret1653 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 01654 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer1655 %v = call <vscale x 1 x half> @llvm.vp.fadd.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)1656 ret <vscale x 1 x half> %v1657}1658 1659define <vscale x 1 x half> @vfadd_vf_nxv1f16_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {1660; ZVFH-LABEL: vfadd_vf_nxv1f16_commute:1661; ZVFH: # %bb.0:1662; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1663; ZVFH-NEXT: vfadd.vf v8, v8, fa0, v0.t1664; ZVFH-NEXT: ret1665;1666; ZVFHMIN-LABEL: vfadd_vf_nxv1f16_commute:1667; ZVFHMIN: # %bb.0:1668; ZVFHMIN-NEXT: fmv.x.h a1, fa01669; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1670; ZVFHMIN-NEXT: vmv.v.x v9, a11671; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t1672; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t1673; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1674; ZVFHMIN-NEXT: vfadd.vv v9, v8, v10, v0.t1675; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1676; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t1677; ZVFHMIN-NEXT: ret1678;1679; ZVFBFA-LABEL: vfadd_vf_nxv1f16_commute:1680; ZVFBFA: # %bb.0:1681; ZVFBFA-NEXT: fmv.x.w a1, fa01682; ZVFBFA-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1683; ZVFBFA-NEXT: vmv.v.x v9, a11684; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v8, v0.t1685; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v9, v0.t1686; ZVFBFA-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1687; ZVFBFA-NEXT: vfadd.vv v9, v8, v10, v0.t1688; ZVFBFA-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1689; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9, v0.t1690; ZVFBFA-NEXT: ret1691 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 01692 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer1693 %v = call <vscale x 1 x half> @llvm.vp.fadd.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %va, <vscale x 1 x i1> %m, i32 %evl)1694 ret <vscale x 1 x half> %v1695}1696 1697define <vscale x 1 x half> @vfadd_vf_nxv1f16_unmasked(<vscale x 1 x half> %va, half %b, i32 zeroext %evl) {1698; ZVFH-LABEL: vfadd_vf_nxv1f16_unmasked:1699; ZVFH: # %bb.0:1700; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1701; ZVFH-NEXT: vfadd.vf v8, v8, fa01702; ZVFH-NEXT: ret1703;1704; ZVFHMIN-LABEL: vfadd_vf_nxv1f16_unmasked:1705; ZVFHMIN: # %bb.0:1706; ZVFHMIN-NEXT: fmv.x.h a1, fa01707; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1708; ZVFHMIN-NEXT: vmv.v.x v9, a11709; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v81710; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v91711; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1712; ZVFHMIN-NEXT: vfadd.vv v9, v10, v81713; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1714; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v91715; ZVFHMIN-NEXT: ret1716;1717; ZVFBFA-LABEL: vfadd_vf_nxv1f16_unmasked:1718; ZVFBFA: # %bb.0:1719; ZVFBFA-NEXT: fmv.x.w a1, fa01720; ZVFBFA-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1721; ZVFBFA-NEXT: vmv.v.x v9, a11722; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v81723; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v91724; ZVFBFA-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1725; ZVFBFA-NEXT: vfadd.vv v9, v10, v81726; ZVFBFA-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1727; ZVFBFA-NEXT: vfncvt.f.f.w v8, v91728; ZVFBFA-NEXT: ret1729 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 01730 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer1731 %v = call <vscale x 1 x half> @llvm.vp.fadd.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)1732 ret <vscale x 1 x half> %v1733}1734 1735define <vscale x 1 x half> @vfadd_vf_nxv1f16_unmasked_commute(<vscale x 1 x half> %va, half %b, i32 zeroext %evl) {1736; ZVFH-LABEL: vfadd_vf_nxv1f16_unmasked_commute:1737; ZVFH: # %bb.0:1738; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1739; ZVFH-NEXT: vfadd.vf v8, v8, fa01740; ZVFH-NEXT: ret1741;1742; ZVFHMIN-LABEL: vfadd_vf_nxv1f16_unmasked_commute:1743; ZVFHMIN: # %bb.0:1744; ZVFHMIN-NEXT: fmv.x.h a1, fa01745; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1746; ZVFHMIN-NEXT: vmv.v.x v9, a11747; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v81748; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v91749; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1750; ZVFHMIN-NEXT: vfadd.vv v9, v8, v101751; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1752; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v91753; ZVFHMIN-NEXT: ret1754;1755; ZVFBFA-LABEL: vfadd_vf_nxv1f16_unmasked_commute:1756; ZVFBFA: # %bb.0:1757; ZVFBFA-NEXT: fmv.x.w a1, fa01758; ZVFBFA-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1759; ZVFBFA-NEXT: vmv.v.x v9, a11760; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v81761; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v91762; ZVFBFA-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1763; ZVFBFA-NEXT: vfadd.vv v9, v8, v101764; ZVFBFA-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1765; ZVFBFA-NEXT: vfncvt.f.f.w v8, v91766; ZVFBFA-NEXT: ret1767 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 01768 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer1769 %v = call <vscale x 1 x half> @llvm.vp.fadd.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)1770 ret <vscale x 1 x half> %v1771}1772 1773define <vscale x 2 x half> @vfadd_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1774; ZVFH-LABEL: vfadd_vv_nxv2f16:1775; ZVFH: # %bb.0:1776; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1777; ZVFH-NEXT: vfadd.vv v8, v8, v9, v0.t1778; ZVFH-NEXT: ret1779;1780; ZVFHMIN-LABEL: vfadd_vv_nxv2f16:1781; ZVFHMIN: # %bb.0:1782; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1783; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t1784; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t1785; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma1786; ZVFHMIN-NEXT: vfadd.vv v9, v9, v10, v0.t1787; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1788; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t1789; ZVFHMIN-NEXT: ret1790;1791; ZVFBFA-LABEL: vfadd_vv_nxv2f16:1792; ZVFBFA: # %bb.0:1793; ZVFBFA-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1794; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v9, v0.t1795; ZVFBFA-NEXT: vfwcvt.f.f.v v9, v8, v0.t1796; ZVFBFA-NEXT: vsetvli zero, zero, e32, m1, ta, ma1797; ZVFBFA-NEXT: vfadd.vv v9, v9, v10, v0.t1798; ZVFBFA-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1799; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9, v0.t1800; ZVFBFA-NEXT: ret1801 %v = call <vscale x 2 x half> @llvm.vp.fadd.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)1802 ret <vscale x 2 x half> %v1803}1804 1805define <vscale x 2 x half> @vfadd_vv_nxv2f16_unmasked(<vscale x 2 x half> %va, <vscale x 2 x half> %b, i32 zeroext %evl) {1806; ZVFH-LABEL: vfadd_vv_nxv2f16_unmasked:1807; ZVFH: # %bb.0:1808; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1809; ZVFH-NEXT: vfadd.vv v8, v8, v91810; ZVFH-NEXT: ret1811;1812; ZVFHMIN-LABEL: vfadd_vv_nxv2f16_unmasked:1813; ZVFHMIN: # %bb.0:1814; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1815; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v91816; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v81817; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma1818; ZVFHMIN-NEXT: vfadd.vv v9, v9, v101819; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1820; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v91821; ZVFHMIN-NEXT: ret1822;1823; ZVFBFA-LABEL: vfadd_vv_nxv2f16_unmasked:1824; ZVFBFA: # %bb.0:1825; ZVFBFA-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1826; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v91827; ZVFBFA-NEXT: vfwcvt.f.f.v v9, v81828; ZVFBFA-NEXT: vsetvli zero, zero, e32, m1, ta, ma1829; ZVFBFA-NEXT: vfadd.vv v9, v9, v101830; ZVFBFA-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1831; ZVFBFA-NEXT: vfncvt.f.f.w v8, v91832; ZVFBFA-NEXT: ret1833 %v = call <vscale x 2 x half> @llvm.vp.fadd.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)1834 ret <vscale x 2 x half> %v1835}1836 1837define <vscale x 2 x half> @vfadd_vf_nxv2f16(<vscale x 2 x half> %va, half %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {1838; ZVFH-LABEL: vfadd_vf_nxv2f16:1839; ZVFH: # %bb.0:1840; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1841; ZVFH-NEXT: vfadd.vf v8, v8, fa0, v0.t1842; ZVFH-NEXT: ret1843;1844; ZVFHMIN-LABEL: vfadd_vf_nxv2f16:1845; ZVFHMIN: # %bb.0:1846; ZVFHMIN-NEXT: fmv.x.h a1, fa01847; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1848; ZVFHMIN-NEXT: vmv.v.x v9, a11849; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t1850; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t1851; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma1852; ZVFHMIN-NEXT: vfadd.vv v9, v10, v8, v0.t1853; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1854; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t1855; ZVFHMIN-NEXT: ret1856;1857; ZVFBFA-LABEL: vfadd_vf_nxv2f16:1858; ZVFBFA: # %bb.0:1859; ZVFBFA-NEXT: fmv.x.w a1, fa01860; ZVFBFA-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1861; ZVFBFA-NEXT: vmv.v.x v9, a11862; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v8, v0.t1863; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v9, v0.t1864; ZVFBFA-NEXT: vsetvli zero, zero, e32, m1, ta, ma1865; ZVFBFA-NEXT: vfadd.vv v9, v10, v8, v0.t1866; ZVFBFA-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1867; ZVFBFA-NEXT: vfncvt.f.f.w v8, v9, v0.t1868; ZVFBFA-NEXT: ret1869 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 01870 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer1871 %v = call <vscale x 2 x half> @llvm.vp.fadd.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)1872 ret <vscale x 2 x half> %v1873}1874 1875define <vscale x 2 x half> @vfadd_vf_nxv2f16_unmasked(<vscale x 2 x half> %va, half %b, i32 zeroext %evl) {1876; ZVFH-LABEL: vfadd_vf_nxv2f16_unmasked:1877; ZVFH: # %bb.0:1878; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1879; ZVFH-NEXT: vfadd.vf v8, v8, fa01880; ZVFH-NEXT: ret1881;1882; ZVFHMIN-LABEL: vfadd_vf_nxv2f16_unmasked:1883; ZVFHMIN: # %bb.0:1884; ZVFHMIN-NEXT: fmv.x.h a1, fa01885; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1886; ZVFHMIN-NEXT: vmv.v.x v9, a11887; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v81888; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v91889; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma1890; ZVFHMIN-NEXT: vfadd.vv v9, v10, v81891; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1892; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v91893; ZVFHMIN-NEXT: ret1894;1895; ZVFBFA-LABEL: vfadd_vf_nxv2f16_unmasked:1896; ZVFBFA: # %bb.0:1897; ZVFBFA-NEXT: fmv.x.w a1, fa01898; ZVFBFA-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1899; ZVFBFA-NEXT: vmv.v.x v9, a11900; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v81901; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v91902; ZVFBFA-NEXT: vsetvli zero, zero, e32, m1, ta, ma1903; ZVFBFA-NEXT: vfadd.vv v9, v10, v81904; ZVFBFA-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1905; ZVFBFA-NEXT: vfncvt.f.f.w v8, v91906; ZVFBFA-NEXT: ret1907 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 01908 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer1909 %v = call <vscale x 2 x half> @llvm.vp.fadd.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)1910 ret <vscale x 2 x half> %v1911}1912 1913define <vscale x 4 x half> @vfadd_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1914; ZVFH-LABEL: vfadd_vv_nxv4f16:1915; ZVFH: # %bb.0:1916; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma1917; ZVFH-NEXT: vfadd.vv v8, v8, v9, v0.t1918; ZVFH-NEXT: ret1919;1920; ZVFHMIN-LABEL: vfadd_vv_nxv4f16:1921; ZVFHMIN: # %bb.0:1922; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma1923; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t1924; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t1925; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma1926; ZVFHMIN-NEXT: vfadd.vv v10, v12, v10, v0.t1927; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma1928; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t1929; ZVFHMIN-NEXT: ret1930;1931; ZVFBFA-LABEL: vfadd_vv_nxv4f16:1932; ZVFBFA: # %bb.0:1933; ZVFBFA-NEXT: vsetvli zero, a0, e16, m1, ta, ma1934; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v9, v0.t1935; ZVFBFA-NEXT: vfwcvt.f.f.v v12, v8, v0.t1936; ZVFBFA-NEXT: vsetvli zero, zero, e32, m2, ta, ma1937; ZVFBFA-NEXT: vfadd.vv v10, v12, v10, v0.t1938; ZVFBFA-NEXT: vsetvli zero, zero, e16, m1, ta, ma1939; ZVFBFA-NEXT: vfncvt.f.f.w v8, v10, v0.t1940; ZVFBFA-NEXT: ret1941 %v = call <vscale x 4 x half> @llvm.vp.fadd.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)1942 ret <vscale x 4 x half> %v1943}1944 1945define <vscale x 4 x half> @vfadd_vv_nxv4f16_unmasked(<vscale x 4 x half> %va, <vscale x 4 x half> %b, i32 zeroext %evl) {1946; ZVFH-LABEL: vfadd_vv_nxv4f16_unmasked:1947; ZVFH: # %bb.0:1948; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma1949; ZVFH-NEXT: vfadd.vv v8, v8, v91950; ZVFH-NEXT: ret1951;1952; ZVFHMIN-LABEL: vfadd_vv_nxv4f16_unmasked:1953; ZVFHMIN: # %bb.0:1954; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma1955; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v91956; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v81957; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma1958; ZVFHMIN-NEXT: vfadd.vv v10, v12, v101959; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma1960; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v101961; ZVFHMIN-NEXT: ret1962;1963; ZVFBFA-LABEL: vfadd_vv_nxv4f16_unmasked:1964; ZVFBFA: # %bb.0:1965; ZVFBFA-NEXT: vsetvli zero, a0, e16, m1, ta, ma1966; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v91967; ZVFBFA-NEXT: vfwcvt.f.f.v v12, v81968; ZVFBFA-NEXT: vsetvli zero, zero, e32, m2, ta, ma1969; ZVFBFA-NEXT: vfadd.vv v10, v12, v101970; ZVFBFA-NEXT: vsetvli zero, zero, e16, m1, ta, ma1971; ZVFBFA-NEXT: vfncvt.f.f.w v8, v101972; ZVFBFA-NEXT: ret1973 %v = call <vscale x 4 x half> @llvm.vp.fadd.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)1974 ret <vscale x 4 x half> %v1975}1976 1977define <vscale x 4 x half> @vfadd_vf_nxv4f16(<vscale x 4 x half> %va, half %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {1978; ZVFH-LABEL: vfadd_vf_nxv4f16:1979; ZVFH: # %bb.0:1980; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma1981; ZVFH-NEXT: vfadd.vf v8, v8, fa0, v0.t1982; ZVFH-NEXT: ret1983;1984; ZVFHMIN-LABEL: vfadd_vf_nxv4f16:1985; ZVFHMIN: # %bb.0:1986; ZVFHMIN-NEXT: fmv.x.h a1, fa01987; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma1988; ZVFHMIN-NEXT: vmv.v.x v12, a11989; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t1990; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v12, v0.t1991; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma1992; ZVFHMIN-NEXT: vfadd.vv v10, v10, v8, v0.t1993; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma1994; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t1995; ZVFHMIN-NEXT: ret1996;1997; ZVFBFA-LABEL: vfadd_vf_nxv4f16:1998; ZVFBFA: # %bb.0:1999; ZVFBFA-NEXT: fmv.x.w a1, fa02000; ZVFBFA-NEXT: vsetvli zero, a0, e16, m1, ta, ma2001; ZVFBFA-NEXT: vmv.v.x v12, a12002; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v8, v0.t2003; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v12, v0.t2004; ZVFBFA-NEXT: vsetvli zero, zero, e32, m2, ta, ma2005; ZVFBFA-NEXT: vfadd.vv v10, v10, v8, v0.t2006; ZVFBFA-NEXT: vsetvli zero, zero, e16, m1, ta, ma2007; ZVFBFA-NEXT: vfncvt.f.f.w v8, v10, v0.t2008; ZVFBFA-NEXT: ret2009 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 02010 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer2011 %v = call <vscale x 4 x half> @llvm.vp.fadd.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)2012 ret <vscale x 4 x half> %v2013}2014 2015define <vscale x 4 x half> @vfadd_vf_nxv4f16_unmasked(<vscale x 4 x half> %va, half %b, i32 zeroext %evl) {2016; ZVFH-LABEL: vfadd_vf_nxv4f16_unmasked:2017; ZVFH: # %bb.0:2018; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma2019; ZVFH-NEXT: vfadd.vf v8, v8, fa02020; ZVFH-NEXT: ret2021;2022; ZVFHMIN-LABEL: vfadd_vf_nxv4f16_unmasked:2023; ZVFHMIN: # %bb.0:2024; ZVFHMIN-NEXT: fmv.x.h a1, fa02025; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma2026; ZVFHMIN-NEXT: vmv.v.x v12, a12027; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v82028; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v122029; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma2030; ZVFHMIN-NEXT: vfadd.vv v10, v10, v82031; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma2032; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v102033; ZVFHMIN-NEXT: ret2034;2035; ZVFBFA-LABEL: vfadd_vf_nxv4f16_unmasked:2036; ZVFBFA: # %bb.0:2037; ZVFBFA-NEXT: fmv.x.w a1, fa02038; ZVFBFA-NEXT: vsetvli zero, a0, e16, m1, ta, ma2039; ZVFBFA-NEXT: vmv.v.x v12, a12040; ZVFBFA-NEXT: vfwcvt.f.f.v v10, v82041; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v122042; ZVFBFA-NEXT: vsetvli zero, zero, e32, m2, ta, ma2043; ZVFBFA-NEXT: vfadd.vv v10, v10, v82044; ZVFBFA-NEXT: vsetvli zero, zero, e16, m1, ta, ma2045; ZVFBFA-NEXT: vfncvt.f.f.w v8, v102046; ZVFBFA-NEXT: ret2047 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 02048 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer2049 %v = call <vscale x 4 x half> @llvm.vp.fadd.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)2050 ret <vscale x 4 x half> %v2051}2052 2053define <vscale x 8 x half> @vfadd_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {2054; ZVFH-LABEL: vfadd_vv_nxv8f16:2055; ZVFH: # %bb.0:2056; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma2057; ZVFH-NEXT: vfadd.vv v8, v8, v10, v0.t2058; ZVFH-NEXT: ret2059;2060; ZVFHMIN-LABEL: vfadd_vv_nxv8f16:2061; ZVFHMIN: # %bb.0:2062; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma2063; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t2064; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t2065; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma2066; ZVFHMIN-NEXT: vfadd.vv v12, v16, v12, v0.t2067; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma2068; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t2069; ZVFHMIN-NEXT: ret2070;2071; ZVFBFA-LABEL: vfadd_vv_nxv8f16:2072; ZVFBFA: # %bb.0:2073; ZVFBFA-NEXT: vsetvli zero, a0, e16, m2, ta, ma2074; ZVFBFA-NEXT: vfwcvt.f.f.v v12, v10, v0.t2075; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v8, v0.t2076; ZVFBFA-NEXT: vsetvli zero, zero, e32, m4, ta, ma2077; ZVFBFA-NEXT: vfadd.vv v12, v16, v12, v0.t2078; ZVFBFA-NEXT: vsetvli zero, zero, e16, m2, ta, ma2079; ZVFBFA-NEXT: vfncvt.f.f.w v8, v12, v0.t2080; ZVFBFA-NEXT: ret2081 %v = call <vscale x 8 x half> @llvm.vp.fadd.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)2082 ret <vscale x 8 x half> %v2083}2084 2085define <vscale x 8 x half> @vfadd_vv_nxv8f16_unmasked(<vscale x 8 x half> %va, <vscale x 8 x half> %b, i32 zeroext %evl) {2086; ZVFH-LABEL: vfadd_vv_nxv8f16_unmasked:2087; ZVFH: # %bb.0:2088; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma2089; ZVFH-NEXT: vfadd.vv v8, v8, v102090; ZVFH-NEXT: ret2091;2092; ZVFHMIN-LABEL: vfadd_vv_nxv8f16_unmasked:2093; ZVFHMIN: # %bb.0:2094; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma2095; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v102096; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v82097; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma2098; ZVFHMIN-NEXT: vfadd.vv v12, v16, v122099; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma2100; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v122101; ZVFHMIN-NEXT: ret2102;2103; ZVFBFA-LABEL: vfadd_vv_nxv8f16_unmasked:2104; ZVFBFA: # %bb.0:2105; ZVFBFA-NEXT: vsetvli zero, a0, e16, m2, ta, ma2106; ZVFBFA-NEXT: vfwcvt.f.f.v v12, v102107; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v82108; ZVFBFA-NEXT: vsetvli zero, zero, e32, m4, ta, ma2109; ZVFBFA-NEXT: vfadd.vv v12, v16, v122110; ZVFBFA-NEXT: vsetvli zero, zero, e16, m2, ta, ma2111; ZVFBFA-NEXT: vfncvt.f.f.w v8, v122112; ZVFBFA-NEXT: ret2113 %v = call <vscale x 8 x half> @llvm.vp.fadd.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)2114 ret <vscale x 8 x half> %v2115}2116 2117define <vscale x 8 x half> @vfadd_vf_nxv8f16(<vscale x 8 x half> %va, half %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {2118; ZVFH-LABEL: vfadd_vf_nxv8f16:2119; ZVFH: # %bb.0:2120; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma2121; ZVFH-NEXT: vfadd.vf v8, v8, fa0, v0.t2122; ZVFH-NEXT: ret2123;2124; ZVFHMIN-LABEL: vfadd_vf_nxv8f16:2125; ZVFHMIN: # %bb.0:2126; ZVFHMIN-NEXT: fmv.x.h a1, fa02127; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma2128; ZVFHMIN-NEXT: vmv.v.x v16, a12129; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t2130; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t2131; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma2132; ZVFHMIN-NEXT: vfadd.vv v12, v12, v8, v0.t2133; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma2134; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t2135; ZVFHMIN-NEXT: ret2136;2137; ZVFBFA-LABEL: vfadd_vf_nxv8f16:2138; ZVFBFA: # %bb.0:2139; ZVFBFA-NEXT: fmv.x.w a1, fa02140; ZVFBFA-NEXT: vsetvli zero, a0, e16, m2, ta, ma2141; ZVFBFA-NEXT: vmv.v.x v16, a12142; ZVFBFA-NEXT: vfwcvt.f.f.v v12, v8, v0.t2143; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v16, v0.t2144; ZVFBFA-NEXT: vsetvli zero, zero, e32, m4, ta, ma2145; ZVFBFA-NEXT: vfadd.vv v12, v12, v8, v0.t2146; ZVFBFA-NEXT: vsetvli zero, zero, e16, m2, ta, ma2147; ZVFBFA-NEXT: vfncvt.f.f.w v8, v12, v0.t2148; ZVFBFA-NEXT: ret2149 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 02150 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer2151 %v = call <vscale x 8 x half> @llvm.vp.fadd.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)2152 ret <vscale x 8 x half> %v2153}2154 2155define <vscale x 8 x half> @vfadd_vf_nxv8f16_unmasked(<vscale x 8 x half> %va, half %b, i32 zeroext %evl) {2156; ZVFH-LABEL: vfadd_vf_nxv8f16_unmasked:2157; ZVFH: # %bb.0:2158; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma2159; ZVFH-NEXT: vfadd.vf v8, v8, fa02160; ZVFH-NEXT: ret2161;2162; ZVFHMIN-LABEL: vfadd_vf_nxv8f16_unmasked:2163; ZVFHMIN: # %bb.0:2164; ZVFHMIN-NEXT: fmv.x.h a1, fa02165; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma2166; ZVFHMIN-NEXT: vmv.v.x v16, a12167; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v82168; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v162169; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma2170; ZVFHMIN-NEXT: vfadd.vv v12, v12, v82171; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma2172; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v122173; ZVFHMIN-NEXT: ret2174;2175; ZVFBFA-LABEL: vfadd_vf_nxv8f16_unmasked:2176; ZVFBFA: # %bb.0:2177; ZVFBFA-NEXT: fmv.x.w a1, fa02178; ZVFBFA-NEXT: vsetvli zero, a0, e16, m2, ta, ma2179; ZVFBFA-NEXT: vmv.v.x v16, a12180; ZVFBFA-NEXT: vfwcvt.f.f.v v12, v82181; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v162182; ZVFBFA-NEXT: vsetvli zero, zero, e32, m4, ta, ma2183; ZVFBFA-NEXT: vfadd.vv v12, v12, v82184; ZVFBFA-NEXT: vsetvli zero, zero, e16, m2, ta, ma2185; ZVFBFA-NEXT: vfncvt.f.f.w v8, v122186; ZVFBFA-NEXT: ret2187 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 02188 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer2189 %v = call <vscale x 8 x half> @llvm.vp.fadd.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)2190 ret <vscale x 8 x half> %v2191}2192 2193define <vscale x 16 x half> @vfadd_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {2194; ZVFH-LABEL: vfadd_vv_nxv16f16:2195; ZVFH: # %bb.0:2196; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma2197; ZVFH-NEXT: vfadd.vv v8, v8, v12, v0.t2198; ZVFH-NEXT: ret2199;2200; ZVFHMIN-LABEL: vfadd_vv_nxv16f16:2201; ZVFHMIN: # %bb.0:2202; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2203; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t2204; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t2205; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2206; ZVFHMIN-NEXT: vfadd.vv v16, v24, v16, v0.t2207; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2208; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t2209; ZVFHMIN-NEXT: ret2210;2211; ZVFBFA-LABEL: vfadd_vv_nxv16f16:2212; ZVFBFA: # %bb.0:2213; ZVFBFA-NEXT: vsetvli zero, a0, e16, m4, ta, ma2214; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v12, v0.t2215; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v8, v0.t2216; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma2217; ZVFBFA-NEXT: vfadd.vv v16, v24, v16, v0.t2218; ZVFBFA-NEXT: vsetvli zero, zero, e16, m4, ta, ma2219; ZVFBFA-NEXT: vfncvt.f.f.w v8, v16, v0.t2220; ZVFBFA-NEXT: ret2221 %v = call <vscale x 16 x half> @llvm.vp.fadd.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)2222 ret <vscale x 16 x half> %v2223}2224 2225define <vscale x 16 x half> @vfadd_vv_nxv16f16_unmasked(<vscale x 16 x half> %va, <vscale x 16 x half> %b, i32 zeroext %evl) {2226; ZVFH-LABEL: vfadd_vv_nxv16f16_unmasked:2227; ZVFH: # %bb.0:2228; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma2229; ZVFH-NEXT: vfadd.vv v8, v8, v122230; ZVFH-NEXT: ret2231;2232; ZVFHMIN-LABEL: vfadd_vv_nxv16f16_unmasked:2233; ZVFHMIN: # %bb.0:2234; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2235; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v122236; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v82237; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2238; ZVFHMIN-NEXT: vfadd.vv v16, v24, v162239; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2240; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v162241; ZVFHMIN-NEXT: ret2242;2243; ZVFBFA-LABEL: vfadd_vv_nxv16f16_unmasked:2244; ZVFBFA: # %bb.0:2245; ZVFBFA-NEXT: vsetvli zero, a0, e16, m4, ta, ma2246; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v122247; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v82248; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma2249; ZVFBFA-NEXT: vfadd.vv v16, v24, v162250; ZVFBFA-NEXT: vsetvli zero, zero, e16, m4, ta, ma2251; ZVFBFA-NEXT: vfncvt.f.f.w v8, v162252; ZVFBFA-NEXT: ret2253 %v = call <vscale x 16 x half> @llvm.vp.fadd.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)2254 ret <vscale x 16 x half> %v2255}2256 2257define <vscale x 16 x half> @vfadd_vf_nxv16f16(<vscale x 16 x half> %va, half %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {2258; ZVFH-LABEL: vfadd_vf_nxv16f16:2259; ZVFH: # %bb.0:2260; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma2261; ZVFH-NEXT: vfadd.vf v8, v8, fa0, v0.t2262; ZVFH-NEXT: ret2263;2264; ZVFHMIN-LABEL: vfadd_vf_nxv16f16:2265; ZVFHMIN: # %bb.0:2266; ZVFHMIN-NEXT: fmv.x.h a1, fa02267; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2268; ZVFHMIN-NEXT: vmv.v.x v24, a12269; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t2270; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v24, v0.t2271; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2272; ZVFHMIN-NEXT: vfadd.vv v16, v16, v8, v0.t2273; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2274; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t2275; ZVFHMIN-NEXT: ret2276;2277; ZVFBFA-LABEL: vfadd_vf_nxv16f16:2278; ZVFBFA: # %bb.0:2279; ZVFBFA-NEXT: fmv.x.w a1, fa02280; ZVFBFA-NEXT: vsetvli zero, a0, e16, m4, ta, ma2281; ZVFBFA-NEXT: vmv.v.x v24, a12282; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v8, v0.t2283; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v24, v0.t2284; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma2285; ZVFBFA-NEXT: vfadd.vv v16, v16, v8, v0.t2286; ZVFBFA-NEXT: vsetvli zero, zero, e16, m4, ta, ma2287; ZVFBFA-NEXT: vfncvt.f.f.w v8, v16, v0.t2288; ZVFBFA-NEXT: ret2289 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 02290 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer2291 %v = call <vscale x 16 x half> @llvm.vp.fadd.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)2292 ret <vscale x 16 x half> %v2293}2294 2295define <vscale x 16 x half> @vfadd_vf_nxv16f16_unmasked(<vscale x 16 x half> %va, half %b, i32 zeroext %evl) {2296; ZVFH-LABEL: vfadd_vf_nxv16f16_unmasked:2297; ZVFH: # %bb.0:2298; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma2299; ZVFH-NEXT: vfadd.vf v8, v8, fa02300; ZVFH-NEXT: ret2301;2302; ZVFHMIN-LABEL: vfadd_vf_nxv16f16_unmasked:2303; ZVFHMIN: # %bb.0:2304; ZVFHMIN-NEXT: fmv.x.h a1, fa02305; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2306; ZVFHMIN-NEXT: vmv.v.x v24, a12307; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v82308; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v242309; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2310; ZVFHMIN-NEXT: vfadd.vv v16, v16, v82311; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2312; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v162313; ZVFHMIN-NEXT: ret2314;2315; ZVFBFA-LABEL: vfadd_vf_nxv16f16_unmasked:2316; ZVFBFA: # %bb.0:2317; ZVFBFA-NEXT: fmv.x.w a1, fa02318; ZVFBFA-NEXT: vsetvli zero, a0, e16, m4, ta, ma2319; ZVFBFA-NEXT: vmv.v.x v24, a12320; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v82321; ZVFBFA-NEXT: vfwcvt.f.f.v v8, v242322; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma2323; ZVFBFA-NEXT: vfadd.vv v16, v16, v82324; ZVFBFA-NEXT: vsetvli zero, zero, e16, m4, ta, ma2325; ZVFBFA-NEXT: vfncvt.f.f.w v8, v162326; ZVFBFA-NEXT: ret2327 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 02328 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer2329 %v = call <vscale x 16 x half> @llvm.vp.fadd.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)2330 ret <vscale x 16 x half> %v2331}2332 2333define <vscale x 32 x half> @vfadd_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {2334; ZVFH-LABEL: vfadd_vv_nxv32f16:2335; ZVFH: # %bb.0:2336; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma2337; ZVFH-NEXT: vfadd.vv v8, v8, v16, v0.t2338; ZVFH-NEXT: ret2339;2340; ZVFHMIN-LABEL: vfadd_vv_nxv32f16:2341; ZVFHMIN: # %bb.0:2342; ZVFHMIN-NEXT: addi sp, sp, -162343; ZVFHMIN-NEXT: .cfi_def_cfa_offset 162344; ZVFHMIN-NEXT: csrr a1, vlenb2345; ZVFHMIN-NEXT: slli a1, a1, 32346; ZVFHMIN-NEXT: sub sp, sp, a12347; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb2348; ZVFHMIN-NEXT: vsetvli a1, zero, e8, mf2, ta, ma2349; ZVFHMIN-NEXT: vmv1r.v v7, v02350; ZVFHMIN-NEXT: csrr a2, vlenb2351; ZVFHMIN-NEXT: slli a1, a2, 12352; ZVFHMIN-NEXT: srli a2, a2, 22353; ZVFHMIN-NEXT: sub a3, a0, a12354; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a22355; ZVFHMIN-NEXT: sltu a2, a0, a32356; ZVFHMIN-NEXT: addi a2, a2, -12357; ZVFHMIN-NEXT: and a2, a2, a32358; ZVFHMIN-NEXT: addi a3, sp, 162359; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill2360; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma2361; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t2362; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t2363; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2364; ZVFHMIN-NEXT: vfadd.vv v16, v16, v24, v0.t2365; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2366; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16, v0.t2367; ZVFHMIN-NEXT: bltu a0, a1, .LBB48_22368; ZVFHMIN-NEXT: # %bb.1:2369; ZVFHMIN-NEXT: mv a0, a12370; ZVFHMIN-NEXT: .LBB48_2:2371; ZVFHMIN-NEXT: vmv1r.v v0, v72372; ZVFHMIN-NEXT: addi a1, sp, 162373; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload2374; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2375; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v24, v0.t2376; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t2377; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2378; ZVFHMIN-NEXT: vfadd.vv v16, v24, v16, v0.t2379; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2380; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t2381; ZVFHMIN-NEXT: csrr a0, vlenb2382; ZVFHMIN-NEXT: slli a0, a0, 32383; ZVFHMIN-NEXT: add sp, sp, a02384; ZVFHMIN-NEXT: .cfi_def_cfa sp, 162385; ZVFHMIN-NEXT: addi sp, sp, 162386; ZVFHMIN-NEXT: .cfi_def_cfa_offset 02387; ZVFHMIN-NEXT: ret2388;2389; ZVFBFA-LABEL: vfadd_vv_nxv32f16:2390; ZVFBFA: # %bb.0:2391; ZVFBFA-NEXT: addi sp, sp, -162392; ZVFBFA-NEXT: .cfi_def_cfa_offset 162393; ZVFBFA-NEXT: csrr a1, vlenb2394; ZVFBFA-NEXT: slli a1, a1, 32395; ZVFBFA-NEXT: sub sp, sp, a12396; ZVFBFA-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb2397; ZVFBFA-NEXT: vsetvli a1, zero, e8, mf2, ta, ma2398; ZVFBFA-NEXT: vmv1r.v v7, v02399; ZVFBFA-NEXT: csrr a2, vlenb2400; ZVFBFA-NEXT: slli a1, a2, 12401; ZVFBFA-NEXT: srli a2, a2, 22402; ZVFBFA-NEXT: sub a3, a0, a12403; ZVFBFA-NEXT: vslidedown.vx v0, v0, a22404; ZVFBFA-NEXT: sltu a2, a0, a32405; ZVFBFA-NEXT: addi a2, a2, -12406; ZVFBFA-NEXT: and a2, a2, a32407; ZVFBFA-NEXT: addi a3, sp, 162408; ZVFBFA-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill2409; ZVFBFA-NEXT: vsetvli zero, a2, e16, m4, ta, ma2410; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v20, v0.t2411; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v12, v0.t2412; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma2413; ZVFBFA-NEXT: vfadd.vv v16, v16, v24, v0.t2414; ZVFBFA-NEXT: vsetvli zero, zero, e16, m4, ta, ma2415; ZVFBFA-NEXT: vfncvt.f.f.w v12, v16, v0.t2416; ZVFBFA-NEXT: bltu a0, a1, .LBB48_22417; ZVFBFA-NEXT: # %bb.1:2418; ZVFBFA-NEXT: mv a0, a12419; ZVFBFA-NEXT: .LBB48_2:2420; ZVFBFA-NEXT: vmv1r.v v0, v72421; ZVFBFA-NEXT: addi a1, sp, 162422; ZVFBFA-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload2423; ZVFBFA-NEXT: vsetvli zero, a0, e16, m4, ta, ma2424; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v24, v0.t2425; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v8, v0.t2426; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma2427; ZVFBFA-NEXT: vfadd.vv v16, v24, v16, v0.t2428; ZVFBFA-NEXT: vsetvli zero, zero, e16, m4, ta, ma2429; ZVFBFA-NEXT: vfncvt.f.f.w v8, v16, v0.t2430; ZVFBFA-NEXT: csrr a0, vlenb2431; ZVFBFA-NEXT: slli a0, a0, 32432; ZVFBFA-NEXT: add sp, sp, a02433; ZVFBFA-NEXT: .cfi_def_cfa sp, 162434; ZVFBFA-NEXT: addi sp, sp, 162435; ZVFBFA-NEXT: .cfi_def_cfa_offset 02436; ZVFBFA-NEXT: ret2437 %v = call <vscale x 32 x half> @llvm.vp.fadd.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x i1> %m, i32 %evl)2438 ret <vscale x 32 x half> %v2439}2440 2441define <vscale x 32 x half> @vfadd_vv_nxv32f16_unmasked(<vscale x 32 x half> %va, <vscale x 32 x half> %b, i32 zeroext %evl) {2442; ZVFH-LABEL: vfadd_vv_nxv32f16_unmasked:2443; ZVFH: # %bb.0:2444; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma2445; ZVFH-NEXT: vfadd.vv v8, v8, v162446; ZVFH-NEXT: ret2447;2448; ZVFHMIN-LABEL: vfadd_vv_nxv32f16_unmasked:2449; ZVFHMIN: # %bb.0:2450; ZVFHMIN-NEXT: addi sp, sp, -162451; ZVFHMIN-NEXT: .cfi_def_cfa_offset 162452; ZVFHMIN-NEXT: csrr a1, vlenb2453; ZVFHMIN-NEXT: slli a1, a1, 32454; ZVFHMIN-NEXT: sub sp, sp, a12455; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb2456; ZVFHMIN-NEXT: csrr a2, vlenb2457; ZVFHMIN-NEXT: vsetvli a1, zero, e8, m4, ta, ma2458; ZVFHMIN-NEXT: vmset.m v242459; ZVFHMIN-NEXT: slli a1, a2, 12460; ZVFHMIN-NEXT: srli a2, a2, 22461; ZVFHMIN-NEXT: sub a3, a0, a12462; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma2463; ZVFHMIN-NEXT: vslidedown.vx v0, v24, a22464; ZVFHMIN-NEXT: sltu a2, a0, a32465; ZVFHMIN-NEXT: addi a2, a2, -12466; ZVFHMIN-NEXT: and a2, a2, a32467; ZVFHMIN-NEXT: addi a3, sp, 162468; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill2469; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma2470; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t2471; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t2472; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2473; ZVFHMIN-NEXT: vfadd.vv v16, v16, v24, v0.t2474; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2475; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16, v0.t2476; ZVFHMIN-NEXT: bltu a0, a1, .LBB49_22477; ZVFHMIN-NEXT: # %bb.1:2478; ZVFHMIN-NEXT: mv a0, a12479; ZVFHMIN-NEXT: .LBB49_2:2480; ZVFHMIN-NEXT: addi a1, sp, 162481; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload2482; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2483; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v242484; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v82485; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2486; ZVFHMIN-NEXT: vfadd.vv v16, v24, v162487; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2488; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v162489; ZVFHMIN-NEXT: csrr a0, vlenb2490; ZVFHMIN-NEXT: slli a0, a0, 32491; ZVFHMIN-NEXT: add sp, sp, a02492; ZVFHMIN-NEXT: .cfi_def_cfa sp, 162493; ZVFHMIN-NEXT: addi sp, sp, 162494; ZVFHMIN-NEXT: .cfi_def_cfa_offset 02495; ZVFHMIN-NEXT: ret2496;2497; ZVFBFA-LABEL: vfadd_vv_nxv32f16_unmasked:2498; ZVFBFA: # %bb.0:2499; ZVFBFA-NEXT: addi sp, sp, -162500; ZVFBFA-NEXT: .cfi_def_cfa_offset 162501; ZVFBFA-NEXT: csrr a1, vlenb2502; ZVFBFA-NEXT: slli a1, a1, 32503; ZVFBFA-NEXT: sub sp, sp, a12504; ZVFBFA-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb2505; ZVFBFA-NEXT: csrr a2, vlenb2506; ZVFBFA-NEXT: vsetvli a1, zero, e8, m4, ta, ma2507; ZVFBFA-NEXT: vmset.m v242508; ZVFBFA-NEXT: slli a1, a2, 12509; ZVFBFA-NEXT: srli a2, a2, 22510; ZVFBFA-NEXT: sub a3, a0, a12511; ZVFBFA-NEXT: vsetvli a4, zero, e8, mf2, ta, ma2512; ZVFBFA-NEXT: vslidedown.vx v0, v24, a22513; ZVFBFA-NEXT: sltu a2, a0, a32514; ZVFBFA-NEXT: addi a2, a2, -12515; ZVFBFA-NEXT: and a2, a2, a32516; ZVFBFA-NEXT: addi a3, sp, 162517; ZVFBFA-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill2518; ZVFBFA-NEXT: vsetvli zero, a2, e16, m4, ta, ma2519; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v20, v0.t2520; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v12, v0.t2521; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma2522; ZVFBFA-NEXT: vfadd.vv v16, v16, v24, v0.t2523; ZVFBFA-NEXT: vsetvli zero, zero, e16, m4, ta, ma2524; ZVFBFA-NEXT: vfncvt.f.f.w v12, v16, v0.t2525; ZVFBFA-NEXT: bltu a0, a1, .LBB49_22526; ZVFBFA-NEXT: # %bb.1:2527; ZVFBFA-NEXT: mv a0, a12528; ZVFBFA-NEXT: .LBB49_2:2529; ZVFBFA-NEXT: addi a1, sp, 162530; ZVFBFA-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload2531; ZVFBFA-NEXT: vsetvli zero, a0, e16, m4, ta, ma2532; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v242533; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v82534; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma2535; ZVFBFA-NEXT: vfadd.vv v16, v24, v162536; ZVFBFA-NEXT: vsetvli zero, zero, e16, m4, ta, ma2537; ZVFBFA-NEXT: vfncvt.f.f.w v8, v162538; ZVFBFA-NEXT: csrr a0, vlenb2539; ZVFBFA-NEXT: slli a0, a0, 32540; ZVFBFA-NEXT: add sp, sp, a02541; ZVFBFA-NEXT: .cfi_def_cfa sp, 162542; ZVFBFA-NEXT: addi sp, sp, 162543; ZVFBFA-NEXT: .cfi_def_cfa_offset 02544; ZVFBFA-NEXT: ret2545 %v = call <vscale x 32 x half> @llvm.vp.fadd.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)2546 ret <vscale x 32 x half> %v2547}2548 2549define <vscale x 32 x half> @vfadd_vf_nxv32f16(<vscale x 32 x half> %va, half %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {2550; ZVFH-LABEL: vfadd_vf_nxv32f16:2551; ZVFH: # %bb.0:2552; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma2553; ZVFH-NEXT: vfadd.vf v8, v8, fa0, v0.t2554; ZVFH-NEXT: ret2555;2556; ZVFHMIN-LABEL: vfadd_vf_nxv32f16:2557; ZVFHMIN: # %bb.0:2558; ZVFHMIN-NEXT: addi sp, sp, -162559; ZVFHMIN-NEXT: .cfi_def_cfa_offset 162560; ZVFHMIN-NEXT: csrr a1, vlenb2561; ZVFHMIN-NEXT: slli a1, a1, 42562; ZVFHMIN-NEXT: sub sp, sp, a12563; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb2564; ZVFHMIN-NEXT: vsetvli a1, zero, e16, m8, ta, ma2565; ZVFHMIN-NEXT: vmv1r.v v7, v02566; ZVFHMIN-NEXT: fmv.x.h a1, fa02567; ZVFHMIN-NEXT: csrr a2, vlenb2568; ZVFHMIN-NEXT: vmv.v.x v24, a12569; ZVFHMIN-NEXT: slli a1, a2, 12570; ZVFHMIN-NEXT: srli a2, a2, 22571; ZVFHMIN-NEXT: sub a3, a0, a12572; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma2573; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a22574; ZVFHMIN-NEXT: sltu a2, a0, a32575; ZVFHMIN-NEXT: addi a2, a2, -12576; ZVFHMIN-NEXT: and a2, a2, a32577; ZVFHMIN-NEXT: csrr a3, vlenb2578; ZVFHMIN-NEXT: slli a3, a3, 32579; ZVFHMIN-NEXT: add a3, sp, a32580; ZVFHMIN-NEXT: addi a3, a3, 162581; ZVFHMIN-NEXT: vs8r.v v24, (a3) # vscale x 64-byte Folded Spill2582; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma2583; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v28, v0.t2584; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t2585; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2586; ZVFHMIN-NEXT: vfadd.vv v16, v24, v16, v0.t2587; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2588; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16, v0.t2589; ZVFHMIN-NEXT: bltu a0, a1, .LBB50_22590; ZVFHMIN-NEXT: # %bb.1:2591; ZVFHMIN-NEXT: mv a0, a12592; ZVFHMIN-NEXT: .LBB50_2:2593; ZVFHMIN-NEXT: vmv1r.v v0, v72594; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2595; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t2596; ZVFHMIN-NEXT: addi a0, sp, 162597; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill2598; ZVFHMIN-NEXT: csrr a0, vlenb2599; ZVFHMIN-NEXT: slli a0, a0, 32600; ZVFHMIN-NEXT: add a0, sp, a02601; ZVFHMIN-NEXT: addi a0, a0, 162602; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload2603; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t2604; ZVFHMIN-NEXT: addi a0, sp, 162605; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload2606; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2607; ZVFHMIN-NEXT: vfadd.vv v16, v16, v24, v0.t2608; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2609; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t2610; ZVFHMIN-NEXT: csrr a0, vlenb2611; ZVFHMIN-NEXT: slli a0, a0, 42612; ZVFHMIN-NEXT: add sp, sp, a02613; ZVFHMIN-NEXT: .cfi_def_cfa sp, 162614; ZVFHMIN-NEXT: addi sp, sp, 162615; ZVFHMIN-NEXT: .cfi_def_cfa_offset 02616; ZVFHMIN-NEXT: ret2617;2618; ZVFBFA-LABEL: vfadd_vf_nxv32f16:2619; ZVFBFA: # %bb.0:2620; ZVFBFA-NEXT: addi sp, sp, -162621; ZVFBFA-NEXT: .cfi_def_cfa_offset 162622; ZVFBFA-NEXT: csrr a1, vlenb2623; ZVFBFA-NEXT: slli a1, a1, 42624; ZVFBFA-NEXT: sub sp, sp, a12625; ZVFBFA-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 16 * vlenb2626; ZVFBFA-NEXT: vsetvli a1, zero, e16, m8, ta, ma2627; ZVFBFA-NEXT: vmv1r.v v7, v02628; ZVFBFA-NEXT: fmv.x.w a1, fa02629; ZVFBFA-NEXT: csrr a2, vlenb2630; ZVFBFA-NEXT: vmv.v.x v24, a12631; ZVFBFA-NEXT: slli a1, a2, 12632; ZVFBFA-NEXT: srli a2, a2, 22633; ZVFBFA-NEXT: sub a3, a0, a12634; ZVFBFA-NEXT: vsetvli a4, zero, e8, mf2, ta, ma2635; ZVFBFA-NEXT: vslidedown.vx v0, v0, a22636; ZVFBFA-NEXT: sltu a2, a0, a32637; ZVFBFA-NEXT: addi a2, a2, -12638; ZVFBFA-NEXT: and a2, a2, a32639; ZVFBFA-NEXT: csrr a3, vlenb2640; ZVFBFA-NEXT: slli a3, a3, 32641; ZVFBFA-NEXT: add a3, sp, a32642; ZVFBFA-NEXT: addi a3, a3, 162643; ZVFBFA-NEXT: vs8r.v v24, (a3) # vscale x 64-byte Folded Spill2644; ZVFBFA-NEXT: vsetvli zero, a2, e16, m4, ta, ma2645; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v28, v0.t2646; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v12, v0.t2647; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma2648; ZVFBFA-NEXT: vfadd.vv v16, v24, v16, v0.t2649; ZVFBFA-NEXT: vsetvli zero, zero, e16, m4, ta, ma2650; ZVFBFA-NEXT: vfncvt.f.f.w v12, v16, v0.t2651; ZVFBFA-NEXT: bltu a0, a1, .LBB50_22652; ZVFBFA-NEXT: # %bb.1:2653; ZVFBFA-NEXT: mv a0, a12654; ZVFBFA-NEXT: .LBB50_2:2655; ZVFBFA-NEXT: vmv1r.v v0, v72656; ZVFBFA-NEXT: vsetvli zero, a0, e16, m4, ta, ma2657; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v8, v0.t2658; ZVFBFA-NEXT: addi a0, sp, 162659; ZVFBFA-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill2660; ZVFBFA-NEXT: csrr a0, vlenb2661; ZVFBFA-NEXT: slli a0, a0, 32662; ZVFBFA-NEXT: add a0, sp, a02663; ZVFBFA-NEXT: addi a0, a0, 162664; ZVFBFA-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload2665; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v16, v0.t2666; ZVFBFA-NEXT: addi a0, sp, 162667; ZVFBFA-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload2668; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma2669; ZVFBFA-NEXT: vfadd.vv v16, v16, v24, v0.t2670; ZVFBFA-NEXT: vsetvli zero, zero, e16, m4, ta, ma2671; ZVFBFA-NEXT: vfncvt.f.f.w v8, v16, v0.t2672; ZVFBFA-NEXT: csrr a0, vlenb2673; ZVFBFA-NEXT: slli a0, a0, 42674; ZVFBFA-NEXT: add sp, sp, a02675; ZVFBFA-NEXT: .cfi_def_cfa sp, 162676; ZVFBFA-NEXT: addi sp, sp, 162677; ZVFBFA-NEXT: .cfi_def_cfa_offset 02678; ZVFBFA-NEXT: ret2679 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 02680 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer2681 %v = call <vscale x 32 x half> @llvm.vp.fadd.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 %evl)2682 ret <vscale x 32 x half> %v2683}2684 2685define <vscale x 32 x half> @vfadd_vf_nxv32f16_unmasked(<vscale x 32 x half> %va, half %b, i32 zeroext %evl) {2686; ZVFH-LABEL: vfadd_vf_nxv32f16_unmasked:2687; ZVFH: # %bb.0:2688; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma2689; ZVFH-NEXT: vfadd.vf v8, v8, fa02690; ZVFH-NEXT: ret2691;2692; ZVFHMIN-LABEL: vfadd_vf_nxv32f16_unmasked:2693; ZVFHMIN: # %bb.0:2694; ZVFHMIN-NEXT: addi sp, sp, -162695; ZVFHMIN-NEXT: .cfi_def_cfa_offset 162696; ZVFHMIN-NEXT: csrr a1, vlenb2697; ZVFHMIN-NEXT: slli a1, a1, 32698; ZVFHMIN-NEXT: sub sp, sp, a12699; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb2700; ZVFHMIN-NEXT: fmv.x.h a1, fa02701; ZVFHMIN-NEXT: csrr a2, vlenb2702; ZVFHMIN-NEXT: vsetvli a3, zero, e16, m8, ta, ma2703; ZVFHMIN-NEXT: vmset.m v242704; ZVFHMIN-NEXT: vmv.v.x v16, a12705; ZVFHMIN-NEXT: slli a1, a2, 12706; ZVFHMIN-NEXT: srli a2, a2, 22707; ZVFHMIN-NEXT: sub a3, a0, a12708; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma2709; ZVFHMIN-NEXT: vslidedown.vx v0, v24, a22710; ZVFHMIN-NEXT: sltu a2, a0, a32711; ZVFHMIN-NEXT: addi a2, a2, -12712; ZVFHMIN-NEXT: and a2, a2, a32713; ZVFHMIN-NEXT: addi a3, sp, 162714; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill2715; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma2716; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t2717; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t2718; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2719; ZVFHMIN-NEXT: vfadd.vv v16, v16, v24, v0.t2720; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2721; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16, v0.t2722; ZVFHMIN-NEXT: bltu a0, a1, .LBB51_22723; ZVFHMIN-NEXT: # %bb.1:2724; ZVFHMIN-NEXT: mv a0, a12725; ZVFHMIN-NEXT: .LBB51_2:2726; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2727; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v82728; ZVFHMIN-NEXT: addi a0, sp, 162729; ZVFHMIN-NEXT: vl8r.v v0, (a0) # vscale x 64-byte Folded Reload2730; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v02731; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2732; ZVFHMIN-NEXT: vfadd.vv v16, v16, v242733; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2734; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v162735; ZVFHMIN-NEXT: csrr a0, vlenb2736; ZVFHMIN-NEXT: slli a0, a0, 32737; ZVFHMIN-NEXT: add sp, sp, a02738; ZVFHMIN-NEXT: .cfi_def_cfa sp, 162739; ZVFHMIN-NEXT: addi sp, sp, 162740; ZVFHMIN-NEXT: .cfi_def_cfa_offset 02741; ZVFHMIN-NEXT: ret2742;2743; ZVFBFA-LABEL: vfadd_vf_nxv32f16_unmasked:2744; ZVFBFA: # %bb.0:2745; ZVFBFA-NEXT: addi sp, sp, -162746; ZVFBFA-NEXT: .cfi_def_cfa_offset 162747; ZVFBFA-NEXT: csrr a1, vlenb2748; ZVFBFA-NEXT: slli a1, a1, 32749; ZVFBFA-NEXT: sub sp, sp, a12750; ZVFBFA-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb2751; ZVFBFA-NEXT: fmv.x.w a1, fa02752; ZVFBFA-NEXT: csrr a2, vlenb2753; ZVFBFA-NEXT: vsetvli a3, zero, e16, m8, ta, ma2754; ZVFBFA-NEXT: vmset.m v242755; ZVFBFA-NEXT: vmv.v.x v16, a12756; ZVFBFA-NEXT: slli a1, a2, 12757; ZVFBFA-NEXT: srli a2, a2, 22758; ZVFBFA-NEXT: sub a3, a0, a12759; ZVFBFA-NEXT: vsetvli a4, zero, e8, mf2, ta, ma2760; ZVFBFA-NEXT: vslidedown.vx v0, v24, a22761; ZVFBFA-NEXT: sltu a2, a0, a32762; ZVFBFA-NEXT: addi a2, a2, -12763; ZVFBFA-NEXT: and a2, a2, a32764; ZVFBFA-NEXT: addi a3, sp, 162765; ZVFBFA-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill2766; ZVFBFA-NEXT: vsetvli zero, a2, e16, m4, ta, ma2767; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v20, v0.t2768; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v12, v0.t2769; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma2770; ZVFBFA-NEXT: vfadd.vv v16, v16, v24, v0.t2771; ZVFBFA-NEXT: vsetvli zero, zero, e16, m4, ta, ma2772; ZVFBFA-NEXT: vfncvt.f.f.w v12, v16, v0.t2773; ZVFBFA-NEXT: bltu a0, a1, .LBB51_22774; ZVFBFA-NEXT: # %bb.1:2775; ZVFBFA-NEXT: mv a0, a12776; ZVFBFA-NEXT: .LBB51_2:2777; ZVFBFA-NEXT: vsetvli zero, a0, e16, m4, ta, ma2778; ZVFBFA-NEXT: vfwcvt.f.f.v v16, v82779; ZVFBFA-NEXT: addi a0, sp, 162780; ZVFBFA-NEXT: vl8r.v v0, (a0) # vscale x 64-byte Folded Reload2781; ZVFBFA-NEXT: vfwcvt.f.f.v v24, v02782; ZVFBFA-NEXT: vsetvli zero, zero, e32, m8, ta, ma2783; ZVFBFA-NEXT: vfadd.vv v16, v16, v242784; ZVFBFA-NEXT: vsetvli zero, zero, e16, m4, ta, ma2785; ZVFBFA-NEXT: vfncvt.f.f.w v8, v162786; ZVFBFA-NEXT: csrr a0, vlenb2787; ZVFBFA-NEXT: slli a0, a0, 32788; ZVFBFA-NEXT: add sp, sp, a02789; ZVFBFA-NEXT: .cfi_def_cfa sp, 162790; ZVFBFA-NEXT: addi sp, sp, 162791; ZVFBFA-NEXT: .cfi_def_cfa_offset 02792; ZVFBFA-NEXT: ret2793 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 02794 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer2795 %v = call <vscale x 32 x half> @llvm.vp.fadd.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)2796 ret <vscale x 32 x half> %v2797}2798 2799define <vscale x 1 x float> @vfadd_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2800; CHECK-LABEL: vfadd_vv_nxv1f32:2801; CHECK: # %bb.0:2802; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma2803; CHECK-NEXT: vfadd.vv v8, v8, v9, v0.t2804; CHECK-NEXT: ret2805 %v = call <vscale x 1 x float> @llvm.vp.fadd.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)2806 ret <vscale x 1 x float> %v2807}2808 2809define <vscale x 1 x float> @vfadd_vv_nxv1f32_unmasked(<vscale x 1 x float> %va, <vscale x 1 x float> %b, i32 zeroext %evl) {2810; CHECK-LABEL: vfadd_vv_nxv1f32_unmasked:2811; CHECK: # %bb.0:2812; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma2813; CHECK-NEXT: vfadd.vv v8, v8, v92814; CHECK-NEXT: ret2815 %v = call <vscale x 1 x float> @llvm.vp.fadd.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)2816 ret <vscale x 1 x float> %v2817}2818 2819define <vscale x 1 x float> @vfadd_vf_nxv1f32(<vscale x 1 x float> %va, float %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {2820; CHECK-LABEL: vfadd_vf_nxv1f32:2821; CHECK: # %bb.0:2822; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma2823; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t2824; CHECK-NEXT: ret2825 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 02826 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer2827 %v = call <vscale x 1 x float> @llvm.vp.fadd.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)2828 ret <vscale x 1 x float> %v2829}2830 2831define <vscale x 1 x float> @vfadd_vf_nxv1f32_unmasked(<vscale x 1 x float> %va, float %b, i32 zeroext %evl) {2832; CHECK-LABEL: vfadd_vf_nxv1f32_unmasked:2833; CHECK: # %bb.0:2834; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma2835; CHECK-NEXT: vfadd.vf v8, v8, fa02836; CHECK-NEXT: ret2837 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 02838 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer2839 %v = call <vscale x 1 x float> @llvm.vp.fadd.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)2840 ret <vscale x 1 x float> %v2841}2842 2843define <vscale x 2 x float> @vfadd_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {2844; CHECK-LABEL: vfadd_vv_nxv2f32:2845; CHECK: # %bb.0:2846; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma2847; CHECK-NEXT: vfadd.vv v8, v8, v9, v0.t2848; CHECK-NEXT: ret2849 %v = call <vscale x 2 x float> @llvm.vp.fadd.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)2850 ret <vscale x 2 x float> %v2851}2852 2853define <vscale x 2 x float> @vfadd_vv_nxv2f32_unmasked(<vscale x 2 x float> %va, <vscale x 2 x float> %b, i32 zeroext %evl) {2854; CHECK-LABEL: vfadd_vv_nxv2f32_unmasked:2855; CHECK: # %bb.0:2856; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma2857; CHECK-NEXT: vfadd.vv v8, v8, v92858; CHECK-NEXT: ret2859 %v = call <vscale x 2 x float> @llvm.vp.fadd.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)2860 ret <vscale x 2 x float> %v2861}2862 2863define <vscale x 2 x float> @vfadd_vf_nxv2f32(<vscale x 2 x float> %va, float %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {2864; CHECK-LABEL: vfadd_vf_nxv2f32:2865; CHECK: # %bb.0:2866; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma2867; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t2868; CHECK-NEXT: ret2869 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 02870 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer2871 %v = call <vscale x 2 x float> @llvm.vp.fadd.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)2872 ret <vscale x 2 x float> %v2873}2874 2875define <vscale x 2 x float> @vfadd_vf_nxv2f32_unmasked(<vscale x 2 x float> %va, float %b, i32 zeroext %evl) {2876; CHECK-LABEL: vfadd_vf_nxv2f32_unmasked:2877; CHECK: # %bb.0:2878; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma2879; CHECK-NEXT: vfadd.vf v8, v8, fa02880; CHECK-NEXT: ret2881 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 02882 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer2883 %v = call <vscale x 2 x float> @llvm.vp.fadd.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)2884 ret <vscale x 2 x float> %v2885}2886 2887define <vscale x 4 x float> @vfadd_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {2888; CHECK-LABEL: vfadd_vv_nxv4f32:2889; CHECK: # %bb.0:2890; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma2891; CHECK-NEXT: vfadd.vv v8, v8, v10, v0.t2892; CHECK-NEXT: ret2893 %v = call <vscale x 4 x float> @llvm.vp.fadd.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)2894 ret <vscale x 4 x float> %v2895}2896 2897define <vscale x 4 x float> @vfadd_vv_nxv4f32_unmasked(<vscale x 4 x float> %va, <vscale x 4 x float> %b, i32 zeroext %evl) {2898; CHECK-LABEL: vfadd_vv_nxv4f32_unmasked:2899; CHECK: # %bb.0:2900; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma2901; CHECK-NEXT: vfadd.vv v8, v8, v102902; CHECK-NEXT: ret2903 %v = call <vscale x 4 x float> @llvm.vp.fadd.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)2904 ret <vscale x 4 x float> %v2905}2906 2907define <vscale x 4 x float> @vfadd_vf_nxv4f32(<vscale x 4 x float> %va, float %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {2908; CHECK-LABEL: vfadd_vf_nxv4f32:2909; CHECK: # %bb.0:2910; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma2911; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t2912; CHECK-NEXT: ret2913 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 02914 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer2915 %v = call <vscale x 4 x float> @llvm.vp.fadd.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)2916 ret <vscale x 4 x float> %v2917}2918 2919define <vscale x 4 x float> @vfadd_vf_nxv4f32_unmasked(<vscale x 4 x float> %va, float %b, i32 zeroext %evl) {2920; CHECK-LABEL: vfadd_vf_nxv4f32_unmasked:2921; CHECK: # %bb.0:2922; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma2923; CHECK-NEXT: vfadd.vf v8, v8, fa02924; CHECK-NEXT: ret2925 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 02926 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer2927 %v = call <vscale x 4 x float> @llvm.vp.fadd.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)2928 ret <vscale x 4 x float> %v2929}2930 2931define <vscale x 8 x float> @vfadd_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {2932; CHECK-LABEL: vfadd_vv_nxv8f32:2933; CHECK: # %bb.0:2934; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma2935; CHECK-NEXT: vfadd.vv v8, v8, v12, v0.t2936; CHECK-NEXT: ret2937 %v = call <vscale x 8 x float> @llvm.vp.fadd.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)2938 ret <vscale x 8 x float> %v2939}2940 2941define <vscale x 8 x float> @vfadd_vv_nxv8f32_unmasked(<vscale x 8 x float> %va, <vscale x 8 x float> %b, i32 zeroext %evl) {2942; CHECK-LABEL: vfadd_vv_nxv8f32_unmasked:2943; CHECK: # %bb.0:2944; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma2945; CHECK-NEXT: vfadd.vv v8, v8, v122946; CHECK-NEXT: ret2947 %v = call <vscale x 8 x float> @llvm.vp.fadd.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)2948 ret <vscale x 8 x float> %v2949}2950 2951define <vscale x 8 x float> @vfadd_vf_nxv8f32(<vscale x 8 x float> %va, float %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {2952; CHECK-LABEL: vfadd_vf_nxv8f32:2953; CHECK: # %bb.0:2954; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma2955; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t2956; CHECK-NEXT: ret2957 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 02958 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer2959 %v = call <vscale x 8 x float> @llvm.vp.fadd.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)2960 ret <vscale x 8 x float> %v2961}2962 2963define <vscale x 8 x float> @vfadd_vf_nxv8f32_unmasked(<vscale x 8 x float> %va, float %b, i32 zeroext %evl) {2964; CHECK-LABEL: vfadd_vf_nxv8f32_unmasked:2965; CHECK: # %bb.0:2966; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma2967; CHECK-NEXT: vfadd.vf v8, v8, fa02968; CHECK-NEXT: ret2969 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 02970 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer2971 %v = call <vscale x 8 x float> @llvm.vp.fadd.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)2972 ret <vscale x 8 x float> %v2973}2974 2975define <vscale x 16 x float> @vfadd_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {2976; CHECK-LABEL: vfadd_vv_nxv16f32:2977; CHECK: # %bb.0:2978; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma2979; CHECK-NEXT: vfadd.vv v8, v8, v16, v0.t2980; CHECK-NEXT: ret2981 %v = call <vscale x 16 x float> @llvm.vp.fadd.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x i1> %m, i32 %evl)2982 ret <vscale x 16 x float> %v2983}2984 2985define <vscale x 16 x float> @vfadd_vv_nxv16f32_unmasked(<vscale x 16 x float> %va, <vscale x 16 x float> %b, i32 zeroext %evl) {2986; CHECK-LABEL: vfadd_vv_nxv16f32_unmasked:2987; CHECK: # %bb.0:2988; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma2989; CHECK-NEXT: vfadd.vv v8, v8, v162990; CHECK-NEXT: ret2991 %v = call <vscale x 16 x float> @llvm.vp.fadd.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)2992 ret <vscale x 16 x float> %v2993}2994 2995define <vscale x 16 x float> @vfadd_vf_nxv16f32(<vscale x 16 x float> %va, float %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {2996; CHECK-LABEL: vfadd_vf_nxv16f32:2997; CHECK: # %bb.0:2998; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma2999; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t3000; CHECK-NEXT: ret3001 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 03002 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer3003 %v = call <vscale x 16 x float> @llvm.vp.fadd.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 %evl)3004 ret <vscale x 16 x float> %v3005}3006 3007define <vscale x 16 x float> @vfadd_vf_nxv16f32_unmasked(<vscale x 16 x float> %va, float %b, i32 zeroext %evl) {3008; CHECK-LABEL: vfadd_vf_nxv16f32_unmasked:3009; CHECK: # %bb.0:3010; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma3011; CHECK-NEXT: vfadd.vf v8, v8, fa03012; CHECK-NEXT: ret3013 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 03014 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer3015 %v = call <vscale x 16 x float> @llvm.vp.fadd.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)3016 ret <vscale x 16 x float> %v3017}3018 3019define <vscale x 1 x double> @vfadd_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {3020; CHECK-LABEL: vfadd_vv_nxv1f64:3021; CHECK: # %bb.0:3022; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma3023; CHECK-NEXT: vfadd.vv v8, v8, v9, v0.t3024; CHECK-NEXT: ret3025 %v = call <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %evl)3026 ret <vscale x 1 x double> %v3027}3028 3029define <vscale x 1 x double> @vfadd_vv_nxv1f64_unmasked(<vscale x 1 x double> %va, <vscale x 1 x double> %b, i32 zeroext %evl) {3030; CHECK-LABEL: vfadd_vv_nxv1f64_unmasked:3031; CHECK: # %bb.0:3032; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma3033; CHECK-NEXT: vfadd.vv v8, v8, v93034; CHECK-NEXT: ret3035 %v = call <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)3036 ret <vscale x 1 x double> %v3037}3038 3039define <vscale x 1 x double> @vfadd_vf_nxv1f64(<vscale x 1 x double> %va, double %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {3040; CHECK-LABEL: vfadd_vf_nxv1f64:3041; CHECK: # %bb.0:3042; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma3043; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t3044; CHECK-NEXT: ret3045 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 03046 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer3047 %v = call <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 %evl)3048 ret <vscale x 1 x double> %v3049}3050 3051define <vscale x 1 x double> @vfadd_vf_nxv1f64_unmasked(<vscale x 1 x double> %va, double %b, i32 zeroext %evl) {3052; CHECK-LABEL: vfadd_vf_nxv1f64_unmasked:3053; CHECK: # %bb.0:3054; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma3055; CHECK-NEXT: vfadd.vf v8, v8, fa03056; CHECK-NEXT: ret3057 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 03058 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer3059 %v = call <vscale x 1 x double> @llvm.vp.fadd.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)3060 ret <vscale x 1 x double> %v3061}3062 3063define <vscale x 2 x double> @vfadd_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {3064; CHECK-LABEL: vfadd_vv_nxv2f64:3065; CHECK: # %bb.0:3066; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma3067; CHECK-NEXT: vfadd.vv v8, v8, v10, v0.t3068; CHECK-NEXT: ret3069 %v = call <vscale x 2 x double> @llvm.vp.fadd.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x i1> %m, i32 %evl)3070 ret <vscale x 2 x double> %v3071}3072 3073define <vscale x 2 x double> @vfadd_vv_nxv2f64_unmasked(<vscale x 2 x double> %va, <vscale x 2 x double> %b, i32 zeroext %evl) {3074; CHECK-LABEL: vfadd_vv_nxv2f64_unmasked:3075; CHECK: # %bb.0:3076; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma3077; CHECK-NEXT: vfadd.vv v8, v8, v103078; CHECK-NEXT: ret3079 %v = call <vscale x 2 x double> @llvm.vp.fadd.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)3080 ret <vscale x 2 x double> %v3081}3082 3083define <vscale x 2 x double> @vfadd_vf_nxv2f64(<vscale x 2 x double> %va, double %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {3084; CHECK-LABEL: vfadd_vf_nxv2f64:3085; CHECK: # %bb.0:3086; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma3087; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t3088; CHECK-NEXT: ret3089 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 03090 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer3091 %v = call <vscale x 2 x double> @llvm.vp.fadd.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 %evl)3092 ret <vscale x 2 x double> %v3093}3094 3095define <vscale x 2 x double> @vfadd_vf_nxv2f64_unmasked(<vscale x 2 x double> %va, double %b, i32 zeroext %evl) {3096; CHECK-LABEL: vfadd_vf_nxv2f64_unmasked:3097; CHECK: # %bb.0:3098; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma3099; CHECK-NEXT: vfadd.vf v8, v8, fa03100; CHECK-NEXT: ret3101 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 03102 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer3103 %v = call <vscale x 2 x double> @llvm.vp.fadd.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)3104 ret <vscale x 2 x double> %v3105}3106 3107define <vscale x 4 x double> @vfadd_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {3108; CHECK-LABEL: vfadd_vv_nxv4f64:3109; CHECK: # %bb.0:3110; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma3111; CHECK-NEXT: vfadd.vv v8, v8, v12, v0.t3112; CHECK-NEXT: ret3113 %v = call <vscale x 4 x double> @llvm.vp.fadd.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x i1> %m, i32 %evl)3114 ret <vscale x 4 x double> %v3115}3116 3117define <vscale x 4 x double> @vfadd_vv_nxv4f64_unmasked(<vscale x 4 x double> %va, <vscale x 4 x double> %b, i32 zeroext %evl) {3118; CHECK-LABEL: vfadd_vv_nxv4f64_unmasked:3119; CHECK: # %bb.0:3120; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma3121; CHECK-NEXT: vfadd.vv v8, v8, v123122; CHECK-NEXT: ret3123 %v = call <vscale x 4 x double> @llvm.vp.fadd.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)3124 ret <vscale x 4 x double> %v3125}3126 3127define <vscale x 4 x double> @vfadd_vf_nxv4f64(<vscale x 4 x double> %va, double %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {3128; CHECK-LABEL: vfadd_vf_nxv4f64:3129; CHECK: # %bb.0:3130; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma3131; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t3132; CHECK-NEXT: ret3133 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 03134 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer3135 %v = call <vscale x 4 x double> @llvm.vp.fadd.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 %evl)3136 ret <vscale x 4 x double> %v3137}3138 3139define <vscale x 4 x double> @vfadd_vf_nxv4f64_unmasked(<vscale x 4 x double> %va, double %b, i32 zeroext %evl) {3140; CHECK-LABEL: vfadd_vf_nxv4f64_unmasked:3141; CHECK: # %bb.0:3142; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma3143; CHECK-NEXT: vfadd.vf v8, v8, fa03144; CHECK-NEXT: ret3145 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 03146 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer3147 %v = call <vscale x 4 x double> @llvm.vp.fadd.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)3148 ret <vscale x 4 x double> %v3149}3150 3151define <vscale x 7 x double> @vfadd_vv_nxv7f64(<vscale x 7 x double> %va, <vscale x 7 x double> %b, <vscale x 7 x i1> %m, i32 zeroext %evl) {3152; CHECK-LABEL: vfadd_vv_nxv7f64:3153; CHECK: # %bb.0:3154; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma3155; CHECK-NEXT: vfadd.vv v8, v8, v16, v0.t3156; CHECK-NEXT: ret3157 %v = call <vscale x 7 x double> @llvm.vp.fadd.nxv7f64(<vscale x 7 x double> %va, <vscale x 7 x double> %b, <vscale x 7 x i1> %m, i32 %evl)3158 ret <vscale x 7 x double> %v3159}3160 3161define <vscale x 8 x double> @vfadd_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3162; CHECK-LABEL: vfadd_vv_nxv8f64:3163; CHECK: # %bb.0:3164; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma3165; CHECK-NEXT: vfadd.vv v8, v8, v16, v0.t3166; CHECK-NEXT: ret3167 %v = call <vscale x 8 x double> @llvm.vp.fadd.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x i1> %m, i32 %evl)3168 ret <vscale x 8 x double> %v3169}3170 3171define <vscale x 8 x double> @vfadd_vv_nxv8f64_unmasked(<vscale x 8 x double> %va, <vscale x 8 x double> %b, i32 zeroext %evl) {3172; CHECK-LABEL: vfadd_vv_nxv8f64_unmasked:3173; CHECK: # %bb.0:3174; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma3175; CHECK-NEXT: vfadd.vv v8, v8, v163176; CHECK-NEXT: ret3177 %v = call <vscale x 8 x double> @llvm.vp.fadd.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)3178 ret <vscale x 8 x double> %v3179}3180 3181define <vscale x 8 x double> @vfadd_vf_nxv8f64(<vscale x 8 x double> %va, double %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {3182; CHECK-LABEL: vfadd_vf_nxv8f64:3183; CHECK: # %bb.0:3184; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma3185; CHECK-NEXT: vfadd.vf v8, v8, fa0, v0.t3186; CHECK-NEXT: ret3187 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 03188 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer3189 %v = call <vscale x 8 x double> @llvm.vp.fadd.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 %evl)3190 ret <vscale x 8 x double> %v3191}3192 3193define <vscale x 8 x double> @vfadd_vf_nxv8f64_unmasked(<vscale x 8 x double> %va, double %b, i32 zeroext %evl) {3194; CHECK-LABEL: vfadd_vf_nxv8f64_unmasked:3195; CHECK: # %bb.0:3196; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma3197; CHECK-NEXT: vfadd.vf v8, v8, fa03198; CHECK-NEXT: ret3199 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 03200 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer3201 %v = call <vscale x 8 x double> @llvm.vp.fadd.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)3202 ret <vscale x 8 x double> %v3203}3204