15312 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \3; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \4; RUN: --check-prefixes=CHECK,ZVFH5; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+zfbfmin,+zvfbfmin,+v \6; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \7; RUN: --check-prefixes=CHECK,ZVFH8; RUN: llc -mtriple=riscv32 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \9; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s \10; RUN: --check-prefixes=CHECK,ZVFHMIN11; RUN: llc -mtriple=riscv64 -mattr=+d,+zfhmin,+zvfhmin,+zfbfmin,+zvfbfmin,+v \12; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s \13; RUN: --check-prefixes=CHECK,ZVFHMIN14 15define <vscale x 1 x bfloat> @vfma_vv_nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x bfloat> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {16; CHECK-LABEL: vfma_vv_nxv1bf16:17; CHECK: # %bb.0:18; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma19; CHECK-NEXT: vfwcvtbf16.f.f.v v11, v10, v0.t20; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t21; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v9, v0.t22; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma23; CHECK-NEXT: vfmadd.vv v12, v10, v11, v0.t24; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma25; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12, v0.t26; CHECK-NEXT: ret27 %v = call <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x bfloat> %c, <vscale x 1 x i1> %m, i32 %evl)28 ret <vscale x 1 x bfloat> %v29}30 31define <vscale x 1 x bfloat> @vfma_vv_nxv1bf16_unmasked(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x bfloat> %c, i32 zeroext %evl) {32; CHECK-LABEL: vfma_vv_nxv1bf16_unmasked:33; CHECK: # %bb.0:34; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma35; CHECK-NEXT: vfwcvtbf16.f.f.v v11, v1036; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v837; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v938; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma39; CHECK-NEXT: vfmadd.vv v12, v10, v1140; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma41; CHECK-NEXT: vfncvtbf16.f.f.w v8, v1242; CHECK-NEXT: ret43 %v = call <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %b, <vscale x 1 x bfloat> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)44 ret <vscale x 1 x bfloat> %v45}46 47define <vscale x 1 x bfloat> @vfma_vf_nxv1bf16(<vscale x 1 x bfloat> %va, bfloat %b, <vscale x 1 x bfloat> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {48; CHECK-LABEL: vfma_vf_nxv1bf16:49; CHECK: # %bb.0:50; CHECK-NEXT: fmv.x.h a1, fa051; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma52; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t53; CHECK-NEXT: vmv.v.x v9, a154; CHECK-NEXT: vfwcvtbf16.f.f.v v11, v8, v0.t55; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v9, v0.t56; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma57; CHECK-NEXT: vfmadd.vv v12, v11, v10, v0.t58; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma59; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12, v0.t60; CHECK-NEXT: ret61 %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 062 %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer63 %v = call <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vb, <vscale x 1 x bfloat> %vc, <vscale x 1 x i1> %m, i32 %evl)64 ret <vscale x 1 x bfloat> %v65}66 67define <vscale x 1 x bfloat> @vfma_vf_nxv1bf16_commute(<vscale x 1 x bfloat> %va, bfloat %b, <vscale x 1 x bfloat> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {68; CHECK-LABEL: vfma_vf_nxv1bf16_commute:69; CHECK: # %bb.0:70; CHECK-NEXT: fmv.x.h a1, fa071; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma72; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t73; CHECK-NEXT: vmv.v.x v9, a174; CHECK-NEXT: vfwcvtbf16.f.f.v v11, v8, v0.t75; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v9, v0.t76; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma77; CHECK-NEXT: vfmadd.vv v11, v8, v10, v0.t78; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma79; CHECK-NEXT: vfncvtbf16.f.f.w v8, v11, v0.t80; CHECK-NEXT: ret81 %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 082 %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer83 %v = call <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat> %vb, <vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vc, <vscale x 1 x i1> %m, i32 %evl)84 ret <vscale x 1 x bfloat> %v85}86 87define <vscale x 1 x bfloat> @vfma_vf_nxv1bf16_unmasked(<vscale x 1 x bfloat> %va, bfloat %b, <vscale x 1 x bfloat> %vc, i32 zeroext %evl) {88; CHECK-LABEL: vfma_vf_nxv1bf16_unmasked:89; CHECK: # %bb.0:90; CHECK-NEXT: fmv.x.h a1, fa091; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma92; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v993; CHECK-NEXT: vmv.v.x v9, a194; CHECK-NEXT: vfwcvtbf16.f.f.v v11, v895; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v996; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma97; CHECK-NEXT: vfmadd.vv v12, v11, v1098; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma99; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12100; CHECK-NEXT: ret101 %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 0102 %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer103 %v = call <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vb, <vscale x 1 x bfloat> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)104 ret <vscale x 1 x bfloat> %v105}106 107define <vscale x 1 x bfloat> @vfma_vf_nxv1bf16_unmasked_commute(<vscale x 1 x bfloat> %va, bfloat %b, <vscale x 1 x bfloat> %vc, i32 zeroext %evl) {108; CHECK-LABEL: vfma_vf_nxv1bf16_unmasked_commute:109; CHECK: # %bb.0:110; CHECK-NEXT: fmv.x.h a1, fa0111; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma112; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9113; CHECK-NEXT: vmv.v.x v9, a1114; CHECK-NEXT: vfwcvtbf16.f.f.v v11, v8115; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v9116; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma117; CHECK-NEXT: vfmadd.vv v12, v11, v10118; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma119; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12120; CHECK-NEXT: ret121 %elt.head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 0122 %vb = shufflevector <vscale x 1 x bfloat> %elt.head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer123 %v = call <vscale x 1 x bfloat> @llvm.vp.fma.nxv1bf16(<vscale x 1 x bfloat> %vb, <vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)124 ret <vscale x 1 x bfloat> %v125}126 127define <vscale x 2 x bfloat> @vfma_vv_nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x bfloat> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {128; CHECK-LABEL: vfma_vv_nxv2bf16:129; CHECK: # %bb.0:130; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma131; CHECK-NEXT: vfwcvtbf16.f.f.v v11, v10, v0.t132; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t133; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v9, v0.t134; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma135; CHECK-NEXT: vfmadd.vv v12, v10, v11, v0.t136; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma137; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12, v0.t138; CHECK-NEXT: ret139 %v = call <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x bfloat> %c, <vscale x 2 x i1> %m, i32 %evl)140 ret <vscale x 2 x bfloat> %v141}142 143define <vscale x 2 x bfloat> @vfma_vv_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x bfloat> %c, i32 zeroext %evl) {144; CHECK-LABEL: vfma_vv_nxv2bf16_unmasked:145; CHECK: # %bb.0:146; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma147; CHECK-NEXT: vfwcvtbf16.f.f.v v11, v10148; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8149; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v9150; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma151; CHECK-NEXT: vfmadd.vv v12, v10, v11152; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma153; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12154; CHECK-NEXT: ret155 %v = call <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %b, <vscale x 2 x bfloat> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)156 ret <vscale x 2 x bfloat> %v157}158 159define <vscale x 2 x bfloat> @vfma_vf_nxv2bf16(<vscale x 2 x bfloat> %va, bfloat %b, <vscale x 2 x bfloat> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {160; CHECK-LABEL: vfma_vf_nxv2bf16:161; CHECK: # %bb.0:162; CHECK-NEXT: fmv.x.h a1, fa0163; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma164; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t165; CHECK-NEXT: vmv.v.x v9, a1166; CHECK-NEXT: vfwcvtbf16.f.f.v v11, v8, v0.t167; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v9, v0.t168; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma169; CHECK-NEXT: vfmadd.vv v12, v11, v10, v0.t170; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma171; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12, v0.t172; CHECK-NEXT: ret173 %elt.head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0174 %vb = shufflevector <vscale x 2 x bfloat> %elt.head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer175 %v = call <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vb, <vscale x 2 x bfloat> %vc, <vscale x 2 x i1> %m, i32 %evl)176 ret <vscale x 2 x bfloat> %v177}178 179define <vscale x 2 x bfloat> @vfma_vf_nxv2bf16_commute(<vscale x 2 x bfloat> %va, bfloat %b, <vscale x 2 x bfloat> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {180; CHECK-LABEL: vfma_vf_nxv2bf16_commute:181; CHECK: # %bb.0:182; CHECK-NEXT: fmv.x.h a1, fa0183; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma184; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t185; CHECK-NEXT: vmv.v.x v9, a1186; CHECK-NEXT: vfwcvtbf16.f.f.v v11, v8, v0.t187; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v9, v0.t188; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma189; CHECK-NEXT: vfmadd.vv v11, v8, v10, v0.t190; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma191; CHECK-NEXT: vfncvtbf16.f.f.w v8, v11, v0.t192; CHECK-NEXT: ret193 %elt.head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0194 %vb = shufflevector <vscale x 2 x bfloat> %elt.head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer195 %v = call <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat> %vb, <vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vc, <vscale x 2 x i1> %m, i32 %evl)196 ret <vscale x 2 x bfloat> %v197}198 199define <vscale x 2 x bfloat> @vfma_vf_nxv2bf16_unmasked(<vscale x 2 x bfloat> %va, bfloat %b, <vscale x 2 x bfloat> %vc, i32 zeroext %evl) {200; CHECK-LABEL: vfma_vf_nxv2bf16_unmasked:201; CHECK: # %bb.0:202; CHECK-NEXT: fmv.x.h a1, fa0203; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma204; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9205; CHECK-NEXT: vmv.v.x v9, a1206; CHECK-NEXT: vfwcvtbf16.f.f.v v11, v8207; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v9208; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma209; CHECK-NEXT: vfmadd.vv v12, v11, v10210; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma211; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12212; CHECK-NEXT: ret213 %elt.head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0214 %vb = shufflevector <vscale x 2 x bfloat> %elt.head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer215 %v = call <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vb, <vscale x 2 x bfloat> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)216 ret <vscale x 2 x bfloat> %v217}218 219define <vscale x 2 x bfloat> @vfma_vf_nxv2bf16_unmasked_commute(<vscale x 2 x bfloat> %va, bfloat %b, <vscale x 2 x bfloat> %vc, i32 zeroext %evl) {220; CHECK-LABEL: vfma_vf_nxv2bf16_unmasked_commute:221; CHECK: # %bb.0:222; CHECK-NEXT: fmv.x.h a1, fa0223; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma224; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9225; CHECK-NEXT: vmv.v.x v9, a1226; CHECK-NEXT: vfwcvtbf16.f.f.v v11, v8227; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v9228; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma229; CHECK-NEXT: vfmadd.vv v12, v11, v10230; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma231; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12232; CHECK-NEXT: ret233 %elt.head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0234 %vb = shufflevector <vscale x 2 x bfloat> %elt.head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer235 %v = call <vscale x 2 x bfloat> @llvm.vp.fma.nxv2bf16(<vscale x 2 x bfloat> %vb, <vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)236 ret <vscale x 2 x bfloat> %v237}238 239define <vscale x 4 x bfloat> @vfma_vv_nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x bfloat> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {240; CHECK-LABEL: vfma_vv_nxv4bf16:241; CHECK: # %bb.0:242; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma243; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v10, v0.t244; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8, v0.t245; CHECK-NEXT: vfwcvtbf16.f.f.v v14, v9, v0.t246; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma247; CHECK-NEXT: vfmadd.vv v14, v10, v12, v0.t248; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma249; CHECK-NEXT: vfncvtbf16.f.f.w v8, v14, v0.t250; CHECK-NEXT: ret251 %v = call <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x bfloat> %c, <vscale x 4 x i1> %m, i32 %evl)252 ret <vscale x 4 x bfloat> %v253}254 255define <vscale x 4 x bfloat> @vfma_vv_nxv4bf16_unmasked(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x bfloat> %c, i32 zeroext %evl) {256; CHECK-LABEL: vfma_vv_nxv4bf16_unmasked:257; CHECK: # %bb.0:258; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma259; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v10260; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v8261; CHECK-NEXT: vfwcvtbf16.f.f.v v14, v9262; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma263; CHECK-NEXT: vfmadd.vv v14, v10, v12264; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma265; CHECK-NEXT: vfncvtbf16.f.f.w v8, v14266; CHECK-NEXT: ret267 %v = call <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %b, <vscale x 4 x bfloat> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)268 ret <vscale x 4 x bfloat> %v269}270 271define <vscale x 4 x bfloat> @vfma_vf_nxv4bf16(<vscale x 4 x bfloat> %va, bfloat %b, <vscale x 4 x bfloat> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {272; CHECK-LABEL: vfma_vf_nxv4bf16:273; CHECK: # %bb.0:274; CHECK-NEXT: fmv.x.h a1, fa0275; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma276; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t277; CHECK-NEXT: vmv.v.x v9, a1278; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8, v0.t279; CHECK-NEXT: vfwcvtbf16.f.f.v v14, v9, v0.t280; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma281; CHECK-NEXT: vfmadd.vv v14, v12, v10, v0.t282; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma283; CHECK-NEXT: vfncvtbf16.f.f.w v8, v14, v0.t284; CHECK-NEXT: ret285 %elt.head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0286 %vb = shufflevector <vscale x 4 x bfloat> %elt.head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer287 %v = call <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vb, <vscale x 4 x bfloat> %vc, <vscale x 4 x i1> %m, i32 %evl)288 ret <vscale x 4 x bfloat> %v289}290 291define <vscale x 4 x bfloat> @vfma_vf_nxv4bf16_commute(<vscale x 4 x bfloat> %va, bfloat %b, <vscale x 4 x bfloat> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {292; CHECK-LABEL: vfma_vf_nxv4bf16_commute:293; CHECK: # %bb.0:294; CHECK-NEXT: fmv.x.h a1, fa0295; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma296; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9, v0.t297; CHECK-NEXT: vmv.v.x v14, a1298; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8, v0.t299; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v14, v0.t300; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma301; CHECK-NEXT: vfmadd.vv v12, v8, v10, v0.t302; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma303; CHECK-NEXT: vfncvtbf16.f.f.w v8, v12, v0.t304; CHECK-NEXT: ret305 %elt.head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0306 %vb = shufflevector <vscale x 4 x bfloat> %elt.head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer307 %v = call <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat> %vb, <vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vc, <vscale x 4 x i1> %m, i32 %evl)308 ret <vscale x 4 x bfloat> %v309}310 311define <vscale x 4 x bfloat> @vfma_vf_nxv4bf16_unmasked(<vscale x 4 x bfloat> %va, bfloat %b, <vscale x 4 x bfloat> %vc, i32 zeroext %evl) {312; CHECK-LABEL: vfma_vf_nxv4bf16_unmasked:313; CHECK: # %bb.0:314; CHECK-NEXT: fmv.x.h a1, fa0315; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma316; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9317; CHECK-NEXT: vmv.v.x v9, a1318; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8319; CHECK-NEXT: vfwcvtbf16.f.f.v v14, v9320; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma321; CHECK-NEXT: vfmadd.vv v14, v12, v10322; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma323; CHECK-NEXT: vfncvtbf16.f.f.w v8, v14324; CHECK-NEXT: ret325 %elt.head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0326 %vb = shufflevector <vscale x 4 x bfloat> %elt.head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer327 %v = call <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vb, <vscale x 4 x bfloat> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)328 ret <vscale x 4 x bfloat> %v329}330 331define <vscale x 4 x bfloat> @vfma_vf_nxv4bf16_unmasked_commute(<vscale x 4 x bfloat> %va, bfloat %b, <vscale x 4 x bfloat> %vc, i32 zeroext %evl) {332; CHECK-LABEL: vfma_vf_nxv4bf16_unmasked_commute:333; CHECK: # %bb.0:334; CHECK-NEXT: fmv.x.h a1, fa0335; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma336; CHECK-NEXT: vfwcvtbf16.f.f.v v10, v9337; CHECK-NEXT: vmv.v.x v9, a1338; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8339; CHECK-NEXT: vfwcvtbf16.f.f.v v14, v9340; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma341; CHECK-NEXT: vfmadd.vv v14, v12, v10342; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma343; CHECK-NEXT: vfncvtbf16.f.f.w v8, v14344; CHECK-NEXT: ret345 %elt.head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0346 %vb = shufflevector <vscale x 4 x bfloat> %elt.head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer347 %v = call <vscale x 4 x bfloat> @llvm.vp.fma.nxv4bf16(<vscale x 4 x bfloat> %vb, <vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)348 ret <vscale x 4 x bfloat> %v349}350 351define <vscale x 8 x bfloat> @vfma_vv_nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {352; CHECK-LABEL: vfma_vv_nxv8bf16:353; CHECK: # %bb.0:354; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma355; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t356; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8, v0.t357; CHECK-NEXT: vfwcvtbf16.f.f.v v20, v10, v0.t358; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma359; CHECK-NEXT: vfmadd.vv v20, v12, v16, v0.t360; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma361; CHECK-NEXT: vfncvtbf16.f.f.w v8, v20, v0.t362; CHECK-NEXT: ret363 %v = call <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, <vscale x 8 x i1> %m, i32 %evl)364 ret <vscale x 8 x bfloat> %v365}366 367define <vscale x 8 x bfloat> @vfma_vv_nxv8bf16_unmasked(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 zeroext %evl) {368; CHECK-LABEL: vfma_vv_nxv8bf16_unmasked:369; CHECK: # %bb.0:370; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma371; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12372; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v8373; CHECK-NEXT: vfwcvtbf16.f.f.v v20, v10374; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma375; CHECK-NEXT: vfmadd.vv v20, v12, v16376; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma377; CHECK-NEXT: vfncvtbf16.f.f.w v8, v20378; CHECK-NEXT: ret379 %v = call <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)380 ret <vscale x 8 x bfloat> %v381}382 383define <vscale x 8 x bfloat> @vfma_vf_nxv8bf16(<vscale x 8 x bfloat> %va, bfloat %b, <vscale x 8 x bfloat> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {384; CHECK-LABEL: vfma_vf_nxv8bf16:385; CHECK: # %bb.0:386; CHECK-NEXT: fmv.x.h a1, fa0387; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma388; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v10, v0.t389; CHECK-NEXT: vmv.v.x v10, a1390; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t391; CHECK-NEXT: vfwcvtbf16.f.f.v v20, v10, v0.t392; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma393; CHECK-NEXT: vfmadd.vv v20, v16, v12, v0.t394; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma395; CHECK-NEXT: vfncvtbf16.f.f.w v8, v20, v0.t396; CHECK-NEXT: ret397 %elt.head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0398 %vb = shufflevector <vscale x 8 x bfloat> %elt.head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer399 %v = call <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vb, <vscale x 8 x bfloat> %vc, <vscale x 8 x i1> %m, i32 %evl)400 ret <vscale x 8 x bfloat> %v401}402 403define <vscale x 8 x bfloat> @vfma_vf_nxv8bf16_commute(<vscale x 8 x bfloat> %va, bfloat %b, <vscale x 8 x bfloat> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {404; CHECK-LABEL: vfma_vf_nxv8bf16_commute:405; CHECK: # %bb.0:406; CHECK-NEXT: fmv.x.h a1, fa0407; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma408; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v10, v0.t409; CHECK-NEXT: vmv.v.x v20, a1410; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t411; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v20, v0.t412; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma413; CHECK-NEXT: vfmadd.vv v16, v8, v12, v0.t414; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma415; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t416; CHECK-NEXT: ret417 %elt.head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0418 %vb = shufflevector <vscale x 8 x bfloat> %elt.head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer419 %v = call <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat> %vb, <vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vc, <vscale x 8 x i1> %m, i32 %evl)420 ret <vscale x 8 x bfloat> %v421}422 423define <vscale x 8 x bfloat> @vfma_vf_nxv8bf16_unmasked(<vscale x 8 x bfloat> %va, bfloat %b, <vscale x 8 x bfloat> %vc, i32 zeroext %evl) {424; CHECK-LABEL: vfma_vf_nxv8bf16_unmasked:425; CHECK: # %bb.0:426; CHECK-NEXT: fmv.x.h a1, fa0427; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma428; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v10429; CHECK-NEXT: vmv.v.x v10, a1430; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8431; CHECK-NEXT: vfwcvtbf16.f.f.v v20, v10432; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma433; CHECK-NEXT: vfmadd.vv v20, v16, v12434; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma435; CHECK-NEXT: vfncvtbf16.f.f.w v8, v20436; CHECK-NEXT: ret437 %elt.head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0438 %vb = shufflevector <vscale x 8 x bfloat> %elt.head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer439 %v = call <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vb, <vscale x 8 x bfloat> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)440 ret <vscale x 8 x bfloat> %v441}442 443define <vscale x 8 x bfloat> @vfma_vf_nxv8bf16_unmasked_commute(<vscale x 8 x bfloat> %va, bfloat %b, <vscale x 8 x bfloat> %vc, i32 zeroext %evl) {444; CHECK-LABEL: vfma_vf_nxv8bf16_unmasked_commute:445; CHECK: # %bb.0:446; CHECK-NEXT: fmv.x.h a1, fa0447; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma448; CHECK-NEXT: vfwcvtbf16.f.f.v v12, v10449; CHECK-NEXT: vmv.v.x v10, a1450; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8451; CHECK-NEXT: vfwcvtbf16.f.f.v v20, v10452; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, ma453; CHECK-NEXT: vfmadd.vv v20, v16, v12454; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, ma455; CHECK-NEXT: vfncvtbf16.f.f.w v8, v20456; CHECK-NEXT: ret457 %elt.head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0458 %vb = shufflevector <vscale x 8 x bfloat> %elt.head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer459 %v = call <vscale x 8 x bfloat> @llvm.vp.fma.nxv8bf16(<vscale x 8 x bfloat> %vb, <vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)460 ret <vscale x 8 x bfloat> %v461}462 463define <vscale x 16 x bfloat> @vfma_vv_nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x bfloat> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {464; CHECK-LABEL: vfma_vv_nxv16bf16:465; CHECK: # %bb.0:466; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma467; CHECK-NEXT: vmv4r.v v4, v12468; CHECK-NEXT: vmv4r.v v20, v8469; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v16, v0.t470; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v20, v0.t471; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v4, v0.t472; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma473; CHECK-NEXT: vfmadd.vv v16, v8, v24, v0.t474; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma475; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t476; CHECK-NEXT: ret477 %v = call <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x bfloat> %c, <vscale x 16 x i1> %m, i32 %evl)478 ret <vscale x 16 x bfloat> %v479}480 481define <vscale x 16 x bfloat> @vfma_vv_nxv16bf16_unmasked(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x bfloat> %c, i32 zeroext %evl) {482; CHECK-LABEL: vfma_vv_nxv16bf16_unmasked:483; CHECK: # %bb.0:484; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma485; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v16486; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8487; CHECK-NEXT: vfwcvtbf16.f.f.v v0, v12488; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma489; CHECK-NEXT: vfmadd.vv v0, v16, v24490; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma491; CHECK-NEXT: vfncvtbf16.f.f.w v8, v0492; CHECK-NEXT: ret493 %v = call <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %b, <vscale x 16 x bfloat> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)494 ret <vscale x 16 x bfloat> %v495}496 497define <vscale x 16 x bfloat> @vfma_vf_nxv16bf16(<vscale x 16 x bfloat> %va, bfloat %b, <vscale x 16 x bfloat> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {498; CHECK-LABEL: vfma_vf_nxv16bf16:499; CHECK: # %bb.0:500; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma501; CHECK-NEXT: vmv4r.v v16, v12502; CHECK-NEXT: vmv4r.v v20, v8503; CHECK-NEXT: fmv.x.h a0, fa0504; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v16, v0.t505; CHECK-NEXT: vmv.v.x v4, a0506; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t507; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v4, v0.t508; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma509; CHECK-NEXT: vfmadd.vv v16, v24, v8, v0.t510; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma511; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t512; CHECK-NEXT: ret513 %elt.head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0514 %vb = shufflevector <vscale x 16 x bfloat> %elt.head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer515 %v = call <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vb, <vscale x 16 x bfloat> %vc, <vscale x 16 x i1> %m, i32 %evl)516 ret <vscale x 16 x bfloat> %v517}518 519define <vscale x 16 x bfloat> @vfma_vf_nxv16bf16_commute(<vscale x 16 x bfloat> %va, bfloat %b, <vscale x 16 x bfloat> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {520; CHECK-LABEL: vfma_vf_nxv16bf16_commute:521; CHECK: # %bb.0:522; CHECK-NEXT: fmv.x.h a1, fa0523; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma524; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t525; CHECK-NEXT: vmv.v.x v4, a1526; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8, v0.t527; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v4, v0.t528; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma529; CHECK-NEXT: vfmadd.vv v24, v8, v16, v0.t530; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma531; CHECK-NEXT: vfncvtbf16.f.f.w v8, v24, v0.t532; CHECK-NEXT: ret533 %elt.head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0534 %vb = shufflevector <vscale x 16 x bfloat> %elt.head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer535 %v = call <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat> %vb, <vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vc, <vscale x 16 x i1> %m, i32 %evl)536 ret <vscale x 16 x bfloat> %v537}538 539define <vscale x 16 x bfloat> @vfma_vf_nxv16bf16_unmasked(<vscale x 16 x bfloat> %va, bfloat %b, <vscale x 16 x bfloat> %vc, i32 zeroext %evl) {540; CHECK-LABEL: vfma_vf_nxv16bf16_unmasked:541; CHECK: # %bb.0:542; CHECK-NEXT: fmv.x.h a1, fa0543; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma544; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12545; CHECK-NEXT: vmv.v.x v12, a1546; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8547; CHECK-NEXT: vfwcvtbf16.f.f.v v0, v12548; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma549; CHECK-NEXT: vfmadd.vv v0, v24, v16550; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma551; CHECK-NEXT: vfncvtbf16.f.f.w v8, v0552; CHECK-NEXT: ret553 %elt.head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0554 %vb = shufflevector <vscale x 16 x bfloat> %elt.head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer555 %v = call <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vb, <vscale x 16 x bfloat> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)556 ret <vscale x 16 x bfloat> %v557}558 559define <vscale x 16 x bfloat> @vfma_vf_nxv16bf16_unmasked_commute(<vscale x 16 x bfloat> %va, bfloat %b, <vscale x 16 x bfloat> %vc, i32 zeroext %evl) {560; CHECK-LABEL: vfma_vf_nxv16bf16_unmasked_commute:561; CHECK: # %bb.0:562; CHECK-NEXT: fmv.x.h a1, fa0563; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma564; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12565; CHECK-NEXT: vmv.v.x v12, a1566; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8567; CHECK-NEXT: vfwcvtbf16.f.f.v v0, v12568; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma569; CHECK-NEXT: vfmadd.vv v0, v24, v16570; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma571; CHECK-NEXT: vfncvtbf16.f.f.w v8, v0572; CHECK-NEXT: ret573 %elt.head = insertelement <vscale x 16 x bfloat> poison, bfloat %b, i32 0574 %vb = shufflevector <vscale x 16 x bfloat> %elt.head, <vscale x 16 x bfloat> poison, <vscale x 16 x i32> zeroinitializer575 %v = call <vscale x 16 x bfloat> @llvm.vp.fma.nxv16bf16(<vscale x 16 x bfloat> %vb, <vscale x 16 x bfloat> %va, <vscale x 16 x bfloat> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)576 ret <vscale x 16 x bfloat> %v577}578 579define <vscale x 32 x bfloat> @vfma_vv_nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x bfloat> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {580; CHECK-LABEL: vfma_vv_nxv32bf16:581; CHECK: # %bb.0:582; CHECK-NEXT: addi sp, sp, -16583; CHECK-NEXT: .cfi_def_cfa_offset 16584; CHECK-NEXT: csrr a2, vlenb585; CHECK-NEXT: slli a2, a2, 5586; CHECK-NEXT: sub sp, sp, a2587; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb588; CHECK-NEXT: vsetvli a2, zero, e8, mf2, ta, ma589; CHECK-NEXT: vmv1r.v v3, v0590; CHECK-NEXT: csrr a2, vlenb591; CHECK-NEXT: slli a2, a2, 3592; CHECK-NEXT: mv a3, a2593; CHECK-NEXT: slli a2, a2, 1594; CHECK-NEXT: add a2, a2, a3595; CHECK-NEXT: add a2, sp, a2596; CHECK-NEXT: addi a2, a2, 16597; CHECK-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill598; CHECK-NEXT: vl8re16.v v16, (a0)599; CHECK-NEXT: csrr a2, vlenb600; CHECK-NEXT: slli a0, a2, 1601; CHECK-NEXT: srli a2, a2, 2602; CHECK-NEXT: sub a3, a1, a0603; CHECK-NEXT: vslidedown.vx v0, v0, a2604; CHECK-NEXT: sltu a2, a1, a3605; CHECK-NEXT: addi a2, a2, -1606; CHECK-NEXT: and a2, a2, a3607; CHECK-NEXT: csrr a3, vlenb608; CHECK-NEXT: slli a3, a3, 3609; CHECK-NEXT: add a3, sp, a3610; CHECK-NEXT: addi a3, a3, 16611; CHECK-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill612; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma613; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t614; CHECK-NEXT: addi a2, sp, 16615; CHECK-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill616; CHECK-NEXT: csrr a2, vlenb617; CHECK-NEXT: slli a2, a2, 4618; CHECK-NEXT: add a2, sp, a2619; CHECK-NEXT: addi a2, a2, 16620; CHECK-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill621; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t622; CHECK-NEXT: csrr a2, vlenb623; CHECK-NEXT: slli a2, a2, 3624; CHECK-NEXT: mv a3, a2625; CHECK-NEXT: slli a2, a2, 1626; CHECK-NEXT: add a2, a2, a3627; CHECK-NEXT: add a2, sp, a2628; CHECK-NEXT: addi a2, a2, 16629; CHECK-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload630; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v28, v0.t631; CHECK-NEXT: addi a2, sp, 16632; CHECK-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload633; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma634; CHECK-NEXT: vfmadd.vv v8, v16, v24, v0.t635; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma636; CHECK-NEXT: vfncvtbf16.f.f.w v4, v8, v0.t637; CHECK-NEXT: bltu a1, a0, .LBB30_2638; CHECK-NEXT: # %bb.1:639; CHECK-NEXT: mv a1, a0640; CHECK-NEXT: .LBB30_2:641; CHECK-NEXT: vmv1r.v v0, v3642; CHECK-NEXT: csrr a0, vlenb643; CHECK-NEXT: slli a0, a0, 3644; CHECK-NEXT: add a0, sp, a0645; CHECK-NEXT: addi a0, a0, 16646; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload647; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma648; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8, v0.t649; CHECK-NEXT: addi a0, sp, 16650; CHECK-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill651; CHECK-NEXT: csrr a0, vlenb652; CHECK-NEXT: slli a0, a0, 4653; CHECK-NEXT: add a0, sp, a0654; CHECK-NEXT: addi a0, a0, 16655; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload656; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t657; CHECK-NEXT: csrr a0, vlenb658; CHECK-NEXT: slli a0, a0, 3659; CHECK-NEXT: add a0, sp, a0660; CHECK-NEXT: addi a0, a0, 16661; CHECK-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill662; CHECK-NEXT: csrr a0, vlenb663; CHECK-NEXT: slli a0, a0, 3664; CHECK-NEXT: mv a1, a0665; CHECK-NEXT: slli a0, a0, 1666; CHECK-NEXT: add a0, a0, a1667; CHECK-NEXT: add a0, sp, a0668; CHECK-NEXT: addi a0, a0, 16669; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload670; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v24, v0.t671; CHECK-NEXT: addi a0, sp, 16672; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload673; CHECK-NEXT: csrr a0, vlenb674; CHECK-NEXT: slli a0, a0, 3675; CHECK-NEXT: add a0, sp, a0676; CHECK-NEXT: addi a0, a0, 16677; CHECK-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload678; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma679; CHECK-NEXT: vfmadd.vv v8, v16, v24, v0.t680; CHECK-NEXT: vmv.v.v v16, v8681; CHECK-NEXT: vmv4r.v v12, v4682; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma683; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t684; CHECK-NEXT: csrr a0, vlenb685; CHECK-NEXT: slli a0, a0, 5686; CHECK-NEXT: add sp, sp, a0687; CHECK-NEXT: .cfi_def_cfa sp, 16688; CHECK-NEXT: addi sp, sp, 16689; CHECK-NEXT: .cfi_def_cfa_offset 0690; CHECK-NEXT: ret691 %v = call <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x bfloat> %c, <vscale x 32 x i1> %m, i32 %evl)692 ret <vscale x 32 x bfloat> %v693}694 695define <vscale x 32 x bfloat> @vfma_vv_nxv32bf16_unmasked(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x bfloat> %c, i32 zeroext %evl) {696; CHECK-LABEL: vfma_vv_nxv32bf16_unmasked:697; CHECK: # %bb.0:698; CHECK-NEXT: addi sp, sp, -16699; CHECK-NEXT: .cfi_def_cfa_offset 16700; CHECK-NEXT: csrr a2, vlenb701; CHECK-NEXT: slli a2, a2, 5702; CHECK-NEXT: sub sp, sp, a2703; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb704; CHECK-NEXT: csrr a2, vlenb705; CHECK-NEXT: slli a2, a2, 3706; CHECK-NEXT: mv a3, a2707; CHECK-NEXT: slli a2, a2, 1708; CHECK-NEXT: add a2, a2, a3709; CHECK-NEXT: add a2, sp, a2710; CHECK-NEXT: addi a2, a2, 16711; CHECK-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill712; CHECK-NEXT: vl8re16.v v16, (a0)713; CHECK-NEXT: csrr a2, vlenb714; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma715; CHECK-NEXT: vmset.m v24716; CHECK-NEXT: slli a0, a2, 1717; CHECK-NEXT: srli a2, a2, 2718; CHECK-NEXT: sub a3, a1, a0719; CHECK-NEXT: vsetvli a4, zero, e8, mf2, ta, ma720; CHECK-NEXT: vslidedown.vx v0, v24, a2721; CHECK-NEXT: sltu a2, a1, a3722; CHECK-NEXT: addi a2, a2, -1723; CHECK-NEXT: and a2, a2, a3724; CHECK-NEXT: csrr a3, vlenb725; CHECK-NEXT: slli a3, a3, 3726; CHECK-NEXT: add a3, sp, a3727; CHECK-NEXT: addi a3, a3, 16728; CHECK-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill729; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma730; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t731; CHECK-NEXT: addi a2, sp, 16732; CHECK-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill733; CHECK-NEXT: csrr a2, vlenb734; CHECK-NEXT: slli a2, a2, 4735; CHECK-NEXT: add a2, sp, a2736; CHECK-NEXT: addi a2, a2, 16737; CHECK-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill738; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t739; CHECK-NEXT: csrr a2, vlenb740; CHECK-NEXT: slli a2, a2, 3741; CHECK-NEXT: mv a3, a2742; CHECK-NEXT: slli a2, a2, 1743; CHECK-NEXT: add a2, a2, a3744; CHECK-NEXT: add a2, sp, a2745; CHECK-NEXT: addi a2, a2, 16746; CHECK-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload747; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v28, v0.t748; CHECK-NEXT: addi a2, sp, 16749; CHECK-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload750; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma751; CHECK-NEXT: vfmadd.vv v8, v16, v24, v0.t752; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma753; CHECK-NEXT: vfncvtbf16.f.f.w v20, v8, v0.t754; CHECK-NEXT: bltu a1, a0, .LBB31_2755; CHECK-NEXT: # %bb.1:756; CHECK-NEXT: mv a1, a0757; CHECK-NEXT: .LBB31_2:758; CHECK-NEXT: csrr a0, vlenb759; CHECK-NEXT: slli a0, a0, 3760; CHECK-NEXT: add a0, sp, a0761; CHECK-NEXT: addi a0, a0, 16762; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload763; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma764; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8765; CHECK-NEXT: addi a0, sp, 16766; CHECK-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill767; CHECK-NEXT: csrr a0, vlenb768; CHECK-NEXT: slli a0, a0, 4769; CHECK-NEXT: add a0, sp, a0770; CHECK-NEXT: addi a0, a0, 16771; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload772; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8773; CHECK-NEXT: csrr a0, vlenb774; CHECK-NEXT: slli a0, a0, 3775; CHECK-NEXT: mv a1, a0776; CHECK-NEXT: slli a0, a0, 1777; CHECK-NEXT: add a0, a0, a1778; CHECK-NEXT: add a0, sp, a0779; CHECK-NEXT: addi a0, a0, 16780; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload781; CHECK-NEXT: vfwcvtbf16.f.f.v v0, v8782; CHECK-NEXT: addi a0, sp, 16783; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload784; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma785; CHECK-NEXT: vfmadd.vv v0, v24, v8786; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma787; CHECK-NEXT: vfncvtbf16.f.f.w v16, v0788; CHECK-NEXT: vmv8r.v v8, v16789; CHECK-NEXT: csrr a0, vlenb790; CHECK-NEXT: slli a0, a0, 5791; CHECK-NEXT: add sp, sp, a0792; CHECK-NEXT: .cfi_def_cfa sp, 16793; CHECK-NEXT: addi sp, sp, 16794; CHECK-NEXT: .cfi_def_cfa_offset 0795; CHECK-NEXT: ret796 %v = call <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %b, <vscale x 32 x bfloat> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)797 ret <vscale x 32 x bfloat> %v798}799 800define <vscale x 32 x bfloat> @vfma_vf_nxv32bf16(<vscale x 32 x bfloat> %va, bfloat %b, <vscale x 32 x bfloat> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {801; CHECK-LABEL: vfma_vf_nxv32bf16:802; CHECK: # %bb.0:803; CHECK-NEXT: addi sp, sp, -16804; CHECK-NEXT: .cfi_def_cfa_offset 16805; CHECK-NEXT: csrr a1, vlenb806; CHECK-NEXT: slli a1, a1, 5807; CHECK-NEXT: sub sp, sp, a1808; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb809; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma810; CHECK-NEXT: vmv1r.v v3, v0811; CHECK-NEXT: vmv8r.v v24, v8812; CHECK-NEXT: fmv.x.h a2, fa0813; CHECK-NEXT: csrr a3, vlenb814; CHECK-NEXT: slli a1, a3, 1815; CHECK-NEXT: srli a3, a3, 2816; CHECK-NEXT: sub a4, a0, a1817; CHECK-NEXT: vslidedown.vx v0, v0, a3818; CHECK-NEXT: sltu a3, a0, a4819; CHECK-NEXT: addi a3, a3, -1820; CHECK-NEXT: and a3, a3, a4821; CHECK-NEXT: csrr a4, vlenb822; CHECK-NEXT: slli a4, a4, 3823; CHECK-NEXT: add a4, sp, a4824; CHECK-NEXT: addi a4, a4, 16825; CHECK-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill826; CHECK-NEXT: vsetvli zero, a3, e16, m4, ta, ma827; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v20, v0.t828; CHECK-NEXT: addi a4, sp, 16829; CHECK-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill830; CHECK-NEXT: csrr a4, vlenb831; CHECK-NEXT: slli a4, a4, 3832; CHECK-NEXT: mv a5, a4833; CHECK-NEXT: slli a4, a4, 1834; CHECK-NEXT: add a4, a4, a5835; CHECK-NEXT: add a4, sp, a4836; CHECK-NEXT: addi a4, a4, 16837; CHECK-NEXT: vs8r.v v24, (a4) # vscale x 64-byte Folded Spill838; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v28, v0.t839; CHECK-NEXT: vsetvli a4, zero, e16, m8, ta, ma840; CHECK-NEXT: vmv.v.x v8, a2841; CHECK-NEXT: csrr a2, vlenb842; CHECK-NEXT: slli a2, a2, 4843; CHECK-NEXT: add a2, sp, a2844; CHECK-NEXT: addi a2, a2, 16845; CHECK-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill846; CHECK-NEXT: vsetvli zero, a3, e16, m4, ta, ma847; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v12, v0.t848; CHECK-NEXT: addi a2, sp, 16849; CHECK-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload850; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma851; CHECK-NEXT: vfmadd.vv v24, v16, v8, v0.t852; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma853; CHECK-NEXT: vfncvtbf16.f.f.w v4, v24, v0.t854; CHECK-NEXT: bltu a0, a1, .LBB32_2855; CHECK-NEXT: # %bb.1:856; CHECK-NEXT: mv a0, a1857; CHECK-NEXT: .LBB32_2:858; CHECK-NEXT: vmv1r.v v0, v3859; CHECK-NEXT: csrr a1, vlenb860; CHECK-NEXT: slli a1, a1, 3861; CHECK-NEXT: add a1, sp, a1862; CHECK-NEXT: addi a1, a1, 16863; CHECK-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload864; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma865; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v16, v0.t866; CHECK-NEXT: addi a0, sp, 16867; CHECK-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill868; CHECK-NEXT: csrr a0, vlenb869; CHECK-NEXT: slli a0, a0, 3870; CHECK-NEXT: mv a1, a0871; CHECK-NEXT: slli a0, a0, 1872; CHECK-NEXT: add a0, a0, a1873; CHECK-NEXT: add a0, sp, a0874; CHECK-NEXT: addi a0, a0, 16875; CHECK-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload876; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v16, v0.t877; CHECK-NEXT: csrr a0, vlenb878; CHECK-NEXT: slli a0, a0, 3879; CHECK-NEXT: add a0, sp, a0880; CHECK-NEXT: addi a0, a0, 16881; CHECK-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill882; CHECK-NEXT: csrr a0, vlenb883; CHECK-NEXT: slli a0, a0, 4884; CHECK-NEXT: add a0, sp, a0885; CHECK-NEXT: addi a0, a0, 16886; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload887; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v24, v0.t888; CHECK-NEXT: addi a0, sp, 16889; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload890; CHECK-NEXT: csrr a0, vlenb891; CHECK-NEXT: slli a0, a0, 3892; CHECK-NEXT: add a0, sp, a0893; CHECK-NEXT: addi a0, a0, 16894; CHECK-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload895; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma896; CHECK-NEXT: vfmadd.vv v8, v16, v24, v0.t897; CHECK-NEXT: vmv.v.v v16, v8898; CHECK-NEXT: vmv4r.v v12, v4899; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma900; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t901; CHECK-NEXT: csrr a0, vlenb902; CHECK-NEXT: slli a0, a0, 5903; CHECK-NEXT: add sp, sp, a0904; CHECK-NEXT: .cfi_def_cfa sp, 16905; CHECK-NEXT: addi sp, sp, 16906; CHECK-NEXT: .cfi_def_cfa_offset 0907; CHECK-NEXT: ret908 %elt.head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 0909 %vb = shufflevector <vscale x 32 x bfloat> %elt.head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer910 %v = call <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vb, <vscale x 32 x bfloat> %vc, <vscale x 32 x i1> %m, i32 %evl)911 ret <vscale x 32 x bfloat> %v912}913 914define <vscale x 32 x bfloat> @vfma_vf_nxv32bf16_commute(<vscale x 32 x bfloat> %va, bfloat %b, <vscale x 32 x bfloat> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {915; CHECK-LABEL: vfma_vf_nxv32bf16_commute:916; CHECK: # %bb.0:917; CHECK-NEXT: addi sp, sp, -16918; CHECK-NEXT: .cfi_def_cfa_offset 16919; CHECK-NEXT: csrr a1, vlenb920; CHECK-NEXT: slli a1, a1, 5921; CHECK-NEXT: sub sp, sp, a1922; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb923; CHECK-NEXT: vsetvli a1, zero, e16, m8, ta, ma924; CHECK-NEXT: vmv1r.v v3, v0925; CHECK-NEXT: csrr a1, vlenb926; CHECK-NEXT: slli a1, a1, 3927; CHECK-NEXT: mv a2, a1928; CHECK-NEXT: slli a1, a1, 1929; CHECK-NEXT: add a1, a1, a2930; CHECK-NEXT: add a1, sp, a1931; CHECK-NEXT: addi a1, a1, 16932; CHECK-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill933; CHECK-NEXT: fmv.x.h a1, fa0934; CHECK-NEXT: csrr a2, vlenb935; CHECK-NEXT: vmv.v.x v8, a1936; CHECK-NEXT: slli a1, a2, 1937; CHECK-NEXT: srli a2, a2, 2938; CHECK-NEXT: sub a3, a0, a1939; CHECK-NEXT: vsetvli a4, zero, e8, mf2, ta, ma940; CHECK-NEXT: vslidedown.vx v0, v0, a2941; CHECK-NEXT: sltu a2, a0, a3942; CHECK-NEXT: addi a2, a2, -1943; CHECK-NEXT: and a2, a2, a3944; CHECK-NEXT: csrr a3, vlenb945; CHECK-NEXT: slli a3, a3, 4946; CHECK-NEXT: add a3, sp, a3947; CHECK-NEXT: addi a3, a3, 16948; CHECK-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill949; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma950; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v20, v0.t951; CHECK-NEXT: addi a2, sp, 16952; CHECK-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill953; CHECK-NEXT: csrr a2, vlenb954; CHECK-NEXT: slli a2, a2, 3955; CHECK-NEXT: add a2, sp, a2956; CHECK-NEXT: addi a2, a2, 16957; CHECK-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill958; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v12, v0.t959; CHECK-NEXT: csrr a2, vlenb960; CHECK-NEXT: slli a2, a2, 3961; CHECK-NEXT: mv a3, a2962; CHECK-NEXT: slli a2, a2, 1963; CHECK-NEXT: add a2, a2, a3964; CHECK-NEXT: add a2, sp, a2965; CHECK-NEXT: addi a2, a2, 16966; CHECK-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload967; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v28, v0.t968; CHECK-NEXT: addi a2, sp, 16969; CHECK-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload970; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma971; CHECK-NEXT: vfmadd.vv v8, v16, v24, v0.t972; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma973; CHECK-NEXT: vfncvtbf16.f.f.w v4, v8, v0.t974; CHECK-NEXT: bltu a0, a1, .LBB33_2975; CHECK-NEXT: # %bb.1:976; CHECK-NEXT: mv a0, a1977; CHECK-NEXT: .LBB33_2:978; CHECK-NEXT: vmv1r.v v0, v3979; CHECK-NEXT: csrr a1, vlenb980; CHECK-NEXT: slli a1, a1, 4981; CHECK-NEXT: add a1, sp, a1982; CHECK-NEXT: addi a1, a1, 16983; CHECK-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload984; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma985; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t986; CHECK-NEXT: addi a0, sp, 16987; CHECK-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill988; CHECK-NEXT: csrr a0, vlenb989; CHECK-NEXT: slli a0, a0, 3990; CHECK-NEXT: mv a1, a0991; CHECK-NEXT: slli a0, a0, 1992; CHECK-NEXT: add a0, a0, a1993; CHECK-NEXT: add a0, sp, a0994; CHECK-NEXT: addi a0, a0, 16995; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload996; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v8, v0.t997; CHECK-NEXT: csrr a0, vlenb998; CHECK-NEXT: slli a0, a0, 3999; CHECK-NEXT: add a0, sp, a01000; CHECK-NEXT: addi a0, a0, 161001; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1002; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v8, v0.t1003; CHECK-NEXT: csrr a0, vlenb1004; CHECK-NEXT: slli a0, a0, 31005; CHECK-NEXT: mv a1, a01006; CHECK-NEXT: slli a0, a0, 11007; CHECK-NEXT: add a0, a0, a11008; CHECK-NEXT: add a0, sp, a01009; CHECK-NEXT: addi a0, a0, 161010; CHECK-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill1011; CHECK-NEXT: addi a0, sp, 161012; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1013; CHECK-NEXT: csrr a0, vlenb1014; CHECK-NEXT: slli a0, a0, 31015; CHECK-NEXT: mv a1, a01016; CHECK-NEXT: slli a0, a0, 11017; CHECK-NEXT: add a0, a0, a11018; CHECK-NEXT: add a0, sp, a01019; CHECK-NEXT: addi a0, a0, 161020; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload1021; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma1022; CHECK-NEXT: vfmadd.vv v16, v24, v8, v0.t1023; CHECK-NEXT: vmv4r.v v12, v41024; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma1025; CHECK-NEXT: vfncvtbf16.f.f.w v8, v16, v0.t1026; CHECK-NEXT: csrr a0, vlenb1027; CHECK-NEXT: slli a0, a0, 51028; CHECK-NEXT: add sp, sp, a01029; CHECK-NEXT: .cfi_def_cfa sp, 161030; CHECK-NEXT: addi sp, sp, 161031; CHECK-NEXT: .cfi_def_cfa_offset 01032; CHECK-NEXT: ret1033 %elt.head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 01034 %vb = shufflevector <vscale x 32 x bfloat> %elt.head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer1035 %v = call <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat> %vb, <vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vc, <vscale x 32 x i1> %m, i32 %evl)1036 ret <vscale x 32 x bfloat> %v1037}1038 1039define <vscale x 32 x bfloat> @vfma_vf_nxv32bf16_unmasked(<vscale x 32 x bfloat> %va, bfloat %b, <vscale x 32 x bfloat> %vc, i32 zeroext %evl) {1040; CHECK-LABEL: vfma_vf_nxv32bf16_unmasked:1041; CHECK: # %bb.0:1042; CHECK-NEXT: addi sp, sp, -161043; CHECK-NEXT: .cfi_def_cfa_offset 161044; CHECK-NEXT: csrr a1, vlenb1045; CHECK-NEXT: slli a1, a1, 31046; CHECK-NEXT: mv a2, a11047; CHECK-NEXT: slli a1, a1, 21048; CHECK-NEXT: add a1, a1, a21049; CHECK-NEXT: sub sp, sp, a11050; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb1051; CHECK-NEXT: vsetvli a1, zero, e8, m4, ta, ma1052; CHECK-NEXT: vmv8r.v v24, v81053; CHECK-NEXT: fmv.x.h a2, fa01054; CHECK-NEXT: csrr a3, vlenb1055; CHECK-NEXT: vmset.m v81056; CHECK-NEXT: slli a1, a3, 11057; CHECK-NEXT: srli a3, a3, 21058; CHECK-NEXT: sub a4, a0, a11059; CHECK-NEXT: vsetvli a5, zero, e8, mf2, ta, ma1060; CHECK-NEXT: vslidedown.vx v0, v8, a31061; CHECK-NEXT: sltu a3, a0, a41062; CHECK-NEXT: addi a3, a3, -11063; CHECK-NEXT: and a3, a3, a41064; CHECK-NEXT: csrr a4, vlenb1065; CHECK-NEXT: slli a4, a4, 51066; CHECK-NEXT: add a4, sp, a41067; CHECK-NEXT: addi a4, a4, 161068; CHECK-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill1069; CHECK-NEXT: vsetvli zero, a3, e16, m4, ta, ma1070; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v20, v0.t1071; CHECK-NEXT: csrr a4, vlenb1072; CHECK-NEXT: slli a4, a4, 41073; CHECK-NEXT: add a4, sp, a41074; CHECK-NEXT: addi a4, a4, 161075; CHECK-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill1076; CHECK-NEXT: csrr a4, vlenb1077; CHECK-NEXT: slli a4, a4, 31078; CHECK-NEXT: mv a5, a41079; CHECK-NEXT: slli a4, a4, 11080; CHECK-NEXT: add a4, a4, a51081; CHECK-NEXT: add a4, sp, a41082; CHECK-NEXT: addi a4, a4, 161083; CHECK-NEXT: vs8r.v v24, (a4) # vscale x 64-byte Folded Spill1084; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v28, v0.t1085; CHECK-NEXT: csrr a4, vlenb1086; CHECK-NEXT: slli a4, a4, 31087; CHECK-NEXT: add a4, sp, a41088; CHECK-NEXT: addi a4, a4, 161089; CHECK-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill1090; CHECK-NEXT: vsetvli a4, zero, e16, m8, ta, ma1091; CHECK-NEXT: vmv.v.x v8, a21092; CHECK-NEXT: addi a2, sp, 161093; CHECK-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill1094; CHECK-NEXT: vsetvli zero, a3, e16, m4, ta, ma1095; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v12, v0.t1096; CHECK-NEXT: csrr a2, vlenb1097; CHECK-NEXT: slli a2, a2, 41098; CHECK-NEXT: add a2, sp, a21099; CHECK-NEXT: addi a2, a2, 161100; CHECK-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload1101; CHECK-NEXT: csrr a2, vlenb1102; CHECK-NEXT: slli a2, a2, 31103; CHECK-NEXT: add a2, sp, a21104; CHECK-NEXT: addi a2, a2, 161105; CHECK-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload1106; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma1107; CHECK-NEXT: vfmadd.vv v24, v16, v8, v0.t1108; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma1109; CHECK-NEXT: vfncvtbf16.f.f.w v12, v24, v0.t1110; CHECK-NEXT: bltu a0, a1, .LBB34_21111; CHECK-NEXT: # %bb.1:1112; CHECK-NEXT: mv a0, a11113; CHECK-NEXT: .LBB34_2:1114; CHECK-NEXT: csrr a1, vlenb1115; CHECK-NEXT: slli a1, a1, 51116; CHECK-NEXT: add a1, sp, a11117; CHECK-NEXT: addi a1, a1, 161118; CHECK-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload1119; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma1120; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v241121; CHECK-NEXT: csrr a0, vlenb1122; CHECK-NEXT: slli a0, a0, 41123; CHECK-NEXT: add a0, sp, a01124; CHECK-NEXT: addi a0, a0, 161125; CHECK-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill1126; CHECK-NEXT: csrr a0, vlenb1127; CHECK-NEXT: slli a0, a0, 31128; CHECK-NEXT: mv a1, a01129; CHECK-NEXT: slli a0, a0, 11130; CHECK-NEXT: add a0, a0, a11131; CHECK-NEXT: add a0, sp, a01132; CHECK-NEXT: addi a0, a0, 161133; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload1134; CHECK-NEXT: vfwcvtbf16.f.f.v v0, v241135; CHECK-NEXT: addi a0, sp, 161136; CHECK-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1137; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v161138; CHECK-NEXT: csrr a0, vlenb1139; CHECK-NEXT: slli a0, a0, 41140; CHECK-NEXT: add a0, sp, a01141; CHECK-NEXT: addi a0, a0, 161142; CHECK-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload1143; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma1144; CHECK-NEXT: vfmadd.vv v24, v0, v161145; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma1146; CHECK-NEXT: vfncvtbf16.f.f.w v8, v241147; CHECK-NEXT: csrr a0, vlenb1148; CHECK-NEXT: slli a0, a0, 31149; CHECK-NEXT: mv a1, a01150; CHECK-NEXT: slli a0, a0, 21151; CHECK-NEXT: add a0, a0, a11152; CHECK-NEXT: add sp, sp, a01153; CHECK-NEXT: .cfi_def_cfa sp, 161154; CHECK-NEXT: addi sp, sp, 161155; CHECK-NEXT: .cfi_def_cfa_offset 01156; CHECK-NEXT: ret1157 %elt.head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 01158 %vb = shufflevector <vscale x 32 x bfloat> %elt.head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer1159 %v = call <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vb, <vscale x 32 x bfloat> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)1160 ret <vscale x 32 x bfloat> %v1161}1162 1163define <vscale x 32 x bfloat> @vfma_vf_nxv32bf16_unmasked_commute(<vscale x 32 x bfloat> %va, bfloat %b, <vscale x 32 x bfloat> %vc, i32 zeroext %evl) {1164; CHECK-LABEL: vfma_vf_nxv32bf16_unmasked_commute:1165; CHECK: # %bb.0:1166; CHECK-NEXT: addi sp, sp, -161167; CHECK-NEXT: .cfi_def_cfa_offset 161168; CHECK-NEXT: csrr a1, vlenb1169; CHECK-NEXT: slli a1, a1, 51170; CHECK-NEXT: sub sp, sp, a11171; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb1172; CHECK-NEXT: csrr a1, vlenb1173; CHECK-NEXT: slli a1, a1, 31174; CHECK-NEXT: mv a2, a11175; CHECK-NEXT: slli a1, a1, 11176; CHECK-NEXT: add a1, a1, a21177; CHECK-NEXT: add a1, sp, a11178; CHECK-NEXT: addi a1, a1, 161179; CHECK-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill1180; CHECK-NEXT: fmv.x.h a1, fa01181; CHECK-NEXT: csrr a2, vlenb1182; CHECK-NEXT: vsetvli a3, zero, e16, m8, ta, ma1183; CHECK-NEXT: vmset.m v81184; CHECK-NEXT: vmv.v.x v24, a11185; CHECK-NEXT: slli a1, a2, 11186; CHECK-NEXT: srli a2, a2, 21187; CHECK-NEXT: sub a3, a0, a11188; CHECK-NEXT: vsetvli a4, zero, e8, mf2, ta, ma1189; CHECK-NEXT: vslidedown.vx v0, v8, a21190; CHECK-NEXT: sltu a2, a0, a31191; CHECK-NEXT: addi a2, a2, -11192; CHECK-NEXT: and a2, a2, a31193; CHECK-NEXT: csrr a3, vlenb1194; CHECK-NEXT: slli a3, a3, 41195; CHECK-NEXT: add a3, sp, a31196; CHECK-NEXT: addi a3, a3, 161197; CHECK-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill1198; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma1199; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v20, v0.t1200; CHECK-NEXT: addi a2, sp, 161201; CHECK-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill1202; CHECK-NEXT: csrr a2, vlenb1203; CHECK-NEXT: slli a2, a2, 31204; CHECK-NEXT: add a2, sp, a21205; CHECK-NEXT: addi a2, a2, 161206; CHECK-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill1207; CHECK-NEXT: vfwcvtbf16.f.f.v v16, v28, v0.t1208; CHECK-NEXT: csrr a2, vlenb1209; CHECK-NEXT: slli a2, a2, 31210; CHECK-NEXT: mv a3, a21211; CHECK-NEXT: slli a2, a2, 11212; CHECK-NEXT: add a2, a2, a31213; CHECK-NEXT: add a2, sp, a21214; CHECK-NEXT: addi a2, a2, 161215; CHECK-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload1216; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v28, v0.t1217; CHECK-NEXT: addi a2, sp, 161218; CHECK-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload1219; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma1220; CHECK-NEXT: vfmadd.vv v8, v16, v24, v0.t1221; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma1222; CHECK-NEXT: vfncvtbf16.f.f.w v20, v8, v0.t1223; CHECK-NEXT: bltu a0, a1, .LBB35_21224; CHECK-NEXT: # %bb.1:1225; CHECK-NEXT: mv a0, a11226; CHECK-NEXT: .LBB35_2:1227; CHECK-NEXT: csrr a1, vlenb1228; CHECK-NEXT: slli a1, a1, 41229; CHECK-NEXT: add a1, sp, a11230; CHECK-NEXT: addi a1, a1, 161231; CHECK-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload1232; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma1233; CHECK-NEXT: vfwcvtbf16.f.f.v v8, v241234; CHECK-NEXT: addi a0, sp, 161235; CHECK-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill1236; CHECK-NEXT: csrr a0, vlenb1237; CHECK-NEXT: slli a0, a0, 31238; CHECK-NEXT: mv a1, a01239; CHECK-NEXT: slli a0, a0, 11240; CHECK-NEXT: add a0, a0, a11241; CHECK-NEXT: add a0, sp, a01242; CHECK-NEXT: addi a0, a0, 161243; CHECK-NEXT: vl8r.v v0, (a0) # vscale x 64-byte Folded Reload1244; CHECK-NEXT: vfwcvtbf16.f.f.v v24, v01245; CHECK-NEXT: csrr a0, vlenb1246; CHECK-NEXT: slli a0, a0, 31247; CHECK-NEXT: add a0, sp, a01248; CHECK-NEXT: addi a0, a0, 161249; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1250; CHECK-NEXT: vfwcvtbf16.f.f.v v0, v81251; CHECK-NEXT: addi a0, sp, 161252; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload1253; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, ma1254; CHECK-NEXT: vfmadd.vv v0, v24, v81255; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, ma1256; CHECK-NEXT: vfncvtbf16.f.f.w v16, v01257; CHECK-NEXT: vmv8r.v v8, v161258; CHECK-NEXT: csrr a0, vlenb1259; CHECK-NEXT: slli a0, a0, 51260; CHECK-NEXT: add sp, sp, a01261; CHECK-NEXT: .cfi_def_cfa sp, 161262; CHECK-NEXT: addi sp, sp, 161263; CHECK-NEXT: .cfi_def_cfa_offset 01264; CHECK-NEXT: ret1265 %elt.head = insertelement <vscale x 32 x bfloat> poison, bfloat %b, i32 01266 %vb = shufflevector <vscale x 32 x bfloat> %elt.head, <vscale x 32 x bfloat> poison, <vscale x 32 x i32> zeroinitializer1267 %v = call <vscale x 32 x bfloat> @llvm.vp.fma.nxv32bf16(<vscale x 32 x bfloat> %vb, <vscale x 32 x bfloat> %va, <vscale x 32 x bfloat> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)1268 ret <vscale x 32 x bfloat> %v1269}1270 1271define <vscale x 1 x half> @vfma_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {1272; ZVFH-LABEL: vfma_vv_nxv1f16:1273; ZVFH: # %bb.0:1274; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1275; ZVFH-NEXT: vfmadd.vv v9, v8, v10, v0.t1276; ZVFH-NEXT: vmv1r.v v8, v91277; ZVFH-NEXT: ret1278;1279; ZVFHMIN-LABEL: vfma_vv_nxv1f16:1280; ZVFHMIN: # %bb.0:1281; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1282; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t1283; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t1284; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t1285; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1286; ZVFHMIN-NEXT: vfmadd.vv v12, v10, v11, v0.t1287; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1288; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t1289; ZVFHMIN-NEXT: ret1290 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)1291 ret <vscale x 1 x half> %v1292}1293 1294define <vscale x 1 x half> @vfma_vv_nxv1f16_unmasked(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, i32 zeroext %evl) {1295; ZVFH-LABEL: vfma_vv_nxv1f16_unmasked:1296; ZVFH: # %bb.0:1297; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1298; ZVFH-NEXT: vfmadd.vv v8, v9, v101299; ZVFH-NEXT: ret1300;1301; ZVFHMIN-LABEL: vfma_vv_nxv1f16_unmasked:1302; ZVFHMIN: # %bb.0:1303; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1304; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v101305; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v81306; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v91307; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1308; ZVFHMIN-NEXT: vfmadd.vv v12, v10, v111309; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1310; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v121311; ZVFHMIN-NEXT: ret1312 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)1313 ret <vscale x 1 x half> %v1314}1315 1316define <vscale x 1 x half> @vfma_vf_nxv1f16(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {1317; ZVFH-LABEL: vfma_vf_nxv1f16:1318; ZVFH: # %bb.0:1319; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1320; ZVFH-NEXT: vfmadd.vf v8, fa0, v9, v0.t1321; ZVFH-NEXT: ret1322;1323; ZVFHMIN-LABEL: vfma_vf_nxv1f16:1324; ZVFHMIN: # %bb.0:1325; ZVFHMIN-NEXT: fmv.x.h a1, fa01326; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1327; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t1328; ZVFHMIN-NEXT: vmv.v.x v9, a11329; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t1330; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t1331; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1332; ZVFHMIN-NEXT: vfmadd.vv v12, v11, v10, v0.t1333; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1334; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t1335; ZVFHMIN-NEXT: ret1336 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 01337 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer1338 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)1339 ret <vscale x 1 x half> %v1340}1341 1342define <vscale x 1 x half> @vfma_vf_nxv1f16_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {1343; ZVFH-LABEL: vfma_vf_nxv1f16_commute:1344; ZVFH: # %bb.0:1345; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1346; ZVFH-NEXT: vfmadd.vf v8, fa0, v9, v0.t1347; ZVFH-NEXT: ret1348;1349; ZVFHMIN-LABEL: vfma_vf_nxv1f16_commute:1350; ZVFHMIN: # %bb.0:1351; ZVFHMIN-NEXT: fmv.x.h a1, fa01352; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1353; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t1354; ZVFHMIN-NEXT: vmv.v.x v9, a11355; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t1356; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t1357; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1358; ZVFHMIN-NEXT: vfmadd.vv v11, v8, v10, v0.t1359; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1360; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v11, v0.t1361; ZVFHMIN-NEXT: ret1362 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 01363 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer1364 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %va, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)1365 ret <vscale x 1 x half> %v1366}1367 1368define <vscale x 1 x half> @vfma_vf_nxv1f16_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {1369; ZVFH-LABEL: vfma_vf_nxv1f16_unmasked:1370; ZVFH: # %bb.0:1371; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1372; ZVFH-NEXT: vfmadd.vf v8, fa0, v91373; ZVFH-NEXT: ret1374;1375; ZVFHMIN-LABEL: vfma_vf_nxv1f16_unmasked:1376; ZVFHMIN: # %bb.0:1377; ZVFHMIN-NEXT: fmv.x.h a1, fa01378; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1379; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v91380; ZVFHMIN-NEXT: vmv.v.x v9, a11381; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v81382; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v91383; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1384; ZVFHMIN-NEXT: vfmadd.vv v12, v11, v101385; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1386; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v121387; ZVFHMIN-NEXT: ret1388 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 01389 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer1390 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)1391 ret <vscale x 1 x half> %v1392}1393 1394define <vscale x 1 x half> @vfma_vf_nxv1f16_unmasked_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {1395; ZVFH-LABEL: vfma_vf_nxv1f16_unmasked_commute:1396; ZVFH: # %bb.0:1397; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1398; ZVFH-NEXT: vfmadd.vf v8, fa0, v91399; ZVFH-NEXT: ret1400;1401; ZVFHMIN-LABEL: vfma_vf_nxv1f16_unmasked_commute:1402; ZVFHMIN: # %bb.0:1403; ZVFHMIN-NEXT: fmv.x.h a1, fa01404; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma1405; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v91406; ZVFHMIN-NEXT: vmv.v.x v9, a11407; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v81408; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v91409; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma1410; ZVFHMIN-NEXT: vfmadd.vv v12, v11, v101411; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma1412; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v121413; ZVFHMIN-NEXT: ret1414 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 01415 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer1416 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %va, <vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)1417 ret <vscale x 1 x half> %v1418}1419 1420define <vscale x 2 x half> @vfma_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {1421; ZVFH-LABEL: vfma_vv_nxv2f16:1422; ZVFH: # %bb.0:1423; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1424; ZVFH-NEXT: vfmadd.vv v9, v8, v10, v0.t1425; ZVFH-NEXT: vmv1r.v v8, v91426; ZVFH-NEXT: ret1427;1428; ZVFHMIN-LABEL: vfma_vv_nxv2f16:1429; ZVFHMIN: # %bb.0:1430; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1431; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t1432; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t1433; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t1434; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma1435; ZVFHMIN-NEXT: vfmadd.vv v12, v10, v11, v0.t1436; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1437; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t1438; ZVFHMIN-NEXT: ret1439 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 %evl)1440 ret <vscale x 2 x half> %v1441}1442 1443define <vscale x 2 x half> @vfma_vv_nxv2f16_unmasked(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, i32 zeroext %evl) {1444; ZVFH-LABEL: vfma_vv_nxv2f16_unmasked:1445; ZVFH: # %bb.0:1446; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1447; ZVFH-NEXT: vfmadd.vv v8, v9, v101448; ZVFH-NEXT: ret1449;1450; ZVFHMIN-LABEL: vfma_vv_nxv2f16_unmasked:1451; ZVFHMIN: # %bb.0:1452; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1453; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v101454; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v81455; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v91456; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma1457; ZVFHMIN-NEXT: vfmadd.vv v12, v10, v111458; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1459; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v121460; ZVFHMIN-NEXT: ret1461 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)1462 ret <vscale x 2 x half> %v1463}1464 1465define <vscale x 2 x half> @vfma_vf_nxv2f16(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {1466; ZVFH-LABEL: vfma_vf_nxv2f16:1467; ZVFH: # %bb.0:1468; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1469; ZVFH-NEXT: vfmadd.vf v8, fa0, v9, v0.t1470; ZVFH-NEXT: ret1471;1472; ZVFHMIN-LABEL: vfma_vf_nxv2f16:1473; ZVFHMIN: # %bb.0:1474; ZVFHMIN-NEXT: fmv.x.h a1, fa01475; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1476; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t1477; ZVFHMIN-NEXT: vmv.v.x v9, a11478; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t1479; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t1480; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma1481; ZVFHMIN-NEXT: vfmadd.vv v12, v11, v10, v0.t1482; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1483; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t1484; ZVFHMIN-NEXT: ret1485 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 01486 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer1487 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)1488 ret <vscale x 2 x half> %v1489}1490 1491define <vscale x 2 x half> @vfma_vf_nxv2f16_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {1492; ZVFH-LABEL: vfma_vf_nxv2f16_commute:1493; ZVFH: # %bb.0:1494; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1495; ZVFH-NEXT: vfmadd.vf v8, fa0, v9, v0.t1496; ZVFH-NEXT: ret1497;1498; ZVFHMIN-LABEL: vfma_vf_nxv2f16_commute:1499; ZVFHMIN: # %bb.0:1500; ZVFHMIN-NEXT: fmv.x.h a1, fa01501; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1502; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t1503; ZVFHMIN-NEXT: vmv.v.x v9, a11504; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t1505; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t1506; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma1507; ZVFHMIN-NEXT: vfmadd.vv v11, v8, v10, v0.t1508; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1509; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v11, v0.t1510; ZVFHMIN-NEXT: ret1511 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 01512 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer1513 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %va, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)1514 ret <vscale x 2 x half> %v1515}1516 1517define <vscale x 2 x half> @vfma_vf_nxv2f16_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {1518; ZVFH-LABEL: vfma_vf_nxv2f16_unmasked:1519; ZVFH: # %bb.0:1520; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1521; ZVFH-NEXT: vfmadd.vf v8, fa0, v91522; ZVFH-NEXT: ret1523;1524; ZVFHMIN-LABEL: vfma_vf_nxv2f16_unmasked:1525; ZVFHMIN: # %bb.0:1526; ZVFHMIN-NEXT: fmv.x.h a1, fa01527; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1528; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v91529; ZVFHMIN-NEXT: vmv.v.x v9, a11530; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v81531; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v91532; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma1533; ZVFHMIN-NEXT: vfmadd.vv v12, v11, v101534; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1535; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v121536; ZVFHMIN-NEXT: ret1537 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 01538 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer1539 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)1540 ret <vscale x 2 x half> %v1541}1542 1543define <vscale x 2 x half> @vfma_vf_nxv2f16_unmasked_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {1544; ZVFH-LABEL: vfma_vf_nxv2f16_unmasked_commute:1545; ZVFH: # %bb.0:1546; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1547; ZVFH-NEXT: vfmadd.vf v8, fa0, v91548; ZVFH-NEXT: ret1549;1550; ZVFHMIN-LABEL: vfma_vf_nxv2f16_unmasked_commute:1551; ZVFHMIN: # %bb.0:1552; ZVFHMIN-NEXT: fmv.x.h a1, fa01553; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma1554; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v91555; ZVFHMIN-NEXT: vmv.v.x v9, a11556; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v81557; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v91558; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma1559; ZVFHMIN-NEXT: vfmadd.vv v12, v11, v101560; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma1561; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v121562; ZVFHMIN-NEXT: ret1563 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 01564 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer1565 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %va, <vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)1566 ret <vscale x 2 x half> %v1567}1568 1569define <vscale x 4 x half> @vfma_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {1570; ZVFH-LABEL: vfma_vv_nxv4f16:1571; ZVFH: # %bb.0:1572; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma1573; ZVFH-NEXT: vfmadd.vv v9, v8, v10, v0.t1574; ZVFH-NEXT: vmv.v.v v8, v91575; ZVFH-NEXT: ret1576;1577; ZVFHMIN-LABEL: vfma_vv_nxv4f16:1578; ZVFHMIN: # %bb.0:1579; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma1580; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t1581; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t1582; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v9, v0.t1583; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma1584; ZVFHMIN-NEXT: vfmadd.vv v14, v10, v12, v0.t1585; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma1586; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v14, v0.t1587; ZVFHMIN-NEXT: ret1588 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 %evl)1589 ret <vscale x 4 x half> %v1590}1591 1592define <vscale x 4 x half> @vfma_vv_nxv4f16_unmasked(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, i32 zeroext %evl) {1593; ZVFH-LABEL: vfma_vv_nxv4f16_unmasked:1594; ZVFH: # %bb.0:1595; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma1596; ZVFH-NEXT: vfmadd.vv v8, v9, v101597; ZVFH-NEXT: ret1598;1599; ZVFHMIN-LABEL: vfma_vv_nxv4f16_unmasked:1600; ZVFHMIN: # %bb.0:1601; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma1602; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v101603; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v81604; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v91605; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma1606; ZVFHMIN-NEXT: vfmadd.vv v14, v10, v121607; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma1608; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v141609; ZVFHMIN-NEXT: ret1610 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)1611 ret <vscale x 4 x half> %v1612}1613 1614define <vscale x 4 x half> @vfma_vf_nxv4f16(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {1615; ZVFH-LABEL: vfma_vf_nxv4f16:1616; ZVFH: # %bb.0:1617; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma1618; ZVFH-NEXT: vfmadd.vf v8, fa0, v9, v0.t1619; ZVFH-NEXT: ret1620;1621; ZVFHMIN-LABEL: vfma_vf_nxv4f16:1622; ZVFHMIN: # %bb.0:1623; ZVFHMIN-NEXT: fmv.x.h a1, fa01624; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma1625; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t1626; ZVFHMIN-NEXT: vmv.v.x v9, a11627; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t1628; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v9, v0.t1629; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma1630; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v10, v0.t1631; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma1632; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v14, v0.t1633; ZVFHMIN-NEXT: ret1634 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 01635 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer1636 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)1637 ret <vscale x 4 x half> %v1638}1639 1640define <vscale x 4 x half> @vfma_vf_nxv4f16_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {1641; ZVFH-LABEL: vfma_vf_nxv4f16_commute:1642; ZVFH: # %bb.0:1643; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma1644; ZVFH-NEXT: vfmadd.vf v8, fa0, v9, v0.t1645; ZVFH-NEXT: ret1646;1647; ZVFHMIN-LABEL: vfma_vf_nxv4f16_commute:1648; ZVFHMIN: # %bb.0:1649; ZVFHMIN-NEXT: fmv.x.h a1, fa01650; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma1651; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t1652; ZVFHMIN-NEXT: vmv.v.x v14, a11653; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t1654; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v14, v0.t1655; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma1656; ZVFHMIN-NEXT: vfmadd.vv v12, v8, v10, v0.t1657; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma1658; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t1659; ZVFHMIN-NEXT: ret1660 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 01661 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer1662 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %va, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)1663 ret <vscale x 4 x half> %v1664}1665 1666define <vscale x 4 x half> @vfma_vf_nxv4f16_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {1667; ZVFH-LABEL: vfma_vf_nxv4f16_unmasked:1668; ZVFH: # %bb.0:1669; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma1670; ZVFH-NEXT: vfmadd.vf v8, fa0, v91671; ZVFH-NEXT: ret1672;1673; ZVFHMIN-LABEL: vfma_vf_nxv4f16_unmasked:1674; ZVFHMIN: # %bb.0:1675; ZVFHMIN-NEXT: fmv.x.h a1, fa01676; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma1677; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v91678; ZVFHMIN-NEXT: vmv.v.x v9, a11679; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v81680; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v91681; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma1682; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v101683; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma1684; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v141685; ZVFHMIN-NEXT: ret1686 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 01687 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer1688 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)1689 ret <vscale x 4 x half> %v1690}1691 1692define <vscale x 4 x half> @vfma_vf_nxv4f16_unmasked_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {1693; ZVFH-LABEL: vfma_vf_nxv4f16_unmasked_commute:1694; ZVFH: # %bb.0:1695; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma1696; ZVFH-NEXT: vfmadd.vf v8, fa0, v91697; ZVFH-NEXT: ret1698;1699; ZVFHMIN-LABEL: vfma_vf_nxv4f16_unmasked_commute:1700; ZVFHMIN: # %bb.0:1701; ZVFHMIN-NEXT: fmv.x.h a1, fa01702; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma1703; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v91704; ZVFHMIN-NEXT: vmv.v.x v9, a11705; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v81706; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v91707; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma1708; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v101709; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma1710; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v141711; ZVFHMIN-NEXT: ret1712 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 01713 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer1714 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %va, <vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)1715 ret <vscale x 4 x half> %v1716}1717 1718define <vscale x 8 x half> @vfma_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {1719; ZVFH-LABEL: vfma_vv_nxv8f16:1720; ZVFH: # %bb.0:1721; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma1722; ZVFH-NEXT: vfmadd.vv v10, v8, v12, v0.t1723; ZVFH-NEXT: vmv.v.v v8, v101724; ZVFH-NEXT: ret1725;1726; ZVFHMIN-LABEL: vfma_vv_nxv8f16:1727; ZVFHMIN: # %bb.0:1728; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma1729; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t1730; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t1731; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v10, v0.t1732; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma1733; ZVFHMIN-NEXT: vfmadd.vv v20, v12, v16, v0.t1734; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma1735; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v20, v0.t1736; ZVFHMIN-NEXT: ret1737 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 %evl)1738 ret <vscale x 8 x half> %v1739}1740 1741define <vscale x 8 x half> @vfma_vv_nxv8f16_unmasked(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, i32 zeroext %evl) {1742; ZVFH-LABEL: vfma_vv_nxv8f16_unmasked:1743; ZVFH: # %bb.0:1744; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma1745; ZVFH-NEXT: vfmadd.vv v8, v10, v121746; ZVFH-NEXT: ret1747;1748; ZVFHMIN-LABEL: vfma_vv_nxv8f16_unmasked:1749; ZVFHMIN: # %bb.0:1750; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma1751; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v121752; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v81753; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v101754; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma1755; ZVFHMIN-NEXT: vfmadd.vv v20, v12, v161756; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma1757; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v201758; ZVFHMIN-NEXT: ret1759 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)1760 ret <vscale x 8 x half> %v1761}1762 1763define <vscale x 8 x half> @vfma_vf_nxv8f16(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {1764; ZVFH-LABEL: vfma_vf_nxv8f16:1765; ZVFH: # %bb.0:1766; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma1767; ZVFH-NEXT: vfmadd.vf v8, fa0, v10, v0.t1768; ZVFH-NEXT: ret1769;1770; ZVFHMIN-LABEL: vfma_vf_nxv8f16:1771; ZVFHMIN: # %bb.0:1772; ZVFHMIN-NEXT: fmv.x.h a1, fa01773; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma1774; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t1775; ZVFHMIN-NEXT: vmv.v.x v10, a11776; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t1777; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v10, v0.t1778; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma1779; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v12, v0.t1780; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma1781; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v20, v0.t1782; ZVFHMIN-NEXT: ret1783 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 01784 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer1785 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)1786 ret <vscale x 8 x half> %v1787}1788 1789define <vscale x 8 x half> @vfma_vf_nxv8f16_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {1790; ZVFH-LABEL: vfma_vf_nxv8f16_commute:1791; ZVFH: # %bb.0:1792; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma1793; ZVFH-NEXT: vfmadd.vf v8, fa0, v10, v0.t1794; ZVFH-NEXT: ret1795;1796; ZVFHMIN-LABEL: vfma_vf_nxv8f16_commute:1797; ZVFHMIN: # %bb.0:1798; ZVFHMIN-NEXT: fmv.x.h a1, fa01799; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma1800; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t1801; ZVFHMIN-NEXT: vmv.v.x v20, a11802; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t1803; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t1804; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma1805; ZVFHMIN-NEXT: vfmadd.vv v16, v8, v12, v0.t1806; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma1807; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t1808; ZVFHMIN-NEXT: ret1809 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 01810 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer1811 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %va, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)1812 ret <vscale x 8 x half> %v1813}1814 1815define <vscale x 8 x half> @vfma_vf_nxv8f16_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {1816; ZVFH-LABEL: vfma_vf_nxv8f16_unmasked:1817; ZVFH: # %bb.0:1818; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma1819; ZVFH-NEXT: vfmadd.vf v8, fa0, v101820; ZVFH-NEXT: ret1821;1822; ZVFHMIN-LABEL: vfma_vf_nxv8f16_unmasked:1823; ZVFHMIN: # %bb.0:1824; ZVFHMIN-NEXT: fmv.x.h a1, fa01825; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma1826; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v101827; ZVFHMIN-NEXT: vmv.v.x v10, a11828; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v81829; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v101830; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma1831; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v121832; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma1833; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v201834; ZVFHMIN-NEXT: ret1835 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 01836 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer1837 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)1838 ret <vscale x 8 x half> %v1839}1840 1841define <vscale x 8 x half> @vfma_vf_nxv8f16_unmasked_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {1842; ZVFH-LABEL: vfma_vf_nxv8f16_unmasked_commute:1843; ZVFH: # %bb.0:1844; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma1845; ZVFH-NEXT: vfmadd.vf v8, fa0, v101846; ZVFH-NEXT: ret1847;1848; ZVFHMIN-LABEL: vfma_vf_nxv8f16_unmasked_commute:1849; ZVFHMIN: # %bb.0:1850; ZVFHMIN-NEXT: fmv.x.h a1, fa01851; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma1852; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v101853; ZVFHMIN-NEXT: vmv.v.x v10, a11854; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v81855; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v101856; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma1857; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v121858; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma1859; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v201860; ZVFHMIN-NEXT: ret1861 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 01862 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer1863 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %va, <vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)1864 ret <vscale x 8 x half> %v1865}1866 1867define <vscale x 16 x half> @vfma_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {1868; ZVFH-LABEL: vfma_vv_nxv16f16:1869; ZVFH: # %bb.0:1870; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma1871; ZVFH-NEXT: vfmadd.vv v12, v8, v16, v0.t1872; ZVFH-NEXT: vmv.v.v v8, v121873; ZVFH-NEXT: ret1874;1875; ZVFHMIN-LABEL: vfma_vv_nxv16f16:1876; ZVFHMIN: # %bb.0:1877; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1878; ZVFHMIN-NEXT: vmv4r.v v4, v121879; ZVFHMIN-NEXT: vmv4r.v v20, v81880; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t1881; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t1882; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v4, v0.t1883; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1884; ZVFHMIN-NEXT: vfmadd.vv v16, v8, v24, v0.t1885; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1886; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t1887; ZVFHMIN-NEXT: ret1888 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 %evl)1889 ret <vscale x 16 x half> %v1890}1891 1892define <vscale x 16 x half> @vfma_vv_nxv16f16_unmasked(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, i32 zeroext %evl) {1893; ZVFH-LABEL: vfma_vv_nxv16f16_unmasked:1894; ZVFH: # %bb.0:1895; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma1896; ZVFH-NEXT: vfmadd.vv v8, v12, v161897; ZVFH-NEXT: ret1898;1899; ZVFHMIN-LABEL: vfma_vv_nxv16f16_unmasked:1900; ZVFHMIN: # %bb.0:1901; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1902; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v161903; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v81904; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v121905; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1906; ZVFHMIN-NEXT: vfmadd.vv v0, v16, v241907; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1908; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v01909; ZVFHMIN-NEXT: ret1910 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)1911 ret <vscale x 16 x half> %v1912}1913 1914define <vscale x 16 x half> @vfma_vf_nxv16f16(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {1915; ZVFH-LABEL: vfma_vf_nxv16f16:1916; ZVFH: # %bb.0:1917; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma1918; ZVFH-NEXT: vfmadd.vf v8, fa0, v12, v0.t1919; ZVFH-NEXT: ret1920;1921; ZVFHMIN-LABEL: vfma_vf_nxv16f16:1922; ZVFHMIN: # %bb.0:1923; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1924; ZVFHMIN-NEXT: vmv4r.v v16, v121925; ZVFHMIN-NEXT: vmv4r.v v20, v81926; ZVFHMIN-NEXT: fmv.x.h a0, fa01927; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t1928; ZVFHMIN-NEXT: vmv.v.x v4, a01929; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t1930; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v4, v0.t1931; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1932; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t1933; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1934; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t1935; ZVFHMIN-NEXT: ret1936 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 01937 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer1938 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)1939 ret <vscale x 16 x half> %v1940}1941 1942define <vscale x 16 x half> @vfma_vf_nxv16f16_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {1943; ZVFH-LABEL: vfma_vf_nxv16f16_commute:1944; ZVFH: # %bb.0:1945; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma1946; ZVFH-NEXT: vfmadd.vf v8, fa0, v12, v0.t1947; ZVFH-NEXT: ret1948;1949; ZVFHMIN-LABEL: vfma_vf_nxv16f16_commute:1950; ZVFHMIN: # %bb.0:1951; ZVFHMIN-NEXT: fmv.x.h a1, fa01952; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1953; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t1954; ZVFHMIN-NEXT: vmv.v.x v4, a11955; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t1956; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v4, v0.t1957; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1958; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t1959; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1960; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v24, v0.t1961; ZVFHMIN-NEXT: ret1962 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 01963 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer1964 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %va, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)1965 ret <vscale x 16 x half> %v1966}1967 1968define <vscale x 16 x half> @vfma_vf_nxv16f16_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {1969; ZVFH-LABEL: vfma_vf_nxv16f16_unmasked:1970; ZVFH: # %bb.0:1971; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma1972; ZVFH-NEXT: vfmadd.vf v8, fa0, v121973; ZVFH-NEXT: ret1974;1975; ZVFHMIN-LABEL: vfma_vf_nxv16f16_unmasked:1976; ZVFHMIN: # %bb.0:1977; ZVFHMIN-NEXT: fmv.x.h a1, fa01978; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma1979; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v121980; ZVFHMIN-NEXT: vmv.v.x v12, a11981; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v81982; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v121983; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma1984; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v161985; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma1986; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v01987; ZVFHMIN-NEXT: ret1988 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 01989 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer1990 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)1991 ret <vscale x 16 x half> %v1992}1993 1994define <vscale x 16 x half> @vfma_vf_nxv16f16_unmasked_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {1995; ZVFH-LABEL: vfma_vf_nxv16f16_unmasked_commute:1996; ZVFH: # %bb.0:1997; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma1998; ZVFH-NEXT: vfmadd.vf v8, fa0, v121999; ZVFH-NEXT: ret2000;2001; ZVFHMIN-LABEL: vfma_vf_nxv16f16_unmasked_commute:2002; ZVFHMIN: # %bb.0:2003; ZVFHMIN-NEXT: fmv.x.h a1, fa02004; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2005; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v122006; ZVFHMIN-NEXT: vmv.v.x v12, a12007; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v82008; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v122009; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2010; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v162011; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2012; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v02013; ZVFHMIN-NEXT: ret2014 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 02015 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer2016 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %va, <vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)2017 ret <vscale x 16 x half> %v2018}2019 2020define <vscale x 32 x half> @vfma_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {2021; ZVFH-LABEL: vfma_vv_nxv32f16:2022; ZVFH: # %bb.0:2023; ZVFH-NEXT: vl8re16.v v24, (a0)2024; ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma2025; ZVFH-NEXT: vfmadd.vv v16, v8, v24, v0.t2026; ZVFH-NEXT: vmv.v.v v8, v162027; ZVFH-NEXT: ret2028;2029; ZVFHMIN-LABEL: vfma_vv_nxv32f16:2030; ZVFHMIN: # %bb.0:2031; ZVFHMIN-NEXT: addi sp, sp, -162032; ZVFHMIN-NEXT: .cfi_def_cfa_offset 162033; ZVFHMIN-NEXT: csrr a2, vlenb2034; ZVFHMIN-NEXT: slli a2, a2, 52035; ZVFHMIN-NEXT: sub sp, sp, a22036; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb2037; ZVFHMIN-NEXT: vsetvli a2, zero, e8, mf2, ta, ma2038; ZVFHMIN-NEXT: vmv1r.v v3, v02039; ZVFHMIN-NEXT: csrr a2, vlenb2040; ZVFHMIN-NEXT: slli a2, a2, 32041; ZVFHMIN-NEXT: mv a3, a22042; ZVFHMIN-NEXT: slli a2, a2, 12043; ZVFHMIN-NEXT: add a2, a2, a32044; ZVFHMIN-NEXT: add a2, sp, a22045; ZVFHMIN-NEXT: addi a2, a2, 162046; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill2047; ZVFHMIN-NEXT: vl8re16.v v16, (a0)2048; ZVFHMIN-NEXT: csrr a2, vlenb2049; ZVFHMIN-NEXT: slli a0, a2, 12050; ZVFHMIN-NEXT: srli a2, a2, 22051; ZVFHMIN-NEXT: sub a3, a1, a02052; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a22053; ZVFHMIN-NEXT: sltu a2, a1, a32054; ZVFHMIN-NEXT: addi a2, a2, -12055; ZVFHMIN-NEXT: and a2, a2, a32056; ZVFHMIN-NEXT: csrr a3, vlenb2057; ZVFHMIN-NEXT: slli a3, a3, 32058; ZVFHMIN-NEXT: add a3, sp, a32059; ZVFHMIN-NEXT: addi a3, a3, 162060; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill2061; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma2062; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t2063; ZVFHMIN-NEXT: addi a2, sp, 162064; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill2065; ZVFHMIN-NEXT: csrr a2, vlenb2066; ZVFHMIN-NEXT: slli a2, a2, 42067; ZVFHMIN-NEXT: add a2, sp, a22068; ZVFHMIN-NEXT: addi a2, a2, 162069; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill2070; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t2071; ZVFHMIN-NEXT: csrr a2, vlenb2072; ZVFHMIN-NEXT: slli a2, a2, 32073; ZVFHMIN-NEXT: mv a3, a22074; ZVFHMIN-NEXT: slli a2, a2, 12075; ZVFHMIN-NEXT: add a2, a2, a32076; ZVFHMIN-NEXT: add a2, sp, a22077; ZVFHMIN-NEXT: addi a2, a2, 162078; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload2079; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t2080; ZVFHMIN-NEXT: addi a2, sp, 162081; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload2082; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2083; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t2084; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2085; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v8, v0.t2086; ZVFHMIN-NEXT: bltu a1, a0, .LBB66_22087; ZVFHMIN-NEXT: # %bb.1:2088; ZVFHMIN-NEXT: mv a1, a02089; ZVFHMIN-NEXT: .LBB66_2:2090; ZVFHMIN-NEXT: vmv1r.v v0, v32091; ZVFHMIN-NEXT: csrr a0, vlenb2092; ZVFHMIN-NEXT: slli a0, a0, 32093; ZVFHMIN-NEXT: add a0, sp, a02094; ZVFHMIN-NEXT: addi a0, a0, 162095; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload2096; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m4, ta, ma2097; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t2098; ZVFHMIN-NEXT: addi a0, sp, 162099; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill2100; ZVFHMIN-NEXT: csrr a0, vlenb2101; ZVFHMIN-NEXT: slli a0, a0, 42102; ZVFHMIN-NEXT: add a0, sp, a02103; ZVFHMIN-NEXT: addi a0, a0, 162104; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload2105; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t2106; ZVFHMIN-NEXT: csrr a0, vlenb2107; ZVFHMIN-NEXT: slli a0, a0, 32108; ZVFHMIN-NEXT: add a0, sp, a02109; ZVFHMIN-NEXT: addi a0, a0, 162110; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill2111; ZVFHMIN-NEXT: csrr a0, vlenb2112; ZVFHMIN-NEXT: slli a0, a0, 32113; ZVFHMIN-NEXT: mv a1, a02114; ZVFHMIN-NEXT: slli a0, a0, 12115; ZVFHMIN-NEXT: add a0, a0, a12116; ZVFHMIN-NEXT: add a0, sp, a02117; ZVFHMIN-NEXT: addi a0, a0, 162118; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload2119; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v24, v0.t2120; ZVFHMIN-NEXT: addi a0, sp, 162121; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload2122; ZVFHMIN-NEXT: csrr a0, vlenb2123; ZVFHMIN-NEXT: slli a0, a0, 32124; ZVFHMIN-NEXT: add a0, sp, a02125; ZVFHMIN-NEXT: addi a0, a0, 162126; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload2127; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2128; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t2129; ZVFHMIN-NEXT: vmv.v.v v16, v82130; ZVFHMIN-NEXT: vmv4r.v v12, v42131; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2132; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t2133; ZVFHMIN-NEXT: csrr a0, vlenb2134; ZVFHMIN-NEXT: slli a0, a0, 52135; ZVFHMIN-NEXT: add sp, sp, a02136; ZVFHMIN-NEXT: .cfi_def_cfa sp, 162137; ZVFHMIN-NEXT: addi sp, sp, 162138; ZVFHMIN-NEXT: .cfi_def_cfa_offset 02139; ZVFHMIN-NEXT: ret2140 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 %evl)2141 ret <vscale x 32 x half> %v2142}2143 2144define <vscale x 32 x half> @vfma_vv_nxv32f16_unmasked(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, i32 zeroext %evl) {2145; ZVFH-LABEL: vfma_vv_nxv32f16_unmasked:2146; ZVFH: # %bb.0:2147; ZVFH-NEXT: vl8re16.v v24, (a0)2148; ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma2149; ZVFH-NEXT: vfmadd.vv v8, v16, v242150; ZVFH-NEXT: ret2151;2152; ZVFHMIN-LABEL: vfma_vv_nxv32f16_unmasked:2153; ZVFHMIN: # %bb.0:2154; ZVFHMIN-NEXT: addi sp, sp, -162155; ZVFHMIN-NEXT: .cfi_def_cfa_offset 162156; ZVFHMIN-NEXT: csrr a2, vlenb2157; ZVFHMIN-NEXT: slli a2, a2, 52158; ZVFHMIN-NEXT: sub sp, sp, a22159; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb2160; ZVFHMIN-NEXT: csrr a2, vlenb2161; ZVFHMIN-NEXT: slli a2, a2, 32162; ZVFHMIN-NEXT: mv a3, a22163; ZVFHMIN-NEXT: slli a2, a2, 12164; ZVFHMIN-NEXT: add a2, a2, a32165; ZVFHMIN-NEXT: add a2, sp, a22166; ZVFHMIN-NEXT: addi a2, a2, 162167; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill2168; ZVFHMIN-NEXT: vl8re16.v v16, (a0)2169; ZVFHMIN-NEXT: csrr a2, vlenb2170; ZVFHMIN-NEXT: vsetvli a0, zero, e8, m4, ta, ma2171; ZVFHMIN-NEXT: vmset.m v242172; ZVFHMIN-NEXT: slli a0, a2, 12173; ZVFHMIN-NEXT: srli a2, a2, 22174; ZVFHMIN-NEXT: sub a3, a1, a02175; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma2176; ZVFHMIN-NEXT: vslidedown.vx v0, v24, a22177; ZVFHMIN-NEXT: sltu a2, a1, a32178; ZVFHMIN-NEXT: addi a2, a2, -12179; ZVFHMIN-NEXT: and a2, a2, a32180; ZVFHMIN-NEXT: csrr a3, vlenb2181; ZVFHMIN-NEXT: slli a3, a3, 32182; ZVFHMIN-NEXT: add a3, sp, a32183; ZVFHMIN-NEXT: addi a3, a3, 162184; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill2185; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma2186; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t2187; ZVFHMIN-NEXT: addi a2, sp, 162188; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill2189; ZVFHMIN-NEXT: csrr a2, vlenb2190; ZVFHMIN-NEXT: slli a2, a2, 42191; ZVFHMIN-NEXT: add a2, sp, a22192; ZVFHMIN-NEXT: addi a2, a2, 162193; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill2194; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t2195; ZVFHMIN-NEXT: csrr a2, vlenb2196; ZVFHMIN-NEXT: slli a2, a2, 32197; ZVFHMIN-NEXT: mv a3, a22198; ZVFHMIN-NEXT: slli a2, a2, 12199; ZVFHMIN-NEXT: add a2, a2, a32200; ZVFHMIN-NEXT: add a2, sp, a22201; ZVFHMIN-NEXT: addi a2, a2, 162202; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload2203; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t2204; ZVFHMIN-NEXT: addi a2, sp, 162205; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload2206; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2207; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t2208; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2209; ZVFHMIN-NEXT: vfncvt.f.f.w v20, v8, v0.t2210; ZVFHMIN-NEXT: bltu a1, a0, .LBB67_22211; ZVFHMIN-NEXT: # %bb.1:2212; ZVFHMIN-NEXT: mv a1, a02213; ZVFHMIN-NEXT: .LBB67_2:2214; ZVFHMIN-NEXT: csrr a0, vlenb2215; ZVFHMIN-NEXT: slli a0, a0, 32216; ZVFHMIN-NEXT: add a0, sp, a02217; ZVFHMIN-NEXT: addi a0, a0, 162218; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload2219; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m4, ta, ma2220; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v82221; ZVFHMIN-NEXT: addi a0, sp, 162222; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill2223; ZVFHMIN-NEXT: csrr a0, vlenb2224; ZVFHMIN-NEXT: slli a0, a0, 42225; ZVFHMIN-NEXT: add a0, sp, a02226; ZVFHMIN-NEXT: addi a0, a0, 162227; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload2228; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v82229; ZVFHMIN-NEXT: csrr a0, vlenb2230; ZVFHMIN-NEXT: slli a0, a0, 32231; ZVFHMIN-NEXT: mv a1, a02232; ZVFHMIN-NEXT: slli a0, a0, 12233; ZVFHMIN-NEXT: add a0, a0, a12234; ZVFHMIN-NEXT: add a0, sp, a02235; ZVFHMIN-NEXT: addi a0, a0, 162236; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload2237; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v82238; ZVFHMIN-NEXT: addi a0, sp, 162239; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload2240; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2241; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v82242; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2243; ZVFHMIN-NEXT: vfncvt.f.f.w v16, v02244; ZVFHMIN-NEXT: vmv8r.v v8, v162245; ZVFHMIN-NEXT: csrr a0, vlenb2246; ZVFHMIN-NEXT: slli a0, a0, 52247; ZVFHMIN-NEXT: add sp, sp, a02248; ZVFHMIN-NEXT: .cfi_def_cfa sp, 162249; ZVFHMIN-NEXT: addi sp, sp, 162250; ZVFHMIN-NEXT: .cfi_def_cfa_offset 02251; ZVFHMIN-NEXT: ret2252 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)2253 ret <vscale x 32 x half> %v2254}2255 2256define <vscale x 32 x half> @vfma_vf_nxv32f16(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {2257; ZVFH-LABEL: vfma_vf_nxv32f16:2258; ZVFH: # %bb.0:2259; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma2260; ZVFH-NEXT: vfmadd.vf v8, fa0, v16, v0.t2261; ZVFH-NEXT: ret2262;2263; ZVFHMIN-LABEL: vfma_vf_nxv32f16:2264; ZVFHMIN: # %bb.0:2265; ZVFHMIN-NEXT: addi sp, sp, -162266; ZVFHMIN-NEXT: .cfi_def_cfa_offset 162267; ZVFHMIN-NEXT: csrr a1, vlenb2268; ZVFHMIN-NEXT: slli a1, a1, 52269; ZVFHMIN-NEXT: sub sp, sp, a12270; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb2271; ZVFHMIN-NEXT: vsetvli a1, zero, e8, mf2, ta, ma2272; ZVFHMIN-NEXT: vmv1r.v v3, v02273; ZVFHMIN-NEXT: vmv8r.v v24, v82274; ZVFHMIN-NEXT: fmv.x.h a2, fa02275; ZVFHMIN-NEXT: csrr a3, vlenb2276; ZVFHMIN-NEXT: slli a1, a3, 12277; ZVFHMIN-NEXT: srli a3, a3, 22278; ZVFHMIN-NEXT: sub a4, a0, a12279; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a32280; ZVFHMIN-NEXT: sltu a3, a0, a42281; ZVFHMIN-NEXT: addi a3, a3, -12282; ZVFHMIN-NEXT: and a3, a3, a42283; ZVFHMIN-NEXT: csrr a4, vlenb2284; ZVFHMIN-NEXT: slli a4, a4, 32285; ZVFHMIN-NEXT: add a4, sp, a42286; ZVFHMIN-NEXT: addi a4, a4, 162287; ZVFHMIN-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill2288; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma2289; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t2290; ZVFHMIN-NEXT: addi a4, sp, 162291; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill2292; ZVFHMIN-NEXT: csrr a4, vlenb2293; ZVFHMIN-NEXT: slli a4, a4, 32294; ZVFHMIN-NEXT: mv a5, a42295; ZVFHMIN-NEXT: slli a4, a4, 12296; ZVFHMIN-NEXT: add a4, a4, a52297; ZVFHMIN-NEXT: add a4, sp, a42298; ZVFHMIN-NEXT: addi a4, a4, 162299; ZVFHMIN-NEXT: vs8r.v v24, (a4) # vscale x 64-byte Folded Spill2300; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v28, v0.t2301; ZVFHMIN-NEXT: vsetvli a4, zero, e16, m8, ta, ma2302; ZVFHMIN-NEXT: vmv.v.x v8, a22303; ZVFHMIN-NEXT: csrr a2, vlenb2304; ZVFHMIN-NEXT: slli a2, a2, 42305; ZVFHMIN-NEXT: add a2, sp, a22306; ZVFHMIN-NEXT: addi a2, a2, 162307; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill2308; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma2309; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t2310; ZVFHMIN-NEXT: addi a2, sp, 162311; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload2312; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2313; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v8, v0.t2314; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2315; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v24, v0.t2316; ZVFHMIN-NEXT: bltu a0, a1, .LBB68_22317; ZVFHMIN-NEXT: # %bb.1:2318; ZVFHMIN-NEXT: mv a0, a12319; ZVFHMIN-NEXT: .LBB68_2:2320; ZVFHMIN-NEXT: vmv1r.v v0, v32321; ZVFHMIN-NEXT: csrr a1, vlenb2322; ZVFHMIN-NEXT: slli a1, a1, 32323; ZVFHMIN-NEXT: add a1, sp, a12324; ZVFHMIN-NEXT: addi a1, a1, 162325; ZVFHMIN-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload2326; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2327; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t2328; ZVFHMIN-NEXT: addi a0, sp, 162329; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill2330; ZVFHMIN-NEXT: csrr a0, vlenb2331; ZVFHMIN-NEXT: slli a0, a0, 32332; ZVFHMIN-NEXT: mv a1, a02333; ZVFHMIN-NEXT: slli a0, a0, 12334; ZVFHMIN-NEXT: add a0, a0, a12335; ZVFHMIN-NEXT: add a0, sp, a02336; ZVFHMIN-NEXT: addi a0, a0, 162337; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload2338; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t2339; ZVFHMIN-NEXT: csrr a0, vlenb2340; ZVFHMIN-NEXT: slli a0, a0, 32341; ZVFHMIN-NEXT: add a0, sp, a02342; ZVFHMIN-NEXT: addi a0, a0, 162343; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill2344; ZVFHMIN-NEXT: csrr a0, vlenb2345; ZVFHMIN-NEXT: slli a0, a0, 42346; ZVFHMIN-NEXT: add a0, sp, a02347; ZVFHMIN-NEXT: addi a0, a0, 162348; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload2349; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v24, v0.t2350; ZVFHMIN-NEXT: addi a0, sp, 162351; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload2352; ZVFHMIN-NEXT: csrr a0, vlenb2353; ZVFHMIN-NEXT: slli a0, a0, 32354; ZVFHMIN-NEXT: add a0, sp, a02355; ZVFHMIN-NEXT: addi a0, a0, 162356; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload2357; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2358; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t2359; ZVFHMIN-NEXT: vmv.v.v v16, v82360; ZVFHMIN-NEXT: vmv4r.v v12, v42361; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2362; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t2363; ZVFHMIN-NEXT: csrr a0, vlenb2364; ZVFHMIN-NEXT: slli a0, a0, 52365; ZVFHMIN-NEXT: add sp, sp, a02366; ZVFHMIN-NEXT: .cfi_def_cfa sp, 162367; ZVFHMIN-NEXT: addi sp, sp, 162368; ZVFHMIN-NEXT: .cfi_def_cfa_offset 02369; ZVFHMIN-NEXT: ret2370 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 02371 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer2372 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)2373 ret <vscale x 32 x half> %v2374}2375 2376define <vscale x 32 x half> @vfma_vf_nxv32f16_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {2377; ZVFH-LABEL: vfma_vf_nxv32f16_commute:2378; ZVFH: # %bb.0:2379; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma2380; ZVFH-NEXT: vfmadd.vf v8, fa0, v16, v0.t2381; ZVFH-NEXT: ret2382;2383; ZVFHMIN-LABEL: vfma_vf_nxv32f16_commute:2384; ZVFHMIN: # %bb.0:2385; ZVFHMIN-NEXT: addi sp, sp, -162386; ZVFHMIN-NEXT: .cfi_def_cfa_offset 162387; ZVFHMIN-NEXT: csrr a1, vlenb2388; ZVFHMIN-NEXT: slli a1, a1, 52389; ZVFHMIN-NEXT: sub sp, sp, a12390; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb2391; ZVFHMIN-NEXT: vsetvli a1, zero, e16, m8, ta, ma2392; ZVFHMIN-NEXT: vmv1r.v v3, v02393; ZVFHMIN-NEXT: csrr a1, vlenb2394; ZVFHMIN-NEXT: slli a1, a1, 32395; ZVFHMIN-NEXT: mv a2, a12396; ZVFHMIN-NEXT: slli a1, a1, 12397; ZVFHMIN-NEXT: add a1, a1, a22398; ZVFHMIN-NEXT: add a1, sp, a12399; ZVFHMIN-NEXT: addi a1, a1, 162400; ZVFHMIN-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill2401; ZVFHMIN-NEXT: fmv.x.h a1, fa02402; ZVFHMIN-NEXT: csrr a2, vlenb2403; ZVFHMIN-NEXT: vmv.v.x v8, a12404; ZVFHMIN-NEXT: slli a1, a2, 12405; ZVFHMIN-NEXT: srli a2, a2, 22406; ZVFHMIN-NEXT: sub a3, a0, a12407; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma2408; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a22409; ZVFHMIN-NEXT: sltu a2, a0, a32410; ZVFHMIN-NEXT: addi a2, a2, -12411; ZVFHMIN-NEXT: and a2, a2, a32412; ZVFHMIN-NEXT: csrr a3, vlenb2413; ZVFHMIN-NEXT: slli a3, a3, 42414; ZVFHMIN-NEXT: add a3, sp, a32415; ZVFHMIN-NEXT: addi a3, a3, 162416; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill2417; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma2418; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t2419; ZVFHMIN-NEXT: addi a2, sp, 162420; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill2421; ZVFHMIN-NEXT: csrr a2, vlenb2422; ZVFHMIN-NEXT: slli a2, a2, 32423; ZVFHMIN-NEXT: add a2, sp, a22424; ZVFHMIN-NEXT: addi a2, a2, 162425; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill2426; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t2427; ZVFHMIN-NEXT: csrr a2, vlenb2428; ZVFHMIN-NEXT: slli a2, a2, 32429; ZVFHMIN-NEXT: mv a3, a22430; ZVFHMIN-NEXT: slli a2, a2, 12431; ZVFHMIN-NEXT: add a2, a2, a32432; ZVFHMIN-NEXT: add a2, sp, a22433; ZVFHMIN-NEXT: addi a2, a2, 162434; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload2435; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t2436; ZVFHMIN-NEXT: addi a2, sp, 162437; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload2438; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2439; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t2440; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2441; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v8, v0.t2442; ZVFHMIN-NEXT: bltu a0, a1, .LBB69_22443; ZVFHMIN-NEXT: # %bb.1:2444; ZVFHMIN-NEXT: mv a0, a12445; ZVFHMIN-NEXT: .LBB69_2:2446; ZVFHMIN-NEXT: vmv1r.v v0, v32447; ZVFHMIN-NEXT: csrr a1, vlenb2448; ZVFHMIN-NEXT: slli a1, a1, 42449; ZVFHMIN-NEXT: add a1, sp, a12450; ZVFHMIN-NEXT: addi a1, a1, 162451; ZVFHMIN-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload2452; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2453; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t2454; ZVFHMIN-NEXT: addi a0, sp, 162455; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill2456; ZVFHMIN-NEXT: csrr a0, vlenb2457; ZVFHMIN-NEXT: slli a0, a0, 32458; ZVFHMIN-NEXT: mv a1, a02459; ZVFHMIN-NEXT: slli a0, a0, 12460; ZVFHMIN-NEXT: add a0, a0, a12461; ZVFHMIN-NEXT: add a0, sp, a02462; ZVFHMIN-NEXT: addi a0, a0, 162463; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload2464; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t2465; ZVFHMIN-NEXT: csrr a0, vlenb2466; ZVFHMIN-NEXT: slli a0, a0, 32467; ZVFHMIN-NEXT: add a0, sp, a02468; ZVFHMIN-NEXT: addi a0, a0, 162469; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload2470; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t2471; ZVFHMIN-NEXT: csrr a0, vlenb2472; ZVFHMIN-NEXT: slli a0, a0, 32473; ZVFHMIN-NEXT: mv a1, a02474; ZVFHMIN-NEXT: slli a0, a0, 12475; ZVFHMIN-NEXT: add a0, a0, a12476; ZVFHMIN-NEXT: add a0, sp, a02477; ZVFHMIN-NEXT: addi a0, a0, 162478; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill2479; ZVFHMIN-NEXT: addi a0, sp, 162480; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload2481; ZVFHMIN-NEXT: csrr a0, vlenb2482; ZVFHMIN-NEXT: slli a0, a0, 32483; ZVFHMIN-NEXT: mv a1, a02484; ZVFHMIN-NEXT: slli a0, a0, 12485; ZVFHMIN-NEXT: add a0, a0, a12486; ZVFHMIN-NEXT: add a0, sp, a02487; ZVFHMIN-NEXT: addi a0, a0, 162488; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload2489; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2490; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t2491; ZVFHMIN-NEXT: vmv4r.v v12, v42492; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2493; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t2494; ZVFHMIN-NEXT: csrr a0, vlenb2495; ZVFHMIN-NEXT: slli a0, a0, 52496; ZVFHMIN-NEXT: add sp, sp, a02497; ZVFHMIN-NEXT: .cfi_def_cfa sp, 162498; ZVFHMIN-NEXT: addi sp, sp, 162499; ZVFHMIN-NEXT: .cfi_def_cfa_offset 02500; ZVFHMIN-NEXT: ret2501 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 02502 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer2503 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %va, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)2504 ret <vscale x 32 x half> %v2505}2506 2507define <vscale x 32 x half> @vfma_vf_nxv32f16_unmasked(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {2508; ZVFH-LABEL: vfma_vf_nxv32f16_unmasked:2509; ZVFH: # %bb.0:2510; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma2511; ZVFH-NEXT: vfmadd.vf v8, fa0, v162512; ZVFH-NEXT: ret2513;2514; ZVFHMIN-LABEL: vfma_vf_nxv32f16_unmasked:2515; ZVFHMIN: # %bb.0:2516; ZVFHMIN-NEXT: addi sp, sp, -162517; ZVFHMIN-NEXT: .cfi_def_cfa_offset 162518; ZVFHMIN-NEXT: csrr a1, vlenb2519; ZVFHMIN-NEXT: slli a1, a1, 32520; ZVFHMIN-NEXT: mv a2, a12521; ZVFHMIN-NEXT: slli a1, a1, 22522; ZVFHMIN-NEXT: add a1, a1, a22523; ZVFHMIN-NEXT: sub sp, sp, a12524; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb2525; ZVFHMIN-NEXT: vsetvli a1, zero, e8, m4, ta, ma2526; ZVFHMIN-NEXT: vmv8r.v v24, v82527; ZVFHMIN-NEXT: fmv.x.h a2, fa02528; ZVFHMIN-NEXT: csrr a3, vlenb2529; ZVFHMIN-NEXT: vmset.m v82530; ZVFHMIN-NEXT: slli a1, a3, 12531; ZVFHMIN-NEXT: srli a3, a3, 22532; ZVFHMIN-NEXT: sub a4, a0, a12533; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma2534; ZVFHMIN-NEXT: vslidedown.vx v0, v8, a32535; ZVFHMIN-NEXT: sltu a3, a0, a42536; ZVFHMIN-NEXT: addi a3, a3, -12537; ZVFHMIN-NEXT: and a3, a3, a42538; ZVFHMIN-NEXT: csrr a4, vlenb2539; ZVFHMIN-NEXT: slli a4, a4, 52540; ZVFHMIN-NEXT: add a4, sp, a42541; ZVFHMIN-NEXT: addi a4, a4, 162542; ZVFHMIN-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill2543; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma2544; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t2545; ZVFHMIN-NEXT: csrr a4, vlenb2546; ZVFHMIN-NEXT: slli a4, a4, 42547; ZVFHMIN-NEXT: add a4, sp, a42548; ZVFHMIN-NEXT: addi a4, a4, 162549; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill2550; ZVFHMIN-NEXT: csrr a4, vlenb2551; ZVFHMIN-NEXT: slli a4, a4, 32552; ZVFHMIN-NEXT: mv a5, a42553; ZVFHMIN-NEXT: slli a4, a4, 12554; ZVFHMIN-NEXT: add a4, a4, a52555; ZVFHMIN-NEXT: add a4, sp, a42556; ZVFHMIN-NEXT: addi a4, a4, 162557; ZVFHMIN-NEXT: vs8r.v v24, (a4) # vscale x 64-byte Folded Spill2558; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t2559; ZVFHMIN-NEXT: csrr a4, vlenb2560; ZVFHMIN-NEXT: slli a4, a4, 32561; ZVFHMIN-NEXT: add a4, sp, a42562; ZVFHMIN-NEXT: addi a4, a4, 162563; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill2564; ZVFHMIN-NEXT: vsetvli a4, zero, e16, m8, ta, ma2565; ZVFHMIN-NEXT: vmv.v.x v8, a22566; ZVFHMIN-NEXT: addi a2, sp, 162567; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill2568; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma2569; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t2570; ZVFHMIN-NEXT: csrr a2, vlenb2571; ZVFHMIN-NEXT: slli a2, a2, 42572; ZVFHMIN-NEXT: add a2, sp, a22573; ZVFHMIN-NEXT: addi a2, a2, 162574; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload2575; ZVFHMIN-NEXT: csrr a2, vlenb2576; ZVFHMIN-NEXT: slli a2, a2, 32577; ZVFHMIN-NEXT: add a2, sp, a22578; ZVFHMIN-NEXT: addi a2, a2, 162579; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload2580; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2581; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v8, v0.t2582; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2583; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v24, v0.t2584; ZVFHMIN-NEXT: bltu a0, a1, .LBB70_22585; ZVFHMIN-NEXT: # %bb.1:2586; ZVFHMIN-NEXT: mv a0, a12587; ZVFHMIN-NEXT: .LBB70_2:2588; ZVFHMIN-NEXT: csrr a1, vlenb2589; ZVFHMIN-NEXT: slli a1, a1, 52590; ZVFHMIN-NEXT: add a1, sp, a12591; ZVFHMIN-NEXT: addi a1, a1, 162592; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload2593; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2594; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v242595; ZVFHMIN-NEXT: csrr a0, vlenb2596; ZVFHMIN-NEXT: slli a0, a0, 42597; ZVFHMIN-NEXT: add a0, sp, a02598; ZVFHMIN-NEXT: addi a0, a0, 162599; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill2600; ZVFHMIN-NEXT: csrr a0, vlenb2601; ZVFHMIN-NEXT: slli a0, a0, 32602; ZVFHMIN-NEXT: mv a1, a02603; ZVFHMIN-NEXT: slli a0, a0, 12604; ZVFHMIN-NEXT: add a0, a0, a12605; ZVFHMIN-NEXT: add a0, sp, a02606; ZVFHMIN-NEXT: addi a0, a0, 162607; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload2608; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v242609; ZVFHMIN-NEXT: addi a0, sp, 162610; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload2611; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v162612; ZVFHMIN-NEXT: csrr a0, vlenb2613; ZVFHMIN-NEXT: slli a0, a0, 42614; ZVFHMIN-NEXT: add a0, sp, a02615; ZVFHMIN-NEXT: addi a0, a0, 162616; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload2617; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2618; ZVFHMIN-NEXT: vfmadd.vv v24, v0, v162619; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2620; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v242621; ZVFHMIN-NEXT: csrr a0, vlenb2622; ZVFHMIN-NEXT: slli a0, a0, 32623; ZVFHMIN-NEXT: mv a1, a02624; ZVFHMIN-NEXT: slli a0, a0, 22625; ZVFHMIN-NEXT: add a0, a0, a12626; ZVFHMIN-NEXT: add sp, sp, a02627; ZVFHMIN-NEXT: .cfi_def_cfa sp, 162628; ZVFHMIN-NEXT: addi sp, sp, 162629; ZVFHMIN-NEXT: .cfi_def_cfa_offset 02630; ZVFHMIN-NEXT: ret2631 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 02632 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer2633 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)2634 ret <vscale x 32 x half> %v2635}2636 2637define <vscale x 32 x half> @vfma_vf_nxv32f16_unmasked_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {2638; ZVFH-LABEL: vfma_vf_nxv32f16_unmasked_commute:2639; ZVFH: # %bb.0:2640; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma2641; ZVFH-NEXT: vfmadd.vf v8, fa0, v162642; ZVFH-NEXT: ret2643;2644; ZVFHMIN-LABEL: vfma_vf_nxv32f16_unmasked_commute:2645; ZVFHMIN: # %bb.0:2646; ZVFHMIN-NEXT: addi sp, sp, -162647; ZVFHMIN-NEXT: .cfi_def_cfa_offset 162648; ZVFHMIN-NEXT: csrr a1, vlenb2649; ZVFHMIN-NEXT: slli a1, a1, 52650; ZVFHMIN-NEXT: sub sp, sp, a12651; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb2652; ZVFHMIN-NEXT: csrr a1, vlenb2653; ZVFHMIN-NEXT: slli a1, a1, 32654; ZVFHMIN-NEXT: mv a2, a12655; ZVFHMIN-NEXT: slli a1, a1, 12656; ZVFHMIN-NEXT: add a1, a1, a22657; ZVFHMIN-NEXT: add a1, sp, a12658; ZVFHMIN-NEXT: addi a1, a1, 162659; ZVFHMIN-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill2660; ZVFHMIN-NEXT: fmv.x.h a1, fa02661; ZVFHMIN-NEXT: csrr a2, vlenb2662; ZVFHMIN-NEXT: vsetvli a3, zero, e16, m8, ta, ma2663; ZVFHMIN-NEXT: vmset.m v82664; ZVFHMIN-NEXT: vmv.v.x v24, a12665; ZVFHMIN-NEXT: slli a1, a2, 12666; ZVFHMIN-NEXT: srli a2, a2, 22667; ZVFHMIN-NEXT: sub a3, a0, a12668; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma2669; ZVFHMIN-NEXT: vslidedown.vx v0, v8, a22670; ZVFHMIN-NEXT: sltu a2, a0, a32671; ZVFHMIN-NEXT: addi a2, a2, -12672; ZVFHMIN-NEXT: and a2, a2, a32673; ZVFHMIN-NEXT: csrr a3, vlenb2674; ZVFHMIN-NEXT: slli a3, a3, 42675; ZVFHMIN-NEXT: add a3, sp, a32676; ZVFHMIN-NEXT: addi a3, a3, 162677; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill2678; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma2679; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t2680; ZVFHMIN-NEXT: addi a2, sp, 162681; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill2682; ZVFHMIN-NEXT: csrr a2, vlenb2683; ZVFHMIN-NEXT: slli a2, a2, 32684; ZVFHMIN-NEXT: add a2, sp, a22685; ZVFHMIN-NEXT: addi a2, a2, 162686; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill2687; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v28, v0.t2688; ZVFHMIN-NEXT: csrr a2, vlenb2689; ZVFHMIN-NEXT: slli a2, a2, 32690; ZVFHMIN-NEXT: mv a3, a22691; ZVFHMIN-NEXT: slli a2, a2, 12692; ZVFHMIN-NEXT: add a2, a2, a32693; ZVFHMIN-NEXT: add a2, sp, a22694; ZVFHMIN-NEXT: addi a2, a2, 162695; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload2696; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t2697; ZVFHMIN-NEXT: addi a2, sp, 162698; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload2699; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2700; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t2701; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2702; ZVFHMIN-NEXT: vfncvt.f.f.w v20, v8, v0.t2703; ZVFHMIN-NEXT: bltu a0, a1, .LBB71_22704; ZVFHMIN-NEXT: # %bb.1:2705; ZVFHMIN-NEXT: mv a0, a12706; ZVFHMIN-NEXT: .LBB71_2:2707; ZVFHMIN-NEXT: csrr a1, vlenb2708; ZVFHMIN-NEXT: slli a1, a1, 42709; ZVFHMIN-NEXT: add a1, sp, a12710; ZVFHMIN-NEXT: addi a1, a1, 162711; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload2712; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma2713; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v242714; ZVFHMIN-NEXT: addi a0, sp, 162715; ZVFHMIN-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill2716; ZVFHMIN-NEXT: csrr a0, vlenb2717; ZVFHMIN-NEXT: slli a0, a0, 32718; ZVFHMIN-NEXT: mv a1, a02719; ZVFHMIN-NEXT: slli a0, a0, 12720; ZVFHMIN-NEXT: add a0, a0, a12721; ZVFHMIN-NEXT: add a0, sp, a02722; ZVFHMIN-NEXT: addi a0, a0, 162723; ZVFHMIN-NEXT: vl8r.v v0, (a0) # vscale x 64-byte Folded Reload2724; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v02725; ZVFHMIN-NEXT: csrr a0, vlenb2726; ZVFHMIN-NEXT: slli a0, a0, 32727; ZVFHMIN-NEXT: add a0, sp, a02728; ZVFHMIN-NEXT: addi a0, a0, 162729; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload2730; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v82731; ZVFHMIN-NEXT: addi a0, sp, 162732; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload2733; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma2734; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v82735; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma2736; ZVFHMIN-NEXT: vfncvt.f.f.w v16, v02737; ZVFHMIN-NEXT: vmv8r.v v8, v162738; ZVFHMIN-NEXT: csrr a0, vlenb2739; ZVFHMIN-NEXT: slli a0, a0, 52740; ZVFHMIN-NEXT: add sp, sp, a02741; ZVFHMIN-NEXT: .cfi_def_cfa sp, 162742; ZVFHMIN-NEXT: addi sp, sp, 162743; ZVFHMIN-NEXT: .cfi_def_cfa_offset 02744; ZVFHMIN-NEXT: ret2745 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 02746 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer2747 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %va, <vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)2748 ret <vscale x 32 x half> %v2749}2750 2751define <vscale x 1 x float> @vfma_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {2752; CHECK-LABEL: vfma_vv_nxv1f32:2753; CHECK: # %bb.0:2754; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma2755; CHECK-NEXT: vfmadd.vv v9, v8, v10, v0.t2756; CHECK-NEXT: vmv1r.v v8, v92757; CHECK-NEXT: ret2758 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)2759 ret <vscale x 1 x float> %v2760}2761 2762define <vscale x 1 x float> @vfma_vv_nxv1f32_unmasked(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {2763; CHECK-LABEL: vfma_vv_nxv1f32_unmasked:2764; CHECK: # %bb.0:2765; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma2766; CHECK-NEXT: vfmadd.vv v8, v9, v102767; CHECK-NEXT: ret2768 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)2769 ret <vscale x 1 x float> %v2770}2771 2772define <vscale x 1 x float> @vfma_vf_nxv1f32(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {2773; CHECK-LABEL: vfma_vf_nxv1f32:2774; CHECK: # %bb.0:2775; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma2776; CHECK-NEXT: vfmadd.vf v8, fa0, v9, v0.t2777; CHECK-NEXT: ret2778 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 02779 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer2780 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)2781 ret <vscale x 1 x float> %v2782}2783 2784define <vscale x 1 x float> @vfma_vf_nxv1f32_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {2785; CHECK-LABEL: vfma_vf_nxv1f32_commute:2786; CHECK: # %bb.0:2787; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma2788; CHECK-NEXT: vfmadd.vf v8, fa0, v9, v0.t2789; CHECK-NEXT: ret2790 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 02791 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer2792 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %va, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)2793 ret <vscale x 1 x float> %v2794}2795 2796define <vscale x 1 x float> @vfma_vf_nxv1f32_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {2797; CHECK-LABEL: vfma_vf_nxv1f32_unmasked:2798; CHECK: # %bb.0:2799; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma2800; CHECK-NEXT: vfmadd.vf v8, fa0, v92801; CHECK-NEXT: ret2802 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 02803 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer2804 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)2805 ret <vscale x 1 x float> %v2806}2807 2808define <vscale x 1 x float> @vfma_vf_nxv1f32_unmasked_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {2809; CHECK-LABEL: vfma_vf_nxv1f32_unmasked_commute:2810; CHECK: # %bb.0:2811; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma2812; CHECK-NEXT: vfmadd.vf v8, fa0, v92813; CHECK-NEXT: ret2814 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 02815 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer2816 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %va, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)2817 ret <vscale x 1 x float> %v2818}2819 2820define <vscale x 2 x float> @vfma_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {2821; CHECK-LABEL: vfma_vv_nxv2f32:2822; CHECK: # %bb.0:2823; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma2824; CHECK-NEXT: vfmadd.vv v9, v8, v10, v0.t2825; CHECK-NEXT: vmv.v.v v8, v92826; CHECK-NEXT: ret2827 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)2828 ret <vscale x 2 x float> %v2829}2830 2831define <vscale x 2 x float> @vfma_vv_nxv2f32_unmasked(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {2832; CHECK-LABEL: vfma_vv_nxv2f32_unmasked:2833; CHECK: # %bb.0:2834; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma2835; CHECK-NEXT: vfmadd.vv v8, v9, v102836; CHECK-NEXT: ret2837 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)2838 ret <vscale x 2 x float> %v2839}2840 2841define <vscale x 2 x float> @vfma_vf_nxv2f32(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {2842; CHECK-LABEL: vfma_vf_nxv2f32:2843; CHECK: # %bb.0:2844; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma2845; CHECK-NEXT: vfmadd.vf v8, fa0, v9, v0.t2846; CHECK-NEXT: ret2847 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 02848 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer2849 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)2850 ret <vscale x 2 x float> %v2851}2852 2853define <vscale x 2 x float> @vfma_vf_nxv2f32_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {2854; CHECK-LABEL: vfma_vf_nxv2f32_commute:2855; CHECK: # %bb.0:2856; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma2857; CHECK-NEXT: vfmadd.vf v8, fa0, v9, v0.t2858; CHECK-NEXT: ret2859 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 02860 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer2861 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %va, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)2862 ret <vscale x 2 x float> %v2863}2864 2865define <vscale x 2 x float> @vfma_vf_nxv2f32_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {2866; CHECK-LABEL: vfma_vf_nxv2f32_unmasked:2867; CHECK: # %bb.0:2868; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma2869; CHECK-NEXT: vfmadd.vf v8, fa0, v92870; CHECK-NEXT: ret2871 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 02872 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer2873 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)2874 ret <vscale x 2 x float> %v2875}2876 2877define <vscale x 2 x float> @vfma_vf_nxv2f32_unmasked_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {2878; CHECK-LABEL: vfma_vf_nxv2f32_unmasked_commute:2879; CHECK: # %bb.0:2880; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma2881; CHECK-NEXT: vfmadd.vf v8, fa0, v92882; CHECK-NEXT: ret2883 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 02884 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer2885 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %va, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)2886 ret <vscale x 2 x float> %v2887}2888 2889define <vscale x 4 x float> @vfma_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {2890; CHECK-LABEL: vfma_vv_nxv4f32:2891; CHECK: # %bb.0:2892; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma2893; CHECK-NEXT: vfmadd.vv v10, v8, v12, v0.t2894; CHECK-NEXT: vmv.v.v v8, v102895; CHECK-NEXT: ret2896 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)2897 ret <vscale x 4 x float> %v2898}2899 2900define <vscale x 4 x float> @vfma_vv_nxv4f32_unmasked(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {2901; CHECK-LABEL: vfma_vv_nxv4f32_unmasked:2902; CHECK: # %bb.0:2903; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma2904; CHECK-NEXT: vfmadd.vv v8, v10, v122905; CHECK-NEXT: ret2906 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)2907 ret <vscale x 4 x float> %v2908}2909 2910define <vscale x 4 x float> @vfma_vf_nxv4f32(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {2911; CHECK-LABEL: vfma_vf_nxv4f32:2912; CHECK: # %bb.0:2913; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma2914; CHECK-NEXT: vfmadd.vf v8, fa0, v10, v0.t2915; CHECK-NEXT: ret2916 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 02917 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer2918 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)2919 ret <vscale x 4 x float> %v2920}2921 2922define <vscale x 4 x float> @vfma_vf_nxv4f32_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {2923; CHECK-LABEL: vfma_vf_nxv4f32_commute:2924; CHECK: # %bb.0:2925; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma2926; CHECK-NEXT: vfmadd.vf v8, fa0, v10, v0.t2927; CHECK-NEXT: ret2928 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 02929 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer2930 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %va, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)2931 ret <vscale x 4 x float> %v2932}2933 2934define <vscale x 4 x float> @vfma_vf_nxv4f32_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {2935; CHECK-LABEL: vfma_vf_nxv4f32_unmasked:2936; CHECK: # %bb.0:2937; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma2938; CHECK-NEXT: vfmadd.vf v8, fa0, v102939; CHECK-NEXT: ret2940 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 02941 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer2942 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)2943 ret <vscale x 4 x float> %v2944}2945 2946define <vscale x 4 x float> @vfma_vf_nxv4f32_unmasked_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {2947; CHECK-LABEL: vfma_vf_nxv4f32_unmasked_commute:2948; CHECK: # %bb.0:2949; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma2950; CHECK-NEXT: vfmadd.vf v8, fa0, v102951; CHECK-NEXT: ret2952 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 02953 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer2954 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %va, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)2955 ret <vscale x 4 x float> %v2956}2957 2958define <vscale x 8 x float> @vfma_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {2959; CHECK-LABEL: vfma_vv_nxv8f32:2960; CHECK: # %bb.0:2961; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma2962; CHECK-NEXT: vfmadd.vv v12, v8, v16, v0.t2963; CHECK-NEXT: vmv.v.v v8, v122964; CHECK-NEXT: ret2965 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)2966 ret <vscale x 8 x float> %v2967}2968 2969define <vscale x 8 x float> @vfma_vv_nxv8f32_unmasked(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {2970; CHECK-LABEL: vfma_vv_nxv8f32_unmasked:2971; CHECK: # %bb.0:2972; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma2973; CHECK-NEXT: vfmadd.vv v8, v12, v162974; CHECK-NEXT: ret2975 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)2976 ret <vscale x 8 x float> %v2977}2978 2979define <vscale x 8 x float> @vfma_vf_nxv8f32(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {2980; CHECK-LABEL: vfma_vf_nxv8f32:2981; CHECK: # %bb.0:2982; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma2983; CHECK-NEXT: vfmadd.vf v8, fa0, v12, v0.t2984; CHECK-NEXT: ret2985 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 02986 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer2987 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)2988 ret <vscale x 8 x float> %v2989}2990 2991define <vscale x 8 x float> @vfma_vf_nxv8f32_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {2992; CHECK-LABEL: vfma_vf_nxv8f32_commute:2993; CHECK: # %bb.0:2994; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma2995; CHECK-NEXT: vfmadd.vf v8, fa0, v12, v0.t2996; CHECK-NEXT: ret2997 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 02998 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer2999 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %va, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)3000 ret <vscale x 8 x float> %v3001}3002 3003define <vscale x 8 x float> @vfma_vf_nxv8f32_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {3004; CHECK-LABEL: vfma_vf_nxv8f32_unmasked:3005; CHECK: # %bb.0:3006; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma3007; CHECK-NEXT: vfmadd.vf v8, fa0, v123008; CHECK-NEXT: ret3009 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 03010 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer3011 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)3012 ret <vscale x 8 x float> %v3013}3014 3015define <vscale x 8 x float> @vfma_vf_nxv8f32_unmasked_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {3016; CHECK-LABEL: vfma_vf_nxv8f32_unmasked_commute:3017; CHECK: # %bb.0:3018; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma3019; CHECK-NEXT: vfmadd.vf v8, fa0, v123020; CHECK-NEXT: ret3021 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 03022 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer3023 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %va, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)3024 ret <vscale x 8 x float> %v3025}3026 3027define <vscale x 16 x float> @vfma_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {3028; CHECK-LABEL: vfma_vv_nxv16f32:3029; CHECK: # %bb.0:3030; CHECK-NEXT: vl8re32.v v24, (a0)3031; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma3032; CHECK-NEXT: vfmadd.vv v16, v8, v24, v0.t3033; CHECK-NEXT: vmv.v.v v8, v163034; CHECK-NEXT: ret3035 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)3036 ret <vscale x 16 x float> %v3037}3038 3039define <vscale x 16 x float> @vfma_vv_nxv16f32_unmasked(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {3040; CHECK-LABEL: vfma_vv_nxv16f32_unmasked:3041; CHECK: # %bb.0:3042; CHECK-NEXT: vl8re32.v v24, (a0)3043; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma3044; CHECK-NEXT: vfmadd.vv v8, v16, v243045; CHECK-NEXT: ret3046 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)3047 ret <vscale x 16 x float> %v3048}3049 3050define <vscale x 16 x float> @vfma_vf_nxv16f32(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {3051; CHECK-LABEL: vfma_vf_nxv16f32:3052; CHECK: # %bb.0:3053; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma3054; CHECK-NEXT: vfmadd.vf v8, fa0, v16, v0.t3055; CHECK-NEXT: ret3056 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 03057 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer3058 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)3059 ret <vscale x 16 x float> %v3060}3061 3062define <vscale x 16 x float> @vfma_vf_nxv16f32_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {3063; CHECK-LABEL: vfma_vf_nxv16f32_commute:3064; CHECK: # %bb.0:3065; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma3066; CHECK-NEXT: vfmadd.vf v8, fa0, v16, v0.t3067; CHECK-NEXT: ret3068 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 03069 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer3070 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %va, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)3071 ret <vscale x 16 x float> %v3072}3073 3074define <vscale x 16 x float> @vfma_vf_nxv16f32_unmasked(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {3075; CHECK-LABEL: vfma_vf_nxv16f32_unmasked:3076; CHECK: # %bb.0:3077; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma3078; CHECK-NEXT: vfmadd.vf v8, fa0, v163079; CHECK-NEXT: ret3080 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 03081 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer3082 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)3083 ret <vscale x 16 x float> %v3084}3085 3086define <vscale x 16 x float> @vfma_vf_nxv16f32_unmasked_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {3087; CHECK-LABEL: vfma_vf_nxv16f32_unmasked_commute:3088; CHECK: # %bb.0:3089; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma3090; CHECK-NEXT: vfmadd.vf v8, fa0, v163091; CHECK-NEXT: ret3092 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 03093 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer3094 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %va, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)3095 ret <vscale x 16 x float> %v3096}3097 3098define <vscale x 1 x double> @vfma_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {3099; CHECK-LABEL: vfma_vv_nxv1f64:3100; CHECK: # %bb.0:3101; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma3102; CHECK-NEXT: vfmadd.vv v9, v8, v10, v0.t3103; CHECK-NEXT: vmv.v.v v8, v93104; CHECK-NEXT: ret3105 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)3106 ret <vscale x 1 x double> %v3107}3108 3109define <vscale x 1 x double> @vfma_vv_nxv1f64_unmasked(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {3110; CHECK-LABEL: vfma_vv_nxv1f64_unmasked:3111; CHECK: # %bb.0:3112; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma3113; CHECK-NEXT: vfmadd.vv v8, v9, v103114; CHECK-NEXT: ret3115 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)3116 ret <vscale x 1 x double> %v3117}3118 3119define <vscale x 1 x double> @vfma_vf_nxv1f64(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {3120; CHECK-LABEL: vfma_vf_nxv1f64:3121; CHECK: # %bb.0:3122; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma3123; CHECK-NEXT: vfmadd.vf v8, fa0, v9, v0.t3124; CHECK-NEXT: ret3125 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 03126 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer3127 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)3128 ret <vscale x 1 x double> %v3129}3130 3131define <vscale x 1 x double> @vfma_vf_nxv1f64_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {3132; CHECK-LABEL: vfma_vf_nxv1f64_commute:3133; CHECK: # %bb.0:3134; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma3135; CHECK-NEXT: vfmadd.vf v8, fa0, v9, v0.t3136; CHECK-NEXT: ret3137 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 03138 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer3139 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %va, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)3140 ret <vscale x 1 x double> %v3141}3142 3143define <vscale x 1 x double> @vfma_vf_nxv1f64_unmasked(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {3144; CHECK-LABEL: vfma_vf_nxv1f64_unmasked:3145; CHECK: # %bb.0:3146; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma3147; CHECK-NEXT: vfmadd.vf v8, fa0, v93148; CHECK-NEXT: ret3149 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 03150 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer3151 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)3152 ret <vscale x 1 x double> %v3153}3154 3155define <vscale x 1 x double> @vfma_vf_nxv1f64_unmasked_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {3156; CHECK-LABEL: vfma_vf_nxv1f64_unmasked_commute:3157; CHECK: # %bb.0:3158; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma3159; CHECK-NEXT: vfmadd.vf v8, fa0, v93160; CHECK-NEXT: ret3161 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 03162 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer3163 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %va, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)3164 ret <vscale x 1 x double> %v3165}3166 3167define <vscale x 2 x double> @vfma_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {3168; CHECK-LABEL: vfma_vv_nxv2f64:3169; CHECK: # %bb.0:3170; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma3171; CHECK-NEXT: vfmadd.vv v10, v8, v12, v0.t3172; CHECK-NEXT: vmv.v.v v8, v103173; CHECK-NEXT: ret3174 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)3175 ret <vscale x 2 x double> %v3176}3177 3178define <vscale x 2 x double> @vfma_vv_nxv2f64_unmasked(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {3179; CHECK-LABEL: vfma_vv_nxv2f64_unmasked:3180; CHECK: # %bb.0:3181; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma3182; CHECK-NEXT: vfmadd.vv v8, v10, v123183; CHECK-NEXT: ret3184 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)3185 ret <vscale x 2 x double> %v3186}3187 3188define <vscale x 2 x double> @vfma_vf_nxv2f64(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {3189; CHECK-LABEL: vfma_vf_nxv2f64:3190; CHECK: # %bb.0:3191; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma3192; CHECK-NEXT: vfmadd.vf v8, fa0, v10, v0.t3193; CHECK-NEXT: ret3194 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 03195 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer3196 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)3197 ret <vscale x 2 x double> %v3198}3199 3200define <vscale x 2 x double> @vfma_vf_nxv2f64_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {3201; CHECK-LABEL: vfma_vf_nxv2f64_commute:3202; CHECK: # %bb.0:3203; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma3204; CHECK-NEXT: vfmadd.vf v8, fa0, v10, v0.t3205; CHECK-NEXT: ret3206 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 03207 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer3208 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %va, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)3209 ret <vscale x 2 x double> %v3210}3211 3212define <vscale x 2 x double> @vfma_vf_nxv2f64_unmasked(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {3213; CHECK-LABEL: vfma_vf_nxv2f64_unmasked:3214; CHECK: # %bb.0:3215; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma3216; CHECK-NEXT: vfmadd.vf v8, fa0, v103217; CHECK-NEXT: ret3218 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 03219 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer3220 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)3221 ret <vscale x 2 x double> %v3222}3223 3224define <vscale x 2 x double> @vfma_vf_nxv2f64_unmasked_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {3225; CHECK-LABEL: vfma_vf_nxv2f64_unmasked_commute:3226; CHECK: # %bb.0:3227; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma3228; CHECK-NEXT: vfmadd.vf v8, fa0, v103229; CHECK-NEXT: ret3230 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 03231 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer3232 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %va, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)3233 ret <vscale x 2 x double> %v3234}3235 3236define <vscale x 4 x double> @vfma_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {3237; CHECK-LABEL: vfma_vv_nxv4f64:3238; CHECK: # %bb.0:3239; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma3240; CHECK-NEXT: vfmadd.vv v12, v8, v16, v0.t3241; CHECK-NEXT: vmv.v.v v8, v123242; CHECK-NEXT: ret3243 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)3244 ret <vscale x 4 x double> %v3245}3246 3247define <vscale x 4 x double> @vfma_vv_nxv4f64_unmasked(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {3248; CHECK-LABEL: vfma_vv_nxv4f64_unmasked:3249; CHECK: # %bb.0:3250; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma3251; CHECK-NEXT: vfmadd.vv v8, v12, v163252; CHECK-NEXT: ret3253 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)3254 ret <vscale x 4 x double> %v3255}3256 3257define <vscale x 4 x double> @vfma_vf_nxv4f64(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {3258; CHECK-LABEL: vfma_vf_nxv4f64:3259; CHECK: # %bb.0:3260; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma3261; CHECK-NEXT: vfmadd.vf v8, fa0, v12, v0.t3262; CHECK-NEXT: ret3263 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 03264 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer3265 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)3266 ret <vscale x 4 x double> %v3267}3268 3269define <vscale x 4 x double> @vfma_vf_nxv4f64_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {3270; CHECK-LABEL: vfma_vf_nxv4f64_commute:3271; CHECK: # %bb.0:3272; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma3273; CHECK-NEXT: vfmadd.vf v8, fa0, v12, v0.t3274; CHECK-NEXT: ret3275 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 03276 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer3277 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %va, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)3278 ret <vscale x 4 x double> %v3279}3280 3281define <vscale x 4 x double> @vfma_vf_nxv4f64_unmasked(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {3282; CHECK-LABEL: vfma_vf_nxv4f64_unmasked:3283; CHECK: # %bb.0:3284; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma3285; CHECK-NEXT: vfmadd.vf v8, fa0, v123286; CHECK-NEXT: ret3287 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 03288 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer3289 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)3290 ret <vscale x 4 x double> %v3291}3292 3293define <vscale x 4 x double> @vfma_vf_nxv4f64_unmasked_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {3294; CHECK-LABEL: vfma_vf_nxv4f64_unmasked_commute:3295; CHECK: # %bb.0:3296; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma3297; CHECK-NEXT: vfmadd.vf v8, fa0, v123298; CHECK-NEXT: ret3299 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 03300 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer3301 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %va, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)3302 ret <vscale x 4 x double> %v3303}3304 3305define <vscale x 7 x double> @vfma_vv_nxv7f64(<vscale x 7 x double> %va, <vscale x 7 x double> %b, <vscale x 7 x double> %c, <vscale x 7 x i1> %m, i32 zeroext %evl) {3306; CHECK-LABEL: vfma_vv_nxv7f64:3307; CHECK: # %bb.0:3308; CHECK-NEXT: vl8re64.v v24, (a0)3309; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma3310; CHECK-NEXT: vfmadd.vv v16, v8, v24, v0.t3311; CHECK-NEXT: vmv.v.v v8, v163312; CHECK-NEXT: ret3313 %v = call <vscale x 7 x double> @llvm.vp.fma.nxv7f64(<vscale x 7 x double> %va, <vscale x 7 x double> %b, <vscale x 7 x double> %c, <vscale x 7 x i1> %m, i32 %evl)3314 ret <vscale x 7 x double> %v3315}3316 3317define <vscale x 7 x double> @vfma_vv_nxv7f64_unmasked(<vscale x 7 x double> %va, <vscale x 7 x double> %b, <vscale x 7 x double> %c, i32 zeroext %evl) {3318; CHECK-LABEL: vfma_vv_nxv7f64_unmasked:3319; CHECK: # %bb.0:3320; CHECK-NEXT: vl8re64.v v24, (a0)3321; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma3322; CHECK-NEXT: vfmadd.vv v8, v16, v243323; CHECK-NEXT: ret3324 %v = call <vscale x 7 x double> @llvm.vp.fma.nxv7f64(<vscale x 7 x double> %va, <vscale x 7 x double> %b, <vscale x 7 x double> %c, <vscale x 7 x i1> splat (i1 true), i32 %evl)3325 ret <vscale x 7 x double> %v3326}3327 3328define <vscale x 8 x double> @vfma_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {3329; CHECK-LABEL: vfma_vv_nxv8f64:3330; CHECK: # %bb.0:3331; CHECK-NEXT: vl8re64.v v24, (a0)3332; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma3333; CHECK-NEXT: vfmadd.vv v16, v8, v24, v0.t3334; CHECK-NEXT: vmv.v.v v8, v163335; CHECK-NEXT: ret3336 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)3337 ret <vscale x 8 x double> %v3338}3339 3340define <vscale x 8 x double> @vfma_vv_nxv8f64_unmasked(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {3341; CHECK-LABEL: vfma_vv_nxv8f64_unmasked:3342; CHECK: # %bb.0:3343; CHECK-NEXT: vl8re64.v v24, (a0)3344; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma3345; CHECK-NEXT: vfmadd.vv v8, v16, v243346; CHECK-NEXT: ret3347 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)3348 ret <vscale x 8 x double> %v3349}3350 3351define <vscale x 8 x double> @vfma_vf_nxv8f64(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {3352; CHECK-LABEL: vfma_vf_nxv8f64:3353; CHECK: # %bb.0:3354; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma3355; CHECK-NEXT: vfmadd.vf v8, fa0, v16, v0.t3356; CHECK-NEXT: ret3357 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 03358 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer3359 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)3360 ret <vscale x 8 x double> %v3361}3362 3363define <vscale x 8 x double> @vfma_vf_nxv8f64_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {3364; CHECK-LABEL: vfma_vf_nxv8f64_commute:3365; CHECK: # %bb.0:3366; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma3367; CHECK-NEXT: vfmadd.vf v8, fa0, v16, v0.t3368; CHECK-NEXT: ret3369 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 03370 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer3371 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %va, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)3372 ret <vscale x 8 x double> %v3373}3374 3375define <vscale x 8 x double> @vfma_vf_nxv8f64_unmasked(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {3376; CHECK-LABEL: vfma_vf_nxv8f64_unmasked:3377; CHECK: # %bb.0:3378; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma3379; CHECK-NEXT: vfmadd.vf v8, fa0, v163380; CHECK-NEXT: ret3381 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 03382 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer3383 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)3384 ret <vscale x 8 x double> %v3385}3386 3387define <vscale x 8 x double> @vfma_vf_nxv8f64_unmasked_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {3388; CHECK-LABEL: vfma_vf_nxv8f64_unmasked_commute:3389; CHECK: # %bb.0:3390; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma3391; CHECK-NEXT: vfmadd.vf v8, fa0, v163392; CHECK-NEXT: ret3393 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 03394 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer3395 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %va, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)3396 ret <vscale x 8 x double> %v3397}3398 3399define <vscale x 16 x double> @vfma_vv_nxv16f64(<vscale x 16 x double> %va, <vscale x 16 x double> %b, <vscale x 16 x double> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {3400; CHECK-LABEL: vfma_vv_nxv16f64:3401; CHECK: # %bb.0:3402; CHECK-NEXT: addi sp, sp, -163403; CHECK-NEXT: .cfi_def_cfa_offset 163404; CHECK-NEXT: csrr a1, vlenb3405; CHECK-NEXT: slli a1, a1, 43406; CHECK-NEXT: mv a3, a13407; CHECK-NEXT: slli a1, a1, 13408; CHECK-NEXT: add a1, a1, a33409; CHECK-NEXT: sub sp, sp, a13410; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x30, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 48 * vlenb3411; CHECK-NEXT: vsetvli a1, zero, e8, mf4, ta, ma3412; CHECK-NEXT: vmv1r.v v7, v03413; CHECK-NEXT: csrr a1, vlenb3414; CHECK-NEXT: slli a1, a1, 33415; CHECK-NEXT: mv a3, a13416; CHECK-NEXT: slli a1, a1, 13417; CHECK-NEXT: add a1, a1, a33418; CHECK-NEXT: add a1, sp, a13419; CHECK-NEXT: addi a1, a1, 163420; CHECK-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill3421; CHECK-NEXT: csrr a1, vlenb3422; CHECK-NEXT: slli a1, a1, 53423; CHECK-NEXT: add a1, sp, a13424; CHECK-NEXT: addi a1, a1, 163425; CHECK-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill3426; CHECK-NEXT: csrr a1, vlenb3427; CHECK-NEXT: srli a3, a1, 33428; CHECK-NEXT: slli a5, a1, 33429; CHECK-NEXT: sub a6, a4, a13430; CHECK-NEXT: add a7, a2, a53431; CHECK-NEXT: add a5, a0, a53432; CHECK-NEXT: vl8re64.v v8, (a7)3433; CHECK-NEXT: csrr a7, vlenb3434; CHECK-NEXT: slli a7, a7, 33435; CHECK-NEXT: add a7, sp, a73436; CHECK-NEXT: addi a7, a7, 163437; CHECK-NEXT: vs8r.v v8, (a7) # vscale x 64-byte Folded Spill3438; CHECK-NEXT: sltu a7, a4, a63439; CHECK-NEXT: addi a7, a7, -13440; CHECK-NEXT: vl8re64.v v8, (a5)3441; CHECK-NEXT: csrr a5, vlenb3442; CHECK-NEXT: slli a5, a5, 33443; CHECK-NEXT: mv t0, a53444; CHECK-NEXT: slli a5, a5, 23445; CHECK-NEXT: add a5, a5, t03446; CHECK-NEXT: add a5, sp, a53447; CHECK-NEXT: addi a5, a5, 163448; CHECK-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill3449; CHECK-NEXT: vl8re64.v v8, (a2)3450; CHECK-NEXT: csrr a2, vlenb3451; CHECK-NEXT: slli a2, a2, 43452; CHECK-NEXT: add a2, sp, a23453; CHECK-NEXT: addi a2, a2, 163454; CHECK-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill3455; CHECK-NEXT: vl8re64.v v8, (a0)3456; CHECK-NEXT: addi a0, sp, 163457; CHECK-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill3458; CHECK-NEXT: vslidedown.vx v0, v0, a33459; CHECK-NEXT: and a0, a7, a63460; CHECK-NEXT: csrr a2, vlenb3461; CHECK-NEXT: slli a2, a2, 33462; CHECK-NEXT: mv a3, a23463; CHECK-NEXT: slli a2, a2, 13464; CHECK-NEXT: add a2, a2, a33465; CHECK-NEXT: add a2, sp, a23466; CHECK-NEXT: addi a2, a2, 163467; CHECK-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload3468; CHECK-NEXT: csrr a2, vlenb3469; CHECK-NEXT: slli a2, a2, 33470; CHECK-NEXT: add a2, sp, a23471; CHECK-NEXT: addi a2, a2, 163472; CHECK-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload3473; CHECK-NEXT: csrr a2, vlenb3474; CHECK-NEXT: slli a2, a2, 33475; CHECK-NEXT: mv a3, a23476; CHECK-NEXT: slli a2, a2, 23477; CHECK-NEXT: add a2, a2, a33478; CHECK-NEXT: add a2, sp, a23479; CHECK-NEXT: addi a2, a2, 163480; CHECK-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload3481; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma3482; CHECK-NEXT: vfmadd.vv v8, v16, v24, v0.t3483; CHECK-NEXT: csrr a0, vlenb3484; CHECK-NEXT: slli a0, a0, 33485; CHECK-NEXT: mv a2, a03486; CHECK-NEXT: slli a0, a0, 23487; CHECK-NEXT: add a0, a0, a23488; CHECK-NEXT: add a0, sp, a03489; CHECK-NEXT: addi a0, a0, 163490; CHECK-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill3491; CHECK-NEXT: bltu a4, a1, .LBB128_23492; CHECK-NEXT: # %bb.1:3493; CHECK-NEXT: mv a4, a13494; CHECK-NEXT: .LBB128_2:3495; CHECK-NEXT: vmv1r.v v0, v73496; CHECK-NEXT: csrr a0, vlenb3497; CHECK-NEXT: slli a0, a0, 53498; CHECK-NEXT: add a0, sp, a03499; CHECK-NEXT: addi a0, a0, 163500; CHECK-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload3501; CHECK-NEXT: csrr a0, vlenb3502; CHECK-NEXT: slli a0, a0, 43503; CHECK-NEXT: add a0, sp, a03504; CHECK-NEXT: addi a0, a0, 163505; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload3506; CHECK-NEXT: addi a0, sp, 163507; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload3508; CHECK-NEXT: vsetvli zero, a4, e64, m8, ta, ma3509; CHECK-NEXT: vfmadd.vv v8, v16, v24, v0.t3510; CHECK-NEXT: csrr a0, vlenb3511; CHECK-NEXT: slli a0, a0, 33512; CHECK-NEXT: mv a1, a03513; CHECK-NEXT: slli a0, a0, 23514; CHECK-NEXT: add a0, a0, a13515; CHECK-NEXT: add a0, sp, a03516; CHECK-NEXT: addi a0, a0, 163517; CHECK-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload3518; CHECK-NEXT: csrr a0, vlenb3519; CHECK-NEXT: slli a0, a0, 43520; CHECK-NEXT: mv a1, a03521; CHECK-NEXT: slli a0, a0, 13522; CHECK-NEXT: add a0, a0, a13523; CHECK-NEXT: add sp, sp, a03524; CHECK-NEXT: .cfi_def_cfa sp, 163525; CHECK-NEXT: addi sp, sp, 163526; CHECK-NEXT: .cfi_def_cfa_offset 03527; CHECK-NEXT: ret3528 %v = call <vscale x 16 x double> @llvm.vp.fma.nxv16f64(<vscale x 16 x double> %va, <vscale x 16 x double> %b, <vscale x 16 x double> %c, <vscale x 16 x i1> %m, i32 %evl)3529 ret <vscale x 16 x double> %v3530}3531 3532define <vscale x 16 x double> @vfma_vv_nxv16f64_unmasked(<vscale x 16 x double> %va, <vscale x 16 x double> %b, <vscale x 16 x double> %c, i32 zeroext %evl) {3533; CHECK-LABEL: vfma_vv_nxv16f64_unmasked:3534; CHECK: # %bb.0:3535; CHECK-NEXT: addi sp, sp, -163536; CHECK-NEXT: .cfi_def_cfa_offset 163537; CHECK-NEXT: csrr a1, vlenb3538; CHECK-NEXT: slli a1, a1, 53539; CHECK-NEXT: sub sp, sp, a13540; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb3541; CHECK-NEXT: csrr a1, vlenb3542; CHECK-NEXT: slli a1, a1, 43543; CHECK-NEXT: add a1, sp, a13544; CHECK-NEXT: addi a1, a1, 163545; CHECK-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill3546; CHECK-NEXT: csrr a1, vlenb3547; CHECK-NEXT: slli a1, a1, 33548; CHECK-NEXT: mv a3, a13549; CHECK-NEXT: slli a1, a1, 13550; CHECK-NEXT: add a1, a1, a33551; CHECK-NEXT: add a1, sp, a13552; CHECK-NEXT: addi a1, a1, 163553; CHECK-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill3554; CHECK-NEXT: csrr a1, vlenb3555; CHECK-NEXT: slli a3, a1, 33556; CHECK-NEXT: add a5, a2, a33557; CHECK-NEXT: vl8re64.v v8, (a5)3558; CHECK-NEXT: csrr a5, vlenb3559; CHECK-NEXT: slli a5, a5, 33560; CHECK-NEXT: add a5, sp, a53561; CHECK-NEXT: addi a5, a5, 163562; CHECK-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill3563; CHECK-NEXT: sub a5, a4, a13564; CHECK-NEXT: add a3, a0, a33565; CHECK-NEXT: vl8re64.v v24, (a3)3566; CHECK-NEXT: sltu a3, a4, a53567; CHECK-NEXT: vl8re64.v v8, (a2)3568; CHECK-NEXT: addi a2, sp, 163569; CHECK-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill3570; CHECK-NEXT: vl8re64.v v0, (a0)3571; CHECK-NEXT: addi a3, a3, -13572; CHECK-NEXT: and a3, a3, a53573; CHECK-NEXT: csrr a0, vlenb3574; CHECK-NEXT: slli a0, a0, 43575; CHECK-NEXT: add a0, sp, a03576; CHECK-NEXT: addi a0, a0, 163577; CHECK-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload3578; CHECK-NEXT: csrr a0, vlenb3579; CHECK-NEXT: slli a0, a0, 33580; CHECK-NEXT: add a0, sp, a03581; CHECK-NEXT: addi a0, a0, 163582; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload3583; CHECK-NEXT: vsetvli zero, a3, e64, m8, ta, ma3584; CHECK-NEXT: vfmadd.vv v24, v16, v83585; CHECK-NEXT: bltu a4, a1, .LBB129_23586; CHECK-NEXT: # %bb.1:3587; CHECK-NEXT: mv a4, a13588; CHECK-NEXT: .LBB129_2:3589; CHECK-NEXT: csrr a0, vlenb3590; CHECK-NEXT: slli a0, a0, 33591; CHECK-NEXT: mv a1, a03592; CHECK-NEXT: slli a0, a0, 13593; CHECK-NEXT: add a0, a0, a13594; CHECK-NEXT: add a0, sp, a03595; CHECK-NEXT: addi a0, a0, 163596; CHECK-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload3597; CHECK-NEXT: addi a0, sp, 163598; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload3599; CHECK-NEXT: vsetvli zero, a4, e64, m8, ta, ma3600; CHECK-NEXT: vfmadd.vv v0, v16, v83601; CHECK-NEXT: vmv.v.v v8, v03602; CHECK-NEXT: vmv8r.v v16, v243603; CHECK-NEXT: csrr a0, vlenb3604; CHECK-NEXT: slli a0, a0, 53605; CHECK-NEXT: add sp, sp, a03606; CHECK-NEXT: .cfi_def_cfa sp, 163607; CHECK-NEXT: addi sp, sp, 163608; CHECK-NEXT: .cfi_def_cfa_offset 03609; CHECK-NEXT: ret3610 %v = call <vscale x 16 x double> @llvm.vp.fma.nxv16f64(<vscale x 16 x double> %va, <vscale x 16 x double> %b, <vscale x 16 x double> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)3611 ret <vscale x 16 x double> %v3612}3613 3614define <vscale x 1 x half> @vfmsub_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {3615; ZVFH-LABEL: vfmsub_vv_nxv1f16:3616; ZVFH: # %bb.0:3617; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3618; ZVFH-NEXT: vfmsub.vv v9, v8, v10, v0.t3619; ZVFH-NEXT: vmv1r.v v8, v93620; ZVFH-NEXT: ret3621;3622; ZVFHMIN-LABEL: vfmsub_vv_nxv1f16:3623; ZVFHMIN: # %bb.0:3624; ZVFHMIN-NEXT: lui a1, 83625; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3626; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t3627; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t3628; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t3629; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t3630; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3631; ZVFHMIN-NEXT: vfmadd.vv v12, v10, v11, v0.t3632; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3633; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t3634; ZVFHMIN-NEXT: ret3635 %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)3636 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %negc, <vscale x 1 x i1> %m, i32 %evl)3637 ret <vscale x 1 x half> %v3638}3639 3640define <vscale x 1 x half> @vfmsub_vv_nxv1f16_unmasked(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, i32 zeroext %evl) {3641; ZVFH-LABEL: vfmsub_vv_nxv1f16_unmasked:3642; ZVFH: # %bb.0:3643; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3644; ZVFH-NEXT: vfmsub.vv v8, v9, v103645; ZVFH-NEXT: ret3646;3647; ZVFHMIN-LABEL: vfmsub_vv_nxv1f16_unmasked:3648; ZVFHMIN: # %bb.0:3649; ZVFHMIN-NEXT: lui a1, 83650; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3651; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v83652; ZVFHMIN-NEXT: vxor.vx v8, v10, a13653; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v83654; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v93655; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3656; ZVFHMIN-NEXT: vfmadd.vv v12, v11, v103657; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3658; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v123659; ZVFHMIN-NEXT: ret3660 %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)3661 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)3662 ret <vscale x 1 x half> %v3663}3664 3665define <vscale x 1 x half> @vfmsub_vf_nxv1f16(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {3666; ZVFH-LABEL: vfmsub_vf_nxv1f16:3667; ZVFH: # %bb.0:3668; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3669; ZVFH-NEXT: vfmsub.vf v8, fa0, v9, v0.t3670; ZVFH-NEXT: ret3671;3672; ZVFHMIN-LABEL: vfmsub_vf_nxv1f16:3673; ZVFHMIN: # %bb.0:3674; ZVFHMIN-NEXT: fmv.x.h a1, fa03675; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3676; ZVFHMIN-NEXT: vmv.v.x v10, a13677; ZVFHMIN-NEXT: lui a0, 83678; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t3679; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v9, v0.t3680; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t3681; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t3682; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3683; ZVFHMIN-NEXT: vfmadd.vv v12, v9, v11, v0.t3684; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3685; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t3686; ZVFHMIN-NEXT: ret3687 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 03688 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer3689 %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)3690 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x half> %negvc, <vscale x 1 x i1> %m, i32 %evl)3691 ret <vscale x 1 x half> %v3692}3693 3694define <vscale x 1 x half> @vfmsub_vf_nxv1f16_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {3695; ZVFH-LABEL: vfmsub_vf_nxv1f16_commute:3696; ZVFH: # %bb.0:3697; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3698; ZVFH-NEXT: vfmsub.vf v8, fa0, v9, v0.t3699; ZVFH-NEXT: ret3700;3701; ZVFHMIN-LABEL: vfmsub_vf_nxv1f16_commute:3702; ZVFHMIN: # %bb.0:3703; ZVFHMIN-NEXT: fmv.x.h a1, fa03704; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3705; ZVFHMIN-NEXT: vmv.v.x v10, a13706; ZVFHMIN-NEXT: lui a0, 83707; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t3708; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v9, v0.t3709; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t3710; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10, v0.t3711; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3712; ZVFHMIN-NEXT: vfmadd.vv v9, v8, v11, v0.t3713; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3714; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t3715; ZVFHMIN-NEXT: ret3716 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 03717 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer3718 %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)3719 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %va, <vscale x 1 x half> %negvc, <vscale x 1 x i1> %m, i32 %evl)3720 ret <vscale x 1 x half> %v3721}3722 3723define <vscale x 1 x half> @vfmsub_vf_nxv1f16_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {3724; ZVFH-LABEL: vfmsub_vf_nxv1f16_unmasked:3725; ZVFH: # %bb.0:3726; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3727; ZVFH-NEXT: vfmsub.vf v8, fa0, v93728; ZVFH-NEXT: ret3729;3730; ZVFHMIN-LABEL: vfmsub_vf_nxv1f16_unmasked:3731; ZVFHMIN: # %bb.0:3732; ZVFHMIN-NEXT: fmv.x.h a1, fa03733; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3734; ZVFHMIN-NEXT: vmv.v.x v10, a13735; ZVFHMIN-NEXT: lui a0, 83736; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v83737; ZVFHMIN-NEXT: vxor.vx v8, v9, a03738; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v83739; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v103740; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3741; ZVFHMIN-NEXT: vfmadd.vv v12, v11, v93742; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3743; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v123744; ZVFHMIN-NEXT: ret3745 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 03746 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer3747 %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)3748 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x half> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)3749 ret <vscale x 1 x half> %v3750}3751 3752define <vscale x 1 x half> @vfmsub_vf_nxv1f16_unmasked_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {3753; ZVFH-LABEL: vfmsub_vf_nxv1f16_unmasked_commute:3754; ZVFH: # %bb.0:3755; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3756; ZVFH-NEXT: vfmsub.vf v8, fa0, v93757; ZVFH-NEXT: ret3758;3759; ZVFHMIN-LABEL: vfmsub_vf_nxv1f16_unmasked_commute:3760; ZVFHMIN: # %bb.0:3761; ZVFHMIN-NEXT: fmv.x.h a1, fa03762; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3763; ZVFHMIN-NEXT: vmv.v.x v10, a13764; ZVFHMIN-NEXT: lui a0, 83765; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v83766; ZVFHMIN-NEXT: vxor.vx v8, v9, a03767; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v83768; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v103769; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3770; ZVFHMIN-NEXT: vfmadd.vv v12, v11, v93771; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3772; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v123773; ZVFHMIN-NEXT: ret3774 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 03775 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer3776 %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)3777 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %va, <vscale x 1 x half> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)3778 ret <vscale x 1 x half> %v3779}3780 3781define <vscale x 1 x half> @vfnmadd_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {3782; ZVFH-LABEL: vfnmadd_vv_nxv1f16:3783; ZVFH: # %bb.0:3784; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3785; ZVFH-NEXT: vfnmadd.vv v9, v8, v10, v0.t3786; ZVFH-NEXT: vmv1r.v v8, v93787; ZVFH-NEXT: ret3788;3789; ZVFHMIN-LABEL: vfnmadd_vv_nxv1f16:3790; ZVFHMIN: # %bb.0:3791; ZVFHMIN-NEXT: lui a1, 83792; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3793; ZVFHMIN-NEXT: vxor.vx v9, v9, a1, v0.t3794; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t3795; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t3796; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t3797; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t3798; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3799; ZVFHMIN-NEXT: vfmadd.vv v10, v9, v11, v0.t3800; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3801; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t3802; ZVFHMIN-NEXT: ret3803 %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)3804 %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)3805 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negb, <vscale x 1 x half> %negc, <vscale x 1 x i1> %m, i32 %evl)3806 ret <vscale x 1 x half> %v3807}3808 3809define <vscale x 1 x half> @vfnmadd_vv_nxv1f16_commuted(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {3810; ZVFH-LABEL: vfnmadd_vv_nxv1f16_commuted:3811; ZVFH: # %bb.0:3812; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3813; ZVFH-NEXT: vfnmadd.vv v8, v9, v10, v0.t3814; ZVFH-NEXT: ret3815;3816; ZVFHMIN-LABEL: vfnmadd_vv_nxv1f16_commuted:3817; ZVFHMIN: # %bb.0:3818; ZVFHMIN-NEXT: lui a1, 83819; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3820; ZVFHMIN-NEXT: vxor.vx v9, v9, a1, v0.t3821; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t3822; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t3823; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t3824; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t3825; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3826; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v11, v0.t3827; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3828; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t3829; ZVFHMIN-NEXT: ret3830 %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)3831 %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)3832 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negb, <vscale x 1 x half> %va, <vscale x 1 x half> %negc, <vscale x 1 x i1> %m, i32 %evl)3833 ret <vscale x 1 x half> %v3834}3835 3836define <vscale x 1 x half> @vfnmadd_vv_nxv1f16_unmasked(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, i32 zeroext %evl) {3837; ZVFH-LABEL: vfnmadd_vv_nxv1f16_unmasked:3838; ZVFH: # %bb.0:3839; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3840; ZVFH-NEXT: vfnmadd.vv v8, v9, v103841; ZVFH-NEXT: ret3842;3843; ZVFHMIN-LABEL: vfnmadd_vv_nxv1f16_unmasked:3844; ZVFHMIN: # %bb.0:3845; ZVFHMIN-NEXT: lui a1, 83846; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3847; ZVFHMIN-NEXT: vxor.vx v9, v9, a13848; ZVFHMIN-NEXT: vxor.vx v10, v10, a13849; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v103850; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v93851; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v83852; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3853; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v113854; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3855; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v93856; ZVFHMIN-NEXT: ret3857 %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)3858 %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)3859 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negb, <vscale x 1 x half> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)3860 ret <vscale x 1 x half> %v3861}3862 3863define <vscale x 1 x half> @vfnmadd_vv_nxv1f16_unmasked_commuted(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, i32 zeroext %evl) {3864; ZVFH-LABEL: vfnmadd_vv_nxv1f16_unmasked_commuted:3865; ZVFH: # %bb.0:3866; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3867; ZVFH-NEXT: vfnmadd.vv v8, v9, v103868; ZVFH-NEXT: ret3869;3870; ZVFHMIN-LABEL: vfnmadd_vv_nxv1f16_unmasked_commuted:3871; ZVFHMIN: # %bb.0:3872; ZVFHMIN-NEXT: lui a1, 83873; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3874; ZVFHMIN-NEXT: vxor.vx v9, v9, a13875; ZVFHMIN-NEXT: vxor.vx v10, v10, a13876; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v103877; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v93878; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v83879; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3880; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v113881; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3882; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v93883; ZVFHMIN-NEXT: ret3884 %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)3885 %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)3886 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negb, <vscale x 1 x half> %va, <vscale x 1 x half> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)3887 ret <vscale x 1 x half> %v3888}3889 3890define <vscale x 1 x half> @vfnmadd_vf_nxv1f16(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {3891; ZVFH-LABEL: vfnmadd_vf_nxv1f16:3892; ZVFH: # %bb.0:3893; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3894; ZVFH-NEXT: vfnmadd.vf v8, fa0, v9, v0.t3895; ZVFH-NEXT: ret3896;3897; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16:3898; ZVFHMIN: # %bb.0:3899; ZVFHMIN-NEXT: fmv.x.h a1, fa03900; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3901; ZVFHMIN-NEXT: vmv.v.x v10, a13902; ZVFHMIN-NEXT: lui a0, 83903; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t3904; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t3905; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v9, v0.t3906; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t3907; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t3908; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3909; ZVFHMIN-NEXT: vfmadd.vv v12, v9, v11, v0.t3910; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3911; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t3912; ZVFHMIN-NEXT: ret3913 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 03914 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer3915 %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> %m, i32 %evl)3916 %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)3917 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negva, <vscale x 1 x half> %vb, <vscale x 1 x half> %negvc, <vscale x 1 x i1> %m, i32 %evl)3918 ret <vscale x 1 x half> %v3919}3920 3921define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {3922; ZVFH-LABEL: vfnmadd_vf_nxv1f16_commute:3923; ZVFH: # %bb.0:3924; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3925; ZVFH-NEXT: vfnmadd.vf v8, fa0, v9, v0.t3926; ZVFH-NEXT: ret3927;3928; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_commute:3929; ZVFHMIN: # %bb.0:3930; ZVFHMIN-NEXT: fmv.x.h a1, fa03931; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3932; ZVFHMIN-NEXT: vmv.v.x v10, a13933; ZVFHMIN-NEXT: lui a0, 83934; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t3935; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t3936; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v9, v0.t3937; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t3938; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10, v0.t3939; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3940; ZVFHMIN-NEXT: vfmadd.vv v9, v8, v11, v0.t3941; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3942; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t3943; ZVFHMIN-NEXT: ret3944 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 03945 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer3946 %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> %m, i32 %evl)3947 %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)3948 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %negva, <vscale x 1 x half> %negvc, <vscale x 1 x i1> %m, i32 %evl)3949 ret <vscale x 1 x half> %v3950}3951 3952define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {3953; ZVFH-LABEL: vfnmadd_vf_nxv1f16_unmasked:3954; ZVFH: # %bb.0:3955; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3956; ZVFH-NEXT: vfnmadd.vf v8, fa0, v93957; ZVFH-NEXT: ret3958;3959; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_unmasked:3960; ZVFHMIN: # %bb.0:3961; ZVFHMIN-NEXT: fmv.x.h a1, fa03962; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3963; ZVFHMIN-NEXT: vmv.v.x v10, a13964; ZVFHMIN-NEXT: lui a0, 83965; ZVFHMIN-NEXT: vxor.vx v8, v8, a03966; ZVFHMIN-NEXT: vxor.vx v9, v9, a03967; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v93968; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v83969; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v103970; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma3971; ZVFHMIN-NEXT: vfmadd.vv v12, v9, v113972; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma3973; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v123974; ZVFHMIN-NEXT: ret3975 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 03976 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer3977 %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)3978 %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)3979 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negva, <vscale x 1 x half> %vb, <vscale x 1 x half> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)3980 ret <vscale x 1 x half> %v3981}3982 3983define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_unmasked_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {3984; ZVFH-LABEL: vfnmadd_vf_nxv1f16_unmasked_commute:3985; ZVFH: # %bb.0:3986; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3987; ZVFH-NEXT: vfnmadd.vf v8, fa0, v93988; ZVFH-NEXT: ret3989;3990; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_unmasked_commute:3991; ZVFHMIN: # %bb.0:3992; ZVFHMIN-NEXT: fmv.x.h a1, fa03993; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma3994; ZVFHMIN-NEXT: vmv.v.x v10, a13995; ZVFHMIN-NEXT: lui a0, 83996; ZVFHMIN-NEXT: vxor.vx v8, v8, a03997; ZVFHMIN-NEXT: vxor.vx v9, v9, a03998; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v93999; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84000; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v104001; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4002; ZVFHMIN-NEXT: vfmadd.vv v12, v9, v114003; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4004; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v124005; ZVFHMIN-NEXT: ret4006 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04007 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4008 %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)4009 %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)4010 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %negva, <vscale x 1 x half> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)4011 ret <vscale x 1 x half> %v4012}4013 4014define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_neg_splat(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {4015; ZVFH-LABEL: vfnmadd_vf_nxv1f16_neg_splat:4016; ZVFH: # %bb.0:4017; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4018; ZVFH-NEXT: vfnmadd.vf v8, fa0, v9, v0.t4019; ZVFH-NEXT: ret4020;4021; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_neg_splat:4022; ZVFHMIN: # %bb.0:4023; ZVFHMIN-NEXT: fmv.x.h a1, fa04024; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4025; ZVFHMIN-NEXT: vmv.v.x v10, a14026; ZVFHMIN-NEXT: lui a0, 84027; ZVFHMIN-NEXT: vxor.vx v10, v10, a0, v0.t4028; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t4029; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v9, v0.t4030; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v10, v0.t4031; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t4032; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4033; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v11, v0.t4034; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4035; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t4036; ZVFHMIN-NEXT: ret4037 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04038 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4039 %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)4040 %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)4041 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negvb, <vscale x 1 x half> %negvc, <vscale x 1 x i1> %m, i32 %evl)4042 ret <vscale x 1 x half> %v4043}4044 4045define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_neg_splat_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {4046; ZVFH-LABEL: vfnmadd_vf_nxv1f16_neg_splat_commute:4047; ZVFH: # %bb.0:4048; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4049; ZVFH-NEXT: vfnmadd.vf v8, fa0, v9, v0.t4050; ZVFH-NEXT: ret4051;4052; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_neg_splat_commute:4053; ZVFHMIN: # %bb.0:4054; ZVFHMIN-NEXT: fmv.x.h a1, fa04055; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4056; ZVFHMIN-NEXT: vmv.v.x v10, a14057; ZVFHMIN-NEXT: lui a0, 84058; ZVFHMIN-NEXT: vxor.vx v10, v10, a0, v0.t4059; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t4060; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v9, v0.t4061; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v10, v0.t4062; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t4063; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4064; ZVFHMIN-NEXT: vfmadd.vv v10, v9, v11, v0.t4065; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4066; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t4067; ZVFHMIN-NEXT: ret4068 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04069 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4070 %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)4071 %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)4072 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negvb, <vscale x 1 x half> %va, <vscale x 1 x half> %negvc, <vscale x 1 x i1> %m, i32 %evl)4073 ret <vscale x 1 x half> %v4074}4075 4076define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_neg_splat_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {4077; ZVFH-LABEL: vfnmadd_vf_nxv1f16_neg_splat_unmasked:4078; ZVFH: # %bb.0:4079; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4080; ZVFH-NEXT: vfnmadd.vf v8, fa0, v94081; ZVFH-NEXT: ret4082;4083; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_neg_splat_unmasked:4084; ZVFHMIN: # %bb.0:4085; ZVFHMIN-NEXT: fmv.x.h a1, fa04086; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4087; ZVFHMIN-NEXT: vmv.v.x v10, a14088; ZVFHMIN-NEXT: lui a0, 84089; ZVFHMIN-NEXT: vxor.vx v9, v9, a04090; ZVFHMIN-NEXT: vxor.vx v10, v10, a04091; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v94092; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v104093; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v84094; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4095; ZVFHMIN-NEXT: vfmadd.vv v10, v9, v114096; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4097; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v104098; ZVFHMIN-NEXT: ret4099 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04100 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4101 %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)4102 %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)4103 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negvb, <vscale x 1 x half> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)4104 ret <vscale x 1 x half> %v4105}4106 4107define <vscale x 1 x half> @vfnmadd_vf_nxv1f16_neg_splat_unmasked_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {4108; ZVFH-LABEL: vfnmadd_vf_nxv1f16_neg_splat_unmasked_commute:4109; ZVFH: # %bb.0:4110; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4111; ZVFH-NEXT: vfnmadd.vf v8, fa0, v94112; ZVFH-NEXT: ret4113;4114; ZVFHMIN-LABEL: vfnmadd_vf_nxv1f16_neg_splat_unmasked_commute:4115; ZVFHMIN: # %bb.0:4116; ZVFHMIN-NEXT: fmv.x.h a1, fa04117; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4118; ZVFHMIN-NEXT: vmv.v.x v10, a14119; ZVFHMIN-NEXT: lui a0, 84120; ZVFHMIN-NEXT: vxor.vx v9, v9, a04121; ZVFHMIN-NEXT: vxor.vx v10, v10, a04122; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v94123; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v104124; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v84125; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4126; ZVFHMIN-NEXT: vfmadd.vv v10, v9, v114127; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4128; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v104129; ZVFHMIN-NEXT: ret4130 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04131 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4132 %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)4133 %negvc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)4134 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negvb, <vscale x 1 x half> %va, <vscale x 1 x half> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)4135 ret <vscale x 1 x half> %v4136}4137 4138define <vscale x 1 x half> @vfnmsub_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {4139; ZVFH-LABEL: vfnmsub_vv_nxv1f16:4140; ZVFH: # %bb.0:4141; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4142; ZVFH-NEXT: vfnmadd.vv v9, v8, v10, v0.t4143; ZVFH-NEXT: vmv1r.v v8, v94144; ZVFH-NEXT: ret4145;4146; ZVFHMIN-LABEL: vfnmsub_vv_nxv1f16:4147; ZVFHMIN: # %bb.0:4148; ZVFHMIN-NEXT: lui a1, 84149; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4150; ZVFHMIN-NEXT: vxor.vx v9, v9, a1, v0.t4151; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t4152; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t4153; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t4154; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t4155; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4156; ZVFHMIN-NEXT: vfmadd.vv v10, v9, v11, v0.t4157; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4158; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t4159; ZVFHMIN-NEXT: ret4160 %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)4161 %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)4162 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negb, <vscale x 1 x half> %negc, <vscale x 1 x i1> %m, i32 %evl)4163 ret <vscale x 1 x half> %v4164}4165 4166define <vscale x 1 x half> @vfnmsub_vv_nxv1f16_commuted(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {4167; ZVFH-LABEL: vfnmsub_vv_nxv1f16_commuted:4168; ZVFH: # %bb.0:4169; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4170; ZVFH-NEXT: vfnmadd.vv v8, v9, v10, v0.t4171; ZVFH-NEXT: ret4172;4173; ZVFHMIN-LABEL: vfnmsub_vv_nxv1f16_commuted:4174; ZVFHMIN: # %bb.0:4175; ZVFHMIN-NEXT: lui a1, 84176; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4177; ZVFHMIN-NEXT: vxor.vx v9, v9, a1, v0.t4178; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t4179; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t4180; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t4181; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t4182; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4183; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v11, v0.t4184; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4185; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t4186; ZVFHMIN-NEXT: ret4187 %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)4188 %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)4189 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negb, <vscale x 1 x half> %va, <vscale x 1 x half> %negc, <vscale x 1 x i1> %m, i32 %evl)4190 ret <vscale x 1 x half> %v4191}4192 4193define <vscale x 1 x half> @vfnmsub_vv_nxv1f16_unmasked(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, i32 zeroext %evl) {4194; ZVFH-LABEL: vfnmsub_vv_nxv1f16_unmasked:4195; ZVFH: # %bb.0:4196; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4197; ZVFH-NEXT: vfnmadd.vv v8, v9, v104198; ZVFH-NEXT: ret4199;4200; ZVFHMIN-LABEL: vfnmsub_vv_nxv1f16_unmasked:4201; ZVFHMIN: # %bb.0:4202; ZVFHMIN-NEXT: lui a1, 84203; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4204; ZVFHMIN-NEXT: vxor.vx v9, v9, a14205; ZVFHMIN-NEXT: vxor.vx v10, v10, a14206; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v104207; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v94208; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84209; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4210; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v114211; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4212; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v94213; ZVFHMIN-NEXT: ret4214 %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)4215 %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)4216 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negb, <vscale x 1 x half> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)4217 ret <vscale x 1 x half> %v4218}4219 4220define <vscale x 1 x half> @vfnmsub_vv_nxv1f16_unmasked_commuted(<vscale x 1 x half> %va, <vscale x 1 x half> %b, <vscale x 1 x half> %c, i32 zeroext %evl) {4221; ZVFH-LABEL: vfnmsub_vv_nxv1f16_unmasked_commuted:4222; ZVFH: # %bb.0:4223; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4224; ZVFH-NEXT: vfnmadd.vv v8, v9, v104225; ZVFH-NEXT: ret4226;4227; ZVFHMIN-LABEL: vfnmsub_vv_nxv1f16_unmasked_commuted:4228; ZVFHMIN: # %bb.0:4229; ZVFHMIN-NEXT: lui a1, 84230; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4231; ZVFHMIN-NEXT: vxor.vx v9, v9, a14232; ZVFHMIN-NEXT: vxor.vx v10, v10, a14233; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v104234; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v94235; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84236; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4237; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v114238; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4239; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v94240; ZVFHMIN-NEXT: ret4241 %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)4242 %negc = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)4243 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negb, <vscale x 1 x half> %va, <vscale x 1 x half> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)4244 ret <vscale x 1 x half> %v4245}4246 4247define <vscale x 1 x half> @vfnmsub_vf_nxv1f16(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {4248; ZVFH-LABEL: vfnmsub_vf_nxv1f16:4249; ZVFH: # %bb.0:4250; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4251; ZVFH-NEXT: vfnmsub.vf v8, fa0, v9, v0.t4252; ZVFH-NEXT: ret4253;4254; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16:4255; ZVFHMIN: # %bb.0:4256; ZVFHMIN-NEXT: fmv.x.h a1, fa04257; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4258; ZVFHMIN-NEXT: vmv.v.x v10, a14259; ZVFHMIN-NEXT: lui a0, 84260; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t4261; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t4262; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t4263; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v10, v0.t4264; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4265; ZVFHMIN-NEXT: vfmadd.vv v9, v11, v8, v0.t4266; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4267; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t4268; ZVFHMIN-NEXT: ret4269 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04270 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4271 %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> %m, i32 %evl)4272 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negva, <vscale x 1 x half> %vb, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)4273 ret <vscale x 1 x half> %v4274}4275 4276define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {4277; ZVFH-LABEL: vfnmsub_vf_nxv1f16_commute:4278; ZVFH: # %bb.0:4279; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4280; ZVFH-NEXT: vfnmsub.vf v8, fa0, v9, v0.t4281; ZVFH-NEXT: ret4282;4283; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_commute:4284; ZVFHMIN: # %bb.0:4285; ZVFHMIN-NEXT: fmv.x.h a1, fa04286; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4287; ZVFHMIN-NEXT: vmv.v.x v10, a14288; ZVFHMIN-NEXT: lui a0, 84289; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t4290; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t4291; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t4292; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v10, v0.t4293; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4294; ZVFHMIN-NEXT: vfmadd.vv v11, v9, v8, v0.t4295; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4296; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v11, v0.t4297; ZVFHMIN-NEXT: ret4298 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04299 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4300 %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> %m, i32 %evl)4301 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %negva, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)4302 ret <vscale x 1 x half> %v4303}4304 4305define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {4306; ZVFH-LABEL: vfnmsub_vf_nxv1f16_unmasked:4307; ZVFH: # %bb.0:4308; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4309; ZVFH-NEXT: vfnmsub.vf v8, fa0, v94310; ZVFH-NEXT: ret4311;4312; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_unmasked:4313; ZVFHMIN: # %bb.0:4314; ZVFHMIN-NEXT: fmv.x.h a1, fa04315; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4316; ZVFHMIN-NEXT: vmv.v.x v10, a14317; ZVFHMIN-NEXT: lui a0, 84318; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v94319; ZVFHMIN-NEXT: vxor.vx v8, v8, a04320; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84321; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v104322; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4323; ZVFHMIN-NEXT: vfmadd.vv v12, v9, v114324; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4325; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v124326; ZVFHMIN-NEXT: ret4327 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04328 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4329 %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)4330 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negva, <vscale x 1 x half> %vb, <vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)4331 ret <vscale x 1 x half> %v4332}4333 4334define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_unmasked_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {4335; ZVFH-LABEL: vfnmsub_vf_nxv1f16_unmasked_commute:4336; ZVFH: # %bb.0:4337; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4338; ZVFH-NEXT: vfnmsub.vf v8, fa0, v94339; ZVFH-NEXT: ret4340;4341; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_unmasked_commute:4342; ZVFHMIN: # %bb.0:4343; ZVFHMIN-NEXT: fmv.x.h a1, fa04344; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4345; ZVFHMIN-NEXT: vmv.v.x v10, a14346; ZVFHMIN-NEXT: lui a0, 84347; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v94348; ZVFHMIN-NEXT: vxor.vx v8, v8, a04349; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84350; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v104351; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4352; ZVFHMIN-NEXT: vfmadd.vv v12, v9, v114353; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4354; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v124355; ZVFHMIN-NEXT: ret4356 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04357 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4358 %negva = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)4359 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x half> %negva, <vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)4360 ret <vscale x 1 x half> %v4361}4362 4363define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_neg_splat(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {4364; ZVFH-LABEL: vfnmsub_vf_nxv1f16_neg_splat:4365; ZVFH: # %bb.0:4366; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4367; ZVFH-NEXT: vfnmsub.vf v8, fa0, v9, v0.t4368; ZVFH-NEXT: ret4369;4370; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_neg_splat:4371; ZVFHMIN: # %bb.0:4372; ZVFHMIN-NEXT: fmv.x.h a1, fa04373; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4374; ZVFHMIN-NEXT: vmv.v.x v10, a14375; ZVFHMIN-NEXT: lui a0, 84376; ZVFHMIN-NEXT: vxor.vx v10, v10, a0, v0.t4377; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t4378; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t4379; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t4380; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4381; ZVFHMIN-NEXT: vfmadd.vv v11, v9, v10, v0.t4382; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4383; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v11, v0.t4384; ZVFHMIN-NEXT: ret4385 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04386 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4387 %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)4388 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negvb, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)4389 ret <vscale x 1 x half> %v4390}4391 4392define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_neg_splat_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {4393; ZVFH-LABEL: vfnmsub_vf_nxv1f16_neg_splat_commute:4394; ZVFH: # %bb.0:4395; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4396; ZVFH-NEXT: vfnmsub.vf v8, fa0, v9, v0.t4397; ZVFH-NEXT: ret4398;4399; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_neg_splat_commute:4400; ZVFHMIN: # %bb.0:4401; ZVFHMIN-NEXT: fmv.x.h a1, fa04402; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4403; ZVFHMIN-NEXT: vmv.v.x v10, a14404; ZVFHMIN-NEXT: lui a0, 84405; ZVFHMIN-NEXT: vxor.vx v10, v10, a0, v0.t4406; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t4407; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t4408; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t4409; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4410; ZVFHMIN-NEXT: vfmadd.vv v9, v11, v10, v0.t4411; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4412; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t4413; ZVFHMIN-NEXT: ret4414 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04415 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4416 %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)4417 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negvb, <vscale x 1 x half> %va, <vscale x 1 x half> %vc, <vscale x 1 x i1> %m, i32 %evl)4418 ret <vscale x 1 x half> %v4419}4420 4421define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_neg_splat_unmasked(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {4422; ZVFH-LABEL: vfnmsub_vf_nxv1f16_neg_splat_unmasked:4423; ZVFH: # %bb.0:4424; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4425; ZVFH-NEXT: vfnmsub.vf v8, fa0, v94426; ZVFH-NEXT: ret4427;4428; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_neg_splat_unmasked:4429; ZVFHMIN: # %bb.0:4430; ZVFHMIN-NEXT: fmv.x.h a1, fa04431; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4432; ZVFHMIN-NEXT: vmv.v.x v10, a14433; ZVFHMIN-NEXT: lui a0, 84434; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v94435; ZVFHMIN-NEXT: vxor.vx v9, v10, a04436; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v94437; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84438; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4439; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v114440; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4441; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v94442; ZVFHMIN-NEXT: ret4443 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04444 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4445 %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)4446 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %negvb, <vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)4447 ret <vscale x 1 x half> %v4448}4449 4450define <vscale x 1 x half> @vfnmsub_vf_nxv1f16_neg_splat_unmasked_commute(<vscale x 1 x half> %va, half %b, <vscale x 1 x half> %vc, i32 zeroext %evl) {4451; ZVFH-LABEL: vfnmsub_vf_nxv1f16_neg_splat_unmasked_commute:4452; ZVFH: # %bb.0:4453; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4454; ZVFH-NEXT: vfnmsub.vf v8, fa0, v94455; ZVFH-NEXT: ret4456;4457; ZVFHMIN-LABEL: vfnmsub_vf_nxv1f16_neg_splat_unmasked_commute:4458; ZVFHMIN: # %bb.0:4459; ZVFHMIN-NEXT: fmv.x.h a1, fa04460; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma4461; ZVFHMIN-NEXT: vmv.v.x v10, a14462; ZVFHMIN-NEXT: lui a0, 84463; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v94464; ZVFHMIN-NEXT: vxor.vx v9, v10, a04465; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v94466; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84467; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma4468; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v114469; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma4470; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v94471; ZVFHMIN-NEXT: ret4472 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 04473 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer4474 %negvb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)4475 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %negvb, <vscale x 1 x half> %va, <vscale x 1 x half> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)4476 ret <vscale x 1 x half> %v4477}4478 4479define <vscale x 2 x half> @vfmsub_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {4480; ZVFH-LABEL: vfmsub_vv_nxv2f16:4481; ZVFH: # %bb.0:4482; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4483; ZVFH-NEXT: vfmsub.vv v9, v8, v10, v0.t4484; ZVFH-NEXT: vmv1r.v v8, v94485; ZVFH-NEXT: ret4486;4487; ZVFHMIN-LABEL: vfmsub_vv_nxv2f16:4488; ZVFHMIN: # %bb.0:4489; ZVFHMIN-NEXT: lui a1, 84490; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4491; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t4492; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t4493; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t4494; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t4495; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4496; ZVFHMIN-NEXT: vfmadd.vv v12, v10, v11, v0.t4497; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4498; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t4499; ZVFHMIN-NEXT: ret4500 %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 %evl)4501 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %negc, <vscale x 2 x i1> %m, i32 %evl)4502 ret <vscale x 2 x half> %v4503}4504 4505define <vscale x 2 x half> @vfmsub_vv_nxv2f16_unmasked(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, i32 zeroext %evl) {4506; ZVFH-LABEL: vfmsub_vv_nxv2f16_unmasked:4507; ZVFH: # %bb.0:4508; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4509; ZVFH-NEXT: vfmsub.vv v8, v9, v104510; ZVFH-NEXT: ret4511;4512; ZVFHMIN-LABEL: vfmsub_vv_nxv2f16_unmasked:4513; ZVFHMIN: # %bb.0:4514; ZVFHMIN-NEXT: lui a1, 84515; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4516; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v84517; ZVFHMIN-NEXT: vxor.vx v8, v10, a14518; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v84519; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v94520; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4521; ZVFHMIN-NEXT: vfmadd.vv v12, v11, v104522; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4523; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v124524; ZVFHMIN-NEXT: ret4525 %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)4526 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4527 ret <vscale x 2 x half> %v4528}4529 4530define <vscale x 2 x half> @vfmsub_vf_nxv2f16(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {4531; ZVFH-LABEL: vfmsub_vf_nxv2f16:4532; ZVFH: # %bb.0:4533; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4534; ZVFH-NEXT: vfmsub.vf v8, fa0, v9, v0.t4535; ZVFH-NEXT: ret4536;4537; ZVFHMIN-LABEL: vfmsub_vf_nxv2f16:4538; ZVFHMIN: # %bb.0:4539; ZVFHMIN-NEXT: fmv.x.h a1, fa04540; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4541; ZVFHMIN-NEXT: vmv.v.x v10, a14542; ZVFHMIN-NEXT: lui a0, 84543; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t4544; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v9, v0.t4545; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t4546; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t4547; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4548; ZVFHMIN-NEXT: vfmadd.vv v12, v9, v11, v0.t4549; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4550; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t4551; ZVFHMIN-NEXT: ret4552 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 04553 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer4554 %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)4555 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x half> %negvc, <vscale x 2 x i1> %m, i32 %evl)4556 ret <vscale x 2 x half> %v4557}4558 4559define <vscale x 2 x half> @vfmsub_vf_nxv2f16_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {4560; ZVFH-LABEL: vfmsub_vf_nxv2f16_commute:4561; ZVFH: # %bb.0:4562; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4563; ZVFH-NEXT: vfmsub.vf v8, fa0, v9, v0.t4564; ZVFH-NEXT: ret4565;4566; ZVFHMIN-LABEL: vfmsub_vf_nxv2f16_commute:4567; ZVFHMIN: # %bb.0:4568; ZVFHMIN-NEXT: fmv.x.h a1, fa04569; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4570; ZVFHMIN-NEXT: vmv.v.x v10, a14571; ZVFHMIN-NEXT: lui a0, 84572; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t4573; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v9, v0.t4574; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t4575; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10, v0.t4576; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4577; ZVFHMIN-NEXT: vfmadd.vv v9, v8, v11, v0.t4578; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4579; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t4580; ZVFHMIN-NEXT: ret4581 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 04582 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer4583 %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)4584 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %va, <vscale x 2 x half> %negvc, <vscale x 2 x i1> %m, i32 %evl)4585 ret <vscale x 2 x half> %v4586}4587 4588define <vscale x 2 x half> @vfmsub_vf_nxv2f16_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {4589; ZVFH-LABEL: vfmsub_vf_nxv2f16_unmasked:4590; ZVFH: # %bb.0:4591; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4592; ZVFH-NEXT: vfmsub.vf v8, fa0, v94593; ZVFH-NEXT: ret4594;4595; ZVFHMIN-LABEL: vfmsub_vf_nxv2f16_unmasked:4596; ZVFHMIN: # %bb.0:4597; ZVFHMIN-NEXT: fmv.x.h a1, fa04598; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4599; ZVFHMIN-NEXT: vmv.v.x v10, a14600; ZVFHMIN-NEXT: lui a0, 84601; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v84602; ZVFHMIN-NEXT: vxor.vx v8, v9, a04603; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84604; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v104605; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4606; ZVFHMIN-NEXT: vfmadd.vv v12, v11, v94607; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4608; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v124609; ZVFHMIN-NEXT: ret4610 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 04611 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer4612 %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4613 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x half> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4614 ret <vscale x 2 x half> %v4615}4616 4617define <vscale x 2 x half> @vfmsub_vf_nxv2f16_unmasked_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {4618; ZVFH-LABEL: vfmsub_vf_nxv2f16_unmasked_commute:4619; ZVFH: # %bb.0:4620; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4621; ZVFH-NEXT: vfmsub.vf v8, fa0, v94622; ZVFH-NEXT: ret4623;4624; ZVFHMIN-LABEL: vfmsub_vf_nxv2f16_unmasked_commute:4625; ZVFHMIN: # %bb.0:4626; ZVFHMIN-NEXT: fmv.x.h a1, fa04627; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4628; ZVFHMIN-NEXT: vmv.v.x v10, a14629; ZVFHMIN-NEXT: lui a0, 84630; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v84631; ZVFHMIN-NEXT: vxor.vx v8, v9, a04632; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84633; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v104634; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4635; ZVFHMIN-NEXT: vfmadd.vv v12, v11, v94636; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4637; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v124638; ZVFHMIN-NEXT: ret4639 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 04640 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer4641 %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4642 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %va, <vscale x 2 x half> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4643 ret <vscale x 2 x half> %v4644}4645 4646define <vscale x 2 x half> @vfnmadd_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {4647; ZVFH-LABEL: vfnmadd_vv_nxv2f16:4648; ZVFH: # %bb.0:4649; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4650; ZVFH-NEXT: vfnmadd.vv v9, v8, v10, v0.t4651; ZVFH-NEXT: vmv1r.v v8, v94652; ZVFH-NEXT: ret4653;4654; ZVFHMIN-LABEL: vfnmadd_vv_nxv2f16:4655; ZVFHMIN: # %bb.0:4656; ZVFHMIN-NEXT: lui a1, 84657; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4658; ZVFHMIN-NEXT: vxor.vx v9, v9, a1, v0.t4659; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t4660; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t4661; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t4662; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t4663; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4664; ZVFHMIN-NEXT: vfmadd.vv v10, v9, v11, v0.t4665; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4666; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t4667; ZVFHMIN-NEXT: ret4668 %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)4669 %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 %evl)4670 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negb, <vscale x 2 x half> %negc, <vscale x 2 x i1> %m, i32 %evl)4671 ret <vscale x 2 x half> %v4672}4673 4674define <vscale x 2 x half> @vfnmadd_vv_nxv2f16_commuted(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {4675; ZVFH-LABEL: vfnmadd_vv_nxv2f16_commuted:4676; ZVFH: # %bb.0:4677; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4678; ZVFH-NEXT: vfnmadd.vv v8, v9, v10, v0.t4679; ZVFH-NEXT: ret4680;4681; ZVFHMIN-LABEL: vfnmadd_vv_nxv2f16_commuted:4682; ZVFHMIN: # %bb.0:4683; ZVFHMIN-NEXT: lui a1, 84684; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4685; ZVFHMIN-NEXT: vxor.vx v9, v9, a1, v0.t4686; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t4687; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t4688; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t4689; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t4690; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4691; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v11, v0.t4692; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4693; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t4694; ZVFHMIN-NEXT: ret4695 %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)4696 %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 %evl)4697 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negb, <vscale x 2 x half> %va, <vscale x 2 x half> %negc, <vscale x 2 x i1> %m, i32 %evl)4698 ret <vscale x 2 x half> %v4699}4700 4701define <vscale x 2 x half> @vfnmadd_vv_nxv2f16_unmasked(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, i32 zeroext %evl) {4702; ZVFH-LABEL: vfnmadd_vv_nxv2f16_unmasked:4703; ZVFH: # %bb.0:4704; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4705; ZVFH-NEXT: vfnmadd.vv v8, v9, v104706; ZVFH-NEXT: ret4707;4708; ZVFHMIN-LABEL: vfnmadd_vv_nxv2f16_unmasked:4709; ZVFHMIN: # %bb.0:4710; ZVFHMIN-NEXT: lui a1, 84711; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4712; ZVFHMIN-NEXT: vxor.vx v9, v9, a14713; ZVFHMIN-NEXT: vxor.vx v10, v10, a14714; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v104715; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v94716; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84717; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4718; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v114719; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4720; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v94721; ZVFHMIN-NEXT: ret4722 %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)4723 %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)4724 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negb, <vscale x 2 x half> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4725 ret <vscale x 2 x half> %v4726}4727 4728define <vscale x 2 x half> @vfnmadd_vv_nxv2f16_unmasked_commuted(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, i32 zeroext %evl) {4729; ZVFH-LABEL: vfnmadd_vv_nxv2f16_unmasked_commuted:4730; ZVFH: # %bb.0:4731; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4732; ZVFH-NEXT: vfnmadd.vv v8, v9, v104733; ZVFH-NEXT: ret4734;4735; ZVFHMIN-LABEL: vfnmadd_vv_nxv2f16_unmasked_commuted:4736; ZVFHMIN: # %bb.0:4737; ZVFHMIN-NEXT: lui a1, 84738; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4739; ZVFHMIN-NEXT: vxor.vx v9, v9, a14740; ZVFHMIN-NEXT: vxor.vx v10, v10, a14741; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v104742; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v94743; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84744; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4745; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v114746; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4747; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v94748; ZVFHMIN-NEXT: ret4749 %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)4750 %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)4751 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negb, <vscale x 2 x half> %va, <vscale x 2 x half> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4752 ret <vscale x 2 x half> %v4753}4754 4755define <vscale x 2 x half> @vfnmadd_vf_nxv2f16(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {4756; ZVFH-LABEL: vfnmadd_vf_nxv2f16:4757; ZVFH: # %bb.0:4758; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4759; ZVFH-NEXT: vfnmadd.vf v8, fa0, v9, v0.t4760; ZVFH-NEXT: ret4761;4762; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16:4763; ZVFHMIN: # %bb.0:4764; ZVFHMIN-NEXT: fmv.x.h a1, fa04765; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4766; ZVFHMIN-NEXT: vmv.v.x v10, a14767; ZVFHMIN-NEXT: lui a0, 84768; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t4769; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t4770; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v9, v0.t4771; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t4772; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t4773; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4774; ZVFHMIN-NEXT: vfmadd.vv v12, v9, v11, v0.t4775; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4776; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t4777; ZVFHMIN-NEXT: ret4778 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 04779 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer4780 %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)4781 %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)4782 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negva, <vscale x 2 x half> %vb, <vscale x 2 x half> %negvc, <vscale x 2 x i1> %m, i32 %evl)4783 ret <vscale x 2 x half> %v4784}4785 4786define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {4787; ZVFH-LABEL: vfnmadd_vf_nxv2f16_commute:4788; ZVFH: # %bb.0:4789; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4790; ZVFH-NEXT: vfnmadd.vf v8, fa0, v9, v0.t4791; ZVFH-NEXT: ret4792;4793; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_commute:4794; ZVFHMIN: # %bb.0:4795; ZVFHMIN-NEXT: fmv.x.h a1, fa04796; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4797; ZVFHMIN-NEXT: vmv.v.x v10, a14798; ZVFHMIN-NEXT: lui a0, 84799; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t4800; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t4801; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v9, v0.t4802; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t4803; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10, v0.t4804; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4805; ZVFHMIN-NEXT: vfmadd.vv v9, v8, v11, v0.t4806; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4807; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t4808; ZVFHMIN-NEXT: ret4809 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 04810 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer4811 %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)4812 %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)4813 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %negva, <vscale x 2 x half> %negvc, <vscale x 2 x i1> %m, i32 %evl)4814 ret <vscale x 2 x half> %v4815}4816 4817define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {4818; ZVFH-LABEL: vfnmadd_vf_nxv2f16_unmasked:4819; ZVFH: # %bb.0:4820; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4821; ZVFH-NEXT: vfnmadd.vf v8, fa0, v94822; ZVFH-NEXT: ret4823;4824; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_unmasked:4825; ZVFHMIN: # %bb.0:4826; ZVFHMIN-NEXT: fmv.x.h a1, fa04827; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4828; ZVFHMIN-NEXT: vmv.v.x v10, a14829; ZVFHMIN-NEXT: lui a0, 84830; ZVFHMIN-NEXT: vxor.vx v8, v8, a04831; ZVFHMIN-NEXT: vxor.vx v9, v9, a04832; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v94833; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84834; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v104835; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4836; ZVFHMIN-NEXT: vfmadd.vv v12, v9, v114837; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4838; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v124839; ZVFHMIN-NEXT: ret4840 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 04841 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer4842 %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)4843 %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4844 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negva, <vscale x 2 x half> %vb, <vscale x 2 x half> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4845 ret <vscale x 2 x half> %v4846}4847 4848define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_unmasked_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {4849; ZVFH-LABEL: vfnmadd_vf_nxv2f16_unmasked_commute:4850; ZVFH: # %bb.0:4851; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4852; ZVFH-NEXT: vfnmadd.vf v8, fa0, v94853; ZVFH-NEXT: ret4854;4855; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_unmasked_commute:4856; ZVFHMIN: # %bb.0:4857; ZVFHMIN-NEXT: fmv.x.h a1, fa04858; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4859; ZVFHMIN-NEXT: vmv.v.x v10, a14860; ZVFHMIN-NEXT: lui a0, 84861; ZVFHMIN-NEXT: vxor.vx v8, v8, a04862; ZVFHMIN-NEXT: vxor.vx v9, v9, a04863; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v94864; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v84865; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v104866; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4867; ZVFHMIN-NEXT: vfmadd.vv v12, v9, v114868; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4869; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v124870; ZVFHMIN-NEXT: ret4871 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 04872 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer4873 %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)4874 %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4875 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %negva, <vscale x 2 x half> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4876 ret <vscale x 2 x half> %v4877}4878 4879define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_neg_splat(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {4880; ZVFH-LABEL: vfnmadd_vf_nxv2f16_neg_splat:4881; ZVFH: # %bb.0:4882; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4883; ZVFH-NEXT: vfnmadd.vf v8, fa0, v9, v0.t4884; ZVFH-NEXT: ret4885;4886; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_neg_splat:4887; ZVFHMIN: # %bb.0:4888; ZVFHMIN-NEXT: fmv.x.h a1, fa04889; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4890; ZVFHMIN-NEXT: vmv.v.x v10, a14891; ZVFHMIN-NEXT: lui a0, 84892; ZVFHMIN-NEXT: vxor.vx v10, v10, a0, v0.t4893; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t4894; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v9, v0.t4895; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v10, v0.t4896; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t4897; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4898; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v11, v0.t4899; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4900; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t4901; ZVFHMIN-NEXT: ret4902 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 04903 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer4904 %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)4905 %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)4906 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negvb, <vscale x 2 x half> %negvc, <vscale x 2 x i1> %m, i32 %evl)4907 ret <vscale x 2 x half> %v4908}4909 4910define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_neg_splat_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {4911; ZVFH-LABEL: vfnmadd_vf_nxv2f16_neg_splat_commute:4912; ZVFH: # %bb.0:4913; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4914; ZVFH-NEXT: vfnmadd.vf v8, fa0, v9, v0.t4915; ZVFH-NEXT: ret4916;4917; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_neg_splat_commute:4918; ZVFHMIN: # %bb.0:4919; ZVFHMIN-NEXT: fmv.x.h a1, fa04920; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4921; ZVFHMIN-NEXT: vmv.v.x v10, a14922; ZVFHMIN-NEXT: lui a0, 84923; ZVFHMIN-NEXT: vxor.vx v10, v10, a0, v0.t4924; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t4925; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v9, v0.t4926; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v10, v0.t4927; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t4928; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4929; ZVFHMIN-NEXT: vfmadd.vv v10, v9, v11, v0.t4930; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4931; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t4932; ZVFHMIN-NEXT: ret4933 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 04934 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer4935 %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)4936 %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)4937 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negvb, <vscale x 2 x half> %va, <vscale x 2 x half> %negvc, <vscale x 2 x i1> %m, i32 %evl)4938 ret <vscale x 2 x half> %v4939}4940 4941define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_neg_splat_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {4942; ZVFH-LABEL: vfnmadd_vf_nxv2f16_neg_splat_unmasked:4943; ZVFH: # %bb.0:4944; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4945; ZVFH-NEXT: vfnmadd.vf v8, fa0, v94946; ZVFH-NEXT: ret4947;4948; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_neg_splat_unmasked:4949; ZVFHMIN: # %bb.0:4950; ZVFHMIN-NEXT: fmv.x.h a1, fa04951; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4952; ZVFHMIN-NEXT: vmv.v.x v10, a14953; ZVFHMIN-NEXT: lui a0, 84954; ZVFHMIN-NEXT: vxor.vx v9, v9, a04955; ZVFHMIN-NEXT: vxor.vx v10, v10, a04956; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v94957; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v104958; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v84959; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4960; ZVFHMIN-NEXT: vfmadd.vv v10, v9, v114961; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4962; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v104963; ZVFHMIN-NEXT: ret4964 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 04965 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer4966 %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)4967 %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4968 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negvb, <vscale x 2 x half> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4969 ret <vscale x 2 x half> %v4970}4971 4972define <vscale x 2 x half> @vfnmadd_vf_nxv2f16_neg_splat_unmasked_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {4973; ZVFH-LABEL: vfnmadd_vf_nxv2f16_neg_splat_unmasked_commute:4974; ZVFH: # %bb.0:4975; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4976; ZVFH-NEXT: vfnmadd.vf v8, fa0, v94977; ZVFH-NEXT: ret4978;4979; ZVFHMIN-LABEL: vfnmadd_vf_nxv2f16_neg_splat_unmasked_commute:4980; ZVFHMIN: # %bb.0:4981; ZVFHMIN-NEXT: fmv.x.h a1, fa04982; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma4983; ZVFHMIN-NEXT: vmv.v.x v10, a14984; ZVFHMIN-NEXT: lui a0, 84985; ZVFHMIN-NEXT: vxor.vx v9, v9, a04986; ZVFHMIN-NEXT: vxor.vx v10, v10, a04987; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v94988; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v104989; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v84990; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma4991; ZVFHMIN-NEXT: vfmadd.vv v10, v9, v114992; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma4993; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v104994; ZVFHMIN-NEXT: ret4995 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 04996 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer4997 %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)4998 %negvc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)4999 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negvb, <vscale x 2 x half> %va, <vscale x 2 x half> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)5000 ret <vscale x 2 x half> %v5001}5002 5003define <vscale x 2 x half> @vfnmsub_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {5004; ZVFH-LABEL: vfnmsub_vv_nxv2f16:5005; ZVFH: # %bb.0:5006; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5007; ZVFH-NEXT: vfnmadd.vv v9, v8, v10, v0.t5008; ZVFH-NEXT: vmv1r.v v8, v95009; ZVFH-NEXT: ret5010;5011; ZVFHMIN-LABEL: vfnmsub_vv_nxv2f16:5012; ZVFHMIN: # %bb.0:5013; ZVFHMIN-NEXT: lui a1, 85014; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5015; ZVFHMIN-NEXT: vxor.vx v9, v9, a1, v0.t5016; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t5017; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t5018; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t5019; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t5020; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma5021; ZVFHMIN-NEXT: vfmadd.vv v10, v9, v11, v0.t5022; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma5023; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t5024; ZVFHMIN-NEXT: ret5025 %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)5026 %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 %evl)5027 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negb, <vscale x 2 x half> %negc, <vscale x 2 x i1> %m, i32 %evl)5028 ret <vscale x 2 x half> %v5029}5030 5031define <vscale x 2 x half> @vfnmsub_vv_nxv2f16_commuted(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {5032; ZVFH-LABEL: vfnmsub_vv_nxv2f16_commuted:5033; ZVFH: # %bb.0:5034; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5035; ZVFH-NEXT: vfnmadd.vv v8, v9, v10, v0.t5036; ZVFH-NEXT: ret5037;5038; ZVFHMIN-LABEL: vfnmsub_vv_nxv2f16_commuted:5039; ZVFHMIN: # %bb.0:5040; ZVFHMIN-NEXT: lui a1, 85041; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5042; ZVFHMIN-NEXT: vxor.vx v9, v9, a1, v0.t5043; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t5044; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t5045; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t5046; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t5047; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma5048; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v11, v0.t5049; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma5050; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t5051; ZVFHMIN-NEXT: ret5052 %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)5053 %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> %m, i32 %evl)5054 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negb, <vscale x 2 x half> %va, <vscale x 2 x half> %negc, <vscale x 2 x i1> %m, i32 %evl)5055 ret <vscale x 2 x half> %v5056}5057 5058define <vscale x 2 x half> @vfnmsub_vv_nxv2f16_unmasked(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, i32 zeroext %evl) {5059; ZVFH-LABEL: vfnmsub_vv_nxv2f16_unmasked:5060; ZVFH: # %bb.0:5061; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5062; ZVFH-NEXT: vfnmadd.vv v8, v9, v105063; ZVFH-NEXT: ret5064;5065; ZVFHMIN-LABEL: vfnmsub_vv_nxv2f16_unmasked:5066; ZVFHMIN: # %bb.0:5067; ZVFHMIN-NEXT: lui a1, 85068; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5069; ZVFHMIN-NEXT: vxor.vx v9, v9, a15070; ZVFHMIN-NEXT: vxor.vx v10, v10, a15071; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v105072; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v95073; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v85074; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma5075; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v115076; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma5077; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v95078; ZVFHMIN-NEXT: ret5079 %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)5080 %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)5081 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negb, <vscale x 2 x half> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)5082 ret <vscale x 2 x half> %v5083}5084 5085define <vscale x 2 x half> @vfnmsub_vv_nxv2f16_unmasked_commuted(<vscale x 2 x half> %va, <vscale x 2 x half> %b, <vscale x 2 x half> %c, i32 zeroext %evl) {5086; ZVFH-LABEL: vfnmsub_vv_nxv2f16_unmasked_commuted:5087; ZVFH: # %bb.0:5088; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5089; ZVFH-NEXT: vfnmadd.vv v8, v9, v105090; ZVFH-NEXT: ret5091;5092; ZVFHMIN-LABEL: vfnmsub_vv_nxv2f16_unmasked_commuted:5093; ZVFHMIN: # %bb.0:5094; ZVFHMIN-NEXT: lui a1, 85095; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5096; ZVFHMIN-NEXT: vxor.vx v9, v9, a15097; ZVFHMIN-NEXT: vxor.vx v10, v10, a15098; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v105099; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v95100; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v85101; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma5102; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v115103; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma5104; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v95105; ZVFHMIN-NEXT: ret5106 %negb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)5107 %negc = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)5108 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negb, <vscale x 2 x half> %va, <vscale x 2 x half> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)5109 ret <vscale x 2 x half> %v5110}5111 5112define <vscale x 2 x half> @vfnmsub_vf_nxv2f16(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {5113; ZVFH-LABEL: vfnmsub_vf_nxv2f16:5114; ZVFH: # %bb.0:5115; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5116; ZVFH-NEXT: vfnmsub.vf v8, fa0, v9, v0.t5117; ZVFH-NEXT: ret5118;5119; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16:5120; ZVFHMIN: # %bb.0:5121; ZVFHMIN-NEXT: fmv.x.h a1, fa05122; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5123; ZVFHMIN-NEXT: vmv.v.x v10, a15124; ZVFHMIN-NEXT: lui a0, 85125; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t5126; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t5127; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t5128; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v10, v0.t5129; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma5130; ZVFHMIN-NEXT: vfmadd.vv v9, v11, v8, v0.t5131; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma5132; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t5133; ZVFHMIN-NEXT: ret5134 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 05135 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer5136 %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)5137 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negva, <vscale x 2 x half> %vb, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)5138 ret <vscale x 2 x half> %v5139}5140 5141define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {5142; ZVFH-LABEL: vfnmsub_vf_nxv2f16_commute:5143; ZVFH: # %bb.0:5144; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5145; ZVFH-NEXT: vfnmsub.vf v8, fa0, v9, v0.t5146; ZVFH-NEXT: ret5147;5148; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_commute:5149; ZVFHMIN: # %bb.0:5150; ZVFHMIN-NEXT: fmv.x.h a1, fa05151; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5152; ZVFHMIN-NEXT: vmv.v.x v10, a15153; ZVFHMIN-NEXT: lui a0, 85154; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t5155; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t5156; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t5157; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v10, v0.t5158; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma5159; ZVFHMIN-NEXT: vfmadd.vv v11, v9, v8, v0.t5160; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma5161; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v11, v0.t5162; ZVFHMIN-NEXT: ret5163 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 05164 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer5165 %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> %m, i32 %evl)5166 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %negva, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)5167 ret <vscale x 2 x half> %v5168}5169 5170define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {5171; ZVFH-LABEL: vfnmsub_vf_nxv2f16_unmasked:5172; ZVFH: # %bb.0:5173; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5174; ZVFH-NEXT: vfnmsub.vf v8, fa0, v95175; ZVFH-NEXT: ret5176;5177; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_unmasked:5178; ZVFHMIN: # %bb.0:5179; ZVFHMIN-NEXT: fmv.x.h a1, fa05180; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5181; ZVFHMIN-NEXT: vmv.v.x v10, a15182; ZVFHMIN-NEXT: lui a0, 85183; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v95184; ZVFHMIN-NEXT: vxor.vx v8, v8, a05185; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v85186; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v105187; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma5188; ZVFHMIN-NEXT: vfmadd.vv v12, v9, v115189; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma5190; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v125191; ZVFHMIN-NEXT: ret5192 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 05193 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer5194 %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)5195 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negva, <vscale x 2 x half> %vb, <vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)5196 ret <vscale x 2 x half> %v5197}5198 5199define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_unmasked_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {5200; ZVFH-LABEL: vfnmsub_vf_nxv2f16_unmasked_commute:5201; ZVFH: # %bb.0:5202; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5203; ZVFH-NEXT: vfnmsub.vf v8, fa0, v95204; ZVFH-NEXT: ret5205;5206; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_unmasked_commute:5207; ZVFHMIN: # %bb.0:5208; ZVFHMIN-NEXT: fmv.x.h a1, fa05209; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5210; ZVFHMIN-NEXT: vmv.v.x v10, a15211; ZVFHMIN-NEXT: lui a0, 85212; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v95213; ZVFHMIN-NEXT: vxor.vx v8, v8, a05214; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v85215; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v105216; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma5217; ZVFHMIN-NEXT: vfmadd.vv v12, v9, v115218; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma5219; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v125220; ZVFHMIN-NEXT: ret5221 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 05222 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer5223 %negva = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)5224 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x half> %negva, <vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)5225 ret <vscale x 2 x half> %v5226}5227 5228define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_neg_splat(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {5229; ZVFH-LABEL: vfnmsub_vf_nxv2f16_neg_splat:5230; ZVFH: # %bb.0:5231; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5232; ZVFH-NEXT: vfnmsub.vf v8, fa0, v9, v0.t5233; ZVFH-NEXT: ret5234;5235; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_neg_splat:5236; ZVFHMIN: # %bb.0:5237; ZVFHMIN-NEXT: fmv.x.h a1, fa05238; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5239; ZVFHMIN-NEXT: vmv.v.x v10, a15240; ZVFHMIN-NEXT: lui a0, 85241; ZVFHMIN-NEXT: vxor.vx v10, v10, a0, v0.t5242; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t5243; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t5244; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t5245; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma5246; ZVFHMIN-NEXT: vfmadd.vv v11, v9, v10, v0.t5247; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma5248; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v11, v0.t5249; ZVFHMIN-NEXT: ret5250 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 05251 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer5252 %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)5253 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negvb, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)5254 ret <vscale x 2 x half> %v5255}5256 5257define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_neg_splat_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {5258; ZVFH-LABEL: vfnmsub_vf_nxv2f16_neg_splat_commute:5259; ZVFH: # %bb.0:5260; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5261; ZVFH-NEXT: vfnmsub.vf v8, fa0, v9, v0.t5262; ZVFH-NEXT: ret5263;5264; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_neg_splat_commute:5265; ZVFHMIN: # %bb.0:5266; ZVFHMIN-NEXT: fmv.x.h a1, fa05267; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5268; ZVFHMIN-NEXT: vmv.v.x v10, a15269; ZVFHMIN-NEXT: lui a0, 85270; ZVFHMIN-NEXT: vxor.vx v10, v10, a0, v0.t5271; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t5272; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t5273; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v8, v0.t5274; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma5275; ZVFHMIN-NEXT: vfmadd.vv v9, v11, v10, v0.t5276; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma5277; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v9, v0.t5278; ZVFHMIN-NEXT: ret5279 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 05280 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer5281 %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)5282 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negvb, <vscale x 2 x half> %va, <vscale x 2 x half> %vc, <vscale x 2 x i1> %m, i32 %evl)5283 ret <vscale x 2 x half> %v5284}5285 5286define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_neg_splat_unmasked(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {5287; ZVFH-LABEL: vfnmsub_vf_nxv2f16_neg_splat_unmasked:5288; ZVFH: # %bb.0:5289; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5290; ZVFH-NEXT: vfnmsub.vf v8, fa0, v95291; ZVFH-NEXT: ret5292;5293; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_neg_splat_unmasked:5294; ZVFHMIN: # %bb.0:5295; ZVFHMIN-NEXT: fmv.x.h a1, fa05296; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5297; ZVFHMIN-NEXT: vmv.v.x v10, a15298; ZVFHMIN-NEXT: lui a0, 85299; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v95300; ZVFHMIN-NEXT: vxor.vx v9, v10, a05301; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v95302; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v85303; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma5304; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v115305; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma5306; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v95307; ZVFHMIN-NEXT: ret5308 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 05309 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer5310 %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)5311 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %negvb, <vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)5312 ret <vscale x 2 x half> %v5313}5314 5315define <vscale x 2 x half> @vfnmsub_vf_nxv2f16_neg_splat_unmasked_commute(<vscale x 2 x half> %va, half %b, <vscale x 2 x half> %vc, i32 zeroext %evl) {5316; ZVFH-LABEL: vfnmsub_vf_nxv2f16_neg_splat_unmasked_commute:5317; ZVFH: # %bb.0:5318; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5319; ZVFH-NEXT: vfnmsub.vf v8, fa0, v95320; ZVFH-NEXT: ret5321;5322; ZVFHMIN-LABEL: vfnmsub_vf_nxv2f16_neg_splat_unmasked_commute:5323; ZVFHMIN: # %bb.0:5324; ZVFHMIN-NEXT: fmv.x.h a1, fa05325; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma5326; ZVFHMIN-NEXT: vmv.v.x v10, a15327; ZVFHMIN-NEXT: lui a0, 85328; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v95329; ZVFHMIN-NEXT: vxor.vx v9, v10, a05330; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v95331; ZVFHMIN-NEXT: vfwcvt.f.f.v v9, v85332; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma5333; ZVFHMIN-NEXT: vfmadd.vv v9, v10, v115334; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, ta, ma5335; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v95336; ZVFHMIN-NEXT: ret5337 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 05338 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer5339 %negvb = call <vscale x 2 x half> @llvm.vp.fneg.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)5340 %v = call <vscale x 2 x half> @llvm.vp.fma.nxv2f16(<vscale x 2 x half> %negvb, <vscale x 2 x half> %va, <vscale x 2 x half> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)5341 ret <vscale x 2 x half> %v5342}5343 5344define <vscale x 4 x half> @vfmsub_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {5345; ZVFH-LABEL: vfmsub_vv_nxv4f16:5346; ZVFH: # %bb.0:5347; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5348; ZVFH-NEXT: vfmsub.vv v9, v8, v10, v0.t5349; ZVFH-NEXT: vmv.v.v v8, v95350; ZVFH-NEXT: ret5351;5352; ZVFHMIN-LABEL: vfmsub_vv_nxv4f16:5353; ZVFHMIN: # %bb.0:5354; ZVFHMIN-NEXT: lui a1, 85355; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5356; ZVFHMIN-NEXT: vxor.vx v12, v10, a1, v0.t5357; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v12, v0.t5358; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t5359; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v9, v0.t5360; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5361; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v10, v0.t5362; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5363; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v14, v0.t5364; ZVFHMIN-NEXT: ret5365 %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 %evl)5366 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %negc, <vscale x 4 x i1> %m, i32 %evl)5367 ret <vscale x 4 x half> %v5368}5369 5370define <vscale x 4 x half> @vfmsub_vv_nxv4f16_unmasked(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, i32 zeroext %evl) {5371; ZVFH-LABEL: vfmsub_vv_nxv4f16_unmasked:5372; ZVFH: # %bb.0:5373; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5374; ZVFH-NEXT: vfmsub.vv v8, v9, v105375; ZVFH-NEXT: ret5376;5377; ZVFHMIN-LABEL: vfmsub_vv_nxv4f16_unmasked:5378; ZVFHMIN: # %bb.0:5379; ZVFHMIN-NEXT: lui a1, 85380; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5381; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v85382; ZVFHMIN-NEXT: vxor.vx v8, v10, a15383; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v85384; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v95385; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5386; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v105387; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5388; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v145389; ZVFHMIN-NEXT: ret5390 %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)5391 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5392 ret <vscale x 4 x half> %v5393}5394 5395define <vscale x 4 x half> @vfmsub_vf_nxv4f16(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {5396; ZVFH-LABEL: vfmsub_vf_nxv4f16:5397; ZVFH: # %bb.0:5398; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5399; ZVFH-NEXT: vfmsub.vf v8, fa0, v9, v0.t5400; ZVFH-NEXT: ret5401;5402; ZVFHMIN-LABEL: vfmsub_vf_nxv4f16:5403; ZVFHMIN: # %bb.0:5404; ZVFHMIN-NEXT: fmv.x.h a1, fa05405; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5406; ZVFHMIN-NEXT: vmv.v.x v16, a15407; ZVFHMIN-NEXT: lui a0, 85408; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t5409; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t5410; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t5411; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v16, v0.t5412; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5413; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v10, v0.t5414; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5415; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v14, v0.t5416; ZVFHMIN-NEXT: ret5417 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 05418 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer5419 %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)5420 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x half> %negvc, <vscale x 4 x i1> %m, i32 %evl)5421 ret <vscale x 4 x half> %v5422}5423 5424define <vscale x 4 x half> @vfmsub_vf_nxv4f16_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {5425; ZVFH-LABEL: vfmsub_vf_nxv4f16_commute:5426; ZVFH: # %bb.0:5427; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5428; ZVFH-NEXT: vfmsub.vf v8, fa0, v9, v0.t5429; ZVFH-NEXT: ret5430;5431; ZVFHMIN-LABEL: vfmsub_vf_nxv4f16_commute:5432; ZVFHMIN: # %bb.0:5433; ZVFHMIN-NEXT: fmv.x.h a1, fa05434; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5435; ZVFHMIN-NEXT: vmv.v.x v14, a15436; ZVFHMIN-NEXT: lui a0, 85437; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t5438; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t5439; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t5440; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v14, v0.t5441; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5442; ZVFHMIN-NEXT: vfmadd.vv v12, v8, v10, v0.t5443; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5444; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t5445; ZVFHMIN-NEXT: ret5446 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 05447 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer5448 %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)5449 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %va, <vscale x 4 x half> %negvc, <vscale x 4 x i1> %m, i32 %evl)5450 ret <vscale x 4 x half> %v5451}5452 5453define <vscale x 4 x half> @vfmsub_vf_nxv4f16_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {5454; ZVFH-LABEL: vfmsub_vf_nxv4f16_unmasked:5455; ZVFH: # %bb.0:5456; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5457; ZVFH-NEXT: vfmsub.vf v8, fa0, v95458; ZVFH-NEXT: ret5459;5460; ZVFHMIN-LABEL: vfmsub_vf_nxv4f16_unmasked:5461; ZVFHMIN: # %bb.0:5462; ZVFHMIN-NEXT: fmv.x.h a1, fa05463; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5464; ZVFHMIN-NEXT: vmv.v.x v14, a15465; ZVFHMIN-NEXT: lui a0, 85466; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v85467; ZVFHMIN-NEXT: vxor.vx v12, v9, a05468; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v125469; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v145470; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5471; ZVFHMIN-NEXT: vfmadd.vv v12, v10, v85472; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5473; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v125474; ZVFHMIN-NEXT: ret5475 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 05476 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer5477 %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5478 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x half> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5479 ret <vscale x 4 x half> %v5480}5481 5482define <vscale x 4 x half> @vfmsub_vf_nxv4f16_unmasked_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {5483; ZVFH-LABEL: vfmsub_vf_nxv4f16_unmasked_commute:5484; ZVFH: # %bb.0:5485; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5486; ZVFH-NEXT: vfmsub.vf v8, fa0, v95487; ZVFH-NEXT: ret5488;5489; ZVFHMIN-LABEL: vfmsub_vf_nxv4f16_unmasked_commute:5490; ZVFHMIN: # %bb.0:5491; ZVFHMIN-NEXT: fmv.x.h a1, fa05492; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5493; ZVFHMIN-NEXT: vmv.v.x v14, a15494; ZVFHMIN-NEXT: lui a0, 85495; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v85496; ZVFHMIN-NEXT: vxor.vx v12, v9, a05497; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v125498; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v145499; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5500; ZVFHMIN-NEXT: vfmadd.vv v12, v10, v85501; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5502; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v125503; ZVFHMIN-NEXT: ret5504 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 05505 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer5506 %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5507 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %va, <vscale x 4 x half> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5508 ret <vscale x 4 x half> %v5509}5510 5511define <vscale x 4 x half> @vfnmadd_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {5512; ZVFH-LABEL: vfnmadd_vv_nxv4f16:5513; ZVFH: # %bb.0:5514; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5515; ZVFH-NEXT: vfnmadd.vv v9, v8, v10, v0.t5516; ZVFH-NEXT: vmv.v.v v8, v95517; ZVFH-NEXT: ret5518;5519; ZVFHMIN-LABEL: vfnmadd_vv_nxv4f16:5520; ZVFHMIN: # %bb.0:5521; ZVFHMIN-NEXT: lui a1, 85522; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5523; ZVFHMIN-NEXT: vxor.vx v9, v9, a1, v0.t5524; ZVFHMIN-NEXT: vxor.vx v12, v10, a1, v0.t5525; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v12, v0.t5526; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t5527; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8, v0.t5528; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5529; ZVFHMIN-NEXT: vfmadd.vv v12, v14, v10, v0.t5530; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5531; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t5532; ZVFHMIN-NEXT: ret5533 %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)5534 %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 %evl)5535 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negb, <vscale x 4 x half> %negc, <vscale x 4 x i1> %m, i32 %evl)5536 ret <vscale x 4 x half> %v5537}5538 5539define <vscale x 4 x half> @vfnmadd_vv_nxv4f16_commuted(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {5540; ZVFH-LABEL: vfnmadd_vv_nxv4f16_commuted:5541; ZVFH: # %bb.0:5542; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5543; ZVFH-NEXT: vfnmadd.vv v8, v9, v10, v0.t5544; ZVFH-NEXT: ret5545;5546; ZVFHMIN-LABEL: vfnmadd_vv_nxv4f16_commuted:5547; ZVFHMIN: # %bb.0:5548; ZVFHMIN-NEXT: lui a1, 85549; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5550; ZVFHMIN-NEXT: vxor.vx v9, v9, a1, v0.t5551; ZVFHMIN-NEXT: vxor.vx v12, v10, a1, v0.t5552; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v12, v0.t5553; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t5554; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8, v0.t5555; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5556; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v10, v0.t5557; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5558; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v14, v0.t5559; ZVFHMIN-NEXT: ret5560 %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)5561 %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 %evl)5562 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negb, <vscale x 4 x half> %va, <vscale x 4 x half> %negc, <vscale x 4 x i1> %m, i32 %evl)5563 ret <vscale x 4 x half> %v5564}5565 5566define <vscale x 4 x half> @vfnmadd_vv_nxv4f16_unmasked(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, i32 zeroext %evl) {5567; ZVFH-LABEL: vfnmadd_vv_nxv4f16_unmasked:5568; ZVFH: # %bb.0:5569; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5570; ZVFH-NEXT: vfnmadd.vv v8, v9, v105571; ZVFH-NEXT: ret5572;5573; ZVFHMIN-LABEL: vfnmadd_vv_nxv4f16_unmasked:5574; ZVFHMIN: # %bb.0:5575; ZVFHMIN-NEXT: lui a1, 85576; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5577; ZVFHMIN-NEXT: vxor.vx v9, v9, a15578; ZVFHMIN-NEXT: vxor.vx v12, v10, a15579; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v125580; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v95581; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v85582; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5583; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v105584; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5585; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v145586; ZVFHMIN-NEXT: ret5587 %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)5588 %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)5589 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negb, <vscale x 4 x half> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5590 ret <vscale x 4 x half> %v5591}5592 5593define <vscale x 4 x half> @vfnmadd_vv_nxv4f16_unmasked_commuted(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, i32 zeroext %evl) {5594; ZVFH-LABEL: vfnmadd_vv_nxv4f16_unmasked_commuted:5595; ZVFH: # %bb.0:5596; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5597; ZVFH-NEXT: vfnmadd.vv v8, v9, v105598; ZVFH-NEXT: ret5599;5600; ZVFHMIN-LABEL: vfnmadd_vv_nxv4f16_unmasked_commuted:5601; ZVFHMIN: # %bb.0:5602; ZVFHMIN-NEXT: lui a1, 85603; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5604; ZVFHMIN-NEXT: vxor.vx v9, v9, a15605; ZVFHMIN-NEXT: vxor.vx v12, v10, a15606; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v125607; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v95608; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v85609; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5610; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v105611; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5612; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v145613; ZVFHMIN-NEXT: ret5614 %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)5615 %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)5616 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negb, <vscale x 4 x half> %va, <vscale x 4 x half> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5617 ret <vscale x 4 x half> %v5618}5619 5620define <vscale x 4 x half> @vfnmadd_vf_nxv4f16(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {5621; ZVFH-LABEL: vfnmadd_vf_nxv4f16:5622; ZVFH: # %bb.0:5623; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5624; ZVFH-NEXT: vfnmadd.vf v8, fa0, v9, v0.t5625; ZVFH-NEXT: ret5626;5627; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16:5628; ZVFHMIN: # %bb.0:5629; ZVFHMIN-NEXT: fmv.x.h a1, fa05630; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5631; ZVFHMIN-NEXT: vmv.v.x v14, a15632; ZVFHMIN-NEXT: lui a0, 85633; ZVFHMIN-NEXT: vxor.vx v12, v8, a0, v0.t5634; ZVFHMIN-NEXT: vxor.vx v10, v9, a0, v0.t5635; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10, v0.t5636; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v12, v0.t5637; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v14, v0.t5638; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5639; ZVFHMIN-NEXT: vfmadd.vv v12, v10, v8, v0.t5640; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5641; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t5642; ZVFHMIN-NEXT: ret5643 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 05644 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer5645 %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> %m, i32 %evl)5646 %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)5647 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negva, <vscale x 4 x half> %vb, <vscale x 4 x half> %negvc, <vscale x 4 x i1> %m, i32 %evl)5648 ret <vscale x 4 x half> %v5649}5650 5651define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {5652; ZVFH-LABEL: vfnmadd_vf_nxv4f16_commute:5653; ZVFH: # %bb.0:5654; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5655; ZVFH-NEXT: vfnmadd.vf v8, fa0, v9, v0.t5656; ZVFH-NEXT: ret5657;5658; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_commute:5659; ZVFHMIN: # %bb.0:5660; ZVFHMIN-NEXT: fmv.x.h a1, fa05661; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5662; ZVFHMIN-NEXT: vmv.v.x v14, a15663; ZVFHMIN-NEXT: lui a0, 85664; ZVFHMIN-NEXT: vxor.vx v12, v8, a0, v0.t5665; ZVFHMIN-NEXT: vxor.vx v10, v9, a0, v0.t5666; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10, v0.t5667; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v12, v0.t5668; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v14, v0.t5669; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5670; ZVFHMIN-NEXT: vfmadd.vv v10, v12, v8, v0.t5671; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5672; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t5673; ZVFHMIN-NEXT: ret5674 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 05675 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer5676 %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> %m, i32 %evl)5677 %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)5678 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %negva, <vscale x 4 x half> %negvc, <vscale x 4 x i1> %m, i32 %evl)5679 ret <vscale x 4 x half> %v5680}5681 5682define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {5683; ZVFH-LABEL: vfnmadd_vf_nxv4f16_unmasked:5684; ZVFH: # %bb.0:5685; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5686; ZVFH-NEXT: vfnmadd.vf v8, fa0, v95687; ZVFH-NEXT: ret5688;5689; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_unmasked:5690; ZVFHMIN: # %bb.0:5691; ZVFHMIN-NEXT: fmv.x.h a1, fa05692; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5693; ZVFHMIN-NEXT: vmv.v.x v14, a15694; ZVFHMIN-NEXT: lui a0, 85695; ZVFHMIN-NEXT: vxor.vx v12, v8, a05696; ZVFHMIN-NEXT: vxor.vx v10, v9, a05697; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v105698; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v125699; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v145700; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5701; ZVFHMIN-NEXT: vfmadd.vv v12, v10, v85702; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5703; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v125704; ZVFHMIN-NEXT: ret5705 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 05706 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer5707 %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)5708 %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5709 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negva, <vscale x 4 x half> %vb, <vscale x 4 x half> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5710 ret <vscale x 4 x half> %v5711}5712 5713define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_unmasked_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {5714; ZVFH-LABEL: vfnmadd_vf_nxv4f16_unmasked_commute:5715; ZVFH: # %bb.0:5716; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5717; ZVFH-NEXT: vfnmadd.vf v8, fa0, v95718; ZVFH-NEXT: ret5719;5720; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_unmasked_commute:5721; ZVFHMIN: # %bb.0:5722; ZVFHMIN-NEXT: fmv.x.h a1, fa05723; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5724; ZVFHMIN-NEXT: vmv.v.x v14, a15725; ZVFHMIN-NEXT: lui a0, 85726; ZVFHMIN-NEXT: vxor.vx v12, v8, a05727; ZVFHMIN-NEXT: vxor.vx v10, v9, a05728; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v105729; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v125730; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v145731; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5732; ZVFHMIN-NEXT: vfmadd.vv v12, v10, v85733; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5734; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v125735; ZVFHMIN-NEXT: ret5736 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 05737 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer5738 %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)5739 %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5740 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %negva, <vscale x 4 x half> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5741 ret <vscale x 4 x half> %v5742}5743 5744define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_neg_splat(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {5745; ZVFH-LABEL: vfnmadd_vf_nxv4f16_neg_splat:5746; ZVFH: # %bb.0:5747; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5748; ZVFH-NEXT: vfnmadd.vf v8, fa0, v9, v0.t5749; ZVFH-NEXT: ret5750;5751; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_neg_splat:5752; ZVFHMIN: # %bb.0:5753; ZVFHMIN-NEXT: fmv.x.h a1, fa05754; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5755; ZVFHMIN-NEXT: vmv.v.x v10, a15756; ZVFHMIN-NEXT: lui a0, 85757; ZVFHMIN-NEXT: vxor.vx v14, v10, a0, v0.t5758; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t5759; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t5760; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v14, v0.t5761; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8, v0.t5762; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5763; ZVFHMIN-NEXT: vfmadd.vv v12, v14, v10, v0.t5764; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5765; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t5766; ZVFHMIN-NEXT: ret5767 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 05768 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer5769 %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)5770 %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)5771 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negvb, <vscale x 4 x half> %negvc, <vscale x 4 x i1> %m, i32 %evl)5772 ret <vscale x 4 x half> %v5773}5774 5775define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_neg_splat_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {5776; ZVFH-LABEL: vfnmadd_vf_nxv4f16_neg_splat_commute:5777; ZVFH: # %bb.0:5778; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5779; ZVFH-NEXT: vfnmadd.vf v8, fa0, v9, v0.t5780; ZVFH-NEXT: ret5781;5782; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_neg_splat_commute:5783; ZVFHMIN: # %bb.0:5784; ZVFHMIN-NEXT: fmv.x.h a1, fa05785; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5786; ZVFHMIN-NEXT: vmv.v.x v10, a15787; ZVFHMIN-NEXT: lui a0, 85788; ZVFHMIN-NEXT: vxor.vx v14, v10, a0, v0.t5789; ZVFHMIN-NEXT: vxor.vx v9, v9, a0, v0.t5790; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v9, v0.t5791; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v14, v0.t5792; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8, v0.t5793; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5794; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v10, v0.t5795; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5796; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v14, v0.t5797; ZVFHMIN-NEXT: ret5798 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 05799 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer5800 %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)5801 %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)5802 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negvb, <vscale x 4 x half> %va, <vscale x 4 x half> %negvc, <vscale x 4 x i1> %m, i32 %evl)5803 ret <vscale x 4 x half> %v5804}5805 5806define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_neg_splat_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {5807; ZVFH-LABEL: vfnmadd_vf_nxv4f16_neg_splat_unmasked:5808; ZVFH: # %bb.0:5809; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5810; ZVFH-NEXT: vfnmadd.vf v8, fa0, v95811; ZVFH-NEXT: ret5812;5813; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_neg_splat_unmasked:5814; ZVFHMIN: # %bb.0:5815; ZVFHMIN-NEXT: fmv.x.h a1, fa05816; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5817; ZVFHMIN-NEXT: vmv.v.x v10, a15818; ZVFHMIN-NEXT: lui a0, 85819; ZVFHMIN-NEXT: vxor.vx v9, v9, a05820; ZVFHMIN-NEXT: vxor.vx v14, v10, a05821; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v95822; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v145823; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v85824; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5825; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v105826; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5827; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v145828; ZVFHMIN-NEXT: ret5829 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 05830 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer5831 %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)5832 %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5833 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negvb, <vscale x 4 x half> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5834 ret <vscale x 4 x half> %v5835}5836 5837define <vscale x 4 x half> @vfnmadd_vf_nxv4f16_neg_splat_unmasked_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {5838; ZVFH-LABEL: vfnmadd_vf_nxv4f16_neg_splat_unmasked_commute:5839; ZVFH: # %bb.0:5840; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5841; ZVFH-NEXT: vfnmadd.vf v8, fa0, v95842; ZVFH-NEXT: ret5843;5844; ZVFHMIN-LABEL: vfnmadd_vf_nxv4f16_neg_splat_unmasked_commute:5845; ZVFHMIN: # %bb.0:5846; ZVFHMIN-NEXT: fmv.x.h a1, fa05847; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5848; ZVFHMIN-NEXT: vmv.v.x v10, a15849; ZVFHMIN-NEXT: lui a0, 85850; ZVFHMIN-NEXT: vxor.vx v9, v9, a05851; ZVFHMIN-NEXT: vxor.vx v14, v10, a05852; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v95853; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v145854; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v85855; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5856; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v105857; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5858; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v145859; ZVFHMIN-NEXT: ret5860 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 05861 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer5862 %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)5863 %negvc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5864 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negvb, <vscale x 4 x half> %va, <vscale x 4 x half> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5865 ret <vscale x 4 x half> %v5866}5867 5868define <vscale x 4 x half> @vfnmsub_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {5869; ZVFH-LABEL: vfnmsub_vv_nxv4f16:5870; ZVFH: # %bb.0:5871; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5872; ZVFH-NEXT: vfnmadd.vv v9, v8, v10, v0.t5873; ZVFH-NEXT: vmv.v.v v8, v95874; ZVFH-NEXT: ret5875;5876; ZVFHMIN-LABEL: vfnmsub_vv_nxv4f16:5877; ZVFHMIN: # %bb.0:5878; ZVFHMIN-NEXT: lui a1, 85879; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5880; ZVFHMIN-NEXT: vxor.vx v9, v9, a1, v0.t5881; ZVFHMIN-NEXT: vxor.vx v12, v10, a1, v0.t5882; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v12, v0.t5883; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t5884; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8, v0.t5885; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5886; ZVFHMIN-NEXT: vfmadd.vv v12, v14, v10, v0.t5887; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5888; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t5889; ZVFHMIN-NEXT: ret5890 %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)5891 %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 %evl)5892 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negb, <vscale x 4 x half> %negc, <vscale x 4 x i1> %m, i32 %evl)5893 ret <vscale x 4 x half> %v5894}5895 5896define <vscale x 4 x half> @vfnmsub_vv_nxv4f16_commuted(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {5897; ZVFH-LABEL: vfnmsub_vv_nxv4f16_commuted:5898; ZVFH: # %bb.0:5899; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5900; ZVFH-NEXT: vfnmadd.vv v8, v9, v10, v0.t5901; ZVFH-NEXT: ret5902;5903; ZVFHMIN-LABEL: vfnmsub_vv_nxv4f16_commuted:5904; ZVFHMIN: # %bb.0:5905; ZVFHMIN-NEXT: lui a1, 85906; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5907; ZVFHMIN-NEXT: vxor.vx v9, v9, a1, v0.t5908; ZVFHMIN-NEXT: vxor.vx v12, v10, a1, v0.t5909; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v12, v0.t5910; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t5911; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8, v0.t5912; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5913; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v10, v0.t5914; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5915; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v14, v0.t5916; ZVFHMIN-NEXT: ret5917 %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)5918 %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> %m, i32 %evl)5919 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negb, <vscale x 4 x half> %va, <vscale x 4 x half> %negc, <vscale x 4 x i1> %m, i32 %evl)5920 ret <vscale x 4 x half> %v5921}5922 5923define <vscale x 4 x half> @vfnmsub_vv_nxv4f16_unmasked(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, i32 zeroext %evl) {5924; ZVFH-LABEL: vfnmsub_vv_nxv4f16_unmasked:5925; ZVFH: # %bb.0:5926; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5927; ZVFH-NEXT: vfnmadd.vv v8, v9, v105928; ZVFH-NEXT: ret5929;5930; ZVFHMIN-LABEL: vfnmsub_vv_nxv4f16_unmasked:5931; ZVFHMIN: # %bb.0:5932; ZVFHMIN-NEXT: lui a1, 85933; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5934; ZVFHMIN-NEXT: vxor.vx v9, v9, a15935; ZVFHMIN-NEXT: vxor.vx v12, v10, a15936; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v125937; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v95938; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v85939; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5940; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v105941; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5942; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v145943; ZVFHMIN-NEXT: ret5944 %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)5945 %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)5946 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negb, <vscale x 4 x half> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5947 ret <vscale x 4 x half> %v5948}5949 5950define <vscale x 4 x half> @vfnmsub_vv_nxv4f16_unmasked_commuted(<vscale x 4 x half> %va, <vscale x 4 x half> %b, <vscale x 4 x half> %c, i32 zeroext %evl) {5951; ZVFH-LABEL: vfnmsub_vv_nxv4f16_unmasked_commuted:5952; ZVFH: # %bb.0:5953; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5954; ZVFH-NEXT: vfnmadd.vv v8, v9, v105955; ZVFH-NEXT: ret5956;5957; ZVFHMIN-LABEL: vfnmsub_vv_nxv4f16_unmasked_commuted:5958; ZVFHMIN: # %bb.0:5959; ZVFHMIN-NEXT: lui a1, 85960; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5961; ZVFHMIN-NEXT: vxor.vx v9, v9, a15962; ZVFHMIN-NEXT: vxor.vx v12, v10, a15963; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v125964; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v95965; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v85966; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5967; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v105968; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5969; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v145970; ZVFHMIN-NEXT: ret5971 %negb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)5972 %negc = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)5973 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negb, <vscale x 4 x half> %va, <vscale x 4 x half> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)5974 ret <vscale x 4 x half> %v5975}5976 5977define <vscale x 4 x half> @vfnmsub_vf_nxv4f16(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {5978; ZVFH-LABEL: vfnmsub_vf_nxv4f16:5979; ZVFH: # %bb.0:5980; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma5981; ZVFH-NEXT: vfnmsub.vf v8, fa0, v9, v0.t5982; ZVFH-NEXT: ret5983;5984; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16:5985; ZVFHMIN: # %bb.0:5986; ZVFHMIN-NEXT: fmv.x.h a1, fa05987; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma5988; ZVFHMIN-NEXT: vmv.v.x v16, a15989; ZVFHMIN-NEXT: lui a0, 85990; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t5991; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t5992; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t5993; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v16, v0.t5994; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma5995; ZVFHMIN-NEXT: vfmadd.vv v14, v10, v12, v0.t5996; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma5997; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v14, v0.t5998; ZVFHMIN-NEXT: ret5999 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 06000 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer6001 %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> %m, i32 %evl)6002 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negva, <vscale x 4 x half> %vb, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)6003 ret <vscale x 4 x half> %v6004}6005 6006define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {6007; ZVFH-LABEL: vfnmsub_vf_nxv4f16_commute:6008; ZVFH: # %bb.0:6009; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma6010; ZVFH-NEXT: vfnmsub.vf v8, fa0, v9, v0.t6011; ZVFH-NEXT: ret6012;6013; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_commute:6014; ZVFHMIN: # %bb.0:6015; ZVFHMIN-NEXT: fmv.x.h a1, fa06016; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma6017; ZVFHMIN-NEXT: vmv.v.x v14, a16018; ZVFHMIN-NEXT: lui a0, 86019; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t6020; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t6021; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t6022; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v14, v0.t6023; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma6024; ZVFHMIN-NEXT: vfmadd.vv v10, v8, v12, v0.t6025; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma6026; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t6027; ZVFHMIN-NEXT: ret6028 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 06029 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer6030 %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> %m, i32 %evl)6031 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %negva, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)6032 ret <vscale x 4 x half> %v6033}6034 6035define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {6036; ZVFH-LABEL: vfnmsub_vf_nxv4f16_unmasked:6037; ZVFH: # %bb.0:6038; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma6039; ZVFH-NEXT: vfnmsub.vf v8, fa0, v96040; ZVFH-NEXT: ret6041;6042; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_unmasked:6043; ZVFHMIN: # %bb.0:6044; ZVFHMIN-NEXT: fmv.x.h a1, fa06045; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma6046; ZVFHMIN-NEXT: vmv.v.x v14, a16047; ZVFHMIN-NEXT: lui a0, 86048; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v96049; ZVFHMIN-NEXT: vxor.vx v12, v8, a06050; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v126051; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v146052; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma6053; ZVFHMIN-NEXT: vfmadd.vv v12, v8, v106054; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma6055; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v126056; ZVFHMIN-NEXT: ret6057 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 06058 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer6059 %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)6060 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negva, <vscale x 4 x half> %vb, <vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)6061 ret <vscale x 4 x half> %v6062}6063 6064define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_unmasked_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {6065; ZVFH-LABEL: vfnmsub_vf_nxv4f16_unmasked_commute:6066; ZVFH: # %bb.0:6067; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma6068; ZVFH-NEXT: vfnmsub.vf v8, fa0, v96069; ZVFH-NEXT: ret6070;6071; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_unmasked_commute:6072; ZVFHMIN: # %bb.0:6073; ZVFHMIN-NEXT: fmv.x.h a1, fa06074; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma6075; ZVFHMIN-NEXT: vmv.v.x v14, a16076; ZVFHMIN-NEXT: lui a0, 86077; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v96078; ZVFHMIN-NEXT: vxor.vx v12, v8, a06079; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v126080; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v146081; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma6082; ZVFHMIN-NEXT: vfmadd.vv v12, v8, v106083; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma6084; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v126085; ZVFHMIN-NEXT: ret6086 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 06087 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer6088 %negva = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)6089 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x half> %negva, <vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)6090 ret <vscale x 4 x half> %v6091}6092 6093define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_neg_splat(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {6094; ZVFH-LABEL: vfnmsub_vf_nxv4f16_neg_splat:6095; ZVFH: # %bb.0:6096; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma6097; ZVFH-NEXT: vfnmsub.vf v8, fa0, v9, v0.t6098; ZVFH-NEXT: ret6099;6100; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_neg_splat:6101; ZVFHMIN: # %bb.0:6102; ZVFHMIN-NEXT: fmv.x.h a1, fa06103; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma6104; ZVFHMIN-NEXT: vmv.v.x v10, a16105; ZVFHMIN-NEXT: lui a0, 86106; ZVFHMIN-NEXT: vxor.vx v12, v10, a0, v0.t6107; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v12, v0.t6108; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t6109; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8, v0.t6110; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma6111; ZVFHMIN-NEXT: vfmadd.vv v10, v14, v12, v0.t6112; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma6113; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v10, v0.t6114; ZVFHMIN-NEXT: ret6115 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 06116 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer6117 %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)6118 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negvb, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)6119 ret <vscale x 4 x half> %v6120}6121 6122define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_neg_splat_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {6123; ZVFH-LABEL: vfnmsub_vf_nxv4f16_neg_splat_commute:6124; ZVFH: # %bb.0:6125; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma6126; ZVFH-NEXT: vfnmsub.vf v8, fa0, v9, v0.t6127; ZVFH-NEXT: ret6128;6129; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_neg_splat_commute:6130; ZVFHMIN: # %bb.0:6131; ZVFHMIN-NEXT: fmv.x.h a1, fa06132; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma6133; ZVFHMIN-NEXT: vmv.v.x v10, a16134; ZVFHMIN-NEXT: lui a0, 86135; ZVFHMIN-NEXT: vxor.vx v12, v10, a0, v0.t6136; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v12, v0.t6137; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t6138; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8, v0.t6139; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma6140; ZVFHMIN-NEXT: vfmadd.vv v14, v10, v12, v0.t6141; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma6142; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v14, v0.t6143; ZVFHMIN-NEXT: ret6144 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 06145 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer6146 %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)6147 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negvb, <vscale x 4 x half> %va, <vscale x 4 x half> %vc, <vscale x 4 x i1> %m, i32 %evl)6148 ret <vscale x 4 x half> %v6149}6150 6151define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_neg_splat_unmasked(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {6152; ZVFH-LABEL: vfnmsub_vf_nxv4f16_neg_splat_unmasked:6153; ZVFH: # %bb.0:6154; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma6155; ZVFH-NEXT: vfnmsub.vf v8, fa0, v96156; ZVFH-NEXT: ret6157;6158; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_neg_splat_unmasked:6159; ZVFHMIN: # %bb.0:6160; ZVFHMIN-NEXT: fmv.x.h a1, fa06161; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma6162; ZVFHMIN-NEXT: vmv.v.x v12, a16163; ZVFHMIN-NEXT: lui a0, 86164; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v96165; ZVFHMIN-NEXT: vxor.vx v9, v12, a06166; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v96167; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v86168; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma6169; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v106170; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma6171; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v146172; ZVFHMIN-NEXT: ret6173 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 06174 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer6175 %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)6176 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %negvb, <vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)6177 ret <vscale x 4 x half> %v6178}6179 6180define <vscale x 4 x half> @vfnmsub_vf_nxv4f16_neg_splat_unmasked_commute(<vscale x 4 x half> %va, half %b, <vscale x 4 x half> %vc, i32 zeroext %evl) {6181; ZVFH-LABEL: vfnmsub_vf_nxv4f16_neg_splat_unmasked_commute:6182; ZVFH: # %bb.0:6183; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma6184; ZVFH-NEXT: vfnmsub.vf v8, fa0, v96185; ZVFH-NEXT: ret6186;6187; ZVFHMIN-LABEL: vfnmsub_vf_nxv4f16_neg_splat_unmasked_commute:6188; ZVFHMIN: # %bb.0:6189; ZVFHMIN-NEXT: fmv.x.h a1, fa06190; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma6191; ZVFHMIN-NEXT: vmv.v.x v12, a16192; ZVFHMIN-NEXT: lui a0, 86193; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v96194; ZVFHMIN-NEXT: vxor.vx v9, v12, a06195; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v96196; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v86197; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma6198; ZVFHMIN-NEXT: vfmadd.vv v14, v12, v106199; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, ta, ma6200; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v146201; ZVFHMIN-NEXT: ret6202 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 06203 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer6204 %negvb = call <vscale x 4 x half> @llvm.vp.fneg.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)6205 %v = call <vscale x 4 x half> @llvm.vp.fma.nxv4f16(<vscale x 4 x half> %negvb, <vscale x 4 x half> %va, <vscale x 4 x half> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)6206 ret <vscale x 4 x half> %v6207}6208 6209define <vscale x 8 x half> @vfmsub_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {6210; ZVFH-LABEL: vfmsub_vv_nxv8f16:6211; ZVFH: # %bb.0:6212; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6213; ZVFH-NEXT: vfmsub.vv v10, v8, v12, v0.t6214; ZVFH-NEXT: vmv.v.v v8, v106215; ZVFH-NEXT: ret6216;6217; ZVFHMIN-LABEL: vfmsub_vv_nxv8f16:6218; ZVFHMIN: # %bb.0:6219; ZVFHMIN-NEXT: lui a1, 86220; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6221; ZVFHMIN-NEXT: vxor.vx v16, v12, a1, v0.t6222; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v16, v0.t6223; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t6224; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v10, v0.t6225; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6226; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v12, v0.t6227; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6228; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v20, v0.t6229; ZVFHMIN-NEXT: ret6230 %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 %evl)6231 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %negc, <vscale x 8 x i1> %m, i32 %evl)6232 ret <vscale x 8 x half> %v6233}6234 6235define <vscale x 8 x half> @vfmsub_vv_nxv8f16_unmasked(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, i32 zeroext %evl) {6236; ZVFH-LABEL: vfmsub_vv_nxv8f16_unmasked:6237; ZVFH: # %bb.0:6238; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6239; ZVFH-NEXT: vfmsub.vv v8, v10, v126240; ZVFH-NEXT: ret6241;6242; ZVFHMIN-LABEL: vfmsub_vv_nxv8f16_unmasked:6243; ZVFHMIN: # %bb.0:6244; ZVFHMIN-NEXT: lui a1, 86245; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6246; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v86247; ZVFHMIN-NEXT: vxor.vx v8, v12, a16248; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v86249; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v106250; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6251; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v126252; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6253; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v206254; ZVFHMIN-NEXT: ret6255 %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)6256 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6257 ret <vscale x 8 x half> %v6258}6259 6260define <vscale x 8 x half> @vfmsub_vf_nxv8f16(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {6261; ZVFH-LABEL: vfmsub_vf_nxv8f16:6262; ZVFH: # %bb.0:6263; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6264; ZVFH-NEXT: vfmsub.vf v8, fa0, v10, v0.t6265; ZVFH-NEXT: ret6266;6267; ZVFHMIN-LABEL: vfmsub_vf_nxv8f16:6268; ZVFHMIN: # %bb.0:6269; ZVFHMIN-NEXT: fmv.x.h a1, fa06270; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6271; ZVFHMIN-NEXT: vmv.v.x v24, a16272; ZVFHMIN-NEXT: lui a0, 86273; ZVFHMIN-NEXT: vxor.vx v10, v10, a0, v0.t6274; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t6275; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t6276; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v24, v0.t6277; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6278; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v12, v0.t6279; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6280; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v20, v0.t6281; ZVFHMIN-NEXT: ret6282 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06283 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6284 %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)6285 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x half> %negvc, <vscale x 8 x i1> %m, i32 %evl)6286 ret <vscale x 8 x half> %v6287}6288 6289define <vscale x 8 x half> @vfmsub_vf_nxv8f16_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {6290; ZVFH-LABEL: vfmsub_vf_nxv8f16_commute:6291; ZVFH: # %bb.0:6292; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6293; ZVFH-NEXT: vfmsub.vf v8, fa0, v10, v0.t6294; ZVFH-NEXT: ret6295;6296; ZVFHMIN-LABEL: vfmsub_vf_nxv8f16_commute:6297; ZVFHMIN: # %bb.0:6298; ZVFHMIN-NEXT: fmv.x.h a1, fa06299; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6300; ZVFHMIN-NEXT: vmv.v.x v20, a16301; ZVFHMIN-NEXT: lui a0, 86302; ZVFHMIN-NEXT: vxor.vx v10, v10, a0, v0.t6303; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t6304; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t6305; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t6306; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6307; ZVFHMIN-NEXT: vfmadd.vv v16, v8, v12, v0.t6308; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6309; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t6310; ZVFHMIN-NEXT: ret6311 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06312 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6313 %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)6314 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %va, <vscale x 8 x half> %negvc, <vscale x 8 x i1> %m, i32 %evl)6315 ret <vscale x 8 x half> %v6316}6317 6318define <vscale x 8 x half> @vfmsub_vf_nxv8f16_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {6319; ZVFH-LABEL: vfmsub_vf_nxv8f16_unmasked:6320; ZVFH: # %bb.0:6321; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6322; ZVFH-NEXT: vfmsub.vf v8, fa0, v106323; ZVFH-NEXT: ret6324;6325; ZVFHMIN-LABEL: vfmsub_vf_nxv8f16_unmasked:6326; ZVFHMIN: # %bb.0:6327; ZVFHMIN-NEXT: fmv.x.h a1, fa06328; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6329; ZVFHMIN-NEXT: vmv.v.x v20, a16330; ZVFHMIN-NEXT: lui a0, 86331; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v86332; ZVFHMIN-NEXT: vxor.vx v16, v10, a06333; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v166334; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v206335; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6336; ZVFHMIN-NEXT: vfmadd.vv v16, v12, v86337; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6338; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v166339; ZVFHMIN-NEXT: ret6340 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06341 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6342 %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6343 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x half> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6344 ret <vscale x 8 x half> %v6345}6346 6347define <vscale x 8 x half> @vfmsub_vf_nxv8f16_unmasked_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {6348; ZVFH-LABEL: vfmsub_vf_nxv8f16_unmasked_commute:6349; ZVFH: # %bb.0:6350; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6351; ZVFH-NEXT: vfmsub.vf v8, fa0, v106352; ZVFH-NEXT: ret6353;6354; ZVFHMIN-LABEL: vfmsub_vf_nxv8f16_unmasked_commute:6355; ZVFHMIN: # %bb.0:6356; ZVFHMIN-NEXT: fmv.x.h a1, fa06357; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6358; ZVFHMIN-NEXT: vmv.v.x v20, a16359; ZVFHMIN-NEXT: lui a0, 86360; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v86361; ZVFHMIN-NEXT: vxor.vx v16, v10, a06362; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v166363; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v206364; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6365; ZVFHMIN-NEXT: vfmadd.vv v16, v12, v86366; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6367; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v166368; ZVFHMIN-NEXT: ret6369 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06370 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6371 %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6372 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %va, <vscale x 8 x half> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6373 ret <vscale x 8 x half> %v6374}6375 6376define <vscale x 8 x half> @vfnmadd_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {6377; ZVFH-LABEL: vfnmadd_vv_nxv8f16:6378; ZVFH: # %bb.0:6379; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6380; ZVFH-NEXT: vfnmadd.vv v10, v8, v12, v0.t6381; ZVFH-NEXT: vmv.v.v v8, v106382; ZVFH-NEXT: ret6383;6384; ZVFHMIN-LABEL: vfnmadd_vv_nxv8f16:6385; ZVFHMIN: # %bb.0:6386; ZVFHMIN-NEXT: lui a1, 86387; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6388; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t6389; ZVFHMIN-NEXT: vxor.vx v16, v12, a1, v0.t6390; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v16, v0.t6391; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10, v0.t6392; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8, v0.t6393; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6394; ZVFHMIN-NEXT: vfmadd.vv v16, v20, v12, v0.t6395; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6396; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t6397; ZVFHMIN-NEXT: ret6398 %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)6399 %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 %evl)6400 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negb, <vscale x 8 x half> %negc, <vscale x 8 x i1> %m, i32 %evl)6401 ret <vscale x 8 x half> %v6402}6403 6404define <vscale x 8 x half> @vfnmadd_vv_nxv8f16_commuted(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {6405; ZVFH-LABEL: vfnmadd_vv_nxv8f16_commuted:6406; ZVFH: # %bb.0:6407; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6408; ZVFH-NEXT: vfnmadd.vv v8, v10, v12, v0.t6409; ZVFH-NEXT: ret6410;6411; ZVFHMIN-LABEL: vfnmadd_vv_nxv8f16_commuted:6412; ZVFHMIN: # %bb.0:6413; ZVFHMIN-NEXT: lui a1, 86414; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6415; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t6416; ZVFHMIN-NEXT: vxor.vx v16, v12, a1, v0.t6417; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v16, v0.t6418; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10, v0.t6419; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8, v0.t6420; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6421; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v12, v0.t6422; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6423; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v20, v0.t6424; ZVFHMIN-NEXT: ret6425 %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)6426 %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 %evl)6427 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negb, <vscale x 8 x half> %va, <vscale x 8 x half> %negc, <vscale x 8 x i1> %m, i32 %evl)6428 ret <vscale x 8 x half> %v6429}6430 6431define <vscale x 8 x half> @vfnmadd_vv_nxv8f16_unmasked(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, i32 zeroext %evl) {6432; ZVFH-LABEL: vfnmadd_vv_nxv8f16_unmasked:6433; ZVFH: # %bb.0:6434; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6435; ZVFH-NEXT: vfnmadd.vv v8, v10, v126436; ZVFH-NEXT: ret6437;6438; ZVFHMIN-LABEL: vfnmadd_vv_nxv8f16_unmasked:6439; ZVFHMIN: # %bb.0:6440; ZVFHMIN-NEXT: lui a1, 86441; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6442; ZVFHMIN-NEXT: vxor.vx v10, v10, a16443; ZVFHMIN-NEXT: vxor.vx v16, v12, a16444; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v166445; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v106446; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v86447; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6448; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v126449; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6450; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v206451; ZVFHMIN-NEXT: ret6452 %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)6453 %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)6454 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negb, <vscale x 8 x half> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6455 ret <vscale x 8 x half> %v6456}6457 6458define <vscale x 8 x half> @vfnmadd_vv_nxv8f16_unmasked_commuted(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, i32 zeroext %evl) {6459; ZVFH-LABEL: vfnmadd_vv_nxv8f16_unmasked_commuted:6460; ZVFH: # %bb.0:6461; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6462; ZVFH-NEXT: vfnmadd.vv v8, v10, v126463; ZVFH-NEXT: ret6464;6465; ZVFHMIN-LABEL: vfnmadd_vv_nxv8f16_unmasked_commuted:6466; ZVFHMIN: # %bb.0:6467; ZVFHMIN-NEXT: lui a1, 86468; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6469; ZVFHMIN-NEXT: vxor.vx v10, v10, a16470; ZVFHMIN-NEXT: vxor.vx v16, v12, a16471; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v166472; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v106473; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v86474; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6475; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v126476; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6477; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v206478; ZVFHMIN-NEXT: ret6479 %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)6480 %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)6481 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negb, <vscale x 8 x half> %va, <vscale x 8 x half> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6482 ret <vscale x 8 x half> %v6483}6484 6485define <vscale x 8 x half> @vfnmadd_vf_nxv8f16(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {6486; ZVFH-LABEL: vfnmadd_vf_nxv8f16:6487; ZVFH: # %bb.0:6488; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6489; ZVFH-NEXT: vfnmadd.vf v8, fa0, v10, v0.t6490; ZVFH-NEXT: ret6491;6492; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16:6493; ZVFHMIN: # %bb.0:6494; ZVFHMIN-NEXT: fmv.x.h a1, fa06495; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6496; ZVFHMIN-NEXT: vmv.v.x v20, a16497; ZVFHMIN-NEXT: lui a0, 86498; ZVFHMIN-NEXT: vxor.vx v16, v8, a0, v0.t6499; ZVFHMIN-NEXT: vxor.vx v12, v10, a0, v0.t6500; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v12, v0.t6501; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v16, v0.t6502; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v20, v0.t6503; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6504; ZVFHMIN-NEXT: vfmadd.vv v16, v12, v8, v0.t6505; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6506; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t6507; ZVFHMIN-NEXT: ret6508 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06509 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6510 %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> %m, i32 %evl)6511 %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)6512 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negva, <vscale x 8 x half> %vb, <vscale x 8 x half> %negvc, <vscale x 8 x i1> %m, i32 %evl)6513 ret <vscale x 8 x half> %v6514}6515 6516define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {6517; ZVFH-LABEL: vfnmadd_vf_nxv8f16_commute:6518; ZVFH: # %bb.0:6519; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6520; ZVFH-NEXT: vfnmadd.vf v8, fa0, v10, v0.t6521; ZVFH-NEXT: ret6522;6523; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_commute:6524; ZVFHMIN: # %bb.0:6525; ZVFHMIN-NEXT: fmv.x.h a1, fa06526; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6527; ZVFHMIN-NEXT: vmv.v.x v20, a16528; ZVFHMIN-NEXT: lui a0, 86529; ZVFHMIN-NEXT: vxor.vx v16, v8, a0, v0.t6530; ZVFHMIN-NEXT: vxor.vx v12, v10, a0, v0.t6531; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v12, v0.t6532; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v16, v0.t6533; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v20, v0.t6534; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6535; ZVFHMIN-NEXT: vfmadd.vv v12, v16, v8, v0.t6536; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6537; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t6538; ZVFHMIN-NEXT: ret6539 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06540 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6541 %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> %m, i32 %evl)6542 %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)6543 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %negva, <vscale x 8 x half> %negvc, <vscale x 8 x i1> %m, i32 %evl)6544 ret <vscale x 8 x half> %v6545}6546 6547define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {6548; ZVFH-LABEL: vfnmadd_vf_nxv8f16_unmasked:6549; ZVFH: # %bb.0:6550; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6551; ZVFH-NEXT: vfnmadd.vf v8, fa0, v106552; ZVFH-NEXT: ret6553;6554; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_unmasked:6555; ZVFHMIN: # %bb.0:6556; ZVFHMIN-NEXT: fmv.x.h a1, fa06557; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6558; ZVFHMIN-NEXT: vmv.v.x v20, a16559; ZVFHMIN-NEXT: lui a0, 86560; ZVFHMIN-NEXT: vxor.vx v16, v8, a06561; ZVFHMIN-NEXT: vxor.vx v12, v10, a06562; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v126563; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v166564; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v206565; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6566; ZVFHMIN-NEXT: vfmadd.vv v16, v12, v86567; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6568; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v166569; ZVFHMIN-NEXT: ret6570 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06571 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6572 %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)6573 %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6574 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negva, <vscale x 8 x half> %vb, <vscale x 8 x half> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6575 ret <vscale x 8 x half> %v6576}6577 6578define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_unmasked_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {6579; ZVFH-LABEL: vfnmadd_vf_nxv8f16_unmasked_commute:6580; ZVFH: # %bb.0:6581; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6582; ZVFH-NEXT: vfnmadd.vf v8, fa0, v106583; ZVFH-NEXT: ret6584;6585; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_unmasked_commute:6586; ZVFHMIN: # %bb.0:6587; ZVFHMIN-NEXT: fmv.x.h a1, fa06588; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6589; ZVFHMIN-NEXT: vmv.v.x v20, a16590; ZVFHMIN-NEXT: lui a0, 86591; ZVFHMIN-NEXT: vxor.vx v16, v8, a06592; ZVFHMIN-NEXT: vxor.vx v12, v10, a06593; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v126594; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v166595; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v206596; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6597; ZVFHMIN-NEXT: vfmadd.vv v16, v12, v86598; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6599; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v166600; ZVFHMIN-NEXT: ret6601 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06602 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6603 %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)6604 %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6605 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %negva, <vscale x 8 x half> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6606 ret <vscale x 8 x half> %v6607}6608 6609define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_neg_splat(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {6610; ZVFH-LABEL: vfnmadd_vf_nxv8f16_neg_splat:6611; ZVFH: # %bb.0:6612; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6613; ZVFH-NEXT: vfnmadd.vf v8, fa0, v10, v0.t6614; ZVFH-NEXT: ret6615;6616; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_neg_splat:6617; ZVFHMIN: # %bb.0:6618; ZVFHMIN-NEXT: fmv.x.h a1, fa06619; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6620; ZVFHMIN-NEXT: vmv.v.x v12, a16621; ZVFHMIN-NEXT: lui a0, 86622; ZVFHMIN-NEXT: vxor.vx v20, v12, a0, v0.t6623; ZVFHMIN-NEXT: vxor.vx v10, v10, a0, v0.t6624; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t6625; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v20, v0.t6626; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8, v0.t6627; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6628; ZVFHMIN-NEXT: vfmadd.vv v16, v20, v12, v0.t6629; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6630; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t6631; ZVFHMIN-NEXT: ret6632 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06633 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6634 %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)6635 %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)6636 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negvb, <vscale x 8 x half> %negvc, <vscale x 8 x i1> %m, i32 %evl)6637 ret <vscale x 8 x half> %v6638}6639 6640define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_neg_splat_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {6641; ZVFH-LABEL: vfnmadd_vf_nxv8f16_neg_splat_commute:6642; ZVFH: # %bb.0:6643; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6644; ZVFH-NEXT: vfnmadd.vf v8, fa0, v10, v0.t6645; ZVFH-NEXT: ret6646;6647; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_neg_splat_commute:6648; ZVFHMIN: # %bb.0:6649; ZVFHMIN-NEXT: fmv.x.h a1, fa06650; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6651; ZVFHMIN-NEXT: vmv.v.x v12, a16652; ZVFHMIN-NEXT: lui a0, 86653; ZVFHMIN-NEXT: vxor.vx v20, v12, a0, v0.t6654; ZVFHMIN-NEXT: vxor.vx v10, v10, a0, v0.t6655; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v10, v0.t6656; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v20, v0.t6657; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8, v0.t6658; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6659; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v12, v0.t6660; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6661; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v20, v0.t6662; ZVFHMIN-NEXT: ret6663 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06664 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6665 %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)6666 %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)6667 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negvb, <vscale x 8 x half> %va, <vscale x 8 x half> %negvc, <vscale x 8 x i1> %m, i32 %evl)6668 ret <vscale x 8 x half> %v6669}6670 6671define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_neg_splat_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {6672; ZVFH-LABEL: vfnmadd_vf_nxv8f16_neg_splat_unmasked:6673; ZVFH: # %bb.0:6674; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6675; ZVFH-NEXT: vfnmadd.vf v8, fa0, v106676; ZVFH-NEXT: ret6677;6678; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_neg_splat_unmasked:6679; ZVFHMIN: # %bb.0:6680; ZVFHMIN-NEXT: fmv.x.h a1, fa06681; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6682; ZVFHMIN-NEXT: vmv.v.x v12, a16683; ZVFHMIN-NEXT: lui a0, 86684; ZVFHMIN-NEXT: vxor.vx v10, v10, a06685; ZVFHMIN-NEXT: vxor.vx v20, v12, a06686; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v106687; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v206688; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v86689; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6690; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v126691; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6692; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v206693; ZVFHMIN-NEXT: ret6694 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06695 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6696 %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)6697 %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6698 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negvb, <vscale x 8 x half> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6699 ret <vscale x 8 x half> %v6700}6701 6702define <vscale x 8 x half> @vfnmadd_vf_nxv8f16_neg_splat_unmasked_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {6703; ZVFH-LABEL: vfnmadd_vf_nxv8f16_neg_splat_unmasked_commute:6704; ZVFH: # %bb.0:6705; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6706; ZVFH-NEXT: vfnmadd.vf v8, fa0, v106707; ZVFH-NEXT: ret6708;6709; ZVFHMIN-LABEL: vfnmadd_vf_nxv8f16_neg_splat_unmasked_commute:6710; ZVFHMIN: # %bb.0:6711; ZVFHMIN-NEXT: fmv.x.h a1, fa06712; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6713; ZVFHMIN-NEXT: vmv.v.x v12, a16714; ZVFHMIN-NEXT: lui a0, 86715; ZVFHMIN-NEXT: vxor.vx v10, v10, a06716; ZVFHMIN-NEXT: vxor.vx v20, v12, a06717; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v106718; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v206719; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v86720; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6721; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v126722; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6723; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v206724; ZVFHMIN-NEXT: ret6725 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06726 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6727 %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)6728 %negvc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6729 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negvb, <vscale x 8 x half> %va, <vscale x 8 x half> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6730 ret <vscale x 8 x half> %v6731}6732 6733define <vscale x 8 x half> @vfnmsub_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {6734; ZVFH-LABEL: vfnmsub_vv_nxv8f16:6735; ZVFH: # %bb.0:6736; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6737; ZVFH-NEXT: vfnmadd.vv v10, v8, v12, v0.t6738; ZVFH-NEXT: vmv.v.v v8, v106739; ZVFH-NEXT: ret6740;6741; ZVFHMIN-LABEL: vfnmsub_vv_nxv8f16:6742; ZVFHMIN: # %bb.0:6743; ZVFHMIN-NEXT: lui a1, 86744; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6745; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t6746; ZVFHMIN-NEXT: vxor.vx v16, v12, a1, v0.t6747; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v16, v0.t6748; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10, v0.t6749; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8, v0.t6750; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6751; ZVFHMIN-NEXT: vfmadd.vv v16, v20, v12, v0.t6752; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6753; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t6754; ZVFHMIN-NEXT: ret6755 %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)6756 %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 %evl)6757 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negb, <vscale x 8 x half> %negc, <vscale x 8 x i1> %m, i32 %evl)6758 ret <vscale x 8 x half> %v6759}6760 6761define <vscale x 8 x half> @vfnmsub_vv_nxv8f16_commuted(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {6762; ZVFH-LABEL: vfnmsub_vv_nxv8f16_commuted:6763; ZVFH: # %bb.0:6764; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6765; ZVFH-NEXT: vfnmadd.vv v8, v10, v12, v0.t6766; ZVFH-NEXT: ret6767;6768; ZVFHMIN-LABEL: vfnmsub_vv_nxv8f16_commuted:6769; ZVFHMIN: # %bb.0:6770; ZVFHMIN-NEXT: lui a1, 86771; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6772; ZVFHMIN-NEXT: vxor.vx v10, v10, a1, v0.t6773; ZVFHMIN-NEXT: vxor.vx v16, v12, a1, v0.t6774; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v16, v0.t6775; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10, v0.t6776; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8, v0.t6777; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6778; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v12, v0.t6779; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6780; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v20, v0.t6781; ZVFHMIN-NEXT: ret6782 %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)6783 %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> %m, i32 %evl)6784 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negb, <vscale x 8 x half> %va, <vscale x 8 x half> %negc, <vscale x 8 x i1> %m, i32 %evl)6785 ret <vscale x 8 x half> %v6786}6787 6788define <vscale x 8 x half> @vfnmsub_vv_nxv8f16_unmasked(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, i32 zeroext %evl) {6789; ZVFH-LABEL: vfnmsub_vv_nxv8f16_unmasked:6790; ZVFH: # %bb.0:6791; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6792; ZVFH-NEXT: vfnmadd.vv v8, v10, v126793; ZVFH-NEXT: ret6794;6795; ZVFHMIN-LABEL: vfnmsub_vv_nxv8f16_unmasked:6796; ZVFHMIN: # %bb.0:6797; ZVFHMIN-NEXT: lui a1, 86798; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6799; ZVFHMIN-NEXT: vxor.vx v10, v10, a16800; ZVFHMIN-NEXT: vxor.vx v16, v12, a16801; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v166802; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v106803; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v86804; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6805; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v126806; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6807; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v206808; ZVFHMIN-NEXT: ret6809 %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)6810 %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)6811 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negb, <vscale x 8 x half> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6812 ret <vscale x 8 x half> %v6813}6814 6815define <vscale x 8 x half> @vfnmsub_vv_nxv8f16_unmasked_commuted(<vscale x 8 x half> %va, <vscale x 8 x half> %b, <vscale x 8 x half> %c, i32 zeroext %evl) {6816; ZVFH-LABEL: vfnmsub_vv_nxv8f16_unmasked_commuted:6817; ZVFH: # %bb.0:6818; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6819; ZVFH-NEXT: vfnmadd.vv v8, v10, v126820; ZVFH-NEXT: ret6821;6822; ZVFHMIN-LABEL: vfnmsub_vv_nxv8f16_unmasked_commuted:6823; ZVFHMIN: # %bb.0:6824; ZVFHMIN-NEXT: lui a1, 86825; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6826; ZVFHMIN-NEXT: vxor.vx v10, v10, a16827; ZVFHMIN-NEXT: vxor.vx v16, v12, a16828; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v166829; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v106830; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v86831; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6832; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v126833; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6834; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v206835; ZVFHMIN-NEXT: ret6836 %negb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)6837 %negc = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)6838 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negb, <vscale x 8 x half> %va, <vscale x 8 x half> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6839 ret <vscale x 8 x half> %v6840}6841 6842define <vscale x 8 x half> @vfnmsub_vf_nxv8f16(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {6843; ZVFH-LABEL: vfnmsub_vf_nxv8f16:6844; ZVFH: # %bb.0:6845; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6846; ZVFH-NEXT: vfnmsub.vf v8, fa0, v10, v0.t6847; ZVFH-NEXT: ret6848;6849; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16:6850; ZVFHMIN: # %bb.0:6851; ZVFHMIN-NEXT: fmv.x.h a1, fa06852; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6853; ZVFHMIN-NEXT: vmv.v.x v24, a16854; ZVFHMIN-NEXT: lui a0, 86855; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t6856; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t6857; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10, v0.t6858; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v24, v0.t6859; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6860; ZVFHMIN-NEXT: vfmadd.vv v20, v12, v16, v0.t6861; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6862; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v20, v0.t6863; ZVFHMIN-NEXT: ret6864 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06865 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6866 %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> %m, i32 %evl)6867 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negva, <vscale x 8 x half> %vb, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)6868 ret <vscale x 8 x half> %v6869}6870 6871define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {6872; ZVFH-LABEL: vfnmsub_vf_nxv8f16_commute:6873; ZVFH: # %bb.0:6874; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6875; ZVFH-NEXT: vfnmsub.vf v8, fa0, v10, v0.t6876; ZVFH-NEXT: ret6877;6878; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_commute:6879; ZVFHMIN: # %bb.0:6880; ZVFHMIN-NEXT: fmv.x.h a1, fa06881; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6882; ZVFHMIN-NEXT: vmv.v.x v20, a16883; ZVFHMIN-NEXT: lui a0, 86884; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t6885; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t6886; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10, v0.t6887; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t6888; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6889; ZVFHMIN-NEXT: vfmadd.vv v12, v8, v16, v0.t6890; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6891; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t6892; ZVFHMIN-NEXT: ret6893 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06894 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6895 %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> %m, i32 %evl)6896 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %negva, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)6897 ret <vscale x 8 x half> %v6898}6899 6900define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {6901; ZVFH-LABEL: vfnmsub_vf_nxv8f16_unmasked:6902; ZVFH: # %bb.0:6903; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6904; ZVFH-NEXT: vfnmsub.vf v8, fa0, v106905; ZVFH-NEXT: ret6906;6907; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_unmasked:6908; ZVFHMIN: # %bb.0:6909; ZVFHMIN-NEXT: fmv.x.h a1, fa06910; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6911; ZVFHMIN-NEXT: vmv.v.x v20, a16912; ZVFHMIN-NEXT: lui a0, 86913; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v106914; ZVFHMIN-NEXT: vxor.vx v16, v8, a06915; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v166916; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v206917; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6918; ZVFHMIN-NEXT: vfmadd.vv v16, v8, v126919; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6920; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v166921; ZVFHMIN-NEXT: ret6922 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06923 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6924 %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)6925 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negva, <vscale x 8 x half> %vb, <vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6926 ret <vscale x 8 x half> %v6927}6928 6929define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_unmasked_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {6930; ZVFH-LABEL: vfnmsub_vf_nxv8f16_unmasked_commute:6931; ZVFH: # %bb.0:6932; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6933; ZVFH-NEXT: vfnmsub.vf v8, fa0, v106934; ZVFH-NEXT: ret6935;6936; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_unmasked_commute:6937; ZVFHMIN: # %bb.0:6938; ZVFHMIN-NEXT: fmv.x.h a1, fa06939; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6940; ZVFHMIN-NEXT: vmv.v.x v20, a16941; ZVFHMIN-NEXT: lui a0, 86942; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v106943; ZVFHMIN-NEXT: vxor.vx v16, v8, a06944; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v166945; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v206946; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6947; ZVFHMIN-NEXT: vfmadd.vv v16, v8, v126948; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6949; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v166950; ZVFHMIN-NEXT: ret6951 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06952 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6953 %negva = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)6954 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %negva, <vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)6955 ret <vscale x 8 x half> %v6956}6957 6958define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_neg_splat(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {6959; ZVFH-LABEL: vfnmsub_vf_nxv8f16_neg_splat:6960; ZVFH: # %bb.0:6961; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6962; ZVFH-NEXT: vfnmsub.vf v8, fa0, v10, v0.t6963; ZVFH-NEXT: ret6964;6965; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_neg_splat:6966; ZVFHMIN: # %bb.0:6967; ZVFHMIN-NEXT: fmv.x.h a1, fa06968; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6969; ZVFHMIN-NEXT: vmv.v.x v12, a16970; ZVFHMIN-NEXT: lui a0, 86971; ZVFHMIN-NEXT: vxor.vx v16, v12, a0, v0.t6972; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v16, v0.t6973; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10, v0.t6974; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8, v0.t6975; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma6976; ZVFHMIN-NEXT: vfmadd.vv v12, v20, v16, v0.t6977; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma6978; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t6979; ZVFHMIN-NEXT: ret6980 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 06981 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer6982 %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)6983 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negvb, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)6984 ret <vscale x 8 x half> %v6985}6986 6987define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_neg_splat_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {6988; ZVFH-LABEL: vfnmsub_vf_nxv8f16_neg_splat_commute:6989; ZVFH: # %bb.0:6990; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma6991; ZVFH-NEXT: vfnmsub.vf v8, fa0, v10, v0.t6992; ZVFH-NEXT: ret6993;6994; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_neg_splat_commute:6995; ZVFHMIN: # %bb.0:6996; ZVFHMIN-NEXT: fmv.x.h a1, fa06997; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma6998; ZVFHMIN-NEXT: vmv.v.x v12, a16999; ZVFHMIN-NEXT: lui a0, 87000; ZVFHMIN-NEXT: vxor.vx v16, v12, a0, v0.t7001; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v16, v0.t7002; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10, v0.t7003; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8, v0.t7004; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma7005; ZVFHMIN-NEXT: vfmadd.vv v20, v12, v16, v0.t7006; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma7007; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v20, v0.t7008; ZVFHMIN-NEXT: ret7009 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 07010 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer7011 %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)7012 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negvb, <vscale x 8 x half> %va, <vscale x 8 x half> %vc, <vscale x 8 x i1> %m, i32 %evl)7013 ret <vscale x 8 x half> %v7014}7015 7016define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_neg_splat_unmasked(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {7017; ZVFH-LABEL: vfnmsub_vf_nxv8f16_neg_splat_unmasked:7018; ZVFH: # %bb.0:7019; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma7020; ZVFH-NEXT: vfnmsub.vf v8, fa0, v107021; ZVFH-NEXT: ret7022;7023; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_neg_splat_unmasked:7024; ZVFHMIN: # %bb.0:7025; ZVFHMIN-NEXT: fmv.x.h a1, fa07026; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma7027; ZVFHMIN-NEXT: vmv.v.x v16, a17028; ZVFHMIN-NEXT: lui a0, 87029; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v107030; ZVFHMIN-NEXT: vxor.vx v10, v16, a07031; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v107032; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v87033; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma7034; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v127035; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma7036; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v207037; ZVFHMIN-NEXT: ret7038 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 07039 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer7040 %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)7041 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %negvb, <vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)7042 ret <vscale x 8 x half> %v7043}7044 7045define <vscale x 8 x half> @vfnmsub_vf_nxv8f16_neg_splat_unmasked_commute(<vscale x 8 x half> %va, half %b, <vscale x 8 x half> %vc, i32 zeroext %evl) {7046; ZVFH-LABEL: vfnmsub_vf_nxv8f16_neg_splat_unmasked_commute:7047; ZVFH: # %bb.0:7048; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma7049; ZVFH-NEXT: vfnmsub.vf v8, fa0, v107050; ZVFH-NEXT: ret7051;7052; ZVFHMIN-LABEL: vfnmsub_vf_nxv8f16_neg_splat_unmasked_commute:7053; ZVFHMIN: # %bb.0:7054; ZVFHMIN-NEXT: fmv.x.h a1, fa07055; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma7056; ZVFHMIN-NEXT: vmv.v.x v16, a17057; ZVFHMIN-NEXT: lui a0, 87058; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v107059; ZVFHMIN-NEXT: vxor.vx v10, v16, a07060; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v107061; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v87062; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma7063; ZVFHMIN-NEXT: vfmadd.vv v20, v16, v127064; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, ta, ma7065; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v207066; ZVFHMIN-NEXT: ret7067 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 07068 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer7069 %negvb = call <vscale x 8 x half> @llvm.vp.fneg.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)7070 %v = call <vscale x 8 x half> @llvm.vp.fma.nxv8f16(<vscale x 8 x half> %negvb, <vscale x 8 x half> %va, <vscale x 8 x half> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)7071 ret <vscale x 8 x half> %v7072}7073 7074define <vscale x 16 x half> @vfmsub_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {7075; ZVFH-LABEL: vfmsub_vv_nxv16f16:7076; ZVFH: # %bb.0:7077; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7078; ZVFH-NEXT: vfmsub.vv v12, v8, v16, v0.t7079; ZVFH-NEXT: vmv.v.v v8, v127080; ZVFH-NEXT: ret7081;7082; ZVFHMIN-LABEL: vfmsub_vv_nxv16f16:7083; ZVFHMIN: # %bb.0:7084; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7085; ZVFHMIN-NEXT: vmv4r.v v4, v127086; ZVFHMIN-NEXT: vmv4r.v v20, v87087; ZVFHMIN-NEXT: lui a0, 87088; ZVFHMIN-NEXT: vxor.vx v16, v16, a0, v0.t7089; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t7090; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t7091; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v4, v0.t7092; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7093; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t7094; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7095; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t7096; ZVFHMIN-NEXT: ret7097 %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 %evl)7098 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %negc, <vscale x 16 x i1> %m, i32 %evl)7099 ret <vscale x 16 x half> %v7100}7101 7102define <vscale x 16 x half> @vfmsub_vv_nxv16f16_unmasked(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, i32 zeroext %evl) {7103; ZVFH-LABEL: vfmsub_vv_nxv16f16_unmasked:7104; ZVFH: # %bb.0:7105; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7106; ZVFH-NEXT: vfmsub.vv v8, v12, v167107; ZVFH-NEXT: ret7108;7109; ZVFHMIN-LABEL: vfmsub_vv_nxv16f16_unmasked:7110; ZVFHMIN: # %bb.0:7111; ZVFHMIN-NEXT: lui a1, 87112; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7113; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v87114; ZVFHMIN-NEXT: vxor.vx v8, v16, a17115; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v87116; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v127117; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7118; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v167119; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7120; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v07121; ZVFHMIN-NEXT: ret7122 %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)7123 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7124 ret <vscale x 16 x half> %v7125}7126 7127define <vscale x 16 x half> @vfmsub_vf_nxv16f16(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {7128; ZVFH-LABEL: vfmsub_vf_nxv16f16:7129; ZVFH: # %bb.0:7130; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7131; ZVFH-NEXT: vfmsub.vf v8, fa0, v12, v0.t7132; ZVFH-NEXT: ret7133;7134; ZVFHMIN-LABEL: vfmsub_vf_nxv16f16:7135; ZVFHMIN: # %bb.0:7136; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7137; ZVFHMIN-NEXT: vmv4r.v v16, v87138; ZVFHMIN-NEXT: fmv.x.h a0, fa07139; ZVFHMIN-NEXT: vmv.v.x v4, a07140; ZVFHMIN-NEXT: lui a0, 87141; ZVFHMIN-NEXT: vxor.vx v20, v12, a0, v0.t7142; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t7143; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t7144; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v4, v0.t7145; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7146; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t7147; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7148; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t7149; ZVFHMIN-NEXT: ret7150 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07151 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7152 %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)7153 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x half> %negvc, <vscale x 16 x i1> %m, i32 %evl)7154 ret <vscale x 16 x half> %v7155}7156 7157define <vscale x 16 x half> @vfmsub_vf_nxv16f16_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {7158; ZVFH-LABEL: vfmsub_vf_nxv16f16_commute:7159; ZVFH: # %bb.0:7160; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7161; ZVFH-NEXT: vfmsub.vf v8, fa0, v12, v0.t7162; ZVFH-NEXT: ret7163;7164; ZVFHMIN-LABEL: vfmsub_vf_nxv16f16_commute:7165; ZVFHMIN: # %bb.0:7166; ZVFHMIN-NEXT: fmv.x.h a1, fa07167; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7168; ZVFHMIN-NEXT: vmv.v.x v4, a17169; ZVFHMIN-NEXT: lui a0, 87170; ZVFHMIN-NEXT: vxor.vx v12, v12, a0, v0.t7171; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t7172; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t7173; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v4, v0.t7174; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7175; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t7176; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7177; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v24, v0.t7178; ZVFHMIN-NEXT: ret7179 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07180 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7181 %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)7182 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %va, <vscale x 16 x half> %negvc, <vscale x 16 x i1> %m, i32 %evl)7183 ret <vscale x 16 x half> %v7184}7185 7186define <vscale x 16 x half> @vfmsub_vf_nxv16f16_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {7187; ZVFH-LABEL: vfmsub_vf_nxv16f16_unmasked:7188; ZVFH: # %bb.0:7189; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7190; ZVFH-NEXT: vfmsub.vf v8, fa0, v127191; ZVFH-NEXT: ret7192;7193; ZVFHMIN-LABEL: vfmsub_vf_nxv16f16_unmasked:7194; ZVFHMIN: # %bb.0:7195; ZVFHMIN-NEXT: fmv.x.h a1, fa07196; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7197; ZVFHMIN-NEXT: vmv.v.x v4, a17198; ZVFHMIN-NEXT: lui a0, 87199; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v87200; ZVFHMIN-NEXT: vxor.vx v24, v12, a07201; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v247202; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v47203; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7204; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v87205; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7206; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v247207; ZVFHMIN-NEXT: ret7208 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07209 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7210 %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7211 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x half> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7212 ret <vscale x 16 x half> %v7213}7214 7215define <vscale x 16 x half> @vfmsub_vf_nxv16f16_unmasked_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {7216; ZVFH-LABEL: vfmsub_vf_nxv16f16_unmasked_commute:7217; ZVFH: # %bb.0:7218; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7219; ZVFH-NEXT: vfmsub.vf v8, fa0, v127220; ZVFH-NEXT: ret7221;7222; ZVFHMIN-LABEL: vfmsub_vf_nxv16f16_unmasked_commute:7223; ZVFHMIN: # %bb.0:7224; ZVFHMIN-NEXT: fmv.x.h a1, fa07225; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7226; ZVFHMIN-NEXT: vmv.v.x v4, a17227; ZVFHMIN-NEXT: lui a0, 87228; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v87229; ZVFHMIN-NEXT: vxor.vx v24, v12, a07230; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v247231; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v47232; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7233; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v87234; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7235; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v247236; ZVFHMIN-NEXT: ret7237 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07238 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7239 %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7240 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %va, <vscale x 16 x half> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7241 ret <vscale x 16 x half> %v7242}7243 7244define <vscale x 16 x half> @vfnmadd_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {7245; ZVFH-LABEL: vfnmadd_vv_nxv16f16:7246; ZVFH: # %bb.0:7247; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7248; ZVFH-NEXT: vfnmadd.vv v12, v8, v16, v0.t7249; ZVFH-NEXT: vmv.v.v v8, v127250; ZVFH-NEXT: ret7251;7252; ZVFHMIN-LABEL: vfnmadd_vv_nxv16f16:7253; ZVFHMIN: # %bb.0:7254; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7255; ZVFHMIN-NEXT: vmv4r.v v4, v87256; ZVFHMIN-NEXT: lui a0, 87257; ZVFHMIN-NEXT: vxor.vx v8, v12, a0, v0.t7258; ZVFHMIN-NEXT: vxor.vx v12, v16, a0, v0.t7259; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t7260; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t7261; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v4, v0.t7262; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7263; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t7264; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7265; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v24, v0.t7266; ZVFHMIN-NEXT: ret7267 %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)7268 %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 %evl)7269 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negb, <vscale x 16 x half> %negc, <vscale x 16 x i1> %m, i32 %evl)7270 ret <vscale x 16 x half> %v7271}7272 7273define <vscale x 16 x half> @vfnmadd_vv_nxv16f16_commuted(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {7274; ZVFH-LABEL: vfnmadd_vv_nxv16f16_commuted:7275; ZVFH: # %bb.0:7276; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7277; ZVFH-NEXT: vfnmadd.vv v8, v12, v16, v0.t7278; ZVFH-NEXT: ret7279;7280; ZVFHMIN-LABEL: vfnmadd_vv_nxv16f16_commuted:7281; ZVFHMIN: # %bb.0:7282; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7283; ZVFHMIN-NEXT: vmv4r.v v4, v87284; ZVFHMIN-NEXT: lui a0, 87285; ZVFHMIN-NEXT: vxor.vx v20, v12, a0, v0.t7286; ZVFHMIN-NEXT: vxor.vx v16, v16, a0, v0.t7287; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t7288; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t7289; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v4, v0.t7290; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7291; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t7292; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7293; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t7294; ZVFHMIN-NEXT: ret7295 %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)7296 %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 %evl)7297 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negb, <vscale x 16 x half> %va, <vscale x 16 x half> %negc, <vscale x 16 x i1> %m, i32 %evl)7298 ret <vscale x 16 x half> %v7299}7300 7301define <vscale x 16 x half> @vfnmadd_vv_nxv16f16_unmasked(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, i32 zeroext %evl) {7302; ZVFH-LABEL: vfnmadd_vv_nxv16f16_unmasked:7303; ZVFH: # %bb.0:7304; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7305; ZVFH-NEXT: vfnmadd.vv v8, v12, v167306; ZVFH-NEXT: ret7307;7308; ZVFHMIN-LABEL: vfnmadd_vv_nxv16f16_unmasked:7309; ZVFHMIN: # %bb.0:7310; ZVFHMIN-NEXT: lui a1, 87311; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7312; ZVFHMIN-NEXT: vxor.vx v12, v12, a17313; ZVFHMIN-NEXT: vxor.vx v24, v16, a17314; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v247315; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v127316; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v87317; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7318; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v167319; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7320; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v07321; ZVFHMIN-NEXT: ret7322 %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)7323 %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)7324 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negb, <vscale x 16 x half> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7325 ret <vscale x 16 x half> %v7326}7327 7328define <vscale x 16 x half> @vfnmadd_vv_nxv16f16_unmasked_commuted(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, i32 zeroext %evl) {7329; ZVFH-LABEL: vfnmadd_vv_nxv16f16_unmasked_commuted:7330; ZVFH: # %bb.0:7331; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7332; ZVFH-NEXT: vfnmadd.vv v8, v12, v167333; ZVFH-NEXT: ret7334;7335; ZVFHMIN-LABEL: vfnmadd_vv_nxv16f16_unmasked_commuted:7336; ZVFHMIN: # %bb.0:7337; ZVFHMIN-NEXT: lui a1, 87338; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7339; ZVFHMIN-NEXT: vxor.vx v12, v12, a17340; ZVFHMIN-NEXT: vxor.vx v24, v16, a17341; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v247342; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v127343; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v87344; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7345; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v167346; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7347; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v07348; ZVFHMIN-NEXT: ret7349 %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)7350 %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)7351 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negb, <vscale x 16 x half> %va, <vscale x 16 x half> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7352 ret <vscale x 16 x half> %v7353}7354 7355define <vscale x 16 x half> @vfnmadd_vf_nxv16f16(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {7356; ZVFH-LABEL: vfnmadd_vf_nxv16f16:7357; ZVFH: # %bb.0:7358; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7359; ZVFH-NEXT: vfnmadd.vf v8, fa0, v12, v0.t7360; ZVFH-NEXT: ret7361;7362; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16:7363; ZVFHMIN: # %bb.0:7364; ZVFHMIN-NEXT: fmv.x.h a1, fa07365; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7366; ZVFHMIN-NEXT: vmv.v.x v4, a17367; ZVFHMIN-NEXT: lui a0, 87368; ZVFHMIN-NEXT: vxor.vx v24, v8, a0, v0.t7369; ZVFHMIN-NEXT: vxor.vx v16, v12, a0, v0.t7370; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t7371; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v24, v0.t7372; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v4, v0.t7373; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7374; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v8, v0.t7375; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7376; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v24, v0.t7377; ZVFHMIN-NEXT: ret7378 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07379 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7380 %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> %m, i32 %evl)7381 %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)7382 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negva, <vscale x 16 x half> %vb, <vscale x 16 x half> %negvc, <vscale x 16 x i1> %m, i32 %evl)7383 ret <vscale x 16 x half> %v7384}7385 7386define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {7387; ZVFH-LABEL: vfnmadd_vf_nxv16f16_commute:7388; ZVFH: # %bb.0:7389; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7390; ZVFH-NEXT: vfnmadd.vf v8, fa0, v12, v0.t7391; ZVFH-NEXT: ret7392;7393; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_commute:7394; ZVFHMIN: # %bb.0:7395; ZVFHMIN-NEXT: fmv.x.h a1, fa07396; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7397; ZVFHMIN-NEXT: vmv.v.x v4, a17398; ZVFHMIN-NEXT: lui a0, 87399; ZVFHMIN-NEXT: vxor.vx v24, v8, a0, v0.t7400; ZVFHMIN-NEXT: vxor.vx v16, v12, a0, v0.t7401; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t7402; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v24, v0.t7403; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v4, v0.t7404; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7405; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t7406; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7407; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t7408; ZVFHMIN-NEXT: ret7409 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07410 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7411 %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> %m, i32 %evl)7412 %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)7413 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %negva, <vscale x 16 x half> %negvc, <vscale x 16 x i1> %m, i32 %evl)7414 ret <vscale x 16 x half> %v7415}7416 7417define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {7418; ZVFH-LABEL: vfnmadd_vf_nxv16f16_unmasked:7419; ZVFH: # %bb.0:7420; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7421; ZVFH-NEXT: vfnmadd.vf v8, fa0, v127422; ZVFH-NEXT: ret7423;7424; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_unmasked:7425; ZVFHMIN: # %bb.0:7426; ZVFHMIN-NEXT: fmv.x.h a1, fa07427; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7428; ZVFHMIN-NEXT: vmv.v.x v4, a17429; ZVFHMIN-NEXT: lui a0, 87430; ZVFHMIN-NEXT: vxor.vx v24, v8, a07431; ZVFHMIN-NEXT: vxor.vx v16, v12, a07432; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v167433; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v247434; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v47435; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7436; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v87437; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7438; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v247439; ZVFHMIN-NEXT: ret7440 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07441 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7442 %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)7443 %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7444 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negva, <vscale x 16 x half> %vb, <vscale x 16 x half> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7445 ret <vscale x 16 x half> %v7446}7447 7448define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_unmasked_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {7449; ZVFH-LABEL: vfnmadd_vf_nxv16f16_unmasked_commute:7450; ZVFH: # %bb.0:7451; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7452; ZVFH-NEXT: vfnmadd.vf v8, fa0, v127453; ZVFH-NEXT: ret7454;7455; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_unmasked_commute:7456; ZVFHMIN: # %bb.0:7457; ZVFHMIN-NEXT: fmv.x.h a1, fa07458; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7459; ZVFHMIN-NEXT: vmv.v.x v4, a17460; ZVFHMIN-NEXT: lui a0, 87461; ZVFHMIN-NEXT: vxor.vx v24, v8, a07462; ZVFHMIN-NEXT: vxor.vx v16, v12, a07463; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v167464; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v247465; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v47466; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7467; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v87468; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7469; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v247470; ZVFHMIN-NEXT: ret7471 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07472 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7473 %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)7474 %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7475 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %negva, <vscale x 16 x half> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7476 ret <vscale x 16 x half> %v7477}7478 7479define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_neg_splat(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {7480; ZVFH-LABEL: vfnmadd_vf_nxv16f16_neg_splat:7481; ZVFH: # %bb.0:7482; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7483; ZVFH-NEXT: vfnmadd.vf v8, fa0, v12, v0.t7484; ZVFH-NEXT: ret7485;7486; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_neg_splat:7487; ZVFHMIN: # %bb.0:7488; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7489; ZVFHMIN-NEXT: vmv4r.v v4, v87490; ZVFHMIN-NEXT: fmv.x.h a0, fa07491; ZVFHMIN-NEXT: vmv.v.x v8, a07492; ZVFHMIN-NEXT: lui a0, 87493; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t7494; ZVFHMIN-NEXT: vxor.vx v12, v12, a0, v0.t7495; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t7496; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t7497; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v4, v0.t7498; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7499; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t7500; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7501; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v24, v0.t7502; ZVFHMIN-NEXT: ret7503 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07504 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7505 %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)7506 %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)7507 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negvb, <vscale x 16 x half> %negvc, <vscale x 16 x i1> %m, i32 %evl)7508 ret <vscale x 16 x half> %v7509}7510 7511define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_neg_splat_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {7512; ZVFH-LABEL: vfnmadd_vf_nxv16f16_neg_splat_commute:7513; ZVFH: # %bb.0:7514; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7515; ZVFH-NEXT: vfnmadd.vf v8, fa0, v12, v0.t7516; ZVFH-NEXT: ret7517;7518; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_neg_splat_commute:7519; ZVFHMIN: # %bb.0:7520; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7521; ZVFHMIN-NEXT: vmv4r.v v4, v87522; ZVFHMIN-NEXT: fmv.x.h a0, fa07523; ZVFHMIN-NEXT: vmv.v.x v8, a07524; ZVFHMIN-NEXT: lui a0, 87525; ZVFHMIN-NEXT: vxor.vx v16, v8, a0, v0.t7526; ZVFHMIN-NEXT: vxor.vx v20, v12, a0, v0.t7527; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t7528; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t7529; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v4, v0.t7530; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7531; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t7532; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7533; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t7534; ZVFHMIN-NEXT: ret7535 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07536 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7537 %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)7538 %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)7539 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negvb, <vscale x 16 x half> %va, <vscale x 16 x half> %negvc, <vscale x 16 x i1> %m, i32 %evl)7540 ret <vscale x 16 x half> %v7541}7542 7543define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_neg_splat_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {7544; ZVFH-LABEL: vfnmadd_vf_nxv16f16_neg_splat_unmasked:7545; ZVFH: # %bb.0:7546; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7547; ZVFH-NEXT: vfnmadd.vf v8, fa0, v127548; ZVFH-NEXT: ret7549;7550; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_neg_splat_unmasked:7551; ZVFHMIN: # %bb.0:7552; ZVFHMIN-NEXT: fmv.x.h a1, fa07553; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7554; ZVFHMIN-NEXT: vmv.v.x v16, a17555; ZVFHMIN-NEXT: lui a0, 87556; ZVFHMIN-NEXT: vxor.vx v12, v12, a07557; ZVFHMIN-NEXT: vxor.vx v4, v16, a07558; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v127559; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v47560; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v87561; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7562; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v167563; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7564; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v07565; ZVFHMIN-NEXT: ret7566 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07567 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7568 %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)7569 %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7570 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negvb, <vscale x 16 x half> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7571 ret <vscale x 16 x half> %v7572}7573 7574define <vscale x 16 x half> @vfnmadd_vf_nxv16f16_neg_splat_unmasked_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {7575; ZVFH-LABEL: vfnmadd_vf_nxv16f16_neg_splat_unmasked_commute:7576; ZVFH: # %bb.0:7577; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7578; ZVFH-NEXT: vfnmadd.vf v8, fa0, v127579; ZVFH-NEXT: ret7580;7581; ZVFHMIN-LABEL: vfnmadd_vf_nxv16f16_neg_splat_unmasked_commute:7582; ZVFHMIN: # %bb.0:7583; ZVFHMIN-NEXT: fmv.x.h a1, fa07584; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7585; ZVFHMIN-NEXT: vmv.v.x v16, a17586; ZVFHMIN-NEXT: lui a0, 87587; ZVFHMIN-NEXT: vxor.vx v12, v12, a07588; ZVFHMIN-NEXT: vxor.vx v4, v16, a07589; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v127590; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v47591; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v87592; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7593; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v167594; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7595; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v07596; ZVFHMIN-NEXT: ret7597 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07598 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7599 %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)7600 %negvc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7601 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negvb, <vscale x 16 x half> %va, <vscale x 16 x half> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7602 ret <vscale x 16 x half> %v7603}7604 7605define <vscale x 16 x half> @vfnmsub_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {7606; ZVFH-LABEL: vfnmsub_vv_nxv16f16:7607; ZVFH: # %bb.0:7608; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7609; ZVFH-NEXT: vfnmadd.vv v12, v8, v16, v0.t7610; ZVFH-NEXT: vmv.v.v v8, v127611; ZVFH-NEXT: ret7612;7613; ZVFHMIN-LABEL: vfnmsub_vv_nxv16f16:7614; ZVFHMIN: # %bb.0:7615; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7616; ZVFHMIN-NEXT: vmv4r.v v4, v87617; ZVFHMIN-NEXT: lui a0, 87618; ZVFHMIN-NEXT: vxor.vx v8, v12, a0, v0.t7619; ZVFHMIN-NEXT: vxor.vx v12, v16, a0, v0.t7620; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t7621; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t7622; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v4, v0.t7623; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7624; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t7625; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7626; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v24, v0.t7627; ZVFHMIN-NEXT: ret7628 %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)7629 %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 %evl)7630 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negb, <vscale x 16 x half> %negc, <vscale x 16 x i1> %m, i32 %evl)7631 ret <vscale x 16 x half> %v7632}7633 7634define <vscale x 16 x half> @vfnmsub_vv_nxv16f16_commuted(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {7635; ZVFH-LABEL: vfnmsub_vv_nxv16f16_commuted:7636; ZVFH: # %bb.0:7637; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7638; ZVFH-NEXT: vfnmadd.vv v8, v12, v16, v0.t7639; ZVFH-NEXT: ret7640;7641; ZVFHMIN-LABEL: vfnmsub_vv_nxv16f16_commuted:7642; ZVFHMIN: # %bb.0:7643; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7644; ZVFHMIN-NEXT: vmv4r.v v4, v87645; ZVFHMIN-NEXT: lui a0, 87646; ZVFHMIN-NEXT: vxor.vx v20, v12, a0, v0.t7647; ZVFHMIN-NEXT: vxor.vx v16, v16, a0, v0.t7648; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t7649; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t7650; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v4, v0.t7651; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7652; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t7653; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7654; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t7655; ZVFHMIN-NEXT: ret7656 %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)7657 %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> %m, i32 %evl)7658 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negb, <vscale x 16 x half> %va, <vscale x 16 x half> %negc, <vscale x 16 x i1> %m, i32 %evl)7659 ret <vscale x 16 x half> %v7660}7661 7662define <vscale x 16 x half> @vfnmsub_vv_nxv16f16_unmasked(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, i32 zeroext %evl) {7663; ZVFH-LABEL: vfnmsub_vv_nxv16f16_unmasked:7664; ZVFH: # %bb.0:7665; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7666; ZVFH-NEXT: vfnmadd.vv v8, v12, v167667; ZVFH-NEXT: ret7668;7669; ZVFHMIN-LABEL: vfnmsub_vv_nxv16f16_unmasked:7670; ZVFHMIN: # %bb.0:7671; ZVFHMIN-NEXT: lui a1, 87672; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7673; ZVFHMIN-NEXT: vxor.vx v12, v12, a17674; ZVFHMIN-NEXT: vxor.vx v24, v16, a17675; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v247676; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v127677; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v87678; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7679; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v167680; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7681; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v07682; ZVFHMIN-NEXT: ret7683 %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)7684 %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)7685 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negb, <vscale x 16 x half> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7686 ret <vscale x 16 x half> %v7687}7688 7689define <vscale x 16 x half> @vfnmsub_vv_nxv16f16_unmasked_commuted(<vscale x 16 x half> %va, <vscale x 16 x half> %b, <vscale x 16 x half> %c, i32 zeroext %evl) {7690; ZVFH-LABEL: vfnmsub_vv_nxv16f16_unmasked_commuted:7691; ZVFH: # %bb.0:7692; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7693; ZVFH-NEXT: vfnmadd.vv v8, v12, v167694; ZVFH-NEXT: ret7695;7696; ZVFHMIN-LABEL: vfnmsub_vv_nxv16f16_unmasked_commuted:7697; ZVFHMIN: # %bb.0:7698; ZVFHMIN-NEXT: lui a1, 87699; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7700; ZVFHMIN-NEXT: vxor.vx v12, v12, a17701; ZVFHMIN-NEXT: vxor.vx v24, v16, a17702; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v247703; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v127704; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v87705; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7706; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v167707; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7708; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v07709; ZVFHMIN-NEXT: ret7710 %negb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)7711 %negc = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)7712 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negb, <vscale x 16 x half> %va, <vscale x 16 x half> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7713 ret <vscale x 16 x half> %v7714}7715 7716define <vscale x 16 x half> @vfnmsub_vf_nxv16f16(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {7717; ZVFH-LABEL: vfnmsub_vf_nxv16f16:7718; ZVFH: # %bb.0:7719; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7720; ZVFH-NEXT: vfnmsub.vf v8, fa0, v12, v0.t7721; ZVFH-NEXT: ret7722;7723; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16:7724; ZVFHMIN: # %bb.0:7725; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7726; ZVFHMIN-NEXT: vmv4r.v v16, v127727; ZVFHMIN-NEXT: fmv.x.h a0, fa07728; ZVFHMIN-NEXT: vmv.v.x v4, a07729; ZVFHMIN-NEXT: lui a0, 87730; ZVFHMIN-NEXT: vxor.vx v20, v8, a0, v0.t7731; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t7732; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t7733; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v4, v0.t7734; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7735; ZVFHMIN-NEXT: vfmadd.vv v16, v8, v24, v0.t7736; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7737; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t7738; ZVFHMIN-NEXT: ret7739 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07740 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7741 %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> %m, i32 %evl)7742 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negva, <vscale x 16 x half> %vb, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)7743 ret <vscale x 16 x half> %v7744}7745 7746define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {7747; ZVFH-LABEL: vfnmsub_vf_nxv16f16_commute:7748; ZVFH: # %bb.0:7749; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7750; ZVFH-NEXT: vfnmsub.vf v8, fa0, v12, v0.t7751; ZVFH-NEXT: ret7752;7753; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_commute:7754; ZVFHMIN: # %bb.0:7755; ZVFHMIN-NEXT: fmv.x.h a1, fa07756; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7757; ZVFHMIN-NEXT: vmv.v.x v4, a17758; ZVFHMIN-NEXT: lui a0, 87759; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t7760; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t7761; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t7762; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v4, v0.t7763; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7764; ZVFHMIN-NEXT: vfmadd.vv v16, v8, v24, v0.t7765; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7766; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t7767; ZVFHMIN-NEXT: ret7768 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07769 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7770 %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> %m, i32 %evl)7771 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %negva, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)7772 ret <vscale x 16 x half> %v7773}7774 7775define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {7776; ZVFH-LABEL: vfnmsub_vf_nxv16f16_unmasked:7777; ZVFH: # %bb.0:7778; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7779; ZVFH-NEXT: vfnmsub.vf v8, fa0, v127780; ZVFH-NEXT: ret7781;7782; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_unmasked:7783; ZVFHMIN: # %bb.0:7784; ZVFHMIN-NEXT: fmv.x.h a1, fa07785; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7786; ZVFHMIN-NEXT: vmv.v.x v4, a17787; ZVFHMIN-NEXT: lui a0, 87788; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v127789; ZVFHMIN-NEXT: vxor.vx v24, v8, a07790; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v247791; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v47792; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7793; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v167794; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7795; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v247796; ZVFHMIN-NEXT: ret7797 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07798 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7799 %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)7800 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negva, <vscale x 16 x half> %vb, <vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7801 ret <vscale x 16 x half> %v7802}7803 7804define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_unmasked_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {7805; ZVFH-LABEL: vfnmsub_vf_nxv16f16_unmasked_commute:7806; ZVFH: # %bb.0:7807; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7808; ZVFH-NEXT: vfnmsub.vf v8, fa0, v127809; ZVFH-NEXT: ret7810;7811; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_unmasked_commute:7812; ZVFHMIN: # %bb.0:7813; ZVFHMIN-NEXT: fmv.x.h a1, fa07814; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7815; ZVFHMIN-NEXT: vmv.v.x v4, a17816; ZVFHMIN-NEXT: lui a0, 87817; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v127818; ZVFHMIN-NEXT: vxor.vx v24, v8, a07819; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v247820; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v47821; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7822; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v167823; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7824; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v247825; ZVFHMIN-NEXT: ret7826 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07827 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7828 %negva = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)7829 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x half> %negva, <vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7830 ret <vscale x 16 x half> %v7831}7832 7833define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_neg_splat(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {7834; ZVFH-LABEL: vfnmsub_vf_nxv16f16_neg_splat:7835; ZVFH: # %bb.0:7836; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7837; ZVFH-NEXT: vfnmsub.vf v8, fa0, v12, v0.t7838; ZVFH-NEXT: ret7839;7840; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_neg_splat:7841; ZVFHMIN: # %bb.0:7842; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7843; ZVFHMIN-NEXT: vmv4r.v v4, v87844; ZVFHMIN-NEXT: fmv.x.h a0, fa07845; ZVFHMIN-NEXT: vmv.v.x v8, a07846; ZVFHMIN-NEXT: lui a0, 87847; ZVFHMIN-NEXT: vxor.vx v8, v8, a0, v0.t7848; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t7849; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t7850; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v4, v0.t7851; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7852; ZVFHMIN-NEXT: vfmadd.vv v16, v8, v24, v0.t7853; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7854; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t7855; ZVFHMIN-NEXT: ret7856 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07857 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7858 %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)7859 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negvb, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)7860 ret <vscale x 16 x half> %v7861}7862 7863define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_neg_splat_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {7864; ZVFH-LABEL: vfnmsub_vf_nxv16f16_neg_splat_commute:7865; ZVFH: # %bb.0:7866; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7867; ZVFH-NEXT: vfnmsub.vf v8, fa0, v12, v0.t7868; ZVFH-NEXT: ret7869;7870; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_neg_splat_commute:7871; ZVFHMIN: # %bb.0:7872; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7873; ZVFHMIN-NEXT: vmv4r.v v16, v127874; ZVFHMIN-NEXT: vmv4r.v v4, v87875; ZVFHMIN-NEXT: fmv.x.h a0, fa07876; ZVFHMIN-NEXT: vmv.v.x v8, a07877; ZVFHMIN-NEXT: lui a0, 87878; ZVFHMIN-NEXT: vxor.vx v20, v8, a0, v0.t7879; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t7880; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t7881; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v4, v0.t7882; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7883; ZVFHMIN-NEXT: vfmadd.vv v16, v8, v24, v0.t7884; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7885; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t7886; ZVFHMIN-NEXT: ret7887 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07888 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7889 %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)7890 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negvb, <vscale x 16 x half> %va, <vscale x 16 x half> %vc, <vscale x 16 x i1> %m, i32 %evl)7891 ret <vscale x 16 x half> %v7892}7893 7894define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_neg_splat_unmasked(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {7895; ZVFH-LABEL: vfnmsub_vf_nxv16f16_neg_splat_unmasked:7896; ZVFH: # %bb.0:7897; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7898; ZVFH-NEXT: vfnmsub.vf v8, fa0, v127899; ZVFH-NEXT: ret7900;7901; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_neg_splat_unmasked:7902; ZVFHMIN: # %bb.0:7903; ZVFHMIN-NEXT: fmv.x.h a1, fa07904; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7905; ZVFHMIN-NEXT: vmv.v.x v24, a17906; ZVFHMIN-NEXT: lui a0, 87907; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v127908; ZVFHMIN-NEXT: vxor.vx v12, v24, a07909; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v127910; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v87911; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7912; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v167913; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7914; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v07915; ZVFHMIN-NEXT: ret7916 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07917 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7918 %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)7919 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %negvb, <vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7920 ret <vscale x 16 x half> %v7921}7922 7923define <vscale x 16 x half> @vfnmsub_vf_nxv16f16_neg_splat_unmasked_commute(<vscale x 16 x half> %va, half %b, <vscale x 16 x half> %vc, i32 zeroext %evl) {7924; ZVFH-LABEL: vfnmsub_vf_nxv16f16_neg_splat_unmasked_commute:7925; ZVFH: # %bb.0:7926; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma7927; ZVFH-NEXT: vfnmsub.vf v8, fa0, v127928; ZVFH-NEXT: ret7929;7930; ZVFHMIN-LABEL: vfnmsub_vf_nxv16f16_neg_splat_unmasked_commute:7931; ZVFHMIN: # %bb.0:7932; ZVFHMIN-NEXT: fmv.x.h a1, fa07933; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma7934; ZVFHMIN-NEXT: vmv.v.x v24, a17935; ZVFHMIN-NEXT: lui a0, 87936; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v127937; ZVFHMIN-NEXT: vxor.vx v12, v24, a07938; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v127939; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v87940; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma7941; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v167942; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma7943; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v07944; ZVFHMIN-NEXT: ret7945 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 07946 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer7947 %negvb = call <vscale x 16 x half> @llvm.vp.fneg.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)7948 %v = call <vscale x 16 x half> @llvm.vp.fma.nxv16f16(<vscale x 16 x half> %negvb, <vscale x 16 x half> %va, <vscale x 16 x half> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)7949 ret <vscale x 16 x half> %v7950}7951 7952define <vscale x 32 x half> @vfmsub_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {7953; ZVFH-LABEL: vfmsub_vv_nxv32f16:7954; ZVFH: # %bb.0:7955; ZVFH-NEXT: vl8re16.v v24, (a0)7956; ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma7957; ZVFH-NEXT: vfmsub.vv v16, v8, v24, v0.t7958; ZVFH-NEXT: vmv.v.v v8, v167959; ZVFH-NEXT: ret7960;7961; ZVFHMIN-LABEL: vfmsub_vv_nxv32f16:7962; ZVFHMIN: # %bb.0:7963; ZVFHMIN-NEXT: addi sp, sp, -167964; ZVFHMIN-NEXT: .cfi_def_cfa_offset 167965; ZVFHMIN-NEXT: csrr a2, vlenb7966; ZVFHMIN-NEXT: slli a2, a2, 57967; ZVFHMIN-NEXT: sub sp, sp, a27968; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb7969; ZVFHMIN-NEXT: vsetvli a2, zero, e8, mf2, ta, ma7970; ZVFHMIN-NEXT: vmv1r.v v3, v07971; ZVFHMIN-NEXT: csrr a2, vlenb7972; ZVFHMIN-NEXT: slli a2, a2, 37973; ZVFHMIN-NEXT: mv a3, a27974; ZVFHMIN-NEXT: slli a2, a2, 17975; ZVFHMIN-NEXT: add a2, a2, a37976; ZVFHMIN-NEXT: add a2, sp, a27977; ZVFHMIN-NEXT: addi a2, a2, 167978; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill7979; ZVFHMIN-NEXT: vmv8r.v v16, v87980; ZVFHMIN-NEXT: vl8re16.v v24, (a0)7981; ZVFHMIN-NEXT: lui a2, 87982; ZVFHMIN-NEXT: csrr a3, vlenb7983; ZVFHMIN-NEXT: slli a0, a3, 17984; ZVFHMIN-NEXT: srli a3, a3, 27985; ZVFHMIN-NEXT: sub a4, a1, a07986; ZVFHMIN-NEXT: vslidedown.vx v6, v0, a37987; ZVFHMIN-NEXT: sltu a3, a1, a47988; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma7989; ZVFHMIN-NEXT: vxor.vx v8, v24, a2, v0.t7990; ZVFHMIN-NEXT: addi a3, a3, -17991; ZVFHMIN-NEXT: and a3, a3, a47992; ZVFHMIN-NEXT: vmv1r.v v0, v67993; ZVFHMIN-NEXT: csrr a2, vlenb7994; ZVFHMIN-NEXT: slli a2, a2, 37995; ZVFHMIN-NEXT: add a2, sp, a27996; ZVFHMIN-NEXT: addi a2, a2, 167997; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill7998; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma7999; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t8000; ZVFHMIN-NEXT: addi a2, sp, 168001; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill8002; ZVFHMIN-NEXT: csrr a2, vlenb8003; ZVFHMIN-NEXT: slli a2, a2, 48004; ZVFHMIN-NEXT: add a2, sp, a28005; ZVFHMIN-NEXT: addi a2, a2, 168006; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill8007; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t8008; ZVFHMIN-NEXT: csrr a2, vlenb8009; ZVFHMIN-NEXT: slli a2, a2, 38010; ZVFHMIN-NEXT: mv a3, a28011; ZVFHMIN-NEXT: slli a2, a2, 18012; ZVFHMIN-NEXT: add a2, a2, a38013; ZVFHMIN-NEXT: add a2, sp, a28014; ZVFHMIN-NEXT: addi a2, a2, 168015; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload8016; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t8017; ZVFHMIN-NEXT: addi a2, sp, 168018; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload8019; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8020; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t8021; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8022; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v16, v0.t8023; ZVFHMIN-NEXT: bltu a1, a0, .LBB280_28024; ZVFHMIN-NEXT: # %bb.1:8025; ZVFHMIN-NEXT: mv a1, a08026; ZVFHMIN-NEXT: .LBB280_2:8027; ZVFHMIN-NEXT: vmv1r.v v0, v38028; ZVFHMIN-NEXT: csrr a0, vlenb8029; ZVFHMIN-NEXT: slli a0, a0, 38030; ZVFHMIN-NEXT: add a0, sp, a08031; ZVFHMIN-NEXT: addi a0, a0, 168032; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload8033; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m4, ta, ma8034; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t8035; ZVFHMIN-NEXT: addi a0, sp, 168036; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill8037; ZVFHMIN-NEXT: csrr a0, vlenb8038; ZVFHMIN-NEXT: slli a0, a0, 48039; ZVFHMIN-NEXT: add a0, sp, a08040; ZVFHMIN-NEXT: addi a0, a0, 168041; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload8042; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t8043; ZVFHMIN-NEXT: csrr a0, vlenb8044; ZVFHMIN-NEXT: slli a0, a0, 38045; ZVFHMIN-NEXT: add a0, sp, a08046; ZVFHMIN-NEXT: addi a0, a0, 168047; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill8048; ZVFHMIN-NEXT: csrr a0, vlenb8049; ZVFHMIN-NEXT: slli a0, a0, 38050; ZVFHMIN-NEXT: mv a1, a08051; ZVFHMIN-NEXT: slli a0, a0, 18052; ZVFHMIN-NEXT: add a0, a0, a18053; ZVFHMIN-NEXT: add a0, sp, a08054; ZVFHMIN-NEXT: addi a0, a0, 168055; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8056; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t8057; ZVFHMIN-NEXT: addi a0, sp, 168058; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8059; ZVFHMIN-NEXT: csrr a0, vlenb8060; ZVFHMIN-NEXT: slli a0, a0, 38061; ZVFHMIN-NEXT: add a0, sp, a08062; ZVFHMIN-NEXT: addi a0, a0, 168063; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload8064; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8065; ZVFHMIN-NEXT: vfmadd.vv v8, v24, v16, v0.t8066; ZVFHMIN-NEXT: vmv.v.v v16, v88067; ZVFHMIN-NEXT: vmv4r.v v12, v48068; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8069; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t8070; ZVFHMIN-NEXT: csrr a0, vlenb8071; ZVFHMIN-NEXT: slli a0, a0, 58072; ZVFHMIN-NEXT: add sp, sp, a08073; ZVFHMIN-NEXT: .cfi_def_cfa sp, 168074; ZVFHMIN-NEXT: addi sp, sp, 168075; ZVFHMIN-NEXT: .cfi_def_cfa_offset 08076; ZVFHMIN-NEXT: ret8077 %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 %evl)8078 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %negc, <vscale x 32 x i1> %m, i32 %evl)8079 ret <vscale x 32 x half> %v8080}8081 8082define <vscale x 32 x half> @vfmsub_vv_nxv32f16_unmasked(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, i32 zeroext %evl) {8083; ZVFH-LABEL: vfmsub_vv_nxv32f16_unmasked:8084; ZVFH: # %bb.0:8085; ZVFH-NEXT: vl8re16.v v24, (a0)8086; ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma8087; ZVFH-NEXT: vfmsub.vv v8, v16, v248088; ZVFH-NEXT: ret8089;8090; ZVFHMIN-LABEL: vfmsub_vv_nxv32f16_unmasked:8091; ZVFHMIN: # %bb.0:8092; ZVFHMIN-NEXT: addi sp, sp, -168093; ZVFHMIN-NEXT: .cfi_def_cfa_offset 168094; ZVFHMIN-NEXT: csrr a2, vlenb8095; ZVFHMIN-NEXT: slli a2, a2, 58096; ZVFHMIN-NEXT: sub sp, sp, a28097; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb8098; ZVFHMIN-NEXT: csrr a2, vlenb8099; ZVFHMIN-NEXT: slli a2, a2, 38100; ZVFHMIN-NEXT: mv a3, a28101; ZVFHMIN-NEXT: slli a2, a2, 18102; ZVFHMIN-NEXT: add a2, a2, a38103; ZVFHMIN-NEXT: add a2, sp, a28104; ZVFHMIN-NEXT: addi a2, a2, 168105; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill8106; ZVFHMIN-NEXT: vsetvli a2, zero, e8, m4, ta, ma8107; ZVFHMIN-NEXT: vmv8r.v v24, v88108; ZVFHMIN-NEXT: vl8re16.v v16, (a0)8109; ZVFHMIN-NEXT: lui a2, 88110; ZVFHMIN-NEXT: vmset.m v88111; ZVFHMIN-NEXT: csrr a3, vlenb8112; ZVFHMIN-NEXT: slli a0, a3, 18113; ZVFHMIN-NEXT: srli a3, a3, 28114; ZVFHMIN-NEXT: sub a4, a1, a08115; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma8116; ZVFHMIN-NEXT: vslidedown.vx v0, v8, a38117; ZVFHMIN-NEXT: sltu a3, a1, a48118; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma8119; ZVFHMIN-NEXT: vxor.vx v16, v16, a28120; ZVFHMIN-NEXT: addi a3, a3, -18121; ZVFHMIN-NEXT: and a3, a3, a48122; ZVFHMIN-NEXT: vmv4r.v v8, v168123; ZVFHMIN-NEXT: addi a2, sp, 168124; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill8125; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma8126; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t8127; ZVFHMIN-NEXT: csrr a2, vlenb8128; ZVFHMIN-NEXT: slli a2, a2, 38129; ZVFHMIN-NEXT: add a2, sp, a28130; ZVFHMIN-NEXT: addi a2, a2, 168131; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill8132; ZVFHMIN-NEXT: csrr a2, vlenb8133; ZVFHMIN-NEXT: slli a2, a2, 48134; ZVFHMIN-NEXT: add a2, sp, a28135; ZVFHMIN-NEXT: addi a2, a2, 168136; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill8137; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v28, v0.t8138; ZVFHMIN-NEXT: csrr a2, vlenb8139; ZVFHMIN-NEXT: slli a2, a2, 38140; ZVFHMIN-NEXT: mv a3, a28141; ZVFHMIN-NEXT: slli a2, a2, 18142; ZVFHMIN-NEXT: add a2, a2, a38143; ZVFHMIN-NEXT: add a2, sp, a28144; ZVFHMIN-NEXT: addi a2, a2, 168145; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload8146; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t8147; ZVFHMIN-NEXT: csrr a2, vlenb8148; ZVFHMIN-NEXT: slli a2, a2, 38149; ZVFHMIN-NEXT: add a2, sp, a28150; ZVFHMIN-NEXT: addi a2, a2, 168151; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload8152; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8153; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v8, v0.t8154; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8155; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v24, v0.t8156; ZVFHMIN-NEXT: bltu a1, a0, .LBB281_28157; ZVFHMIN-NEXT: # %bb.1:8158; ZVFHMIN-NEXT: mv a1, a08159; ZVFHMIN-NEXT: .LBB281_2:8160; ZVFHMIN-NEXT: addi a0, sp, 168161; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8162; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m4, ta, ma8163; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v168164; ZVFHMIN-NEXT: csrr a0, vlenb8165; ZVFHMIN-NEXT: slli a0, a0, 38166; ZVFHMIN-NEXT: add a0, sp, a08167; ZVFHMIN-NEXT: addi a0, a0, 168168; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill8169; ZVFHMIN-NEXT: csrr a0, vlenb8170; ZVFHMIN-NEXT: slli a0, a0, 48171; ZVFHMIN-NEXT: add a0, sp, a08172; ZVFHMIN-NEXT: addi a0, a0, 168173; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload8174; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v248175; ZVFHMIN-NEXT: csrr a0, vlenb8176; ZVFHMIN-NEXT: slli a0, a0, 38177; ZVFHMIN-NEXT: mv a1, a08178; ZVFHMIN-NEXT: slli a0, a0, 18179; ZVFHMIN-NEXT: add a0, a0, a18180; ZVFHMIN-NEXT: add a0, sp, a08181; ZVFHMIN-NEXT: addi a0, a0, 168182; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload8183; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v248184; ZVFHMIN-NEXT: csrr a0, vlenb8185; ZVFHMIN-NEXT: slli a0, a0, 38186; ZVFHMIN-NEXT: add a0, sp, a08187; ZVFHMIN-NEXT: addi a0, a0, 168188; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload8189; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8190; ZVFHMIN-NEXT: vfmadd.vv v0, v16, v248191; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8192; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v08193; ZVFHMIN-NEXT: csrr a0, vlenb8194; ZVFHMIN-NEXT: slli a0, a0, 58195; ZVFHMIN-NEXT: add sp, sp, a08196; ZVFHMIN-NEXT: .cfi_def_cfa sp, 168197; ZVFHMIN-NEXT: addi sp, sp, 168198; ZVFHMIN-NEXT: .cfi_def_cfa_offset 08199; ZVFHMIN-NEXT: ret8200 %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)8201 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %negc, <vscale x 32 x i1> splat (i1 true), i32 %evl)8202 ret <vscale x 32 x half> %v8203}8204 8205define <vscale x 32 x half> @vfmsub_vf_nxv32f16(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {8206; ZVFH-LABEL: vfmsub_vf_nxv32f16:8207; ZVFH: # %bb.0:8208; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma8209; ZVFH-NEXT: vfmsub.vf v8, fa0, v16, v0.t8210; ZVFH-NEXT: ret8211;8212; ZVFHMIN-LABEL: vfmsub_vf_nxv32f16:8213; ZVFHMIN: # %bb.0:8214; ZVFHMIN-NEXT: addi sp, sp, -168215; ZVFHMIN-NEXT: .cfi_def_cfa_offset 168216; ZVFHMIN-NEXT: csrr a1, vlenb8217; ZVFHMIN-NEXT: slli a1, a1, 58218; ZVFHMIN-NEXT: sub sp, sp, a18219; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb8220; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma8221; ZVFHMIN-NEXT: vmv1r.v v3, v08222; ZVFHMIN-NEXT: fmv.x.h a2, fa08223; ZVFHMIN-NEXT: lui a1, 88224; ZVFHMIN-NEXT: csrr a3, vlenb8225; ZVFHMIN-NEXT: vxor.vx v24, v16, a1, v0.t8226; ZVFHMIN-NEXT: vmv8r.v v16, v88227; ZVFHMIN-NEXT: slli a1, a3, 18228; ZVFHMIN-NEXT: srli a3, a3, 28229; ZVFHMIN-NEXT: sub a4, a0, a18230; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma8231; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a38232; ZVFHMIN-NEXT: sltu a3, a0, a48233; ZVFHMIN-NEXT: addi a3, a3, -18234; ZVFHMIN-NEXT: and a3, a3, a48235; ZVFHMIN-NEXT: csrr a4, vlenb8236; ZVFHMIN-NEXT: slli a4, a4, 38237; ZVFHMIN-NEXT: mv a5, a48238; ZVFHMIN-NEXT: slli a4, a4, 18239; ZVFHMIN-NEXT: add a4, a4, a58240; ZVFHMIN-NEXT: add a4, sp, a48241; ZVFHMIN-NEXT: addi a4, a4, 168242; ZVFHMIN-NEXT: vs8r.v v24, (a4) # vscale x 64-byte Folded Spill8243; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma8244; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t8245; ZVFHMIN-NEXT: addi a4, sp, 168246; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill8247; ZVFHMIN-NEXT: csrr a4, vlenb8248; ZVFHMIN-NEXT: slli a4, a4, 38249; ZVFHMIN-NEXT: add a4, sp, a48250; ZVFHMIN-NEXT: addi a4, a4, 168251; ZVFHMIN-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill8252; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t8253; ZVFHMIN-NEXT: vsetvli a4, zero, e16, m8, ta, ma8254; ZVFHMIN-NEXT: vmv.v.x v16, a28255; ZVFHMIN-NEXT: csrr a2, vlenb8256; ZVFHMIN-NEXT: slli a2, a2, 48257; ZVFHMIN-NEXT: add a2, sp, a28258; ZVFHMIN-NEXT: addi a2, a2, 168259; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill8260; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma8261; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t8262; ZVFHMIN-NEXT: addi a2, sp, 168263; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload8264; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8265; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t8266; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8267; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v24, v0.t8268; ZVFHMIN-NEXT: bltu a0, a1, .LBB282_28269; ZVFHMIN-NEXT: # %bb.1:8270; ZVFHMIN-NEXT: mv a0, a18271; ZVFHMIN-NEXT: .LBB282_2:8272; ZVFHMIN-NEXT: vmv1r.v v0, v38273; ZVFHMIN-NEXT: csrr a1, vlenb8274; ZVFHMIN-NEXT: slli a1, a1, 38275; ZVFHMIN-NEXT: mv a2, a18276; ZVFHMIN-NEXT: slli a1, a1, 18277; ZVFHMIN-NEXT: add a1, a1, a28278; ZVFHMIN-NEXT: add a1, sp, a18279; ZVFHMIN-NEXT: addi a1, a1, 168280; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload8281; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma8282; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v24, v0.t8283; ZVFHMIN-NEXT: addi a0, sp, 168284; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill8285; ZVFHMIN-NEXT: csrr a0, vlenb8286; ZVFHMIN-NEXT: slli a0, a0, 38287; ZVFHMIN-NEXT: add a0, sp, a08288; ZVFHMIN-NEXT: addi a0, a0, 168289; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8290; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t8291; ZVFHMIN-NEXT: csrr a0, vlenb8292; ZVFHMIN-NEXT: slli a0, a0, 38293; ZVFHMIN-NEXT: mv a1, a08294; ZVFHMIN-NEXT: slli a0, a0, 18295; ZVFHMIN-NEXT: add a0, a0, a18296; ZVFHMIN-NEXT: add a0, sp, a08297; ZVFHMIN-NEXT: addi a0, a0, 168298; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill8299; ZVFHMIN-NEXT: csrr a0, vlenb8300; ZVFHMIN-NEXT: slli a0, a0, 48301; ZVFHMIN-NEXT: add a0, sp, a08302; ZVFHMIN-NEXT: addi a0, a0, 168303; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload8304; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v24, v0.t8305; ZVFHMIN-NEXT: addi a0, sp, 168306; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload8307; ZVFHMIN-NEXT: csrr a0, vlenb8308; ZVFHMIN-NEXT: slli a0, a0, 38309; ZVFHMIN-NEXT: mv a1, a08310; ZVFHMIN-NEXT: slli a0, a0, 18311; ZVFHMIN-NEXT: add a0, a0, a18312; ZVFHMIN-NEXT: add a0, sp, a08313; ZVFHMIN-NEXT: addi a0, a0, 168314; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8315; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8316; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t8317; ZVFHMIN-NEXT: vmv.v.v v16, v88318; ZVFHMIN-NEXT: vmv4r.v v12, v48319; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8320; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t8321; ZVFHMIN-NEXT: csrr a0, vlenb8322; ZVFHMIN-NEXT: slli a0, a0, 58323; ZVFHMIN-NEXT: add sp, sp, a08324; ZVFHMIN-NEXT: .cfi_def_cfa sp, 168325; ZVFHMIN-NEXT: addi sp, sp, 168326; ZVFHMIN-NEXT: .cfi_def_cfa_offset 08327; ZVFHMIN-NEXT: ret8328 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 08329 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer8330 %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)8331 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x half> %negvc, <vscale x 32 x i1> %m, i32 %evl)8332 ret <vscale x 32 x half> %v8333}8334 8335define <vscale x 32 x half> @vfmsub_vf_nxv32f16_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {8336; ZVFH-LABEL: vfmsub_vf_nxv32f16_commute:8337; ZVFH: # %bb.0:8338; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma8339; ZVFH-NEXT: vfmsub.vf v8, fa0, v16, v0.t8340; ZVFH-NEXT: ret8341;8342; ZVFHMIN-LABEL: vfmsub_vf_nxv32f16_commute:8343; ZVFHMIN: # %bb.0:8344; ZVFHMIN-NEXT: addi sp, sp, -168345; ZVFHMIN-NEXT: .cfi_def_cfa_offset 168346; ZVFHMIN-NEXT: csrr a1, vlenb8347; ZVFHMIN-NEXT: slli a1, a1, 58348; ZVFHMIN-NEXT: sub sp, sp, a18349; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb8350; ZVFHMIN-NEXT: vsetvli a1, zero, e16, m8, ta, ma8351; ZVFHMIN-NEXT: vmv1r.v v3, v08352; ZVFHMIN-NEXT: csrr a1, vlenb8353; ZVFHMIN-NEXT: slli a1, a1, 38354; ZVFHMIN-NEXT: mv a2, a18355; ZVFHMIN-NEXT: slli a1, a1, 18356; ZVFHMIN-NEXT: add a1, a1, a28357; ZVFHMIN-NEXT: add a1, sp, a18358; ZVFHMIN-NEXT: addi a1, a1, 168359; ZVFHMIN-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill8360; ZVFHMIN-NEXT: fmv.x.h a1, fa08361; ZVFHMIN-NEXT: lui a2, 88362; ZVFHMIN-NEXT: csrr a3, vlenb8363; ZVFHMIN-NEXT: vmv.v.x v8, a18364; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma8365; ZVFHMIN-NEXT: vxor.vx v16, v16, a2, v0.t8366; ZVFHMIN-NEXT: slli a1, a3, 18367; ZVFHMIN-NEXT: srli a3, a3, 28368; ZVFHMIN-NEXT: sub a2, a0, a18369; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma8370; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a38371; ZVFHMIN-NEXT: sltu a3, a0, a28372; ZVFHMIN-NEXT: addi a3, a3, -18373; ZVFHMIN-NEXT: and a2, a3, a28374; ZVFHMIN-NEXT: csrr a3, vlenb8375; ZVFHMIN-NEXT: slli a3, a3, 38376; ZVFHMIN-NEXT: add a3, sp, a38377; ZVFHMIN-NEXT: addi a3, a3, 168378; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill8379; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma8380; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t8381; ZVFHMIN-NEXT: addi a2, sp, 168382; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill8383; ZVFHMIN-NEXT: csrr a2, vlenb8384; ZVFHMIN-NEXT: slli a2, a2, 48385; ZVFHMIN-NEXT: add a2, sp, a28386; ZVFHMIN-NEXT: addi a2, a2, 168387; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill8388; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t8389; ZVFHMIN-NEXT: csrr a2, vlenb8390; ZVFHMIN-NEXT: slli a2, a2, 38391; ZVFHMIN-NEXT: mv a3, a28392; ZVFHMIN-NEXT: slli a2, a2, 18393; ZVFHMIN-NEXT: add a2, a2, a38394; ZVFHMIN-NEXT: add a2, sp, a28395; ZVFHMIN-NEXT: addi a2, a2, 168396; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload8397; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t8398; ZVFHMIN-NEXT: addi a2, sp, 168399; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload8400; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8401; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t8402; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8403; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v8, v0.t8404; ZVFHMIN-NEXT: bltu a0, a1, .LBB283_28405; ZVFHMIN-NEXT: # %bb.1:8406; ZVFHMIN-NEXT: mv a0, a18407; ZVFHMIN-NEXT: .LBB283_2:8408; ZVFHMIN-NEXT: vmv1r.v v0, v38409; ZVFHMIN-NEXT: csrr a1, vlenb8410; ZVFHMIN-NEXT: slli a1, a1, 38411; ZVFHMIN-NEXT: add a1, sp, a18412; ZVFHMIN-NEXT: addi a1, a1, 168413; ZVFHMIN-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload8414; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma8415; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t8416; ZVFHMIN-NEXT: addi a0, sp, 168417; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill8418; ZVFHMIN-NEXT: csrr a0, vlenb8419; ZVFHMIN-NEXT: slli a0, a0, 38420; ZVFHMIN-NEXT: mv a1, a08421; ZVFHMIN-NEXT: slli a0, a0, 18422; ZVFHMIN-NEXT: add a0, a0, a18423; ZVFHMIN-NEXT: add a0, sp, a08424; ZVFHMIN-NEXT: addi a0, a0, 168425; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload8426; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t8427; ZVFHMIN-NEXT: csrr a0, vlenb8428; ZVFHMIN-NEXT: slli a0, a0, 48429; ZVFHMIN-NEXT: add a0, sp, a08430; ZVFHMIN-NEXT: addi a0, a0, 168431; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload8432; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t8433; ZVFHMIN-NEXT: csrr a0, vlenb8434; ZVFHMIN-NEXT: slli a0, a0, 38435; ZVFHMIN-NEXT: mv a1, a08436; ZVFHMIN-NEXT: slli a0, a0, 18437; ZVFHMIN-NEXT: add a0, a0, a18438; ZVFHMIN-NEXT: add a0, sp, a08439; ZVFHMIN-NEXT: addi a0, a0, 168440; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill8441; ZVFHMIN-NEXT: addi a0, sp, 168442; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload8443; ZVFHMIN-NEXT: csrr a0, vlenb8444; ZVFHMIN-NEXT: slli a0, a0, 38445; ZVFHMIN-NEXT: mv a1, a08446; ZVFHMIN-NEXT: slli a0, a0, 18447; ZVFHMIN-NEXT: add a0, a0, a18448; ZVFHMIN-NEXT: add a0, sp, a08449; ZVFHMIN-NEXT: addi a0, a0, 168450; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload8451; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8452; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t8453; ZVFHMIN-NEXT: vmv4r.v v12, v48454; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8455; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t8456; ZVFHMIN-NEXT: csrr a0, vlenb8457; ZVFHMIN-NEXT: slli a0, a0, 58458; ZVFHMIN-NEXT: add sp, sp, a08459; ZVFHMIN-NEXT: .cfi_def_cfa sp, 168460; ZVFHMIN-NEXT: addi sp, sp, 168461; ZVFHMIN-NEXT: .cfi_def_cfa_offset 08462; ZVFHMIN-NEXT: ret8463 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 08464 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer8465 %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)8466 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %va, <vscale x 32 x half> %negvc, <vscale x 32 x i1> %m, i32 %evl)8467 ret <vscale x 32 x half> %v8468}8469 8470define <vscale x 32 x half> @vfmsub_vf_nxv32f16_unmasked(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {8471; ZVFH-LABEL: vfmsub_vf_nxv32f16_unmasked:8472; ZVFH: # %bb.0:8473; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma8474; ZVFH-NEXT: vfmsub.vf v8, fa0, v168475; ZVFH-NEXT: ret8476;8477; ZVFHMIN-LABEL: vfmsub_vf_nxv32f16_unmasked:8478; ZVFHMIN: # %bb.0:8479; ZVFHMIN-NEXT: addi sp, sp, -168480; ZVFHMIN-NEXT: .cfi_def_cfa_offset 168481; ZVFHMIN-NEXT: csrr a1, vlenb8482; ZVFHMIN-NEXT: slli a1, a1, 38483; ZVFHMIN-NEXT: mv a2, a18484; ZVFHMIN-NEXT: slli a1, a1, 28485; ZVFHMIN-NEXT: add a1, a1, a28486; ZVFHMIN-NEXT: sub sp, sp, a18487; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb8488; ZVFHMIN-NEXT: vsetvli a1, zero, e8, m4, ta, ma8489; ZVFHMIN-NEXT: vmv8r.v v24, v88490; ZVFHMIN-NEXT: fmv.x.h a2, fa08491; ZVFHMIN-NEXT: lui a1, 88492; ZVFHMIN-NEXT: vmset.m v88493; ZVFHMIN-NEXT: csrr a3, vlenb8494; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma8495; ZVFHMIN-NEXT: vxor.vx v16, v16, a18496; ZVFHMIN-NEXT: slli a1, a3, 18497; ZVFHMIN-NEXT: srli a3, a3, 28498; ZVFHMIN-NEXT: sub a4, a0, a18499; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma8500; ZVFHMIN-NEXT: vslidedown.vx v0, v8, a38501; ZVFHMIN-NEXT: sltu a3, a0, a48502; ZVFHMIN-NEXT: addi a3, a3, -18503; ZVFHMIN-NEXT: and a3, a3, a48504; ZVFHMIN-NEXT: csrr a4, vlenb8505; ZVFHMIN-NEXT: slli a4, a4, 38506; ZVFHMIN-NEXT: mv a5, a48507; ZVFHMIN-NEXT: slli a4, a4, 18508; ZVFHMIN-NEXT: add a4, a4, a58509; ZVFHMIN-NEXT: add a4, sp, a48510; ZVFHMIN-NEXT: addi a4, a4, 168511; ZVFHMIN-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill8512; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma8513; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t8514; ZVFHMIN-NEXT: csrr a4, vlenb8515; ZVFHMIN-NEXT: slli a4, a4, 48516; ZVFHMIN-NEXT: add a4, sp, a48517; ZVFHMIN-NEXT: addi a4, a4, 168518; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill8519; ZVFHMIN-NEXT: csrr a4, vlenb8520; ZVFHMIN-NEXT: slli a4, a4, 58521; ZVFHMIN-NEXT: add a4, sp, a48522; ZVFHMIN-NEXT: addi a4, a4, 168523; ZVFHMIN-NEXT: vs8r.v v24, (a4) # vscale x 64-byte Folded Spill8524; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t8525; ZVFHMIN-NEXT: csrr a4, vlenb8526; ZVFHMIN-NEXT: slli a4, a4, 38527; ZVFHMIN-NEXT: add a4, sp, a48528; ZVFHMIN-NEXT: addi a4, a4, 168529; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill8530; ZVFHMIN-NEXT: vsetvli a4, zero, e16, m8, ta, ma8531; ZVFHMIN-NEXT: vmv.v.x v8, a28532; ZVFHMIN-NEXT: addi a2, sp, 168533; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill8534; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma8535; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t8536; ZVFHMIN-NEXT: csrr a2, vlenb8537; ZVFHMIN-NEXT: slli a2, a2, 48538; ZVFHMIN-NEXT: add a2, sp, a28539; ZVFHMIN-NEXT: addi a2, a2, 168540; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload8541; ZVFHMIN-NEXT: csrr a2, vlenb8542; ZVFHMIN-NEXT: slli a2, a2, 38543; ZVFHMIN-NEXT: add a2, sp, a28544; ZVFHMIN-NEXT: addi a2, a2, 168545; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload8546; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8547; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v8, v0.t8548; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8549; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v24, v0.t8550; ZVFHMIN-NEXT: bltu a0, a1, .LBB284_28551; ZVFHMIN-NEXT: # %bb.1:8552; ZVFHMIN-NEXT: mv a0, a18553; ZVFHMIN-NEXT: .LBB284_2:8554; ZVFHMIN-NEXT: csrr a1, vlenb8555; ZVFHMIN-NEXT: slli a1, a1, 38556; ZVFHMIN-NEXT: mv a2, a18557; ZVFHMIN-NEXT: slli a1, a1, 18558; ZVFHMIN-NEXT: add a1, a1, a28559; ZVFHMIN-NEXT: add a1, sp, a18560; ZVFHMIN-NEXT: addi a1, a1, 168561; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload8562; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma8563; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v248564; ZVFHMIN-NEXT: csrr a0, vlenb8565; ZVFHMIN-NEXT: slli a0, a0, 48566; ZVFHMIN-NEXT: add a0, sp, a08567; ZVFHMIN-NEXT: addi a0, a0, 168568; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill8569; ZVFHMIN-NEXT: csrr a0, vlenb8570; ZVFHMIN-NEXT: slli a0, a0, 58571; ZVFHMIN-NEXT: add a0, sp, a08572; ZVFHMIN-NEXT: addi a0, a0, 168573; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload8574; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v248575; ZVFHMIN-NEXT: addi a0, sp, 168576; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8577; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v168578; ZVFHMIN-NEXT: csrr a0, vlenb8579; ZVFHMIN-NEXT: slli a0, a0, 48580; ZVFHMIN-NEXT: add a0, sp, a08581; ZVFHMIN-NEXT: addi a0, a0, 168582; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8583; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8584; ZVFHMIN-NEXT: vfmadd.vv v24, v0, v168585; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8586; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v248587; ZVFHMIN-NEXT: csrr a0, vlenb8588; ZVFHMIN-NEXT: slli a0, a0, 38589; ZVFHMIN-NEXT: mv a1, a08590; ZVFHMIN-NEXT: slli a0, a0, 28591; ZVFHMIN-NEXT: add a0, a0, a18592; ZVFHMIN-NEXT: add sp, sp, a08593; ZVFHMIN-NEXT: .cfi_def_cfa sp, 168594; ZVFHMIN-NEXT: addi sp, sp, 168595; ZVFHMIN-NEXT: .cfi_def_cfa_offset 08596; ZVFHMIN-NEXT: ret8597 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 08598 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer8599 %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)8600 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x half> %negvc, <vscale x 32 x i1> splat (i1 true), i32 %evl)8601 ret <vscale x 32 x half> %v8602}8603 8604define <vscale x 32 x half> @vfmsub_vf_nxv32f16_unmasked_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {8605; ZVFH-LABEL: vfmsub_vf_nxv32f16_unmasked_commute:8606; ZVFH: # %bb.0:8607; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma8608; ZVFH-NEXT: vfmsub.vf v8, fa0, v168609; ZVFH-NEXT: ret8610;8611; ZVFHMIN-LABEL: vfmsub_vf_nxv32f16_unmasked_commute:8612; ZVFHMIN: # %bb.0:8613; ZVFHMIN-NEXT: addi sp, sp, -168614; ZVFHMIN-NEXT: .cfi_def_cfa_offset 168615; ZVFHMIN-NEXT: csrr a1, vlenb8616; ZVFHMIN-NEXT: slli a1, a1, 58617; ZVFHMIN-NEXT: sub sp, sp, a18618; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb8619; ZVFHMIN-NEXT: csrr a1, vlenb8620; ZVFHMIN-NEXT: slli a1, a1, 38621; ZVFHMIN-NEXT: mv a2, a18622; ZVFHMIN-NEXT: slli a1, a1, 18623; ZVFHMIN-NEXT: add a1, a1, a28624; ZVFHMIN-NEXT: add a1, sp, a18625; ZVFHMIN-NEXT: addi a1, a1, 168626; ZVFHMIN-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill8627; ZVFHMIN-NEXT: fmv.x.h a1, fa08628; ZVFHMIN-NEXT: lui a2, 88629; ZVFHMIN-NEXT: vsetvli a3, zero, e16, m8, ta, ma8630; ZVFHMIN-NEXT: vmset.m v248631; ZVFHMIN-NEXT: csrr a3, vlenb8632; ZVFHMIN-NEXT: vmv.v.x v8, a18633; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma8634; ZVFHMIN-NEXT: vxor.vx v16, v16, a28635; ZVFHMIN-NEXT: slli a1, a3, 18636; ZVFHMIN-NEXT: srli a3, a3, 28637; ZVFHMIN-NEXT: sub a2, a0, a18638; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma8639; ZVFHMIN-NEXT: vslidedown.vx v0, v24, a38640; ZVFHMIN-NEXT: sltu a3, a0, a28641; ZVFHMIN-NEXT: addi a3, a3, -18642; ZVFHMIN-NEXT: and a2, a3, a28643; ZVFHMIN-NEXT: csrr a3, vlenb8644; ZVFHMIN-NEXT: slli a3, a3, 38645; ZVFHMIN-NEXT: add a3, sp, a38646; ZVFHMIN-NEXT: addi a3, a3, 168647; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill8648; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma8649; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t8650; ZVFHMIN-NEXT: addi a2, sp, 168651; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill8652; ZVFHMIN-NEXT: csrr a2, vlenb8653; ZVFHMIN-NEXT: slli a2, a2, 48654; ZVFHMIN-NEXT: add a2, sp, a28655; ZVFHMIN-NEXT: addi a2, a2, 168656; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill8657; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t8658; ZVFHMIN-NEXT: csrr a2, vlenb8659; ZVFHMIN-NEXT: slli a2, a2, 38660; ZVFHMIN-NEXT: mv a3, a28661; ZVFHMIN-NEXT: slli a2, a2, 18662; ZVFHMIN-NEXT: add a2, a2, a38663; ZVFHMIN-NEXT: add a2, sp, a28664; ZVFHMIN-NEXT: addi a2, a2, 168665; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload8666; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t8667; ZVFHMIN-NEXT: addi a2, sp, 168668; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload8669; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8670; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t8671; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8672; ZVFHMIN-NEXT: vfncvt.f.f.w v20, v8, v0.t8673; ZVFHMIN-NEXT: bltu a0, a1, .LBB285_28674; ZVFHMIN-NEXT: # %bb.1:8675; ZVFHMIN-NEXT: mv a0, a18676; ZVFHMIN-NEXT: .LBB285_2:8677; ZVFHMIN-NEXT: csrr a1, vlenb8678; ZVFHMIN-NEXT: slli a1, a1, 38679; ZVFHMIN-NEXT: add a1, sp, a18680; ZVFHMIN-NEXT: addi a1, a1, 168681; ZVFHMIN-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload8682; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma8683; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v88684; ZVFHMIN-NEXT: addi a0, sp, 168685; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill8686; ZVFHMIN-NEXT: csrr a0, vlenb8687; ZVFHMIN-NEXT: slli a0, a0, 38688; ZVFHMIN-NEXT: mv a1, a08689; ZVFHMIN-NEXT: slli a0, a0, 18690; ZVFHMIN-NEXT: add a0, a0, a18691; ZVFHMIN-NEXT: add a0, sp, a08692; ZVFHMIN-NEXT: addi a0, a0, 168693; ZVFHMIN-NEXT: vl8r.v v0, (a0) # vscale x 64-byte Folded Reload8694; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v08695; ZVFHMIN-NEXT: csrr a0, vlenb8696; ZVFHMIN-NEXT: slli a0, a0, 48697; ZVFHMIN-NEXT: add a0, sp, a08698; ZVFHMIN-NEXT: addi a0, a0, 168699; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload8700; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v88701; ZVFHMIN-NEXT: addi a0, sp, 168702; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload8703; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8704; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v88705; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8706; ZVFHMIN-NEXT: vfncvt.f.f.w v16, v08707; ZVFHMIN-NEXT: vmv8r.v v8, v168708; ZVFHMIN-NEXT: csrr a0, vlenb8709; ZVFHMIN-NEXT: slli a0, a0, 58710; ZVFHMIN-NEXT: add sp, sp, a08711; ZVFHMIN-NEXT: .cfi_def_cfa sp, 168712; ZVFHMIN-NEXT: addi sp, sp, 168713; ZVFHMIN-NEXT: .cfi_def_cfa_offset 08714; ZVFHMIN-NEXT: ret8715 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 08716 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer8717 %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)8718 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %va, <vscale x 32 x half> %negvc, <vscale x 32 x i1> splat (i1 true), i32 %evl)8719 ret <vscale x 32 x half> %v8720}8721 8722define <vscale x 32 x half> @vfnmadd_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {8723; ZVFH-LABEL: vfnmadd_vv_nxv32f16:8724; ZVFH: # %bb.0:8725; ZVFH-NEXT: vl8re16.v v24, (a0)8726; ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma8727; ZVFH-NEXT: vfnmadd.vv v16, v8, v24, v0.t8728; ZVFH-NEXT: vmv.v.v v8, v168729; ZVFH-NEXT: ret8730;8731; ZVFHMIN-LABEL: vfnmadd_vv_nxv32f16:8732; ZVFHMIN: # %bb.0:8733; ZVFHMIN-NEXT: addi sp, sp, -168734; ZVFHMIN-NEXT: .cfi_def_cfa_offset 168735; ZVFHMIN-NEXT: csrr a2, vlenb8736; ZVFHMIN-NEXT: slli a2, a2, 58737; ZVFHMIN-NEXT: sub sp, sp, a28738; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb8739; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma8740; ZVFHMIN-NEXT: vmv1r.v v3, v08741; ZVFHMIN-NEXT: csrr a2, vlenb8742; ZVFHMIN-NEXT: slli a2, a2, 38743; ZVFHMIN-NEXT: mv a3, a28744; ZVFHMIN-NEXT: slli a2, a2, 18745; ZVFHMIN-NEXT: add a2, a2, a38746; ZVFHMIN-NEXT: add a2, sp, a28747; ZVFHMIN-NEXT: addi a2, a2, 168748; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill8749; ZVFHMIN-NEXT: vl8re16.v v8, (a0)8750; ZVFHMIN-NEXT: csrr a0, vlenb8751; ZVFHMIN-NEXT: slli a0, a0, 48752; ZVFHMIN-NEXT: add a0, sp, a08753; ZVFHMIN-NEXT: addi a0, a0, 168754; ZVFHMIN-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill8755; ZVFHMIN-NEXT: lui a2, 88756; ZVFHMIN-NEXT: csrr a3, vlenb8757; ZVFHMIN-NEXT: vxor.vx v8, v16, a2, v0.t8758; ZVFHMIN-NEXT: slli a0, a3, 18759; ZVFHMIN-NEXT: srli a3, a3, 28760; ZVFHMIN-NEXT: sub a4, a1, a08761; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma8762; ZVFHMIN-NEXT: vslidedown.vx v6, v0, a38763; ZVFHMIN-NEXT: sltu a3, a1, a48764; ZVFHMIN-NEXT: csrr a5, vlenb8765; ZVFHMIN-NEXT: slli a5, a5, 48766; ZVFHMIN-NEXT: add a5, sp, a58767; ZVFHMIN-NEXT: addi a5, a5, 168768; ZVFHMIN-NEXT: vl8r.v v24, (a5) # vscale x 64-byte Folded Reload8769; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma8770; ZVFHMIN-NEXT: vxor.vx v24, v24, a2, v0.t8771; ZVFHMIN-NEXT: addi a3, a3, -18772; ZVFHMIN-NEXT: and a3, a3, a48773; ZVFHMIN-NEXT: vmv1r.v v0, v68774; ZVFHMIN-NEXT: csrr a2, vlenb8775; ZVFHMIN-NEXT: slli a2, a2, 38776; ZVFHMIN-NEXT: add a2, sp, a28777; ZVFHMIN-NEXT: addi a2, a2, 168778; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill8779; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma8780; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v28, v0.t8781; ZVFHMIN-NEXT: addi a2, sp, 168782; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill8783; ZVFHMIN-NEXT: csrr a2, vlenb8784; ZVFHMIN-NEXT: slli a2, a2, 48785; ZVFHMIN-NEXT: add a2, sp, a28786; ZVFHMIN-NEXT: addi a2, a2, 168787; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill8788; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t8789; ZVFHMIN-NEXT: csrr a2, vlenb8790; ZVFHMIN-NEXT: slli a2, a2, 38791; ZVFHMIN-NEXT: mv a3, a28792; ZVFHMIN-NEXT: slli a2, a2, 18793; ZVFHMIN-NEXT: add a2, a2, a38794; ZVFHMIN-NEXT: add a2, sp, a28795; ZVFHMIN-NEXT: addi a2, a2, 168796; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload8797; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t8798; ZVFHMIN-NEXT: addi a2, sp, 168799; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload8800; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8801; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t8802; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8803; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v24, v0.t8804; ZVFHMIN-NEXT: bltu a1, a0, .LBB286_28805; ZVFHMIN-NEXT: # %bb.1:8806; ZVFHMIN-NEXT: mv a1, a08807; ZVFHMIN-NEXT: .LBB286_2:8808; ZVFHMIN-NEXT: vmv1r.v v0, v38809; ZVFHMIN-NEXT: csrr a0, vlenb8810; ZVFHMIN-NEXT: slli a0, a0, 48811; ZVFHMIN-NEXT: add a0, sp, a08812; ZVFHMIN-NEXT: addi a0, a0, 168813; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8814; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m4, ta, ma8815; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t8816; ZVFHMIN-NEXT: addi a0, sp, 168817; ZVFHMIN-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill8818; ZVFHMIN-NEXT: csrr a0, vlenb8819; ZVFHMIN-NEXT: slli a0, a0, 38820; ZVFHMIN-NEXT: add a0, sp, a08821; ZVFHMIN-NEXT: addi a0, a0, 168822; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8823; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t8824; ZVFHMIN-NEXT: csrr a0, vlenb8825; ZVFHMIN-NEXT: slli a0, a0, 48826; ZVFHMIN-NEXT: add a0, sp, a08827; ZVFHMIN-NEXT: addi a0, a0, 168828; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill8829; ZVFHMIN-NEXT: csrr a0, vlenb8830; ZVFHMIN-NEXT: slli a0, a0, 38831; ZVFHMIN-NEXT: mv a1, a08832; ZVFHMIN-NEXT: slli a0, a0, 18833; ZVFHMIN-NEXT: add a0, a0, a18834; ZVFHMIN-NEXT: add a0, sp, a08835; ZVFHMIN-NEXT: addi a0, a0, 168836; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8837; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t8838; ZVFHMIN-NEXT: csrr a0, vlenb8839; ZVFHMIN-NEXT: slli a0, a0, 48840; ZVFHMIN-NEXT: add a0, sp, a08841; ZVFHMIN-NEXT: addi a0, a0, 168842; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8843; ZVFHMIN-NEXT: addi a0, sp, 168844; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload8845; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8846; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t8847; ZVFHMIN-NEXT: vmv4r.v v12, v48848; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8849; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v24, v0.t8850; ZVFHMIN-NEXT: csrr a0, vlenb8851; ZVFHMIN-NEXT: slli a0, a0, 58852; ZVFHMIN-NEXT: add sp, sp, a08853; ZVFHMIN-NEXT: .cfi_def_cfa sp, 168854; ZVFHMIN-NEXT: addi sp, sp, 168855; ZVFHMIN-NEXT: .cfi_def_cfa_offset 08856; ZVFHMIN-NEXT: ret8857 %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> %m, i32 %evl)8858 %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 %evl)8859 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negb, <vscale x 32 x half> %negc, <vscale x 32 x i1> %m, i32 %evl)8860 ret <vscale x 32 x half> %v8861}8862 8863define <vscale x 32 x half> @vfnmadd_vv_nxv32f16_commuted(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {8864; ZVFH-LABEL: vfnmadd_vv_nxv32f16_commuted:8865; ZVFH: # %bb.0:8866; ZVFH-NEXT: vl8re16.v v24, (a0)8867; ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma8868; ZVFH-NEXT: vfnmadd.vv v8, v16, v24, v0.t8869; ZVFH-NEXT: ret8870;8871; ZVFHMIN-LABEL: vfnmadd_vv_nxv32f16_commuted:8872; ZVFHMIN: # %bb.0:8873; ZVFHMIN-NEXT: addi sp, sp, -168874; ZVFHMIN-NEXT: .cfi_def_cfa_offset 168875; ZVFHMIN-NEXT: csrr a2, vlenb8876; ZVFHMIN-NEXT: slli a2, a2, 58877; ZVFHMIN-NEXT: sub sp, sp, a28878; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb8879; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma8880; ZVFHMIN-NEXT: vmv1r.v v3, v08881; ZVFHMIN-NEXT: csrr a2, vlenb8882; ZVFHMIN-NEXT: slli a2, a2, 38883; ZVFHMIN-NEXT: mv a3, a28884; ZVFHMIN-NEXT: slli a2, a2, 18885; ZVFHMIN-NEXT: add a2, a2, a38886; ZVFHMIN-NEXT: add a2, sp, a28887; ZVFHMIN-NEXT: addi a2, a2, 168888; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill8889; ZVFHMIN-NEXT: vl8re16.v v8, (a0)8890; ZVFHMIN-NEXT: lui a2, 88891; ZVFHMIN-NEXT: csrr a3, vlenb8892; ZVFHMIN-NEXT: vxor.vx v16, v16, a2, v0.t8893; ZVFHMIN-NEXT: slli a0, a3, 18894; ZVFHMIN-NEXT: srli a3, a3, 28895; ZVFHMIN-NEXT: sub a4, a1, a08896; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma8897; ZVFHMIN-NEXT: vslidedown.vx v6, v0, a38898; ZVFHMIN-NEXT: sltu a3, a1, a48899; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma8900; ZVFHMIN-NEXT: vxor.vx v8, v8, a2, v0.t8901; ZVFHMIN-NEXT: addi a3, a3, -18902; ZVFHMIN-NEXT: and a3, a3, a48903; ZVFHMIN-NEXT: vmv1r.v v0, v68904; ZVFHMIN-NEXT: csrr a2, vlenb8905; ZVFHMIN-NEXT: slli a2, a2, 38906; ZVFHMIN-NEXT: add a2, sp, a28907; ZVFHMIN-NEXT: addi a2, a2, 168908; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill8909; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma8910; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t8911; ZVFHMIN-NEXT: addi a2, sp, 168912; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill8913; ZVFHMIN-NEXT: csrr a2, vlenb8914; ZVFHMIN-NEXT: slli a2, a2, 48915; ZVFHMIN-NEXT: add a2, sp, a28916; ZVFHMIN-NEXT: addi a2, a2, 168917; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill8918; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t8919; ZVFHMIN-NEXT: csrr a2, vlenb8920; ZVFHMIN-NEXT: slli a2, a2, 38921; ZVFHMIN-NEXT: mv a3, a28922; ZVFHMIN-NEXT: slli a2, a2, 18923; ZVFHMIN-NEXT: add a2, a2, a38924; ZVFHMIN-NEXT: add a2, sp, a28925; ZVFHMIN-NEXT: addi a2, a2, 168926; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload8927; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t8928; ZVFHMIN-NEXT: addi a2, sp, 168929; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload8930; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8931; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t8932; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8933; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v16, v0.t8934; ZVFHMIN-NEXT: bltu a1, a0, .LBB287_28935; ZVFHMIN-NEXT: # %bb.1:8936; ZVFHMIN-NEXT: mv a1, a08937; ZVFHMIN-NEXT: .LBB287_2:8938; ZVFHMIN-NEXT: vmv1r.v v0, v38939; ZVFHMIN-NEXT: csrr a0, vlenb8940; ZVFHMIN-NEXT: slli a0, a0, 48941; ZVFHMIN-NEXT: add a0, sp, a08942; ZVFHMIN-NEXT: addi a0, a0, 168943; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload8944; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m4, ta, ma8945; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t8946; ZVFHMIN-NEXT: addi a0, sp, 168947; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill8948; ZVFHMIN-NEXT: csrr a0, vlenb8949; ZVFHMIN-NEXT: slli a0, a0, 38950; ZVFHMIN-NEXT: add a0, sp, a08951; ZVFHMIN-NEXT: addi a0, a0, 168952; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload8953; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t8954; ZVFHMIN-NEXT: csrr a0, vlenb8955; ZVFHMIN-NEXT: slli a0, a0, 48956; ZVFHMIN-NEXT: add a0, sp, a08957; ZVFHMIN-NEXT: addi a0, a0, 168958; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill8959; ZVFHMIN-NEXT: csrr a0, vlenb8960; ZVFHMIN-NEXT: slli a0, a0, 38961; ZVFHMIN-NEXT: mv a1, a08962; ZVFHMIN-NEXT: slli a0, a0, 18963; ZVFHMIN-NEXT: add a0, a0, a18964; ZVFHMIN-NEXT: add a0, sp, a08965; ZVFHMIN-NEXT: addi a0, a0, 168966; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8967; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t8968; ZVFHMIN-NEXT: addi a0, sp, 168969; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload8970; ZVFHMIN-NEXT: csrr a0, vlenb8971; ZVFHMIN-NEXT: slli a0, a0, 48972; ZVFHMIN-NEXT: add a0, sp, a08973; ZVFHMIN-NEXT: addi a0, a0, 168974; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload8975; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma8976; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t8977; ZVFHMIN-NEXT: vmv.v.v v16, v88978; ZVFHMIN-NEXT: vmv4r.v v12, v48979; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma8980; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t8981; ZVFHMIN-NEXT: csrr a0, vlenb8982; ZVFHMIN-NEXT: slli a0, a0, 58983; ZVFHMIN-NEXT: add sp, sp, a08984; ZVFHMIN-NEXT: .cfi_def_cfa sp, 168985; ZVFHMIN-NEXT: addi sp, sp, 168986; ZVFHMIN-NEXT: .cfi_def_cfa_offset 08987; ZVFHMIN-NEXT: ret8988 %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> %m, i32 %evl)8989 %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 %evl)8990 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negb, <vscale x 32 x half> %va, <vscale x 32 x half> %negc, <vscale x 32 x i1> %m, i32 %evl)8991 ret <vscale x 32 x half> %v8992}8993 8994define <vscale x 32 x half> @vfnmadd_vv_nxv32f16_unmasked(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, i32 zeroext %evl) {8995; ZVFH-LABEL: vfnmadd_vv_nxv32f16_unmasked:8996; ZVFH: # %bb.0:8997; ZVFH-NEXT: vl8re16.v v24, (a0)8998; ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma8999; ZVFH-NEXT: vfnmadd.vv v8, v16, v249000; ZVFH-NEXT: ret9001;9002; ZVFHMIN-LABEL: vfnmadd_vv_nxv32f16_unmasked:9003; ZVFHMIN: # %bb.0:9004; ZVFHMIN-NEXT: addi sp, sp, -169005; ZVFHMIN-NEXT: .cfi_def_cfa_offset 169006; ZVFHMIN-NEXT: csrr a2, vlenb9007; ZVFHMIN-NEXT: slli a2, a2, 59008; ZVFHMIN-NEXT: sub sp, sp, a29009; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb9010; ZVFHMIN-NEXT: csrr a2, vlenb9011; ZVFHMIN-NEXT: slli a2, a2, 39012; ZVFHMIN-NEXT: mv a3, a29013; ZVFHMIN-NEXT: slli a2, a2, 19014; ZVFHMIN-NEXT: add a2, a2, a39015; ZVFHMIN-NEXT: add a2, sp, a29016; ZVFHMIN-NEXT: addi a2, a2, 169017; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill9018; ZVFHMIN-NEXT: vl8re16.v v24, (a0)9019; ZVFHMIN-NEXT: lui a2, 89020; ZVFHMIN-NEXT: vsetvli a0, zero, e8, m4, ta, ma9021; ZVFHMIN-NEXT: vmset.m v89022; ZVFHMIN-NEXT: csrr a3, vlenb9023; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma9024; ZVFHMIN-NEXT: vxor.vx v16, v16, a29025; ZVFHMIN-NEXT: slli a0, a3, 19026; ZVFHMIN-NEXT: srli a3, a3, 29027; ZVFHMIN-NEXT: sub a4, a1, a09028; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma9029; ZVFHMIN-NEXT: vslidedown.vx v0, v8, a39030; ZVFHMIN-NEXT: sltu a3, a1, a49031; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma9032; ZVFHMIN-NEXT: vxor.vx v8, v24, a29033; ZVFHMIN-NEXT: addi a3, a3, -19034; ZVFHMIN-NEXT: and a3, a3, a49035; ZVFHMIN-NEXT: csrr a2, vlenb9036; ZVFHMIN-NEXT: slli a2, a2, 39037; ZVFHMIN-NEXT: add a2, sp, a29038; ZVFHMIN-NEXT: addi a2, a2, 169039; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill9040; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma9041; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t9042; ZVFHMIN-NEXT: addi a2, sp, 169043; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill9044; ZVFHMIN-NEXT: csrr a2, vlenb9045; ZVFHMIN-NEXT: slli a2, a2, 49046; ZVFHMIN-NEXT: add a2, sp, a29047; ZVFHMIN-NEXT: addi a2, a2, 169048; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill9049; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t9050; ZVFHMIN-NEXT: csrr a2, vlenb9051; ZVFHMIN-NEXT: slli a2, a2, 39052; ZVFHMIN-NEXT: mv a3, a29053; ZVFHMIN-NEXT: slli a2, a2, 19054; ZVFHMIN-NEXT: add a2, a2, a39055; ZVFHMIN-NEXT: add a2, sp, a29056; ZVFHMIN-NEXT: addi a2, a2, 169057; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload9058; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t9059; ZVFHMIN-NEXT: addi a2, sp, 169060; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload9061; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9062; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t9063; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9064; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v24, v0.t9065; ZVFHMIN-NEXT: bltu a1, a0, .LBB288_29066; ZVFHMIN-NEXT: # %bb.1:9067; ZVFHMIN-NEXT: mv a1, a09068; ZVFHMIN-NEXT: .LBB288_2:9069; ZVFHMIN-NEXT: csrr a0, vlenb9070; ZVFHMIN-NEXT: slli a0, a0, 49071; ZVFHMIN-NEXT: add a0, sp, a09072; ZVFHMIN-NEXT: addi a0, a0, 169073; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9074; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m4, ta, ma9075; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v169076; ZVFHMIN-NEXT: addi a0, sp, 169077; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill9078; ZVFHMIN-NEXT: csrr a0, vlenb9079; ZVFHMIN-NEXT: slli a0, a0, 39080; ZVFHMIN-NEXT: add a0, sp, a09081; ZVFHMIN-NEXT: addi a0, a0, 169082; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9083; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v169084; ZVFHMIN-NEXT: csrr a0, vlenb9085; ZVFHMIN-NEXT: slli a0, a0, 39086; ZVFHMIN-NEXT: mv a1, a09087; ZVFHMIN-NEXT: slli a0, a0, 19088; ZVFHMIN-NEXT: add a0, a0, a19089; ZVFHMIN-NEXT: add a0, sp, a09090; ZVFHMIN-NEXT: addi a0, a0, 169091; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload9092; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v249093; ZVFHMIN-NEXT: addi a0, sp, 169094; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload9095; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9096; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v09097; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9098; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v169099; ZVFHMIN-NEXT: csrr a0, vlenb9100; ZVFHMIN-NEXT: slli a0, a0, 59101; ZVFHMIN-NEXT: add sp, sp, a09102; ZVFHMIN-NEXT: .cfi_def_cfa sp, 169103; ZVFHMIN-NEXT: addi sp, sp, 169104; ZVFHMIN-NEXT: .cfi_def_cfa_offset 09105; ZVFHMIN-NEXT: ret9106 %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)9107 %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)9108 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negb, <vscale x 32 x half> %negc, <vscale x 32 x i1> splat (i1 true), i32 %evl)9109 ret <vscale x 32 x half> %v9110}9111 9112define <vscale x 32 x half> @vfnmadd_vv_nxv32f16_unmasked_commuted(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, i32 zeroext %evl) {9113; ZVFH-LABEL: vfnmadd_vv_nxv32f16_unmasked_commuted:9114; ZVFH: # %bb.0:9115; ZVFH-NEXT: vl8re16.v v24, (a0)9116; ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma9117; ZVFH-NEXT: vfnmadd.vv v8, v16, v249118; ZVFH-NEXT: ret9119;9120; ZVFHMIN-LABEL: vfnmadd_vv_nxv32f16_unmasked_commuted:9121; ZVFHMIN: # %bb.0:9122; ZVFHMIN-NEXT: addi sp, sp, -169123; ZVFHMIN-NEXT: .cfi_def_cfa_offset 169124; ZVFHMIN-NEXT: csrr a2, vlenb9125; ZVFHMIN-NEXT: slli a2, a2, 59126; ZVFHMIN-NEXT: sub sp, sp, a29127; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb9128; ZVFHMIN-NEXT: csrr a2, vlenb9129; ZVFHMIN-NEXT: slli a2, a2, 39130; ZVFHMIN-NEXT: mv a3, a29131; ZVFHMIN-NEXT: slli a2, a2, 19132; ZVFHMIN-NEXT: add a2, a2, a39133; ZVFHMIN-NEXT: add a2, sp, a29134; ZVFHMIN-NEXT: addi a2, a2, 169135; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill9136; ZVFHMIN-NEXT: vl8re16.v v24, (a0)9137; ZVFHMIN-NEXT: lui a2, 89138; ZVFHMIN-NEXT: vsetvli a0, zero, e8, m4, ta, ma9139; ZVFHMIN-NEXT: vmset.m v89140; ZVFHMIN-NEXT: csrr a3, vlenb9141; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma9142; ZVFHMIN-NEXT: vxor.vx v16, v16, a29143; ZVFHMIN-NEXT: slli a0, a3, 19144; ZVFHMIN-NEXT: srli a3, a3, 29145; ZVFHMIN-NEXT: sub a4, a1, a09146; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma9147; ZVFHMIN-NEXT: vslidedown.vx v0, v8, a39148; ZVFHMIN-NEXT: sltu a3, a1, a49149; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma9150; ZVFHMIN-NEXT: vxor.vx v8, v24, a29151; ZVFHMIN-NEXT: addi a3, a3, -19152; ZVFHMIN-NEXT: and a3, a3, a49153; ZVFHMIN-NEXT: csrr a2, vlenb9154; ZVFHMIN-NEXT: slli a2, a2, 39155; ZVFHMIN-NEXT: add a2, sp, a29156; ZVFHMIN-NEXT: addi a2, a2, 169157; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill9158; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma9159; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t9160; ZVFHMIN-NEXT: addi a2, sp, 169161; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill9162; ZVFHMIN-NEXT: csrr a2, vlenb9163; ZVFHMIN-NEXT: slli a2, a2, 49164; ZVFHMIN-NEXT: add a2, sp, a29165; ZVFHMIN-NEXT: addi a2, a2, 169166; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill9167; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t9168; ZVFHMIN-NEXT: csrr a2, vlenb9169; ZVFHMIN-NEXT: slli a2, a2, 39170; ZVFHMIN-NEXT: mv a3, a29171; ZVFHMIN-NEXT: slli a2, a2, 19172; ZVFHMIN-NEXT: add a2, a2, a39173; ZVFHMIN-NEXT: add a2, sp, a29174; ZVFHMIN-NEXT: addi a2, a2, 169175; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload9176; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t9177; ZVFHMIN-NEXT: addi a2, sp, 169178; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload9179; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9180; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t9181; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9182; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16, v0.t9183; ZVFHMIN-NEXT: bltu a1, a0, .LBB289_29184; ZVFHMIN-NEXT: # %bb.1:9185; ZVFHMIN-NEXT: mv a1, a09186; ZVFHMIN-NEXT: .LBB289_2:9187; ZVFHMIN-NEXT: csrr a0, vlenb9188; ZVFHMIN-NEXT: slli a0, a0, 49189; ZVFHMIN-NEXT: add a0, sp, a09190; ZVFHMIN-NEXT: addi a0, a0, 169191; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9192; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m4, ta, ma9193; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v169194; ZVFHMIN-NEXT: addi a0, sp, 169195; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill9196; ZVFHMIN-NEXT: csrr a0, vlenb9197; ZVFHMIN-NEXT: slli a0, a0, 39198; ZVFHMIN-NEXT: add a0, sp, a09199; ZVFHMIN-NEXT: addi a0, a0, 169200; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9201; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v169202; ZVFHMIN-NEXT: csrr a0, vlenb9203; ZVFHMIN-NEXT: slli a0, a0, 39204; ZVFHMIN-NEXT: mv a1, a09205; ZVFHMIN-NEXT: slli a0, a0, 19206; ZVFHMIN-NEXT: add a0, a0, a19207; ZVFHMIN-NEXT: add a0, sp, a09208; ZVFHMIN-NEXT: addi a0, a0, 169209; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9210; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v169211; ZVFHMIN-NEXT: addi a0, sp, 169212; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9213; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9214; ZVFHMIN-NEXT: vfmadd.vv v0, v16, v249215; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9216; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v09217; ZVFHMIN-NEXT: csrr a0, vlenb9218; ZVFHMIN-NEXT: slli a0, a0, 59219; ZVFHMIN-NEXT: add sp, sp, a09220; ZVFHMIN-NEXT: .cfi_def_cfa sp, 169221; ZVFHMIN-NEXT: addi sp, sp, 169222; ZVFHMIN-NEXT: .cfi_def_cfa_offset 09223; ZVFHMIN-NEXT: ret9224 %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)9225 %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)9226 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negb, <vscale x 32 x half> %va, <vscale x 32 x half> %negc, <vscale x 32 x i1> splat (i1 true), i32 %evl)9227 ret <vscale x 32 x half> %v9228}9229 9230define <vscale x 32 x half> @vfnmadd_vf_nxv32f16(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {9231; ZVFH-LABEL: vfnmadd_vf_nxv32f16:9232; ZVFH: # %bb.0:9233; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma9234; ZVFH-NEXT: vfnmadd.vf v8, fa0, v16, v0.t9235; ZVFH-NEXT: ret9236;9237; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16:9238; ZVFHMIN: # %bb.0:9239; ZVFHMIN-NEXT: addi sp, sp, -169240; ZVFHMIN-NEXT: .cfi_def_cfa_offset 169241; ZVFHMIN-NEXT: csrr a1, vlenb9242; ZVFHMIN-NEXT: slli a1, a1, 59243; ZVFHMIN-NEXT: sub sp, sp, a19244; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb9245; ZVFHMIN-NEXT: vsetvli a1, zero, e16, m8, ta, ma9246; ZVFHMIN-NEXT: vmv1r.v v3, v09247; ZVFHMIN-NEXT: fmv.x.h a1, fa09248; ZVFHMIN-NEXT: lui a2, 89249; ZVFHMIN-NEXT: csrr a3, vlenb9250; ZVFHMIN-NEXT: vmv.v.x v24, a19251; ZVFHMIN-NEXT: csrr a1, vlenb9252; ZVFHMIN-NEXT: slli a1, a1, 39253; ZVFHMIN-NEXT: mv a4, a19254; ZVFHMIN-NEXT: slli a1, a1, 19255; ZVFHMIN-NEXT: add a1, a1, a49256; ZVFHMIN-NEXT: add a1, sp, a19257; ZVFHMIN-NEXT: addi a1, a1, 169258; ZVFHMIN-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill9259; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma9260; ZVFHMIN-NEXT: vxor.vx v8, v8, a2, v0.t9261; ZVFHMIN-NEXT: vxor.vx v16, v16, a2, v0.t9262; ZVFHMIN-NEXT: slli a1, a3, 19263; ZVFHMIN-NEXT: srli a3, a3, 29264; ZVFHMIN-NEXT: sub a2, a0, a19265; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma9266; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a39267; ZVFHMIN-NEXT: sltu a3, a0, a29268; ZVFHMIN-NEXT: addi a3, a3, -19269; ZVFHMIN-NEXT: and a2, a3, a29270; ZVFHMIN-NEXT: csrr a3, vlenb9271; ZVFHMIN-NEXT: slli a3, a3, 39272; ZVFHMIN-NEXT: add a3, sp, a39273; ZVFHMIN-NEXT: addi a3, a3, 169274; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill9275; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma9276; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t9277; ZVFHMIN-NEXT: addi a2, sp, 169278; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill9279; ZVFHMIN-NEXT: csrr a2, vlenb9280; ZVFHMIN-NEXT: slli a2, a2, 49281; ZVFHMIN-NEXT: add a2, sp, a29282; ZVFHMIN-NEXT: addi a2, a2, 169283; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill9284; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t9285; ZVFHMIN-NEXT: csrr a2, vlenb9286; ZVFHMIN-NEXT: slli a2, a2, 39287; ZVFHMIN-NEXT: mv a3, a29288; ZVFHMIN-NEXT: slli a2, a2, 19289; ZVFHMIN-NEXT: add a2, a2, a39290; ZVFHMIN-NEXT: add a2, sp, a29291; ZVFHMIN-NEXT: addi a2, a2, 169292; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload9293; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t9294; ZVFHMIN-NEXT: addi a2, sp, 169295; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload9296; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9297; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t9298; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9299; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v16, v0.t9300; ZVFHMIN-NEXT: bltu a0, a1, .LBB290_29301; ZVFHMIN-NEXT: # %bb.1:9302; ZVFHMIN-NEXT: mv a0, a19303; ZVFHMIN-NEXT: .LBB290_2:9304; ZVFHMIN-NEXT: vmv1r.v v0, v39305; ZVFHMIN-NEXT: csrr a1, vlenb9306; ZVFHMIN-NEXT: slli a1, a1, 39307; ZVFHMIN-NEXT: add a1, sp, a19308; ZVFHMIN-NEXT: addi a1, a1, 169309; ZVFHMIN-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload9310; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma9311; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t9312; ZVFHMIN-NEXT: addi a0, sp, 169313; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill9314; ZVFHMIN-NEXT: csrr a0, vlenb9315; ZVFHMIN-NEXT: slli a0, a0, 49316; ZVFHMIN-NEXT: add a0, sp, a09317; ZVFHMIN-NEXT: addi a0, a0, 169318; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload9319; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t9320; ZVFHMIN-NEXT: csrr a0, vlenb9321; ZVFHMIN-NEXT: slli a0, a0, 39322; ZVFHMIN-NEXT: add a0, sp, a09323; ZVFHMIN-NEXT: addi a0, a0, 169324; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill9325; ZVFHMIN-NEXT: csrr a0, vlenb9326; ZVFHMIN-NEXT: slli a0, a0, 39327; ZVFHMIN-NEXT: mv a1, a09328; ZVFHMIN-NEXT: slli a0, a0, 19329; ZVFHMIN-NEXT: add a0, a0, a19330; ZVFHMIN-NEXT: add a0, sp, a09331; ZVFHMIN-NEXT: addi a0, a0, 169332; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9333; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t9334; ZVFHMIN-NEXT: addi a0, sp, 169335; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9336; ZVFHMIN-NEXT: csrr a0, vlenb9337; ZVFHMIN-NEXT: slli a0, a0, 39338; ZVFHMIN-NEXT: add a0, sp, a09339; ZVFHMIN-NEXT: addi a0, a0, 169340; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload9341; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9342; ZVFHMIN-NEXT: vfmadd.vv v8, v24, v16, v0.t9343; ZVFHMIN-NEXT: vmv.v.v v16, v89344; ZVFHMIN-NEXT: vmv4r.v v12, v49345; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9346; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t9347; ZVFHMIN-NEXT: csrr a0, vlenb9348; ZVFHMIN-NEXT: slli a0, a0, 59349; ZVFHMIN-NEXT: add sp, sp, a09350; ZVFHMIN-NEXT: .cfi_def_cfa sp, 169351; ZVFHMIN-NEXT: addi sp, sp, 169352; ZVFHMIN-NEXT: .cfi_def_cfa_offset 09353; ZVFHMIN-NEXT: ret9354 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 09355 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer9356 %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> %m, i32 %evl)9357 %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)9358 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negva, <vscale x 32 x half> %vb, <vscale x 32 x half> %negvc, <vscale x 32 x i1> %m, i32 %evl)9359 ret <vscale x 32 x half> %v9360}9361 9362define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {9363; ZVFH-LABEL: vfnmadd_vf_nxv32f16_commute:9364; ZVFH: # %bb.0:9365; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma9366; ZVFH-NEXT: vfnmadd.vf v8, fa0, v16, v0.t9367; ZVFH-NEXT: ret9368;9369; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_commute:9370; ZVFHMIN: # %bb.0:9371; ZVFHMIN-NEXT: addi sp, sp, -169372; ZVFHMIN-NEXT: .cfi_def_cfa_offset 169373; ZVFHMIN-NEXT: csrr a1, vlenb9374; ZVFHMIN-NEXT: slli a1, a1, 59375; ZVFHMIN-NEXT: sub sp, sp, a19376; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb9377; ZVFHMIN-NEXT: vsetvli a1, zero, e16, m8, ta, ma9378; ZVFHMIN-NEXT: vmv1r.v v3, v09379; ZVFHMIN-NEXT: fmv.x.h a1, fa09380; ZVFHMIN-NEXT: lui a2, 89381; ZVFHMIN-NEXT: csrr a3, vlenb9382; ZVFHMIN-NEXT: vmv.v.x v24, a19383; ZVFHMIN-NEXT: csrr a1, vlenb9384; ZVFHMIN-NEXT: slli a1, a1, 39385; ZVFHMIN-NEXT: mv a4, a19386; ZVFHMIN-NEXT: slli a1, a1, 19387; ZVFHMIN-NEXT: add a1, a1, a49388; ZVFHMIN-NEXT: add a1, sp, a19389; ZVFHMIN-NEXT: addi a1, a1, 169390; ZVFHMIN-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill9391; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma9392; ZVFHMIN-NEXT: vxor.vx v8, v8, a2, v0.t9393; ZVFHMIN-NEXT: vxor.vx v16, v16, a2, v0.t9394; ZVFHMIN-NEXT: slli a1, a3, 19395; ZVFHMIN-NEXT: srli a3, a3, 29396; ZVFHMIN-NEXT: sub a2, a0, a19397; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma9398; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a39399; ZVFHMIN-NEXT: sltu a3, a0, a29400; ZVFHMIN-NEXT: addi a3, a3, -19401; ZVFHMIN-NEXT: and a2, a3, a29402; ZVFHMIN-NEXT: csrr a3, vlenb9403; ZVFHMIN-NEXT: slli a3, a3, 39404; ZVFHMIN-NEXT: add a3, sp, a39405; ZVFHMIN-NEXT: addi a3, a3, 169406; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill9407; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma9408; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t9409; ZVFHMIN-NEXT: addi a2, sp, 169410; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill9411; ZVFHMIN-NEXT: csrr a2, vlenb9412; ZVFHMIN-NEXT: slli a2, a2, 49413; ZVFHMIN-NEXT: add a2, sp, a29414; ZVFHMIN-NEXT: addi a2, a2, 169415; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill9416; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t9417; ZVFHMIN-NEXT: csrr a2, vlenb9418; ZVFHMIN-NEXT: slli a2, a2, 39419; ZVFHMIN-NEXT: mv a3, a29420; ZVFHMIN-NEXT: slli a2, a2, 19421; ZVFHMIN-NEXT: add a2, a2, a39422; ZVFHMIN-NEXT: add a2, sp, a29423; ZVFHMIN-NEXT: addi a2, a2, 169424; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload9425; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t9426; ZVFHMIN-NEXT: addi a2, sp, 169427; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload9428; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9429; ZVFHMIN-NEXT: vfmadd.vv v16, v8, v24, v0.t9430; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9431; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v16, v0.t9432; ZVFHMIN-NEXT: bltu a0, a1, .LBB291_29433; ZVFHMIN-NEXT: # %bb.1:9434; ZVFHMIN-NEXT: mv a0, a19435; ZVFHMIN-NEXT: .LBB291_2:9436; ZVFHMIN-NEXT: vmv1r.v v0, v39437; ZVFHMIN-NEXT: csrr a1, vlenb9438; ZVFHMIN-NEXT: slli a1, a1, 39439; ZVFHMIN-NEXT: add a1, sp, a19440; ZVFHMIN-NEXT: addi a1, a1, 169441; ZVFHMIN-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload9442; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma9443; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t9444; ZVFHMIN-NEXT: addi a0, sp, 169445; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill9446; ZVFHMIN-NEXT: csrr a0, vlenb9447; ZVFHMIN-NEXT: slli a0, a0, 49448; ZVFHMIN-NEXT: add a0, sp, a09449; ZVFHMIN-NEXT: addi a0, a0, 169450; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9451; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t9452; ZVFHMIN-NEXT: csrr a0, vlenb9453; ZVFHMIN-NEXT: slli a0, a0, 39454; ZVFHMIN-NEXT: mv a1, a09455; ZVFHMIN-NEXT: slli a0, a0, 19456; ZVFHMIN-NEXT: add a0, a0, a19457; ZVFHMIN-NEXT: add a0, sp, a09458; ZVFHMIN-NEXT: addi a0, a0, 169459; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9460; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t9461; ZVFHMIN-NEXT: csrr a0, vlenb9462; ZVFHMIN-NEXT: slli a0, a0, 49463; ZVFHMIN-NEXT: add a0, sp, a09464; ZVFHMIN-NEXT: addi a0, a0, 169465; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill9466; ZVFHMIN-NEXT: addi a0, sp, 169467; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9468; ZVFHMIN-NEXT: csrr a0, vlenb9469; ZVFHMIN-NEXT: slli a0, a0, 49470; ZVFHMIN-NEXT: add a0, sp, a09471; ZVFHMIN-NEXT: addi a0, a0, 169472; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload9473; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9474; ZVFHMIN-NEXT: vfmadd.vv v8, v24, v16, v0.t9475; ZVFHMIN-NEXT: vmv.v.v v16, v89476; ZVFHMIN-NEXT: vmv4r.v v12, v49477; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9478; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t9479; ZVFHMIN-NEXT: csrr a0, vlenb9480; ZVFHMIN-NEXT: slli a0, a0, 59481; ZVFHMIN-NEXT: add sp, sp, a09482; ZVFHMIN-NEXT: .cfi_def_cfa sp, 169483; ZVFHMIN-NEXT: addi sp, sp, 169484; ZVFHMIN-NEXT: .cfi_def_cfa_offset 09485; ZVFHMIN-NEXT: ret9486 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 09487 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer9488 %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> %m, i32 %evl)9489 %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)9490 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %negva, <vscale x 32 x half> %negvc, <vscale x 32 x i1> %m, i32 %evl)9491 ret <vscale x 32 x half> %v9492}9493 9494define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_unmasked(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {9495; ZVFH-LABEL: vfnmadd_vf_nxv32f16_unmasked:9496; ZVFH: # %bb.0:9497; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma9498; ZVFH-NEXT: vfnmadd.vf v8, fa0, v169499; ZVFH-NEXT: ret9500;9501; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_unmasked:9502; ZVFHMIN: # %bb.0:9503; ZVFHMIN-NEXT: addi sp, sp, -169504; ZVFHMIN-NEXT: .cfi_def_cfa_offset 169505; ZVFHMIN-NEXT: csrr a1, vlenb9506; ZVFHMIN-NEXT: slli a1, a1, 39507; ZVFHMIN-NEXT: mv a2, a19508; ZVFHMIN-NEXT: slli a1, a1, 29509; ZVFHMIN-NEXT: add a1, a1, a29510; ZVFHMIN-NEXT: sub sp, sp, a19511; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb9512; ZVFHMIN-NEXT: fmv.x.h a2, fa09513; ZVFHMIN-NEXT: lui a1, 89514; ZVFHMIN-NEXT: vsetvli a3, zero, e8, m4, ta, ma9515; ZVFHMIN-NEXT: vmset.m v79516; ZVFHMIN-NEXT: csrr a3, vlenb9517; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma9518; ZVFHMIN-NEXT: vxor.vx v24, v8, a19519; ZVFHMIN-NEXT: vxor.vx v8, v16, a19520; ZVFHMIN-NEXT: slli a1, a3, 19521; ZVFHMIN-NEXT: srli a3, a3, 29522; ZVFHMIN-NEXT: sub a4, a0, a19523; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma9524; ZVFHMIN-NEXT: vslidedown.vx v0, v7, a39525; ZVFHMIN-NEXT: sltu a3, a0, a49526; ZVFHMIN-NEXT: addi a3, a3, -19527; ZVFHMIN-NEXT: and a3, a3, a49528; ZVFHMIN-NEXT: csrr a4, vlenb9529; ZVFHMIN-NEXT: slli a4, a4, 39530; ZVFHMIN-NEXT: mv a5, a49531; ZVFHMIN-NEXT: slli a4, a4, 19532; ZVFHMIN-NEXT: add a4, a4, a59533; ZVFHMIN-NEXT: add a4, sp, a49534; ZVFHMIN-NEXT: addi a4, a4, 169535; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill9536; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma9537; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t9538; ZVFHMIN-NEXT: csrr a4, vlenb9539; ZVFHMIN-NEXT: slli a4, a4, 49540; ZVFHMIN-NEXT: add a4, sp, a49541; ZVFHMIN-NEXT: addi a4, a4, 169542; ZVFHMIN-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill9543; ZVFHMIN-NEXT: csrr a4, vlenb9544; ZVFHMIN-NEXT: slli a4, a4, 59545; ZVFHMIN-NEXT: add a4, sp, a49546; ZVFHMIN-NEXT: addi a4, a4, 169547; ZVFHMIN-NEXT: vs8r.v v24, (a4) # vscale x 64-byte Folded Spill9548; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t9549; ZVFHMIN-NEXT: csrr a4, vlenb9550; ZVFHMIN-NEXT: slli a4, a4, 39551; ZVFHMIN-NEXT: add a4, sp, a49552; ZVFHMIN-NEXT: addi a4, a4, 169553; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill9554; ZVFHMIN-NEXT: vsetvli a4, zero, e16, m8, ta, ma9555; ZVFHMIN-NEXT: vmv.v.x v8, a29556; ZVFHMIN-NEXT: addi a2, sp, 169557; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill9558; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma9559; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t9560; ZVFHMIN-NEXT: csrr a2, vlenb9561; ZVFHMIN-NEXT: slli a2, a2, 49562; ZVFHMIN-NEXT: add a2, sp, a29563; ZVFHMIN-NEXT: addi a2, a2, 169564; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload9565; ZVFHMIN-NEXT: csrr a2, vlenb9566; ZVFHMIN-NEXT: slli a2, a2, 39567; ZVFHMIN-NEXT: add a2, sp, a29568; ZVFHMIN-NEXT: addi a2, a2, 169569; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload9570; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9571; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v8, v0.t9572; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9573; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v24, v0.t9574; ZVFHMIN-NEXT: bltu a0, a1, .LBB292_29575; ZVFHMIN-NEXT: # %bb.1:9576; ZVFHMIN-NEXT: mv a0, a19577; ZVFHMIN-NEXT: .LBB292_2:9578; ZVFHMIN-NEXT: csrr a1, vlenb9579; ZVFHMIN-NEXT: slli a1, a1, 39580; ZVFHMIN-NEXT: mv a2, a19581; ZVFHMIN-NEXT: slli a1, a1, 19582; ZVFHMIN-NEXT: add a1, a1, a29583; ZVFHMIN-NEXT: add a1, sp, a19584; ZVFHMIN-NEXT: addi a1, a1, 169585; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload9586; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma9587; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v249588; ZVFHMIN-NEXT: csrr a0, vlenb9589; ZVFHMIN-NEXT: slli a0, a0, 49590; ZVFHMIN-NEXT: add a0, sp, a09591; ZVFHMIN-NEXT: addi a0, a0, 169592; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill9593; ZVFHMIN-NEXT: csrr a0, vlenb9594; ZVFHMIN-NEXT: slli a0, a0, 59595; ZVFHMIN-NEXT: add a0, sp, a09596; ZVFHMIN-NEXT: addi a0, a0, 169597; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload9598; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v249599; ZVFHMIN-NEXT: addi a0, sp, 169600; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9601; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v169602; ZVFHMIN-NEXT: csrr a0, vlenb9603; ZVFHMIN-NEXT: slli a0, a0, 49604; ZVFHMIN-NEXT: add a0, sp, a09605; ZVFHMIN-NEXT: addi a0, a0, 169606; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9607; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9608; ZVFHMIN-NEXT: vfmadd.vv v24, v0, v169609; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9610; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v249611; ZVFHMIN-NEXT: csrr a0, vlenb9612; ZVFHMIN-NEXT: slli a0, a0, 39613; ZVFHMIN-NEXT: mv a1, a09614; ZVFHMIN-NEXT: slli a0, a0, 29615; ZVFHMIN-NEXT: add a0, a0, a19616; ZVFHMIN-NEXT: add sp, sp, a09617; ZVFHMIN-NEXT: .cfi_def_cfa sp, 169618; ZVFHMIN-NEXT: addi sp, sp, 169619; ZVFHMIN-NEXT: .cfi_def_cfa_offset 09620; ZVFHMIN-NEXT: ret9621 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 09622 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer9623 %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)9624 %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)9625 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negva, <vscale x 32 x half> %vb, <vscale x 32 x half> %negvc, <vscale x 32 x i1> splat (i1 true), i32 %evl)9626 ret <vscale x 32 x half> %v9627}9628 9629define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_unmasked_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {9630; ZVFH-LABEL: vfnmadd_vf_nxv32f16_unmasked_commute:9631; ZVFH: # %bb.0:9632; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma9633; ZVFH-NEXT: vfnmadd.vf v8, fa0, v169634; ZVFH-NEXT: ret9635;9636; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_unmasked_commute:9637; ZVFHMIN: # %bb.0:9638; ZVFHMIN-NEXT: addi sp, sp, -169639; ZVFHMIN-NEXT: .cfi_def_cfa_offset 169640; ZVFHMIN-NEXT: csrr a1, vlenb9641; ZVFHMIN-NEXT: slli a1, a1, 59642; ZVFHMIN-NEXT: sub sp, sp, a19643; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb9644; ZVFHMIN-NEXT: fmv.x.h a2, fa09645; ZVFHMIN-NEXT: lui a1, 89646; ZVFHMIN-NEXT: vsetvli a3, zero, e8, m4, ta, ma9647; ZVFHMIN-NEXT: vmset.m v249648; ZVFHMIN-NEXT: csrr a3, vlenb9649; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma9650; ZVFHMIN-NEXT: vxor.vx v8, v8, a19651; ZVFHMIN-NEXT: vxor.vx v16, v16, a19652; ZVFHMIN-NEXT: slli a1, a3, 19653; ZVFHMIN-NEXT: srli a3, a3, 29654; ZVFHMIN-NEXT: sub a4, a0, a19655; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma9656; ZVFHMIN-NEXT: vslidedown.vx v0, v24, a39657; ZVFHMIN-NEXT: sltu a3, a0, a49658; ZVFHMIN-NEXT: addi a3, a3, -19659; ZVFHMIN-NEXT: and a3, a3, a49660; ZVFHMIN-NEXT: csrr a4, vlenb9661; ZVFHMIN-NEXT: slli a4, a4, 49662; ZVFHMIN-NEXT: add a4, sp, a49663; ZVFHMIN-NEXT: addi a4, a4, 169664; ZVFHMIN-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill9665; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma9666; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t9667; ZVFHMIN-NEXT: csrr a4, vlenb9668; ZVFHMIN-NEXT: slli a4, a4, 39669; ZVFHMIN-NEXT: add a4, sp, a49670; ZVFHMIN-NEXT: addi a4, a4, 169671; ZVFHMIN-NEXT: vs8r.v v24, (a4) # vscale x 64-byte Folded Spill9672; ZVFHMIN-NEXT: csrr a4, vlenb9673; ZVFHMIN-NEXT: slli a4, a4, 39674; ZVFHMIN-NEXT: mv a5, a49675; ZVFHMIN-NEXT: slli a4, a4, 19676; ZVFHMIN-NEXT: add a4, a4, a59677; ZVFHMIN-NEXT: add a4, sp, a49678; ZVFHMIN-NEXT: addi a4, a4, 169679; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill9680; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t9681; ZVFHMIN-NEXT: vsetvli a4, zero, e16, m8, ta, ma9682; ZVFHMIN-NEXT: vmv.v.x v8, a29683; ZVFHMIN-NEXT: addi a2, sp, 169684; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill9685; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma9686; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t9687; ZVFHMIN-NEXT: csrr a2, vlenb9688; ZVFHMIN-NEXT: slli a2, a2, 39689; ZVFHMIN-NEXT: add a2, sp, a29690; ZVFHMIN-NEXT: addi a2, a2, 169691; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload9692; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9693; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t9694; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9695; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16, v0.t9696; ZVFHMIN-NEXT: bltu a0, a1, .LBB293_29697; ZVFHMIN-NEXT: # %bb.1:9698; ZVFHMIN-NEXT: mv a0, a19699; ZVFHMIN-NEXT: .LBB293_2:9700; ZVFHMIN-NEXT: csrr a1, vlenb9701; ZVFHMIN-NEXT: slli a1, a1, 49702; ZVFHMIN-NEXT: add a1, sp, a19703; ZVFHMIN-NEXT: addi a1, a1, 169704; ZVFHMIN-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload9705; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma9706; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v169707; ZVFHMIN-NEXT: csrr a0, vlenb9708; ZVFHMIN-NEXT: slli a0, a0, 39709; ZVFHMIN-NEXT: add a0, sp, a09710; ZVFHMIN-NEXT: addi a0, a0, 169711; ZVFHMIN-NEXT: vs8r.v v0, (a0) # vscale x 64-byte Folded Spill9712; ZVFHMIN-NEXT: csrr a0, vlenb9713; ZVFHMIN-NEXT: slli a0, a0, 39714; ZVFHMIN-NEXT: mv a1, a09715; ZVFHMIN-NEXT: slli a0, a0, 19716; ZVFHMIN-NEXT: add a0, a0, a19717; ZVFHMIN-NEXT: add a0, sp, a09718; ZVFHMIN-NEXT: addi a0, a0, 169719; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9720; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v169721; ZVFHMIN-NEXT: addi a0, sp, 169722; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload9723; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v249724; ZVFHMIN-NEXT: csrr a0, vlenb9725; ZVFHMIN-NEXT: slli a0, a0, 39726; ZVFHMIN-NEXT: add a0, sp, a09727; ZVFHMIN-NEXT: addi a0, a0, 169728; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload9729; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9730; ZVFHMIN-NEXT: vfmadd.vv v16, v0, v249731; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9732; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v169733; ZVFHMIN-NEXT: csrr a0, vlenb9734; ZVFHMIN-NEXT: slli a0, a0, 59735; ZVFHMIN-NEXT: add sp, sp, a09736; ZVFHMIN-NEXT: .cfi_def_cfa sp, 169737; ZVFHMIN-NEXT: addi sp, sp, 169738; ZVFHMIN-NEXT: .cfi_def_cfa_offset 09739; ZVFHMIN-NEXT: ret9740 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 09741 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer9742 %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)9743 %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)9744 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %negva, <vscale x 32 x half> %negvc, <vscale x 32 x i1> splat (i1 true), i32 %evl)9745 ret <vscale x 32 x half> %v9746}9747 9748define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_neg_splat(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {9749; ZVFH-LABEL: vfnmadd_vf_nxv32f16_neg_splat:9750; ZVFH: # %bb.0:9751; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma9752; ZVFH-NEXT: vfnmadd.vf v8, fa0, v16, v0.t9753; ZVFH-NEXT: ret9754;9755; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_neg_splat:9756; ZVFHMIN: # %bb.0:9757; ZVFHMIN-NEXT: addi sp, sp, -169758; ZVFHMIN-NEXT: .cfi_def_cfa_offset 169759; ZVFHMIN-NEXT: csrr a1, vlenb9760; ZVFHMIN-NEXT: slli a1, a1, 59761; ZVFHMIN-NEXT: sub sp, sp, a19762; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb9763; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma9764; ZVFHMIN-NEXT: vmv1r.v v3, v09765; ZVFHMIN-NEXT: csrr a1, vlenb9766; ZVFHMIN-NEXT: slli a1, a1, 39767; ZVFHMIN-NEXT: mv a2, a19768; ZVFHMIN-NEXT: slli a1, a1, 19769; ZVFHMIN-NEXT: add a1, a1, a29770; ZVFHMIN-NEXT: add a1, sp, a19771; ZVFHMIN-NEXT: addi a1, a1, 169772; ZVFHMIN-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill9773; ZVFHMIN-NEXT: fmv.x.h a1, fa09774; ZVFHMIN-NEXT: lui a2, 89775; ZVFHMIN-NEXT: csrr a3, vlenb9776; ZVFHMIN-NEXT: vmv.v.x v24, a19777; ZVFHMIN-NEXT: slli a1, a3, 19778; ZVFHMIN-NEXT: srli a3, a3, 29779; ZVFHMIN-NEXT: vxor.vx v8, v24, a2, v0.t9780; ZVFHMIN-NEXT: vxor.vx v16, v16, a2, v0.t9781; ZVFHMIN-NEXT: sub a2, a0, a19782; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma9783; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a39784; ZVFHMIN-NEXT: sltu a3, a0, a29785; ZVFHMIN-NEXT: addi a3, a3, -19786; ZVFHMIN-NEXT: and a2, a3, a29787; ZVFHMIN-NEXT: csrr a3, vlenb9788; ZVFHMIN-NEXT: slli a3, a3, 39789; ZVFHMIN-NEXT: add a3, sp, a39790; ZVFHMIN-NEXT: addi a3, a3, 169791; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill9792; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma9793; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t9794; ZVFHMIN-NEXT: addi a2, sp, 169795; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill9796; ZVFHMIN-NEXT: csrr a2, vlenb9797; ZVFHMIN-NEXT: slli a2, a2, 49798; ZVFHMIN-NEXT: add a2, sp, a29799; ZVFHMIN-NEXT: addi a2, a2, 169800; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill9801; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t9802; ZVFHMIN-NEXT: csrr a2, vlenb9803; ZVFHMIN-NEXT: slli a2, a2, 39804; ZVFHMIN-NEXT: mv a3, a29805; ZVFHMIN-NEXT: slli a2, a2, 19806; ZVFHMIN-NEXT: add a2, a2, a39807; ZVFHMIN-NEXT: add a2, sp, a29808; ZVFHMIN-NEXT: addi a2, a2, 169809; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload9810; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t9811; ZVFHMIN-NEXT: addi a2, sp, 169812; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload9813; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9814; ZVFHMIN-NEXT: vfmadd.vv v16, v8, v24, v0.t9815; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9816; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v16, v0.t9817; ZVFHMIN-NEXT: bltu a0, a1, .LBB294_29818; ZVFHMIN-NEXT: # %bb.1:9819; ZVFHMIN-NEXT: mv a0, a19820; ZVFHMIN-NEXT: .LBB294_2:9821; ZVFHMIN-NEXT: vmv1r.v v0, v39822; ZVFHMIN-NEXT: csrr a1, vlenb9823; ZVFHMIN-NEXT: slli a1, a1, 39824; ZVFHMIN-NEXT: add a1, sp, a19825; ZVFHMIN-NEXT: addi a1, a1, 169826; ZVFHMIN-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload9827; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma9828; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t9829; ZVFHMIN-NEXT: addi a0, sp, 169830; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill9831; ZVFHMIN-NEXT: csrr a0, vlenb9832; ZVFHMIN-NEXT: slli a0, a0, 49833; ZVFHMIN-NEXT: add a0, sp, a09834; ZVFHMIN-NEXT: addi a0, a0, 169835; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9836; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t9837; ZVFHMIN-NEXT: csrr a0, vlenb9838; ZVFHMIN-NEXT: slli a0, a0, 39839; ZVFHMIN-NEXT: mv a1, a09840; ZVFHMIN-NEXT: slli a0, a0, 19841; ZVFHMIN-NEXT: add a0, a0, a19842; ZVFHMIN-NEXT: add a0, sp, a09843; ZVFHMIN-NEXT: addi a0, a0, 169844; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9845; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t9846; ZVFHMIN-NEXT: csrr a0, vlenb9847; ZVFHMIN-NEXT: slli a0, a0, 49848; ZVFHMIN-NEXT: add a0, sp, a09849; ZVFHMIN-NEXT: addi a0, a0, 169850; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill9851; ZVFHMIN-NEXT: addi a0, sp, 169852; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9853; ZVFHMIN-NEXT: csrr a0, vlenb9854; ZVFHMIN-NEXT: slli a0, a0, 49855; ZVFHMIN-NEXT: add a0, sp, a09856; ZVFHMIN-NEXT: addi a0, a0, 169857; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload9858; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9859; ZVFHMIN-NEXT: vfmadd.vv v8, v24, v16, v0.t9860; ZVFHMIN-NEXT: vmv.v.v v16, v89861; ZVFHMIN-NEXT: vmv4r.v v12, v49862; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9863; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t9864; ZVFHMIN-NEXT: csrr a0, vlenb9865; ZVFHMIN-NEXT: slli a0, a0, 59866; ZVFHMIN-NEXT: add sp, sp, a09867; ZVFHMIN-NEXT: .cfi_def_cfa sp, 169868; ZVFHMIN-NEXT: addi sp, sp, 169869; ZVFHMIN-NEXT: .cfi_def_cfa_offset 09870; ZVFHMIN-NEXT: ret9871 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 09872 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer9873 %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 %evl)9874 %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)9875 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negvb, <vscale x 32 x half> %negvc, <vscale x 32 x i1> %m, i32 %evl)9876 ret <vscale x 32 x half> %v9877}9878 9879define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_neg_splat_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {9880; ZVFH-LABEL: vfnmadd_vf_nxv32f16_neg_splat_commute:9881; ZVFH: # %bb.0:9882; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma9883; ZVFH-NEXT: vfnmadd.vf v8, fa0, v16, v0.t9884; ZVFH-NEXT: ret9885;9886; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_neg_splat_commute:9887; ZVFHMIN: # %bb.0:9888; ZVFHMIN-NEXT: addi sp, sp, -169889; ZVFHMIN-NEXT: .cfi_def_cfa_offset 169890; ZVFHMIN-NEXT: csrr a1, vlenb9891; ZVFHMIN-NEXT: slli a1, a1, 59892; ZVFHMIN-NEXT: sub sp, sp, a19893; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb9894; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma9895; ZVFHMIN-NEXT: vmv1r.v v3, v09896; ZVFHMIN-NEXT: csrr a1, vlenb9897; ZVFHMIN-NEXT: slli a1, a1, 39898; ZVFHMIN-NEXT: mv a2, a19899; ZVFHMIN-NEXT: slli a1, a1, 19900; ZVFHMIN-NEXT: add a1, a1, a29901; ZVFHMIN-NEXT: add a1, sp, a19902; ZVFHMIN-NEXT: addi a1, a1, 169903; ZVFHMIN-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill9904; ZVFHMIN-NEXT: fmv.x.h a1, fa09905; ZVFHMIN-NEXT: lui a2, 89906; ZVFHMIN-NEXT: csrr a3, vlenb9907; ZVFHMIN-NEXT: vmv.v.x v24, a19908; ZVFHMIN-NEXT: slli a1, a3, 19909; ZVFHMIN-NEXT: srli a3, a3, 29910; ZVFHMIN-NEXT: vxor.vx v8, v24, a2, v0.t9911; ZVFHMIN-NEXT: vxor.vx v16, v16, a2, v0.t9912; ZVFHMIN-NEXT: sub a2, a0, a19913; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma9914; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a39915; ZVFHMIN-NEXT: sltu a3, a0, a29916; ZVFHMIN-NEXT: addi a3, a3, -19917; ZVFHMIN-NEXT: and a2, a3, a29918; ZVFHMIN-NEXT: csrr a3, vlenb9919; ZVFHMIN-NEXT: slli a3, a3, 39920; ZVFHMIN-NEXT: add a3, sp, a39921; ZVFHMIN-NEXT: addi a3, a3, 169922; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill9923; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma9924; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t9925; ZVFHMIN-NEXT: addi a2, sp, 169926; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill9927; ZVFHMIN-NEXT: csrr a2, vlenb9928; ZVFHMIN-NEXT: slli a2, a2, 49929; ZVFHMIN-NEXT: add a2, sp, a29930; ZVFHMIN-NEXT: addi a2, a2, 169931; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill9932; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t9933; ZVFHMIN-NEXT: csrr a2, vlenb9934; ZVFHMIN-NEXT: slli a2, a2, 39935; ZVFHMIN-NEXT: mv a3, a29936; ZVFHMIN-NEXT: slli a2, a2, 19937; ZVFHMIN-NEXT: add a2, a2, a39938; ZVFHMIN-NEXT: add a2, sp, a29939; ZVFHMIN-NEXT: addi a2, a2, 169940; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload9941; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t9942; ZVFHMIN-NEXT: addi a2, sp, 169943; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload9944; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9945; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t9946; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9947; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v8, v0.t9948; ZVFHMIN-NEXT: bltu a0, a1, .LBB295_29949; ZVFHMIN-NEXT: # %bb.1:9950; ZVFHMIN-NEXT: mv a0, a19951; ZVFHMIN-NEXT: .LBB295_2:9952; ZVFHMIN-NEXT: vmv1r.v v0, v39953; ZVFHMIN-NEXT: csrr a1, vlenb9954; ZVFHMIN-NEXT: slli a1, a1, 39955; ZVFHMIN-NEXT: add a1, sp, a19956; ZVFHMIN-NEXT: addi a1, a1, 169957; ZVFHMIN-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload9958; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma9959; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t9960; ZVFHMIN-NEXT: addi a0, sp, 169961; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill9962; ZVFHMIN-NEXT: csrr a0, vlenb9963; ZVFHMIN-NEXT: slli a0, a0, 49964; ZVFHMIN-NEXT: add a0, sp, a09965; ZVFHMIN-NEXT: addi a0, a0, 169966; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload9967; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t9968; ZVFHMIN-NEXT: csrr a0, vlenb9969; ZVFHMIN-NEXT: slli a0, a0, 39970; ZVFHMIN-NEXT: add a0, sp, a09971; ZVFHMIN-NEXT: addi a0, a0, 169972; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill9973; ZVFHMIN-NEXT: csrr a0, vlenb9974; ZVFHMIN-NEXT: slli a0, a0, 39975; ZVFHMIN-NEXT: mv a1, a09976; ZVFHMIN-NEXT: slli a0, a0, 19977; ZVFHMIN-NEXT: add a0, a0, a19978; ZVFHMIN-NEXT: add a0, sp, a09979; ZVFHMIN-NEXT: addi a0, a0, 169980; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload9981; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v24, v0.t9982; ZVFHMIN-NEXT: addi a0, sp, 169983; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload9984; ZVFHMIN-NEXT: csrr a0, vlenb9985; ZVFHMIN-NEXT: slli a0, a0, 39986; ZVFHMIN-NEXT: add a0, sp, a09987; ZVFHMIN-NEXT: addi a0, a0, 169988; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload9989; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma9990; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t9991; ZVFHMIN-NEXT: vmv.v.v v16, v89992; ZVFHMIN-NEXT: vmv4r.v v12, v49993; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma9994; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t9995; ZVFHMIN-NEXT: csrr a0, vlenb9996; ZVFHMIN-NEXT: slli a0, a0, 59997; ZVFHMIN-NEXT: add sp, sp, a09998; ZVFHMIN-NEXT: .cfi_def_cfa sp, 169999; ZVFHMIN-NEXT: addi sp, sp, 1610000; ZVFHMIN-NEXT: .cfi_def_cfa_offset 010001; ZVFHMIN-NEXT: ret10002 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 010003 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer10004 %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 %evl)10005 %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)10006 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negvb, <vscale x 32 x half> %va, <vscale x 32 x half> %negvc, <vscale x 32 x i1> %m, i32 %evl)10007 ret <vscale x 32 x half> %v10008}10009 10010define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_neg_splat_unmasked(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {10011; ZVFH-LABEL: vfnmadd_vf_nxv32f16_neg_splat_unmasked:10012; ZVFH: # %bb.0:10013; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma10014; ZVFH-NEXT: vfnmadd.vf v8, fa0, v1610015; ZVFH-NEXT: ret10016;10017; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_neg_splat_unmasked:10018; ZVFHMIN: # %bb.0:10019; ZVFHMIN-NEXT: addi sp, sp, -1610020; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1610021; ZVFHMIN-NEXT: csrr a1, vlenb10022; ZVFHMIN-NEXT: slli a1, a1, 510023; ZVFHMIN-NEXT: sub sp, sp, a110024; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb10025; ZVFHMIN-NEXT: csrr a1, vlenb10026; ZVFHMIN-NEXT: slli a1, a1, 310027; ZVFHMIN-NEXT: mv a2, a110028; ZVFHMIN-NEXT: slli a1, a1, 110029; ZVFHMIN-NEXT: add a1, a1, a210030; ZVFHMIN-NEXT: add a1, sp, a110031; ZVFHMIN-NEXT: addi a1, a1, 1610032; ZVFHMIN-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill10033; ZVFHMIN-NEXT: fmv.x.h a1, fa010034; ZVFHMIN-NEXT: lui a2, 810035; ZVFHMIN-NEXT: vsetvli a3, zero, e8, m4, ta, ma10036; ZVFHMIN-NEXT: vmset.m v710037; ZVFHMIN-NEXT: csrr a3, vlenb10038; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma10039; ZVFHMIN-NEXT: vmv.v.x v24, a110040; ZVFHMIN-NEXT: vxor.vx v16, v16, a210041; ZVFHMIN-NEXT: slli a1, a3, 110042; ZVFHMIN-NEXT: srli a3, a3, 210043; ZVFHMIN-NEXT: vxor.vx v8, v24, a210044; ZVFHMIN-NEXT: sub a2, a0, a110045; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma10046; ZVFHMIN-NEXT: vslidedown.vx v0, v7, a310047; ZVFHMIN-NEXT: sltu a3, a0, a210048; ZVFHMIN-NEXT: addi a3, a3, -110049; ZVFHMIN-NEXT: and a2, a3, a210050; ZVFHMIN-NEXT: csrr a3, vlenb10051; ZVFHMIN-NEXT: slli a3, a3, 410052; ZVFHMIN-NEXT: add a3, sp, a310053; ZVFHMIN-NEXT: addi a3, a3, 1610054; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill10055; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma10056; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t10057; ZVFHMIN-NEXT: addi a2, sp, 1610058; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill10059; ZVFHMIN-NEXT: csrr a2, vlenb10060; ZVFHMIN-NEXT: slli a2, a2, 310061; ZVFHMIN-NEXT: add a2, sp, a210062; ZVFHMIN-NEXT: addi a2, a2, 1610063; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill10064; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t10065; ZVFHMIN-NEXT: csrr a2, vlenb10066; ZVFHMIN-NEXT: slli a2, a2, 310067; ZVFHMIN-NEXT: mv a3, a210068; ZVFHMIN-NEXT: slli a2, a2, 110069; ZVFHMIN-NEXT: add a2, a2, a310070; ZVFHMIN-NEXT: add a2, sp, a210071; ZVFHMIN-NEXT: addi a2, a2, 1610072; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload10073; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t10074; ZVFHMIN-NEXT: addi a2, sp, 1610075; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload10076; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10077; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t10078; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10079; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v24, v0.t10080; ZVFHMIN-NEXT: bltu a0, a1, .LBB296_210081; ZVFHMIN-NEXT: # %bb.1:10082; ZVFHMIN-NEXT: mv a0, a110083; ZVFHMIN-NEXT: .LBB296_2:10084; ZVFHMIN-NEXT: csrr a1, vlenb10085; ZVFHMIN-NEXT: slli a1, a1, 410086; ZVFHMIN-NEXT: add a1, sp, a110087; ZVFHMIN-NEXT: addi a1, a1, 1610088; ZVFHMIN-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload10089; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma10090; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v1610091; ZVFHMIN-NEXT: addi a0, sp, 1610092; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill10093; ZVFHMIN-NEXT: csrr a0, vlenb10094; ZVFHMIN-NEXT: slli a0, a0, 310095; ZVFHMIN-NEXT: add a0, sp, a010096; ZVFHMIN-NEXT: addi a0, a0, 1610097; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10098; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v1610099; ZVFHMIN-NEXT: csrr a0, vlenb10100; ZVFHMIN-NEXT: slli a0, a0, 310101; ZVFHMIN-NEXT: mv a1, a010102; ZVFHMIN-NEXT: slli a0, a0, 110103; ZVFHMIN-NEXT: add a0, a0, a110104; ZVFHMIN-NEXT: add a0, sp, a010105; ZVFHMIN-NEXT: addi a0, a0, 1610106; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10107; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v1610108; ZVFHMIN-NEXT: addi a0, sp, 1610109; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10110; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10111; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v1610112; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10113; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v010114; ZVFHMIN-NEXT: csrr a0, vlenb10115; ZVFHMIN-NEXT: slli a0, a0, 510116; ZVFHMIN-NEXT: add sp, sp, a010117; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1610118; ZVFHMIN-NEXT: addi sp, sp, 1610119; ZVFHMIN-NEXT: .cfi_def_cfa_offset 010120; ZVFHMIN-NEXT: ret10121 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 010122 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer10123 %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)10124 %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)10125 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negvb, <vscale x 32 x half> %negvc, <vscale x 32 x i1> splat (i1 true), i32 %evl)10126 ret <vscale x 32 x half> %v10127}10128 10129define <vscale x 32 x half> @vfnmadd_vf_nxv32f16_neg_splat_unmasked_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {10130; ZVFH-LABEL: vfnmadd_vf_nxv32f16_neg_splat_unmasked_commute:10131; ZVFH: # %bb.0:10132; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma10133; ZVFH-NEXT: vfnmadd.vf v8, fa0, v1610134; ZVFH-NEXT: ret10135;10136; ZVFHMIN-LABEL: vfnmadd_vf_nxv32f16_neg_splat_unmasked_commute:10137; ZVFHMIN: # %bb.0:10138; ZVFHMIN-NEXT: addi sp, sp, -1610139; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1610140; ZVFHMIN-NEXT: csrr a1, vlenb10141; ZVFHMIN-NEXT: slli a1, a1, 510142; ZVFHMIN-NEXT: sub sp, sp, a110143; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb10144; ZVFHMIN-NEXT: csrr a1, vlenb10145; ZVFHMIN-NEXT: slli a1, a1, 310146; ZVFHMIN-NEXT: mv a2, a110147; ZVFHMIN-NEXT: slli a1, a1, 110148; ZVFHMIN-NEXT: add a1, a1, a210149; ZVFHMIN-NEXT: add a1, sp, a110150; ZVFHMIN-NEXT: addi a1, a1, 1610151; ZVFHMIN-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill10152; ZVFHMIN-NEXT: fmv.x.h a1, fa010153; ZVFHMIN-NEXT: lui a2, 810154; ZVFHMIN-NEXT: vsetvli a3, zero, e8, m4, ta, ma10155; ZVFHMIN-NEXT: vmset.m v710156; ZVFHMIN-NEXT: csrr a3, vlenb10157; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma10158; ZVFHMIN-NEXT: vmv.v.x v24, a110159; ZVFHMIN-NEXT: vxor.vx v16, v16, a210160; ZVFHMIN-NEXT: slli a1, a3, 110161; ZVFHMIN-NEXT: srli a3, a3, 210162; ZVFHMIN-NEXT: vxor.vx v8, v24, a210163; ZVFHMIN-NEXT: sub a2, a0, a110164; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma10165; ZVFHMIN-NEXT: vslidedown.vx v0, v7, a310166; ZVFHMIN-NEXT: sltu a3, a0, a210167; ZVFHMIN-NEXT: addi a3, a3, -110168; ZVFHMIN-NEXT: and a2, a3, a210169; ZVFHMIN-NEXT: csrr a3, vlenb10170; ZVFHMIN-NEXT: slli a3, a3, 410171; ZVFHMIN-NEXT: add a3, sp, a310172; ZVFHMIN-NEXT: addi a3, a3, 1610173; ZVFHMIN-NEXT: vs8r.v v16, (a3) # vscale x 64-byte Folded Spill10174; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma10175; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t10176; ZVFHMIN-NEXT: addi a2, sp, 1610177; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill10178; ZVFHMIN-NEXT: csrr a2, vlenb10179; ZVFHMIN-NEXT: slli a2, a2, 310180; ZVFHMIN-NEXT: add a2, sp, a210181; ZVFHMIN-NEXT: addi a2, a2, 1610182; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill10183; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t10184; ZVFHMIN-NEXT: csrr a2, vlenb10185; ZVFHMIN-NEXT: slli a2, a2, 310186; ZVFHMIN-NEXT: mv a3, a210187; ZVFHMIN-NEXT: slli a2, a2, 110188; ZVFHMIN-NEXT: add a2, a2, a310189; ZVFHMIN-NEXT: add a2, sp, a210190; ZVFHMIN-NEXT: addi a2, a2, 1610191; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload10192; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t10193; ZVFHMIN-NEXT: addi a2, sp, 1610194; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload10195; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10196; ZVFHMIN-NEXT: vfmadd.vv v8, v24, v16, v0.t10197; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10198; ZVFHMIN-NEXT: vfncvt.f.f.w v20, v8, v0.t10199; ZVFHMIN-NEXT: bltu a0, a1, .LBB297_210200; ZVFHMIN-NEXT: # %bb.1:10201; ZVFHMIN-NEXT: mv a0, a110202; ZVFHMIN-NEXT: .LBB297_2:10203; ZVFHMIN-NEXT: csrr a1, vlenb10204; ZVFHMIN-NEXT: slli a1, a1, 410205; ZVFHMIN-NEXT: add a1, sp, a110206; ZVFHMIN-NEXT: addi a1, a1, 1610207; ZVFHMIN-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload10208; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma10209; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v810210; ZVFHMIN-NEXT: addi a0, sp, 1610211; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill10212; ZVFHMIN-NEXT: csrr a0, vlenb10213; ZVFHMIN-NEXT: slli a0, a0, 310214; ZVFHMIN-NEXT: add a0, sp, a010215; ZVFHMIN-NEXT: addi a0, a0, 1610216; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload10217; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v810218; ZVFHMIN-NEXT: csrr a0, vlenb10219; ZVFHMIN-NEXT: slli a0, a0, 310220; ZVFHMIN-NEXT: mv a1, a010221; ZVFHMIN-NEXT: slli a0, a0, 110222; ZVFHMIN-NEXT: add a0, a0, a110223; ZVFHMIN-NEXT: add a0, sp, a010224; ZVFHMIN-NEXT: addi a0, a0, 1610225; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload10226; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v810227; ZVFHMIN-NEXT: addi a0, sp, 1610228; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload10229; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10230; ZVFHMIN-NEXT: vfmadd.vv v0, v24, v810231; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10232; ZVFHMIN-NEXT: vfncvt.f.f.w v16, v010233; ZVFHMIN-NEXT: vmv8r.v v8, v1610234; ZVFHMIN-NEXT: csrr a0, vlenb10235; ZVFHMIN-NEXT: slli a0, a0, 510236; ZVFHMIN-NEXT: add sp, sp, a010237; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1610238; ZVFHMIN-NEXT: addi sp, sp, 1610239; ZVFHMIN-NEXT: .cfi_def_cfa_offset 010240; ZVFHMIN-NEXT: ret10241 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 010242 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer10243 %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)10244 %negvc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)10245 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negvb, <vscale x 32 x half> %va, <vscale x 32 x half> %negvc, <vscale x 32 x i1> splat (i1 true), i32 %evl)10246 ret <vscale x 32 x half> %v10247}10248 10249define <vscale x 32 x half> @vfnmsub_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {10250; ZVFH-LABEL: vfnmsub_vv_nxv32f16:10251; ZVFH: # %bb.0:10252; ZVFH-NEXT: vl8re16.v v24, (a0)10253; ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma10254; ZVFH-NEXT: vfnmadd.vv v16, v8, v24, v0.t10255; ZVFH-NEXT: vmv.v.v v8, v1610256; ZVFH-NEXT: ret10257;10258; ZVFHMIN-LABEL: vfnmsub_vv_nxv32f16:10259; ZVFHMIN: # %bb.0:10260; ZVFHMIN-NEXT: addi sp, sp, -1610261; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1610262; ZVFHMIN-NEXT: csrr a2, vlenb10263; ZVFHMIN-NEXT: slli a2, a2, 510264; ZVFHMIN-NEXT: sub sp, sp, a210265; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb10266; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma10267; ZVFHMIN-NEXT: vmv1r.v v3, v010268; ZVFHMIN-NEXT: csrr a2, vlenb10269; ZVFHMIN-NEXT: slli a2, a2, 310270; ZVFHMIN-NEXT: mv a3, a210271; ZVFHMIN-NEXT: slli a2, a2, 110272; ZVFHMIN-NEXT: add a2, a2, a310273; ZVFHMIN-NEXT: add a2, sp, a210274; ZVFHMIN-NEXT: addi a2, a2, 1610275; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill10276; ZVFHMIN-NEXT: vl8re16.v v8, (a0)10277; ZVFHMIN-NEXT: csrr a0, vlenb10278; ZVFHMIN-NEXT: slli a0, a0, 410279; ZVFHMIN-NEXT: add a0, sp, a010280; ZVFHMIN-NEXT: addi a0, a0, 1610281; ZVFHMIN-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill10282; ZVFHMIN-NEXT: lui a2, 810283; ZVFHMIN-NEXT: csrr a3, vlenb10284; ZVFHMIN-NEXT: vxor.vx v8, v16, a2, v0.t10285; ZVFHMIN-NEXT: slli a0, a3, 110286; ZVFHMIN-NEXT: srli a3, a3, 210287; ZVFHMIN-NEXT: sub a4, a1, a010288; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma10289; ZVFHMIN-NEXT: vslidedown.vx v6, v0, a310290; ZVFHMIN-NEXT: sltu a3, a1, a410291; ZVFHMIN-NEXT: csrr a5, vlenb10292; ZVFHMIN-NEXT: slli a5, a5, 410293; ZVFHMIN-NEXT: add a5, sp, a510294; ZVFHMIN-NEXT: addi a5, a5, 1610295; ZVFHMIN-NEXT: vl8r.v v24, (a5) # vscale x 64-byte Folded Reload10296; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma10297; ZVFHMIN-NEXT: vxor.vx v24, v24, a2, v0.t10298; ZVFHMIN-NEXT: addi a3, a3, -110299; ZVFHMIN-NEXT: and a3, a3, a410300; ZVFHMIN-NEXT: vmv1r.v v0, v610301; ZVFHMIN-NEXT: csrr a2, vlenb10302; ZVFHMIN-NEXT: slli a2, a2, 310303; ZVFHMIN-NEXT: add a2, sp, a210304; ZVFHMIN-NEXT: addi a2, a2, 1610305; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill10306; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma10307; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v28, v0.t10308; ZVFHMIN-NEXT: addi a2, sp, 1610309; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill10310; ZVFHMIN-NEXT: csrr a2, vlenb10311; ZVFHMIN-NEXT: slli a2, a2, 410312; ZVFHMIN-NEXT: add a2, sp, a210313; ZVFHMIN-NEXT: addi a2, a2, 1610314; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill10315; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t10316; ZVFHMIN-NEXT: csrr a2, vlenb10317; ZVFHMIN-NEXT: slli a2, a2, 310318; ZVFHMIN-NEXT: mv a3, a210319; ZVFHMIN-NEXT: slli a2, a2, 110320; ZVFHMIN-NEXT: add a2, a2, a310321; ZVFHMIN-NEXT: add a2, sp, a210322; ZVFHMIN-NEXT: addi a2, a2, 1610323; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload10324; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t10325; ZVFHMIN-NEXT: addi a2, sp, 1610326; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload10327; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10328; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t10329; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10330; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v24, v0.t10331; ZVFHMIN-NEXT: bltu a1, a0, .LBB298_210332; ZVFHMIN-NEXT: # %bb.1:10333; ZVFHMIN-NEXT: mv a1, a010334; ZVFHMIN-NEXT: .LBB298_2:10335; ZVFHMIN-NEXT: vmv1r.v v0, v310336; ZVFHMIN-NEXT: csrr a0, vlenb10337; ZVFHMIN-NEXT: slli a0, a0, 410338; ZVFHMIN-NEXT: add a0, sp, a010339; ZVFHMIN-NEXT: addi a0, a0, 1610340; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10341; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m4, ta, ma10342; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t10343; ZVFHMIN-NEXT: addi a0, sp, 1610344; ZVFHMIN-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill10345; ZVFHMIN-NEXT: csrr a0, vlenb10346; ZVFHMIN-NEXT: slli a0, a0, 310347; ZVFHMIN-NEXT: add a0, sp, a010348; ZVFHMIN-NEXT: addi a0, a0, 1610349; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10350; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t10351; ZVFHMIN-NEXT: csrr a0, vlenb10352; ZVFHMIN-NEXT: slli a0, a0, 410353; ZVFHMIN-NEXT: add a0, sp, a010354; ZVFHMIN-NEXT: addi a0, a0, 1610355; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill10356; ZVFHMIN-NEXT: csrr a0, vlenb10357; ZVFHMIN-NEXT: slli a0, a0, 310358; ZVFHMIN-NEXT: mv a1, a010359; ZVFHMIN-NEXT: slli a0, a0, 110360; ZVFHMIN-NEXT: add a0, a0, a110361; ZVFHMIN-NEXT: add a0, sp, a010362; ZVFHMIN-NEXT: addi a0, a0, 1610363; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10364; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t10365; ZVFHMIN-NEXT: csrr a0, vlenb10366; ZVFHMIN-NEXT: slli a0, a0, 410367; ZVFHMIN-NEXT: add a0, sp, a010368; ZVFHMIN-NEXT: addi a0, a0, 1610369; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10370; ZVFHMIN-NEXT: addi a0, sp, 1610371; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload10372; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10373; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t10374; ZVFHMIN-NEXT: vmv4r.v v12, v410375; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10376; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v24, v0.t10377; ZVFHMIN-NEXT: csrr a0, vlenb10378; ZVFHMIN-NEXT: slli a0, a0, 510379; ZVFHMIN-NEXT: add sp, sp, a010380; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1610381; ZVFHMIN-NEXT: addi sp, sp, 1610382; ZVFHMIN-NEXT: .cfi_def_cfa_offset 010383; ZVFHMIN-NEXT: ret10384 %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> %m, i32 %evl)10385 %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 %evl)10386 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negb, <vscale x 32 x half> %negc, <vscale x 32 x i1> %m, i32 %evl)10387 ret <vscale x 32 x half> %v10388}10389 10390define <vscale x 32 x half> @vfnmsub_vv_nxv32f16_commuted(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 zeroext %evl) {10391; ZVFH-LABEL: vfnmsub_vv_nxv32f16_commuted:10392; ZVFH: # %bb.0:10393; ZVFH-NEXT: vl8re16.v v24, (a0)10394; ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma10395; ZVFH-NEXT: vfnmadd.vv v8, v16, v24, v0.t10396; ZVFH-NEXT: ret10397;10398; ZVFHMIN-LABEL: vfnmsub_vv_nxv32f16_commuted:10399; ZVFHMIN: # %bb.0:10400; ZVFHMIN-NEXT: addi sp, sp, -1610401; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1610402; ZVFHMIN-NEXT: csrr a2, vlenb10403; ZVFHMIN-NEXT: slli a2, a2, 510404; ZVFHMIN-NEXT: sub sp, sp, a210405; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb10406; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma10407; ZVFHMIN-NEXT: vmv1r.v v3, v010408; ZVFHMIN-NEXT: csrr a2, vlenb10409; ZVFHMIN-NEXT: slli a2, a2, 310410; ZVFHMIN-NEXT: mv a3, a210411; ZVFHMIN-NEXT: slli a2, a2, 110412; ZVFHMIN-NEXT: add a2, a2, a310413; ZVFHMIN-NEXT: add a2, sp, a210414; ZVFHMIN-NEXT: addi a2, a2, 1610415; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill10416; ZVFHMIN-NEXT: vl8re16.v v8, (a0)10417; ZVFHMIN-NEXT: lui a2, 810418; ZVFHMIN-NEXT: csrr a3, vlenb10419; ZVFHMIN-NEXT: vxor.vx v16, v16, a2, v0.t10420; ZVFHMIN-NEXT: slli a0, a3, 110421; ZVFHMIN-NEXT: srli a3, a3, 210422; ZVFHMIN-NEXT: sub a4, a1, a010423; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma10424; ZVFHMIN-NEXT: vslidedown.vx v6, v0, a310425; ZVFHMIN-NEXT: sltu a3, a1, a410426; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma10427; ZVFHMIN-NEXT: vxor.vx v8, v8, a2, v0.t10428; ZVFHMIN-NEXT: addi a3, a3, -110429; ZVFHMIN-NEXT: and a3, a3, a410430; ZVFHMIN-NEXT: vmv1r.v v0, v610431; ZVFHMIN-NEXT: csrr a2, vlenb10432; ZVFHMIN-NEXT: slli a2, a2, 310433; ZVFHMIN-NEXT: add a2, sp, a210434; ZVFHMIN-NEXT: addi a2, a2, 1610435; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill10436; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma10437; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t10438; ZVFHMIN-NEXT: addi a2, sp, 1610439; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill10440; ZVFHMIN-NEXT: csrr a2, vlenb10441; ZVFHMIN-NEXT: slli a2, a2, 410442; ZVFHMIN-NEXT: add a2, sp, a210443; ZVFHMIN-NEXT: addi a2, a2, 1610444; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill10445; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t10446; ZVFHMIN-NEXT: csrr a2, vlenb10447; ZVFHMIN-NEXT: slli a2, a2, 310448; ZVFHMIN-NEXT: mv a3, a210449; ZVFHMIN-NEXT: slli a2, a2, 110450; ZVFHMIN-NEXT: add a2, a2, a310451; ZVFHMIN-NEXT: add a2, sp, a210452; ZVFHMIN-NEXT: addi a2, a2, 1610453; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload10454; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t10455; ZVFHMIN-NEXT: addi a2, sp, 1610456; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload10457; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10458; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t10459; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10460; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v16, v0.t10461; ZVFHMIN-NEXT: bltu a1, a0, .LBB299_210462; ZVFHMIN-NEXT: # %bb.1:10463; ZVFHMIN-NEXT: mv a1, a010464; ZVFHMIN-NEXT: .LBB299_2:10465; ZVFHMIN-NEXT: vmv1r.v v0, v310466; ZVFHMIN-NEXT: csrr a0, vlenb10467; ZVFHMIN-NEXT: slli a0, a0, 410468; ZVFHMIN-NEXT: add a0, sp, a010469; ZVFHMIN-NEXT: addi a0, a0, 1610470; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload10471; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m4, ta, ma10472; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t10473; ZVFHMIN-NEXT: addi a0, sp, 1610474; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill10475; ZVFHMIN-NEXT: csrr a0, vlenb10476; ZVFHMIN-NEXT: slli a0, a0, 310477; ZVFHMIN-NEXT: add a0, sp, a010478; ZVFHMIN-NEXT: addi a0, a0, 1610479; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload10480; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t10481; ZVFHMIN-NEXT: csrr a0, vlenb10482; ZVFHMIN-NEXT: slli a0, a0, 410483; ZVFHMIN-NEXT: add a0, sp, a010484; ZVFHMIN-NEXT: addi a0, a0, 1610485; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill10486; ZVFHMIN-NEXT: csrr a0, vlenb10487; ZVFHMIN-NEXT: slli a0, a0, 310488; ZVFHMIN-NEXT: mv a1, a010489; ZVFHMIN-NEXT: slli a0, a0, 110490; ZVFHMIN-NEXT: add a0, a0, a110491; ZVFHMIN-NEXT: add a0, sp, a010492; ZVFHMIN-NEXT: addi a0, a0, 1610493; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10494; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t10495; ZVFHMIN-NEXT: addi a0, sp, 1610496; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10497; ZVFHMIN-NEXT: csrr a0, vlenb10498; ZVFHMIN-NEXT: slli a0, a0, 410499; ZVFHMIN-NEXT: add a0, sp, a010500; ZVFHMIN-NEXT: addi a0, a0, 1610501; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload10502; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10503; ZVFHMIN-NEXT: vfmadd.vv v8, v16, v24, v0.t10504; ZVFHMIN-NEXT: vmv.v.v v16, v810505; ZVFHMIN-NEXT: vmv4r.v v12, v410506; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10507; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t10508; ZVFHMIN-NEXT: csrr a0, vlenb10509; ZVFHMIN-NEXT: slli a0, a0, 510510; ZVFHMIN-NEXT: add sp, sp, a010511; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1610512; ZVFHMIN-NEXT: addi sp, sp, 1610513; ZVFHMIN-NEXT: .cfi_def_cfa_offset 010514; ZVFHMIN-NEXT: ret10515 %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> %m, i32 %evl)10516 %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> %m, i32 %evl)10517 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negb, <vscale x 32 x half> %va, <vscale x 32 x half> %negc, <vscale x 32 x i1> %m, i32 %evl)10518 ret <vscale x 32 x half> %v10519}10520 10521define <vscale x 32 x half> @vfnmsub_vv_nxv32f16_unmasked(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, i32 zeroext %evl) {10522; ZVFH-LABEL: vfnmsub_vv_nxv32f16_unmasked:10523; ZVFH: # %bb.0:10524; ZVFH-NEXT: vl8re16.v v24, (a0)10525; ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma10526; ZVFH-NEXT: vfnmadd.vv v8, v16, v2410527; ZVFH-NEXT: ret10528;10529; ZVFHMIN-LABEL: vfnmsub_vv_nxv32f16_unmasked:10530; ZVFHMIN: # %bb.0:10531; ZVFHMIN-NEXT: addi sp, sp, -1610532; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1610533; ZVFHMIN-NEXT: csrr a2, vlenb10534; ZVFHMIN-NEXT: slli a2, a2, 510535; ZVFHMIN-NEXT: sub sp, sp, a210536; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb10537; ZVFHMIN-NEXT: csrr a2, vlenb10538; ZVFHMIN-NEXT: slli a2, a2, 310539; ZVFHMIN-NEXT: mv a3, a210540; ZVFHMIN-NEXT: slli a2, a2, 110541; ZVFHMIN-NEXT: add a2, a2, a310542; ZVFHMIN-NEXT: add a2, sp, a210543; ZVFHMIN-NEXT: addi a2, a2, 1610544; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill10545; ZVFHMIN-NEXT: vl8re16.v v24, (a0)10546; ZVFHMIN-NEXT: lui a2, 810547; ZVFHMIN-NEXT: vsetvli a0, zero, e8, m4, ta, ma10548; ZVFHMIN-NEXT: vmset.m v810549; ZVFHMIN-NEXT: csrr a3, vlenb10550; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma10551; ZVFHMIN-NEXT: vxor.vx v16, v16, a210552; ZVFHMIN-NEXT: slli a0, a3, 110553; ZVFHMIN-NEXT: srli a3, a3, 210554; ZVFHMIN-NEXT: sub a4, a1, a010555; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma10556; ZVFHMIN-NEXT: vslidedown.vx v0, v8, a310557; ZVFHMIN-NEXT: sltu a3, a1, a410558; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma10559; ZVFHMIN-NEXT: vxor.vx v8, v24, a210560; ZVFHMIN-NEXT: addi a3, a3, -110561; ZVFHMIN-NEXT: and a3, a3, a410562; ZVFHMIN-NEXT: csrr a2, vlenb10563; ZVFHMIN-NEXT: slli a2, a2, 310564; ZVFHMIN-NEXT: add a2, sp, a210565; ZVFHMIN-NEXT: addi a2, a2, 1610566; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill10567; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma10568; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t10569; ZVFHMIN-NEXT: addi a2, sp, 1610570; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill10571; ZVFHMIN-NEXT: csrr a2, vlenb10572; ZVFHMIN-NEXT: slli a2, a2, 410573; ZVFHMIN-NEXT: add a2, sp, a210574; ZVFHMIN-NEXT: addi a2, a2, 1610575; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill10576; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t10577; ZVFHMIN-NEXT: csrr a2, vlenb10578; ZVFHMIN-NEXT: slli a2, a2, 310579; ZVFHMIN-NEXT: mv a3, a210580; ZVFHMIN-NEXT: slli a2, a2, 110581; ZVFHMIN-NEXT: add a2, a2, a310582; ZVFHMIN-NEXT: add a2, sp, a210583; ZVFHMIN-NEXT: addi a2, a2, 1610584; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload10585; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t10586; ZVFHMIN-NEXT: addi a2, sp, 1610587; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload10588; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10589; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t10590; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10591; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v24, v0.t10592; ZVFHMIN-NEXT: bltu a1, a0, .LBB300_210593; ZVFHMIN-NEXT: # %bb.1:10594; ZVFHMIN-NEXT: mv a1, a010595; ZVFHMIN-NEXT: .LBB300_2:10596; ZVFHMIN-NEXT: csrr a0, vlenb10597; ZVFHMIN-NEXT: slli a0, a0, 410598; ZVFHMIN-NEXT: add a0, sp, a010599; ZVFHMIN-NEXT: addi a0, a0, 1610600; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10601; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m4, ta, ma10602; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v1610603; ZVFHMIN-NEXT: addi a0, sp, 1610604; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill10605; ZVFHMIN-NEXT: csrr a0, vlenb10606; ZVFHMIN-NEXT: slli a0, a0, 310607; ZVFHMIN-NEXT: add a0, sp, a010608; ZVFHMIN-NEXT: addi a0, a0, 1610609; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10610; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v1610611; ZVFHMIN-NEXT: csrr a0, vlenb10612; ZVFHMIN-NEXT: slli a0, a0, 310613; ZVFHMIN-NEXT: mv a1, a010614; ZVFHMIN-NEXT: slli a0, a0, 110615; ZVFHMIN-NEXT: add a0, a0, a110616; ZVFHMIN-NEXT: add a0, sp, a010617; ZVFHMIN-NEXT: addi a0, a0, 1610618; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload10619; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v2410620; ZVFHMIN-NEXT: addi a0, sp, 1610621; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload10622; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10623; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v010624; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10625; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v1610626; ZVFHMIN-NEXT: csrr a0, vlenb10627; ZVFHMIN-NEXT: slli a0, a0, 510628; ZVFHMIN-NEXT: add sp, sp, a010629; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1610630; ZVFHMIN-NEXT: addi sp, sp, 1610631; ZVFHMIN-NEXT: .cfi_def_cfa_offset 010632; ZVFHMIN-NEXT: ret10633 %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)10634 %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)10635 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negb, <vscale x 32 x half> %negc, <vscale x 32 x i1> splat (i1 true), i32 %evl)10636 ret <vscale x 32 x half> %v10637}10638 10639define <vscale x 32 x half> @vfnmsub_vv_nxv32f16_unmasked_commuted(<vscale x 32 x half> %va, <vscale x 32 x half> %b, <vscale x 32 x half> %c, i32 zeroext %evl) {10640; ZVFH-LABEL: vfnmsub_vv_nxv32f16_unmasked_commuted:10641; ZVFH: # %bb.0:10642; ZVFH-NEXT: vl8re16.v v24, (a0)10643; ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma10644; ZVFH-NEXT: vfnmadd.vv v8, v16, v2410645; ZVFH-NEXT: ret10646;10647; ZVFHMIN-LABEL: vfnmsub_vv_nxv32f16_unmasked_commuted:10648; ZVFHMIN: # %bb.0:10649; ZVFHMIN-NEXT: addi sp, sp, -1610650; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1610651; ZVFHMIN-NEXT: csrr a2, vlenb10652; ZVFHMIN-NEXT: slli a2, a2, 510653; ZVFHMIN-NEXT: sub sp, sp, a210654; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb10655; ZVFHMIN-NEXT: csrr a2, vlenb10656; ZVFHMIN-NEXT: slli a2, a2, 310657; ZVFHMIN-NEXT: mv a3, a210658; ZVFHMIN-NEXT: slli a2, a2, 110659; ZVFHMIN-NEXT: add a2, a2, a310660; ZVFHMIN-NEXT: add a2, sp, a210661; ZVFHMIN-NEXT: addi a2, a2, 1610662; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill10663; ZVFHMIN-NEXT: vl8re16.v v24, (a0)10664; ZVFHMIN-NEXT: lui a2, 810665; ZVFHMIN-NEXT: vsetvli a0, zero, e8, m4, ta, ma10666; ZVFHMIN-NEXT: vmset.m v810667; ZVFHMIN-NEXT: csrr a3, vlenb10668; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma10669; ZVFHMIN-NEXT: vxor.vx v16, v16, a210670; ZVFHMIN-NEXT: slli a0, a3, 110671; ZVFHMIN-NEXT: srli a3, a3, 210672; ZVFHMIN-NEXT: sub a4, a1, a010673; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma10674; ZVFHMIN-NEXT: vslidedown.vx v0, v8, a310675; ZVFHMIN-NEXT: sltu a3, a1, a410676; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m8, ta, ma10677; ZVFHMIN-NEXT: vxor.vx v8, v24, a210678; ZVFHMIN-NEXT: addi a3, a3, -110679; ZVFHMIN-NEXT: and a3, a3, a410680; ZVFHMIN-NEXT: csrr a2, vlenb10681; ZVFHMIN-NEXT: slli a2, a2, 310682; ZVFHMIN-NEXT: add a2, sp, a210683; ZVFHMIN-NEXT: addi a2, a2, 1610684; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill10685; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma10686; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t10687; ZVFHMIN-NEXT: addi a2, sp, 1610688; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill10689; ZVFHMIN-NEXT: csrr a2, vlenb10690; ZVFHMIN-NEXT: slli a2, a2, 410691; ZVFHMIN-NEXT: add a2, sp, a210692; ZVFHMIN-NEXT: addi a2, a2, 1610693; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill10694; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t10695; ZVFHMIN-NEXT: csrr a2, vlenb10696; ZVFHMIN-NEXT: slli a2, a2, 310697; ZVFHMIN-NEXT: mv a3, a210698; ZVFHMIN-NEXT: slli a2, a2, 110699; ZVFHMIN-NEXT: add a2, a2, a310700; ZVFHMIN-NEXT: add a2, sp, a210701; ZVFHMIN-NEXT: addi a2, a2, 1610702; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload10703; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t10704; ZVFHMIN-NEXT: addi a2, sp, 1610705; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload10706; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10707; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t10708; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10709; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16, v0.t10710; ZVFHMIN-NEXT: bltu a1, a0, .LBB301_210711; ZVFHMIN-NEXT: # %bb.1:10712; ZVFHMIN-NEXT: mv a1, a010713; ZVFHMIN-NEXT: .LBB301_2:10714; ZVFHMIN-NEXT: csrr a0, vlenb10715; ZVFHMIN-NEXT: slli a0, a0, 410716; ZVFHMIN-NEXT: add a0, sp, a010717; ZVFHMIN-NEXT: addi a0, a0, 1610718; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10719; ZVFHMIN-NEXT: vsetvli zero, a1, e16, m4, ta, ma10720; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v1610721; ZVFHMIN-NEXT: addi a0, sp, 1610722; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill10723; ZVFHMIN-NEXT: csrr a0, vlenb10724; ZVFHMIN-NEXT: slli a0, a0, 310725; ZVFHMIN-NEXT: add a0, sp, a010726; ZVFHMIN-NEXT: addi a0, a0, 1610727; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10728; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v1610729; ZVFHMIN-NEXT: csrr a0, vlenb10730; ZVFHMIN-NEXT: slli a0, a0, 310731; ZVFHMIN-NEXT: mv a1, a010732; ZVFHMIN-NEXT: slli a0, a0, 110733; ZVFHMIN-NEXT: add a0, a0, a110734; ZVFHMIN-NEXT: add a0, sp, a010735; ZVFHMIN-NEXT: addi a0, a0, 1610736; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10737; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v1610738; ZVFHMIN-NEXT: addi a0, sp, 1610739; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10740; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10741; ZVFHMIN-NEXT: vfmadd.vv v0, v16, v2410742; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10743; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v010744; ZVFHMIN-NEXT: csrr a0, vlenb10745; ZVFHMIN-NEXT: slli a0, a0, 510746; ZVFHMIN-NEXT: add sp, sp, a010747; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1610748; ZVFHMIN-NEXT: addi sp, sp, 1610749; ZVFHMIN-NEXT: .cfi_def_cfa_offset 010750; ZVFHMIN-NEXT: ret10751 %negb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %b, <vscale x 32 x i1> splat (i1 true), i32 %evl)10752 %negc = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %c, <vscale x 32 x i1> splat (i1 true), i32 %evl)10753 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negb, <vscale x 32 x half> %va, <vscale x 32 x half> %negc, <vscale x 32 x i1> splat (i1 true), i32 %evl)10754 ret <vscale x 32 x half> %v10755}10756 10757define <vscale x 32 x half> @vfnmsub_vf_nxv32f16(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {10758; ZVFH-LABEL: vfnmsub_vf_nxv32f16:10759; ZVFH: # %bb.0:10760; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma10761; ZVFH-NEXT: vfnmsub.vf v8, fa0, v16, v0.t10762; ZVFH-NEXT: ret10763;10764; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16:10765; ZVFHMIN: # %bb.0:10766; ZVFHMIN-NEXT: addi sp, sp, -1610767; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1610768; ZVFHMIN-NEXT: csrr a1, vlenb10769; ZVFHMIN-NEXT: slli a1, a1, 510770; ZVFHMIN-NEXT: sub sp, sp, a110771; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb10772; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma10773; ZVFHMIN-NEXT: vmv1r.v v3, v010774; ZVFHMIN-NEXT: vmv8r.v v24, v1610775; ZVFHMIN-NEXT: fmv.x.h a2, fa010776; ZVFHMIN-NEXT: lui a1, 810777; ZVFHMIN-NEXT: csrr a3, vlenb10778; ZVFHMIN-NEXT: vxor.vx v16, v8, a1, v0.t10779; ZVFHMIN-NEXT: slli a1, a3, 110780; ZVFHMIN-NEXT: srli a3, a3, 210781; ZVFHMIN-NEXT: sub a4, a0, a110782; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma10783; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a310784; ZVFHMIN-NEXT: sltu a3, a0, a410785; ZVFHMIN-NEXT: addi a3, a3, -110786; ZVFHMIN-NEXT: and a3, a3, a410787; ZVFHMIN-NEXT: csrr a4, vlenb10788; ZVFHMIN-NEXT: slli a4, a4, 310789; ZVFHMIN-NEXT: add a4, sp, a410790; ZVFHMIN-NEXT: addi a4, a4, 1610791; ZVFHMIN-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill10792; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma10793; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t10794; ZVFHMIN-NEXT: addi a4, sp, 1610795; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill10796; ZVFHMIN-NEXT: csrr a4, vlenb10797; ZVFHMIN-NEXT: slli a4, a4, 310798; ZVFHMIN-NEXT: mv a5, a410799; ZVFHMIN-NEXT: slli a4, a4, 110800; ZVFHMIN-NEXT: add a4, a4, a510801; ZVFHMIN-NEXT: add a4, sp, a410802; ZVFHMIN-NEXT: addi a4, a4, 1610803; ZVFHMIN-NEXT: vs8r.v v24, (a4) # vscale x 64-byte Folded Spill10804; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v28, v0.t10805; ZVFHMIN-NEXT: vsetvli a4, zero, e16, m8, ta, ma10806; ZVFHMIN-NEXT: vmv.v.x v8, a210807; ZVFHMIN-NEXT: csrr a2, vlenb10808; ZVFHMIN-NEXT: slli a2, a2, 410809; ZVFHMIN-NEXT: add a2, sp, a210810; ZVFHMIN-NEXT: addi a2, a2, 1610811; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill10812; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma10813; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t10814; ZVFHMIN-NEXT: addi a2, sp, 1610815; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload10816; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10817; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t10818; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10819; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v24, v0.t10820; ZVFHMIN-NEXT: bltu a0, a1, .LBB302_210821; ZVFHMIN-NEXT: # %bb.1:10822; ZVFHMIN-NEXT: mv a0, a110823; ZVFHMIN-NEXT: .LBB302_2:10824; ZVFHMIN-NEXT: vmv1r.v v0, v310825; ZVFHMIN-NEXT: csrr a1, vlenb10826; ZVFHMIN-NEXT: slli a1, a1, 310827; ZVFHMIN-NEXT: add a1, sp, a110828; ZVFHMIN-NEXT: addi a1, a1, 1610829; ZVFHMIN-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload10830; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma10831; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t10832; ZVFHMIN-NEXT: addi a0, sp, 1610833; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill10834; ZVFHMIN-NEXT: csrr a0, vlenb10835; ZVFHMIN-NEXT: slli a0, a0, 310836; ZVFHMIN-NEXT: mv a1, a010837; ZVFHMIN-NEXT: slli a0, a0, 110838; ZVFHMIN-NEXT: add a0, a0, a110839; ZVFHMIN-NEXT: add a0, sp, a010840; ZVFHMIN-NEXT: addi a0, a0, 1610841; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10842; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t10843; ZVFHMIN-NEXT: csrr a0, vlenb10844; ZVFHMIN-NEXT: slli a0, a0, 310845; ZVFHMIN-NEXT: add a0, sp, a010846; ZVFHMIN-NEXT: addi a0, a0, 1610847; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill10848; ZVFHMIN-NEXT: csrr a0, vlenb10849; ZVFHMIN-NEXT: slli a0, a0, 410850; ZVFHMIN-NEXT: add a0, sp, a010851; ZVFHMIN-NEXT: addi a0, a0, 1610852; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload10853; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v24, v0.t10854; ZVFHMIN-NEXT: addi a0, sp, 1610855; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload10856; ZVFHMIN-NEXT: csrr a0, vlenb10857; ZVFHMIN-NEXT: slli a0, a0, 310858; ZVFHMIN-NEXT: add a0, sp, a010859; ZVFHMIN-NEXT: addi a0, a0, 1610860; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10861; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10862; ZVFHMIN-NEXT: vfmadd.vv v8, v24, v16, v0.t10863; ZVFHMIN-NEXT: vmv.v.v v16, v810864; ZVFHMIN-NEXT: vmv4r.v v12, v410865; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10866; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t10867; ZVFHMIN-NEXT: csrr a0, vlenb10868; ZVFHMIN-NEXT: slli a0, a0, 510869; ZVFHMIN-NEXT: add sp, sp, a010870; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1610871; ZVFHMIN-NEXT: addi sp, sp, 1610872; ZVFHMIN-NEXT: .cfi_def_cfa_offset 010873; ZVFHMIN-NEXT: ret10874 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 010875 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer10876 %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> %m, i32 %evl)10877 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negva, <vscale x 32 x half> %vb, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)10878 ret <vscale x 32 x half> %v10879}10880 10881define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {10882; ZVFH-LABEL: vfnmsub_vf_nxv32f16_commute:10883; ZVFH: # %bb.0:10884; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma10885; ZVFH-NEXT: vfnmsub.vf v8, fa0, v16, v0.t10886; ZVFH-NEXT: ret10887;10888; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_commute:10889; ZVFHMIN: # %bb.0:10890; ZVFHMIN-NEXT: addi sp, sp, -1610891; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1610892; ZVFHMIN-NEXT: csrr a1, vlenb10893; ZVFHMIN-NEXT: slli a1, a1, 510894; ZVFHMIN-NEXT: sub sp, sp, a110895; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb10896; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma10897; ZVFHMIN-NEXT: vmv1r.v v3, v010898; ZVFHMIN-NEXT: csrr a1, vlenb10899; ZVFHMIN-NEXT: slli a1, a1, 310900; ZVFHMIN-NEXT: mv a2, a110901; ZVFHMIN-NEXT: slli a1, a1, 110902; ZVFHMIN-NEXT: add a1, a1, a210903; ZVFHMIN-NEXT: add a1, sp, a110904; ZVFHMIN-NEXT: addi a1, a1, 1610905; ZVFHMIN-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill10906; ZVFHMIN-NEXT: fmv.x.h a2, fa010907; ZVFHMIN-NEXT: lui a1, 810908; ZVFHMIN-NEXT: csrr a3, vlenb10909; ZVFHMIN-NEXT: vxor.vx v16, v8, a1, v0.t10910; ZVFHMIN-NEXT: slli a1, a3, 110911; ZVFHMIN-NEXT: srli a3, a3, 210912; ZVFHMIN-NEXT: sub a4, a0, a110913; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma10914; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a310915; ZVFHMIN-NEXT: sltu a3, a0, a410916; ZVFHMIN-NEXT: addi a3, a3, -110917; ZVFHMIN-NEXT: and a3, a3, a410918; ZVFHMIN-NEXT: csrr a4, vlenb10919; ZVFHMIN-NEXT: slli a4, a4, 310920; ZVFHMIN-NEXT: add a4, sp, a410921; ZVFHMIN-NEXT: addi a4, a4, 1610922; ZVFHMIN-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill10923; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma10924; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t10925; ZVFHMIN-NEXT: csrr a4, vlenb10926; ZVFHMIN-NEXT: slli a4, a4, 310927; ZVFHMIN-NEXT: mv a5, a410928; ZVFHMIN-NEXT: slli a4, a4, 110929; ZVFHMIN-NEXT: add a4, a4, a510930; ZVFHMIN-NEXT: add a4, sp, a410931; ZVFHMIN-NEXT: addi a4, a4, 1610932; ZVFHMIN-NEXT: vl8r.v v8, (a4) # vscale x 64-byte Folded Reload10933; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t10934; ZVFHMIN-NEXT: addi a4, sp, 1610935; ZVFHMIN-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill10936; ZVFHMIN-NEXT: vsetvli a4, zero, e16, m8, ta, ma10937; ZVFHMIN-NEXT: vmv.v.x v16, a210938; ZVFHMIN-NEXT: csrr a2, vlenb10939; ZVFHMIN-NEXT: slli a2, a2, 410940; ZVFHMIN-NEXT: add a2, sp, a210941; ZVFHMIN-NEXT: addi a2, a2, 1610942; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill10943; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma10944; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t10945; ZVFHMIN-NEXT: addi a2, sp, 1610946; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload10947; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10948; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t10949; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10950; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v24, v0.t10951; ZVFHMIN-NEXT: bltu a0, a1, .LBB303_210952; ZVFHMIN-NEXT: # %bb.1:10953; ZVFHMIN-NEXT: mv a0, a110954; ZVFHMIN-NEXT: .LBB303_2:10955; ZVFHMIN-NEXT: vmv1r.v v0, v310956; ZVFHMIN-NEXT: csrr a1, vlenb10957; ZVFHMIN-NEXT: slli a1, a1, 310958; ZVFHMIN-NEXT: add a1, sp, a110959; ZVFHMIN-NEXT: addi a1, a1, 1610960; ZVFHMIN-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload10961; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma10962; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t10963; ZVFHMIN-NEXT: addi a0, sp, 1610964; ZVFHMIN-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill10965; ZVFHMIN-NEXT: csrr a0, vlenb10966; ZVFHMIN-NEXT: slli a0, a0, 310967; ZVFHMIN-NEXT: mv a1, a010968; ZVFHMIN-NEXT: slli a0, a0, 110969; ZVFHMIN-NEXT: add a0, a0, a110970; ZVFHMIN-NEXT: add a0, sp, a010971; ZVFHMIN-NEXT: addi a0, a0, 1610972; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10973; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t10974; ZVFHMIN-NEXT: csrr a0, vlenb10975; ZVFHMIN-NEXT: slli a0, a0, 310976; ZVFHMIN-NEXT: add a0, sp, a010977; ZVFHMIN-NEXT: addi a0, a0, 1610978; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill10979; ZVFHMIN-NEXT: csrr a0, vlenb10980; ZVFHMIN-NEXT: slli a0, a0, 410981; ZVFHMIN-NEXT: add a0, sp, a010982; ZVFHMIN-NEXT: addi a0, a0, 1610983; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10984; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t10985; ZVFHMIN-NEXT: csrr a0, vlenb10986; ZVFHMIN-NEXT: slli a0, a0, 310987; ZVFHMIN-NEXT: add a0, sp, a010988; ZVFHMIN-NEXT: addi a0, a0, 1610989; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload10990; ZVFHMIN-NEXT: addi a0, sp, 1610991; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload10992; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma10993; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t10994; ZVFHMIN-NEXT: vmv4r.v v12, v410995; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma10996; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v24, v0.t10997; ZVFHMIN-NEXT: csrr a0, vlenb10998; ZVFHMIN-NEXT: slli a0, a0, 510999; ZVFHMIN-NEXT: add sp, sp, a011000; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1611001; ZVFHMIN-NEXT: addi sp, sp, 1611002; ZVFHMIN-NEXT: .cfi_def_cfa_offset 011003; ZVFHMIN-NEXT: ret11004 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 011005 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer11006 %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> %m, i32 %evl)11007 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %negva, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)11008 ret <vscale x 32 x half> %v11009}11010 11011define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_unmasked(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {11012; ZVFH-LABEL: vfnmsub_vf_nxv32f16_unmasked:11013; ZVFH: # %bb.0:11014; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma11015; ZVFH-NEXT: vfnmsub.vf v8, fa0, v1611016; ZVFH-NEXT: ret11017;11018; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_unmasked:11019; ZVFHMIN: # %bb.0:11020; ZVFHMIN-NEXT: addi sp, sp, -1611021; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1611022; ZVFHMIN-NEXT: csrr a1, vlenb11023; ZVFHMIN-NEXT: slli a1, a1, 311024; ZVFHMIN-NEXT: mv a2, a111025; ZVFHMIN-NEXT: slli a1, a1, 211026; ZVFHMIN-NEXT: add a1, a1, a211027; ZVFHMIN-NEXT: sub sp, sp, a111028; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x28, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 40 * vlenb11029; ZVFHMIN-NEXT: fmv.x.h a2, fa011030; ZVFHMIN-NEXT: lui a1, 811031; ZVFHMIN-NEXT: vsetvli a3, zero, e8, m4, ta, ma11032; ZVFHMIN-NEXT: vmset.m v2411033; ZVFHMIN-NEXT: csrr a3, vlenb11034; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma11035; ZVFHMIN-NEXT: vxor.vx v8, v8, a111036; ZVFHMIN-NEXT: slli a1, a3, 111037; ZVFHMIN-NEXT: srli a3, a3, 211038; ZVFHMIN-NEXT: sub a4, a0, a111039; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma11040; ZVFHMIN-NEXT: vslidedown.vx v0, v24, a311041; ZVFHMIN-NEXT: sltu a3, a0, a411042; ZVFHMIN-NEXT: addi a3, a3, -111043; ZVFHMIN-NEXT: and a3, a3, a411044; ZVFHMIN-NEXT: csrr a4, vlenb11045; ZVFHMIN-NEXT: slli a4, a4, 311046; ZVFHMIN-NEXT: mv a5, a411047; ZVFHMIN-NEXT: slli a4, a4, 111048; ZVFHMIN-NEXT: add a4, a4, a511049; ZVFHMIN-NEXT: add a4, sp, a411050; ZVFHMIN-NEXT: addi a4, a4, 1611051; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill11052; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma11053; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t11054; ZVFHMIN-NEXT: csrr a4, vlenb11055; ZVFHMIN-NEXT: slli a4, a4, 411056; ZVFHMIN-NEXT: add a4, sp, a411057; ZVFHMIN-NEXT: addi a4, a4, 1611058; ZVFHMIN-NEXT: vs8r.v v24, (a4) # vscale x 64-byte Folded Spill11059; ZVFHMIN-NEXT: csrr a4, vlenb11060; ZVFHMIN-NEXT: slli a4, a4, 511061; ZVFHMIN-NEXT: add a4, sp, a411062; ZVFHMIN-NEXT: addi a4, a4, 1611063; ZVFHMIN-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill11064; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t11065; ZVFHMIN-NEXT: csrr a4, vlenb11066; ZVFHMIN-NEXT: slli a4, a4, 311067; ZVFHMIN-NEXT: add a4, sp, a411068; ZVFHMIN-NEXT: addi a4, a4, 1611069; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill11070; ZVFHMIN-NEXT: vsetvli a4, zero, e16, m8, ta, ma11071; ZVFHMIN-NEXT: vmv.v.x v8, a211072; ZVFHMIN-NEXT: addi a2, sp, 1611073; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill11074; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma11075; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t11076; ZVFHMIN-NEXT: csrr a2, vlenb11077; ZVFHMIN-NEXT: slli a2, a2, 411078; ZVFHMIN-NEXT: add a2, sp, a211079; ZVFHMIN-NEXT: addi a2, a2, 1611080; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload11081; ZVFHMIN-NEXT: csrr a2, vlenb11082; ZVFHMIN-NEXT: slli a2, a2, 311083; ZVFHMIN-NEXT: add a2, sp, a211084; ZVFHMIN-NEXT: addi a2, a2, 1611085; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload11086; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma11087; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t11088; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma11089; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v24, v0.t11090; ZVFHMIN-NEXT: bltu a0, a1, .LBB304_211091; ZVFHMIN-NEXT: # %bb.1:11092; ZVFHMIN-NEXT: mv a0, a111093; ZVFHMIN-NEXT: .LBB304_2:11094; ZVFHMIN-NEXT: csrr a1, vlenb11095; ZVFHMIN-NEXT: slli a1, a1, 311096; ZVFHMIN-NEXT: mv a2, a111097; ZVFHMIN-NEXT: slli a1, a1, 111098; ZVFHMIN-NEXT: add a1, a1, a211099; ZVFHMIN-NEXT: add a1, sp, a111100; ZVFHMIN-NEXT: addi a1, a1, 1611101; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload11102; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma11103; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v2411104; ZVFHMIN-NEXT: csrr a0, vlenb11105; ZVFHMIN-NEXT: slli a0, a0, 411106; ZVFHMIN-NEXT: add a0, sp, a011107; ZVFHMIN-NEXT: addi a0, a0, 1611108; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill11109; ZVFHMIN-NEXT: csrr a0, vlenb11110; ZVFHMIN-NEXT: slli a0, a0, 511111; ZVFHMIN-NEXT: add a0, sp, a011112; ZVFHMIN-NEXT: addi a0, a0, 1611113; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload11114; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v2411115; ZVFHMIN-NEXT: addi a0, sp, 1611116; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload11117; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v1611118; ZVFHMIN-NEXT: csrr a0, vlenb11119; ZVFHMIN-NEXT: slli a0, a0, 411120; ZVFHMIN-NEXT: add a0, sp, a011121; ZVFHMIN-NEXT: addi a0, a0, 1611122; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload11123; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma11124; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v011125; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma11126; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v2411127; ZVFHMIN-NEXT: csrr a0, vlenb11128; ZVFHMIN-NEXT: slli a0, a0, 311129; ZVFHMIN-NEXT: mv a1, a011130; ZVFHMIN-NEXT: slli a0, a0, 211131; ZVFHMIN-NEXT: add a0, a0, a111132; ZVFHMIN-NEXT: add sp, sp, a011133; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1611134; ZVFHMIN-NEXT: addi sp, sp, 1611135; ZVFHMIN-NEXT: .cfi_def_cfa_offset 011136; ZVFHMIN-NEXT: ret11137 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 011138 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer11139 %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)11140 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negva, <vscale x 32 x half> %vb, <vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)11141 ret <vscale x 32 x half> %v11142}11143 11144define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_unmasked_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {11145; ZVFH-LABEL: vfnmsub_vf_nxv32f16_unmasked_commute:11146; ZVFH: # %bb.0:11147; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma11148; ZVFH-NEXT: vfnmsub.vf v8, fa0, v1611149; ZVFH-NEXT: ret11150;11151; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_unmasked_commute:11152; ZVFHMIN: # %bb.0:11153; ZVFHMIN-NEXT: addi sp, sp, -1611154; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1611155; ZVFHMIN-NEXT: csrr a1, vlenb11156; ZVFHMIN-NEXT: slli a1, a1, 511157; ZVFHMIN-NEXT: sub sp, sp, a111158; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb11159; ZVFHMIN-NEXT: fmv.x.h a2, fa011160; ZVFHMIN-NEXT: lui a1, 811161; ZVFHMIN-NEXT: vsetvli a3, zero, e8, m4, ta, ma11162; ZVFHMIN-NEXT: vmset.m v2411163; ZVFHMIN-NEXT: csrr a3, vlenb11164; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma11165; ZVFHMIN-NEXT: vxor.vx v8, v8, a111166; ZVFHMIN-NEXT: slli a1, a3, 111167; ZVFHMIN-NEXT: srli a3, a3, 211168; ZVFHMIN-NEXT: sub a4, a0, a111169; ZVFHMIN-NEXT: vsetvli a5, zero, e8, mf2, ta, ma11170; ZVFHMIN-NEXT: vslidedown.vx v0, v24, a311171; ZVFHMIN-NEXT: sltu a3, a0, a411172; ZVFHMIN-NEXT: addi a3, a3, -111173; ZVFHMIN-NEXT: and a3, a3, a411174; ZVFHMIN-NEXT: csrr a4, vlenb11175; ZVFHMIN-NEXT: slli a4, a4, 411176; ZVFHMIN-NEXT: add a4, sp, a411177; ZVFHMIN-NEXT: addi a4, a4, 1611178; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill11179; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma11180; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t11181; ZVFHMIN-NEXT: csrr a4, vlenb11182; ZVFHMIN-NEXT: slli a4, a4, 311183; ZVFHMIN-NEXT: mv a5, a411184; ZVFHMIN-NEXT: slli a4, a4, 111185; ZVFHMIN-NEXT: add a4, a4, a511186; ZVFHMIN-NEXT: add a4, sp, a411187; ZVFHMIN-NEXT: addi a4, a4, 1611188; ZVFHMIN-NEXT: vs8r.v v16, (a4) # vscale x 64-byte Folded Spill11189; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t11190; ZVFHMIN-NEXT: csrr a4, vlenb11191; ZVFHMIN-NEXT: slli a4, a4, 311192; ZVFHMIN-NEXT: add a4, sp, a411193; ZVFHMIN-NEXT: addi a4, a4, 1611194; ZVFHMIN-NEXT: vs8r.v v8, (a4) # vscale x 64-byte Folded Spill11195; ZVFHMIN-NEXT: vsetvli a4, zero, e16, m8, ta, ma11196; ZVFHMIN-NEXT: vmv.v.x v8, a211197; ZVFHMIN-NEXT: addi a2, sp, 1611198; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill11199; ZVFHMIN-NEXT: vsetvli zero, a3, e16, m4, ta, ma11200; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t11201; ZVFHMIN-NEXT: csrr a2, vlenb11202; ZVFHMIN-NEXT: slli a2, a2, 311203; ZVFHMIN-NEXT: add a2, sp, a211204; ZVFHMIN-NEXT: addi a2, a2, 1611205; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload11206; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma11207; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v8, v0.t11208; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma11209; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v24, v0.t11210; ZVFHMIN-NEXT: bltu a0, a1, .LBB305_211211; ZVFHMIN-NEXT: # %bb.1:11212; ZVFHMIN-NEXT: mv a0, a111213; ZVFHMIN-NEXT: .LBB305_2:11214; ZVFHMIN-NEXT: csrr a1, vlenb11215; ZVFHMIN-NEXT: slli a1, a1, 411216; ZVFHMIN-NEXT: add a1, sp, a111217; ZVFHMIN-NEXT: addi a1, a1, 1611218; ZVFHMIN-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload11219; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma11220; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v2411221; ZVFHMIN-NEXT: csrr a0, vlenb11222; ZVFHMIN-NEXT: slli a0, a0, 311223; ZVFHMIN-NEXT: add a0, sp, a011224; ZVFHMIN-NEXT: addi a0, a0, 1611225; ZVFHMIN-NEXT: vs8r.v v0, (a0) # vscale x 64-byte Folded Spill11226; ZVFHMIN-NEXT: csrr a0, vlenb11227; ZVFHMIN-NEXT: slli a0, a0, 311228; ZVFHMIN-NEXT: mv a1, a011229; ZVFHMIN-NEXT: slli a0, a0, 111230; ZVFHMIN-NEXT: add a0, a0, a111231; ZVFHMIN-NEXT: add a0, sp, a011232; ZVFHMIN-NEXT: addi a0, a0, 1611233; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload11234; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v2411235; ZVFHMIN-NEXT: addi a0, sp, 1611236; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload11237; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v1611238; ZVFHMIN-NEXT: csrr a0, vlenb11239; ZVFHMIN-NEXT: slli a0, a0, 311240; ZVFHMIN-NEXT: add a0, sp, a011241; ZVFHMIN-NEXT: addi a0, a0, 1611242; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload11243; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma11244; ZVFHMIN-NEXT: vfmadd.vv v24, v16, v011245; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma11246; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v2411247; ZVFHMIN-NEXT: csrr a0, vlenb11248; ZVFHMIN-NEXT: slli a0, a0, 511249; ZVFHMIN-NEXT: add sp, sp, a011250; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1611251; ZVFHMIN-NEXT: addi sp, sp, 1611252; ZVFHMIN-NEXT: .cfi_def_cfa_offset 011253; ZVFHMIN-NEXT: ret11254 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 011255 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer11256 %negva = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> splat (i1 true), i32 %evl)11257 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x half> %negva, <vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)11258 ret <vscale x 32 x half> %v11259}11260 11261define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_neg_splat(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {11262; ZVFH-LABEL: vfnmsub_vf_nxv32f16_neg_splat:11263; ZVFH: # %bb.0:11264; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma11265; ZVFH-NEXT: vfnmsub.vf v8, fa0, v16, v0.t11266; ZVFH-NEXT: ret11267;11268; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_neg_splat:11269; ZVFHMIN: # %bb.0:11270; ZVFHMIN-NEXT: addi sp, sp, -1611271; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1611272; ZVFHMIN-NEXT: csrr a1, vlenb11273; ZVFHMIN-NEXT: slli a1, a1, 511274; ZVFHMIN-NEXT: sub sp, sp, a111275; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb11276; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma11277; ZVFHMIN-NEXT: vmv1r.v v3, v011278; ZVFHMIN-NEXT: csrr a1, vlenb11279; ZVFHMIN-NEXT: slli a1, a1, 411280; ZVFHMIN-NEXT: add a1, sp, a111281; ZVFHMIN-NEXT: addi a1, a1, 1611282; ZVFHMIN-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill11283; ZVFHMIN-NEXT: csrr a1, vlenb11284; ZVFHMIN-NEXT: slli a1, a1, 311285; ZVFHMIN-NEXT: mv a2, a111286; ZVFHMIN-NEXT: slli a1, a1, 111287; ZVFHMIN-NEXT: add a1, a1, a211288; ZVFHMIN-NEXT: add a1, sp, a111289; ZVFHMIN-NEXT: addi a1, a1, 1611290; ZVFHMIN-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill11291; ZVFHMIN-NEXT: fmv.x.h a1, fa011292; ZVFHMIN-NEXT: lui a2, 811293; ZVFHMIN-NEXT: csrr a3, vlenb11294; ZVFHMIN-NEXT: vmv.v.x v16, a111295; ZVFHMIN-NEXT: slli a1, a3, 111296; ZVFHMIN-NEXT: srli a3, a3, 211297; ZVFHMIN-NEXT: vxor.vx v8, v16, a2, v0.t11298; ZVFHMIN-NEXT: sub a2, a0, a111299; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma11300; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a311301; ZVFHMIN-NEXT: sltu a3, a0, a211302; ZVFHMIN-NEXT: addi a3, a3, -111303; ZVFHMIN-NEXT: and a2, a3, a211304; ZVFHMIN-NEXT: csrr a3, vlenb11305; ZVFHMIN-NEXT: slli a3, a3, 311306; ZVFHMIN-NEXT: add a3, sp, a311307; ZVFHMIN-NEXT: addi a3, a3, 1611308; ZVFHMIN-NEXT: vs8r.v v8, (a3) # vscale x 64-byte Folded Spill11309; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma11310; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t11311; ZVFHMIN-NEXT: csrr a2, vlenb11312; ZVFHMIN-NEXT: slli a2, a2, 411313; ZVFHMIN-NEXT: add a2, sp, a211314; ZVFHMIN-NEXT: addi a2, a2, 1611315; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload11316; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t11317; ZVFHMIN-NEXT: addi a2, sp, 1611318; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill11319; ZVFHMIN-NEXT: csrr a2, vlenb11320; ZVFHMIN-NEXT: slli a2, a2, 311321; ZVFHMIN-NEXT: mv a3, a211322; ZVFHMIN-NEXT: slli a2, a2, 111323; ZVFHMIN-NEXT: add a2, a2, a311324; ZVFHMIN-NEXT: add a2, sp, a211325; ZVFHMIN-NEXT: addi a2, a2, 1611326; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload11327; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t11328; ZVFHMIN-NEXT: addi a2, sp, 1611329; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload11330; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma11331; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t11332; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma11333; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v24, v0.t11334; ZVFHMIN-NEXT: bltu a0, a1, .LBB306_211335; ZVFHMIN-NEXT: # %bb.1:11336; ZVFHMIN-NEXT: mv a0, a111337; ZVFHMIN-NEXT: .LBB306_2:11338; ZVFHMIN-NEXT: vmv1r.v v0, v311339; ZVFHMIN-NEXT: csrr a1, vlenb11340; ZVFHMIN-NEXT: slli a1, a1, 311341; ZVFHMIN-NEXT: add a1, sp, a111342; ZVFHMIN-NEXT: addi a1, a1, 1611343; ZVFHMIN-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload11344; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma11345; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t11346; ZVFHMIN-NEXT: addi a0, sp, 1611347; ZVFHMIN-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill11348; ZVFHMIN-NEXT: csrr a0, vlenb11349; ZVFHMIN-NEXT: slli a0, a0, 411350; ZVFHMIN-NEXT: add a0, sp, a011351; ZVFHMIN-NEXT: addi a0, a0, 1611352; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload11353; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v16, v0.t11354; ZVFHMIN-NEXT: csrr a0, vlenb11355; ZVFHMIN-NEXT: slli a0, a0, 311356; ZVFHMIN-NEXT: add a0, sp, a011357; ZVFHMIN-NEXT: addi a0, a0, 1611358; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill11359; ZVFHMIN-NEXT: csrr a0, vlenb11360; ZVFHMIN-NEXT: slli a0, a0, 311361; ZVFHMIN-NEXT: mv a1, a011362; ZVFHMIN-NEXT: slli a0, a0, 111363; ZVFHMIN-NEXT: add a0, a0, a111364; ZVFHMIN-NEXT: add a0, sp, a011365; ZVFHMIN-NEXT: addi a0, a0, 1611366; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload11367; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t11368; ZVFHMIN-NEXT: csrr a0, vlenb11369; ZVFHMIN-NEXT: slli a0, a0, 311370; ZVFHMIN-NEXT: add a0, sp, a011371; ZVFHMIN-NEXT: addi a0, a0, 1611372; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload11373; ZVFHMIN-NEXT: addi a0, sp, 1611374; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload11375; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma11376; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t11377; ZVFHMIN-NEXT: vmv4r.v v12, v411378; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma11379; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v24, v0.t11380; ZVFHMIN-NEXT: csrr a0, vlenb11381; ZVFHMIN-NEXT: slli a0, a0, 511382; ZVFHMIN-NEXT: add sp, sp, a011383; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1611384; ZVFHMIN-NEXT: addi sp, sp, 1611385; ZVFHMIN-NEXT: .cfi_def_cfa_offset 011386; ZVFHMIN-NEXT: ret11387 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 011388 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer11389 %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 %evl)11390 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negvb, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)11391 ret <vscale x 32 x half> %v11392}11393 11394define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_neg_splat_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 zeroext %evl) {11395; ZVFH-LABEL: vfnmsub_vf_nxv32f16_neg_splat_commute:11396; ZVFH: # %bb.0:11397; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma11398; ZVFH-NEXT: vfnmsub.vf v8, fa0, v16, v0.t11399; ZVFH-NEXT: ret11400;11401; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_neg_splat_commute:11402; ZVFHMIN: # %bb.0:11403; ZVFHMIN-NEXT: addi sp, sp, -1611404; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1611405; ZVFHMIN-NEXT: csrr a1, vlenb11406; ZVFHMIN-NEXT: slli a1, a1, 511407; ZVFHMIN-NEXT: sub sp, sp, a111408; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb11409; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma11410; ZVFHMIN-NEXT: vmv1r.v v3, v011411; ZVFHMIN-NEXT: vmv8r.v v24, v1611412; ZVFHMIN-NEXT: csrr a1, vlenb11413; ZVFHMIN-NEXT: slli a1, a1, 311414; ZVFHMIN-NEXT: mv a2, a111415; ZVFHMIN-NEXT: slli a1, a1, 111416; ZVFHMIN-NEXT: add a1, a1, a211417; ZVFHMIN-NEXT: add a1, sp, a111418; ZVFHMIN-NEXT: addi a1, a1, 1611419; ZVFHMIN-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill11420; ZVFHMIN-NEXT: fmv.x.h a1, fa011421; ZVFHMIN-NEXT: lui a2, 811422; ZVFHMIN-NEXT: csrr a3, vlenb11423; ZVFHMIN-NEXT: vmv.v.x v16, a111424; ZVFHMIN-NEXT: slli a1, a3, 111425; ZVFHMIN-NEXT: srli a3, a3, 211426; ZVFHMIN-NEXT: vxor.vx v8, v16, a2, v0.t11427; ZVFHMIN-NEXT: sub a2, a0, a111428; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma11429; ZVFHMIN-NEXT: vslidedown.vx v0, v0, a311430; ZVFHMIN-NEXT: sltu a3, a0, a211431; ZVFHMIN-NEXT: addi a3, a3, -111432; ZVFHMIN-NEXT: and a2, a3, a211433; ZVFHMIN-NEXT: csrr a3, vlenb11434; ZVFHMIN-NEXT: slli a3, a3, 311435; ZVFHMIN-NEXT: add a3, sp, a311436; ZVFHMIN-NEXT: addi a3, a3, 1611437; ZVFHMIN-NEXT: vs8r.v v8, (a3) # vscale x 64-byte Folded Spill11438; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma11439; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t11440; ZVFHMIN-NEXT: addi a2, sp, 1611441; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill11442; ZVFHMIN-NEXT: csrr a2, vlenb11443; ZVFHMIN-NEXT: slli a2, a2, 411444; ZVFHMIN-NEXT: add a2, sp, a211445; ZVFHMIN-NEXT: addi a2, a2, 1611446; ZVFHMIN-NEXT: vs8r.v v24, (a2) # vscale x 64-byte Folded Spill11447; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v28, v0.t11448; ZVFHMIN-NEXT: csrr a2, vlenb11449; ZVFHMIN-NEXT: slli a2, a2, 311450; ZVFHMIN-NEXT: mv a3, a211451; ZVFHMIN-NEXT: slli a2, a2, 111452; ZVFHMIN-NEXT: add a2, a2, a311453; ZVFHMIN-NEXT: add a2, sp, a211454; ZVFHMIN-NEXT: addi a2, a2, 1611455; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload11456; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t11457; ZVFHMIN-NEXT: addi a2, sp, 1611458; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload11459; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma11460; ZVFHMIN-NEXT: vfmadd.vv v8, v24, v16, v0.t11461; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma11462; ZVFHMIN-NEXT: vfncvt.f.f.w v4, v8, v0.t11463; ZVFHMIN-NEXT: bltu a0, a1, .LBB307_211464; ZVFHMIN-NEXT: # %bb.1:11465; ZVFHMIN-NEXT: mv a0, a111466; ZVFHMIN-NEXT: .LBB307_2:11467; ZVFHMIN-NEXT: vmv1r.v v0, v311468; ZVFHMIN-NEXT: csrr a1, vlenb11469; ZVFHMIN-NEXT: slli a1, a1, 311470; ZVFHMIN-NEXT: add a1, sp, a111471; ZVFHMIN-NEXT: addi a1, a1, 1611472; ZVFHMIN-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload11473; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma11474; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t11475; ZVFHMIN-NEXT: addi a0, sp, 1611476; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill11477; ZVFHMIN-NEXT: csrr a0, vlenb11478; ZVFHMIN-NEXT: slli a0, a0, 411479; ZVFHMIN-NEXT: add a0, sp, a011480; ZVFHMIN-NEXT: addi a0, a0, 1611481; ZVFHMIN-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload11482; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t11483; ZVFHMIN-NEXT: csrr a0, vlenb11484; ZVFHMIN-NEXT: slli a0, a0, 311485; ZVFHMIN-NEXT: add a0, sp, a011486; ZVFHMIN-NEXT: addi a0, a0, 1611487; ZVFHMIN-NEXT: vs8r.v v16, (a0) # vscale x 64-byte Folded Spill11488; ZVFHMIN-NEXT: csrr a0, vlenb11489; ZVFHMIN-NEXT: slli a0, a0, 311490; ZVFHMIN-NEXT: mv a1, a011491; ZVFHMIN-NEXT: slli a0, a0, 111492; ZVFHMIN-NEXT: add a0, a0, a111493; ZVFHMIN-NEXT: add a0, sp, a011494; ZVFHMIN-NEXT: addi a0, a0, 1611495; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload11496; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v24, v0.t11497; ZVFHMIN-NEXT: addi a0, sp, 1611498; ZVFHMIN-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload11499; ZVFHMIN-NEXT: csrr a0, vlenb11500; ZVFHMIN-NEXT: slli a0, a0, 311501; ZVFHMIN-NEXT: add a0, sp, a011502; ZVFHMIN-NEXT: addi a0, a0, 1611503; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload11504; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma11505; ZVFHMIN-NEXT: vfmadd.vv v8, v24, v16, v0.t11506; ZVFHMIN-NEXT: vmv.v.v v16, v811507; ZVFHMIN-NEXT: vmv4r.v v12, v411508; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma11509; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v16, v0.t11510; ZVFHMIN-NEXT: csrr a0, vlenb11511; ZVFHMIN-NEXT: slli a0, a0, 511512; ZVFHMIN-NEXT: add sp, sp, a011513; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1611514; ZVFHMIN-NEXT: addi sp, sp, 1611515; ZVFHMIN-NEXT: .cfi_def_cfa_offset 011516; ZVFHMIN-NEXT: ret11517 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 011518 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer11519 %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 %evl)11520 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negvb, <vscale x 32 x half> %va, <vscale x 32 x half> %vc, <vscale x 32 x i1> %m, i32 %evl)11521 ret <vscale x 32 x half> %v11522}11523 11524define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_neg_splat_unmasked(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {11525; ZVFH-LABEL: vfnmsub_vf_nxv32f16_neg_splat_unmasked:11526; ZVFH: # %bb.0:11527; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma11528; ZVFH-NEXT: vfnmsub.vf v8, fa0, v1611529; ZVFH-NEXT: ret11530;11531; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_neg_splat_unmasked:11532; ZVFHMIN: # %bb.0:11533; ZVFHMIN-NEXT: addi sp, sp, -1611534; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1611535; ZVFHMIN-NEXT: csrr a1, vlenb11536; ZVFHMIN-NEXT: slli a1, a1, 511537; ZVFHMIN-NEXT: sub sp, sp, a111538; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb11539; ZVFHMIN-NEXT: csrr a1, vlenb11540; ZVFHMIN-NEXT: slli a1, a1, 311541; ZVFHMIN-NEXT: mv a2, a111542; ZVFHMIN-NEXT: slli a1, a1, 111543; ZVFHMIN-NEXT: add a1, a1, a211544; ZVFHMIN-NEXT: add a1, sp, a111545; ZVFHMIN-NEXT: addi a1, a1, 1611546; ZVFHMIN-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill11547; ZVFHMIN-NEXT: csrr a1, vlenb11548; ZVFHMIN-NEXT: slli a1, a1, 411549; ZVFHMIN-NEXT: add a1, sp, a111550; ZVFHMIN-NEXT: addi a1, a1, 1611551; ZVFHMIN-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill11552; ZVFHMIN-NEXT: fmv.x.h a1, fa011553; ZVFHMIN-NEXT: lui a2, 811554; ZVFHMIN-NEXT: vsetvli a3, zero, e8, m4, ta, ma11555; ZVFHMIN-NEXT: vmset.m v811556; ZVFHMIN-NEXT: csrr a3, vlenb11557; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma11558; ZVFHMIN-NEXT: vmv.v.x v16, a111559; ZVFHMIN-NEXT: slli a1, a3, 111560; ZVFHMIN-NEXT: srli a3, a3, 211561; ZVFHMIN-NEXT: vxor.vx v16, v16, a211562; ZVFHMIN-NEXT: sub a2, a0, a111563; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma11564; ZVFHMIN-NEXT: vslidedown.vx v0, v8, a311565; ZVFHMIN-NEXT: sltu a3, a0, a211566; ZVFHMIN-NEXT: addi a3, a3, -111567; ZVFHMIN-NEXT: and a2, a3, a211568; ZVFHMIN-NEXT: vmv4r.v v8, v1611569; ZVFHMIN-NEXT: csrr a3, vlenb11570; ZVFHMIN-NEXT: slli a3, a3, 311571; ZVFHMIN-NEXT: add a3, sp, a311572; ZVFHMIN-NEXT: addi a3, a3, 1611573; ZVFHMIN-NEXT: vs8r.v v8, (a3) # vscale x 64-byte Folded Spill11574; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma11575; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v20, v0.t11576; ZVFHMIN-NEXT: csrr a2, vlenb11577; ZVFHMIN-NEXT: slli a2, a2, 311578; ZVFHMIN-NEXT: mv a3, a211579; ZVFHMIN-NEXT: slli a2, a2, 111580; ZVFHMIN-NEXT: add a2, a2, a311581; ZVFHMIN-NEXT: add a2, sp, a211582; ZVFHMIN-NEXT: addi a2, a2, 1611583; ZVFHMIN-NEXT: vl8r.v v8, (a2) # vscale x 64-byte Folded Reload11584; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v12, v0.t11585; ZVFHMIN-NEXT: addi a2, sp, 1611586; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill11587; ZVFHMIN-NEXT: csrr a2, vlenb11588; ZVFHMIN-NEXT: slli a2, a2, 411589; ZVFHMIN-NEXT: add a2, sp, a211590; ZVFHMIN-NEXT: addi a2, a2, 1611591; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload11592; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t11593; ZVFHMIN-NEXT: addi a2, sp, 1611594; ZVFHMIN-NEXT: vl8r.v v16, (a2) # vscale x 64-byte Folded Reload11595; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma11596; ZVFHMIN-NEXT: vfmadd.vv v24, v8, v16, v0.t11597; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma11598; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v24, v0.t11599; ZVFHMIN-NEXT: bltu a0, a1, .LBB308_211600; ZVFHMIN-NEXT: # %bb.1:11601; ZVFHMIN-NEXT: mv a0, a111602; ZVFHMIN-NEXT: .LBB308_2:11603; ZVFHMIN-NEXT: csrr a1, vlenb11604; ZVFHMIN-NEXT: slli a1, a1, 311605; ZVFHMIN-NEXT: add a1, sp, a111606; ZVFHMIN-NEXT: addi a1, a1, 1611607; ZVFHMIN-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload11608; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma11609; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v1611610; ZVFHMIN-NEXT: addi a0, sp, 1611611; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill11612; ZVFHMIN-NEXT: csrr a0, vlenb11613; ZVFHMIN-NEXT: slli a0, a0, 311614; ZVFHMIN-NEXT: mv a1, a011615; ZVFHMIN-NEXT: slli a0, a0, 111616; ZVFHMIN-NEXT: add a0, a0, a111617; ZVFHMIN-NEXT: add a0, sp, a011618; ZVFHMIN-NEXT: addi a0, a0, 1611619; ZVFHMIN-NEXT: vl8r.v v0, (a0) # vscale x 64-byte Folded Reload11620; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v011621; ZVFHMIN-NEXT: csrr a0, vlenb11622; ZVFHMIN-NEXT: slli a0, a0, 411623; ZVFHMIN-NEXT: add a0, sp, a011624; ZVFHMIN-NEXT: addi a0, a0, 1611625; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload11626; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v1611627; ZVFHMIN-NEXT: addi a0, sp, 1611628; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload11629; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma11630; ZVFHMIN-NEXT: vfmadd.vv v0, v16, v2411631; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma11632; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v011633; ZVFHMIN-NEXT: csrr a0, vlenb11634; ZVFHMIN-NEXT: slli a0, a0, 511635; ZVFHMIN-NEXT: add sp, sp, a011636; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1611637; ZVFHMIN-NEXT: addi sp, sp, 1611638; ZVFHMIN-NEXT: .cfi_def_cfa_offset 011639; ZVFHMIN-NEXT: ret11640 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 011641 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer11642 %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)11643 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %negvb, <vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)11644 ret <vscale x 32 x half> %v11645}11646 11647define <vscale x 32 x half> @vfnmsub_vf_nxv32f16_neg_splat_unmasked_commute(<vscale x 32 x half> %va, half %b, <vscale x 32 x half> %vc, i32 zeroext %evl) {11648; ZVFH-LABEL: vfnmsub_vf_nxv32f16_neg_splat_unmasked_commute:11649; ZVFH: # %bb.0:11650; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma11651; ZVFH-NEXT: vfnmsub.vf v8, fa0, v1611652; ZVFH-NEXT: ret11653;11654; ZVFHMIN-LABEL: vfnmsub_vf_nxv32f16_neg_splat_unmasked_commute:11655; ZVFHMIN: # %bb.0:11656; ZVFHMIN-NEXT: addi sp, sp, -1611657; ZVFHMIN-NEXT: .cfi_def_cfa_offset 1611658; ZVFHMIN-NEXT: csrr a1, vlenb11659; ZVFHMIN-NEXT: slli a1, a1, 511660; ZVFHMIN-NEXT: sub sp, sp, a111661; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 32 * vlenb11662; ZVFHMIN-NEXT: vsetvli a1, zero, e8, m4, ta, ma11663; ZVFHMIN-NEXT: vmv8r.v v24, v1611664; ZVFHMIN-NEXT: csrr a1, vlenb11665; ZVFHMIN-NEXT: slli a1, a1, 311666; ZVFHMIN-NEXT: mv a2, a111667; ZVFHMIN-NEXT: slli a1, a1, 111668; ZVFHMIN-NEXT: add a1, a1, a211669; ZVFHMIN-NEXT: add a1, sp, a111670; ZVFHMIN-NEXT: addi a1, a1, 1611671; ZVFHMIN-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill11672; ZVFHMIN-NEXT: fmv.x.h a1, fa011673; ZVFHMIN-NEXT: lui a2, 811674; ZVFHMIN-NEXT: vmset.m v811675; ZVFHMIN-NEXT: csrr a3, vlenb11676; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma11677; ZVFHMIN-NEXT: vmv.v.x v16, a111678; ZVFHMIN-NEXT: slli a1, a3, 111679; ZVFHMIN-NEXT: srli a3, a3, 211680; ZVFHMIN-NEXT: vxor.vx v16, v16, a211681; ZVFHMIN-NEXT: sub a2, a0, a111682; ZVFHMIN-NEXT: vsetvli a4, zero, e8, mf2, ta, ma11683; ZVFHMIN-NEXT: vslidedown.vx v0, v8, a311684; ZVFHMIN-NEXT: sltu a3, a0, a211685; ZVFHMIN-NEXT: addi a3, a3, -111686; ZVFHMIN-NEXT: and a2, a3, a211687; ZVFHMIN-NEXT: vmv4r.v v8, v1611688; ZVFHMIN-NEXT: csrr a3, vlenb11689; ZVFHMIN-NEXT: slli a3, a3, 311690; ZVFHMIN-NEXT: add a3, sp, a311691; ZVFHMIN-NEXT: addi a3, a3, 1611692; ZVFHMIN-NEXT: vs8r.v v8, (a3) # vscale x 64-byte Folded Spill11693; ZVFHMIN-NEXT: vsetvli zero, a2, e16, m4, ta, ma11694; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v20, v0.t11695; ZVFHMIN-NEXT: addi a2, sp, 1611696; ZVFHMIN-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill11697; ZVFHMIN-NEXT: vmv4r.v v16, v2411698; ZVFHMIN-NEXT: csrr a2, vlenb11699; ZVFHMIN-NEXT: slli a2, a2, 411700; ZVFHMIN-NEXT: add a2, sp, a211701; ZVFHMIN-NEXT: addi a2, a2, 1611702; ZVFHMIN-NEXT: vs8r.v v16, (a2) # vscale x 64-byte Folded Spill11703; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v28, v0.t11704; ZVFHMIN-NEXT: csrr a2, vlenb11705; ZVFHMIN-NEXT: slli a2, a2, 311706; ZVFHMIN-NEXT: mv a3, a211707; ZVFHMIN-NEXT: slli a2, a2, 111708; ZVFHMIN-NEXT: add a2, a2, a311709; ZVFHMIN-NEXT: add a2, sp, a211710; ZVFHMIN-NEXT: addi a2, a2, 1611711; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload11712; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v28, v0.t11713; ZVFHMIN-NEXT: addi a2, sp, 1611714; ZVFHMIN-NEXT: vl8r.v v24, (a2) # vscale x 64-byte Folded Reload11715; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma11716; ZVFHMIN-NEXT: vfmadd.vv v16, v24, v8, v0.t11717; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma11718; ZVFHMIN-NEXT: vfncvt.f.f.w v12, v16, v0.t11719; ZVFHMIN-NEXT: bltu a0, a1, .LBB309_211720; ZVFHMIN-NEXT: # %bb.1:11721; ZVFHMIN-NEXT: mv a0, a111722; ZVFHMIN-NEXT: .LBB309_2:11723; ZVFHMIN-NEXT: csrr a1, vlenb11724; ZVFHMIN-NEXT: slli a1, a1, 311725; ZVFHMIN-NEXT: add a1, sp, a111726; ZVFHMIN-NEXT: addi a1, a1, 1611727; ZVFHMIN-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload11728; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma11729; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v1611730; ZVFHMIN-NEXT: addi a0, sp, 1611731; ZVFHMIN-NEXT: vs8r.v v24, (a0) # vscale x 64-byte Folded Spill11732; ZVFHMIN-NEXT: csrr a0, vlenb11733; ZVFHMIN-NEXT: slli a0, a0, 411734; ZVFHMIN-NEXT: add a0, sp, a011735; ZVFHMIN-NEXT: addi a0, a0, 1611736; ZVFHMIN-NEXT: vl8r.v v0, (a0) # vscale x 64-byte Folded Reload11737; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v011738; ZVFHMIN-NEXT: csrr a0, vlenb11739; ZVFHMIN-NEXT: slli a0, a0, 311740; ZVFHMIN-NEXT: mv a1, a011741; ZVFHMIN-NEXT: slli a0, a0, 111742; ZVFHMIN-NEXT: add a0, a0, a111743; ZVFHMIN-NEXT: add a0, sp, a011744; ZVFHMIN-NEXT: addi a0, a0, 1611745; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload11746; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v1611747; ZVFHMIN-NEXT: addi a0, sp, 1611748; ZVFHMIN-NEXT: vl8r.v v16, (a0) # vscale x 64-byte Folded Reload11749; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma11750; ZVFHMIN-NEXT: vfmadd.vv v0, v16, v2411751; ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, ta, ma11752; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v011753; ZVFHMIN-NEXT: csrr a0, vlenb11754; ZVFHMIN-NEXT: slli a0, a0, 511755; ZVFHMIN-NEXT: add sp, sp, a011756; ZVFHMIN-NEXT: .cfi_def_cfa sp, 1611757; ZVFHMIN-NEXT: addi sp, sp, 1611758; ZVFHMIN-NEXT: .cfi_def_cfa_offset 011759; ZVFHMIN-NEXT: ret11760 %elt.head = insertelement <vscale x 32 x half> poison, half %b, i32 011761 %vb = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer11762 %negvb = call <vscale x 32 x half> @llvm.vp.fneg.nxv32f16(<vscale x 32 x half> %vb, <vscale x 32 x i1> splat (i1 true), i32 %evl)11763 %v = call <vscale x 32 x half> @llvm.vp.fma.nxv32f16(<vscale x 32 x half> %negvb, <vscale x 32 x half> %va, <vscale x 32 x half> %vc, <vscale x 32 x i1> splat (i1 true), i32 %evl)11764 ret <vscale x 32 x half> %v11765}11766 11767define <vscale x 1 x float> @vfmsub_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {11768; CHECK-LABEL: vfmsub_vv_nxv1f32:11769; CHECK: # %bb.0:11770; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11771; CHECK-NEXT: vfmsub.vv v9, v8, v10, v0.t11772; CHECK-NEXT: vmv1r.v v8, v911773; CHECK-NEXT: ret11774 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)11775 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)11776 ret <vscale x 1 x float> %v11777}11778 11779define <vscale x 1 x float> @vfmsub_vv_nxv1f32_unmasked(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {11780; CHECK-LABEL: vfmsub_vv_nxv1f32_unmasked:11781; CHECK: # %bb.0:11782; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11783; CHECK-NEXT: vfmsub.vv v8, v9, v1011784; CHECK-NEXT: ret11785 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)11786 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11787 ret <vscale x 1 x float> %v11788}11789 11790define <vscale x 1 x float> @vfmsub_vf_nxv1f32(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {11791; CHECK-LABEL: vfmsub_vf_nxv1f32:11792; CHECK: # %bb.0:11793; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11794; CHECK-NEXT: vfmsub.vf v8, fa0, v9, v0.t11795; CHECK-NEXT: ret11796 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 011797 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer11798 %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)11799 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x float> %negvc, <vscale x 1 x i1> %m, i32 %evl)11800 ret <vscale x 1 x float> %v11801}11802 11803define <vscale x 1 x float> @vfmsub_vf_nxv1f32_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {11804; CHECK-LABEL: vfmsub_vf_nxv1f32_commute:11805; CHECK: # %bb.0:11806; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11807; CHECK-NEXT: vfmsub.vf v8, fa0, v9, v0.t11808; CHECK-NEXT: ret11809 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 011810 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer11811 %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)11812 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %va, <vscale x 1 x float> %negvc, <vscale x 1 x i1> %m, i32 %evl)11813 ret <vscale x 1 x float> %v11814}11815 11816define <vscale x 1 x float> @vfmsub_vf_nxv1f32_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {11817; CHECK-LABEL: vfmsub_vf_nxv1f32_unmasked:11818; CHECK: # %bb.0:11819; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11820; CHECK-NEXT: vfmsub.vf v8, fa0, v911821; CHECK-NEXT: ret11822 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 011823 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer11824 %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11825 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x float> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11826 ret <vscale x 1 x float> %v11827}11828 11829define <vscale x 1 x float> @vfmsub_vf_nxv1f32_unmasked_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {11830; CHECK-LABEL: vfmsub_vf_nxv1f32_unmasked_commute:11831; CHECK: # %bb.0:11832; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11833; CHECK-NEXT: vfmsub.vf v8, fa0, v911834; CHECK-NEXT: ret11835 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 011836 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer11837 %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11838 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %va, <vscale x 1 x float> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11839 ret <vscale x 1 x float> %v11840}11841 11842define <vscale x 1 x float> @vfnmadd_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {11843; CHECK-LABEL: vfnmadd_vv_nxv1f32:11844; CHECK: # %bb.0:11845; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11846; CHECK-NEXT: vfnmadd.vv v9, v8, v10, v0.t11847; CHECK-NEXT: vmv1r.v v8, v911848; CHECK-NEXT: ret11849 %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)11850 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)11851 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negb, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)11852 ret <vscale x 1 x float> %v11853}11854 11855define <vscale x 1 x float> @vfnmadd_vv_nxv1f32_commuted(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {11856; CHECK-LABEL: vfnmadd_vv_nxv1f32_commuted:11857; CHECK: # %bb.0:11858; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11859; CHECK-NEXT: vfnmadd.vv v8, v9, v10, v0.t11860; CHECK-NEXT: ret11861 %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)11862 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)11863 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negb, <vscale x 1 x float> %va, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)11864 ret <vscale x 1 x float> %v11865}11866 11867define <vscale x 1 x float> @vfnmadd_vv_nxv1f32_unmasked(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {11868; CHECK-LABEL: vfnmadd_vv_nxv1f32_unmasked:11869; CHECK: # %bb.0:11870; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11871; CHECK-NEXT: vfnmadd.vv v8, v9, v1011872; CHECK-NEXT: ret11873 %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)11874 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)11875 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negb, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11876 ret <vscale x 1 x float> %v11877}11878 11879define <vscale x 1 x float> @vfnmadd_vv_nxv1f32_unmasked_commuted(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {11880; CHECK-LABEL: vfnmadd_vv_nxv1f32_unmasked_commuted:11881; CHECK: # %bb.0:11882; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11883; CHECK-NEXT: vfnmadd.vv v8, v9, v1011884; CHECK-NEXT: ret11885 %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)11886 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)11887 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negb, <vscale x 1 x float> %va, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11888 ret <vscale x 1 x float> %v11889}11890 11891define <vscale x 1 x float> @vfnmadd_vf_nxv1f32(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {11892; CHECK-LABEL: vfnmadd_vf_nxv1f32:11893; CHECK: # %bb.0:11894; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11895; CHECK-NEXT: vfnmadd.vf v8, fa0, v9, v0.t11896; CHECK-NEXT: ret11897 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 011898 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer11899 %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> %m, i32 %evl)11900 %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)11901 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negva, <vscale x 1 x float> %vb, <vscale x 1 x float> %negvc, <vscale x 1 x i1> %m, i32 %evl)11902 ret <vscale x 1 x float> %v11903}11904 11905define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {11906; CHECK-LABEL: vfnmadd_vf_nxv1f32_commute:11907; CHECK: # %bb.0:11908; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11909; CHECK-NEXT: vfnmadd.vf v8, fa0, v9, v0.t11910; CHECK-NEXT: ret11911 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 011912 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer11913 %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> %m, i32 %evl)11914 %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)11915 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %negva, <vscale x 1 x float> %negvc, <vscale x 1 x i1> %m, i32 %evl)11916 ret <vscale x 1 x float> %v11917}11918 11919define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {11920; CHECK-LABEL: vfnmadd_vf_nxv1f32_unmasked:11921; CHECK: # %bb.0:11922; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11923; CHECK-NEXT: vfnmadd.vf v8, fa0, v911924; CHECK-NEXT: ret11925 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 011926 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer11927 %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)11928 %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11929 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negva, <vscale x 1 x float> %vb, <vscale x 1 x float> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11930 ret <vscale x 1 x float> %v11931}11932 11933define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_unmasked_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {11934; CHECK-LABEL: vfnmadd_vf_nxv1f32_unmasked_commute:11935; CHECK: # %bb.0:11936; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11937; CHECK-NEXT: vfnmadd.vf v8, fa0, v911938; CHECK-NEXT: ret11939 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 011940 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer11941 %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)11942 %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11943 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %negva, <vscale x 1 x float> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11944 ret <vscale x 1 x float> %v11945}11946 11947define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_neg_splat(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {11948; CHECK-LABEL: vfnmadd_vf_nxv1f32_neg_splat:11949; CHECK: # %bb.0:11950; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11951; CHECK-NEXT: vfnmadd.vf v8, fa0, v9, v0.t11952; CHECK-NEXT: ret11953 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 011954 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer11955 %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)11956 %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)11957 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negvb, <vscale x 1 x float> %negvc, <vscale x 1 x i1> %m, i32 %evl)11958 ret <vscale x 1 x float> %v11959}11960 11961define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_neg_splat_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {11962; CHECK-LABEL: vfnmadd_vf_nxv1f32_neg_splat_commute:11963; CHECK: # %bb.0:11964; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11965; CHECK-NEXT: vfnmadd.vf v8, fa0, v9, v0.t11966; CHECK-NEXT: ret11967 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 011968 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer11969 %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)11970 %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)11971 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negvb, <vscale x 1 x float> %va, <vscale x 1 x float> %negvc, <vscale x 1 x i1> %m, i32 %evl)11972 ret <vscale x 1 x float> %v11973}11974 11975define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_neg_splat_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {11976; CHECK-LABEL: vfnmadd_vf_nxv1f32_neg_splat_unmasked:11977; CHECK: # %bb.0:11978; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11979; CHECK-NEXT: vfnmadd.vf v8, fa0, v911980; CHECK-NEXT: ret11981 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 011982 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer11983 %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)11984 %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11985 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negvb, <vscale x 1 x float> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11986 ret <vscale x 1 x float> %v11987}11988 11989define <vscale x 1 x float> @vfnmadd_vf_nxv1f32_neg_splat_unmasked_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {11990; CHECK-LABEL: vfnmadd_vf_nxv1f32_neg_splat_unmasked_commute:11991; CHECK: # %bb.0:11992; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma11993; CHECK-NEXT: vfnmadd.vf v8, fa0, v911994; CHECK-NEXT: ret11995 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 011996 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer11997 %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)11998 %negvc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)11999 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negvb, <vscale x 1 x float> %va, <vscale x 1 x float> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)12000 ret <vscale x 1 x float> %v12001}12002 12003define <vscale x 1 x float> @vfnmsub_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {12004; CHECK-LABEL: vfnmsub_vv_nxv1f32:12005; CHECK: # %bb.0:12006; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12007; CHECK-NEXT: vfnmadd.vv v9, v8, v10, v0.t12008; CHECK-NEXT: vmv1r.v v8, v912009; CHECK-NEXT: ret12010 %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)12011 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)12012 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negb, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)12013 ret <vscale x 1 x float> %v12014}12015 12016define <vscale x 1 x float> @vfnmsub_vv_nxv1f32_commuted(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {12017; CHECK-LABEL: vfnmsub_vv_nxv1f32_commuted:12018; CHECK: # %bb.0:12019; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12020; CHECK-NEXT: vfnmadd.vv v8, v9, v10, v0.t12021; CHECK-NEXT: ret12022 %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)12023 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)12024 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negb, <vscale x 1 x float> %va, <vscale x 1 x float> %negc, <vscale x 1 x i1> %m, i32 %evl)12025 ret <vscale x 1 x float> %v12026}12027 12028define <vscale x 1 x float> @vfnmsub_vv_nxv1f32_unmasked(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {12029; CHECK-LABEL: vfnmsub_vv_nxv1f32_unmasked:12030; CHECK: # %bb.0:12031; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12032; CHECK-NEXT: vfnmadd.vv v8, v9, v1012033; CHECK-NEXT: ret12034 %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)12035 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)12036 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negb, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)12037 ret <vscale x 1 x float> %v12038}12039 12040define <vscale x 1 x float> @vfnmsub_vv_nxv1f32_unmasked_commuted(<vscale x 1 x float> %va, <vscale x 1 x float> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {12041; CHECK-LABEL: vfnmsub_vv_nxv1f32_unmasked_commuted:12042; CHECK: # %bb.0:12043; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12044; CHECK-NEXT: vfnmadd.vv v8, v9, v1012045; CHECK-NEXT: ret12046 %negb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)12047 %negc = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)12048 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negb, <vscale x 1 x float> %va, <vscale x 1 x float> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)12049 ret <vscale x 1 x float> %v12050}12051 12052define <vscale x 1 x float> @vfnmsub_vf_nxv1f32(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {12053; CHECK-LABEL: vfnmsub_vf_nxv1f32:12054; CHECK: # %bb.0:12055; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12056; CHECK-NEXT: vfnmsub.vf v8, fa0, v9, v0.t12057; CHECK-NEXT: ret12058 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 012059 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer12060 %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> %m, i32 %evl)12061 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negva, <vscale x 1 x float> %vb, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)12062 ret <vscale x 1 x float> %v12063}12064 12065define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {12066; CHECK-LABEL: vfnmsub_vf_nxv1f32_commute:12067; CHECK: # %bb.0:12068; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12069; CHECK-NEXT: vfnmsub.vf v8, fa0, v9, v0.t12070; CHECK-NEXT: ret12071 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 012072 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer12073 %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> %m, i32 %evl)12074 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %negva, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)12075 ret <vscale x 1 x float> %v12076}12077 12078define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {12079; CHECK-LABEL: vfnmsub_vf_nxv1f32_unmasked:12080; CHECK: # %bb.0:12081; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12082; CHECK-NEXT: vfnmsub.vf v8, fa0, v912083; CHECK-NEXT: ret12084 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 012085 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer12086 %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)12087 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negva, <vscale x 1 x float> %vb, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)12088 ret <vscale x 1 x float> %v12089}12090 12091define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_unmasked_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {12092; CHECK-LABEL: vfnmsub_vf_nxv1f32_unmasked_commute:12093; CHECK: # %bb.0:12094; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12095; CHECK-NEXT: vfnmsub.vf v8, fa0, v912096; CHECK-NEXT: ret12097 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 012098 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer12099 %negva = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)12100 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x float> %negva, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)12101 ret <vscale x 1 x float> %v12102}12103 12104define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_neg_splat(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {12105; CHECK-LABEL: vfnmsub_vf_nxv1f32_neg_splat:12106; CHECK: # %bb.0:12107; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12108; CHECK-NEXT: vfnmsub.vf v8, fa0, v9, v0.t12109; CHECK-NEXT: ret12110 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 012111 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer12112 %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)12113 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negvb, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)12114 ret <vscale x 1 x float> %v12115}12116 12117define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_neg_splat_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {12118; CHECK-LABEL: vfnmsub_vf_nxv1f32_neg_splat_commute:12119; CHECK: # %bb.0:12120; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12121; CHECK-NEXT: vfnmsub.vf v8, fa0, v9, v0.t12122; CHECK-NEXT: ret12123 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 012124 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer12125 %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)12126 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negvb, <vscale x 1 x float> %va, <vscale x 1 x float> %vc, <vscale x 1 x i1> %m, i32 %evl)12127 ret <vscale x 1 x float> %v12128}12129 12130define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_neg_splat_unmasked(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {12131; CHECK-LABEL: vfnmsub_vf_nxv1f32_neg_splat_unmasked:12132; CHECK: # %bb.0:12133; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12134; CHECK-NEXT: vfnmsub.vf v8, fa0, v912135; CHECK-NEXT: ret12136 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 012137 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer12138 %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)12139 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %negvb, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)12140 ret <vscale x 1 x float> %v12141}12142 12143define <vscale x 1 x float> @vfnmsub_vf_nxv1f32_neg_splat_unmasked_commute(<vscale x 1 x float> %va, float %b, <vscale x 1 x float> %vc, i32 zeroext %evl) {12144; CHECK-LABEL: vfnmsub_vf_nxv1f32_neg_splat_unmasked_commute:12145; CHECK: # %bb.0:12146; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma12147; CHECK-NEXT: vfnmsub.vf v8, fa0, v912148; CHECK-NEXT: ret12149 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 012150 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer12151 %negvb = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)12152 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %negvb, <vscale x 1 x float> %va, <vscale x 1 x float> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)12153 ret <vscale x 1 x float> %v12154}12155 12156define <vscale x 2 x float> @vfmsub_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {12157; CHECK-LABEL: vfmsub_vv_nxv2f32:12158; CHECK: # %bb.0:12159; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12160; CHECK-NEXT: vfmsub.vv v9, v8, v10, v0.t12161; CHECK-NEXT: vmv.v.v v8, v912162; CHECK-NEXT: ret12163 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)12164 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)12165 ret <vscale x 2 x float> %v12166}12167 12168define <vscale x 2 x float> @vfmsub_vv_nxv2f32_unmasked(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {12169; CHECK-LABEL: vfmsub_vv_nxv2f32_unmasked:12170; CHECK: # %bb.0:12171; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12172; CHECK-NEXT: vfmsub.vv v8, v9, v1012173; CHECK-NEXT: ret12174 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)12175 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12176 ret <vscale x 2 x float> %v12177}12178 12179define <vscale x 2 x float> @vfmsub_vf_nxv2f32(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {12180; CHECK-LABEL: vfmsub_vf_nxv2f32:12181; CHECK: # %bb.0:12182; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12183; CHECK-NEXT: vfmsub.vf v8, fa0, v9, v0.t12184; CHECK-NEXT: ret12185 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012186 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12187 %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)12188 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x float> %negvc, <vscale x 2 x i1> %m, i32 %evl)12189 ret <vscale x 2 x float> %v12190}12191 12192define <vscale x 2 x float> @vfmsub_vf_nxv2f32_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {12193; CHECK-LABEL: vfmsub_vf_nxv2f32_commute:12194; CHECK: # %bb.0:12195; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12196; CHECK-NEXT: vfmsub.vf v8, fa0, v9, v0.t12197; CHECK-NEXT: ret12198 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012199 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12200 %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)12201 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %va, <vscale x 2 x float> %negvc, <vscale x 2 x i1> %m, i32 %evl)12202 ret <vscale x 2 x float> %v12203}12204 12205define <vscale x 2 x float> @vfmsub_vf_nxv2f32_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {12206; CHECK-LABEL: vfmsub_vf_nxv2f32_unmasked:12207; CHECK: # %bb.0:12208; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12209; CHECK-NEXT: vfmsub.vf v8, fa0, v912210; CHECK-NEXT: ret12211 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012212 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12213 %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12214 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x float> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12215 ret <vscale x 2 x float> %v12216}12217 12218define <vscale x 2 x float> @vfmsub_vf_nxv2f32_unmasked_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {12219; CHECK-LABEL: vfmsub_vf_nxv2f32_unmasked_commute:12220; CHECK: # %bb.0:12221; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12222; CHECK-NEXT: vfmsub.vf v8, fa0, v912223; CHECK-NEXT: ret12224 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012225 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12226 %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12227 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %va, <vscale x 2 x float> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12228 ret <vscale x 2 x float> %v12229}12230 12231define <vscale x 2 x float> @vfnmadd_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {12232; CHECK-LABEL: vfnmadd_vv_nxv2f32:12233; CHECK: # %bb.0:12234; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12235; CHECK-NEXT: vfnmadd.vv v9, v8, v10, v0.t12236; CHECK-NEXT: vmv.v.v v8, v912237; CHECK-NEXT: ret12238 %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)12239 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)12240 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negb, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)12241 ret <vscale x 2 x float> %v12242}12243 12244define <vscale x 2 x float> @vfnmadd_vv_nxv2f32_commuted(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {12245; CHECK-LABEL: vfnmadd_vv_nxv2f32_commuted:12246; CHECK: # %bb.0:12247; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12248; CHECK-NEXT: vfnmadd.vv v8, v9, v10, v0.t12249; CHECK-NEXT: ret12250 %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)12251 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)12252 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negb, <vscale x 2 x float> %va, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)12253 ret <vscale x 2 x float> %v12254}12255 12256define <vscale x 2 x float> @vfnmadd_vv_nxv2f32_unmasked(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {12257; CHECK-LABEL: vfnmadd_vv_nxv2f32_unmasked:12258; CHECK: # %bb.0:12259; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12260; CHECK-NEXT: vfnmadd.vv v8, v9, v1012261; CHECK-NEXT: ret12262 %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)12263 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)12264 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negb, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12265 ret <vscale x 2 x float> %v12266}12267 12268define <vscale x 2 x float> @vfnmadd_vv_nxv2f32_unmasked_commuted(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {12269; CHECK-LABEL: vfnmadd_vv_nxv2f32_unmasked_commuted:12270; CHECK: # %bb.0:12271; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12272; CHECK-NEXT: vfnmadd.vv v8, v9, v1012273; CHECK-NEXT: ret12274 %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)12275 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)12276 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negb, <vscale x 2 x float> %va, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12277 ret <vscale x 2 x float> %v12278}12279 12280define <vscale x 2 x float> @vfnmadd_vf_nxv2f32(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {12281; CHECK-LABEL: vfnmadd_vf_nxv2f32:12282; CHECK: # %bb.0:12283; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12284; CHECK-NEXT: vfnmadd.vf v8, fa0, v9, v0.t12285; CHECK-NEXT: ret12286 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012287 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12288 %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)12289 %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)12290 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negva, <vscale x 2 x float> %vb, <vscale x 2 x float> %negvc, <vscale x 2 x i1> %m, i32 %evl)12291 ret <vscale x 2 x float> %v12292}12293 12294define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {12295; CHECK-LABEL: vfnmadd_vf_nxv2f32_commute:12296; CHECK: # %bb.0:12297; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12298; CHECK-NEXT: vfnmadd.vf v8, fa0, v9, v0.t12299; CHECK-NEXT: ret12300 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012301 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12302 %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)12303 %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)12304 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %negva, <vscale x 2 x float> %negvc, <vscale x 2 x i1> %m, i32 %evl)12305 ret <vscale x 2 x float> %v12306}12307 12308define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {12309; CHECK-LABEL: vfnmadd_vf_nxv2f32_unmasked:12310; CHECK: # %bb.0:12311; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12312; CHECK-NEXT: vfnmadd.vf v8, fa0, v912313; CHECK-NEXT: ret12314 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012315 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12316 %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)12317 %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12318 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negva, <vscale x 2 x float> %vb, <vscale x 2 x float> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12319 ret <vscale x 2 x float> %v12320}12321 12322define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_unmasked_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {12323; CHECK-LABEL: vfnmadd_vf_nxv2f32_unmasked_commute:12324; CHECK: # %bb.0:12325; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12326; CHECK-NEXT: vfnmadd.vf v8, fa0, v912327; CHECK-NEXT: ret12328 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012329 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12330 %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)12331 %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12332 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %negva, <vscale x 2 x float> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12333 ret <vscale x 2 x float> %v12334}12335 12336define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_neg_splat(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {12337; CHECK-LABEL: vfnmadd_vf_nxv2f32_neg_splat:12338; CHECK: # %bb.0:12339; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12340; CHECK-NEXT: vfnmadd.vf v8, fa0, v9, v0.t12341; CHECK-NEXT: ret12342 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012343 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12344 %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)12345 %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)12346 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negvb, <vscale x 2 x float> %negvc, <vscale x 2 x i1> %m, i32 %evl)12347 ret <vscale x 2 x float> %v12348}12349 12350define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_neg_splat_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {12351; CHECK-LABEL: vfnmadd_vf_nxv2f32_neg_splat_commute:12352; CHECK: # %bb.0:12353; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12354; CHECK-NEXT: vfnmadd.vf v8, fa0, v9, v0.t12355; CHECK-NEXT: ret12356 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012357 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12358 %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)12359 %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)12360 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negvb, <vscale x 2 x float> %va, <vscale x 2 x float> %negvc, <vscale x 2 x i1> %m, i32 %evl)12361 ret <vscale x 2 x float> %v12362}12363 12364define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_neg_splat_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {12365; CHECK-LABEL: vfnmadd_vf_nxv2f32_neg_splat_unmasked:12366; CHECK: # %bb.0:12367; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12368; CHECK-NEXT: vfnmadd.vf v8, fa0, v912369; CHECK-NEXT: ret12370 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012371 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12372 %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)12373 %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12374 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negvb, <vscale x 2 x float> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12375 ret <vscale x 2 x float> %v12376}12377 12378define <vscale x 2 x float> @vfnmadd_vf_nxv2f32_neg_splat_unmasked_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {12379; CHECK-LABEL: vfnmadd_vf_nxv2f32_neg_splat_unmasked_commute:12380; CHECK: # %bb.0:12381; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12382; CHECK-NEXT: vfnmadd.vf v8, fa0, v912383; CHECK-NEXT: ret12384 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012385 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12386 %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)12387 %negvc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12388 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negvb, <vscale x 2 x float> %va, <vscale x 2 x float> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12389 ret <vscale x 2 x float> %v12390}12391 12392define <vscale x 2 x float> @vfnmsub_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {12393; CHECK-LABEL: vfnmsub_vv_nxv2f32:12394; CHECK: # %bb.0:12395; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12396; CHECK-NEXT: vfnmadd.vv v9, v8, v10, v0.t12397; CHECK-NEXT: vmv.v.v v8, v912398; CHECK-NEXT: ret12399 %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)12400 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)12401 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negb, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)12402 ret <vscale x 2 x float> %v12403}12404 12405define <vscale x 2 x float> @vfnmsub_vv_nxv2f32_commuted(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {12406; CHECK-LABEL: vfnmsub_vv_nxv2f32_commuted:12407; CHECK: # %bb.0:12408; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12409; CHECK-NEXT: vfnmadd.vv v8, v9, v10, v0.t12410; CHECK-NEXT: ret12411 %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)12412 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)12413 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negb, <vscale x 2 x float> %va, <vscale x 2 x float> %negc, <vscale x 2 x i1> %m, i32 %evl)12414 ret <vscale x 2 x float> %v12415}12416 12417define <vscale x 2 x float> @vfnmsub_vv_nxv2f32_unmasked(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {12418; CHECK-LABEL: vfnmsub_vv_nxv2f32_unmasked:12419; CHECK: # %bb.0:12420; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12421; CHECK-NEXT: vfnmadd.vv v8, v9, v1012422; CHECK-NEXT: ret12423 %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)12424 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)12425 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negb, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12426 ret <vscale x 2 x float> %v12427}12428 12429define <vscale x 2 x float> @vfnmsub_vv_nxv2f32_unmasked_commuted(<vscale x 2 x float> %va, <vscale x 2 x float> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {12430; CHECK-LABEL: vfnmsub_vv_nxv2f32_unmasked_commuted:12431; CHECK: # %bb.0:12432; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12433; CHECK-NEXT: vfnmadd.vv v8, v9, v1012434; CHECK-NEXT: ret12435 %negb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)12436 %negc = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)12437 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negb, <vscale x 2 x float> %va, <vscale x 2 x float> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12438 ret <vscale x 2 x float> %v12439}12440 12441define <vscale x 2 x float> @vfnmsub_vf_nxv2f32(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {12442; CHECK-LABEL: vfnmsub_vf_nxv2f32:12443; CHECK: # %bb.0:12444; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12445; CHECK-NEXT: vfnmsub.vf v8, fa0, v9, v0.t12446; CHECK-NEXT: ret12447 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012448 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12449 %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)12450 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negva, <vscale x 2 x float> %vb, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)12451 ret <vscale x 2 x float> %v12452}12453 12454define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {12455; CHECK-LABEL: vfnmsub_vf_nxv2f32_commute:12456; CHECK: # %bb.0:12457; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12458; CHECK-NEXT: vfnmsub.vf v8, fa0, v9, v0.t12459; CHECK-NEXT: ret12460 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012461 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12462 %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> %m, i32 %evl)12463 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %negva, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)12464 ret <vscale x 2 x float> %v12465}12466 12467define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {12468; CHECK-LABEL: vfnmsub_vf_nxv2f32_unmasked:12469; CHECK: # %bb.0:12470; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12471; CHECK-NEXT: vfnmsub.vf v8, fa0, v912472; CHECK-NEXT: ret12473 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012474 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12475 %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)12476 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negva, <vscale x 2 x float> %vb, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12477 ret <vscale x 2 x float> %v12478}12479 12480define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_unmasked_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {12481; CHECK-LABEL: vfnmsub_vf_nxv2f32_unmasked_commute:12482; CHECK: # %bb.0:12483; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12484; CHECK-NEXT: vfnmsub.vf v8, fa0, v912485; CHECK-NEXT: ret12486 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012487 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12488 %negva = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)12489 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x float> %negva, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12490 ret <vscale x 2 x float> %v12491}12492 12493define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_neg_splat(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {12494; CHECK-LABEL: vfnmsub_vf_nxv2f32_neg_splat:12495; CHECK: # %bb.0:12496; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12497; CHECK-NEXT: vfnmsub.vf v8, fa0, v9, v0.t12498; CHECK-NEXT: ret12499 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012500 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12501 %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)12502 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negvb, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)12503 ret <vscale x 2 x float> %v12504}12505 12506define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_neg_splat_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {12507; CHECK-LABEL: vfnmsub_vf_nxv2f32_neg_splat_commute:12508; CHECK: # %bb.0:12509; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12510; CHECK-NEXT: vfnmsub.vf v8, fa0, v9, v0.t12511; CHECK-NEXT: ret12512 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012513 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12514 %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)12515 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negvb, <vscale x 2 x float> %va, <vscale x 2 x float> %vc, <vscale x 2 x i1> %m, i32 %evl)12516 ret <vscale x 2 x float> %v12517}12518 12519define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_neg_splat_unmasked(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {12520; CHECK-LABEL: vfnmsub_vf_nxv2f32_neg_splat_unmasked:12521; CHECK: # %bb.0:12522; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12523; CHECK-NEXT: vfnmsub.vf v8, fa0, v912524; CHECK-NEXT: ret12525 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012526 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12527 %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)12528 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %negvb, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12529 ret <vscale x 2 x float> %v12530}12531 12532define <vscale x 2 x float> @vfnmsub_vf_nxv2f32_neg_splat_unmasked_commute(<vscale x 2 x float> %va, float %b, <vscale x 2 x float> %vc, i32 zeroext %evl) {12533; CHECK-LABEL: vfnmsub_vf_nxv2f32_neg_splat_unmasked_commute:12534; CHECK: # %bb.0:12535; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma12536; CHECK-NEXT: vfnmsub.vf v8, fa0, v912537; CHECK-NEXT: ret12538 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 012539 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer12540 %negvb = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)12541 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %negvb, <vscale x 2 x float> %va, <vscale x 2 x float> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)12542 ret <vscale x 2 x float> %v12543}12544 12545define <vscale x 4 x float> @vfmsub_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {12546; CHECK-LABEL: vfmsub_vv_nxv4f32:12547; CHECK: # %bb.0:12548; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12549; CHECK-NEXT: vfmsub.vv v10, v8, v12, v0.t12550; CHECK-NEXT: vmv.v.v v8, v1012551; CHECK-NEXT: ret12552 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)12553 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)12554 ret <vscale x 4 x float> %v12555}12556 12557define <vscale x 4 x float> @vfmsub_vv_nxv4f32_unmasked(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {12558; CHECK-LABEL: vfmsub_vv_nxv4f32_unmasked:12559; CHECK: # %bb.0:12560; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12561; CHECK-NEXT: vfmsub.vv v8, v10, v1212562; CHECK-NEXT: ret12563 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)12564 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12565 ret <vscale x 4 x float> %v12566}12567 12568define <vscale x 4 x float> @vfmsub_vf_nxv4f32(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {12569; CHECK-LABEL: vfmsub_vf_nxv4f32:12570; CHECK: # %bb.0:12571; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12572; CHECK-NEXT: vfmsub.vf v8, fa0, v10, v0.t12573; CHECK-NEXT: ret12574 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012575 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12576 %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)12577 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x float> %negvc, <vscale x 4 x i1> %m, i32 %evl)12578 ret <vscale x 4 x float> %v12579}12580 12581define <vscale x 4 x float> @vfmsub_vf_nxv4f32_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {12582; CHECK-LABEL: vfmsub_vf_nxv4f32_commute:12583; CHECK: # %bb.0:12584; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12585; CHECK-NEXT: vfmsub.vf v8, fa0, v10, v0.t12586; CHECK-NEXT: ret12587 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012588 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12589 %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)12590 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %va, <vscale x 4 x float> %negvc, <vscale x 4 x i1> %m, i32 %evl)12591 ret <vscale x 4 x float> %v12592}12593 12594define <vscale x 4 x float> @vfmsub_vf_nxv4f32_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {12595; CHECK-LABEL: vfmsub_vf_nxv4f32_unmasked:12596; CHECK: # %bb.0:12597; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12598; CHECK-NEXT: vfmsub.vf v8, fa0, v1012599; CHECK-NEXT: ret12600 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012601 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12602 %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12603 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x float> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12604 ret <vscale x 4 x float> %v12605}12606 12607define <vscale x 4 x float> @vfmsub_vf_nxv4f32_unmasked_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {12608; CHECK-LABEL: vfmsub_vf_nxv4f32_unmasked_commute:12609; CHECK: # %bb.0:12610; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12611; CHECK-NEXT: vfmsub.vf v8, fa0, v1012612; CHECK-NEXT: ret12613 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012614 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12615 %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12616 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %va, <vscale x 4 x float> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12617 ret <vscale x 4 x float> %v12618}12619 12620define <vscale x 4 x float> @vfnmadd_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {12621; CHECK-LABEL: vfnmadd_vv_nxv4f32:12622; CHECK: # %bb.0:12623; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12624; CHECK-NEXT: vfnmadd.vv v10, v8, v12, v0.t12625; CHECK-NEXT: vmv.v.v v8, v1012626; CHECK-NEXT: ret12627 %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)12628 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)12629 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negb, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)12630 ret <vscale x 4 x float> %v12631}12632 12633define <vscale x 4 x float> @vfnmadd_vv_nxv4f32_commuted(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {12634; CHECK-LABEL: vfnmadd_vv_nxv4f32_commuted:12635; CHECK: # %bb.0:12636; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12637; CHECK-NEXT: vfnmadd.vv v8, v10, v12, v0.t12638; CHECK-NEXT: ret12639 %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)12640 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)12641 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negb, <vscale x 4 x float> %va, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)12642 ret <vscale x 4 x float> %v12643}12644 12645define <vscale x 4 x float> @vfnmadd_vv_nxv4f32_unmasked(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {12646; CHECK-LABEL: vfnmadd_vv_nxv4f32_unmasked:12647; CHECK: # %bb.0:12648; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12649; CHECK-NEXT: vfnmadd.vv v8, v10, v1212650; CHECK-NEXT: ret12651 %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)12652 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)12653 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negb, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12654 ret <vscale x 4 x float> %v12655}12656 12657define <vscale x 4 x float> @vfnmadd_vv_nxv4f32_unmasked_commuted(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {12658; CHECK-LABEL: vfnmadd_vv_nxv4f32_unmasked_commuted:12659; CHECK: # %bb.0:12660; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12661; CHECK-NEXT: vfnmadd.vv v8, v10, v1212662; CHECK-NEXT: ret12663 %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)12664 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)12665 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negb, <vscale x 4 x float> %va, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12666 ret <vscale x 4 x float> %v12667}12668 12669define <vscale x 4 x float> @vfnmadd_vf_nxv4f32(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {12670; CHECK-LABEL: vfnmadd_vf_nxv4f32:12671; CHECK: # %bb.0:12672; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12673; CHECK-NEXT: vfnmadd.vf v8, fa0, v10, v0.t12674; CHECK-NEXT: ret12675 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012676 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12677 %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> %m, i32 %evl)12678 %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)12679 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negva, <vscale x 4 x float> %vb, <vscale x 4 x float> %negvc, <vscale x 4 x i1> %m, i32 %evl)12680 ret <vscale x 4 x float> %v12681}12682 12683define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {12684; CHECK-LABEL: vfnmadd_vf_nxv4f32_commute:12685; CHECK: # %bb.0:12686; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12687; CHECK-NEXT: vfnmadd.vf v8, fa0, v10, v0.t12688; CHECK-NEXT: ret12689 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012690 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12691 %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> %m, i32 %evl)12692 %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)12693 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %negva, <vscale x 4 x float> %negvc, <vscale x 4 x i1> %m, i32 %evl)12694 ret <vscale x 4 x float> %v12695}12696 12697define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {12698; CHECK-LABEL: vfnmadd_vf_nxv4f32_unmasked:12699; CHECK: # %bb.0:12700; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12701; CHECK-NEXT: vfnmadd.vf v8, fa0, v1012702; CHECK-NEXT: ret12703 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012704 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12705 %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)12706 %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12707 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negva, <vscale x 4 x float> %vb, <vscale x 4 x float> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12708 ret <vscale x 4 x float> %v12709}12710 12711define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_unmasked_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {12712; CHECK-LABEL: vfnmadd_vf_nxv4f32_unmasked_commute:12713; CHECK: # %bb.0:12714; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12715; CHECK-NEXT: vfnmadd.vf v8, fa0, v1012716; CHECK-NEXT: ret12717 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012718 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12719 %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)12720 %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12721 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %negva, <vscale x 4 x float> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12722 ret <vscale x 4 x float> %v12723}12724 12725define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_neg_splat(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {12726; CHECK-LABEL: vfnmadd_vf_nxv4f32_neg_splat:12727; CHECK: # %bb.0:12728; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12729; CHECK-NEXT: vfnmadd.vf v8, fa0, v10, v0.t12730; CHECK-NEXT: ret12731 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012732 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12733 %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)12734 %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)12735 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negvb, <vscale x 4 x float> %negvc, <vscale x 4 x i1> %m, i32 %evl)12736 ret <vscale x 4 x float> %v12737}12738 12739define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_neg_splat_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {12740; CHECK-LABEL: vfnmadd_vf_nxv4f32_neg_splat_commute:12741; CHECK: # %bb.0:12742; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12743; CHECK-NEXT: vfnmadd.vf v8, fa0, v10, v0.t12744; CHECK-NEXT: ret12745 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012746 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12747 %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)12748 %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)12749 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negvb, <vscale x 4 x float> %va, <vscale x 4 x float> %negvc, <vscale x 4 x i1> %m, i32 %evl)12750 ret <vscale x 4 x float> %v12751}12752 12753define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_neg_splat_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {12754; CHECK-LABEL: vfnmadd_vf_nxv4f32_neg_splat_unmasked:12755; CHECK: # %bb.0:12756; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12757; CHECK-NEXT: vfnmadd.vf v8, fa0, v1012758; CHECK-NEXT: ret12759 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012760 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12761 %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)12762 %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12763 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negvb, <vscale x 4 x float> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12764 ret <vscale x 4 x float> %v12765}12766 12767define <vscale x 4 x float> @vfnmadd_vf_nxv4f32_neg_splat_unmasked_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {12768; CHECK-LABEL: vfnmadd_vf_nxv4f32_neg_splat_unmasked_commute:12769; CHECK: # %bb.0:12770; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12771; CHECK-NEXT: vfnmadd.vf v8, fa0, v1012772; CHECK-NEXT: ret12773 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012774 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12775 %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)12776 %negvc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12777 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negvb, <vscale x 4 x float> %va, <vscale x 4 x float> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12778 ret <vscale x 4 x float> %v12779}12780 12781define <vscale x 4 x float> @vfnmsub_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {12782; CHECK-LABEL: vfnmsub_vv_nxv4f32:12783; CHECK: # %bb.0:12784; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12785; CHECK-NEXT: vfnmadd.vv v10, v8, v12, v0.t12786; CHECK-NEXT: vmv.v.v v8, v1012787; CHECK-NEXT: ret12788 %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)12789 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)12790 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negb, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)12791 ret <vscale x 4 x float> %v12792}12793 12794define <vscale x 4 x float> @vfnmsub_vv_nxv4f32_commuted(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {12795; CHECK-LABEL: vfnmsub_vv_nxv4f32_commuted:12796; CHECK: # %bb.0:12797; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12798; CHECK-NEXT: vfnmadd.vv v8, v10, v12, v0.t12799; CHECK-NEXT: ret12800 %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)12801 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)12802 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negb, <vscale x 4 x float> %va, <vscale x 4 x float> %negc, <vscale x 4 x i1> %m, i32 %evl)12803 ret <vscale x 4 x float> %v12804}12805 12806define <vscale x 4 x float> @vfnmsub_vv_nxv4f32_unmasked(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {12807; CHECK-LABEL: vfnmsub_vv_nxv4f32_unmasked:12808; CHECK: # %bb.0:12809; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12810; CHECK-NEXT: vfnmadd.vv v8, v10, v1212811; CHECK-NEXT: ret12812 %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)12813 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)12814 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negb, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12815 ret <vscale x 4 x float> %v12816}12817 12818define <vscale x 4 x float> @vfnmsub_vv_nxv4f32_unmasked_commuted(<vscale x 4 x float> %va, <vscale x 4 x float> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {12819; CHECK-LABEL: vfnmsub_vv_nxv4f32_unmasked_commuted:12820; CHECK: # %bb.0:12821; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12822; CHECK-NEXT: vfnmadd.vv v8, v10, v1212823; CHECK-NEXT: ret12824 %negb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)12825 %negc = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)12826 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negb, <vscale x 4 x float> %va, <vscale x 4 x float> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12827 ret <vscale x 4 x float> %v12828}12829 12830define <vscale x 4 x float> @vfnmsub_vf_nxv4f32(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {12831; CHECK-LABEL: vfnmsub_vf_nxv4f32:12832; CHECK: # %bb.0:12833; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12834; CHECK-NEXT: vfnmsub.vf v8, fa0, v10, v0.t12835; CHECK-NEXT: ret12836 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012837 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12838 %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> %m, i32 %evl)12839 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negva, <vscale x 4 x float> %vb, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)12840 ret <vscale x 4 x float> %v12841}12842 12843define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {12844; CHECK-LABEL: vfnmsub_vf_nxv4f32_commute:12845; CHECK: # %bb.0:12846; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12847; CHECK-NEXT: vfnmsub.vf v8, fa0, v10, v0.t12848; CHECK-NEXT: ret12849 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012850 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12851 %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> %m, i32 %evl)12852 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %negva, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)12853 ret <vscale x 4 x float> %v12854}12855 12856define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {12857; CHECK-LABEL: vfnmsub_vf_nxv4f32_unmasked:12858; CHECK: # %bb.0:12859; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12860; CHECK-NEXT: vfnmsub.vf v8, fa0, v1012861; CHECK-NEXT: ret12862 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012863 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12864 %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)12865 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negva, <vscale x 4 x float> %vb, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12866 ret <vscale x 4 x float> %v12867}12868 12869define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_unmasked_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {12870; CHECK-LABEL: vfnmsub_vf_nxv4f32_unmasked_commute:12871; CHECK: # %bb.0:12872; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12873; CHECK-NEXT: vfnmsub.vf v8, fa0, v1012874; CHECK-NEXT: ret12875 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012876 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12877 %negva = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)12878 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %negva, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12879 ret <vscale x 4 x float> %v12880}12881 12882define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_neg_splat(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {12883; CHECK-LABEL: vfnmsub_vf_nxv4f32_neg_splat:12884; CHECK: # %bb.0:12885; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12886; CHECK-NEXT: vfnmsub.vf v8, fa0, v10, v0.t12887; CHECK-NEXT: ret12888 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012889 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12890 %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)12891 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negvb, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)12892 ret <vscale x 4 x float> %v12893}12894 12895define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_neg_splat_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {12896; CHECK-LABEL: vfnmsub_vf_nxv4f32_neg_splat_commute:12897; CHECK: # %bb.0:12898; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12899; CHECK-NEXT: vfnmsub.vf v8, fa0, v10, v0.t12900; CHECK-NEXT: ret12901 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012902 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12903 %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)12904 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negvb, <vscale x 4 x float> %va, <vscale x 4 x float> %vc, <vscale x 4 x i1> %m, i32 %evl)12905 ret <vscale x 4 x float> %v12906}12907 12908define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_neg_splat_unmasked(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {12909; CHECK-LABEL: vfnmsub_vf_nxv4f32_neg_splat_unmasked:12910; CHECK: # %bb.0:12911; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12912; CHECK-NEXT: vfnmsub.vf v8, fa0, v1012913; CHECK-NEXT: ret12914 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012915 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12916 %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)12917 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %negvb, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12918 ret <vscale x 4 x float> %v12919}12920 12921define <vscale x 4 x float> @vfnmsub_vf_nxv4f32_neg_splat_unmasked_commute(<vscale x 4 x float> %va, float %b, <vscale x 4 x float> %vc, i32 zeroext %evl) {12922; CHECK-LABEL: vfnmsub_vf_nxv4f32_neg_splat_unmasked_commute:12923; CHECK: # %bb.0:12924; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma12925; CHECK-NEXT: vfnmsub.vf v8, fa0, v1012926; CHECK-NEXT: ret12927 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 012928 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer12929 %negvb = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)12930 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %negvb, <vscale x 4 x float> %va, <vscale x 4 x float> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)12931 ret <vscale x 4 x float> %v12932}12933 12934define <vscale x 8 x float> @vfmsub_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {12935; CHECK-LABEL: vfmsub_vv_nxv8f32:12936; CHECK: # %bb.0:12937; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma12938; CHECK-NEXT: vfmsub.vv v12, v8, v16, v0.t12939; CHECK-NEXT: vmv.v.v v8, v1212940; CHECK-NEXT: ret12941 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)12942 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)12943 ret <vscale x 8 x float> %v12944}12945 12946define <vscale x 8 x float> @vfmsub_vv_nxv8f32_unmasked(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {12947; CHECK-LABEL: vfmsub_vv_nxv8f32_unmasked:12948; CHECK: # %bb.0:12949; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma12950; CHECK-NEXT: vfmsub.vv v8, v12, v1612951; CHECK-NEXT: ret12952 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)12953 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)12954 ret <vscale x 8 x float> %v12955}12956 12957define <vscale x 8 x float> @vfmsub_vf_nxv8f32(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {12958; CHECK-LABEL: vfmsub_vf_nxv8f32:12959; CHECK: # %bb.0:12960; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma12961; CHECK-NEXT: vfmsub.vf v8, fa0, v12, v0.t12962; CHECK-NEXT: ret12963 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 012964 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer12965 %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)12966 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x float> %negvc, <vscale x 8 x i1> %m, i32 %evl)12967 ret <vscale x 8 x float> %v12968}12969 12970define <vscale x 8 x float> @vfmsub_vf_nxv8f32_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {12971; CHECK-LABEL: vfmsub_vf_nxv8f32_commute:12972; CHECK: # %bb.0:12973; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma12974; CHECK-NEXT: vfmsub.vf v8, fa0, v12, v0.t12975; CHECK-NEXT: ret12976 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 012977 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer12978 %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)12979 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %va, <vscale x 8 x float> %negvc, <vscale x 8 x i1> %m, i32 %evl)12980 ret <vscale x 8 x float> %v12981}12982 12983define <vscale x 8 x float> @vfmsub_vf_nxv8f32_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {12984; CHECK-LABEL: vfmsub_vf_nxv8f32_unmasked:12985; CHECK: # %bb.0:12986; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma12987; CHECK-NEXT: vfmsub.vf v8, fa0, v1212988; CHECK-NEXT: ret12989 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 012990 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer12991 %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)12992 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x float> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)12993 ret <vscale x 8 x float> %v12994}12995 12996define <vscale x 8 x float> @vfmsub_vf_nxv8f32_unmasked_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {12997; CHECK-LABEL: vfmsub_vf_nxv8f32_unmasked_commute:12998; CHECK: # %bb.0:12999; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13000; CHECK-NEXT: vfmsub.vf v8, fa0, v1213001; CHECK-NEXT: ret13002 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013003 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13004 %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13005 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %va, <vscale x 8 x float> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13006 ret <vscale x 8 x float> %v13007}13008 13009define <vscale x 8 x float> @vfnmadd_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {13010; CHECK-LABEL: vfnmadd_vv_nxv8f32:13011; CHECK: # %bb.0:13012; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13013; CHECK-NEXT: vfnmadd.vv v12, v8, v16, v0.t13014; CHECK-NEXT: vmv.v.v v8, v1213015; CHECK-NEXT: ret13016 %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)13017 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)13018 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negb, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)13019 ret <vscale x 8 x float> %v13020}13021 13022define <vscale x 8 x float> @vfnmadd_vv_nxv8f32_commuted(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {13023; CHECK-LABEL: vfnmadd_vv_nxv8f32_commuted:13024; CHECK: # %bb.0:13025; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13026; CHECK-NEXT: vfnmadd.vv v8, v12, v16, v0.t13027; CHECK-NEXT: ret13028 %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)13029 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)13030 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negb, <vscale x 8 x float> %va, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)13031 ret <vscale x 8 x float> %v13032}13033 13034define <vscale x 8 x float> @vfnmadd_vv_nxv8f32_unmasked(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {13035; CHECK-LABEL: vfnmadd_vv_nxv8f32_unmasked:13036; CHECK: # %bb.0:13037; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13038; CHECK-NEXT: vfnmadd.vv v8, v12, v1613039; CHECK-NEXT: ret13040 %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)13041 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)13042 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negb, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13043 ret <vscale x 8 x float> %v13044}13045 13046define <vscale x 8 x float> @vfnmadd_vv_nxv8f32_unmasked_commuted(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {13047; CHECK-LABEL: vfnmadd_vv_nxv8f32_unmasked_commuted:13048; CHECK: # %bb.0:13049; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13050; CHECK-NEXT: vfnmadd.vv v8, v12, v1613051; CHECK-NEXT: ret13052 %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)13053 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)13054 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negb, <vscale x 8 x float> %va, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13055 ret <vscale x 8 x float> %v13056}13057 13058define <vscale x 8 x float> @vfnmadd_vf_nxv8f32(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {13059; CHECK-LABEL: vfnmadd_vf_nxv8f32:13060; CHECK: # %bb.0:13061; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13062; CHECK-NEXT: vfnmadd.vf v8, fa0, v12, v0.t13063; CHECK-NEXT: ret13064 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013065 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13066 %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> %m, i32 %evl)13067 %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)13068 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negva, <vscale x 8 x float> %vb, <vscale x 8 x float> %negvc, <vscale x 8 x i1> %m, i32 %evl)13069 ret <vscale x 8 x float> %v13070}13071 13072define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {13073; CHECK-LABEL: vfnmadd_vf_nxv8f32_commute:13074; CHECK: # %bb.0:13075; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13076; CHECK-NEXT: vfnmadd.vf v8, fa0, v12, v0.t13077; CHECK-NEXT: ret13078 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013079 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13080 %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> %m, i32 %evl)13081 %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)13082 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %negva, <vscale x 8 x float> %negvc, <vscale x 8 x i1> %m, i32 %evl)13083 ret <vscale x 8 x float> %v13084}13085 13086define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {13087; CHECK-LABEL: vfnmadd_vf_nxv8f32_unmasked:13088; CHECK: # %bb.0:13089; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13090; CHECK-NEXT: vfnmadd.vf v8, fa0, v1213091; CHECK-NEXT: ret13092 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013093 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13094 %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)13095 %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13096 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negva, <vscale x 8 x float> %vb, <vscale x 8 x float> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13097 ret <vscale x 8 x float> %v13098}13099 13100define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_unmasked_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {13101; CHECK-LABEL: vfnmadd_vf_nxv8f32_unmasked_commute:13102; CHECK: # %bb.0:13103; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13104; CHECK-NEXT: vfnmadd.vf v8, fa0, v1213105; CHECK-NEXT: ret13106 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013107 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13108 %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)13109 %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13110 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %negva, <vscale x 8 x float> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13111 ret <vscale x 8 x float> %v13112}13113 13114define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_neg_splat(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {13115; CHECK-LABEL: vfnmadd_vf_nxv8f32_neg_splat:13116; CHECK: # %bb.0:13117; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13118; CHECK-NEXT: vfnmadd.vf v8, fa0, v12, v0.t13119; CHECK-NEXT: ret13120 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013121 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13122 %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)13123 %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)13124 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negvb, <vscale x 8 x float> %negvc, <vscale x 8 x i1> %m, i32 %evl)13125 ret <vscale x 8 x float> %v13126}13127 13128define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_neg_splat_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {13129; CHECK-LABEL: vfnmadd_vf_nxv8f32_neg_splat_commute:13130; CHECK: # %bb.0:13131; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13132; CHECK-NEXT: vfnmadd.vf v8, fa0, v12, v0.t13133; CHECK-NEXT: ret13134 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013135 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13136 %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)13137 %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)13138 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negvb, <vscale x 8 x float> %va, <vscale x 8 x float> %negvc, <vscale x 8 x i1> %m, i32 %evl)13139 ret <vscale x 8 x float> %v13140}13141 13142define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_neg_splat_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {13143; CHECK-LABEL: vfnmadd_vf_nxv8f32_neg_splat_unmasked:13144; CHECK: # %bb.0:13145; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13146; CHECK-NEXT: vfnmadd.vf v8, fa0, v1213147; CHECK-NEXT: ret13148 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013149 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13150 %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)13151 %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13152 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negvb, <vscale x 8 x float> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13153 ret <vscale x 8 x float> %v13154}13155 13156define <vscale x 8 x float> @vfnmadd_vf_nxv8f32_neg_splat_unmasked_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {13157; CHECK-LABEL: vfnmadd_vf_nxv8f32_neg_splat_unmasked_commute:13158; CHECK: # %bb.0:13159; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13160; CHECK-NEXT: vfnmadd.vf v8, fa0, v1213161; CHECK-NEXT: ret13162 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013163 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13164 %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)13165 %negvc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13166 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negvb, <vscale x 8 x float> %va, <vscale x 8 x float> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13167 ret <vscale x 8 x float> %v13168}13169 13170define <vscale x 8 x float> @vfnmsub_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {13171; CHECK-LABEL: vfnmsub_vv_nxv8f32:13172; CHECK: # %bb.0:13173; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13174; CHECK-NEXT: vfnmadd.vv v12, v8, v16, v0.t13175; CHECK-NEXT: vmv.v.v v8, v1213176; CHECK-NEXT: ret13177 %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)13178 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)13179 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negb, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)13180 ret <vscale x 8 x float> %v13181}13182 13183define <vscale x 8 x float> @vfnmsub_vv_nxv8f32_commuted(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {13184; CHECK-LABEL: vfnmsub_vv_nxv8f32_commuted:13185; CHECK: # %bb.0:13186; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13187; CHECK-NEXT: vfnmadd.vv v8, v12, v16, v0.t13188; CHECK-NEXT: ret13189 %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)13190 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)13191 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negb, <vscale x 8 x float> %va, <vscale x 8 x float> %negc, <vscale x 8 x i1> %m, i32 %evl)13192 ret <vscale x 8 x float> %v13193}13194 13195define <vscale x 8 x float> @vfnmsub_vv_nxv8f32_unmasked(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {13196; CHECK-LABEL: vfnmsub_vv_nxv8f32_unmasked:13197; CHECK: # %bb.0:13198; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13199; CHECK-NEXT: vfnmadd.vv v8, v12, v1613200; CHECK-NEXT: ret13201 %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)13202 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)13203 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negb, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13204 ret <vscale x 8 x float> %v13205}13206 13207define <vscale x 8 x float> @vfnmsub_vv_nxv8f32_unmasked_commuted(<vscale x 8 x float> %va, <vscale x 8 x float> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {13208; CHECK-LABEL: vfnmsub_vv_nxv8f32_unmasked_commuted:13209; CHECK: # %bb.0:13210; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13211; CHECK-NEXT: vfnmadd.vv v8, v12, v1613212; CHECK-NEXT: ret13213 %negb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)13214 %negc = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)13215 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negb, <vscale x 8 x float> %va, <vscale x 8 x float> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13216 ret <vscale x 8 x float> %v13217}13218 13219define <vscale x 8 x float> @vfnmsub_vf_nxv8f32(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {13220; CHECK-LABEL: vfnmsub_vf_nxv8f32:13221; CHECK: # %bb.0:13222; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13223; CHECK-NEXT: vfnmsub.vf v8, fa0, v12, v0.t13224; CHECK-NEXT: ret13225 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013226 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13227 %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> %m, i32 %evl)13228 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negva, <vscale x 8 x float> %vb, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)13229 ret <vscale x 8 x float> %v13230}13231 13232define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {13233; CHECK-LABEL: vfnmsub_vf_nxv8f32_commute:13234; CHECK: # %bb.0:13235; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13236; CHECK-NEXT: vfnmsub.vf v8, fa0, v12, v0.t13237; CHECK-NEXT: ret13238 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013239 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13240 %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> %m, i32 %evl)13241 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %negva, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)13242 ret <vscale x 8 x float> %v13243}13244 13245define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {13246; CHECK-LABEL: vfnmsub_vf_nxv8f32_unmasked:13247; CHECK: # %bb.0:13248; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13249; CHECK-NEXT: vfnmsub.vf v8, fa0, v1213250; CHECK-NEXT: ret13251 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013252 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13253 %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)13254 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negva, <vscale x 8 x float> %vb, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13255 ret <vscale x 8 x float> %v13256}13257 13258define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_unmasked_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {13259; CHECK-LABEL: vfnmsub_vf_nxv8f32_unmasked_commute:13260; CHECK: # %bb.0:13261; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13262; CHECK-NEXT: vfnmsub.vf v8, fa0, v1213263; CHECK-NEXT: ret13264 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013265 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13266 %negva = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)13267 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %negva, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13268 ret <vscale x 8 x float> %v13269}13270 13271define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_neg_splat(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {13272; CHECK-LABEL: vfnmsub_vf_nxv8f32_neg_splat:13273; CHECK: # %bb.0:13274; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13275; CHECK-NEXT: vfnmsub.vf v8, fa0, v12, v0.t13276; CHECK-NEXT: ret13277 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013278 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13279 %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)13280 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negvb, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)13281 ret <vscale x 8 x float> %v13282}13283 13284define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_neg_splat_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {13285; CHECK-LABEL: vfnmsub_vf_nxv8f32_neg_splat_commute:13286; CHECK: # %bb.0:13287; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13288; CHECK-NEXT: vfnmsub.vf v8, fa0, v12, v0.t13289; CHECK-NEXT: ret13290 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013291 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13292 %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)13293 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negvb, <vscale x 8 x float> %va, <vscale x 8 x float> %vc, <vscale x 8 x i1> %m, i32 %evl)13294 ret <vscale x 8 x float> %v13295}13296 13297define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_neg_splat_unmasked(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {13298; CHECK-LABEL: vfnmsub_vf_nxv8f32_neg_splat_unmasked:13299; CHECK: # %bb.0:13300; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13301; CHECK-NEXT: vfnmsub.vf v8, fa0, v1213302; CHECK-NEXT: ret13303 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013304 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13305 %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)13306 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %negvb, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13307 ret <vscale x 8 x float> %v13308}13309 13310define <vscale x 8 x float> @vfnmsub_vf_nxv8f32_neg_splat_unmasked_commute(<vscale x 8 x float> %va, float %b, <vscale x 8 x float> %vc, i32 zeroext %evl) {13311; CHECK-LABEL: vfnmsub_vf_nxv8f32_neg_splat_unmasked_commute:13312; CHECK: # %bb.0:13313; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma13314; CHECK-NEXT: vfnmsub.vf v8, fa0, v1213315; CHECK-NEXT: ret13316 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 013317 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer13318 %negvb = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)13319 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %negvb, <vscale x 8 x float> %va, <vscale x 8 x float> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)13320 ret <vscale x 8 x float> %v13321}13322 13323define <vscale x 16 x float> @vfmsub_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {13324; CHECK-LABEL: vfmsub_vv_nxv16f32:13325; CHECK: # %bb.0:13326; CHECK-NEXT: vl8re32.v v24, (a0)13327; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma13328; CHECK-NEXT: vfmsub.vv v16, v8, v24, v0.t13329; CHECK-NEXT: vmv.v.v v8, v1613330; CHECK-NEXT: ret13331 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)13332 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)13333 ret <vscale x 16 x float> %v13334}13335 13336define <vscale x 16 x float> @vfmsub_vv_nxv16f32_unmasked(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {13337; CHECK-LABEL: vfmsub_vv_nxv16f32_unmasked:13338; CHECK: # %bb.0:13339; CHECK-NEXT: vl8re32.v v24, (a0)13340; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma13341; CHECK-NEXT: vfmsub.vv v8, v16, v2413342; CHECK-NEXT: ret13343 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)13344 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13345 ret <vscale x 16 x float> %v13346}13347 13348define <vscale x 16 x float> @vfmsub_vf_nxv16f32(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {13349; CHECK-LABEL: vfmsub_vf_nxv16f32:13350; CHECK: # %bb.0:13351; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13352; CHECK-NEXT: vfmsub.vf v8, fa0, v16, v0.t13353; CHECK-NEXT: ret13354 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013355 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13356 %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)13357 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x float> %negvc, <vscale x 16 x i1> %m, i32 %evl)13358 ret <vscale x 16 x float> %v13359}13360 13361define <vscale x 16 x float> @vfmsub_vf_nxv16f32_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {13362; CHECK-LABEL: vfmsub_vf_nxv16f32_commute:13363; CHECK: # %bb.0:13364; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13365; CHECK-NEXT: vfmsub.vf v8, fa0, v16, v0.t13366; CHECK-NEXT: ret13367 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013368 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13369 %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)13370 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %va, <vscale x 16 x float> %negvc, <vscale x 16 x i1> %m, i32 %evl)13371 ret <vscale x 16 x float> %v13372}13373 13374define <vscale x 16 x float> @vfmsub_vf_nxv16f32_unmasked(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {13375; CHECK-LABEL: vfmsub_vf_nxv16f32_unmasked:13376; CHECK: # %bb.0:13377; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13378; CHECK-NEXT: vfmsub.vf v8, fa0, v1613379; CHECK-NEXT: ret13380 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013381 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13382 %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13383 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x float> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13384 ret <vscale x 16 x float> %v13385}13386 13387define <vscale x 16 x float> @vfmsub_vf_nxv16f32_unmasked_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {13388; CHECK-LABEL: vfmsub_vf_nxv16f32_unmasked_commute:13389; CHECK: # %bb.0:13390; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13391; CHECK-NEXT: vfmsub.vf v8, fa0, v1613392; CHECK-NEXT: ret13393 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013394 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13395 %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13396 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %va, <vscale x 16 x float> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13397 ret <vscale x 16 x float> %v13398}13399 13400define <vscale x 16 x float> @vfnmadd_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {13401; CHECK-LABEL: vfnmadd_vv_nxv16f32:13402; CHECK: # %bb.0:13403; CHECK-NEXT: vl8re32.v v24, (a0)13404; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma13405; CHECK-NEXT: vfnmadd.vv v16, v8, v24, v0.t13406; CHECK-NEXT: vmv.v.v v8, v1613407; CHECK-NEXT: ret13408 %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> %m, i32 %evl)13409 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)13410 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negb, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)13411 ret <vscale x 16 x float> %v13412}13413 13414define <vscale x 16 x float> @vfnmadd_vv_nxv16f32_commuted(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {13415; CHECK-LABEL: vfnmadd_vv_nxv16f32_commuted:13416; CHECK: # %bb.0:13417; CHECK-NEXT: vl8re32.v v24, (a0)13418; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma13419; CHECK-NEXT: vfnmadd.vv v8, v16, v24, v0.t13420; CHECK-NEXT: ret13421 %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> %m, i32 %evl)13422 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)13423 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negb, <vscale x 16 x float> %va, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)13424 ret <vscale x 16 x float> %v13425}13426 13427define <vscale x 16 x float> @vfnmadd_vv_nxv16f32_unmasked(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {13428; CHECK-LABEL: vfnmadd_vv_nxv16f32_unmasked:13429; CHECK: # %bb.0:13430; CHECK-NEXT: vl8re32.v v24, (a0)13431; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma13432; CHECK-NEXT: vfnmadd.vv v8, v16, v2413433; CHECK-NEXT: ret13434 %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)13435 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)13436 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negb, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13437 ret <vscale x 16 x float> %v13438}13439 13440define <vscale x 16 x float> @vfnmadd_vv_nxv16f32_unmasked_commuted(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {13441; CHECK-LABEL: vfnmadd_vv_nxv16f32_unmasked_commuted:13442; CHECK: # %bb.0:13443; CHECK-NEXT: vl8re32.v v24, (a0)13444; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma13445; CHECK-NEXT: vfnmadd.vv v8, v16, v2413446; CHECK-NEXT: ret13447 %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)13448 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)13449 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negb, <vscale x 16 x float> %va, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13450 ret <vscale x 16 x float> %v13451}13452 13453define <vscale x 16 x float> @vfnmadd_vf_nxv16f32(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {13454; CHECK-LABEL: vfnmadd_vf_nxv16f32:13455; CHECK: # %bb.0:13456; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13457; CHECK-NEXT: vfnmadd.vf v8, fa0, v16, v0.t13458; CHECK-NEXT: ret13459 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013460 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13461 %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> %m, i32 %evl)13462 %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)13463 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negva, <vscale x 16 x float> %vb, <vscale x 16 x float> %negvc, <vscale x 16 x i1> %m, i32 %evl)13464 ret <vscale x 16 x float> %v13465}13466 13467define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {13468; CHECK-LABEL: vfnmadd_vf_nxv16f32_commute:13469; CHECK: # %bb.0:13470; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13471; CHECK-NEXT: vfnmadd.vf v8, fa0, v16, v0.t13472; CHECK-NEXT: ret13473 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013474 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13475 %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> %m, i32 %evl)13476 %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)13477 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %negva, <vscale x 16 x float> %negvc, <vscale x 16 x i1> %m, i32 %evl)13478 ret <vscale x 16 x float> %v13479}13480 13481define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_unmasked(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {13482; CHECK-LABEL: vfnmadd_vf_nxv16f32_unmasked:13483; CHECK: # %bb.0:13484; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13485; CHECK-NEXT: vfnmadd.vf v8, fa0, v1613486; CHECK-NEXT: ret13487 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013488 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13489 %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)13490 %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13491 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negva, <vscale x 16 x float> %vb, <vscale x 16 x float> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13492 ret <vscale x 16 x float> %v13493}13494 13495define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_unmasked_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {13496; CHECK-LABEL: vfnmadd_vf_nxv16f32_unmasked_commute:13497; CHECK: # %bb.0:13498; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13499; CHECK-NEXT: vfnmadd.vf v8, fa0, v1613500; CHECK-NEXT: ret13501 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013502 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13503 %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)13504 %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13505 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %negva, <vscale x 16 x float> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13506 ret <vscale x 16 x float> %v13507}13508 13509define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_neg_splat(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {13510; CHECK-LABEL: vfnmadd_vf_nxv16f32_neg_splat:13511; CHECK: # %bb.0:13512; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13513; CHECK-NEXT: vfnmadd.vf v8, fa0, v16, v0.t13514; CHECK-NEXT: ret13515 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013516 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13517 %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 %evl)13518 %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)13519 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negvb, <vscale x 16 x float> %negvc, <vscale x 16 x i1> %m, i32 %evl)13520 ret <vscale x 16 x float> %v13521}13522 13523define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_neg_splat_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {13524; CHECK-LABEL: vfnmadd_vf_nxv16f32_neg_splat_commute:13525; CHECK: # %bb.0:13526; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13527; CHECK-NEXT: vfnmadd.vf v8, fa0, v16, v0.t13528; CHECK-NEXT: ret13529 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013530 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13531 %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 %evl)13532 %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)13533 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negvb, <vscale x 16 x float> %va, <vscale x 16 x float> %negvc, <vscale x 16 x i1> %m, i32 %evl)13534 ret <vscale x 16 x float> %v13535}13536 13537define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_neg_splat_unmasked(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {13538; CHECK-LABEL: vfnmadd_vf_nxv16f32_neg_splat_unmasked:13539; CHECK: # %bb.0:13540; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13541; CHECK-NEXT: vfnmadd.vf v8, fa0, v1613542; CHECK-NEXT: ret13543 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013544 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13545 %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)13546 %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13547 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negvb, <vscale x 16 x float> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13548 ret <vscale x 16 x float> %v13549}13550 13551define <vscale x 16 x float> @vfnmadd_vf_nxv16f32_neg_splat_unmasked_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {13552; CHECK-LABEL: vfnmadd_vf_nxv16f32_neg_splat_unmasked_commute:13553; CHECK: # %bb.0:13554; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13555; CHECK-NEXT: vfnmadd.vf v8, fa0, v1613556; CHECK-NEXT: ret13557 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013558 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13559 %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)13560 %negvc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13561 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negvb, <vscale x 16 x float> %va, <vscale x 16 x float> %negvc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13562 ret <vscale x 16 x float> %v13563}13564 13565define <vscale x 16 x float> @vfnmsub_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {13566; CHECK-LABEL: vfnmsub_vv_nxv16f32:13567; CHECK: # %bb.0:13568; CHECK-NEXT: vl8re32.v v24, (a0)13569; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma13570; CHECK-NEXT: vfnmadd.vv v16, v8, v24, v0.t13571; CHECK-NEXT: vmv.v.v v8, v1613572; CHECK-NEXT: ret13573 %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> %m, i32 %evl)13574 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)13575 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negb, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)13576 ret <vscale x 16 x float> %v13577}13578 13579define <vscale x 16 x float> @vfnmsub_vv_nxv16f32_commuted(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {13580; CHECK-LABEL: vfnmsub_vv_nxv16f32_commuted:13581; CHECK: # %bb.0:13582; CHECK-NEXT: vl8re32.v v24, (a0)13583; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma13584; CHECK-NEXT: vfnmadd.vv v8, v16, v24, v0.t13585; CHECK-NEXT: ret13586 %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> %m, i32 %evl)13587 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)13588 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negb, <vscale x 16 x float> %va, <vscale x 16 x float> %negc, <vscale x 16 x i1> %m, i32 %evl)13589 ret <vscale x 16 x float> %v13590}13591 13592define <vscale x 16 x float> @vfnmsub_vv_nxv16f32_unmasked(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {13593; CHECK-LABEL: vfnmsub_vv_nxv16f32_unmasked:13594; CHECK: # %bb.0:13595; CHECK-NEXT: vl8re32.v v24, (a0)13596; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma13597; CHECK-NEXT: vfnmadd.vv v8, v16, v2413598; CHECK-NEXT: ret13599 %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)13600 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)13601 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negb, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13602 ret <vscale x 16 x float> %v13603}13604 13605define <vscale x 16 x float> @vfnmsub_vv_nxv16f32_unmasked_commuted(<vscale x 16 x float> %va, <vscale x 16 x float> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {13606; CHECK-LABEL: vfnmsub_vv_nxv16f32_unmasked_commuted:13607; CHECK: # %bb.0:13608; CHECK-NEXT: vl8re32.v v24, (a0)13609; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma13610; CHECK-NEXT: vfnmadd.vv v8, v16, v2413611; CHECK-NEXT: ret13612 %negb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %b, <vscale x 16 x i1> splat (i1 true), i32 %evl)13613 %negc = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 true), i32 %evl)13614 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negb, <vscale x 16 x float> %va, <vscale x 16 x float> %negc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13615 ret <vscale x 16 x float> %v13616}13617 13618define <vscale x 16 x float> @vfnmsub_vf_nxv16f32(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {13619; CHECK-LABEL: vfnmsub_vf_nxv16f32:13620; CHECK: # %bb.0:13621; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13622; CHECK-NEXT: vfnmsub.vf v8, fa0, v16, v0.t13623; CHECK-NEXT: ret13624 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013625 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13626 %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> %m, i32 %evl)13627 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negva, <vscale x 16 x float> %vb, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)13628 ret <vscale x 16 x float> %v13629}13630 13631define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {13632; CHECK-LABEL: vfnmsub_vf_nxv16f32_commute:13633; CHECK: # %bb.0:13634; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13635; CHECK-NEXT: vfnmsub.vf v8, fa0, v16, v0.t13636; CHECK-NEXT: ret13637 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013638 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13639 %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> %m, i32 %evl)13640 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %negva, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)13641 ret <vscale x 16 x float> %v13642}13643 13644define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_unmasked(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {13645; CHECK-LABEL: vfnmsub_vf_nxv16f32_unmasked:13646; CHECK: # %bb.0:13647; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13648; CHECK-NEXT: vfnmsub.vf v8, fa0, v1613649; CHECK-NEXT: ret13650 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013651 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13652 %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)13653 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negva, <vscale x 16 x float> %vb, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13654 ret <vscale x 16 x float> %v13655}13656 13657define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_unmasked_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {13658; CHECK-LABEL: vfnmsub_vf_nxv16f32_unmasked_commute:13659; CHECK: # %bb.0:13660; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13661; CHECK-NEXT: vfnmsub.vf v8, fa0, v1613662; CHECK-NEXT: ret13663 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013664 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13665 %negva = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x i1> splat (i1 true), i32 %evl)13666 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x float> %negva, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13667 ret <vscale x 16 x float> %v13668}13669 13670define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_neg_splat(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {13671; CHECK-LABEL: vfnmsub_vf_nxv16f32_neg_splat:13672; CHECK: # %bb.0:13673; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13674; CHECK-NEXT: vfnmsub.vf v8, fa0, v16, v0.t13675; CHECK-NEXT: ret13676 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013677 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13678 %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 %evl)13679 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negvb, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)13680 ret <vscale x 16 x float> %v13681}13682 13683define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_neg_splat_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 zeroext %evl) {13684; CHECK-LABEL: vfnmsub_vf_nxv16f32_neg_splat_commute:13685; CHECK: # %bb.0:13686; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13687; CHECK-NEXT: vfnmsub.vf v8, fa0, v16, v0.t13688; CHECK-NEXT: ret13689 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013690 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13691 %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 %evl)13692 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negvb, <vscale x 16 x float> %va, <vscale x 16 x float> %vc, <vscale x 16 x i1> %m, i32 %evl)13693 ret <vscale x 16 x float> %v13694}13695 13696define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_neg_splat_unmasked(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {13697; CHECK-LABEL: vfnmsub_vf_nxv16f32_neg_splat_unmasked:13698; CHECK: # %bb.0:13699; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13700; CHECK-NEXT: vfnmsub.vf v8, fa0, v1613701; CHECK-NEXT: ret13702 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013703 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13704 %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)13705 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %negvb, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13706 ret <vscale x 16 x float> %v13707}13708 13709define <vscale x 16 x float> @vfnmsub_vf_nxv16f32_neg_splat_unmasked_commute(<vscale x 16 x float> %va, float %b, <vscale x 16 x float> %vc, i32 zeroext %evl) {13710; CHECK-LABEL: vfnmsub_vf_nxv16f32_neg_splat_unmasked_commute:13711; CHECK: # %bb.0:13712; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma13713; CHECK-NEXT: vfnmsub.vf v8, fa0, v1613714; CHECK-NEXT: ret13715 %elt.head = insertelement <vscale x 16 x float> poison, float %b, i32 013716 %vb = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer13717 %negvb = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %vb, <vscale x 16 x i1> splat (i1 true), i32 %evl)13718 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %negvb, <vscale x 16 x float> %va, <vscale x 16 x float> %vc, <vscale x 16 x i1> splat (i1 true), i32 %evl)13719 ret <vscale x 16 x float> %v13720}13721 13722define <vscale x 1 x double> @vfmsub_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {13723; CHECK-LABEL: vfmsub_vv_nxv1f64:13724; CHECK: # %bb.0:13725; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13726; CHECK-NEXT: vfmsub.vv v9, v8, v10, v0.t13727; CHECK-NEXT: vmv.v.v v8, v913728; CHECK-NEXT: ret13729 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)13730 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)13731 ret <vscale x 1 x double> %v13732}13733 13734define <vscale x 1 x double> @vfmsub_vv_nxv1f64_unmasked(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {13735; CHECK-LABEL: vfmsub_vv_nxv1f64_unmasked:13736; CHECK: # %bb.0:13737; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13738; CHECK-NEXT: vfmsub.vv v8, v9, v1013739; CHECK-NEXT: ret13740 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)13741 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13742 ret <vscale x 1 x double> %v13743}13744 13745define <vscale x 1 x double> @vfmsub_vf_nxv1f64(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {13746; CHECK-LABEL: vfmsub_vf_nxv1f64:13747; CHECK: # %bb.0:13748; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13749; CHECK-NEXT: vfmsub.vf v8, fa0, v9, v0.t13750; CHECK-NEXT: ret13751 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 013752 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer13753 %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)13754 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x double> %negvc, <vscale x 1 x i1> %m, i32 %evl)13755 ret <vscale x 1 x double> %v13756}13757 13758define <vscale x 1 x double> @vfmsub_vf_nxv1f64_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {13759; CHECK-LABEL: vfmsub_vf_nxv1f64_commute:13760; CHECK: # %bb.0:13761; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13762; CHECK-NEXT: vfmsub.vf v8, fa0, v9, v0.t13763; CHECK-NEXT: ret13764 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 013765 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer13766 %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)13767 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %va, <vscale x 1 x double> %negvc, <vscale x 1 x i1> %m, i32 %evl)13768 ret <vscale x 1 x double> %v13769}13770 13771define <vscale x 1 x double> @vfmsub_vf_nxv1f64_unmasked(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {13772; CHECK-LABEL: vfmsub_vf_nxv1f64_unmasked:13773; CHECK: # %bb.0:13774; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13775; CHECK-NEXT: vfmsub.vf v8, fa0, v913776; CHECK-NEXT: ret13777 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 013778 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer13779 %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13780 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x double> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13781 ret <vscale x 1 x double> %v13782}13783 13784define <vscale x 1 x double> @vfmsub_vf_nxv1f64_unmasked_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {13785; CHECK-LABEL: vfmsub_vf_nxv1f64_unmasked_commute:13786; CHECK: # %bb.0:13787; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13788; CHECK-NEXT: vfmsub.vf v8, fa0, v913789; CHECK-NEXT: ret13790 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 013791 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer13792 %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13793 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %va, <vscale x 1 x double> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13794 ret <vscale x 1 x double> %v13795}13796 13797define <vscale x 1 x double> @vfnmadd_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {13798; CHECK-LABEL: vfnmadd_vv_nxv1f64:13799; CHECK: # %bb.0:13800; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13801; CHECK-NEXT: vfnmadd.vv v9, v8, v10, v0.t13802; CHECK-NEXT: vmv.v.v v8, v913803; CHECK-NEXT: ret13804 %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %evl)13805 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)13806 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negb, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)13807 ret <vscale x 1 x double> %v13808}13809 13810define <vscale x 1 x double> @vfnmadd_vv_nxv1f64_commuted(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {13811; CHECK-LABEL: vfnmadd_vv_nxv1f64_commuted:13812; CHECK: # %bb.0:13813; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13814; CHECK-NEXT: vfnmadd.vv v8, v9, v10, v0.t13815; CHECK-NEXT: ret13816 %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %evl)13817 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)13818 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negb, <vscale x 1 x double> %va, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)13819 ret <vscale x 1 x double> %v13820}13821 13822define <vscale x 1 x double> @vfnmadd_vv_nxv1f64_unmasked(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {13823; CHECK-LABEL: vfnmadd_vv_nxv1f64_unmasked:13824; CHECK: # %bb.0:13825; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13826; CHECK-NEXT: vfnmadd.vv v8, v9, v1013827; CHECK-NEXT: ret13828 %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)13829 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)13830 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negb, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13831 ret <vscale x 1 x double> %v13832}13833 13834define <vscale x 1 x double> @vfnmadd_vv_nxv1f64_unmasked_commuted(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {13835; CHECK-LABEL: vfnmadd_vv_nxv1f64_unmasked_commuted:13836; CHECK: # %bb.0:13837; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13838; CHECK-NEXT: vfnmadd.vv v8, v9, v1013839; CHECK-NEXT: ret13840 %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)13841 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)13842 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negb, <vscale x 1 x double> %va, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13843 ret <vscale x 1 x double> %v13844}13845 13846define <vscale x 1 x double> @vfnmadd_vf_nxv1f64(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {13847; CHECK-LABEL: vfnmadd_vf_nxv1f64:13848; CHECK: # %bb.0:13849; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13850; CHECK-NEXT: vfnmadd.vf v8, fa0, v9, v0.t13851; CHECK-NEXT: ret13852 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 013853 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer13854 %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> %m, i32 %evl)13855 %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)13856 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negva, <vscale x 1 x double> %vb, <vscale x 1 x double> %negvc, <vscale x 1 x i1> %m, i32 %evl)13857 ret <vscale x 1 x double> %v13858}13859 13860define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {13861; CHECK-LABEL: vfnmadd_vf_nxv1f64_commute:13862; CHECK: # %bb.0:13863; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13864; CHECK-NEXT: vfnmadd.vf v8, fa0, v9, v0.t13865; CHECK-NEXT: ret13866 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 013867 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer13868 %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> %m, i32 %evl)13869 %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)13870 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %negva, <vscale x 1 x double> %negvc, <vscale x 1 x i1> %m, i32 %evl)13871 ret <vscale x 1 x double> %v13872}13873 13874define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_unmasked(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {13875; CHECK-LABEL: vfnmadd_vf_nxv1f64_unmasked:13876; CHECK: # %bb.0:13877; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13878; CHECK-NEXT: vfnmadd.vf v8, fa0, v913879; CHECK-NEXT: ret13880 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 013881 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer13882 %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)13883 %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13884 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negva, <vscale x 1 x double> %vb, <vscale x 1 x double> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13885 ret <vscale x 1 x double> %v13886}13887 13888define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_unmasked_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {13889; CHECK-LABEL: vfnmadd_vf_nxv1f64_unmasked_commute:13890; CHECK: # %bb.0:13891; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13892; CHECK-NEXT: vfnmadd.vf v8, fa0, v913893; CHECK-NEXT: ret13894 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 013895 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer13896 %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)13897 %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13898 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %negva, <vscale x 1 x double> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13899 ret <vscale x 1 x double> %v13900}13901 13902define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_neg_splat(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {13903; CHECK-LABEL: vfnmadd_vf_nxv1f64_neg_splat:13904; CHECK: # %bb.0:13905; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13906; CHECK-NEXT: vfnmadd.vf v8, fa0, v9, v0.t13907; CHECK-NEXT: ret13908 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 013909 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer13910 %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 %evl)13911 %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)13912 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negvb, <vscale x 1 x double> %negvc, <vscale x 1 x i1> %m, i32 %evl)13913 ret <vscale x 1 x double> %v13914}13915 13916define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_neg_splat_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {13917; CHECK-LABEL: vfnmadd_vf_nxv1f64_neg_splat_commute:13918; CHECK: # %bb.0:13919; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13920; CHECK-NEXT: vfnmadd.vf v8, fa0, v9, v0.t13921; CHECK-NEXT: ret13922 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 013923 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer13924 %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 %evl)13925 %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)13926 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negvb, <vscale x 1 x double> %va, <vscale x 1 x double> %negvc, <vscale x 1 x i1> %m, i32 %evl)13927 ret <vscale x 1 x double> %v13928}13929 13930define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_neg_splat_unmasked(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {13931; CHECK-LABEL: vfnmadd_vf_nxv1f64_neg_splat_unmasked:13932; CHECK: # %bb.0:13933; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13934; CHECK-NEXT: vfnmadd.vf v8, fa0, v913935; CHECK-NEXT: ret13936 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 013937 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer13938 %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)13939 %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13940 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negvb, <vscale x 1 x double> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13941 ret <vscale x 1 x double> %v13942}13943 13944define <vscale x 1 x double> @vfnmadd_vf_nxv1f64_neg_splat_unmasked_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {13945; CHECK-LABEL: vfnmadd_vf_nxv1f64_neg_splat_unmasked_commute:13946; CHECK: # %bb.0:13947; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13948; CHECK-NEXT: vfnmadd.vf v8, fa0, v913949; CHECK-NEXT: ret13950 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 013951 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer13952 %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)13953 %negvc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13954 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negvb, <vscale x 1 x double> %va, <vscale x 1 x double> %negvc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13955 ret <vscale x 1 x double> %v13956}13957 13958define <vscale x 1 x double> @vfnmsub_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {13959; CHECK-LABEL: vfnmsub_vv_nxv1f64:13960; CHECK: # %bb.0:13961; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13962; CHECK-NEXT: vfnmadd.vv v9, v8, v10, v0.t13963; CHECK-NEXT: vmv.v.v v8, v913964; CHECK-NEXT: ret13965 %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %evl)13966 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)13967 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negb, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)13968 ret <vscale x 1 x double> %v13969}13970 13971define <vscale x 1 x double> @vfnmsub_vv_nxv1f64_commuted(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {13972; CHECK-LABEL: vfnmsub_vv_nxv1f64_commuted:13973; CHECK: # %bb.0:13974; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13975; CHECK-NEXT: vfnmadd.vv v8, v9, v10, v0.t13976; CHECK-NEXT: ret13977 %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %evl)13978 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)13979 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negb, <vscale x 1 x double> %va, <vscale x 1 x double> %negc, <vscale x 1 x i1> %m, i32 %evl)13980 ret <vscale x 1 x double> %v13981}13982 13983define <vscale x 1 x double> @vfnmsub_vv_nxv1f64_unmasked(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {13984; CHECK-LABEL: vfnmsub_vv_nxv1f64_unmasked:13985; CHECK: # %bb.0:13986; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13987; CHECK-NEXT: vfnmadd.vv v8, v9, v1013988; CHECK-NEXT: ret13989 %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)13990 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)13991 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negb, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)13992 ret <vscale x 1 x double> %v13993}13994 13995define <vscale x 1 x double> @vfnmsub_vv_nxv1f64_unmasked_commuted(<vscale x 1 x double> %va, <vscale x 1 x double> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {13996; CHECK-LABEL: vfnmsub_vv_nxv1f64_unmasked_commuted:13997; CHECK: # %bb.0:13998; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma13999; CHECK-NEXT: vfnmadd.vv v8, v9, v1014000; CHECK-NEXT: ret14001 %negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> splat (i1 true), i32 %evl)14002 %negc = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 true), i32 %evl)14003 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negb, <vscale x 1 x double> %va, <vscale x 1 x double> %negc, <vscale x 1 x i1> splat (i1 true), i32 %evl)14004 ret <vscale x 1 x double> %v14005}14006 14007define <vscale x 1 x double> @vfnmsub_vf_nxv1f64(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {14008; CHECK-LABEL: vfnmsub_vf_nxv1f64:14009; CHECK: # %bb.0:14010; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma14011; CHECK-NEXT: vfnmsub.vf v8, fa0, v9, v0.t14012; CHECK-NEXT: ret14013 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 014014 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer14015 %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> %m, i32 %evl)14016 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negva, <vscale x 1 x double> %vb, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)14017 ret <vscale x 1 x double> %v14018}14019 14020define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {14021; CHECK-LABEL: vfnmsub_vf_nxv1f64_commute:14022; CHECK: # %bb.0:14023; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma14024; CHECK-NEXT: vfnmsub.vf v8, fa0, v9, v0.t14025; CHECK-NEXT: ret14026 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 014027 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer14028 %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> %m, i32 %evl)14029 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %negva, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)14030 ret <vscale x 1 x double> %v14031}14032 14033define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_unmasked(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {14034; CHECK-LABEL: vfnmsub_vf_nxv1f64_unmasked:14035; CHECK: # %bb.0:14036; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma14037; CHECK-NEXT: vfnmsub.vf v8, fa0, v914038; CHECK-NEXT: ret14039 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 014040 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer14041 %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)14042 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negva, <vscale x 1 x double> %vb, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)14043 ret <vscale x 1 x double> %v14044}14045 14046define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_unmasked_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {14047; CHECK-LABEL: vfnmsub_vf_nxv1f64_unmasked_commute:14048; CHECK: # %bb.0:14049; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma14050; CHECK-NEXT: vfnmsub.vf v8, fa0, v914051; CHECK-NEXT: ret14052 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 014053 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer14054 %negva = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x i1> splat (i1 true), i32 %evl)14055 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x double> %negva, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)14056 ret <vscale x 1 x double> %v14057}14058 14059define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_neg_splat(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {14060; CHECK-LABEL: vfnmsub_vf_nxv1f64_neg_splat:14061; CHECK: # %bb.0:14062; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma14063; CHECK-NEXT: vfnmsub.vf v8, fa0, v9, v0.t14064; CHECK-NEXT: ret14065 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 014066 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer14067 %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 %evl)14068 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negvb, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)14069 ret <vscale x 1 x double> %v14070}14071 14072define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_neg_splat_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 zeroext %evl) {14073; CHECK-LABEL: vfnmsub_vf_nxv1f64_neg_splat_commute:14074; CHECK: # %bb.0:14075; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma14076; CHECK-NEXT: vfnmsub.vf v8, fa0, v9, v0.t14077; CHECK-NEXT: ret14078 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 014079 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer14080 %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 %evl)14081 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negvb, <vscale x 1 x double> %va, <vscale x 1 x double> %vc, <vscale x 1 x i1> %m, i32 %evl)14082 ret <vscale x 1 x double> %v14083}14084 14085define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_neg_splat_unmasked(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {14086; CHECK-LABEL: vfnmsub_vf_nxv1f64_neg_splat_unmasked:14087; CHECK: # %bb.0:14088; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma14089; CHECK-NEXT: vfnmsub.vf v8, fa0, v914090; CHECK-NEXT: ret14091 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 014092 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer14093 %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)14094 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %negvb, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)14095 ret <vscale x 1 x double> %v14096}14097 14098define <vscale x 1 x double> @vfnmsub_vf_nxv1f64_neg_splat_unmasked_commute(<vscale x 1 x double> %va, double %b, <vscale x 1 x double> %vc, i32 zeroext %evl) {14099; CHECK-LABEL: vfnmsub_vf_nxv1f64_neg_splat_unmasked_commute:14100; CHECK: # %bb.0:14101; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma14102; CHECK-NEXT: vfnmsub.vf v8, fa0, v914103; CHECK-NEXT: ret14104 %elt.head = insertelement <vscale x 1 x double> poison, double %b, i32 014105 %vb = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer14106 %negvb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %vb, <vscale x 1 x i1> splat (i1 true), i32 %evl)14107 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %negvb, <vscale x 1 x double> %va, <vscale x 1 x double> %vc, <vscale x 1 x i1> splat (i1 true), i32 %evl)14108 ret <vscale x 1 x double> %v14109}14110 14111define <vscale x 2 x double> @vfmsub_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {14112; CHECK-LABEL: vfmsub_vv_nxv2f64:14113; CHECK: # %bb.0:14114; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14115; CHECK-NEXT: vfmsub.vv v10, v8, v12, v0.t14116; CHECK-NEXT: vmv.v.v v8, v1014117; CHECK-NEXT: ret14118 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)14119 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)14120 ret <vscale x 2 x double> %v14121}14122 14123define <vscale x 2 x double> @vfmsub_vv_nxv2f64_unmasked(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {14124; CHECK-LABEL: vfmsub_vv_nxv2f64_unmasked:14125; CHECK: # %bb.0:14126; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14127; CHECK-NEXT: vfmsub.vv v8, v10, v1214128; CHECK-NEXT: ret14129 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)14130 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14131 ret <vscale x 2 x double> %v14132}14133 14134define <vscale x 2 x double> @vfmsub_vf_nxv2f64(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {14135; CHECK-LABEL: vfmsub_vf_nxv2f64:14136; CHECK: # %bb.0:14137; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14138; CHECK-NEXT: vfmsub.vf v8, fa0, v10, v0.t14139; CHECK-NEXT: ret14140 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014141 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14142 %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)14143 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x double> %negvc, <vscale x 2 x i1> %m, i32 %evl)14144 ret <vscale x 2 x double> %v14145}14146 14147define <vscale x 2 x double> @vfmsub_vf_nxv2f64_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {14148; CHECK-LABEL: vfmsub_vf_nxv2f64_commute:14149; CHECK: # %bb.0:14150; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14151; CHECK-NEXT: vfmsub.vf v8, fa0, v10, v0.t14152; CHECK-NEXT: ret14153 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014154 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14155 %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)14156 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %va, <vscale x 2 x double> %negvc, <vscale x 2 x i1> %m, i32 %evl)14157 ret <vscale x 2 x double> %v14158}14159 14160define <vscale x 2 x double> @vfmsub_vf_nxv2f64_unmasked(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {14161; CHECK-LABEL: vfmsub_vf_nxv2f64_unmasked:14162; CHECK: # %bb.0:14163; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14164; CHECK-NEXT: vfmsub.vf v8, fa0, v1014165; CHECK-NEXT: ret14166 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014167 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14168 %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14169 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x double> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14170 ret <vscale x 2 x double> %v14171}14172 14173define <vscale x 2 x double> @vfmsub_vf_nxv2f64_unmasked_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {14174; CHECK-LABEL: vfmsub_vf_nxv2f64_unmasked_commute:14175; CHECK: # %bb.0:14176; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14177; CHECK-NEXT: vfmsub.vf v8, fa0, v1014178; CHECK-NEXT: ret14179 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014180 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14181 %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14182 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %va, <vscale x 2 x double> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14183 ret <vscale x 2 x double> %v14184}14185 14186define <vscale x 2 x double> @vfnmadd_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {14187; CHECK-LABEL: vfnmadd_vv_nxv2f64:14188; CHECK: # %bb.0:14189; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14190; CHECK-NEXT: vfnmadd.vv v10, v8, v12, v0.t14191; CHECK-NEXT: vmv.v.v v8, v1014192; CHECK-NEXT: ret14193 %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> %m, i32 %evl)14194 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)14195 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negb, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)14196 ret <vscale x 2 x double> %v14197}14198 14199define <vscale x 2 x double> @vfnmadd_vv_nxv2f64_commuted(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {14200; CHECK-LABEL: vfnmadd_vv_nxv2f64_commuted:14201; CHECK: # %bb.0:14202; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14203; CHECK-NEXT: vfnmadd.vv v8, v10, v12, v0.t14204; CHECK-NEXT: ret14205 %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> %m, i32 %evl)14206 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)14207 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negb, <vscale x 2 x double> %va, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)14208 ret <vscale x 2 x double> %v14209}14210 14211define <vscale x 2 x double> @vfnmadd_vv_nxv2f64_unmasked(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {14212; CHECK-LABEL: vfnmadd_vv_nxv2f64_unmasked:14213; CHECK: # %bb.0:14214; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14215; CHECK-NEXT: vfnmadd.vv v8, v10, v1214216; CHECK-NEXT: ret14217 %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)14218 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)14219 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negb, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14220 ret <vscale x 2 x double> %v14221}14222 14223define <vscale x 2 x double> @vfnmadd_vv_nxv2f64_unmasked_commuted(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {14224; CHECK-LABEL: vfnmadd_vv_nxv2f64_unmasked_commuted:14225; CHECK: # %bb.0:14226; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14227; CHECK-NEXT: vfnmadd.vv v8, v10, v1214228; CHECK-NEXT: ret14229 %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)14230 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)14231 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negb, <vscale x 2 x double> %va, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14232 ret <vscale x 2 x double> %v14233}14234 14235define <vscale x 2 x double> @vfnmadd_vf_nxv2f64(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {14236; CHECK-LABEL: vfnmadd_vf_nxv2f64:14237; CHECK: # %bb.0:14238; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14239; CHECK-NEXT: vfnmadd.vf v8, fa0, v10, v0.t14240; CHECK-NEXT: ret14241 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014242 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14243 %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)14244 %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)14245 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negva, <vscale x 2 x double> %vb, <vscale x 2 x double> %negvc, <vscale x 2 x i1> %m, i32 %evl)14246 ret <vscale x 2 x double> %v14247}14248 14249define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {14250; CHECK-LABEL: vfnmadd_vf_nxv2f64_commute:14251; CHECK: # %bb.0:14252; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14253; CHECK-NEXT: vfnmadd.vf v8, fa0, v10, v0.t14254; CHECK-NEXT: ret14255 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014256 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14257 %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)14258 %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)14259 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %negva, <vscale x 2 x double> %negvc, <vscale x 2 x i1> %m, i32 %evl)14260 ret <vscale x 2 x double> %v14261}14262 14263define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_unmasked(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {14264; CHECK-LABEL: vfnmadd_vf_nxv2f64_unmasked:14265; CHECK: # %bb.0:14266; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14267; CHECK-NEXT: vfnmadd.vf v8, fa0, v1014268; CHECK-NEXT: ret14269 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014270 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14271 %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)14272 %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14273 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negva, <vscale x 2 x double> %vb, <vscale x 2 x double> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14274 ret <vscale x 2 x double> %v14275}14276 14277define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_unmasked_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {14278; CHECK-LABEL: vfnmadd_vf_nxv2f64_unmasked_commute:14279; CHECK: # %bb.0:14280; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14281; CHECK-NEXT: vfnmadd.vf v8, fa0, v1014282; CHECK-NEXT: ret14283 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014284 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14285 %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)14286 %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14287 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %negva, <vscale x 2 x double> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14288 ret <vscale x 2 x double> %v14289}14290 14291define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_neg_splat(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {14292; CHECK-LABEL: vfnmadd_vf_nxv2f64_neg_splat:14293; CHECK: # %bb.0:14294; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14295; CHECK-NEXT: vfnmadd.vf v8, fa0, v10, v0.t14296; CHECK-NEXT: ret14297 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014298 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14299 %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 %evl)14300 %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)14301 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negvb, <vscale x 2 x double> %negvc, <vscale x 2 x i1> %m, i32 %evl)14302 ret <vscale x 2 x double> %v14303}14304 14305define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_neg_splat_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {14306; CHECK-LABEL: vfnmadd_vf_nxv2f64_neg_splat_commute:14307; CHECK: # %bb.0:14308; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14309; CHECK-NEXT: vfnmadd.vf v8, fa0, v10, v0.t14310; CHECK-NEXT: ret14311 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014312 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14313 %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 %evl)14314 %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)14315 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negvb, <vscale x 2 x double> %va, <vscale x 2 x double> %negvc, <vscale x 2 x i1> %m, i32 %evl)14316 ret <vscale x 2 x double> %v14317}14318 14319define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_neg_splat_unmasked(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {14320; CHECK-LABEL: vfnmadd_vf_nxv2f64_neg_splat_unmasked:14321; CHECK: # %bb.0:14322; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14323; CHECK-NEXT: vfnmadd.vf v8, fa0, v1014324; CHECK-NEXT: ret14325 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014326 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14327 %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)14328 %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14329 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negvb, <vscale x 2 x double> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14330 ret <vscale x 2 x double> %v14331}14332 14333define <vscale x 2 x double> @vfnmadd_vf_nxv2f64_neg_splat_unmasked_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {14334; CHECK-LABEL: vfnmadd_vf_nxv2f64_neg_splat_unmasked_commute:14335; CHECK: # %bb.0:14336; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14337; CHECK-NEXT: vfnmadd.vf v8, fa0, v1014338; CHECK-NEXT: ret14339 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014340 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14341 %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)14342 %negvc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14343 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negvb, <vscale x 2 x double> %va, <vscale x 2 x double> %negvc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14344 ret <vscale x 2 x double> %v14345}14346 14347define <vscale x 2 x double> @vfnmsub_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {14348; CHECK-LABEL: vfnmsub_vv_nxv2f64:14349; CHECK: # %bb.0:14350; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14351; CHECK-NEXT: vfnmadd.vv v10, v8, v12, v0.t14352; CHECK-NEXT: vmv.v.v v8, v1014353; CHECK-NEXT: ret14354 %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> %m, i32 %evl)14355 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)14356 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negb, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)14357 ret <vscale x 2 x double> %v14358}14359 14360define <vscale x 2 x double> @vfnmsub_vv_nxv2f64_commuted(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {14361; CHECK-LABEL: vfnmsub_vv_nxv2f64_commuted:14362; CHECK: # %bb.0:14363; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14364; CHECK-NEXT: vfnmadd.vv v8, v10, v12, v0.t14365; CHECK-NEXT: ret14366 %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> %m, i32 %evl)14367 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)14368 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negb, <vscale x 2 x double> %va, <vscale x 2 x double> %negc, <vscale x 2 x i1> %m, i32 %evl)14369 ret <vscale x 2 x double> %v14370}14371 14372define <vscale x 2 x double> @vfnmsub_vv_nxv2f64_unmasked(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {14373; CHECK-LABEL: vfnmsub_vv_nxv2f64_unmasked:14374; CHECK: # %bb.0:14375; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14376; CHECK-NEXT: vfnmadd.vv v8, v10, v1214377; CHECK-NEXT: ret14378 %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)14379 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)14380 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negb, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14381 ret <vscale x 2 x double> %v14382}14383 14384define <vscale x 2 x double> @vfnmsub_vv_nxv2f64_unmasked_commuted(<vscale x 2 x double> %va, <vscale x 2 x double> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {14385; CHECK-LABEL: vfnmsub_vv_nxv2f64_unmasked_commuted:14386; CHECK: # %bb.0:14387; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14388; CHECK-NEXT: vfnmadd.vv v8, v10, v1214389; CHECK-NEXT: ret14390 %negb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %b, <vscale x 2 x i1> splat (i1 true), i32 %evl)14391 %negc = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 true), i32 %evl)14392 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negb, <vscale x 2 x double> %va, <vscale x 2 x double> %negc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14393 ret <vscale x 2 x double> %v14394}14395 14396define <vscale x 2 x double> @vfnmsub_vf_nxv2f64(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {14397; CHECK-LABEL: vfnmsub_vf_nxv2f64:14398; CHECK: # %bb.0:14399; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14400; CHECK-NEXT: vfnmsub.vf v8, fa0, v10, v0.t14401; CHECK-NEXT: ret14402 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014403 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14404 %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)14405 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negva, <vscale x 2 x double> %vb, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)14406 ret <vscale x 2 x double> %v14407}14408 14409define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {14410; CHECK-LABEL: vfnmsub_vf_nxv2f64_commute:14411; CHECK: # %bb.0:14412; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14413; CHECK-NEXT: vfnmsub.vf v8, fa0, v10, v0.t14414; CHECK-NEXT: ret14415 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014416 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14417 %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> %m, i32 %evl)14418 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %negva, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)14419 ret <vscale x 2 x double> %v14420}14421 14422define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_unmasked(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {14423; CHECK-LABEL: vfnmsub_vf_nxv2f64_unmasked:14424; CHECK: # %bb.0:14425; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14426; CHECK-NEXT: vfnmsub.vf v8, fa0, v1014427; CHECK-NEXT: ret14428 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014429 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14430 %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)14431 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negva, <vscale x 2 x double> %vb, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14432 ret <vscale x 2 x double> %v14433}14434 14435define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_unmasked_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {14436; CHECK-LABEL: vfnmsub_vf_nxv2f64_unmasked_commute:14437; CHECK: # %bb.0:14438; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14439; CHECK-NEXT: vfnmsub.vf v8, fa0, v1014440; CHECK-NEXT: ret14441 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014442 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14443 %negva = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x i1> splat (i1 true), i32 %evl)14444 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x double> %negva, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14445 ret <vscale x 2 x double> %v14446}14447 14448define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_neg_splat(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {14449; CHECK-LABEL: vfnmsub_vf_nxv2f64_neg_splat:14450; CHECK: # %bb.0:14451; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14452; CHECK-NEXT: vfnmsub.vf v8, fa0, v10, v0.t14453; CHECK-NEXT: ret14454 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014455 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14456 %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 %evl)14457 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negvb, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)14458 ret <vscale x 2 x double> %v14459}14460 14461define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_neg_splat_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 zeroext %evl) {14462; CHECK-LABEL: vfnmsub_vf_nxv2f64_neg_splat_commute:14463; CHECK: # %bb.0:14464; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14465; CHECK-NEXT: vfnmsub.vf v8, fa0, v10, v0.t14466; CHECK-NEXT: ret14467 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014468 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14469 %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 %evl)14470 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negvb, <vscale x 2 x double> %va, <vscale x 2 x double> %vc, <vscale x 2 x i1> %m, i32 %evl)14471 ret <vscale x 2 x double> %v14472}14473 14474define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_neg_splat_unmasked(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {14475; CHECK-LABEL: vfnmsub_vf_nxv2f64_neg_splat_unmasked:14476; CHECK: # %bb.0:14477; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14478; CHECK-NEXT: vfnmsub.vf v8, fa0, v1014479; CHECK-NEXT: ret14480 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014481 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14482 %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)14483 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %negvb, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14484 ret <vscale x 2 x double> %v14485}14486 14487define <vscale x 2 x double> @vfnmsub_vf_nxv2f64_neg_splat_unmasked_commute(<vscale x 2 x double> %va, double %b, <vscale x 2 x double> %vc, i32 zeroext %evl) {14488; CHECK-LABEL: vfnmsub_vf_nxv2f64_neg_splat_unmasked_commute:14489; CHECK: # %bb.0:14490; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma14491; CHECK-NEXT: vfnmsub.vf v8, fa0, v1014492; CHECK-NEXT: ret14493 %elt.head = insertelement <vscale x 2 x double> poison, double %b, i32 014494 %vb = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer14495 %negvb = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %vb, <vscale x 2 x i1> splat (i1 true), i32 %evl)14496 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %negvb, <vscale x 2 x double> %va, <vscale x 2 x double> %vc, <vscale x 2 x i1> splat (i1 true), i32 %evl)14497 ret <vscale x 2 x double> %v14498}14499 14500define <vscale x 4 x double> @vfmsub_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {14501; CHECK-LABEL: vfmsub_vv_nxv4f64:14502; CHECK: # %bb.0:14503; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14504; CHECK-NEXT: vfmsub.vv v12, v8, v16, v0.t14505; CHECK-NEXT: vmv.v.v v8, v1214506; CHECK-NEXT: ret14507 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)14508 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)14509 ret <vscale x 4 x double> %v14510}14511 14512define <vscale x 4 x double> @vfmsub_vv_nxv4f64_unmasked(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {14513; CHECK-LABEL: vfmsub_vv_nxv4f64_unmasked:14514; CHECK: # %bb.0:14515; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14516; CHECK-NEXT: vfmsub.vv v8, v12, v1614517; CHECK-NEXT: ret14518 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)14519 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14520 ret <vscale x 4 x double> %v14521}14522 14523define <vscale x 4 x double> @vfmsub_vf_nxv4f64(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {14524; CHECK-LABEL: vfmsub_vf_nxv4f64:14525; CHECK: # %bb.0:14526; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14527; CHECK-NEXT: vfmsub.vf v8, fa0, v12, v0.t14528; CHECK-NEXT: ret14529 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014530 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14531 %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)14532 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x double> %negvc, <vscale x 4 x i1> %m, i32 %evl)14533 ret <vscale x 4 x double> %v14534}14535 14536define <vscale x 4 x double> @vfmsub_vf_nxv4f64_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {14537; CHECK-LABEL: vfmsub_vf_nxv4f64_commute:14538; CHECK: # %bb.0:14539; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14540; CHECK-NEXT: vfmsub.vf v8, fa0, v12, v0.t14541; CHECK-NEXT: ret14542 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014543 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14544 %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)14545 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %va, <vscale x 4 x double> %negvc, <vscale x 4 x i1> %m, i32 %evl)14546 ret <vscale x 4 x double> %v14547}14548 14549define <vscale x 4 x double> @vfmsub_vf_nxv4f64_unmasked(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {14550; CHECK-LABEL: vfmsub_vf_nxv4f64_unmasked:14551; CHECK: # %bb.0:14552; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14553; CHECK-NEXT: vfmsub.vf v8, fa0, v1214554; CHECK-NEXT: ret14555 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014556 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14557 %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14558 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x double> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14559 ret <vscale x 4 x double> %v14560}14561 14562define <vscale x 4 x double> @vfmsub_vf_nxv4f64_unmasked_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {14563; CHECK-LABEL: vfmsub_vf_nxv4f64_unmasked_commute:14564; CHECK: # %bb.0:14565; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14566; CHECK-NEXT: vfmsub.vf v8, fa0, v1214567; CHECK-NEXT: ret14568 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014569 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14570 %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14571 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %va, <vscale x 4 x double> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14572 ret <vscale x 4 x double> %v14573}14574 14575define <vscale x 4 x double> @vfnmadd_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {14576; CHECK-LABEL: vfnmadd_vv_nxv4f64:14577; CHECK: # %bb.0:14578; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14579; CHECK-NEXT: vfnmadd.vv v12, v8, v16, v0.t14580; CHECK-NEXT: vmv.v.v v8, v1214581; CHECK-NEXT: ret14582 %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> %m, i32 %evl)14583 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)14584 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negb, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)14585 ret <vscale x 4 x double> %v14586}14587 14588define <vscale x 4 x double> @vfnmadd_vv_nxv4f64_commuted(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {14589; CHECK-LABEL: vfnmadd_vv_nxv4f64_commuted:14590; CHECK: # %bb.0:14591; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14592; CHECK-NEXT: vfnmadd.vv v8, v12, v16, v0.t14593; CHECK-NEXT: ret14594 %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> %m, i32 %evl)14595 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)14596 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negb, <vscale x 4 x double> %va, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)14597 ret <vscale x 4 x double> %v14598}14599 14600define <vscale x 4 x double> @vfnmadd_vv_nxv4f64_unmasked(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {14601; CHECK-LABEL: vfnmadd_vv_nxv4f64_unmasked:14602; CHECK: # %bb.0:14603; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14604; CHECK-NEXT: vfnmadd.vv v8, v12, v1614605; CHECK-NEXT: ret14606 %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)14607 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)14608 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negb, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14609 ret <vscale x 4 x double> %v14610}14611 14612define <vscale x 4 x double> @vfnmadd_vv_nxv4f64_unmasked_commuted(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {14613; CHECK-LABEL: vfnmadd_vv_nxv4f64_unmasked_commuted:14614; CHECK: # %bb.0:14615; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14616; CHECK-NEXT: vfnmadd.vv v8, v12, v1614617; CHECK-NEXT: ret14618 %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)14619 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)14620 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negb, <vscale x 4 x double> %va, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14621 ret <vscale x 4 x double> %v14622}14623 14624define <vscale x 4 x double> @vfnmadd_vf_nxv4f64(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {14625; CHECK-LABEL: vfnmadd_vf_nxv4f64:14626; CHECK: # %bb.0:14627; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14628; CHECK-NEXT: vfnmadd.vf v8, fa0, v12, v0.t14629; CHECK-NEXT: ret14630 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014631 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14632 %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> %m, i32 %evl)14633 %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)14634 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negva, <vscale x 4 x double> %vb, <vscale x 4 x double> %negvc, <vscale x 4 x i1> %m, i32 %evl)14635 ret <vscale x 4 x double> %v14636}14637 14638define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {14639; CHECK-LABEL: vfnmadd_vf_nxv4f64_commute:14640; CHECK: # %bb.0:14641; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14642; CHECK-NEXT: vfnmadd.vf v8, fa0, v12, v0.t14643; CHECK-NEXT: ret14644 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014645 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14646 %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> %m, i32 %evl)14647 %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)14648 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %negva, <vscale x 4 x double> %negvc, <vscale x 4 x i1> %m, i32 %evl)14649 ret <vscale x 4 x double> %v14650}14651 14652define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_unmasked(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {14653; CHECK-LABEL: vfnmadd_vf_nxv4f64_unmasked:14654; CHECK: # %bb.0:14655; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14656; CHECK-NEXT: vfnmadd.vf v8, fa0, v1214657; CHECK-NEXT: ret14658 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014659 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14660 %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)14661 %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14662 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negva, <vscale x 4 x double> %vb, <vscale x 4 x double> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14663 ret <vscale x 4 x double> %v14664}14665 14666define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_unmasked_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {14667; CHECK-LABEL: vfnmadd_vf_nxv4f64_unmasked_commute:14668; CHECK: # %bb.0:14669; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14670; CHECK-NEXT: vfnmadd.vf v8, fa0, v1214671; CHECK-NEXT: ret14672 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014673 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14674 %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)14675 %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14676 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %negva, <vscale x 4 x double> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14677 ret <vscale x 4 x double> %v14678}14679 14680define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_neg_splat(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {14681; CHECK-LABEL: vfnmadd_vf_nxv4f64_neg_splat:14682; CHECK: # %bb.0:14683; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14684; CHECK-NEXT: vfnmadd.vf v8, fa0, v12, v0.t14685; CHECK-NEXT: ret14686 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014687 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14688 %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 %evl)14689 %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)14690 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negvb, <vscale x 4 x double> %negvc, <vscale x 4 x i1> %m, i32 %evl)14691 ret <vscale x 4 x double> %v14692}14693 14694define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_neg_splat_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {14695; CHECK-LABEL: vfnmadd_vf_nxv4f64_neg_splat_commute:14696; CHECK: # %bb.0:14697; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14698; CHECK-NEXT: vfnmadd.vf v8, fa0, v12, v0.t14699; CHECK-NEXT: ret14700 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014701 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14702 %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 %evl)14703 %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)14704 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negvb, <vscale x 4 x double> %va, <vscale x 4 x double> %negvc, <vscale x 4 x i1> %m, i32 %evl)14705 ret <vscale x 4 x double> %v14706}14707 14708define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_neg_splat_unmasked(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {14709; CHECK-LABEL: vfnmadd_vf_nxv4f64_neg_splat_unmasked:14710; CHECK: # %bb.0:14711; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14712; CHECK-NEXT: vfnmadd.vf v8, fa0, v1214713; CHECK-NEXT: ret14714 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014715 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14716 %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)14717 %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14718 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negvb, <vscale x 4 x double> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14719 ret <vscale x 4 x double> %v14720}14721 14722define <vscale x 4 x double> @vfnmadd_vf_nxv4f64_neg_splat_unmasked_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {14723; CHECK-LABEL: vfnmadd_vf_nxv4f64_neg_splat_unmasked_commute:14724; CHECK: # %bb.0:14725; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14726; CHECK-NEXT: vfnmadd.vf v8, fa0, v1214727; CHECK-NEXT: ret14728 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014729 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14730 %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)14731 %negvc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14732 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negvb, <vscale x 4 x double> %va, <vscale x 4 x double> %negvc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14733 ret <vscale x 4 x double> %v14734}14735 14736define <vscale x 4 x double> @vfnmsub_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {14737; CHECK-LABEL: vfnmsub_vv_nxv4f64:14738; CHECK: # %bb.0:14739; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14740; CHECK-NEXT: vfnmadd.vv v12, v8, v16, v0.t14741; CHECK-NEXT: vmv.v.v v8, v1214742; CHECK-NEXT: ret14743 %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> %m, i32 %evl)14744 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)14745 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negb, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)14746 ret <vscale x 4 x double> %v14747}14748 14749define <vscale x 4 x double> @vfnmsub_vv_nxv4f64_commuted(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {14750; CHECK-LABEL: vfnmsub_vv_nxv4f64_commuted:14751; CHECK: # %bb.0:14752; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14753; CHECK-NEXT: vfnmadd.vv v8, v12, v16, v0.t14754; CHECK-NEXT: ret14755 %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> %m, i32 %evl)14756 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)14757 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negb, <vscale x 4 x double> %va, <vscale x 4 x double> %negc, <vscale x 4 x i1> %m, i32 %evl)14758 ret <vscale x 4 x double> %v14759}14760 14761define <vscale x 4 x double> @vfnmsub_vv_nxv4f64_unmasked(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {14762; CHECK-LABEL: vfnmsub_vv_nxv4f64_unmasked:14763; CHECK: # %bb.0:14764; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14765; CHECK-NEXT: vfnmadd.vv v8, v12, v1614766; CHECK-NEXT: ret14767 %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)14768 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)14769 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negb, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14770 ret <vscale x 4 x double> %v14771}14772 14773define <vscale x 4 x double> @vfnmsub_vv_nxv4f64_unmasked_commuted(<vscale x 4 x double> %va, <vscale x 4 x double> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {14774; CHECK-LABEL: vfnmsub_vv_nxv4f64_unmasked_commuted:14775; CHECK: # %bb.0:14776; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14777; CHECK-NEXT: vfnmadd.vv v8, v12, v1614778; CHECK-NEXT: ret14779 %negb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %b, <vscale x 4 x i1> splat (i1 true), i32 %evl)14780 %negc = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 true), i32 %evl)14781 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negb, <vscale x 4 x double> %va, <vscale x 4 x double> %negc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14782 ret <vscale x 4 x double> %v14783}14784 14785define <vscale x 4 x double> @vfnmsub_vf_nxv4f64(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {14786; CHECK-LABEL: vfnmsub_vf_nxv4f64:14787; CHECK: # %bb.0:14788; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14789; CHECK-NEXT: vfnmsub.vf v8, fa0, v12, v0.t14790; CHECK-NEXT: ret14791 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014792 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14793 %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> %m, i32 %evl)14794 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negva, <vscale x 4 x double> %vb, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)14795 ret <vscale x 4 x double> %v14796}14797 14798define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {14799; CHECK-LABEL: vfnmsub_vf_nxv4f64_commute:14800; CHECK: # %bb.0:14801; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14802; CHECK-NEXT: vfnmsub.vf v8, fa0, v12, v0.t14803; CHECK-NEXT: ret14804 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014805 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14806 %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> %m, i32 %evl)14807 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %negva, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)14808 ret <vscale x 4 x double> %v14809}14810 14811define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_unmasked(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {14812; CHECK-LABEL: vfnmsub_vf_nxv4f64_unmasked:14813; CHECK: # %bb.0:14814; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14815; CHECK-NEXT: vfnmsub.vf v8, fa0, v1214816; CHECK-NEXT: ret14817 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014818 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14819 %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)14820 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negva, <vscale x 4 x double> %vb, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14821 ret <vscale x 4 x double> %v14822}14823 14824define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_unmasked_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {14825; CHECK-LABEL: vfnmsub_vf_nxv4f64_unmasked_commute:14826; CHECK: # %bb.0:14827; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14828; CHECK-NEXT: vfnmsub.vf v8, fa0, v1214829; CHECK-NEXT: ret14830 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014831 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14832 %negva = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x i1> splat (i1 true), i32 %evl)14833 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x double> %negva, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14834 ret <vscale x 4 x double> %v14835}14836 14837define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_neg_splat(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {14838; CHECK-LABEL: vfnmsub_vf_nxv4f64_neg_splat:14839; CHECK: # %bb.0:14840; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14841; CHECK-NEXT: vfnmsub.vf v8, fa0, v12, v0.t14842; CHECK-NEXT: ret14843 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014844 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14845 %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 %evl)14846 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negvb, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)14847 ret <vscale x 4 x double> %v14848}14849 14850define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_neg_splat_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 zeroext %evl) {14851; CHECK-LABEL: vfnmsub_vf_nxv4f64_neg_splat_commute:14852; CHECK: # %bb.0:14853; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14854; CHECK-NEXT: vfnmsub.vf v8, fa0, v12, v0.t14855; CHECK-NEXT: ret14856 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014857 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14858 %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 %evl)14859 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negvb, <vscale x 4 x double> %va, <vscale x 4 x double> %vc, <vscale x 4 x i1> %m, i32 %evl)14860 ret <vscale x 4 x double> %v14861}14862 14863define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_neg_splat_unmasked(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {14864; CHECK-LABEL: vfnmsub_vf_nxv4f64_neg_splat_unmasked:14865; CHECK: # %bb.0:14866; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14867; CHECK-NEXT: vfnmsub.vf v8, fa0, v1214868; CHECK-NEXT: ret14869 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014870 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14871 %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)14872 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %negvb, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14873 ret <vscale x 4 x double> %v14874}14875 14876define <vscale x 4 x double> @vfnmsub_vf_nxv4f64_neg_splat_unmasked_commute(<vscale x 4 x double> %va, double %b, <vscale x 4 x double> %vc, i32 zeroext %evl) {14877; CHECK-LABEL: vfnmsub_vf_nxv4f64_neg_splat_unmasked_commute:14878; CHECK: # %bb.0:14879; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma14880; CHECK-NEXT: vfnmsub.vf v8, fa0, v1214881; CHECK-NEXT: ret14882 %elt.head = insertelement <vscale x 4 x double> poison, double %b, i32 014883 %vb = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer14884 %negvb = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %vb, <vscale x 4 x i1> splat (i1 true), i32 %evl)14885 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %negvb, <vscale x 4 x double> %va, <vscale x 4 x double> %vc, <vscale x 4 x i1> splat (i1 true), i32 %evl)14886 ret <vscale x 4 x double> %v14887}14888 14889define <vscale x 8 x double> @vfmsub_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {14890; CHECK-LABEL: vfmsub_vv_nxv8f64:14891; CHECK: # %bb.0:14892; CHECK-NEXT: vl8re64.v v24, (a0)14893; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma14894; CHECK-NEXT: vfmsub.vv v16, v8, v24, v0.t14895; CHECK-NEXT: vmv.v.v v8, v1614896; CHECK-NEXT: ret14897 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)14898 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)14899 ret <vscale x 8 x double> %v14900}14901 14902define <vscale x 8 x double> @vfmsub_vv_nxv8f64_unmasked(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {14903; CHECK-LABEL: vfmsub_vv_nxv8f64_unmasked:14904; CHECK: # %bb.0:14905; CHECK-NEXT: vl8re64.v v24, (a0)14906; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma14907; CHECK-NEXT: vfmsub.vv v8, v16, v2414908; CHECK-NEXT: ret14909 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)14910 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)14911 ret <vscale x 8 x double> %v14912}14913 14914define <vscale x 8 x double> @vfmsub_vf_nxv8f64(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {14915; CHECK-LABEL: vfmsub_vf_nxv8f64:14916; CHECK: # %bb.0:14917; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma14918; CHECK-NEXT: vfmsub.vf v8, fa0, v16, v0.t14919; CHECK-NEXT: ret14920 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 014921 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer14922 %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)14923 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x double> %negvc, <vscale x 8 x i1> %m, i32 %evl)14924 ret <vscale x 8 x double> %v14925}14926 14927define <vscale x 8 x double> @vfmsub_vf_nxv8f64_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {14928; CHECK-LABEL: vfmsub_vf_nxv8f64_commute:14929; CHECK: # %bb.0:14930; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma14931; CHECK-NEXT: vfmsub.vf v8, fa0, v16, v0.t14932; CHECK-NEXT: ret14933 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 014934 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer14935 %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)14936 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %va, <vscale x 8 x double> %negvc, <vscale x 8 x i1> %m, i32 %evl)14937 ret <vscale x 8 x double> %v14938}14939 14940define <vscale x 8 x double> @vfmsub_vf_nxv8f64_unmasked(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {14941; CHECK-LABEL: vfmsub_vf_nxv8f64_unmasked:14942; CHECK: # %bb.0:14943; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma14944; CHECK-NEXT: vfmsub.vf v8, fa0, v1614945; CHECK-NEXT: ret14946 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 014947 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer14948 %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)14949 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x double> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)14950 ret <vscale x 8 x double> %v14951}14952 14953define <vscale x 8 x double> @vfmsub_vf_nxv8f64_unmasked_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {14954; CHECK-LABEL: vfmsub_vf_nxv8f64_unmasked_commute:14955; CHECK: # %bb.0:14956; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma14957; CHECK-NEXT: vfmsub.vf v8, fa0, v1614958; CHECK-NEXT: ret14959 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 014960 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer14961 %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)14962 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %va, <vscale x 8 x double> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)14963 ret <vscale x 8 x double> %v14964}14965 14966define <vscale x 8 x double> @vfnmadd_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {14967; CHECK-LABEL: vfnmadd_vv_nxv8f64:14968; CHECK: # %bb.0:14969; CHECK-NEXT: vl8re64.v v24, (a0)14970; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma14971; CHECK-NEXT: vfnmadd.vv v16, v8, v24, v0.t14972; CHECK-NEXT: vmv.v.v v8, v1614973; CHECK-NEXT: ret14974 %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> %m, i32 %evl)14975 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)14976 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negb, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)14977 ret <vscale x 8 x double> %v14978}14979 14980define <vscale x 8 x double> @vfnmadd_vv_nxv8f64_commuted(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {14981; CHECK-LABEL: vfnmadd_vv_nxv8f64_commuted:14982; CHECK: # %bb.0:14983; CHECK-NEXT: vl8re64.v v24, (a0)14984; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma14985; CHECK-NEXT: vfnmadd.vv v8, v16, v24, v0.t14986; CHECK-NEXT: ret14987 %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> %m, i32 %evl)14988 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)14989 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negb, <vscale x 8 x double> %va, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)14990 ret <vscale x 8 x double> %v14991}14992 14993define <vscale x 8 x double> @vfnmadd_vv_nxv8f64_unmasked(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {14994; CHECK-LABEL: vfnmadd_vv_nxv8f64_unmasked:14995; CHECK: # %bb.0:14996; CHECK-NEXT: vl8re64.v v24, (a0)14997; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma14998; CHECK-NEXT: vfnmadd.vv v8, v16, v2414999; CHECK-NEXT: ret15000 %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)15001 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)15002 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negb, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15003 ret <vscale x 8 x double> %v15004}15005 15006define <vscale x 8 x double> @vfnmadd_vv_nxv8f64_unmasked_commuted(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {15007; CHECK-LABEL: vfnmadd_vv_nxv8f64_unmasked_commuted:15008; CHECK: # %bb.0:15009; CHECK-NEXT: vl8re64.v v24, (a0)15010; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma15011; CHECK-NEXT: vfnmadd.vv v8, v16, v2415012; CHECK-NEXT: ret15013 %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)15014 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)15015 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negb, <vscale x 8 x double> %va, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15016 ret <vscale x 8 x double> %v15017}15018 15019define <vscale x 8 x double> @vfnmadd_vf_nxv8f64(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {15020; CHECK-LABEL: vfnmadd_vf_nxv8f64:15021; CHECK: # %bb.0:15022; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15023; CHECK-NEXT: vfnmadd.vf v8, fa0, v16, v0.t15024; CHECK-NEXT: ret15025 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015026 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15027 %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> %m, i32 %evl)15028 %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)15029 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negva, <vscale x 8 x double> %vb, <vscale x 8 x double> %negvc, <vscale x 8 x i1> %m, i32 %evl)15030 ret <vscale x 8 x double> %v15031}15032 15033define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {15034; CHECK-LABEL: vfnmadd_vf_nxv8f64_commute:15035; CHECK: # %bb.0:15036; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15037; CHECK-NEXT: vfnmadd.vf v8, fa0, v16, v0.t15038; CHECK-NEXT: ret15039 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015040 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15041 %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> %m, i32 %evl)15042 %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)15043 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %negva, <vscale x 8 x double> %negvc, <vscale x 8 x i1> %m, i32 %evl)15044 ret <vscale x 8 x double> %v15045}15046 15047define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_unmasked(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {15048; CHECK-LABEL: vfnmadd_vf_nxv8f64_unmasked:15049; CHECK: # %bb.0:15050; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15051; CHECK-NEXT: vfnmadd.vf v8, fa0, v1615052; CHECK-NEXT: ret15053 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015054 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15055 %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)15056 %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15057 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negva, <vscale x 8 x double> %vb, <vscale x 8 x double> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15058 ret <vscale x 8 x double> %v15059}15060 15061define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_unmasked_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {15062; CHECK-LABEL: vfnmadd_vf_nxv8f64_unmasked_commute:15063; CHECK: # %bb.0:15064; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15065; CHECK-NEXT: vfnmadd.vf v8, fa0, v1615066; CHECK-NEXT: ret15067 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015068 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15069 %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)15070 %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15071 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %negva, <vscale x 8 x double> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15072 ret <vscale x 8 x double> %v15073}15074 15075define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_neg_splat(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {15076; CHECK-LABEL: vfnmadd_vf_nxv8f64_neg_splat:15077; CHECK: # %bb.0:15078; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15079; CHECK-NEXT: vfnmadd.vf v8, fa0, v16, v0.t15080; CHECK-NEXT: ret15081 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015082 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15083 %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 %evl)15084 %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)15085 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negvb, <vscale x 8 x double> %negvc, <vscale x 8 x i1> %m, i32 %evl)15086 ret <vscale x 8 x double> %v15087}15088 15089define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_neg_splat_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {15090; CHECK-LABEL: vfnmadd_vf_nxv8f64_neg_splat_commute:15091; CHECK: # %bb.0:15092; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15093; CHECK-NEXT: vfnmadd.vf v8, fa0, v16, v0.t15094; CHECK-NEXT: ret15095 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015096 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15097 %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 %evl)15098 %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)15099 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negvb, <vscale x 8 x double> %va, <vscale x 8 x double> %negvc, <vscale x 8 x i1> %m, i32 %evl)15100 ret <vscale x 8 x double> %v15101}15102 15103define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_neg_splat_unmasked(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {15104; CHECK-LABEL: vfnmadd_vf_nxv8f64_neg_splat_unmasked:15105; CHECK: # %bb.0:15106; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15107; CHECK-NEXT: vfnmadd.vf v8, fa0, v1615108; CHECK-NEXT: ret15109 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015110 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15111 %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)15112 %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15113 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negvb, <vscale x 8 x double> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15114 ret <vscale x 8 x double> %v15115}15116 15117define <vscale x 8 x double> @vfnmadd_vf_nxv8f64_neg_splat_unmasked_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {15118; CHECK-LABEL: vfnmadd_vf_nxv8f64_neg_splat_unmasked_commute:15119; CHECK: # %bb.0:15120; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15121; CHECK-NEXT: vfnmadd.vf v8, fa0, v1615122; CHECK-NEXT: ret15123 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015124 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15125 %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)15126 %negvc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15127 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negvb, <vscale x 8 x double> %va, <vscale x 8 x double> %negvc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15128 ret <vscale x 8 x double> %v15129}15130 15131define <vscale x 8 x double> @vfnmsub_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {15132; CHECK-LABEL: vfnmsub_vv_nxv8f64:15133; CHECK: # %bb.0:15134; CHECK-NEXT: vl8re64.v v24, (a0)15135; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma15136; CHECK-NEXT: vfnmadd.vv v16, v8, v24, v0.t15137; CHECK-NEXT: vmv.v.v v8, v1615138; CHECK-NEXT: ret15139 %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> %m, i32 %evl)15140 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)15141 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negb, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)15142 ret <vscale x 8 x double> %v15143}15144 15145define <vscale x 8 x double> @vfnmsub_vv_nxv8f64_commuted(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {15146; CHECK-LABEL: vfnmsub_vv_nxv8f64_commuted:15147; CHECK: # %bb.0:15148; CHECK-NEXT: vl8re64.v v24, (a0)15149; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma15150; CHECK-NEXT: vfnmadd.vv v8, v16, v24, v0.t15151; CHECK-NEXT: ret15152 %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> %m, i32 %evl)15153 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)15154 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negb, <vscale x 8 x double> %va, <vscale x 8 x double> %negc, <vscale x 8 x i1> %m, i32 %evl)15155 ret <vscale x 8 x double> %v15156}15157 15158define <vscale x 8 x double> @vfnmsub_vv_nxv8f64_unmasked(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {15159; CHECK-LABEL: vfnmsub_vv_nxv8f64_unmasked:15160; CHECK: # %bb.0:15161; CHECK-NEXT: vl8re64.v v24, (a0)15162; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma15163; CHECK-NEXT: vfnmadd.vv v8, v16, v2415164; CHECK-NEXT: ret15165 %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)15166 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)15167 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negb, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15168 ret <vscale x 8 x double> %v15169}15170 15171define <vscale x 8 x double> @vfnmsub_vv_nxv8f64_unmasked_commuted(<vscale x 8 x double> %va, <vscale x 8 x double> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {15172; CHECK-LABEL: vfnmsub_vv_nxv8f64_unmasked_commuted:15173; CHECK: # %bb.0:15174; CHECK-NEXT: vl8re64.v v24, (a0)15175; CHECK-NEXT: vsetvli zero, a1, e64, m8, ta, ma15176; CHECK-NEXT: vfnmadd.vv v8, v16, v2415177; CHECK-NEXT: ret15178 %negb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %b, <vscale x 8 x i1> splat (i1 true), i32 %evl)15179 %negc = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 true), i32 %evl)15180 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negb, <vscale x 8 x double> %va, <vscale x 8 x double> %negc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15181 ret <vscale x 8 x double> %v15182}15183 15184define <vscale x 8 x double> @vfnmsub_vf_nxv8f64(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {15185; CHECK-LABEL: vfnmsub_vf_nxv8f64:15186; CHECK: # %bb.0:15187; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15188; CHECK-NEXT: vfnmsub.vf v8, fa0, v16, v0.t15189; CHECK-NEXT: ret15190 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015191 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15192 %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> %m, i32 %evl)15193 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negva, <vscale x 8 x double> %vb, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)15194 ret <vscale x 8 x double> %v15195}15196 15197define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {15198; CHECK-LABEL: vfnmsub_vf_nxv8f64_commute:15199; CHECK: # %bb.0:15200; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15201; CHECK-NEXT: vfnmsub.vf v8, fa0, v16, v0.t15202; CHECK-NEXT: ret15203 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015204 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15205 %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> %m, i32 %evl)15206 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %negva, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)15207 ret <vscale x 8 x double> %v15208}15209 15210define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_unmasked(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {15211; CHECK-LABEL: vfnmsub_vf_nxv8f64_unmasked:15212; CHECK: # %bb.0:15213; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15214; CHECK-NEXT: vfnmsub.vf v8, fa0, v1615215; CHECK-NEXT: ret15216 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015217 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15218 %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)15219 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negva, <vscale x 8 x double> %vb, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15220 ret <vscale x 8 x double> %v15221}15222 15223define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_unmasked_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {15224; CHECK-LABEL: vfnmsub_vf_nxv8f64_unmasked_commute:15225; CHECK: # %bb.0:15226; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15227; CHECK-NEXT: vfnmsub.vf v8, fa0, v1615228; CHECK-NEXT: ret15229 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015230 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15231 %negva = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x i1> splat (i1 true), i32 %evl)15232 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %negva, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15233 ret <vscale x 8 x double> %v15234}15235 15236define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_neg_splat(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {15237; CHECK-LABEL: vfnmsub_vf_nxv8f64_neg_splat:15238; CHECK: # %bb.0:15239; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15240; CHECK-NEXT: vfnmsub.vf v8, fa0, v16, v0.t15241; CHECK-NEXT: ret15242 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015243 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15244 %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 %evl)15245 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negvb, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)15246 ret <vscale x 8 x double> %v15247}15248 15249define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_neg_splat_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 zeroext %evl) {15250; CHECK-LABEL: vfnmsub_vf_nxv8f64_neg_splat_commute:15251; CHECK: # %bb.0:15252; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15253; CHECK-NEXT: vfnmsub.vf v8, fa0, v16, v0.t15254; CHECK-NEXT: ret15255 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015256 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15257 %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 %evl)15258 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negvb, <vscale x 8 x double> %va, <vscale x 8 x double> %vc, <vscale x 8 x i1> %m, i32 %evl)15259 ret <vscale x 8 x double> %v15260}15261 15262define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_neg_splat_unmasked(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {15263; CHECK-LABEL: vfnmsub_vf_nxv8f64_neg_splat_unmasked:15264; CHECK: # %bb.0:15265; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15266; CHECK-NEXT: vfnmsub.vf v8, fa0, v1615267; CHECK-NEXT: ret15268 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015269 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15270 %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)15271 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %negvb, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15272 ret <vscale x 8 x double> %v15273}15274 15275define <vscale x 8 x double> @vfnmsub_vf_nxv8f64_neg_splat_unmasked_commute(<vscale x 8 x double> %va, double %b, <vscale x 8 x double> %vc, i32 zeroext %evl) {15276; CHECK-LABEL: vfnmsub_vf_nxv8f64_neg_splat_unmasked_commute:15277; CHECK: # %bb.0:15278; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma15279; CHECK-NEXT: vfnmsub.vf v8, fa0, v1615280; CHECK-NEXT: ret15281 %elt.head = insertelement <vscale x 8 x double> poison, double %b, i32 015282 %vb = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer15283 %negvb = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %vb, <vscale x 8 x i1> splat (i1 true), i32 %evl)15284 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %negvb, <vscale x 8 x double> %va, <vscale x 8 x double> %vc, <vscale x 8 x i1> splat (i1 true), i32 %evl)15285 ret <vscale x 8 x double> %v15286}15287 15288define <vscale x 1 x half> @vfma_vv_nxv1f16_double_neg(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {15289; ZVFH-LABEL: vfma_vv_nxv1f16_double_neg:15290; ZVFH: # %bb.0:15291; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma15292; ZVFH-NEXT: vfmadd.vv v9, v8, v10, v0.t15293; ZVFH-NEXT: vmv1r.v v8, v915294; ZVFH-NEXT: ret15295;15296; ZVFHMIN-LABEL: vfma_vv_nxv1f16_double_neg:15297; ZVFHMIN: # %bb.0:15298; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma15299; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v10, v0.t15300; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t15301; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t15302; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma15303; ZVFHMIN-NEXT: vfmadd.vv v12, v10, v11, v0.t15304; ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, ta, ma15305; ZVFHMIN-NEXT: vfncvt.f.f.w v8, v12, v0.t15306; ZVFHMIN-NEXT: ret15307 %nega = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)15308 %negb = call <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)15309 %v = call <vscale x 1 x half> @llvm.vp.fma.nxv1f16(<vscale x 1 x half> %nega, <vscale x 1 x half> %negb, <vscale x 1 x half> %c, <vscale x 1 x i1> %m, i32 %evl)15310 ret <vscale x 1 x half> %v15311}15312