771 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v,+zvfh \3; RUN: -verify-machineinstrs -target-abi=ilp32d | FileCheck %s4; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+zvfh \5; RUN: -verify-machineinstrs -target-abi=lp64d | FileCheck %s6 7define <vscale x 1 x half> @intrinsic_vmerge_vvm_nxv1f16_nxv1f16_nxv1f16(<vscale x 1 x half> %0, <vscale x 1 x half> %1, <vscale x 1 x i1> %2, iXLen %3) nounwind {8; CHECK-LABEL: intrinsic_vmerge_vvm_nxv1f16_nxv1f16_nxv1f16:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma11; CHECK-NEXT: vmerge.vvm v8, v8, v9, v012; CHECK-NEXT: ret13entry:14 %a = call <vscale x 1 x half> @llvm.riscv.vmerge.nxv1f16.nxv1f16(15 <vscale x 1 x half> poison,16 <vscale x 1 x half> %0,17 <vscale x 1 x half> %1,18 <vscale x 1 x i1> %2,19 iXLen %3)20 21 ret <vscale x 1 x half> %a22}23 24define <vscale x 1 x half> @intrinsic_vfmerge_vfm_nxv1f16_nxv1f16_f16(<vscale x 1 x half> %0, half %1, <vscale x 1 x i1> %2, iXLen %3) nounwind {25; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv1f16_nxv1f16_f16:26; CHECK: # %bb.0: # %entry27; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma28; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v029; CHECK-NEXT: ret30entry:31 %a = call <vscale x 1 x half> @llvm.riscv.vfmerge.nxv1f16.f16(32 <vscale x 1 x half> poison,33 <vscale x 1 x half> %0,34 half %1,35 <vscale x 1 x i1> %2,36 iXLen %3)37 38 ret <vscale x 1 x half> %a39}40 41define <vscale x 2 x half> @intrinsic_vmerge_vvm_nxv2f16_nxv2f16_nxv2f16(<vscale x 2 x half> %0, <vscale x 2 x half> %1, <vscale x 2 x i1> %2, iXLen %3) nounwind {42; CHECK-LABEL: intrinsic_vmerge_vvm_nxv2f16_nxv2f16_nxv2f16:43; CHECK: # %bb.0: # %entry44; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma45; CHECK-NEXT: vmerge.vvm v8, v8, v9, v046; CHECK-NEXT: ret47entry:48 %a = call <vscale x 2 x half> @llvm.riscv.vmerge.nxv2f16.nxv2f16(49 <vscale x 2 x half> poison,50 <vscale x 2 x half> %0,51 <vscale x 2 x half> %1,52 <vscale x 2 x i1> %2,53 iXLen %3)54 55 ret <vscale x 2 x half> %a56}57 58define <vscale x 2 x half> @intrinsic_vfmerge_vfm_nxv2f16_nxv2f16_f16(<vscale x 2 x half> %0, half %1, <vscale x 2 x i1> %2, iXLen %3) nounwind {59; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv2f16_nxv2f16_f16:60; CHECK: # %bb.0: # %entry61; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma62; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v063; CHECK-NEXT: ret64entry:65 %a = call <vscale x 2 x half> @llvm.riscv.vfmerge.nxv2f16.f16(66 <vscale x 2 x half> poison,67 <vscale x 2 x half> %0,68 half %1,69 <vscale x 2 x i1> %2,70 iXLen %3)71 72 ret <vscale x 2 x half> %a73}74 75define <vscale x 4 x half> @intrinsic_vmerge_vvm_nxv4f16_nxv4f16_nxv4f16(<vscale x 4 x half> %0, <vscale x 4 x half> %1, <vscale x 4 x i1> %2, iXLen %3) nounwind {76; CHECK-LABEL: intrinsic_vmerge_vvm_nxv4f16_nxv4f16_nxv4f16:77; CHECK: # %bb.0: # %entry78; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma79; CHECK-NEXT: vmerge.vvm v8, v8, v9, v080; CHECK-NEXT: ret81entry:82 %a = call <vscale x 4 x half> @llvm.riscv.vmerge.nxv4f16.nxv4f16(83 <vscale x 4 x half> poison,84 <vscale x 4 x half> %0,85 <vscale x 4 x half> %1,86 <vscale x 4 x i1> %2,87 iXLen %3)88 89 ret <vscale x 4 x half> %a90}91 92define <vscale x 4 x half> @intrinsic_vfmerge_vfm_nxv4f16_nxv4f16_f16(<vscale x 4 x half> %0, half %1, <vscale x 4 x i1> %2, iXLen %3) nounwind {93; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv4f16_nxv4f16_f16:94; CHECK: # %bb.0: # %entry95; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma96; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v097; CHECK-NEXT: ret98entry:99 %a = call <vscale x 4 x half> @llvm.riscv.vfmerge.nxv4f16.f16(100 <vscale x 4 x half> poison,101 <vscale x 4 x half> %0,102 half %1,103 <vscale x 4 x i1> %2,104 iXLen %3)105 106 ret <vscale x 4 x half> %a107}108 109define <vscale x 8 x half> @intrinsic_vmerge_vvm_nxv8f16_nxv8f16_nxv8f16(<vscale x 8 x half> %0, <vscale x 8 x half> %1, <vscale x 8 x i1> %2, iXLen %3) nounwind {110; CHECK-LABEL: intrinsic_vmerge_vvm_nxv8f16_nxv8f16_nxv8f16:111; CHECK: # %bb.0: # %entry112; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma113; CHECK-NEXT: vmerge.vvm v8, v8, v10, v0114; CHECK-NEXT: ret115entry:116 %a = call <vscale x 8 x half> @llvm.riscv.vmerge.nxv8f16.nxv8f16(117 <vscale x 8 x half> poison,118 <vscale x 8 x half> %0,119 <vscale x 8 x half> %1,120 <vscale x 8 x i1> %2,121 iXLen %3)122 123 ret <vscale x 8 x half> %a124}125 126define <vscale x 8 x half> @intrinsic_vfmerge_vfm_nxv8f16_nxv8f16_f16(<vscale x 8 x half> %0, half %1, <vscale x 8 x i1> %2, iXLen %3) nounwind {127; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv8f16_nxv8f16_f16:128; CHECK: # %bb.0: # %entry129; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma130; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0131; CHECK-NEXT: ret132entry:133 %a = call <vscale x 8 x half> @llvm.riscv.vfmerge.nxv8f16.f16(134 <vscale x 8 x half> poison,135 <vscale x 8 x half> %0,136 half %1,137 <vscale x 8 x i1> %2,138 iXLen %3)139 140 ret <vscale x 8 x half> %a141}142 143define <vscale x 16 x half> @intrinsic_vmerge_vvm_nxv16f16_nxv16f16_nxv16f16(<vscale x 16 x half> %0, <vscale x 16 x half> %1, <vscale x 16 x i1> %2, iXLen %3) nounwind {144; CHECK-LABEL: intrinsic_vmerge_vvm_nxv16f16_nxv16f16_nxv16f16:145; CHECK: # %bb.0: # %entry146; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma147; CHECK-NEXT: vmerge.vvm v8, v8, v12, v0148; CHECK-NEXT: ret149entry:150 %a = call <vscale x 16 x half> @llvm.riscv.vmerge.nxv16f16.nxv16f16(151 <vscale x 16 x half> poison,152 <vscale x 16 x half> %0,153 <vscale x 16 x half> %1,154 <vscale x 16 x i1> %2,155 iXLen %3)156 157 ret <vscale x 16 x half> %a158}159 160define <vscale x 16 x half> @intrinsic_vfmerge_vfm_nxv16f16_nxv16f16_f16(<vscale x 16 x half> %0, half %1, <vscale x 16 x i1> %2, iXLen %3) nounwind {161; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv16f16_nxv16f16_f16:162; CHECK: # %bb.0: # %entry163; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma164; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0165; CHECK-NEXT: ret166entry:167 %a = call <vscale x 16 x half> @llvm.riscv.vfmerge.nxv16f16.f16(168 <vscale x 16 x half> poison,169 <vscale x 16 x half> %0,170 half %1,171 <vscale x 16 x i1> %2,172 iXLen %3)173 174 ret <vscale x 16 x half> %a175}176 177define <vscale x 32 x half> @intrinsic_vmerge_vvm_nxv32f16_nxv32f16_nxv32f16(<vscale x 32 x half> %0, <vscale x 32 x half> %1, <vscale x 32 x i1> %2, iXLen %3) nounwind {178; CHECK-LABEL: intrinsic_vmerge_vvm_nxv32f16_nxv32f16_nxv32f16:179; CHECK: # %bb.0: # %entry180; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma181; CHECK-NEXT: vmerge.vvm v8, v8, v16, v0182; CHECK-NEXT: ret183entry:184 %a = call <vscale x 32 x half> @llvm.riscv.vmerge.nxv32f16.nxv32f16(185 <vscale x 32 x half> poison,186 <vscale x 32 x half> %0,187 <vscale x 32 x half> %1,188 <vscale x 32 x i1> %2,189 iXLen %3)190 191 ret <vscale x 32 x half> %a192}193 194define <vscale x 32 x half> @intrinsic_vfmerge_vfm_nxv32f16_nxv32f16_f16(<vscale x 32 x half> %0, half %1, <vscale x 32 x i1> %2, iXLen %3) nounwind {195; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv32f16_nxv32f16_f16:196; CHECK: # %bb.0: # %entry197; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma198; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0199; CHECK-NEXT: ret200entry:201 %a = call <vscale x 32 x half> @llvm.riscv.vfmerge.nxv32f16.f16(202 <vscale x 32 x half> poison,203 <vscale x 32 x half> %0,204 half %1,205 <vscale x 32 x i1> %2,206 iXLen %3)207 208 ret <vscale x 32 x half> %a209}210 211define <vscale x 1 x float> @intrinsic_vmerge_vvm_nxv1f32_nxv1f32_nxv1f32(<vscale x 1 x float> %0, <vscale x 1 x float> %1, <vscale x 1 x i1> %2, iXLen %3) nounwind {212; CHECK-LABEL: intrinsic_vmerge_vvm_nxv1f32_nxv1f32_nxv1f32:213; CHECK: # %bb.0: # %entry214; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma215; CHECK-NEXT: vmerge.vvm v8, v8, v9, v0216; CHECK-NEXT: ret217entry:218 %a = call <vscale x 1 x float> @llvm.riscv.vmerge.nxv1f32.nxv1f32(219 <vscale x 1 x float> poison,220 <vscale x 1 x float> %0,221 <vscale x 1 x float> %1,222 <vscale x 1 x i1> %2,223 iXLen %3)224 225 ret <vscale x 1 x float> %a226}227 228define <vscale x 1 x float> @intrinsic_vfmerge_vfm_nxv1f32_nxv1f32_f32(<vscale x 1 x float> %0, float %1, <vscale x 1 x i1> %2, iXLen %3) nounwind {229; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv1f32_nxv1f32_f32:230; CHECK: # %bb.0: # %entry231; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma232; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0233; CHECK-NEXT: ret234entry:235 %a = call <vscale x 1 x float> @llvm.riscv.vfmerge.nxv1f32.f32(236 <vscale x 1 x float> poison,237 <vscale x 1 x float> %0,238 float %1,239 <vscale x 1 x i1> %2,240 iXLen %3)241 242 ret <vscale x 1 x float> %a243}244 245define <vscale x 2 x float> @intrinsic_vmerge_vvm_nxv2f32_nxv2f32_nxv2f32(<vscale x 2 x float> %0, <vscale x 2 x float> %1, <vscale x 2 x i1> %2, iXLen %3) nounwind {246; CHECK-LABEL: intrinsic_vmerge_vvm_nxv2f32_nxv2f32_nxv2f32:247; CHECK: # %bb.0: # %entry248; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma249; CHECK-NEXT: vmerge.vvm v8, v8, v9, v0250; CHECK-NEXT: ret251entry:252 %a = call <vscale x 2 x float> @llvm.riscv.vmerge.nxv2f32.nxv2f32(253 <vscale x 2 x float> poison,254 <vscale x 2 x float> %0,255 <vscale x 2 x float> %1,256 <vscale x 2 x i1> %2,257 iXLen %3)258 259 ret <vscale x 2 x float> %a260}261 262define <vscale x 2 x float> @intrinsic_vfmerge_vfm_nxv2f32_nxv2f32_f32(<vscale x 2 x float> %0, float %1, <vscale x 2 x i1> %2, iXLen %3) nounwind {263; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv2f32_nxv2f32_f32:264; CHECK: # %bb.0: # %entry265; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma266; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0267; CHECK-NEXT: ret268entry:269 %a = call <vscale x 2 x float> @llvm.riscv.vfmerge.nxv2f32.f32(270 <vscale x 2 x float> poison,271 <vscale x 2 x float> %0,272 float %1,273 <vscale x 2 x i1> %2,274 iXLen %3)275 276 ret <vscale x 2 x float> %a277}278 279define <vscale x 4 x float> @intrinsic_vmerge_vvm_nxv4f32_nxv4f32_nxv4f32(<vscale x 4 x float> %0, <vscale x 4 x float> %1, <vscale x 4 x i1> %2, iXLen %3) nounwind {280; CHECK-LABEL: intrinsic_vmerge_vvm_nxv4f32_nxv4f32_nxv4f32:281; CHECK: # %bb.0: # %entry282; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma283; CHECK-NEXT: vmerge.vvm v8, v8, v10, v0284; CHECK-NEXT: ret285entry:286 %a = call <vscale x 4 x float> @llvm.riscv.vmerge.nxv4f32.nxv4f32(287 <vscale x 4 x float> poison,288 <vscale x 4 x float> %0,289 <vscale x 4 x float> %1,290 <vscale x 4 x i1> %2,291 iXLen %3)292 293 ret <vscale x 4 x float> %a294}295 296define <vscale x 4 x float> @intrinsic_vfmerge_vfm_nxv4f32_nxv4f32_f32(<vscale x 4 x float> %0, float %1, <vscale x 4 x i1> %2, iXLen %3) nounwind {297; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv4f32_nxv4f32_f32:298; CHECK: # %bb.0: # %entry299; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma300; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0301; CHECK-NEXT: ret302entry:303 %a = call <vscale x 4 x float> @llvm.riscv.vfmerge.nxv4f32.f32(304 <vscale x 4 x float> poison,305 <vscale x 4 x float> %0,306 float %1,307 <vscale x 4 x i1> %2,308 iXLen %3)309 310 ret <vscale x 4 x float> %a311}312 313define <vscale x 8 x float> @intrinsic_vmerge_vvm_nxv8f32_nxv8f32_nxv8f32(<vscale x 8 x float> %0, <vscale x 8 x float> %1, <vscale x 8 x i1> %2, iXLen %3) nounwind {314; CHECK-LABEL: intrinsic_vmerge_vvm_nxv8f32_nxv8f32_nxv8f32:315; CHECK: # %bb.0: # %entry316; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma317; CHECK-NEXT: vmerge.vvm v8, v8, v12, v0318; CHECK-NEXT: ret319entry:320 %a = call <vscale x 8 x float> @llvm.riscv.vmerge.nxv8f32.nxv8f32(321 <vscale x 8 x float> poison,322 <vscale x 8 x float> %0,323 <vscale x 8 x float> %1,324 <vscale x 8 x i1> %2,325 iXLen %3)326 327 ret <vscale x 8 x float> %a328}329 330define <vscale x 8 x float> @intrinsic_vfmerge_vfm_nxv8f32_nxv8f32_f32(<vscale x 8 x float> %0, float %1, <vscale x 8 x i1> %2, iXLen %3) nounwind {331; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv8f32_nxv8f32_f32:332; CHECK: # %bb.0: # %entry333; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma334; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0335; CHECK-NEXT: ret336entry:337 %a = call <vscale x 8 x float> @llvm.riscv.vfmerge.nxv8f32.f32(338 <vscale x 8 x float> poison,339 <vscale x 8 x float> %0,340 float %1,341 <vscale x 8 x i1> %2,342 iXLen %3)343 344 ret <vscale x 8 x float> %a345}346 347define <vscale x 16 x float> @intrinsic_vmerge_vvm_nxv16f32_nxv16f32_nxv16f32(<vscale x 16 x float> %0, <vscale x 16 x float> %1, <vscale x 16 x i1> %2, iXLen %3) nounwind {348; CHECK-LABEL: intrinsic_vmerge_vvm_nxv16f32_nxv16f32_nxv16f32:349; CHECK: # %bb.0: # %entry350; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma351; CHECK-NEXT: vmerge.vvm v8, v8, v16, v0352; CHECK-NEXT: ret353entry:354 %a = call <vscale x 16 x float> @llvm.riscv.vmerge.nxv16f32.nxv16f32(355 <vscale x 16 x float> poison,356 <vscale x 16 x float> %0,357 <vscale x 16 x float> %1,358 <vscale x 16 x i1> %2,359 iXLen %3)360 361 ret <vscale x 16 x float> %a362}363 364define <vscale x 16 x float> @intrinsic_vfmerge_vfm_nxv16f32_nxv16f32_f32(<vscale x 16 x float> %0, float %1, <vscale x 16 x i1> %2, iXLen %3) nounwind {365; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv16f32_nxv16f32_f32:366; CHECK: # %bb.0: # %entry367; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma368; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0369; CHECK-NEXT: ret370entry:371 %a = call <vscale x 16 x float> @llvm.riscv.vfmerge.nxv16f32.f32(372 <vscale x 16 x float> poison,373 <vscale x 16 x float> %0,374 float %1,375 <vscale x 16 x i1> %2,376 iXLen %3)377 378 ret <vscale x 16 x float> %a379}380 381define <vscale x 1 x double> @intrinsic_vmerge_vvm_nxv1f64_nxv1f64_nxv1f64(<vscale x 1 x double> %0, <vscale x 1 x double> %1, <vscale x 1 x i1> %2, iXLen %3) nounwind {382; CHECK-LABEL: intrinsic_vmerge_vvm_nxv1f64_nxv1f64_nxv1f64:383; CHECK: # %bb.0: # %entry384; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma385; CHECK-NEXT: vmerge.vvm v8, v8, v9, v0386; CHECK-NEXT: ret387entry:388 %a = call <vscale x 1 x double> @llvm.riscv.vmerge.nxv1f64.nxv1f64(389 <vscale x 1 x double> poison,390 <vscale x 1 x double> %0,391 <vscale x 1 x double> %1,392 <vscale x 1 x i1> %2,393 iXLen %3)394 395 ret <vscale x 1 x double> %a396}397 398define <vscale x 1 x double> @intrinsic_vfmerge_vfm_nxv1f64_nxv1f64_f64(<vscale x 1 x double> %0, double %1, <vscale x 1 x i1> %2, iXLen %3) nounwind {399; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv1f64_nxv1f64_f64:400; CHECK: # %bb.0: # %entry401; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma402; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0403; CHECK-NEXT: ret404entry:405 %a = call <vscale x 1 x double> @llvm.riscv.vfmerge.nxv1f64.f64(406 <vscale x 1 x double> poison,407 <vscale x 1 x double> %0,408 double %1,409 <vscale x 1 x i1> %2,410 iXLen %3)411 412 ret <vscale x 1 x double> %a413}414 415define <vscale x 2 x double> @intrinsic_vmerge_vvm_nxv2f64_nxv2f64_nxv2f64(<vscale x 2 x double> %0, <vscale x 2 x double> %1, <vscale x 2 x i1> %2, iXLen %3) nounwind {416; CHECK-LABEL: intrinsic_vmerge_vvm_nxv2f64_nxv2f64_nxv2f64:417; CHECK: # %bb.0: # %entry418; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma419; CHECK-NEXT: vmerge.vvm v8, v8, v10, v0420; CHECK-NEXT: ret421entry:422 %a = call <vscale x 2 x double> @llvm.riscv.vmerge.nxv2f64.nxv2f64(423 <vscale x 2 x double> poison,424 <vscale x 2 x double> %0,425 <vscale x 2 x double> %1,426 <vscale x 2 x i1> %2,427 iXLen %3)428 429 ret <vscale x 2 x double> %a430}431 432define <vscale x 2 x double> @intrinsic_vfmerge_vfm_nxv2f64_nxv2f64_f64(<vscale x 2 x double> %0, double %1, <vscale x 2 x i1> %2, iXLen %3) nounwind {433; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv2f64_nxv2f64_f64:434; CHECK: # %bb.0: # %entry435; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma436; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0437; CHECK-NEXT: ret438entry:439 %a = call <vscale x 2 x double> @llvm.riscv.vfmerge.nxv2f64.f64(440 <vscale x 2 x double> poison,441 <vscale x 2 x double> %0,442 double %1,443 <vscale x 2 x i1> %2,444 iXLen %3)445 446 ret <vscale x 2 x double> %a447}448 449define <vscale x 4 x double> @intrinsic_vmerge_vvm_nxv4f64_nxv4f64_nxv4f64(<vscale x 4 x double> %0, <vscale x 4 x double> %1, <vscale x 4 x i1> %2, iXLen %3) nounwind {450; CHECK-LABEL: intrinsic_vmerge_vvm_nxv4f64_nxv4f64_nxv4f64:451; CHECK: # %bb.0: # %entry452; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma453; CHECK-NEXT: vmerge.vvm v8, v8, v12, v0454; CHECK-NEXT: ret455entry:456 %a = call <vscale x 4 x double> @llvm.riscv.vmerge.nxv4f64.nxv4f64(457 <vscale x 4 x double> poison,458 <vscale x 4 x double> %0,459 <vscale x 4 x double> %1,460 <vscale x 4 x i1> %2,461 iXLen %3)462 463 ret <vscale x 4 x double> %a464}465 466define <vscale x 4 x double> @intrinsic_vfmerge_vfm_nxv4f64_nxv4f64_f64(<vscale x 4 x double> %0, double %1, <vscale x 4 x i1> %2, iXLen %3) nounwind {467; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv4f64_nxv4f64_f64:468; CHECK: # %bb.0: # %entry469; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma470; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0471; CHECK-NEXT: ret472entry:473 %a = call <vscale x 4 x double> @llvm.riscv.vfmerge.nxv4f64.f64(474 <vscale x 4 x double> poison,475 <vscale x 4 x double> %0,476 double %1,477 <vscale x 4 x i1> %2,478 iXLen %3)479 480 ret <vscale x 4 x double> %a481}482 483define <vscale x 8 x double> @intrinsic_vmerge_vvm_nxv8f64_nxv8f64_nxv8f64(<vscale x 8 x double> %0, <vscale x 8 x double> %1, <vscale x 8 x i1> %2, iXLen %3) nounwind {484; CHECK-LABEL: intrinsic_vmerge_vvm_nxv8f64_nxv8f64_nxv8f64:485; CHECK: # %bb.0: # %entry486; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma487; CHECK-NEXT: vmerge.vvm v8, v8, v16, v0488; CHECK-NEXT: ret489entry:490 %a = call <vscale x 8 x double> @llvm.riscv.vmerge.nxv8f64.nxv8f64(491 <vscale x 8 x double> poison,492 <vscale x 8 x double> %0,493 <vscale x 8 x double> %1,494 <vscale x 8 x i1> %2,495 iXLen %3)496 497 ret <vscale x 8 x double> %a498}499 500define <vscale x 8 x double> @intrinsic_vfmerge_vfm_nxv8f64_nxv8f64_f64(<vscale x 8 x double> %0, double %1, <vscale x 8 x i1> %2, iXLen %3) nounwind {501; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv8f64_nxv8f64_f64:502; CHECK: # %bb.0: # %entry503; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma504; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0505; CHECK-NEXT: ret506entry:507 %a = call <vscale x 8 x double> @llvm.riscv.vfmerge.nxv8f64.f64(508 <vscale x 8 x double> poison,509 <vscale x 8 x double> %0,510 double %1,511 <vscale x 8 x i1> %2,512 iXLen %3)513 514 ret <vscale x 8 x double> %a515}516 517define <vscale x 1 x half> @intrinsic_vfmerge_vzm_nxv1f16_nxv1f16_f16(<vscale x 1 x half> %0, <vscale x 1 x i1> %1, iXLen %2) nounwind {518; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv1f16_nxv1f16_f16:519; CHECK: # %bb.0: # %entry520; CHECK-NEXT: vsetvli zero, a0, e16, mf4, ta, ma521; CHECK-NEXT: vmerge.vim v8, v8, 0, v0522; CHECK-NEXT: ret523entry:524 %a = call <vscale x 1 x half> @llvm.riscv.vfmerge.nxv1f16.f16(525 <vscale x 1 x half> poison,526 <vscale x 1 x half> %0,527 half zeroinitializer,528 <vscale x 1 x i1> %1,529 iXLen %2)530 531 ret <vscale x 1 x half> %a532}533 534define <vscale x 2 x half> @intrinsic_vfmerge_vzm_nxv2f16_nxv2f16_f16(<vscale x 2 x half> %0, <vscale x 2 x i1> %1, iXLen %2) nounwind {535; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv2f16_nxv2f16_f16:536; CHECK: # %bb.0: # %entry537; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma538; CHECK-NEXT: vmerge.vim v8, v8, 0, v0539; CHECK-NEXT: ret540entry:541 %a = call <vscale x 2 x half> @llvm.riscv.vfmerge.nxv2f16.f16(542 <vscale x 2 x half> poison,543 <vscale x 2 x half> %0,544 half zeroinitializer,545 <vscale x 2 x i1> %1,546 iXLen %2)547 548 ret <vscale x 2 x half> %a549}550 551define <vscale x 4 x half> @intrinsic_vfmerge_vzm_nxv4f16_nxv4f16_f16(<vscale x 4 x half> %0, <vscale x 4 x i1> %1, iXLen %2) nounwind {552; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv4f16_nxv4f16_f16:553; CHECK: # %bb.0: # %entry554; CHECK-NEXT: vsetvli zero, a0, e16, m1, ta, ma555; CHECK-NEXT: vmerge.vim v8, v8, 0, v0556; CHECK-NEXT: ret557entry:558 %a = call <vscale x 4 x half> @llvm.riscv.vfmerge.nxv4f16.f16(559 <vscale x 4 x half> poison,560 <vscale x 4 x half> %0,561 half zeroinitializer,562 <vscale x 4 x i1> %1,563 iXLen %2)564 565 ret <vscale x 4 x half> %a566}567 568define <vscale x 8 x half> @intrinsic_vfmerge_vzm_nxv8f16_nxv8f16_f16(<vscale x 8 x half> %0, <vscale x 8 x i1> %1, iXLen %2) nounwind {569; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv8f16_nxv8f16_f16:570; CHECK: # %bb.0: # %entry571; CHECK-NEXT: vsetvli zero, a0, e16, m2, ta, ma572; CHECK-NEXT: vmerge.vim v8, v8, 0, v0573; CHECK-NEXT: ret574entry:575 %a = call <vscale x 8 x half> @llvm.riscv.vfmerge.nxv8f16.f16(576 <vscale x 8 x half> poison,577 <vscale x 8 x half> %0,578 half zeroinitializer,579 <vscale x 8 x i1> %1,580 iXLen %2)581 582 ret <vscale x 8 x half> %a583}584 585define <vscale x 16 x half> @intrinsic_vfmerge_vzm_nxv16f16_nxv16f16_f16(<vscale x 16 x half> %0, <vscale x 16 x i1> %1, iXLen %2) nounwind {586; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv16f16_nxv16f16_f16:587; CHECK: # %bb.0: # %entry588; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma589; CHECK-NEXT: vmerge.vim v8, v8, 0, v0590; CHECK-NEXT: ret591entry:592 %a = call <vscale x 16 x half> @llvm.riscv.vfmerge.nxv16f16.f16(593 <vscale x 16 x half> poison,594 <vscale x 16 x half> %0,595 half zeroinitializer,596 <vscale x 16 x i1> %1,597 iXLen %2)598 599 ret <vscale x 16 x half> %a600}601 602define <vscale x 32 x half> @intrinsic_vfmerge_vzm_nxv32f16_nxv32f16_f16(<vscale x 32 x half> %0, <vscale x 32 x i1> %1, iXLen %2) nounwind {603; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv32f16_nxv32f16_f16:604; CHECK: # %bb.0: # %entry605; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma606; CHECK-NEXT: vmerge.vim v8, v8, 0, v0607; CHECK-NEXT: ret608entry:609 %a = call <vscale x 32 x half> @llvm.riscv.vfmerge.nxv32f16.f16(610 <vscale x 32 x half> poison,611 <vscale x 32 x half> %0,612 half zeroinitializer,613 <vscale x 32 x i1> %1,614 iXLen %2)615 616 ret <vscale x 32 x half> %a617}618 619define <vscale x 1 x float> @intrinsic_vfmerge_vzm_nxv1f32_nxv1f32_f32(<vscale x 1 x float> %0, <vscale x 1 x i1> %1, iXLen %2) nounwind {620; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv1f32_nxv1f32_f32:621; CHECK: # %bb.0: # %entry622; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma623; CHECK-NEXT: vmerge.vim v8, v8, 0, v0624; CHECK-NEXT: ret625entry:626 %a = call <vscale x 1 x float> @llvm.riscv.vfmerge.nxv1f32.f32(627 <vscale x 1 x float> poison,628 <vscale x 1 x float> %0,629 float zeroinitializer,630 <vscale x 1 x i1> %1,631 iXLen %2)632 633 ret <vscale x 1 x float> %a634}635 636define <vscale x 2 x float> @intrinsic_vfmerge_vzm_nxv2f32_nxv2f32_f32(<vscale x 2 x float> %0, <vscale x 2 x i1> %1, iXLen %2) nounwind {637; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv2f32_nxv2f32_f32:638; CHECK: # %bb.0: # %entry639; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma640; CHECK-NEXT: vmerge.vim v8, v8, 0, v0641; CHECK-NEXT: ret642entry:643 %a = call <vscale x 2 x float> @llvm.riscv.vfmerge.nxv2f32.f32(644 <vscale x 2 x float> poison,645 <vscale x 2 x float> %0,646 float zeroinitializer,647 <vscale x 2 x i1> %1,648 iXLen %2)649 650 ret <vscale x 2 x float> %a651}652 653define <vscale x 4 x float> @intrinsic_vfmerge_vzm_nxv4f32_nxv4f32_f32(<vscale x 4 x float> %0, <vscale x 4 x i1> %1, iXLen %2) nounwind {654; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv4f32_nxv4f32_f32:655; CHECK: # %bb.0: # %entry656; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma657; CHECK-NEXT: vmerge.vim v8, v8, 0, v0658; CHECK-NEXT: ret659entry:660 %a = call <vscale x 4 x float> @llvm.riscv.vfmerge.nxv4f32.f32(661 <vscale x 4 x float> poison,662 <vscale x 4 x float> %0,663 float zeroinitializer,664 <vscale x 4 x i1> %1,665 iXLen %2)666 667 ret <vscale x 4 x float> %a668}669 670define <vscale x 8 x float> @intrinsic_vfmerge_vzm_nxv8f32_nxv8f32_f32(<vscale x 8 x float> %0, <vscale x 8 x i1> %1, iXLen %2) nounwind {671; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv8f32_nxv8f32_f32:672; CHECK: # %bb.0: # %entry673; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma674; CHECK-NEXT: vmerge.vim v8, v8, 0, v0675; CHECK-NEXT: ret676entry:677 %a = call <vscale x 8 x float> @llvm.riscv.vfmerge.nxv8f32.f32(678 <vscale x 8 x float> poison,679 <vscale x 8 x float> %0,680 float zeroinitializer,681 <vscale x 8 x i1> %1,682 iXLen %2)683 684 ret <vscale x 8 x float> %a685}686 687define <vscale x 16 x float> @intrinsic_vfmerge_vzm_nxv16f32_nxv16f32_f32(<vscale x 16 x float> %0, <vscale x 16 x i1> %1, iXLen %2) nounwind {688; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv16f32_nxv16f32_f32:689; CHECK: # %bb.0: # %entry690; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma691; CHECK-NEXT: vmerge.vim v8, v8, 0, v0692; CHECK-NEXT: ret693entry:694 %a = call <vscale x 16 x float> @llvm.riscv.vfmerge.nxv16f32.f32(695 <vscale x 16 x float> poison,696 <vscale x 16 x float> %0,697 float zeroinitializer,698 <vscale x 16 x i1> %1,699 iXLen %2)700 701 ret <vscale x 16 x float> %a702}703 704define <vscale x 1 x double> @intrinsic_vfmerge_vzm_nxv1f64_nxv1f64_f64(<vscale x 1 x double> %0, <vscale x 1 x i1> %1, iXLen %2) nounwind {705; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv1f64_nxv1f64_f64:706; CHECK: # %bb.0: # %entry707; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma708; CHECK-NEXT: vmerge.vim v8, v8, 0, v0709; CHECK-NEXT: ret710entry:711 %a = call <vscale x 1 x double> @llvm.riscv.vfmerge.nxv1f64.f64(712 <vscale x 1 x double> poison,713 <vscale x 1 x double> %0,714 double zeroinitializer,715 <vscale x 1 x i1> %1,716 iXLen %2)717 718 ret <vscale x 1 x double> %a719}720 721define <vscale x 2 x double> @intrinsic_vfmerge_vzm_nxv2f64_nxv2f64_f64(<vscale x 2 x double> %0, <vscale x 2 x i1> %1, iXLen %2) nounwind {722; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv2f64_nxv2f64_f64:723; CHECK: # %bb.0: # %entry724; CHECK-NEXT: vsetvli zero, a0, e64, m2, ta, ma725; CHECK-NEXT: vmerge.vim v8, v8, 0, v0726; CHECK-NEXT: ret727entry:728 %a = call <vscale x 2 x double> @llvm.riscv.vfmerge.nxv2f64.f64(729 <vscale x 2 x double> poison,730 <vscale x 2 x double> %0,731 double zeroinitializer,732 <vscale x 2 x i1> %1,733 iXLen %2)734 735 ret <vscale x 2 x double> %a736}737 738define <vscale x 4 x double> @intrinsic_vfmerge_vzm_nxv4f64_nxv4f64_f64(<vscale x 4 x double> %0, <vscale x 4 x i1> %1, iXLen %2) nounwind {739; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv4f64_nxv4f64_f64:740; CHECK: # %bb.0: # %entry741; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma742; CHECK-NEXT: vmerge.vim v8, v8, 0, v0743; CHECK-NEXT: ret744entry:745 %a = call <vscale x 4 x double> @llvm.riscv.vfmerge.nxv4f64.f64(746 <vscale x 4 x double> poison,747 <vscale x 4 x double> %0,748 double zeroinitializer,749 <vscale x 4 x i1> %1,750 iXLen %2)751 752 ret <vscale x 4 x double> %a753}754 755define <vscale x 8 x double> @intrinsic_vfmerge_vzm_nxv8f64_nxv8f64_f64(<vscale x 8 x double> %0, <vscale x 8 x i1> %1, iXLen %2) nounwind {756; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv8f64_nxv8f64_f64:757; CHECK: # %bb.0: # %entry758; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma759; CHECK-NEXT: vmerge.vim v8, v8, 0, v0760; CHECK-NEXT: ret761entry:762 %a = call <vscale x 8 x double> @llvm.riscv.vfmerge.nxv8f64.f64(763 <vscale x 8 x double> poison,764 <vscale x 8 x double> %0,765 double zeroinitializer,766 <vscale x 8 x i1> %1,767 iXLen %2)768 769 ret <vscale x 8 x double> %a770}771